[13:44:57.013] <TB3> INFO: *** Welcome to pxar ***
[13:44:57.013] <TB3> INFO: *** Today: 2016/10/25
[13:44:57.021] <TB3> INFO: *** Version: c8ba-dirty
[13:44:57.021] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters_C15.dat
[13:44:57.022] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//tbmParameters_C1b.dat
[13:44:57.022] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//defaultMaskFile.dat
[13:44:57.022] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//trimParameters_C15.dat
[13:44:57.077] <TB3> INFO: clk: 4
[13:44:57.077] <TB3> INFO: ctr: 4
[13:44:57.077] <TB3> INFO: sda: 19
[13:44:57.077] <TB3> INFO: tin: 9
[13:44:57.077] <TB3> INFO: level: 15
[13:44:57.077] <TB3> INFO: triggerdelay: 0
[13:44:57.077] <TB3> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[13:44:57.077] <TB3> INFO: Log level: INFO
[13:44:57.085] <TB3> INFO: Found DTB DTB_WZ4I6J
[13:44:57.094] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[13:44:57.096] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[13:44:57.097] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[13:44:58.586] <TB3> INFO: DUT info:
[13:44:58.586] <TB3> INFO: The DUT currently contains the following objects:
[13:44:58.586] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[13:44:58.586] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:44:58.586] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:44:58.586] <TB3> INFO: TBM Core alpha (2): 7 registers set
[13:44:58.586] <TB3> INFO: TBM Core beta (3): 7 registers set
[13:44:58.586] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[13:44:58.586] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[13:44:58.586] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[13:44:58.586] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[13:44:58.586] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[13:44:58.586] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[13:44:58.586] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[13:44:58.586] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[13:44:58.586] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[13:44:58.586] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[13:44:58.586] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[13:44:58.586] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[13:44:58.586] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[13:44:58.586] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[13:44:58.586] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[13:44:58.586] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[13:44:58.586] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[13:44:58.987] <TB3> INFO: enter 'restricted' command line mode
[13:44:58.987] <TB3> INFO: enter test to run
[13:44:58.987] <TB3> INFO: test: pretest no parameter change
[13:44:58.987] <TB3> INFO: running: pretest
[13:44:59.531] <TB3> INFO: ######################################################################
[13:44:59.531] <TB3> INFO: PixTestPretest::doTest()
[13:44:59.531] <TB3> INFO: ######################################################################
[13:44:59.532] <TB3> INFO: ----------------------------------------------------------------------
[13:44:59.532] <TB3> INFO: PixTestPretest::programROC()
[13:44:59.532] <TB3> INFO: ----------------------------------------------------------------------
[13:45:17.545] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[13:45:17.545] <TB3> INFO: IA differences per ROC: 19.3 21.7 19.3 21.7 18.5 22.5 20.1 19.3 19.3 22.5 19.3 17.7 19.3 20.1 20.1 19.3
[13:45:17.582] <TB3> INFO: ----------------------------------------------------------------------
[13:45:17.582] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[13:45:17.582] <TB3> INFO: ----------------------------------------------------------------------
[13:45:25.868] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 390.7 mA = 24.4187 mA/ROC
[13:45:25.868] <TB3> INFO: i(loss) [mA/ROC]: 20.1 20.1 19.3 19.3 18.5 19.3 19.3 19.3 20.1 19.3 19.3 19.3 19.3 18.5 19.3 19.3
[13:45:25.897] <TB3> INFO: ----------------------------------------------------------------------
[13:45:25.897] <TB3> INFO: PixTestPretest::findTiming()
[13:45:25.897] <TB3> INFO: ----------------------------------------------------------------------
[13:45:25.897] <TB3> INFO: PixTestCmd::init()

[13:45:57.155] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[13:45:57.155] <TB3> INFO: (success/tries = 100/100), width = 4
[13:45:58.656] <TB3> INFO: ----------------------------------------------------------------------
[13:45:58.656] <TB3> INFO: PixTestPretest::findWorkingPixel()
[13:45:58.656] <TB3> INFO: ----------------------------------------------------------------------
[13:45:58.748] <TB3> INFO: Expecting 231680 events.
[13:46:08.377] <TB3> INFO: 231680 events read in total (9038ms).
[13:46:08.383] <TB3> INFO: Test took 9725ms.
[13:46:08.628] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[13:46:08.655] <TB3> INFO: ----------------------------------------------------------------------
[13:46:08.655] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[13:46:08.655] <TB3> INFO: ----------------------------------------------------------------------
[13:46:08.748] <TB3> INFO: Expecting 231680 events.
[13:46:18.417] <TB3> INFO: 231680 events read in total (9077ms).
[13:46:18.424] <TB3> INFO: Test took 9764ms.
[13:46:18.683] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[13:46:18.683] <TB3> INFO: CalDel: 99 90 92 99 96 106 91 86 96 97 101 85 97 82 95 95
[13:46:18.683] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 54 51 51 51 56 51 56 51 53
[13:46:18.685] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters_C0.dat
[13:46:18.685] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters_C1.dat
[13:46:18.685] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters_C2.dat
[13:46:18.686] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters_C3.dat
[13:46:18.686] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters_C4.dat
[13:46:18.686] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters_C5.dat
[13:46:18.686] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters_C6.dat
[13:46:18.686] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters_C7.dat
[13:46:18.686] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters_C8.dat
[13:46:18.686] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters_C9.dat
[13:46:18.686] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters_C10.dat
[13:46:18.686] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters_C11.dat
[13:46:18.687] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters_C12.dat
[13:46:18.687] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters_C13.dat
[13:46:18.687] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters_C14.dat
[13:46:18.687] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters_C15.dat
[13:46:18.687] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//tbmParameters_C0a.dat
[13:46:18.687] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//tbmParameters_C0b.dat
[13:46:18.687] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//tbmParameters_C1a.dat
[13:46:18.687] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//tbmParameters_C1b.dat
[13:46:18.687] <TB3> INFO: PixTestPretest::doTest() done, duration: 79 seconds
[13:46:18.786] <TB3> INFO: enter test to run
[13:46:18.786] <TB3> INFO: test: FullTest no parameter change
[13:46:18.786] <TB3> INFO: running: fulltest
[13:46:18.786] <TB3> INFO: ######################################################################
[13:46:18.786] <TB3> INFO: PixTestFullTest::doTest()
[13:46:18.786] <TB3> INFO: ######################################################################
[13:46:18.787] <TB3> INFO: ######################################################################
[13:46:18.787] <TB3> INFO: PixTestAlive::doTest()
[13:46:18.787] <TB3> INFO: ######################################################################
[13:46:18.788] <TB3> INFO: ----------------------------------------------------------------------
[13:46:18.789] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:46:18.789] <TB3> INFO: ----------------------------------------------------------------------
[13:46:19.023] <TB3> INFO: Expecting 41600 events.
[13:46:22.507] <TB3> INFO: 41600 events read in total (2892ms).
[13:46:22.508] <TB3> INFO: Test took 3718ms.
[13:46:22.732] <TB3> INFO: PixTestAlive::aliveTest() done with 10 decoding errors
[13:46:22.732] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 40 0 1 0 1 0 0 0 0
[13:46:22.734] <TB3> INFO: ----------------------------------------------------------------------
[13:46:22.734] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:46:22.734] <TB3> INFO: ----------------------------------------------------------------------
[13:46:22.968] <TB3> INFO: Expecting 41600 events.
[13:46:25.922] <TB3> INFO: 41600 events read in total (2362ms).
[13:46:25.922] <TB3> INFO: Test took 3187ms.
[13:46:25.922] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[13:46:26.161] <TB3> INFO: PixTestAlive::maskTest() done
[13:46:26.161] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:46:26.162] <TB3> INFO: ----------------------------------------------------------------------
[13:46:26.162] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:46:26.162] <TB3> INFO: ----------------------------------------------------------------------
[13:46:26.396] <TB3> INFO: Expecting 41600 events.
[13:46:29.837] <TB3> INFO: 41600 events read in total (2850ms).
[13:46:29.838] <TB3> INFO: Test took 3674ms.







































[13:46:30.065] <TB3> INFO: PixTestAlive::addressDecodingTest() done with 10 decoding errors
[13:46:30.066] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:46:30.066] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[13:46:30.066] <TB3> INFO: Decoding statistics:
[13:46:30.066] <TB3> INFO: General information:
[13:46:30.066] <TB3> INFO: 16bit words read: 0
[13:46:30.066] <TB3> INFO: valid events total: 0
[13:46:30.066] <TB3> INFO: empty events: 0
[13:46:30.066] <TB3> INFO: valid events with pixels: 0
[13:46:30.066] <TB3> INFO: valid pixel hits: 0
[13:46:30.066] <TB3> INFO: Event errors: 0
[13:46:30.066] <TB3> INFO: start marker: 0
[13:46:30.066] <TB3> INFO: stop marker: 0
[13:46:30.066] <TB3> INFO: overflow: 0
[13:46:30.066] <TB3> INFO: invalid 5bit words: 0
[13:46:30.066] <TB3> INFO: invalid XOR eye diagram: 0
[13:46:30.066] <TB3> INFO: frame (failed synchr.): 0
[13:46:30.066] <TB3> INFO: idle data (no TBM trl): 0
[13:46:30.066] <TB3> INFO: no data (only TBM hdr): 0
[13:46:30.066] <TB3> INFO: TBM errors: 0
[13:46:30.066] <TB3> INFO: flawed TBM headers: 0
[13:46:30.066] <TB3> INFO: flawed TBM trailers: 0
[13:46:30.066] <TB3> INFO: event ID mismatches: 0
[13:46:30.066] <TB3> INFO: ROC errors: 0
[13:46:30.066] <TB3> INFO: missing ROC header(s): 0
[13:46:30.066] <TB3> INFO: misplaced readback start: 0
[13:46:30.066] <TB3> INFO: Pixel decoding errors: 0
[13:46:30.066] <TB3> INFO: pixel data incomplete: 0
[13:46:30.066] <TB3> INFO: pixel address: 0
[13:46:30.066] <TB3> INFO: pulse height fill bit: 0
[13:46:30.066] <TB3> INFO: buffer corruption: 0
[13:46:30.073] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C15.dat
[13:46:30.074] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//phCalibrationFitErr_C15.dat

[13:46:30.074] <TB3> INFO: ######################################################################
[13:46:30.074] <TB3> INFO: PixTestReadback::doTest()
[13:46:30.074] <TB3> INFO: ######################################################################
[13:46:30.074] <TB3> INFO: ----------------------------------------------------------------------
[13:46:30.074] <TB3> INFO: PixTestReadback::CalibrateVd()
[13:46:30.074] <TB3> INFO: ----------------------------------------------------------------------
[13:46:40.039] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C0.dat
[13:46:40.039] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C1.dat
[13:46:40.039] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C2.dat
[13:46:40.039] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C3.dat
[13:46:40.039] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C4.dat
[13:46:40.039] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C5.dat
[13:46:40.039] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C6.dat
[13:46:40.039] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C7.dat
[13:46:40.040] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C8.dat
[13:46:40.040] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C9.dat
[13:46:40.040] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C10.dat
[13:46:40.040] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C11.dat
[13:46:40.040] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C12.dat
[13:46:40.040] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C13.dat
[13:46:40.040] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C14.dat
[13:46:40.040] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C15.dat
[13:46:40.068] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[13:46:40.068] <TB3> INFO: ----------------------------------------------------------------------
[13:46:40.068] <TB3> INFO: PixTestReadback::CalibrateVa()
[13:46:40.068] <TB3> INFO: ----------------------------------------------------------------------
[13:46:49.959] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C0.dat
[13:46:49.959] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C1.dat
[13:46:49.959] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C2.dat
[13:46:49.959] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C3.dat
[13:46:49.959] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C4.dat
[13:46:49.959] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C5.dat
[13:46:49.960] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C6.dat
[13:46:49.960] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C7.dat
[13:46:49.960] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C8.dat
[13:46:49.960] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C9.dat
[13:46:49.960] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C10.dat
[13:46:49.960] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C11.dat
[13:46:49.960] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C12.dat
[13:46:49.960] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C13.dat
[13:46:49.960] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C14.dat
[13:46:49.960] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C15.dat
[13:46:49.988] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[13:46:49.988] <TB3> INFO: ----------------------------------------------------------------------
[13:46:49.988] <TB3> INFO: PixTestReadback::readbackVbg()
[13:46:49.988] <TB3> INFO: ----------------------------------------------------------------------
[13:46:57.627] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[13:46:57.627] <TB3> INFO: ----------------------------------------------------------------------
[13:46:57.627] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[13:46:57.627] <TB3> INFO: ----------------------------------------------------------------------
[13:46:57.627] <TB3> INFO: Vbg will be calibrated using Vd calibration
[13:46:57.627] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 157.5calibrated Vbg = 1.20982 :::*/*/*/*/
[13:46:57.627] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 153.7calibrated Vbg = 1.20645 :::*/*/*/*/
[13:46:57.627] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 149.2calibrated Vbg = 1.20004 :::*/*/*/*/
[13:46:57.627] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 151.7calibrated Vbg = 1.19996 :::*/*/*/*/
[13:46:57.627] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 152.8calibrated Vbg = 1.2087 :::*/*/*/*/
[13:46:57.627] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 163.1calibrated Vbg = 1.20545 :::*/*/*/*/
[13:46:57.627] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 155.9calibrated Vbg = 1.21082 :::*/*/*/*/
[13:46:57.627] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 152.8calibrated Vbg = 1.21455 :::*/*/*/*/
[13:46:57.627] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 153.5calibrated Vbg = 1.20515 :::*/*/*/*/
[13:46:57.627] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 153.1calibrated Vbg = 1.20213 :::*/*/*/*/
[13:46:57.627] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150.9calibrated Vbg = 1.19333 :::*/*/*/*/
[13:46:57.627] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 154.2calibrated Vbg = 1.18666 :::*/*/*/*/
[13:46:57.627] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 152.5calibrated Vbg = 1.19764 :::*/*/*/*/
[13:46:57.627] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 159.7calibrated Vbg = 1.20257 :::*/*/*/*/
[13:46:57.627] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 152.8calibrated Vbg = 1.20429 :::*/*/*/*/
[13:46:57.627] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 170.8calibrated Vbg = 1.2008 :::*/*/*/*/
[13:46:57.629] <TB3> INFO: ----------------------------------------------------------------------
[13:46:57.629] <TB3> INFO: PixTestReadback::CalibrateIa()
[13:46:57.629] <TB3> INFO: ----------------------------------------------------------------------
[13:49:37.933] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C0.dat
[13:49:37.933] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C1.dat
[13:49:37.933] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C2.dat
[13:49:37.933] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C3.dat
[13:49:37.933] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C4.dat
[13:49:37.933] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C5.dat
[13:49:37.933] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C6.dat
[13:49:37.934] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C7.dat
[13:49:37.934] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C8.dat
[13:49:37.934] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C9.dat
[13:49:37.934] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C10.dat
[13:49:37.934] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C11.dat
[13:49:37.934] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C12.dat
[13:49:37.934] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C13.dat
[13:49:37.934] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C14.dat
[13:49:37.934] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//readbackCal_C15.dat
[13:49:37.962] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[13:49:37.963] <TB3> INFO: PixTestReadback::doTest() done
[13:49:37.963] <TB3> INFO: Decoding statistics:
[13:49:37.963] <TB3> INFO: General information:
[13:49:37.963] <TB3> INFO: 16bit words read: 1536
[13:49:37.963] <TB3> INFO: valid events total: 256
[13:49:37.963] <TB3> INFO: empty events: 256
[13:49:37.963] <TB3> INFO: valid events with pixels: 0
[13:49:37.963] <TB3> INFO: valid pixel hits: 0
[13:49:37.963] <TB3> INFO: Event errors: 0
[13:49:37.963] <TB3> INFO: start marker: 0
[13:49:37.963] <TB3> INFO: stop marker: 0
[13:49:37.963] <TB3> INFO: overflow: 0
[13:49:37.963] <TB3> INFO: invalid 5bit words: 0
[13:49:37.963] <TB3> INFO: invalid XOR eye diagram: 0
[13:49:37.963] <TB3> INFO: frame (failed synchr.): 0
[13:49:37.963] <TB3> INFO: idle data (no TBM trl): 0
[13:49:37.963] <TB3> INFO: no data (only TBM hdr): 0
[13:49:37.963] <TB3> INFO: TBM errors: 0
[13:49:37.963] <TB3> INFO: flawed TBM headers: 0
[13:49:37.963] <TB3> INFO: flawed TBM trailers: 0
[13:49:37.963] <TB3> INFO: event ID mismatches: 0
[13:49:37.963] <TB3> INFO: ROC errors: 0
[13:49:37.963] <TB3> INFO: missing ROC header(s): 0
[13:49:37.963] <TB3> INFO: misplaced readback start: 0
[13:49:37.963] <TB3> INFO: Pixel decoding errors: 0
[13:49:37.963] <TB3> INFO: pixel data incomplete: 0
[13:49:37.963] <TB3> INFO: pixel address: 0
[13:49:37.963] <TB3> INFO: pulse height fill bit: 0
[13:49:37.963] <TB3> INFO: buffer corruption: 0
[13:49:37.999] <TB3> INFO: ######################################################################
[13:49:37.999] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[13:49:37.999] <TB3> INFO: ######################################################################
[13:49:37.001] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[13:49:38.017] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:49:38.017] <TB3> INFO: run 1 of 1
[13:49:38.252] <TB3> INFO: Expecting 3120000 events.
[13:50:09.171] <TB3> INFO: 680750 events read in total (30327ms).





















[13:50:39.527] <TB3> INFO: 1355760 events read in total (60683ms).











[13:51:09.503] <TB3> INFO: 2026250 events read in total (90660ms).











[13:51:39.332] <TB3> INFO: 2697985 events read in total (120488ms).











[13:51:58.248] <TB3> INFO: 3120000 events read in total (139405ms).
[13:51:58.311] <TB3> INFO: Test took 140295ms.
[13:52:24.647] <TB3> INFO: PixTestBBMap::doTest() done with 230 decoding errors: , duration: 166 seconds
[13:52:24.647] <TB3> INFO: number of dead bumps (per ROC): 0 0 2 0 1 0 0 0 0 0 0 0 0 1 0 0
[13:52:24.647] <TB3> INFO: separation cut (per ROC): 104 119 113 110 100 116 121 129 121 119 113 114 109 119 110 106
[13:52:24.647] <TB3> INFO: Decoding statistics:
[13:52:24.647] <TB3> INFO: General information:
[13:52:24.647] <TB3> INFO: 16bit words read: 0
[13:52:24.647] <TB3> INFO: valid events total: 0
[13:52:24.647] <TB3> INFO: empty events: 0
[13:52:24.647] <TB3> INFO: valid events with pixels: 0
[13:52:24.647] <TB3> INFO: valid pixel hits: 0
[13:52:24.647] <TB3> INFO: Event errors: 0
[13:52:24.647] <TB3> INFO: start marker: 0
[13:52:24.647] <TB3> INFO: stop marker: 0
[13:52:24.647] <TB3> INFO: overflow: 0
[13:52:24.647] <TB3> INFO: invalid 5bit words: 0
[13:52:24.647] <TB3> INFO: invalid XOR eye diagram: 0
[13:52:24.647] <TB3> INFO: frame (failed synchr.): 0
[13:52:24.647] <TB3> INFO: idle data (no TBM trl): 0
[13:52:24.647] <TB3> INFO: no data (only TBM hdr): 0
[13:52:24.647] <TB3> INFO: TBM errors: 0
[13:52:24.647] <TB3> INFO: flawed TBM headers: 0
[13:52:24.648] <TB3> INFO: flawed TBM trailers: 0
[13:52:24.648] <TB3> INFO: event ID mismatches: 0
[13:52:24.648] <TB3> INFO: ROC errors: 0
[13:52:24.648] <TB3> INFO: missing ROC header(s): 0
[13:52:24.648] <TB3> INFO: misplaced readback start: 0
[13:52:24.648] <TB3> INFO: Pixel decoding errors: 0
[13:52:24.648] <TB3> INFO: pixel data incomplete: 0
[13:52:24.648] <TB3> INFO: pixel address: 0
[13:52:24.648] <TB3> INFO: pulse height fill bit: 0
[13:52:24.648] <TB3> INFO: buffer corruption: 0
[13:52:24.694] <TB3> INFO: ######################################################################
[13:52:24.694] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[13:52:24.694] <TB3> INFO: ######################################################################
[13:52:24.694] <TB3> INFO: ----------------------------------------------------------------------
[13:52:24.694] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[13:52:24.694] <TB3> INFO: ----------------------------------------------------------------------
[13:52:24.694] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[13:52:24.704] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[13:52:24.704] <TB3> INFO: run 1 of 1
[13:52:24.936] <TB3> INFO: Expecting 36608000 events.
[13:52:48.425] <TB3> INFO: 705800 events read in total (22897ms).
[13:53:11.122] <TB3> INFO: 1396000 events read in total (45594ms).
[13:53:33.809] <TB3> INFO: 2085000 events read in total (68281ms).
[13:53:56.661] <TB3> INFO: 2774800 events read in total (91133ms).
[13:54:19.204] <TB3> INFO: 3462900 events read in total (113676ms).
[13:54:41.724] <TB3> INFO: 4150750 events read in total (136196ms).
[13:55:04.285] <TB3> INFO: 4838150 events read in total (158757ms).
[13:55:26.007] <TB3> INFO: 5523900 events read in total (181479ms).
[13:55:49.656] <TB3> INFO: 6209000 events read in total (204128ms).
[13:56:12.334] <TB3> INFO: 6895850 events read in total (226806ms).
[13:56:35.030] <TB3> INFO: 7581700 events read in total (249502ms).
[13:56:57.396] <TB3> INFO: 8267200 events read in total (271868ms).
[13:57:19.787] <TB3> INFO: 8952000 events read in total (294259ms).
[13:57:42.527] <TB3> INFO: 9638450 events read in total (316999ms).
[13:58:05.056] <TB3> INFO: 10322100 events read in total (339528ms).
[13:58:27.628] <TB3> INFO: 11006200 events read in total (362100ms).
[13:58:50.313] <TB3> INFO: 11690000 events read in total (384785ms).
[13:59:12.949] <TB3> INFO: 12372000 events read in total (407421ms).
[13:59:35.346] <TB3> INFO: 13055450 events read in total (429818ms).
[13:59:57.777] <TB3> INFO: 13737150 events read in total (452249ms).
[14:00:20.427] <TB3> INFO: 14420800 events read in total (474899ms).
[14:00:43.209] <TB3> INFO: 15102550 events read in total (497681ms).
[14:01:05.614] <TB3> INFO: 15783300 events read in total (520086ms).
[14:01:28.118] <TB3> INFO: 16463850 events read in total (542590ms).
[14:01:50.438] <TB3> INFO: 17144050 events read in total (564910ms).
[14:02:13.204] <TB3> INFO: 17825800 events read in total (587676ms).
[14:02:35.682] <TB3> INFO: 18506450 events read in total (610154ms).
[14:02:58.390] <TB3> INFO: 19186350 events read in total (632862ms).
[14:03:20.858] <TB3> INFO: 19864050 events read in total (655330ms).
[14:03:43.375] <TB3> INFO: 20541200 events read in total (677847ms).
[14:04:05.874] <TB3> INFO: 21218500 events read in total (700346ms).
[14:04:28.510] <TB3> INFO: 21897000 events read in total (722982ms).
[14:04:51.298] <TB3> INFO: 22576500 events read in total (745770ms).
[14:05:13.943] <TB3> INFO: 23253200 events read in total (768415ms).
[14:05:36.754] <TB3> INFO: 23931950 events read in total (791226ms).
[14:05:59.147] <TB3> INFO: 24606050 events read in total (813619ms).
[14:06:21.789] <TB3> INFO: 25281750 events read in total (836261ms).
[14:06:44.358] <TB3> INFO: 25957550 events read in total (858830ms).
[14:07:06.899] <TB3> INFO: 26632850 events read in total (881371ms).
[14:07:29.348] <TB3> INFO: 27309850 events read in total (903820ms).
[14:07:51.804] <TB3> INFO: 27987350 events read in total (926276ms).
[14:08:14.509] <TB3> INFO: 28664950 events read in total (948981ms).
[14:08:37.242] <TB3> INFO: 29342050 events read in total (971714ms).
[14:08:59.935] <TB3> INFO: 30018000 events read in total (994407ms).
[14:09:22.379] <TB3> INFO: 30694150 events read in total (1016851ms).
[14:09:45.033] <TB3> INFO: 31371300 events read in total (1039505ms).
[14:10:07.607] <TB3> INFO: 32048800 events read in total (1062079ms).
[14:10:30.275] <TB3> INFO: 32727200 events read in total (1084747ms).
[14:10:52.831] <TB3> INFO: 33406500 events read in total (1107303ms).
[14:11:15.594] <TB3> INFO: 34085250 events read in total (1130066ms).
[14:11:38.223] <TB3> INFO: 34764600 events read in total (1152695ms).
[14:12:01.115] <TB3> INFO: 35443800 events read in total (1175587ms).
[14:12:24.063] <TB3> INFO: 36128950 events read in total (1198535ms).
[14:12:39.814] <TB3> INFO: 36608000 events read in total (1214286ms).
[14:12:39.866] <TB3> INFO: Test took 1215162ms.
[14:12:40.319] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:12:42.418] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:12:44.310] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:12:45.932] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:12:47.652] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:12:49.392] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:12:51.603] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:12:53.637] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:12:55.624] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:12:57.189] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:12:58.808] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:13:00.273] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:13:02.031] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:13:03.983] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:13:05.907] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:13:07.805] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:13:09.680] <TB3> INFO: PixTestScurves::scurves() done
[14:13:09.680] <TB3> INFO: Vcal mean: 127.99 126.05 126.08 117.42 119.38 123.42 131.14 129.94 130.78 133.32 125.15 124.90 125.95 132.15 122.87 125.80
[14:13:09.680] <TB3> INFO: Vcal RMS: 6.78 6.56 6.03 5.16 5.73 6.11 6.49 14.22 6.44 6.58 6.41 7.11 5.58 5.98 6.33 7.07
[14:13:09.680] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1244 seconds
[14:13:09.680] <TB3> INFO: Decoding statistics:
[14:13:09.680] <TB3> INFO: General information:
[14:13:09.680] <TB3> INFO: 16bit words read: 0
[14:13:09.680] <TB3> INFO: valid events total: 0
[14:13:09.680] <TB3> INFO: empty events: 0
[14:13:09.680] <TB3> INFO: valid events with pixels: 0
[14:13:09.680] <TB3> INFO: valid pixel hits: 0
[14:13:09.680] <TB3> INFO: Event errors: 0
[14:13:09.680] <TB3> INFO: start marker: 0
[14:13:09.680] <TB3> INFO: stop marker: 0
[14:13:09.680] <TB3> INFO: overflow: 0
[14:13:09.680] <TB3> INFO: invalid 5bit words: 0
[14:13:09.680] <TB3> INFO: invalid XOR eye diagram: 0
[14:13:09.680] <TB3> INFO: frame (failed synchr.): 0
[14:13:09.680] <TB3> INFO: idle data (no TBM trl): 0
[14:13:09.680] <TB3> INFO: no data (only TBM hdr): 0
[14:13:09.680] <TB3> INFO: TBM errors: 0
[14:13:09.680] <TB3> INFO: flawed TBM headers: 0
[14:13:09.680] <TB3> INFO: flawed TBM trailers: 0
[14:13:09.680] <TB3> INFO: event ID mismatches: 0
[14:13:09.680] <TB3> INFO: ROC errors: 0
[14:13:09.680] <TB3> INFO: missing ROC header(s): 0
[14:13:09.680] <TB3> INFO: misplaced readback start: 0
[14:13:09.680] <TB3> INFO: Pixel decoding errors: 0
[14:13:09.680] <TB3> INFO: pixel data incomplete: 0
[14:13:09.680] <TB3> INFO: pixel address: 0
[14:13:09.680] <TB3> INFO: pulse height fill bit: 0
[14:13:09.680] <TB3> INFO: buffer corruption: 0
[14:13:09.750] <TB3> INFO: ######################################################################
[14:13:09.750] <TB3> INFO: PixTestTrim::doTest()
[14:13:09.750] <TB3> INFO: ######################################################################
[14:13:09.751] <TB3> INFO: ----------------------------------------------------------------------
[14:13:09.752] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[14:13:09.752] <TB3> INFO: ----------------------------------------------------------------------
[14:13:09.794] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[14:13:09.794] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[14:13:09.804] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:13:09.804] <TB3> INFO: run 1 of 1
[14:13:10.039] <TB3> INFO: Expecting 5025280 events.
[14:13:40.616] <TB3> INFO: 835512 events read in total (29985ms).
[14:14:10.256] <TB3> INFO: 1668024 events read in total (59625ms).
[14:14:39.992] <TB3> INFO: 2498464 events read in total (89362ms).
[14:15:09.388] <TB3> INFO: 3324440 events read in total (118757ms).
[14:15:38.708] <TB3> INFO: 4146912 events read in total (148077ms).
[14:16:08.783] <TB3> INFO: 4969928 events read in total (178152ms).
[14:16:11.208] <TB3> INFO: 5025280 events read in total (180577ms).
[14:16:11.247] <TB3> INFO: Test took 181443ms.
[14:16:29.810] <TB3> INFO: ROC 0 VthrComp = 127
[14:16:29.810] <TB3> INFO: ROC 1 VthrComp = 133
[14:16:29.810] <TB3> INFO: ROC 2 VthrComp = 125
[14:16:29.811] <TB3> INFO: ROC 3 VthrComp = 120
[14:16:29.811] <TB3> INFO: ROC 4 VthrComp = 112
[14:16:29.811] <TB3> INFO: ROC 5 VthrComp = 125
[14:16:29.811] <TB3> INFO: ROC 6 VthrComp = 127
[14:16:29.812] <TB3> INFO: ROC 7 VthrComp = 127
[14:16:29.812] <TB3> INFO: ROC 8 VthrComp = 131
[14:16:29.812] <TB3> INFO: ROC 9 VthrComp = 130
[14:16:29.812] <TB3> INFO: ROC 10 VthrComp = 124
[14:16:29.812] <TB3> INFO: ROC 11 VthrComp = 123
[14:16:29.813] <TB3> INFO: ROC 12 VthrComp = 126
[14:16:29.814] <TB3> INFO: ROC 13 VthrComp = 128
[14:16:29.814] <TB3> INFO: ROC 14 VthrComp = 124
[14:16:29.814] <TB3> INFO: ROC 15 VthrComp = 118
[14:16:30.053] <TB3> INFO: Expecting 41600 events.
[14:16:33.531] <TB3> INFO: 41600 events read in total (2886ms).
[14:16:33.531] <TB3> INFO: Test took 3715ms.
[14:16:33.540] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[14:16:33.540] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[14:16:33.551] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:16:33.551] <TB3> INFO: run 1 of 1
[14:16:33.829] <TB3> INFO: Expecting 5025280 events.
[14:16:59.828] <TB3> INFO: 593488 events read in total (25407ms).
[14:17:25.486] <TB3> INFO: 1185080 events read in total (51065ms).
[14:17:51.220] <TB3> INFO: 1776616 events read in total (76799ms).
[14:18:16.619] <TB3> INFO: 2367472 events read in total (102198ms).
[14:18:42.221] <TB3> INFO: 2956312 events read in total (127800ms).
[14:19:07.960] <TB3> INFO: 3542840 events read in total (153539ms).
[14:19:33.354] <TB3> INFO: 4127624 events read in total (178933ms).
[14:19:58.746] <TB3> INFO: 4711072 events read in total (204325ms).
[14:20:12.811] <TB3> INFO: 5025280 events read in total (218390ms).
[14:20:12.882] <TB3> INFO: Test took 219331ms.
[14:20:41.782] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 62.5282 for pixel 3/25 mean/min/max = 46.6444/30.6811/62.6077
[14:20:41.783] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 60.6247 for pixel 0/3 mean/min/max = 46.3384/32.0117/60.665
[14:20:41.783] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 61.2579 for pixel 45/13 mean/min/max = 46.7952/32.3166/61.2738
[14:20:41.784] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 59.186 for pixel 0/75 mean/min/max = 46.2264/33.1357/59.3171
[14:20:41.784] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 63.7541 for pixel 0/11 mean/min/max = 48.6274/33.2748/63.98
[14:20:41.785] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 59.099 for pixel 25/40 mean/min/max = 45.9432/32.4527/59.4337
[14:20:41.785] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 60.778 for pixel 2/19 mean/min/max = 46.0107/30.8832/61.1382
[14:20:41.785] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 66.1132 for pixel 51/19 mean/min/max = 48.9528/31.6616/66.2441
[14:20:41.786] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 59.8039 for pixel 8/10 mean/min/max = 45.718/31.5442/59.8918
[14:20:41.786] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 62.1278 for pixel 7/72 mean/min/max = 47.6657/33.0821/62.2494
[14:20:41.786] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 60.4392 for pixel 12/0 mean/min/max = 46.1745/31.7198/60.6292
[14:20:41.787] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 62.9028 for pixel 13/4 mean/min/max = 47.4769/32.0447/62.9091
[14:20:41.787] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 60.2367 for pixel 17/5 mean/min/max = 45.8831/31.4407/60.3254
[14:20:41.788] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 64.1049 for pixel 37/9 mean/min/max = 48.1255/31.9684/64.2825
[14:20:41.788] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 61.3632 for pixel 22/16 mean/min/max = 46.7672/32.0195/61.515
[14:20:41.788] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 64.5725 for pixel 13/5 mean/min/max = 48.1332/31.6688/64.5976
[14:20:41.789] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:41.877] <TB3> INFO: Expecting 411648 events.
[14:20:51.111] <TB3> INFO: 411648 events read in total (8642ms).
[14:20:51.118] <TB3> INFO: Expecting 411648 events.
[14:21:00.082] <TB3> INFO: 411648 events read in total (8561ms).
[14:21:00.094] <TB3> INFO: Expecting 411648 events.
[14:21:09.129] <TB3> INFO: 411648 events read in total (8632ms).
[14:21:09.141] <TB3> INFO: Expecting 411648 events.
[14:21:18.201] <TB3> INFO: 411648 events read in total (8657ms).
[14:21:18.220] <TB3> INFO: Expecting 411648 events.
[14:21:27.211] <TB3> INFO: 411648 events read in total (8589ms).
[14:21:27.227] <TB3> INFO: Expecting 411648 events.
[14:21:36.262] <TB3> INFO: 411648 events read in total (8632ms).
[14:21:36.282] <TB3> INFO: Expecting 411648 events.
[14:21:45.285] <TB3> INFO: 411648 events read in total (8600ms).
[14:21:45.307] <TB3> INFO: Expecting 411648 events.
[14:21:54.381] <TB3> INFO: 411648 events read in total (8671ms).
[14:21:54.406] <TB3> INFO: Expecting 411648 events.
[14:22:03.481] <TB3> INFO: 411648 events read in total (8672ms).
[14:22:03.508] <TB3> INFO: Expecting 411648 events.
[14:22:12.600] <TB3> INFO: 411648 events read in total (8689ms).
[14:22:12.629] <TB3> INFO: Expecting 411648 events.
[14:22:21.673] <TB3> INFO: 411648 events read in total (8641ms).
[14:22:21.715] <TB3> INFO: Expecting 411648 events.
[14:22:30.705] <TB3> INFO: 411648 events read in total (8587ms).
[14:22:30.741] <TB3> INFO: Expecting 411648 events.
[14:22:39.733] <TB3> INFO: 411648 events read in total (8590ms).
[14:22:39.769] <TB3> INFO: Expecting 411648 events.
[14:22:48.784] <TB3> INFO: 411648 events read in total (8612ms).
[14:22:48.823] <TB3> INFO: Expecting 411648 events.
[14:22:57.887] <TB3> INFO: 411648 events read in total (8661ms).
[14:22:57.934] <TB3> INFO: Expecting 411648 events.
[14:23:07.017] <TB3> INFO: 411648 events read in total (8679ms).
[14:23:07.061] <TB3> INFO: Test took 145273ms.
[14:23:07.728] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[14:23:07.740] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:23:07.741] <TB3> INFO: run 1 of 1
[14:23:07.979] <TB3> INFO: Expecting 5025280 events.
[14:23:33.962] <TB3> INFO: 596904 events read in total (25392ms).
[14:23:59.895] <TB3> INFO: 1196504 events read in total (51325ms).
[14:24:25.564] <TB3> INFO: 1794512 events read in total (76995ms).
[14:24:51.558] <TB3> INFO: 2393824 events read in total (102989ms).
[14:25:17.429] <TB3> INFO: 2996504 events read in total (128859ms).
[14:25:43.544] <TB3> INFO: 3602064 events read in total (154975ms).
[14:26:09.468] <TB3> INFO: 4204320 events read in total (180898ms).
[14:26:35.722] <TB3> INFO: 4806144 events read in total (207152ms).
[14:26:45.573] <TB3> INFO: 5025280 events read in total (217003ms).
[14:26:45.729] <TB3> INFO: Test took 217989ms.
[14:27:09.133] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 1.019902 .. 146.537778
[14:27:09.368] <TB3> INFO: Expecting 208000 events.
[14:27:18.516] <TB3> INFO: 208000 events read in total (8556ms).
[14:27:18.517] <TB3> INFO: Test took 9383ms.
[14:27:18.584] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 156 (-1/-1) hits flags = 528 (plus default)
[14:27:18.597] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:27:18.597] <TB3> INFO: run 1 of 1
[14:27:18.875] <TB3> INFO: Expecting 5191680 events.
[14:27:44.991] <TB3> INFO: 585992 events read in total (25525ms).
[14:28:10.294] <TB3> INFO: 1171608 events read in total (50828ms).
[14:28:35.793] <TB3> INFO: 1757464 events read in total (76327ms).
[14:29:01.085] <TB3> INFO: 2342448 events read in total (101619ms).
[14:29:26.476] <TB3> INFO: 2928072 events read in total (127010ms).
[14:29:51.849] <TB3> INFO: 3512544 events read in total (152383ms).
[14:30:17.114] <TB3> INFO: 4096664 events read in total (177648ms).
[14:30:42.468] <TB3> INFO: 4680456 events read in total (203002ms).
[14:31:05.197] <TB3> INFO: 5191680 events read in total (225731ms).
[14:31:05.299] <TB3> INFO: Test took 226703ms.
[14:31:32.267] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 26.855896 .. 49.847420
[14:31:32.538] <TB3> INFO: Expecting 208000 events.
[14:31:42.113] <TB3> INFO: 208000 events read in total (8983ms).
[14:31:42.114] <TB3> INFO: Test took 9846ms.
[14:31:42.160] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 59 (-1/-1) hits flags = 528 (plus default)
[14:31:42.169] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:31:42.169] <TB3> INFO: run 1 of 1
[14:31:42.447] <TB3> INFO: Expecting 1464320 events.
[14:32:10.126] <TB3> INFO: 657952 events read in total (27087ms).
[14:32:37.720] <TB3> INFO: 1311864 events read in total (54682ms).
[14:32:44.662] <TB3> INFO: 1464320 events read in total (61624ms).
[14:32:44.701] <TB3> INFO: Test took 62532ms.
[14:32:58.845] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 28.044466 .. 50.930072
[14:32:59.079] <TB3> INFO: Expecting 208000 events.
[14:33:08.761] <TB3> INFO: 208000 events read in total (9090ms).
[14:33:08.761] <TB3> INFO: Test took 9915ms.
[14:33:08.807] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 18 .. 60 (-1/-1) hits flags = 528 (plus default)
[14:33:08.816] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:33:08.816] <TB3> INFO: run 1 of 1
[14:33:09.094] <TB3> INFO: Expecting 1431040 events.
[14:33:36.898] <TB3> INFO: 643288 events read in total (27212ms).
[14:34:04.345] <TB3> INFO: 1283704 events read in total (54660ms).
[14:34:11.200] <TB3> INFO: 1431040 events read in total (61514ms).
[14:34:11.230] <TB3> INFO: Test took 62415ms.
[14:34:24.980] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 24.083284 .. 51.599606
[14:34:25.217] <TB3> INFO: Expecting 208000 events.
[14:34:34.754] <TB3> INFO: 208000 events read in total (8946ms).
[14:34:34.755] <TB3> INFO: Test took 9773ms.
[14:34:34.820] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 14 .. 61 (-1/-1) hits flags = 528 (plus default)
[14:34:34.832] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:34:34.832] <TB3> INFO: run 1 of 1
[14:34:35.110] <TB3> INFO: Expecting 1597440 events.
[14:35:02.513] <TB3> INFO: 651472 events read in total (26811ms).
[14:35:29.443] <TB3> INFO: 1301912 events read in total (53741ms).
[14:35:42.315] <TB3> INFO: 1597440 events read in total (66613ms).
[14:35:42.346] <TB3> INFO: Test took 67513ms.
[14:35:56.337] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[14:35:56.337] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[14:35:56.348] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:35:56.348] <TB3> INFO: run 1 of 1
[14:35:56.608] <TB3> INFO: Expecting 1364480 events.
[14:36:24.506] <TB3> INFO: 670344 events read in total (27307ms).
[14:36:52.431] <TB3> INFO: 1338168 events read in total (55231ms).
[14:36:54.010] <TB3> INFO: 1364480 events read in total (56810ms).
[14:36:54.040] <TB3> INFO: Test took 57693ms.
[14:37:07.180] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C0.dat
[14:37:07.180] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C1.dat
[14:37:07.181] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C2.dat
[14:37:07.181] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C3.dat
[14:37:07.181] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C4.dat
[14:37:07.181] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C5.dat
[14:37:07.181] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C6.dat
[14:37:07.181] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C7.dat
[14:37:07.181] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C8.dat
[14:37:07.181] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C9.dat
[14:37:07.181] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C10.dat
[14:37:07.181] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C11.dat
[14:37:07.182] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C12.dat
[14:37:07.182] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C13.dat
[14:37:07.182] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C14.dat
[14:37:07.182] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C15.dat
[14:37:07.182] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//trimParameters35_C0.dat
[14:37:07.188] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//trimParameters35_C1.dat
[14:37:07.193] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//trimParameters35_C2.dat
[14:37:07.199] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//trimParameters35_C3.dat
[14:37:07.204] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//trimParameters35_C4.dat
[14:37:07.210] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//trimParameters35_C5.dat
[14:37:07.215] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//trimParameters35_C6.dat
[14:37:07.221] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//trimParameters35_C7.dat
[14:37:07.227] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//trimParameters35_C8.dat
[14:37:07.232] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//trimParameters35_C9.dat
[14:37:07.238] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//trimParameters35_C10.dat
[14:37:07.244] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//trimParameters35_C11.dat
[14:37:07.250] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//trimParameters35_C12.dat
[14:37:07.257] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//trimParameters35_C13.dat
[14:37:07.263] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//trimParameters35_C14.dat
[14:37:07.268] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//trimParameters35_C15.dat
[14:37:07.274] <TB3> INFO: PixTestTrim::trimTest() done
[14:37:07.274] <TB3> INFO: vtrim: 164 144 148 135 145 142 145 158 157 158 132 137 134 139 143 152
[14:37:07.274] <TB3> INFO: vthrcomp: 127 133 125 120 112 125 127 127 131 130 124 123 126 128 124 118
[14:37:07.274] <TB3> INFO: vcal mean: 35.34 34.95 35.25 35.00 35.52 34.99 35.14 34.91 35.04 35.26 34.97 35.85 34.97 35.58 35.02 35.91
[14:37:07.274] <TB3> INFO: vcal RMS: 1.65 1.08 1.36 1.01 1.74 1.09 1.40 3.77 1.27 1.38 1.10 2.12 1.12 1.86 1.15 2.16
[14:37:07.274] <TB3> INFO: bits mean: 10.82 9.68 10.23 9.72 9.77 10.12 10.42 9.32 10.64 9.90 9.99 10.01 9.97 9.62 10.15 10.32
[14:37:07.274] <TB3> INFO: bits RMS: 2.21 2.58 2.32 2.47 2.45 2.37 2.46 2.77 2.25 2.33 2.54 2.59 2.55 2.70 2.34 2.39
[14:37:07.285] <TB3> INFO: ----------------------------------------------------------------------
[14:37:07.285] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[14:37:07.285] <TB3> INFO: ----------------------------------------------------------------------
[14:37:07.288] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[14:37:07.298] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:37:07.298] <TB3> INFO: run 1 of 1
[14:37:07.531] <TB3> INFO: Expecting 4160000 events.
[14:37:39.886] <TB3> INFO: 777295 events read in total (31763ms).
[14:38:11.620] <TB3> INFO: 1547290 events read in total (63497ms).
[14:38:43.538] <TB3> INFO: 2313310 events read in total (95415ms).
[14:39:15.074] <TB3> INFO: 3074255 events read in total (126951ms).
[14:39:46.659] <TB3> INFO: 3835380 events read in total (158536ms).
[14:40:00.566] <TB3> INFO: 4160000 events read in total (172443ms).
[14:40:00.618] <TB3> INFO: Test took 173320ms.
[14:40:28.466] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 215 (-1/-1) hits flags = 528 (plus default)
[14:40:28.476] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:40:28.476] <TB3> INFO: run 1 of 1
[14:40:28.708] <TB3> INFO: Expecting 4492800 events.
[14:41:00.126] <TB3> INFO: 728860 events read in total (30827ms).
[14:41:30.802] <TB3> INFO: 1453130 events read in total (61503ms).
[14:42:01.372] <TB3> INFO: 2174830 events read in total (92073ms).
[14:42:31.929] <TB3> INFO: 2892550 events read in total (122630ms).
[14:43:02.257] <TB3> INFO: 3608595 events read in total (152958ms).
[14:43:33.370] <TB3> INFO: 4326330 events read in total (184071ms).
[14:43:41.342] <TB3> INFO: 4492800 events read in total (192043ms).
[14:43:41.410] <TB3> INFO: Test took 192934ms.
[14:44:11.356] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[14:44:11.367] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:44:11.367] <TB3> INFO: run 1 of 1
[14:44:11.641] <TB3> INFO: Expecting 4243200 events.
[14:44:43.645] <TB3> INFO: 745580 events read in total (31412ms).
[14:45:14.764] <TB3> INFO: 1485390 events read in total (62531ms).
[14:45:45.886] <TB3> INFO: 2222575 events read in total (93654ms).
[14:46:16.007] <TB3> INFO: 2955075 events read in total (124774ms).
[14:46:48.101] <TB3> INFO: 3687340 events read in total (155868ms).
[14:47:12.132] <TB3> INFO: 4243200 events read in total (179899ms).
[14:47:12.183] <TB3> INFO: Test took 180816ms.
[14:47:40.509] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 202 (-1/-1) hits flags = 528 (plus default)
[14:47:40.519] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:47:40.519] <TB3> INFO: run 1 of 1
[14:47:40.753] <TB3> INFO: Expecting 4222400 events.
[14:48:12.420] <TB3> INFO: 747295 events read in total (31076ms).
[14:48:43.272] <TB3> INFO: 1488830 events read in total (61928ms).
[14:49:14.058] <TB3> INFO: 2227725 events read in total (92714ms).
[14:49:44.000] <TB3> INFO: 2961600 events read in total (123656ms).
[14:50:16.157] <TB3> INFO: 3695525 events read in total (154813ms).
[14:50:38.401] <TB3> INFO: 4222400 events read in total (177057ms).
[14:50:38.456] <TB3> INFO: Test took 177937ms.
[14:51:06.754] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[14:51:06.763] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:51:06.763] <TB3> INFO: run 1 of 1
[14:51:06.997] <TB3> INFO: Expecting 4264000 events.
[14:51:38.540] <TB3> INFO: 744595 events read in total (30952ms).
[14:52:09.827] <TB3> INFO: 1483585 events read in total (62239ms).
[14:52:40.773] <TB3> INFO: 2219975 events read in total (93185ms).
[14:53:11.992] <TB3> INFO: 2951525 events read in total (124404ms).
[14:53:43.378] <TB3> INFO: 3682885 events read in total (155790ms).
[14:54:08.175] <TB3> INFO: 4264000 events read in total (180587ms).
[14:54:08.240] <TB3> INFO: Test took 181477ms.
[14:54:35.353] <TB3> INFO: PixTestTrim::trimBitTest() done
[14:54:35.355] <TB3> INFO: PixTestTrim::doTest() done, duration: 2485 seconds
[14:54:35.355] <TB3> INFO: Decoding statistics:
[14:54:35.355] <TB3> INFO: General information:
[14:54:35.355] <TB3> INFO: 16bit words read: 0
[14:54:35.355] <TB3> INFO: valid events total: 0
[14:54:35.355] <TB3> INFO: empty events: 0
[14:54:35.355] <TB3> INFO: valid events with pixels: 0
[14:54:35.355] <TB3> INFO: valid pixel hits: 0
[14:54:35.355] <TB3> INFO: Event errors: 0
[14:54:35.355] <TB3> INFO: start marker: 0
[14:54:35.355] <TB3> INFO: stop marker: 0
[14:54:35.355] <TB3> INFO: overflow: 0
[14:54:35.355] <TB3> INFO: invalid 5bit words: 0
[14:54:35.355] <TB3> INFO: invalid XOR eye diagram: 0
[14:54:35.355] <TB3> INFO: frame (failed synchr.): 0
[14:54:35.355] <TB3> INFO: idle data (no TBM trl): 0
[14:54:35.355] <TB3> INFO: no data (only TBM hdr): 0
[14:54:35.355] <TB3> INFO: TBM errors: 0
[14:54:35.355] <TB3> INFO: flawed TBM headers: 0
[14:54:35.355] <TB3> INFO: flawed TBM trailers: 0
[14:54:35.355] <TB3> INFO: event ID mismatches: 0
[14:54:35.355] <TB3> INFO: ROC errors: 0
[14:54:35.355] <TB3> INFO: missing ROC header(s): 0
[14:54:35.355] <TB3> INFO: misplaced readback start: 0
[14:54:35.355] <TB3> INFO: Pixel decoding errors: 0
[14:54:35.355] <TB3> INFO: pixel data incomplete: 0
[14:54:35.355] <TB3> INFO: pixel address: 0
[14:54:35.355] <TB3> INFO: pulse height fill bit: 0
[14:54:35.355] <TB3> INFO: buffer corruption: 0
[14:54:36.022] <TB3> INFO: ######################################################################
[14:54:36.022] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:54:36.022] <TB3> INFO: ######################################################################
[14:54:36.268] <TB3> INFO: Expecting 41600 events.
[14:54:39.693] <TB3> INFO: 41600 events read in total (2833ms).
[14:54:39.694] <TB3> INFO: Test took 3671ms.
[14:54:40.133] <TB3> INFO: Expecting 41600 events.
[14:54:43.576] <TB3> INFO: 41600 events read in total (2851ms).
[14:54:43.576] <TB3> INFO: Test took 3679ms.
[14:54:43.865] <TB3> INFO: Expecting 41600 events.
[14:54:47.391] <TB3> INFO: 41600 events read in total (2935ms).
[14:54:47.392] <TB3> INFO: Test took 3792ms.
[14:54:47.684] <TB3> INFO: Expecting 41600 events.
[14:54:51.149] <TB3> INFO: 41600 events read in total (2874ms).
[14:54:51.150] <TB3> INFO: Test took 3732ms.
[14:54:51.438] <TB3> INFO: Expecting 41600 events.
[14:54:55.042] <TB3> INFO: 41600 events read in total (3012ms).
[14:54:55.043] <TB3> INFO: Test took 3870ms.
[14:54:55.331] <TB3> INFO: Expecting 41600 events.
[14:54:58.814] <TB3> INFO: 41600 events read in total (2891ms).
[14:54:58.815] <TB3> INFO: Test took 3748ms.
[14:54:59.103] <TB3> INFO: Expecting 41600 events.
[14:55:02.592] <TB3> INFO: 41600 events read in total (2897ms).
[14:55:02.593] <TB3> INFO: Test took 3754ms.
[14:55:02.883] <TB3> INFO: Expecting 41600 events.
[14:55:06.377] <TB3> INFO: 41600 events read in total (2903ms).
[14:55:06.378] <TB3> INFO: Test took 3760ms.
[14:55:06.667] <TB3> INFO: Expecting 41600 events.
[14:55:10.206] <TB3> INFO: 41600 events read in total (2947ms).
[14:55:10.206] <TB3> INFO: Test took 3804ms.
[14:55:10.495] <TB3> INFO: Expecting 41600 events.
[14:55:14.019] <TB3> INFO: 41600 events read in total (2933ms).
[14:55:14.020] <TB3> INFO: Test took 3790ms.
[14:55:14.310] <TB3> INFO: Expecting 41600 events.
[14:55:17.826] <TB3> INFO: 41600 events read in total (2924ms).
[14:55:17.826] <TB3> INFO: Test took 3781ms.
[14:55:18.115] <TB3> INFO: Expecting 41600 events.
[14:55:21.856] <TB3> INFO: 41600 events read in total (3150ms).
[14:55:21.857] <TB3> INFO: Test took 4007ms.
[14:55:22.146] <TB3> INFO: Expecting 41600 events.
[14:55:25.729] <TB3> INFO: 41600 events read in total (2991ms).
[14:55:25.730] <TB3> INFO: Test took 3848ms.
[14:55:26.020] <TB3> INFO: Expecting 41600 events.
[14:55:29.491] <TB3> INFO: 41600 events read in total (2879ms).
[14:55:29.491] <TB3> INFO: Test took 3735ms.
[14:55:29.799] <TB3> INFO: Expecting 41600 events.
[14:55:33.355] <TB3> INFO: 41600 events read in total (2964ms).
[14:55:33.356] <TB3> INFO: Test took 3841ms.
[14:55:33.644] <TB3> INFO: Expecting 41600 events.
[14:55:37.242] <TB3> INFO: 41600 events read in total (3006ms).
[14:55:37.243] <TB3> INFO: Test took 3864ms.
[14:55:37.531] <TB3> INFO: Expecting 41600 events.
[14:55:41.185] <TB3> INFO: 41600 events read in total (3063ms).
[14:55:41.186] <TB3> INFO: Test took 3920ms.
[14:55:41.476] <TB3> INFO: Expecting 41600 events.
[14:55:44.993] <TB3> INFO: 41600 events read in total (2925ms).
[14:55:44.993] <TB3> INFO: Test took 3782ms.
[14:55:45.282] <TB3> INFO: Expecting 41600 events.
[14:55:48.846] <TB3> INFO: 41600 events read in total (2972ms).
[14:55:48.847] <TB3> INFO: Test took 3830ms.
[14:55:49.136] <TB3> INFO: Expecting 41600 events.
[14:55:52.670] <TB3> INFO: 41600 events read in total (2943ms).
[14:55:52.671] <TB3> INFO: Test took 3800ms.
[14:55:52.959] <TB3> INFO: Expecting 41600 events.
[14:55:56.439] <TB3> INFO: 41600 events read in total (2888ms).
[14:55:56.439] <TB3> INFO: Test took 3745ms.
[14:55:56.728] <TB3> INFO: Expecting 41600 events.
[14:56:00.251] <TB3> INFO: 41600 events read in total (2932ms).
[14:56:00.251] <TB3> INFO: Test took 3789ms.
[14:56:00.540] <TB3> INFO: Expecting 41600 events.
[14:56:04.060] <TB3> INFO: 41600 events read in total (2928ms).
[14:56:04.060] <TB3> INFO: Test took 3785ms.
[14:56:04.349] <TB3> INFO: Expecting 41600 events.
[14:56:07.912] <TB3> INFO: 41600 events read in total (2971ms).
[14:56:07.912] <TB3> INFO: Test took 3828ms.
[14:56:08.200] <TB3> INFO: Expecting 41600 events.
[14:56:11.665] <TB3> INFO: 41600 events read in total (2873ms).
[14:56:11.665] <TB3> INFO: Test took 3729ms.
[14:56:11.954] <TB3> INFO: Expecting 41600 events.
[14:56:15.481] <TB3> INFO: 41600 events read in total (2936ms).
[14:56:15.482] <TB3> INFO: Test took 3793ms.
[14:56:15.773] <TB3> INFO: Expecting 41600 events.
[14:56:19.280] <TB3> INFO: 41600 events read in total (2915ms).
[14:56:19.280] <TB3> INFO: Test took 3772ms.
[14:56:19.570] <TB3> INFO: Expecting 41600 events.
[14:56:23.115] <TB3> INFO: 41600 events read in total (2953ms).
[14:56:23.116] <TB3> INFO: Test took 3811ms.
[14:56:23.405] <TB3> INFO: Expecting 2560 events.
[14:56:24.288] <TB3> INFO: 2560 events read in total (292ms).
[14:56:24.288] <TB3> INFO: Test took 1160ms.
[14:56:24.596] <TB3> INFO: Expecting 2560 events.
[14:56:25.479] <TB3> INFO: 2560 events read in total (291ms).
[14:56:25.480] <TB3> INFO: Test took 1190ms.
[14:56:25.787] <TB3> INFO: Expecting 2560 events.
[14:56:26.672] <TB3> INFO: 2560 events read in total (293ms).
[14:56:26.673] <TB3> INFO: Test took 1193ms.
[14:56:26.980] <TB3> INFO: Expecting 2560 events.
[14:56:27.867] <TB3> INFO: 2560 events read in total (295ms).
[14:56:27.867] <TB3> INFO: Test took 1194ms.
[14:56:28.175] <TB3> INFO: Expecting 2560 events.
[14:56:29.053] <TB3> INFO: 2560 events read in total (287ms).
[14:56:29.053] <TB3> INFO: Test took 1185ms.
[14:56:29.362] <TB3> INFO: Expecting 2560 events.
[14:56:30.243] <TB3> INFO: 2560 events read in total (290ms).
[14:56:30.243] <TB3> INFO: Test took 1189ms.
[14:56:30.551] <TB3> INFO: Expecting 2560 events.
[14:56:31.435] <TB3> INFO: 2560 events read in total (293ms).
[14:56:31.435] <TB3> INFO: Test took 1192ms.
[14:56:31.743] <TB3> INFO: Expecting 2560 events.
[14:56:32.623] <TB3> INFO: 2560 events read in total (289ms).
[14:56:32.623] <TB3> INFO: Test took 1187ms.
[14:56:32.931] <TB3> INFO: Expecting 2560 events.
[14:56:33.810] <TB3> INFO: 2560 events read in total (287ms).
[14:56:33.810] <TB3> INFO: Test took 1186ms.
[14:56:34.118] <TB3> INFO: Expecting 2560 events.
[14:56:34.000] <TB3> INFO: 2560 events read in total (291ms).
[14:56:34.000] <TB3> INFO: Test took 1190ms.
[14:56:35.308] <TB3> INFO: Expecting 2560 events.
[14:56:36.188] <TB3> INFO: 2560 events read in total (288ms).
[14:56:36.188] <TB3> INFO: Test took 1187ms.
[14:56:36.496] <TB3> INFO: Expecting 2560 events.
[14:56:37.374] <TB3> INFO: 2560 events read in total (286ms).
[14:56:37.374] <TB3> INFO: Test took 1186ms.
[14:56:37.682] <TB3> INFO: Expecting 2560 events.
[14:56:38.566] <TB3> INFO: 2560 events read in total (292ms).
[14:56:38.566] <TB3> INFO: Test took 1191ms.
[14:56:38.874] <TB3> INFO: Expecting 2560 events.
[14:56:39.758] <TB3> INFO: 2560 events read in total (293ms).
[14:56:39.758] <TB3> INFO: Test took 1192ms.
[14:56:40.066] <TB3> INFO: Expecting 2560 events.
[14:56:40.949] <TB3> INFO: 2560 events read in total (292ms).
[14:56:40.949] <TB3> INFO: Test took 1191ms.
[14:56:41.257] <TB3> INFO: Expecting 2560 events.
[14:56:42.143] <TB3> INFO: 2560 events read in total (294ms).
[14:56:42.143] <TB3> INFO: Test took 1193ms.
[14:56:42.146] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:56:42.452] <TB3> INFO: Expecting 655360 events.
[14:56:56.872] <TB3> INFO: 655360 events read in total (13829ms).
[14:56:56.882] <TB3> INFO: Expecting 655360 events.
[14:57:10.998] <TB3> INFO: 655360 events read in total (13713ms).
[14:57:11.013] <TB3> INFO: Expecting 655360 events.
[14:57:25.184] <TB3> INFO: 655360 events read in total (13768ms).
[14:57:25.203] <TB3> INFO: Expecting 655360 events.
[14:57:39.260] <TB3> INFO: 655360 events read in total (13654ms).
[14:57:39.292] <TB3> INFO: Expecting 655360 events.
[14:57:53.362] <TB3> INFO: 655360 events read in total (13667ms).
[14:57:53.389] <TB3> INFO: Expecting 655360 events.
[14:58:07.465] <TB3> INFO: 655360 events read in total (13673ms).
[14:58:07.497] <TB3> INFO: Expecting 655360 events.
[14:58:21.540] <TB3> INFO: 655360 events read in total (13640ms).
[14:58:21.589] <TB3> INFO: Expecting 655360 events.
[14:58:35.620] <TB3> INFO: 655360 events read in total (13628ms).
[14:58:35.673] <TB3> INFO: Expecting 655360 events.
[14:58:49.706] <TB3> INFO: 655360 events read in total (13627ms).
[14:58:49.762] <TB3> INFO: Expecting 655360 events.
[14:59:03.710] <TB3> INFO: 655360 events read in total (13545ms).
[14:59:03.777] <TB3> INFO: Expecting 655360 events.
[14:59:17.783] <TB3> INFO: 655360 events read in total (13603ms).
[14:59:17.851] <TB3> INFO: Expecting 655360 events.
[14:59:31.982] <TB3> INFO: 655360 events read in total (13728ms).
[14:59:32.060] <TB3> INFO: Expecting 655360 events.
[14:59:46.228] <TB3> INFO: 655360 events read in total (13765ms).
[14:59:46.286] <TB3> INFO: Expecting 655360 events.
[15:00:00.385] <TB3> INFO: 655360 events read in total (13696ms).
[15:00:00.460] <TB3> INFO: Expecting 655360 events.
[15:00:14.608] <TB3> INFO: 655360 events read in total (13745ms).
[15:00:14.698] <TB3> INFO: Expecting 655360 events.
[15:00:28.701] <TB3> INFO: 655360 events read in total (13600ms).
[15:00:28.800] <TB3> INFO: Test took 226654ms.
[15:00:28.896] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:00:29.161] <TB3> INFO: Expecting 655360 events.
[15:00:43.282] <TB3> INFO: 655360 events read in total (13530ms).
[15:00:43.295] <TB3> INFO: Expecting 655360 events.
[15:00:57.216] <TB3> INFO: 655360 events read in total (13518ms).
[15:00:57.232] <TB3> INFO: Expecting 655360 events.
[15:01:11.229] <TB3> INFO: 655360 events read in total (13594ms).
[15:01:11.248] <TB3> INFO: Expecting 655360 events.
[15:01:25.294] <TB3> INFO: 655360 events read in total (13643ms).
[15:01:25.317] <TB3> INFO: Expecting 655360 events.
[15:01:39.135] <TB3> INFO: 655360 events read in total (13415ms).
[15:01:39.160] <TB3> INFO: Expecting 655360 events.
[15:01:53.016] <TB3> INFO: 655360 events read in total (13453ms).
[15:01:53.050] <TB3> INFO: Expecting 655360 events.
[15:02:07.037] <TB3> INFO: 655360 events read in total (13584ms).
[15:02:07.073] <TB3> INFO: Expecting 655360 events.
[15:02:20.716] <TB3> INFO: 655360 events read in total (13240ms).
[15:02:20.755] <TB3> INFO: Expecting 655360 events.
[15:02:34.737] <TB3> INFO: 655360 events read in total (13579ms).
[15:02:34.789] <TB3> INFO: Expecting 655360 events.
[15:02:48.512] <TB3> INFO: 655360 events read in total (13320ms).
[15:02:48.561] <TB3> INFO: Expecting 655360 events.
[15:03:02.614] <TB3> INFO: 655360 events read in total (13650ms).
[15:03:02.681] <TB3> INFO: Expecting 655360 events.
[15:03:16.608] <TB3> INFO: 655360 events read in total (13524ms).
[15:03:16.666] <TB3> INFO: Expecting 655360 events.
[15:03:30.721] <TB3> INFO: 655360 events read in total (13652ms).
[15:03:30.804] <TB3> INFO: Expecting 655360 events.
[15:03:44.789] <TB3> INFO: 655360 events read in total (13582ms).
[15:03:44.856] <TB3> INFO: Expecting 655360 events.
[15:03:58.730] <TB3> INFO: 655360 events read in total (13471ms).
[15:03:58.820] <TB3> INFO: Expecting 655360 events.
[15:04:12.541] <TB3> INFO: 655360 events read in total (13318ms).
[15:04:12.640] <TB3> INFO: Test took 223744ms.
[15:04:12.829] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:04:12.834] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:04:12.839] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:04:12.843] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:04:12.848] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:04:12.854] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:04:12.861] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[15:04:12.868] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[15:04:12.874] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[15:04:12.882] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[15:04:12.890] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[15:04:12.896] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[15:04:12.901] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[15:04:12.906] <TB3> INFO: safety margin for low PH: adding 10, margin is now 30
[15:04:12.913] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:04:12.921] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:04:12.926] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:04:12.932] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:04:12.937] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:04:12.945] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:04:12.954] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[15:04:12.961] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[15:04:12.967] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[15:04:12.974] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[15:04:12.983] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[15:04:12.989] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:04:12.996] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:04:12.003] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:04:13.009] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:04:13.016] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[15:04:13.024] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[15:04:13.031] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:04:13.038] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:04:13.045] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:04:13.052] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:04:13.060] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:04:13.067] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:04:13.074] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:04:13.080] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:04:13.088] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[15:04:13.095] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[15:04:13.101] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:04:13.108] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:04:13.115] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:04:13.122] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[15:04:13.129] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[15:04:13.136] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[15:04:13.143] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:04:13.151] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:04:13.158] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:04:13.164] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[15:04:13.171] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:04:13.178] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:04:13.184] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:04:13.192] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:04:13.198] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:04:13.232] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C0.dat
[15:04:13.232] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C1.dat
[15:04:13.232] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C2.dat
[15:04:13.232] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C3.dat
[15:04:13.232] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C4.dat
[15:04:13.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C5.dat
[15:04:13.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C6.dat
[15:04:13.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C7.dat
[15:04:13.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C8.dat
[15:04:13.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C9.dat
[15:04:13.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C10.dat
[15:04:13.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C11.dat
[15:04:13.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C12.dat
[15:04:13.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C13.dat
[15:04:13.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C14.dat
[15:04:13.234] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//dacParameters35_C15.dat
[15:04:13.487] <TB3> INFO: Expecting 41600 events.
[15:04:16.573] <TB3> INFO: 41600 events read in total (2494ms).
[15:04:16.574] <TB3> INFO: Test took 3338ms.
[15:04:17.027] <TB3> INFO: Expecting 41600 events.
[15:04:20.026] <TB3> INFO: 41600 events read in total (2407ms).
[15:04:20.027] <TB3> INFO: Test took 3243ms.
[15:04:20.504] <TB3> INFO: Expecting 41600 events.
[15:04:23.573] <TB3> INFO: 41600 events read in total (2477ms).
[15:04:23.574] <TB3> INFO: Test took 3337ms.
[15:04:23.788] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:23.876] <TB3> INFO: Expecting 2560 events.
[15:04:24.763] <TB3> INFO: 2560 events read in total (295ms).
[15:04:24.763] <TB3> INFO: Test took 975ms.
[15:04:24.765] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:25.071] <TB3> INFO: Expecting 2560 events.
[15:04:25.957] <TB3> INFO: 2560 events read in total (294ms).
[15:04:25.957] <TB3> INFO: Test took 1192ms.
[15:04:25.959] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:26.266] <TB3> INFO: Expecting 2560 events.
[15:04:27.151] <TB3> INFO: 2560 events read in total (294ms).
[15:04:27.151] <TB3> INFO: Test took 1192ms.
[15:04:27.153] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:27.459] <TB3> INFO: Expecting 2560 events.
[15:04:28.341] <TB3> INFO: 2560 events read in total (290ms).
[15:04:28.342] <TB3> INFO: Test took 1189ms.
[15:04:28.343] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:28.650] <TB3> INFO: Expecting 2560 events.
[15:04:29.533] <TB3> INFO: 2560 events read in total (291ms).
[15:04:29.533] <TB3> INFO: Test took 1190ms.
[15:04:29.535] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:29.842] <TB3> INFO: Expecting 2560 events.
[15:04:30.725] <TB3> INFO: 2560 events read in total (291ms).
[15:04:30.725] <TB3> INFO: Test took 1190ms.
[15:04:30.727] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:31.034] <TB3> INFO: Expecting 2560 events.
[15:04:31.918] <TB3> INFO: 2560 events read in total (292ms).
[15:04:31.918] <TB3> INFO: Test took 1191ms.
[15:04:31.920] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:32.227] <TB3> INFO: Expecting 2560 events.
[15:04:33.109] <TB3> INFO: 2560 events read in total (291ms).
[15:04:33.109] <TB3> INFO: Test took 1189ms.
[15:04:33.111] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:33.418] <TB3> INFO: Expecting 2560 events.
[15:04:34.303] <TB3> INFO: 2560 events read in total (293ms).
[15:04:34.303] <TB3> INFO: Test took 1192ms.
[15:04:34.305] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:34.611] <TB3> INFO: Expecting 2560 events.
[15:04:35.490] <TB3> INFO: 2560 events read in total (287ms).
[15:04:35.491] <TB3> INFO: Test took 1186ms.
[15:04:35.492] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:35.799] <TB3> INFO: Expecting 2560 events.
[15:04:36.679] <TB3> INFO: 2560 events read in total (288ms).
[15:04:36.680] <TB3> INFO: Test took 1188ms.
[15:04:36.682] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:36.988] <TB3> INFO: Expecting 2560 events.
[15:04:37.866] <TB3> INFO: 2560 events read in total (286ms).
[15:04:37.866] <TB3> INFO: Test took 1184ms.
[15:04:37.868] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:38.175] <TB3> INFO: Expecting 2560 events.
[15:04:39.055] <TB3> INFO: 2560 events read in total (289ms).
[15:04:39.055] <TB3> INFO: Test took 1187ms.
[15:04:39.057] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:39.363] <TB3> INFO: Expecting 2560 events.
[15:04:40.242] <TB3> INFO: 2560 events read in total (287ms).
[15:04:40.242] <TB3> INFO: Test took 1185ms.
[15:04:40.244] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:40.551] <TB3> INFO: Expecting 2560 events.
[15:04:41.431] <TB3> INFO: 2560 events read in total (289ms).
[15:04:41.431] <TB3> INFO: Test took 1187ms.
[15:04:41.433] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:41.739] <TB3> INFO: Expecting 2560 events.
[15:04:42.621] <TB3> INFO: 2560 events read in total (290ms).
[15:04:42.622] <TB3> INFO: Test took 1189ms.
[15:04:42.624] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:42.930] <TB3> INFO: Expecting 2560 events.
[15:04:43.816] <TB3> INFO: 2560 events read in total (294ms).
[15:04:43.816] <TB3> INFO: Test took 1192ms.
[15:04:43.820] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:44.124] <TB3> INFO: Expecting 2560 events.
[15:04:45.008] <TB3> INFO: 2560 events read in total (292ms).
[15:04:45.008] <TB3> INFO: Test took 1189ms.
[15:04:45.011] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:45.318] <TB3> INFO: Expecting 2560 events.
[15:04:46.202] <TB3> INFO: 2560 events read in total (292ms).
[15:04:46.202] <TB3> INFO: Test took 1191ms.
[15:04:46.205] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:46.510] <TB3> INFO: Expecting 2560 events.
[15:04:47.389] <TB3> INFO: 2560 events read in total (287ms).
[15:04:47.389] <TB3> INFO: Test took 1184ms.
[15:04:47.391] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:47.697] <TB3> INFO: Expecting 2560 events.
[15:04:48.576] <TB3> INFO: 2560 events read in total (287ms).
[15:04:48.576] <TB3> INFO: Test took 1185ms.
[15:04:48.578] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:48.885] <TB3> INFO: Expecting 2560 events.
[15:04:49.766] <TB3> INFO: 2560 events read in total (290ms).
[15:04:49.766] <TB3> INFO: Test took 1188ms.
[15:04:49.768] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:50.074] <TB3> INFO: Expecting 2560 events.
[15:04:50.955] <TB3> INFO: 2560 events read in total (289ms).
[15:04:50.955] <TB3> INFO: Test took 1187ms.
[15:04:50.958] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:51.264] <TB3> INFO: Expecting 2560 events.
[15:04:52.142] <TB3> INFO: 2560 events read in total (287ms).
[15:04:52.142] <TB3> INFO: Test took 1185ms.
[15:04:52.144] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:52.451] <TB3> INFO: Expecting 2560 events.
[15:04:53.337] <TB3> INFO: 2560 events read in total (295ms).
[15:04:53.337] <TB3> INFO: Test took 1193ms.
[15:04:53.339] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:53.645] <TB3> INFO: Expecting 2560 events.
[15:04:54.529] <TB3> INFO: 2560 events read in total (292ms).
[15:04:54.529] <TB3> INFO: Test took 1190ms.
[15:04:54.531] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:54.837] <TB3> INFO: Expecting 2560 events.
[15:04:55.720] <TB3> INFO: 2560 events read in total (291ms).
[15:04:55.720] <TB3> INFO: Test took 1189ms.
[15:04:55.722] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:56.028] <TB3> INFO: Expecting 2560 events.
[15:04:56.911] <TB3> INFO: 2560 events read in total (291ms).
[15:04:56.911] <TB3> INFO: Test took 1189ms.
[15:04:56.913] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:57.220] <TB3> INFO: Expecting 2560 events.
[15:04:58.103] <TB3> INFO: 2560 events read in total (291ms).
[15:04:58.104] <TB3> INFO: Test took 1191ms.
[15:04:58.107] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:58.412] <TB3> INFO: Expecting 2560 events.
[15:04:59.294] <TB3> INFO: 2560 events read in total (290ms).
[15:04:59.295] <TB3> INFO: Test took 1189ms.
[15:04:59.297] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:59.603] <TB3> INFO: Expecting 2560 events.
[15:05:00.497] <TB3> INFO: 2560 events read in total (298ms).
[15:05:00.497] <TB3> INFO: Test took 1200ms.
[15:05:00.499] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:05:00.805] <TB3> INFO: Expecting 2560 events.
[15:05:01.691] <TB3> INFO: 2560 events read in total (294ms).
[15:05:01.691] <TB3> INFO: Test took 1192ms.
[15:05:02.157] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 626 seconds
[15:05:02.157] <TB3> INFO: PH scale (per ROC): 41 44 49 35 30 49 34 52 38 33 36 27 54 30 41 35
[15:05:02.157] <TB3> INFO: PH offset (per ROC): 101 103 112 98 99 114 93 117 106 96 103 97 129 117 94 91
[15:05:02.163] <TB3> INFO: Decoding statistics:
[15:05:02.163] <TB3> INFO: General information:
[15:05:02.163] <TB3> INFO: 16bit words read: 127868
[15:05:02.163] <TB3> INFO: valid events total: 20480
[15:05:02.163] <TB3> INFO: empty events: 17986
[15:05:02.163] <TB3> INFO: valid events with pixels: 2494
[15:05:02.163] <TB3> INFO: valid pixel hits: 2494
[15:05:02.163] <TB3> INFO: Event errors: 0
[15:05:02.163] <TB3> INFO: start marker: 0
[15:05:02.163] <TB3> INFO: stop marker: 0
[15:05:02.163] <TB3> INFO: overflow: 0
[15:05:02.163] <TB3> INFO: invalid 5bit words: 0
[15:05:02.163] <TB3> INFO: invalid XOR eye diagram: 0
[15:05:02.163] <TB3> INFO: frame (failed synchr.): 0
[15:05:02.163] <TB3> INFO: idle data (no TBM trl): 0
[15:05:02.163] <TB3> INFO: no data (only TBM hdr): 0
[15:05:02.163] <TB3> INFO: TBM errors: 0
[15:05:02.163] <TB3> INFO: flawed TBM headers: 0
[15:05:02.163] <TB3> INFO: flawed TBM trailers: 0
[15:05:02.163] <TB3> INFO: event ID mismatches: 0
[15:05:02.163] <TB3> INFO: ROC errors: 0
[15:05:02.163] <TB3> INFO: missing ROC header(s): 0
[15:05:02.163] <TB3> INFO: misplaced readback start: 0
[15:05:02.163] <TB3> INFO: Pixel decoding errors: 0
[15:05:02.163] <TB3> INFO: pixel data incomplete: 0
[15:05:02.163] <TB3> INFO: pixel address: 0
[15:05:02.163] <TB3> INFO: pulse height fill bit: 0
[15:05:02.163] <TB3> INFO: buffer corruption: 0
[15:05:02.439] <TB3> INFO: ######################################################################
[15:05:02.439] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[15:05:02.439] <TB3> INFO: ######################################################################
[15:05:02.454] <TB3> INFO: scanning low vcal = 10
[15:05:02.693] <TB3> INFO: Expecting 41600 events.
[15:05:06.259] <TB3> INFO: 41600 events read in total (2975ms).
[15:05:06.259] <TB3> INFO: Test took 3805ms.
[15:05:06.261] <TB3> INFO: scanning low vcal = 20
[15:05:06.560] <TB3> INFO: Expecting 41600 events.
[15:05:10.164] <TB3> INFO: 41600 events read in total (3012ms).
[15:05:10.164] <TB3> INFO: Test took 3903ms.
[15:05:10.166] <TB3> INFO: scanning low vcal = 30
[15:05:10.465] <TB3> INFO: Expecting 41600 events.
[15:05:14.131] <TB3> INFO: 41600 events read in total (3075ms).
[15:05:14.132] <TB3> INFO: Test took 3966ms.
[15:05:14.134] <TB3> INFO: scanning low vcal = 40
[15:05:14.413] <TB3> INFO: Expecting 41600 events.
[15:05:18.383] <TB3> INFO: 41600 events read in total (3378ms).
[15:05:18.384] <TB3> INFO: Test took 4250ms.
[15:05:18.387] <TB3> INFO: scanning low vcal = 50
[15:05:18.663] <TB3> INFO: Expecting 41600 events.
[15:05:22.688] <TB3> INFO: 41600 events read in total (3433ms).
[15:05:22.689] <TB3> INFO: Test took 4302ms.
[15:05:22.692] <TB3> INFO: scanning low vcal = 60
[15:05:22.968] <TB3> INFO: Expecting 41600 events.
[15:05:26.969] <TB3> INFO: 41600 events read in total (3409ms).
[15:05:26.969] <TB3> INFO: Test took 4277ms.
[15:05:26.972] <TB3> INFO: scanning low vcal = 70
[15:05:27.249] <TB3> INFO: Expecting 41600 events.
[15:05:31.236] <TB3> INFO: 41600 events read in total (3396ms).
[15:05:31.237] <TB3> INFO: Test took 4265ms.
[15:05:31.240] <TB3> INFO: scanning low vcal = 80
[15:05:31.530] <TB3> INFO: Expecting 41600 events.
[15:05:35.485] <TB3> INFO: 41600 events read in total (3364ms).
[15:05:35.486] <TB3> INFO: Test took 4246ms.
[15:05:35.488] <TB3> INFO: scanning low vcal = 90
[15:05:35.765] <TB3> INFO: Expecting 41600 events.
[15:05:39.758] <TB3> INFO: 41600 events read in total (3401ms).
[15:05:39.759] <TB3> INFO: Test took 4271ms.
[15:05:39.761] <TB3> INFO: scanning low vcal = 100
[15:05:40.054] <TB3> INFO: Expecting 41600 events.
[15:05:44.032] <TB3> INFO: 41600 events read in total (3386ms).
[15:05:44.033] <TB3> INFO: Test took 4271ms.
[15:05:44.035] <TB3> INFO: scanning low vcal = 110
[15:05:44.312] <TB3> INFO: Expecting 41600 events.
[15:05:48.345] <TB3> INFO: 41600 events read in total (3441ms).
[15:05:48.346] <TB3> INFO: Test took 4310ms.
[15:05:48.349] <TB3> INFO: scanning low vcal = 120
[15:05:48.646] <TB3> INFO: Expecting 41600 events.
[15:05:52.606] <TB3> INFO: 41600 events read in total (3369ms).
[15:05:52.606] <TB3> INFO: Test took 4257ms.
[15:05:52.609] <TB3> INFO: scanning low vcal = 130
[15:05:52.886] <TB3> INFO: Expecting 41600 events.
[15:05:56.864] <TB3> INFO: 41600 events read in total (3387ms).
[15:05:56.865] <TB3> INFO: Test took 4256ms.
[15:05:56.868] <TB3> INFO: scanning low vcal = 140
[15:05:57.158] <TB3> INFO: Expecting 41600 events.
[15:06:01.182] <TB3> INFO: 41600 events read in total (3432ms).
[15:06:01.183] <TB3> INFO: Test took 4315ms.
[15:06:01.186] <TB3> INFO: scanning low vcal = 150
[15:06:01.462] <TB3> INFO: Expecting 41600 events.
[15:06:05.424] <TB3> INFO: 41600 events read in total (3370ms).
[15:06:05.425] <TB3> INFO: Test took 4239ms.
[15:06:05.428] <TB3> INFO: scanning low vcal = 160
[15:06:05.704] <TB3> INFO: Expecting 41600 events.
[15:06:09.749] <TB3> INFO: 41600 events read in total (3453ms).
[15:06:09.750] <TB3> INFO: Test took 4322ms.
[15:06:09.753] <TB3> INFO: scanning low vcal = 170
[15:06:10.035] <TB3> INFO: Expecting 41600 events.
[15:06:14.018] <TB3> INFO: 41600 events read in total (3391ms).
[15:06:14.019] <TB3> INFO: Test took 4266ms.
[15:06:14.022] <TB3> INFO: scanning low vcal = 180
[15:06:14.298] <TB3> INFO: Expecting 41600 events.
[15:06:18.347] <TB3> INFO: 41600 events read in total (3457ms).
[15:06:18.347] <TB3> INFO: Test took 4325ms.
[15:06:18.350] <TB3> INFO: scanning low vcal = 190
[15:06:18.627] <TB3> INFO: Expecting 41600 events.
[15:06:22.608] <TB3> INFO: 41600 events read in total (3390ms).
[15:06:22.609] <TB3> INFO: Test took 4259ms.
[15:06:22.611] <TB3> INFO: scanning low vcal = 200
[15:06:22.888] <TB3> INFO: Expecting 41600 events.
[15:06:26.844] <TB3> INFO: 41600 events read in total (3364ms).
[15:06:26.845] <TB3> INFO: Test took 4233ms.
[15:06:26.847] <TB3> INFO: scanning low vcal = 210
[15:06:27.124] <TB3> INFO: Expecting 41600 events.
[15:06:31.152] <TB3> INFO: 41600 events read in total (3436ms).
[15:06:31.153] <TB3> INFO: Test took 4306ms.
[15:06:31.156] <TB3> INFO: scanning low vcal = 220
[15:06:31.452] <TB3> INFO: Expecting 41600 events.
[15:06:35.434] <TB3> INFO: 41600 events read in total (3391ms).
[15:06:35.435] <TB3> INFO: Test took 4279ms.
[15:06:35.438] <TB3> INFO: scanning low vcal = 230
[15:06:35.714] <TB3> INFO: Expecting 41600 events.
[15:06:39.680] <TB3> INFO: 41600 events read in total (3374ms).
[15:06:39.680] <TB3> INFO: Test took 4242ms.
[15:06:39.683] <TB3> INFO: scanning low vcal = 240
[15:06:39.975] <TB3> INFO: Expecting 41600 events.
[15:06:43.993] <TB3> INFO: 41600 events read in total (3426ms).
[15:06:43.994] <TB3> INFO: Test took 4311ms.
[15:06:43.997] <TB3> INFO: scanning low vcal = 250
[15:06:44.273] <TB3> INFO: Expecting 41600 events.
[15:06:48.276] <TB3> INFO: 41600 events read in total (3411ms).
[15:06:48.277] <TB3> INFO: Test took 4280ms.
[15:06:48.281] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[15:06:48.557] <TB3> INFO: Expecting 41600 events.
[15:06:52.540] <TB3> INFO: 41600 events read in total (3392ms).
[15:06:52.541] <TB3> INFO: Test took 4260ms.
[15:06:52.543] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[15:06:52.820] <TB3> INFO: Expecting 41600 events.
[15:06:56.865] <TB3> INFO: 41600 events read in total (3453ms).
[15:06:56.866] <TB3> INFO: Test took 4323ms.
[15:06:56.869] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[15:06:57.145] <TB3> INFO: Expecting 41600 events.
[15:07:01.132] <TB3> INFO: 41600 events read in total (3395ms).
[15:07:01.132] <TB3> INFO: Test took 4263ms.
[15:07:01.135] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[15:07:01.412] <TB3> INFO: Expecting 41600 events.
[15:07:05.359] <TB3> INFO: 41600 events read in total (3356ms).
[15:07:05.360] <TB3> INFO: Test took 4225ms.
[15:07:05.363] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[15:07:05.639] <TB3> INFO: Expecting 41600 events.
[15:07:09.683] <TB3> INFO: 41600 events read in total (3452ms).
[15:07:09.684] <TB3> INFO: Test took 4321ms.
[15:07:10.197] <TB3> INFO: PixTestGainPedestal::measure() done
[15:07:45.199] <TB3> INFO: PixTestGainPedestal::fit() done
[15:07:45.199] <TB3> INFO: non-linearity mean: 0.936 0.938 0.978 0.927 0.940 0.981 0.964 0.984 0.944 0.953 0.927 1.029 0.981 0.950 0.942 0.953
[15:07:45.199] <TB3> INFO: non-linearity RMS: 0.091 0.127 0.006 0.093 0.157 0.003 0.161 0.022 0.067 0.164 0.172 0.167 0.004 0.172 0.065 0.033
[15:07:45.199] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//phCalibrationFitErr35_C0.dat
[15:07:45.213] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//phCalibrationFitErr35_C1.dat
[15:07:45.227] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//phCalibrationFitErr35_C2.dat
[15:07:45.241] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//phCalibrationFitErr35_C3.dat
[15:07:45.255] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//phCalibrationFitErr35_C4.dat
[15:07:45.269] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//phCalibrationFitErr35_C5.dat
[15:07:45.283] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//phCalibrationFitErr35_C6.dat
[15:07:45.297] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//phCalibrationFitErr35_C7.dat
[15:07:45.311] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//phCalibrationFitErr35_C8.dat
[15:07:45.325] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//phCalibrationFitErr35_C9.dat
[15:07:45.339] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//phCalibrationFitErr35_C10.dat
[15:07:45.354] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//phCalibrationFitErr35_C11.dat
[15:07:45.368] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//phCalibrationFitErr35_C12.dat
[15:07:45.382] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//phCalibrationFitErr35_C13.dat
[15:07:45.396] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//phCalibrationFitErr35_C14.dat
[15:07:45.411] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//003_Fulltest_p17//phCalibrationFitErr35_C15.dat
[15:07:45.425] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 162 seconds
[15:07:45.425] <TB3> INFO: Decoding statistics:
[15:07:45.425] <TB3> INFO: General information:
[15:07:45.425] <TB3> INFO: 16bit words read: 3308762
[15:07:45.425] <TB3> INFO: valid events total: 332800
[15:07:45.425] <TB3> INFO: empty events: 89
[15:07:45.425] <TB3> INFO: valid events with pixels: 332711
[15:07:45.425] <TB3> INFO: valid pixel hits: 655971
[15:07:45.425] <TB3> INFO: Event errors: 0
[15:07:45.425] <TB3> INFO: start marker: 0
[15:07:45.425] <TB3> INFO: stop marker: 0
[15:07:45.425] <TB3> INFO: overflow: 0
[15:07:45.425] <TB3> INFO: invalid 5bit words: 0
[15:07:45.425] <TB3> INFO: invalid XOR eye diagram: 0
[15:07:45.425] <TB3> INFO: frame (failed synchr.): 0
[15:07:45.425] <TB3> INFO: idle data (no TBM trl): 0
[15:07:45.425] <TB3> INFO: no data (only TBM hdr): 0
[15:07:45.425] <TB3> INFO: TBM errors: 0
[15:07:45.425] <TB3> INFO: flawed TBM headers: 0
[15:07:45.425] <TB3> INFO: flawed TBM trailers: 0
[15:07:45.425] <TB3> INFO: event ID mismatches: 0
[15:07:45.425] <TB3> INFO: ROC errors: 0
[15:07:45.425] <TB3> INFO: missing ROC header(s): 0
[15:07:45.425] <TB3> INFO: misplaced readback start: 0
[15:07:45.425] <TB3> INFO: Pixel decoding errors: 10
[15:07:45.425] <TB3> INFO: pixel data incomplete: 0
[15:07:45.425] <TB3> INFO: pixel address: 0
[15:07:45.425] <TB3> INFO: pulse height fill bit: 0
[15:07:45.425] <TB3> INFO: buffer corruption: 10