[12:00:47.003] <TB3> INFO: *** Welcome to pxar ***
[12:00:47.003] <TB3> INFO: *** Today: 2016/10/25
[12:00:48.008] <TB3> INFO: *** Version: c8ba-dirty
[12:00:48.008] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters_C15.dat
[12:00:48.009] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//tbmParameters_C1b.dat
[12:00:48.009] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//defaultMaskFile.dat
[12:00:48.009] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//trimParameters_C15.dat
[12:00:48.063] <TB3> INFO: clk: 4
[12:00:48.063] <TB3> INFO: ctr: 4
[12:00:48.063] <TB3> INFO: sda: 19
[12:00:48.063] <TB3> INFO: tin: 9
[12:00:48.063] <TB3> INFO: level: 15
[12:00:48.063] <TB3> INFO: triggerdelay: 0
[12:00:48.064] <TB3> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[12:00:48.064] <TB3> INFO: Log level: INFO
[12:00:48.073] <TB3> INFO: Found DTB DTB_WZ4I6J
[12:00:48.081] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[12:00:48.083] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[12:00:48.085] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[12:00:49.568] <TB3> INFO: DUT info:
[12:00:49.568] <TB3> INFO: The DUT currently contains the following objects:
[12:00:49.568] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[12:00:49.568] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:00:49.568] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:00:49.568] <TB3> INFO: TBM Core alpha (2): 7 registers set
[12:00:49.568] <TB3> INFO: TBM Core beta (3): 7 registers set
[12:00:49.568] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[12:00:49.568] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:00:49.568] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:00:49.568] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:00:49.568] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:00:49.568] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:00:49.568] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:00:49.568] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:00:49.568] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:00:49.568] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:00:49.568] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:00:49.568] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:00:49.568] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:00:49.568] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:00:49.568] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:00:49.568] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:00:49.568] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:00:49.969] <TB3> INFO: enter 'restricted' command line mode
[12:00:49.969] <TB3> INFO: enter test to run
[12:00:49.969] <TB3> INFO: test: pretest no parameter change
[12:00:49.969] <TB3> INFO: running: pretest
[12:00:50.544] <TB3> INFO: ######################################################################
[12:00:50.544] <TB3> INFO: PixTestPretest::doTest()
[12:00:50.544] <TB3> INFO: ######################################################################
[12:00:50.545] <TB3> INFO: ----------------------------------------------------------------------
[12:00:50.545] <TB3> INFO: PixTestPretest::programROC()
[12:00:50.545] <TB3> INFO: ----------------------------------------------------------------------
[12:01:08.558] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:01:08.558] <TB3> INFO: IA differences per ROC: 18.5 21.7 18.5 22.5 17.7 21.7 19.3 18.5 19.3 22.5 18.5 16.9 18.5 19.3 20.1 18.5
[12:01:08.596] <TB3> INFO: ----------------------------------------------------------------------
[12:01:08.597] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:01:08.597] <TB3> INFO: ----------------------------------------------------------------------
[12:01:17.989] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 388.3 mA = 24.2687 mA/ROC
[12:01:17.989] <TB3> INFO: i(loss) [mA/ROC]: 19.3 20.1 19.3 19.3 20.9 19.3 20.1 19.3 19.3 19.3 19.3 19.3 20.1 18.5 19.3 19.3
[12:01:18.018] <TB3> INFO: ----------------------------------------------------------------------
[12:01:18.018] <TB3> INFO: PixTestPretest::findTiming()
[12:01:18.019] <TB3> INFO: ----------------------------------------------------------------------
[12:01:18.019] <TB3> INFO: PixTestCmd::init()

[12:01:49.367] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[12:01:49.367] <TB3> INFO: (success/tries = 100/100), width = 3
[12:01:50.870] <TB3> INFO: ----------------------------------------------------------------------
[12:01:50.870] <TB3> INFO: PixTestPretest::findWorkingPixel()
[12:01:50.870] <TB3> INFO: ----------------------------------------------------------------------
[12:01:50.962] <TB3> INFO: Expecting 231680 events.
[12:02:00.537] <TB3> INFO: 231680 events read in total (8983ms).
[12:02:00.544] <TB3> INFO: Test took 9671ms.
[12:02:00.788] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:02:00.817] <TB3> INFO: ----------------------------------------------------------------------
[12:02:00.817] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[12:02:00.817] <TB3> INFO: ----------------------------------------------------------------------
[12:02:00.910] <TB3> INFO: Expecting 231680 events.
[12:02:10.561] <TB3> INFO: 231680 events read in total (9060ms).
[12:02:10.569] <TB3> INFO: Test took 9748ms.
[12:02:10.826] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[12:02:10.826] <TB3> INFO: CalDel: 110 102 103 110 107 115 101 94 107 110 111 95 108 91 106 106
[12:02:10.826] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 53 51 51 51 54 51 54 51 52
[12:02:10.828] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters_C0.dat
[12:02:10.828] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters_C1.dat
[12:02:10.829] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters_C2.dat
[12:02:10.829] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters_C3.dat
[12:02:10.829] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters_C4.dat
[12:02:10.829] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters_C5.dat
[12:02:10.829] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters_C6.dat
[12:02:10.829] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters_C7.dat
[12:02:10.829] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters_C8.dat
[12:02:10.829] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters_C9.dat
[12:02:10.829] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters_C10.dat
[12:02:10.829] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters_C11.dat
[12:02:10.829] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters_C12.dat
[12:02:10.829] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters_C13.dat
[12:02:10.829] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters_C14.dat
[12:02:10.830] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters_C15.dat
[12:02:10.830] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//tbmParameters_C0a.dat
[12:02:10.830] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//tbmParameters_C0b.dat
[12:02:10.830] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//tbmParameters_C1a.dat
[12:02:10.830] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//tbmParameters_C1b.dat
[12:02:10.830] <TB3> INFO: PixTestPretest::doTest() done, duration: 80 seconds
[12:02:10.928] <TB3> INFO: enter test to run
[12:02:10.928] <TB3> INFO: test: FullTest no parameter change
[12:02:10.928] <TB3> INFO: running: fulltest
[12:02:10.928] <TB3> INFO: ######################################################################
[12:02:10.928] <TB3> INFO: PixTestFullTest::doTest()
[12:02:10.928] <TB3> INFO: ######################################################################
[12:02:10.929] <TB3> INFO: ######################################################################
[12:02:10.929] <TB3> INFO: PixTestAlive::doTest()
[12:02:10.929] <TB3> INFO: ######################################################################
[12:02:10.930] <TB3> INFO: ----------------------------------------------------------------------
[12:02:10.930] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:02:10.930] <TB3> INFO: ----------------------------------------------------------------------
[12:02:11.165] <TB3> INFO: Expecting 41600 events.
[12:02:14.595] <TB3> INFO: 41600 events read in total (2838ms).
[12:02:14.595] <TB3> INFO: Test took 3663ms.
[12:02:14.823] <TB3> INFO: PixTestAlive::aliveTest() done with 10 decoding errors
[12:02:14.823] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 40 0 0 0 0 0 0 0 0
[12:02:14.824] <TB3> INFO: ----------------------------------------------------------------------
[12:02:14.824] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:02:14.824] <TB3> INFO: ----------------------------------------------------------------------
[12:02:15.058] <TB3> INFO: Expecting 41600 events.
[12:02:17.984] <TB3> INFO: 41600 events read in total (2335ms).
[12:02:17.985] <TB3> INFO: Test took 3159ms.
[12:02:17.985] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:02:18.227] <TB3> INFO: PixTestAlive::maskTest() done
[12:02:18.227] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:02:18.228] <TB3> INFO: ----------------------------------------------------------------------
[12:02:18.228] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:02:18.228] <TB3> INFO: ----------------------------------------------------------------------
[12:02:18.463] <TB3> INFO: Expecting 41600 events.
[12:02:21.943] <TB3> INFO: 41600 events read in total (2889ms).
[12:02:21.944] <TB3> INFO: Test took 3714ms.







































[12:02:22.173] <TB3> INFO: PixTestAlive::addressDecodingTest() done with 10 decoding errors
[12:02:22.173] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:02:22.173] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[12:02:22.173] <TB3> INFO: Decoding statistics:
[12:02:22.173] <TB3> INFO: General information:
[12:02:22.173] <TB3> INFO: 16bit words read: 0
[12:02:22.173] <TB3> INFO: valid events total: 0
[12:02:22.173] <TB3> INFO: empty events: 0
[12:02:22.173] <TB3> INFO: valid events with pixels: 0
[12:02:22.173] <TB3> INFO: valid pixel hits: 0
[12:02:22.173] <TB3> INFO: Event errors: 0
[12:02:22.173] <TB3> INFO: start marker: 0
[12:02:22.173] <TB3> INFO: stop marker: 0
[12:02:22.173] <TB3> INFO: overflow: 0
[12:02:22.173] <TB3> INFO: invalid 5bit words: 0
[12:02:22.173] <TB3> INFO: invalid XOR eye diagram: 0
[12:02:22.173] <TB3> INFO: frame (failed synchr.): 0
[12:02:22.173] <TB3> INFO: idle data (no TBM trl): 0
[12:02:22.173] <TB3> INFO: no data (only TBM hdr): 0
[12:02:22.173] <TB3> INFO: TBM errors: 0
[12:02:22.173] <TB3> INFO: flawed TBM headers: 0
[12:02:22.173] <TB3> INFO: flawed TBM trailers: 0
[12:02:22.173] <TB3> INFO: event ID mismatches: 0
[12:02:22.173] <TB3> INFO: ROC errors: 0
[12:02:22.173] <TB3> INFO: missing ROC header(s): 0
[12:02:22.173] <TB3> INFO: misplaced readback start: 0
[12:02:22.173] <TB3> INFO: Pixel decoding errors: 0
[12:02:22.173] <TB3> INFO: pixel data incomplete: 0
[12:02:22.173] <TB3> INFO: pixel address: 0
[12:02:22.173] <TB3> INFO: pulse height fill bit: 0
[12:02:22.173] <TB3> INFO: buffer corruption: 0
[12:02:22.180] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C15.dat
[12:02:22.181] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[12:02:22.181] <TB3> INFO: ######################################################################
[12:02:22.181] <TB3> INFO: PixTestReadback::doTest()
[12:02:22.181] <TB3> INFO: ######################################################################
[12:02:22.181] <TB3> INFO: ----------------------------------------------------------------------
[12:02:22.181] <TB3> INFO: PixTestReadback::CalibrateVd()
[12:02:22.181] <TB3> INFO: ----------------------------------------------------------------------
[12:02:32.138] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C0.dat
[12:02:32.139] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C1.dat
[12:02:32.139] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C2.dat
[12:02:32.139] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C3.dat
[12:02:32.139] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C4.dat
[12:02:32.139] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C5.dat
[12:02:32.139] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C6.dat
[12:02:32.139] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C7.dat
[12:02:32.139] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C8.dat
[12:02:32.139] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C9.dat
[12:02:32.139] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C10.dat
[12:02:32.139] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C11.dat
[12:02:32.139] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C12.dat
[12:02:32.140] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C13.dat
[12:02:32.140] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C14.dat
[12:02:32.140] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C15.dat
[12:02:32.168] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:02:32.168] <TB3> INFO: ----------------------------------------------------------------------
[12:02:32.168] <TB3> INFO: PixTestReadback::CalibrateVa()
[12:02:32.168] <TB3> INFO: ----------------------------------------------------------------------
[12:02:42.057] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C0.dat
[12:02:42.057] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C1.dat
[12:02:42.057] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C2.dat
[12:02:42.058] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C3.dat
[12:02:42.058] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C4.dat
[12:02:42.058] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C5.dat
[12:02:42.058] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C6.dat
[12:02:42.058] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C7.dat
[12:02:42.058] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C8.dat
[12:02:42.058] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C9.dat
[12:02:42.058] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C10.dat
[12:02:42.058] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C11.dat
[12:02:42.058] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C12.dat
[12:02:42.058] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C13.dat
[12:02:42.058] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C14.dat
[12:02:42.058] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C15.dat
[12:02:42.087] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:02:42.087] <TB3> INFO: ----------------------------------------------------------------------
[12:02:42.087] <TB3> INFO: PixTestReadback::readbackVbg()
[12:02:42.087] <TB3> INFO: ----------------------------------------------------------------------
[12:02:49.729] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:02:49.729] <TB3> INFO: ----------------------------------------------------------------------
[12:02:49.729] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[12:02:49.729] <TB3> INFO: ----------------------------------------------------------------------
[12:02:49.729] <TB3> INFO: Vbg will be calibrated using Vd calibration
[12:02:49.729] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 157.6calibrated Vbg = 1.19093 :::*/*/*/*/
[12:02:49.729] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 152.9calibrated Vbg = 1.1857 :::*/*/*/*/
[12:02:49.729] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 148.5calibrated Vbg = 1.18274 :::*/*/*/*/
[12:02:49.729] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 151.2calibrated Vbg = 1.17819 :::*/*/*/*/
[12:02:49.729] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 152calibrated Vbg = 1.18974 :::*/*/*/*/
[12:02:49.729] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 163.2calibrated Vbg = 1.18593 :::*/*/*/*/
[12:02:49.729] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 154.6calibrated Vbg = 1.18924 :::*/*/*/*/
[12:02:49.729] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 151.5calibrated Vbg = 1.19076 :::*/*/*/*/
[12:02:49.729] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 152.4calibrated Vbg = 1.18336 :::*/*/*/*/
[12:02:49.729] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 153.1calibrated Vbg = 1.18681 :::*/*/*/*/
[12:02:49.729] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 149.8calibrated Vbg = 1.17492 :::*/*/*/*/
[12:02:49.729] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 153.5calibrated Vbg = 1.1744 :::*/*/*/*/
[12:02:49.729] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 151.8calibrated Vbg = 1.17802 :::*/*/*/*/
[12:02:49.729] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 158.2calibrated Vbg = 1.17911 :::*/*/*/*/
[12:02:49.729] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 151.5calibrated Vbg = 1.18555 :::*/*/*/*/
[12:02:49.729] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 172.4calibrated Vbg = 1.18621 :::*/*/*/*/
[12:02:49.731] <TB3> INFO: ----------------------------------------------------------------------
[12:02:49.731] <TB3> INFO: PixTestReadback::CalibrateIa()
[12:02:49.731] <TB3> INFO: ----------------------------------------------------------------------
[12:05:30.053] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C0.dat
[12:05:30.054] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C1.dat
[12:05:30.054] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C2.dat
[12:05:30.054] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C3.dat
[12:05:30.054] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C4.dat
[12:05:30.054] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C5.dat
[12:05:30.054] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C6.dat
[12:05:30.054] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C7.dat
[12:05:30.054] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C8.dat
[12:05:30.054] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C9.dat
[12:05:30.054] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C10.dat
[12:05:30.054] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C11.dat
[12:05:30.055] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C12.dat
[12:05:30.055] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C13.dat
[12:05:30.055] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C14.dat
[12:05:30.055] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//readbackCal_C15.dat
[12:05:30.084] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:05:30.085] <TB3> INFO: PixTestReadback::doTest() done
[12:05:30.086] <TB3> INFO: Decoding statistics:
[12:05:30.086] <TB3> INFO: General information:
[12:05:30.086] <TB3> INFO: 16bit words read: 1536
[12:05:30.086] <TB3> INFO: valid events total: 256
[12:05:30.086] <TB3> INFO: empty events: 256
[12:05:30.086] <TB3> INFO: valid events with pixels: 0
[12:05:30.086] <TB3> INFO: valid pixel hits: 0
[12:05:30.086] <TB3> INFO: Event errors: 0
[12:05:30.086] <TB3> INFO: start marker: 0
[12:05:30.086] <TB3> INFO: stop marker: 0
[12:05:30.086] <TB3> INFO: overflow: 0
[12:05:30.086] <TB3> INFO: invalid 5bit words: 0
[12:05:30.086] <TB3> INFO: invalid XOR eye diagram: 0
[12:05:30.086] <TB3> INFO: frame (failed synchr.): 0
[12:05:30.086] <TB3> INFO: idle data (no TBM trl): 0
[12:05:30.086] <TB3> INFO: no data (only TBM hdr): 0
[12:05:30.086] <TB3> INFO: TBM errors: 0
[12:05:30.086] <TB3> INFO: flawed TBM headers: 0
[12:05:30.086] <TB3> INFO: flawed TBM trailers: 0
[12:05:30.086] <TB3> INFO: event ID mismatches: 0
[12:05:30.086] <TB3> INFO: ROC errors: 0
[12:05:30.086] <TB3> INFO: missing ROC header(s): 0
[12:05:30.086] <TB3> INFO: misplaced readback start: 0
[12:05:30.086] <TB3> INFO: Pixel decoding errors: 0
[12:05:30.086] <TB3> INFO: pixel data incomplete: 0
[12:05:30.086] <TB3> INFO: pixel address: 0
[12:05:30.086] <TB3> INFO: pulse height fill bit: 0
[12:05:30.086] <TB3> INFO: buffer corruption: 0
[12:05:30.122] <TB3> INFO: ######################################################################
[12:05:30.122] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:05:30.122] <TB3> INFO: ######################################################################
[12:05:30.124] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[12:05:30.136] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:05:30.136] <TB3> INFO: run 1 of 1
[12:05:30.370] <TB3> INFO: Expecting 3120000 events.
[12:06:00.901] <TB3> INFO: 671710 events read in total (29940ms).





















[12:06:30.426] <TB3> INFO: 1337870 events read in total (59465ms).





















[12:07:00.226] <TB3> INFO: 2000585 events read in total (89265ms).











[12:07:30.399] <TB3> INFO: 2664875 events read in total (119438ms).











[12:07:51.086] <TB3> INFO: 3120000 events read in total (140125ms).
[12:07:51.159] <TB3> INFO: Test took 141023ms.
[12:08:17.599] <TB3> INFO: PixTestBBMap::doTest() done with 279 decoding errors: , duration: 167 seconds
[12:08:17.599] <TB3> INFO: number of dead bumps (per ROC): 0 0 2 0 1 0 0 0 0 1 0 0 0 1 0 0
[12:08:17.599] <TB3> INFO: separation cut (per ROC): 103 109 105 104 104 105 114 117 110 111 109 109 108 110 107 103
[12:08:17.600] <TB3> INFO: Decoding statistics:
[12:08:17.600] <TB3> INFO: General information:
[12:08:17.600] <TB3> INFO: 16bit words read: 0
[12:08:17.600] <TB3> INFO: valid events total: 0
[12:08:17.600] <TB3> INFO: empty events: 0
[12:08:17.600] <TB3> INFO: valid events with pixels: 0
[12:08:17.600] <TB3> INFO: valid pixel hits: 0
[12:08:17.600] <TB3> INFO: Event errors: 0
[12:08:17.600] <TB3> INFO: start marker: 0
[12:08:17.600] <TB3> INFO: stop marker: 0
[12:08:17.600] <TB3> INFO: overflow: 0
[12:08:17.600] <TB3> INFO: invalid 5bit words: 0
[12:08:17.600] <TB3> INFO: invalid XOR eye diagram: 0
[12:08:17.600] <TB3> INFO: frame (failed synchr.): 0
[12:08:17.600] <TB3> INFO: idle data (no TBM trl): 0
[12:08:17.600] <TB3> INFO: no data (only TBM hdr): 0
[12:08:17.600] <TB3> INFO: TBM errors: 0
[12:08:17.600] <TB3> INFO: flawed TBM headers: 0
[12:08:17.600] <TB3> INFO: flawed TBM trailers: 0
[12:08:17.600] <TB3> INFO: event ID mismatches: 0
[12:08:17.600] <TB3> INFO: ROC errors: 0
[12:08:17.600] <TB3> INFO: missing ROC header(s): 0
[12:08:17.600] <TB3> INFO: misplaced readback start: 0
[12:08:17.600] <TB3> INFO: Pixel decoding errors: 0
[12:08:17.600] <TB3> INFO: pixel data incomplete: 0
[12:08:17.600] <TB3> INFO: pixel address: 0
[12:08:17.600] <TB3> INFO: pulse height fill bit: 0
[12:08:17.600] <TB3> INFO: buffer corruption: 0
[12:08:17.643] <TB3> INFO: ######################################################################
[12:08:17.643] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:08:17.643] <TB3> INFO: ######################################################################
[12:08:17.643] <TB3> INFO: ----------------------------------------------------------------------
[12:08:17.643] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:08:17.643] <TB3> INFO: ----------------------------------------------------------------------
[12:08:17.644] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[12:08:17.655] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[12:08:17.655] <TB3> INFO: run 1 of 1
[12:08:17.921] <TB3> INFO: Expecting 36608000 events.
[12:08:40.979] <TB3> INFO: 678950 events read in total (22466ms).
[12:09:03.387] <TB3> INFO: 1345300 events read in total (44874ms).
[12:09:25.934] <TB3> INFO: 2011750 events read in total (67421ms).
[12:09:48.360] <TB3> INFO: 2677100 events read in total (89847ms).
[12:10:10.969] <TB3> INFO: 3343250 events read in total (112456ms).
[12:10:33.478] <TB3> INFO: 4010200 events read in total (134965ms).
[12:10:56.230] <TB3> INFO: 4674950 events read in total (157717ms).
[12:11:18.784] <TB3> INFO: 5339750 events read in total (180271ms).
[12:11:41.067] <TB3> INFO: 6004400 events read in total (202554ms).
[12:12:03.987] <TB3> INFO: 6668700 events read in total (225474ms).
[12:12:26.641] <TB3> INFO: 7333450 events read in total (248128ms).
[12:12:48.809] <TB3> INFO: 7997800 events read in total (270296ms).
[12:13:11.433] <TB3> INFO: 8662700 events read in total (292920ms).
[12:13:33.901] <TB3> INFO: 9326450 events read in total (315388ms).
[12:13:56.438] <TB3> INFO: 9988400 events read in total (337925ms).
[12:14:18.862] <TB3> INFO: 10653300 events read in total (360349ms).
[12:14:41.401] <TB3> INFO: 11315700 events read in total (382888ms).
[12:15:03.828] <TB3> INFO: 11975550 events read in total (405315ms).
[12:15:26.095] <TB3> INFO: 12634600 events read in total (427582ms).
[12:15:48.543] <TB3> INFO: 13295350 events read in total (450030ms).
[12:16:11.018] <TB3> INFO: 13957500 events read in total (472505ms).
[12:16:33.515] <TB3> INFO: 14618500 events read in total (495002ms).
[12:16:55.891] <TB3> INFO: 15281600 events read in total (517378ms).
[12:17:18.597] <TB3> INFO: 15942700 events read in total (540084ms).
[12:17:41.162] <TB3> INFO: 16603550 events read in total (562649ms).
[12:18:03.616] <TB3> INFO: 17264250 events read in total (585103ms).
[12:18:26.091] <TB3> INFO: 17925150 events read in total (607578ms).
[12:18:48.826] <TB3> INFO: 18584950 events read in total (630313ms).
[12:19:11.453] <TB3> INFO: 19243600 events read in total (652940ms).
[12:19:34.196] <TB3> INFO: 19902200 events read in total (675683ms).
[12:19:56.848] <TB3> INFO: 20560400 events read in total (698335ms).
[12:20:19.601] <TB3> INFO: 21218200 events read in total (721088ms).
[12:20:42.179] <TB3> INFO: 21876100 events read in total (743666ms).
[12:21:04.656] <TB3> INFO: 22534250 events read in total (766143ms).
[12:21:27.309] <TB3> INFO: 23190400 events read in total (788796ms).
[12:21:49.660] <TB3> INFO: 23847300 events read in total (811147ms).
[12:22:11.963] <TB3> INFO: 24502750 events read in total (833450ms).
[12:22:34.613] <TB3> INFO: 25157550 events read in total (856100ms).
[12:22:57.110] <TB3> INFO: 25814700 events read in total (878597ms).
[12:23:19.636] <TB3> INFO: 26472400 events read in total (901123ms).
[12:23:42.054] <TB3> INFO: 27130000 events read in total (923541ms).
[12:24:04.511] <TB3> INFO: 27787300 events read in total (945998ms).
[12:24:27.058] <TB3> INFO: 28443850 events read in total (968545ms).
[12:24:49.642] <TB3> INFO: 29100950 events read in total (991129ms).
[12:25:11.979] <TB3> INFO: 29758800 events read in total (1013466ms).
[12:25:34.609] <TB3> INFO: 30415800 events read in total (1036096ms).
[12:25:57.021] <TB3> INFO: 31072350 events read in total (1058508ms).
[12:26:19.316] <TB3> INFO: 31729750 events read in total (1080803ms).
[12:26:41.633] <TB3> INFO: 32387700 events read in total (1103120ms).
[12:27:03.876] <TB3> INFO: 33045850 events read in total (1125363ms).
[12:27:26.025] <TB3> INFO: 33704700 events read in total (1147512ms).
[12:27:48.371] <TB3> INFO: 34363300 events read in total (1169858ms).
[12:28:10.554] <TB3> INFO: 35022300 events read in total (1192041ms).
[12:28:33.056] <TB3> INFO: 35681750 events read in total (1214543ms).
[12:28:55.947] <TB3> INFO: 36348700 events read in total (1237434ms).
[12:29:05.240] <TB3> INFO: 36608000 events read in total (1246727ms).
[12:29:05.299] <TB3> INFO: Test took 1247644ms.
[12:29:05.836] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:29:07.910] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:29:10.323] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:29:12.446] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:29:14.497] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:29:16.584] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:29:18.876] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:29:21.018] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:29:22.974] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:29:24.823] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:29:26.513] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:29:28.359] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:29:30.091] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:29:32.516] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:29:34.601] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:29:36.140] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:29:38.128] <TB3> INFO: PixTestScurves::scurves() done
[12:29:38.128] <TB3> INFO: Vcal mean: 113.01 113.90 114.85 105.90 112.93 110.78 120.35 117.84 114.85 121.82 110.73 112.70 113.72 122.20 110.06 117.45
[12:29:38.128] <TB3> INFO: Vcal RMS: 5.69 5.49 5.36 4.80 4.88 4.78 6.28 13.04 5.57 6.63 5.24 5.59 5.02 5.95 5.26 6.44
[12:29:38.128] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1280 seconds
[12:29:38.128] <TB3> INFO: Decoding statistics:
[12:29:38.128] <TB3> INFO: General information:
[12:29:38.128] <TB3> INFO: 16bit words read: 0
[12:29:38.128] <TB3> INFO: valid events total: 0
[12:29:38.128] <TB3> INFO: empty events: 0
[12:29:38.128] <TB3> INFO: valid events with pixels: 0
[12:29:38.128] <TB3> INFO: valid pixel hits: 0
[12:29:38.128] <TB3> INFO: Event errors: 0
[12:29:38.128] <TB3> INFO: start marker: 0
[12:29:38.128] <TB3> INFO: stop marker: 0
[12:29:38.128] <TB3> INFO: overflow: 0
[12:29:38.128] <TB3> INFO: invalid 5bit words: 0
[12:29:38.128] <TB3> INFO: invalid XOR eye diagram: 0
[12:29:38.128] <TB3> INFO: frame (failed synchr.): 0
[12:29:38.128] <TB3> INFO: idle data (no TBM trl): 0
[12:29:38.128] <TB3> INFO: no data (only TBM hdr): 0
[12:29:38.128] <TB3> INFO: TBM errors: 0
[12:29:38.128] <TB3> INFO: flawed TBM headers: 0
[12:29:38.128] <TB3> INFO: flawed TBM trailers: 0
[12:29:38.128] <TB3> INFO: event ID mismatches: 0
[12:29:38.128] <TB3> INFO: ROC errors: 0
[12:29:38.128] <TB3> INFO: missing ROC header(s): 0
[12:29:38.128] <TB3> INFO: misplaced readback start: 0
[12:29:38.128] <TB3> INFO: Pixel decoding errors: 0
[12:29:38.128] <TB3> INFO: pixel data incomplete: 0
[12:29:38.128] <TB3> INFO: pixel address: 0
[12:29:38.128] <TB3> INFO: pulse height fill bit: 0
[12:29:38.128] <TB3> INFO: buffer corruption: 0
[12:29:38.196] <TB3> INFO: ######################################################################
[12:29:38.196] <TB3> INFO: PixTestTrim::doTest()
[12:29:38.196] <TB3> INFO: ######################################################################
[12:29:38.197] <TB3> INFO: ----------------------------------------------------------------------
[12:29:38.197] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[12:29:38.197] <TB3> INFO: ----------------------------------------------------------------------
[12:29:38.239] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:29:38.239] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:29:38.248] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:29:38.249] <TB3> INFO: run 1 of 1
[12:29:38.523] <TB3> INFO: Expecting 5025280 events.
[12:30:08.354] <TB3> INFO: 825760 events read in total (29236ms).
[12:30:37.780] <TB3> INFO: 1648616 events read in total (58662ms).
[12:31:07.507] <TB3> INFO: 2469088 events read in total (88390ms).
[12:31:36.811] <TB3> INFO: 3286904 events read in total (117693ms).
[12:32:06.138] <TB3> INFO: 4100608 events read in total (147020ms).
[12:32:36.210] <TB3> INFO: 4914024 events read in total (177092ms).
[12:32:40.915] <TB3> INFO: 5025280 events read in total (181797ms).
[12:32:40.965] <TB3> INFO: Test took 182716ms.
[12:33:00.318] <TB3> INFO: ROC 0 VthrComp = 114
[12:33:00.318] <TB3> INFO: ROC 1 VthrComp = 125
[12:33:00.318] <TB3> INFO: ROC 2 VthrComp = 118
[12:33:00.318] <TB3> INFO: ROC 3 VthrComp = 111
[12:33:00.318] <TB3> INFO: ROC 4 VthrComp = 116
[12:33:00.318] <TB3> INFO: ROC 5 VthrComp = 116
[12:33:00.319] <TB3> INFO: ROC 6 VthrComp = 122
[12:33:00.319] <TB3> INFO: ROC 7 VthrComp = 120
[12:33:00.319] <TB3> INFO: ROC 8 VthrComp = 118
[12:33:00.319] <TB3> INFO: ROC 9 VthrComp = 126
[12:33:00.319] <TB3> INFO: ROC 10 VthrComp = 114
[12:33:00.319] <TB3> INFO: ROC 11 VthrComp = 113
[12:33:00.319] <TB3> INFO: ROC 12 VthrComp = 118
[12:33:00.319] <TB3> INFO: ROC 13 VthrComp = 123
[12:33:00.319] <TB3> INFO: ROC 14 VthrComp = 114
[12:33:00.320] <TB3> INFO: ROC 15 VthrComp = 113
[12:33:00.566] <TB3> INFO: Expecting 41600 events.
[12:33:03.000] <TB3> INFO: 41600 events read in total (2842ms).
[12:33:03.001] <TB3> INFO: Test took 3680ms.
[12:33:04.010] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:33:04.010] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:33:04.019] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:33:04.019] <TB3> INFO: run 1 of 1
[12:33:04.297] <TB3> INFO: Expecting 5025280 events.
[12:33:30.347] <TB3> INFO: 591112 events read in total (25459ms).
[12:33:55.236] <TB3> INFO: 1180520 events read in total (50348ms).
[12:34:20.662] <TB3> INFO: 1770464 events read in total (75774ms).
[12:34:46.177] <TB3> INFO: 2359568 events read in total (101289ms).
[12:35:11.492] <TB3> INFO: 2946208 events read in total (126604ms).
[12:35:36.525] <TB3> INFO: 3531904 events read in total (151637ms).
[12:36:01.627] <TB3> INFO: 4117072 events read in total (176739ms).
[12:36:26.862] <TB3> INFO: 4701384 events read in total (201974ms).
[12:36:41.600] <TB3> INFO: 5025280 events read in total (216712ms).
[12:36:41.671] <TB3> INFO: Test took 217652ms.
[12:37:08.534] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 62.9451 for pixel 0/71 mean/min/max = 47.3104/31.6179/63.0029
[12:37:08.535] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 60.4912 for pixel 17/64 mean/min/max = 46.3931/32.2586/60.5276
[12:37:08.535] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 60.2416 for pixel 1/10 mean/min/max = 45.7492/31.2165/60.2819
[12:37:08.535] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 59.5432 for pixel 13/72 mean/min/max = 47.0302/34.4112/59.6491
[12:37:08.535] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 60.664 for pixel 44/2 mean/min/max = 46.3164/31.9003/60.7325
[12:37:08.536] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 58.5715 for pixel 15/0 mean/min/max = 45.3608/32.0617/58.6599
[12:37:08.536] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 60.6228 for pixel 0/71 mean/min/max = 46.2491/31.457/61.0412
[12:37:08.536] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 63.7472 for pixel 25/2 mean/min/max = 47.2634/30.4345/64.0924
[12:37:08.537] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 59.517 for pixel 47/24 mean/min/max = 45.4872/31.2825/59.6918
[12:37:08.537] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 60.4902 for pixel 21/4 mean/min/max = 45.2672/30.0379/60.4965
[12:37:08.537] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 60.3988 for pixel 0/42 mean/min/max = 46.2171/32.0222/60.412
[12:37:08.537] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 62.8459 for pixel 0/14 mean/min/max = 47.26/31.6278/62.8922
[12:37:08.538] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 59.6595 for pixel 8/77 mean/min/max = 45.5679/31.2789/59.857
[12:37:08.538] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 62.7039 for pixel 19/12 mean/min/max = 46.6478/30.4844/62.8112
[12:37:08.538] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 60.5616 for pixel 12/70 mean/min/max = 46.1995/31.8349/60.5642
[12:37:08.538] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 64.4163 for pixel 2/78 mean/min/max = 48.1036/31.7692/64.4379
[12:37:08.539] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:08.627] <TB3> INFO: Expecting 411648 events.
[12:37:17.845] <TB3> INFO: 411648 events read in total (8626ms).
[12:37:17.852] <TB3> INFO: Expecting 411648 events.
[12:37:26.894] <TB3> INFO: 411648 events read in total (8639ms).
[12:37:26.903] <TB3> INFO: Expecting 411648 events.
[12:37:35.918] <TB3> INFO: 411648 events read in total (8612ms).
[12:37:35.933] <TB3> INFO: Expecting 411648 events.
[12:37:45.010] <TB3> INFO: 411648 events read in total (8674ms).
[12:37:45.025] <TB3> INFO: Expecting 411648 events.
[12:37:54.100] <TB3> INFO: 411648 events read in total (8672ms).
[12:37:54.117] <TB3> INFO: Expecting 411648 events.
[12:38:03.202] <TB3> INFO: 411648 events read in total (8682ms).
[12:38:03.227] <TB3> INFO: Expecting 411648 events.
[12:38:12.229] <TB3> INFO: 411648 events read in total (8599ms).
[12:38:12.251] <TB3> INFO: Expecting 411648 events.
[12:38:21.285] <TB3> INFO: 411648 events read in total (8631ms).
[12:38:21.309] <TB3> INFO: Expecting 411648 events.
[12:38:30.360] <TB3> INFO: 411648 events read in total (8649ms).
[12:38:30.387] <TB3> INFO: Expecting 411648 events.
[12:38:39.419] <TB3> INFO: 411648 events read in total (8629ms).
[12:38:39.450] <TB3> INFO: Expecting 411648 events.
[12:38:48.514] <TB3> INFO: 411648 events read in total (8661ms).
[12:38:48.545] <TB3> INFO: Expecting 411648 events.
[12:38:57.624] <TB3> INFO: 411648 events read in total (8676ms).
[12:38:57.669] <TB3> INFO: Expecting 411648 events.
[12:39:06.741] <TB3> INFO: 411648 events read in total (8669ms).
[12:39:06.779] <TB3> INFO: Expecting 411648 events.
[12:39:15.839] <TB3> INFO: 411648 events read in total (8657ms).
[12:39:15.878] <TB3> INFO: Expecting 411648 events.
[12:39:24.978] <TB3> INFO: 411648 events read in total (8697ms).
[12:39:25.021] <TB3> INFO: Expecting 411648 events.
[12:39:34.072] <TB3> INFO: 411648 events read in total (8648ms).
[12:39:34.123] <TB3> INFO: Test took 145584ms.
[12:39:34.883] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[12:39:34.894] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:39:34.894] <TB3> INFO: run 1 of 1
[12:39:35.166] <TB3> INFO: Expecting 5025280 events.
[12:40:01.238] <TB3> INFO: 591040 events read in total (25481ms).
[12:40:26.759] <TB3> INFO: 1181216 events read in total (51002ms).
[12:40:52.325] <TB3> INFO: 1769616 events read in total (76568ms).
[12:41:17.817] <TB3> INFO: 2358152 events read in total (102060ms).
[12:41:43.266] <TB3> INFO: 2948240 events read in total (127510ms).
[12:42:08.783] <TB3> INFO: 3542392 events read in total (153026ms).
[12:42:34.106] <TB3> INFO: 4134328 events read in total (178349ms).
[12:42:59.667] <TB3> INFO: 4723656 events read in total (203910ms).
[12:43:13.767] <TB3> INFO: 5025280 events read in total (218010ms).
[12:43:13.913] <TB3> INFO: Test took 219020ms.
[12:43:37.274] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 1.500000 .. 147.523370
[12:43:37.551] <TB3> INFO: Expecting 208000 events.
[12:43:46.760] <TB3> INFO: 208000 events read in total (8617ms).
[12:43:46.762] <TB3> INFO: Test took 9487ms.
[12:43:46.807] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 157 (-1/-1) hits flags = 528 (plus default)
[12:43:46.817] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:43:46.817] <TB3> INFO: run 1 of 1
[12:43:47.095] <TB3> INFO: Expecting 5224960 events.
[12:44:12.875] <TB3> INFO: 583944 events read in total (25188ms).
[12:44:38.283] <TB3> INFO: 1167640 events read in total (50596ms).
[12:45:03.543] <TB3> INFO: 1751616 events read in total (75856ms).
[12:45:29.132] <TB3> INFO: 2335944 events read in total (101445ms).
[12:45:54.133] <TB3> INFO: 2920064 events read in total (126446ms).
[12:46:19.062] <TB3> INFO: 3503280 events read in total (151375ms).
[12:46:44.670] <TB3> INFO: 4086496 events read in total (176983ms).
[12:47:09.803] <TB3> INFO: 4669336 events read in total (202116ms).
[12:47:35.201] <TB3> INFO: 5224960 events read in total (227514ms).
[12:47:35.314] <TB3> INFO: Test took 228497ms.
[12:48:01.713] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 27.154509 .. 45.004201
[12:48:01.989] <TB3> INFO: Expecting 208000 events.
[12:48:11.487] <TB3> INFO: 208000 events read in total (8907ms).
[12:48:11.488] <TB3> INFO: Test took 9774ms.
[12:48:11.533] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 55 (-1/-1) hits flags = 528 (plus default)
[12:48:11.542] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:48:11.543] <TB3> INFO: run 1 of 1
[12:48:11.821] <TB3> INFO: Expecting 1297920 events.
[12:48:40.138] <TB3> INFO: 658704 events read in total (27726ms).
[12:49:07.868] <TB3> INFO: 1297920 events read in total (55456ms).
[12:49:07.909] <TB3> INFO: Test took 56367ms.
[12:49:21.520] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 26.034314 .. 46.915114
[12:49:21.761] <TB3> INFO: Expecting 208000 events.
[12:49:31.359] <TB3> INFO: 208000 events read in total (9007ms).
[12:49:31.359] <TB3> INFO: Test took 9837ms.
[12:49:31.406] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 16 .. 56 (-1/-1) hits flags = 528 (plus default)
[12:49:31.415] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:49:31.415] <TB3> INFO: run 1 of 1
[12:49:31.693] <TB3> INFO: Expecting 1364480 events.
[12:49:59.981] <TB3> INFO: 659656 events read in total (27696ms).
[12:50:27.661] <TB3> INFO: 1317768 events read in total (55376ms).
[12:50:30.165] <TB3> INFO: 1364480 events read in total (57881ms).
[12:50:30.196] <TB3> INFO: Test took 58782ms.
[12:50:43.967] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 24.924809 .. 50.463716
[12:50:44.206] <TB3> INFO: Expecting 208000 events.
[12:50:53.958] <TB3> INFO: 208000 events read in total (9161ms).
[12:50:53.959] <TB3> INFO: Test took 9991ms.
[12:50:53.004] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 14 .. 60 (-1/-1) hits flags = 528 (plus default)
[12:50:54.013] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:50:54.013] <TB3> INFO: run 1 of 1
[12:50:54.291] <TB3> INFO: Expecting 1564160 events.
[12:51:22.157] <TB3> INFO: 653024 events read in total (27274ms).
[12:51:49.363] <TB3> INFO: 1305464 events read in total (54481ms).
[12:52:00.854] <TB3> INFO: 1564160 events read in total (65972ms).
[12:52:00.882] <TB3> INFO: Test took 66869ms.
[12:52:13.729] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:52:13.730] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[12:52:13.738] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:52:13.738] <TB3> INFO: run 1 of 1
[12:52:13.970] <TB3> INFO: Expecting 1364480 events.
[12:52:41.980] <TB3> INFO: 667112 events read in total (27418ms).
[12:53:09.993] <TB3> INFO: 1333448 events read in total (55431ms).
[12:53:11.707] <TB3> INFO: 1364480 events read in total (57145ms).
[12:53:11.731] <TB3> INFO: Test took 57992ms.
[12:53:23.806] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C0.dat
[12:53:23.806] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C1.dat
[12:53:23.807] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C2.dat
[12:53:23.807] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C3.dat
[12:53:23.807] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C4.dat
[12:53:23.807] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C5.dat
[12:53:23.807] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C6.dat
[12:53:23.807] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C7.dat
[12:53:23.807] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C8.dat
[12:53:23.807] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C9.dat
[12:53:23.807] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C10.dat
[12:53:23.807] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C11.dat
[12:53:23.807] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C12.dat
[12:53:23.808] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C13.dat
[12:53:23.808] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C14.dat
[12:53:23.808] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C15.dat
[12:53:23.808] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//trimParameters35_C0.dat
[12:53:23.815] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//trimParameters35_C1.dat
[12:53:23.822] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//trimParameters35_C2.dat
[12:53:23.829] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//trimParameters35_C3.dat
[12:53:23.836] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//trimParameters35_C4.dat
[12:53:23.843] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//trimParameters35_C5.dat
[12:53:23.850] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//trimParameters35_C6.dat
[12:53:23.855] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//trimParameters35_C7.dat
[12:53:23.861] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//trimParameters35_C8.dat
[12:53:23.866] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//trimParameters35_C9.dat
[12:53:23.872] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//trimParameters35_C10.dat
[12:53:23.877] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//trimParameters35_C11.dat
[12:53:23.883] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//trimParameters35_C12.dat
[12:53:23.888] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//trimParameters35_C13.dat
[12:53:23.894] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//trimParameters35_C14.dat
[12:53:23.900] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//trimParameters35_C15.dat
[12:53:23.905] <TB3> INFO: PixTestTrim::trimTest() done
[12:53:23.905] <TB3> INFO: vtrim: 133 138 127 141 146 130 134 157 144 146 134 136 135 149 126 153
[12:53:23.905] <TB3> INFO: vthrcomp: 114 125 118 111 116 116 122 120 118 126 114 113 118 123 114 113
[12:53:23.905] <TB3> INFO: vcal mean: 34.99 34.97 34.89 34.97 34.93 34.88 34.95 34.65 34.94 34.94 35.00 35.15 34.93 35.08 34.96 35.25
[12:53:23.905] <TB3> INFO: vcal RMS: 1.19 1.05 1.08 0.93 1.11 1.04 1.15 3.69 1.13 1.20 1.02 1.32 1.09 1.51 1.06 1.46
[12:53:23.905] <TB3> INFO: bits mean: 9.43 9.37 9.81 9.40 9.93 9.97 9.60 9.82 10.39 10.35 9.85 9.77 10.04 10.36 9.86 9.99
[12:53:23.905] <TB3> INFO: bits RMS: 2.69 2.68 2.67 2.36 2.51 2.50 2.71 2.70 2.37 2.52 2.53 2.56 2.52 2.44 2.51 2.43
[12:53:23.912] <TB3> INFO: ----------------------------------------------------------------------
[12:53:23.912] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[12:53:23.912] <TB3> INFO: ----------------------------------------------------------------------
[12:53:23.915] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[12:53:23.927] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:53:23.927] <TB3> INFO: run 1 of 1
[12:53:24.159] <TB3> INFO: Expecting 4160000 events.
[12:53:56.334] <TB3> INFO: 747270 events read in total (31584ms).
[12:54:27.493] <TB3> INFO: 1488370 events read in total (62743ms).
[12:54:58.470] <TB3> INFO: 2226900 events read in total (93720ms).
[12:55:29.809] <TB3> INFO: 2960745 events read in total (125060ms).
[12:56:01.062] <TB3> INFO: 3694805 events read in total (156313ms).
[12:56:21.524] <TB3> INFO: 4160000 events read in total (176774ms).
[12:56:21.592] <TB3> INFO: Test took 177665ms.
[12:56:48.999] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 198 (-1/-1) hits flags = 528 (plus default)
[12:56:49.010] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:56:49.010] <TB3> INFO: run 1 of 1
[12:56:49.243] <TB3> INFO: Expecting 4139200 events.
[12:57:20.568] <TB3> INFO: 724780 events read in total (30734ms).
[12:57:51.281] <TB3> INFO: 1444565 events read in total (61447ms).
[12:58:21.838] <TB3> INFO: 2161875 events read in total (92004ms).
[12:58:52.347] <TB3> INFO: 2874510 events read in total (122513ms).
[12:59:22.749] <TB3> INFO: 3587535 events read in total (152915ms).
[12:59:46.659] <TB3> INFO: 4139200 events read in total (176825ms).
[12:59:46.718] <TB3> INFO: Test took 177708ms.
[13:00:14.745] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 189 (-1/-1) hits flags = 528 (plus default)
[13:00:14.754] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:00:14.754] <TB3> INFO: run 1 of 1
[13:00:14.000] <TB3> INFO: Expecting 3952000 events.
[13:00:46.469] <TB3> INFO: 737500 events read in total (30877ms).
[13:01:17.169] <TB3> INFO: 1469820 events read in total (61577ms).
[13:01:47.931] <TB3> INFO: 2198780 events read in total (92340ms).
[13:02:18.577] <TB3> INFO: 2923625 events read in total (122985ms).
[13:02:49.563] <TB3> INFO: 3649610 events read in total (153971ms).
[13:03:02.456] <TB3> INFO: 3952000 events read in total (166864ms).
[13:03:02.505] <TB3> INFO: Test took 167751ms.
[13:03:30.469] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 190 (-1/-1) hits flags = 528 (plus default)
[13:03:30.479] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:03:30.479] <TB3> INFO: run 1 of 1
[13:03:30.754] <TB3> INFO: Expecting 3972800 events.
[13:04:02.360] <TB3> INFO: 736355 events read in total (31014ms).
[13:04:33.395] <TB3> INFO: 1467640 events read in total (62049ms).
[13:05:04.226] <TB3> INFO: 2195375 events read in total (92880ms).
[13:05:35.064] <TB3> INFO: 2919280 events read in total (123718ms).
[13:06:05.879] <TB3> INFO: 3643835 events read in total (154533ms).
[13:06:20.057] <TB3> INFO: 3972800 events read in total (168711ms).
[13:06:20.107] <TB3> INFO: Test took 169629ms.
[13:06:46.530] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 188 (-1/-1) hits flags = 528 (plus default)
[13:06:46.542] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:06:46.542] <TB3> INFO: run 1 of 1
[13:06:46.774] <TB3> INFO: Expecting 3931200 events.
[13:07:18.400] <TB3> INFO: 739620 events read in total (31034ms).
[13:07:49.132] <TB3> INFO: 1473700 events read in total (61766ms).
[13:08:20.043] <TB3> INFO: 2204585 events read in total (92677ms).
[13:08:50.617] <TB3> INFO: 2931240 events read in total (123251ms).
[13:09:21.650] <TB3> INFO: 3659560 events read in total (154284ms).
[13:09:33.397] <TB3> INFO: 3931200 events read in total (166031ms).
[13:09:33.445] <TB3> INFO: Test took 166903ms.
[13:10:01.315] <TB3> INFO: PixTestTrim::trimBitTest() done
[13:10:01.316] <TB3> INFO: PixTestTrim::doTest() done, duration: 2423 seconds
[13:10:01.316] <TB3> INFO: Decoding statistics:
[13:10:01.316] <TB3> INFO: General information:
[13:10:01.316] <TB3> INFO: 16bit words read: 0
[13:10:01.316] <TB3> INFO: valid events total: 0
[13:10:01.316] <TB3> INFO: empty events: 0
[13:10:01.316] <TB3> INFO: valid events with pixels: 0
[13:10:01.317] <TB3> INFO: valid pixel hits: 0
[13:10:01.317] <TB3> INFO: Event errors: 0
[13:10:01.317] <TB3> INFO: start marker: 0
[13:10:01.317] <TB3> INFO: stop marker: 0
[13:10:01.317] <TB3> INFO: overflow: 0
[13:10:01.317] <TB3> INFO: invalid 5bit words: 0
[13:10:01.317] <TB3> INFO: invalid XOR eye diagram: 0
[13:10:01.317] <TB3> INFO: frame (failed synchr.): 0
[13:10:01.317] <TB3> INFO: idle data (no TBM trl): 0
[13:10:01.317] <TB3> INFO: no data (only TBM hdr): 0
[13:10:01.317] <TB3> INFO: TBM errors: 0
[13:10:01.317] <TB3> INFO: flawed TBM headers: 0
[13:10:01.317] <TB3> INFO: flawed TBM trailers: 0
[13:10:01.317] <TB3> INFO: event ID mismatches: 0
[13:10:01.317] <TB3> INFO: ROC errors: 0
[13:10:01.317] <TB3> INFO: missing ROC header(s): 0
[13:10:01.317] <TB3> INFO: misplaced readback start: 0
[13:10:01.317] <TB3> INFO: Pixel decoding errors: 0
[13:10:01.317] <TB3> INFO: pixel data incomplete: 0
[13:10:01.317] <TB3> INFO: pixel address: 0
[13:10:01.317] <TB3> INFO: pulse height fill bit: 0
[13:10:01.317] <TB3> INFO: buffer corruption: 0
[13:10:01.945] <TB3> INFO: ######################################################################
[13:10:01.945] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:10:01.945] <TB3> INFO: ######################################################################
[13:10:02.184] <TB3> INFO: Expecting 41600 events.
[13:10:05.648] <TB3> INFO: 41600 events read in total (2872ms).
[13:10:05.648] <TB3> INFO: Test took 3701ms.
[13:10:06.087] <TB3> INFO: Expecting 41600 events.
[13:10:09.724] <TB3> INFO: 41600 events read in total (3045ms).
[13:10:09.725] <TB3> INFO: Test took 3871ms.
[13:10:10.015] <TB3> INFO: Expecting 41600 events.
[13:10:13.633] <TB3> INFO: 41600 events read in total (3027ms).
[13:10:13.635] <TB3> INFO: Test took 3885ms.
[13:10:13.923] <TB3> INFO: Expecting 41600 events.
[13:10:17.528] <TB3> INFO: 41600 events read in total (3014ms).
[13:10:17.529] <TB3> INFO: Test took 3871ms.
[13:10:17.817] <TB3> INFO: Expecting 41600 events.
[13:10:21.333] <TB3> INFO: 41600 events read in total (2924ms).
[13:10:21.334] <TB3> INFO: Test took 3782ms.
[13:10:21.622] <TB3> INFO: Expecting 41600 events.
[13:10:25.167] <TB3> INFO: 41600 events read in total (2953ms).
[13:10:25.167] <TB3> INFO: Test took 3809ms.
[13:10:25.455] <TB3> INFO: Expecting 41600 events.
[13:10:28.942] <TB3> INFO: 41600 events read in total (2895ms).
[13:10:28.943] <TB3> INFO: Test took 3752ms.
[13:10:29.231] <TB3> INFO: Expecting 41600 events.
[13:10:32.725] <TB3> INFO: 41600 events read in total (2903ms).
[13:10:32.726] <TB3> INFO: Test took 3760ms.
[13:10:33.021] <TB3> INFO: Expecting 41600 events.
[13:10:36.588] <TB3> INFO: 41600 events read in total (2975ms).
[13:10:36.588] <TB3> INFO: Test took 3836ms.
[13:10:36.876] <TB3> INFO: Expecting 41600 events.
[13:10:40.418] <TB3> INFO: 41600 events read in total (2950ms).
[13:10:40.419] <TB3> INFO: Test took 3807ms.
[13:10:40.710] <TB3> INFO: Expecting 41600 events.
[13:10:44.341] <TB3> INFO: 41600 events read in total (3039ms).
[13:10:44.342] <TB3> INFO: Test took 3896ms.
[13:10:44.633] <TB3> INFO: Expecting 41600 events.
[13:10:48.173] <TB3> INFO: 41600 events read in total (2948ms).
[13:10:48.174] <TB3> INFO: Test took 3805ms.
[13:10:48.463] <TB3> INFO: Expecting 41600 events.
[13:10:52.190] <TB3> INFO: 41600 events read in total (3136ms).
[13:10:52.191] <TB3> INFO: Test took 3993ms.
[13:10:52.480] <TB3> INFO: Expecting 41600 events.
[13:10:56.116] <TB3> INFO: 41600 events read in total (3044ms).
[13:10:56.117] <TB3> INFO: Test took 3901ms.
[13:10:56.413] <TB3> INFO: Expecting 41600 events.
[13:11:00.043] <TB3> INFO: 41600 events read in total (3039ms).
[13:11:00.044] <TB3> INFO: Test took 3904ms.
[13:11:00.331] <TB3> INFO: Expecting 41600 events.
[13:11:03.847] <TB3> INFO: 41600 events read in total (2924ms).
[13:11:03.847] <TB3> INFO: Test took 3780ms.
[13:11:04.135] <TB3> INFO: Expecting 41600 events.
[13:11:07.707] <TB3> INFO: 41600 events read in total (2980ms).
[13:11:07.708] <TB3> INFO: Test took 3837ms.
[13:11:07.007] <TB3> INFO: Expecting 41600 events.
[13:11:11.556] <TB3> INFO: 41600 events read in total (2958ms).
[13:11:11.557] <TB3> INFO: Test took 3823ms.
[13:11:11.845] <TB3> INFO: Expecting 41600 events.
[13:11:15.338] <TB3> INFO: 41600 events read in total (2901ms).
[13:11:15.338] <TB3> INFO: Test took 3757ms.
[13:11:15.626] <TB3> INFO: Expecting 41600 events.
[13:11:19.128] <TB3> INFO: 41600 events read in total (2910ms).
[13:11:19.129] <TB3> INFO: Test took 3767ms.
[13:11:19.417] <TB3> INFO: Expecting 41600 events.
[13:11:23.112] <TB3> INFO: 41600 events read in total (3103ms).
[13:11:23.113] <TB3> INFO: Test took 3961ms.
[13:11:23.402] <TB3> INFO: Expecting 41600 events.
[13:11:26.967] <TB3> INFO: 41600 events read in total (2974ms).
[13:11:26.968] <TB3> INFO: Test took 3831ms.
[13:11:27.256] <TB3> INFO: Expecting 41600 events.
[13:11:30.725] <TB3> INFO: 41600 events read in total (2877ms).
[13:11:30.725] <TB3> INFO: Test took 3734ms.
[13:11:31.015] <TB3> INFO: Expecting 41600 events.
[13:11:34.508] <TB3> INFO: 41600 events read in total (2902ms).
[13:11:34.509] <TB3> INFO: Test took 3759ms.
[13:11:34.799] <TB3> INFO: Expecting 41600 events.
[13:11:38.277] <TB3> INFO: 41600 events read in total (2887ms).
[13:11:38.278] <TB3> INFO: Test took 3744ms.
[13:11:38.569] <TB3> INFO: Expecting 41600 events.
[13:11:42.123] <TB3> INFO: 41600 events read in total (2963ms).
[13:11:42.124] <TB3> INFO: Test took 3820ms.
[13:11:42.412] <TB3> INFO: Expecting 41600 events.
[13:11:45.935] <TB3> INFO: 41600 events read in total (2932ms).
[13:11:45.936] <TB3> INFO: Test took 3789ms.
[13:11:46.224] <TB3> INFO: Expecting 41600 events.
[13:11:49.859] <TB3> INFO: 41600 events read in total (3043ms).
[13:11:49.860] <TB3> INFO: Test took 3901ms.
[13:11:50.150] <TB3> INFO: Expecting 41600 events.
[13:11:53.715] <TB3> INFO: 41600 events read in total (2974ms).
[13:11:53.715] <TB3> INFO: Test took 3830ms.
[13:11:53.005] <TB3> INFO: Expecting 2560 events.
[13:11:54.889] <TB3> INFO: 2560 events read in total (293ms).
[13:11:54.889] <TB3> INFO: Test took 1161ms.
[13:11:55.197] <TB3> INFO: Expecting 2560 events.
[13:11:56.080] <TB3> INFO: 2560 events read in total (291ms).
[13:11:56.081] <TB3> INFO: Test took 1191ms.
[13:11:56.388] <TB3> INFO: Expecting 2560 events.
[13:11:57.275] <TB3> INFO: 2560 events read in total (295ms).
[13:11:57.276] <TB3> INFO: Test took 1195ms.
[13:11:57.584] <TB3> INFO: Expecting 2560 events.
[13:11:58.467] <TB3> INFO: 2560 events read in total (292ms).
[13:11:58.467] <TB3> INFO: Test took 1191ms.
[13:11:58.775] <TB3> INFO: Expecting 2560 events.
[13:11:59.653] <TB3> INFO: 2560 events read in total (286ms).
[13:11:59.653] <TB3> INFO: Test took 1185ms.
[13:11:59.966] <TB3> INFO: Expecting 2560 events.
[13:12:00.843] <TB3> INFO: 2560 events read in total (285ms).
[13:12:00.844] <TB3> INFO: Test took 1190ms.
[13:12:01.151] <TB3> INFO: Expecting 2560 events.
[13:12:02.029] <TB3> INFO: 2560 events read in total (286ms).
[13:12:02.029] <TB3> INFO: Test took 1185ms.
[13:12:02.338] <TB3> INFO: Expecting 2560 events.
[13:12:03.218] <TB3> INFO: 2560 events read in total (289ms).
[13:12:03.218] <TB3> INFO: Test took 1188ms.
[13:12:03.526] <TB3> INFO: Expecting 2560 events.
[13:12:04.404] <TB3> INFO: 2560 events read in total (286ms).
[13:12:04.405] <TB3> INFO: Test took 1187ms.
[13:12:04.712] <TB3> INFO: Expecting 2560 events.
[13:12:05.595] <TB3> INFO: 2560 events read in total (291ms).
[13:12:05.595] <TB3> INFO: Test took 1190ms.
[13:12:05.903] <TB3> INFO: Expecting 2560 events.
[13:12:06.781] <TB3> INFO: 2560 events read in total (286ms).
[13:12:06.782] <TB3> INFO: Test took 1186ms.
[13:12:07.094] <TB3> INFO: Expecting 2560 events.
[13:12:07.977] <TB3> INFO: 2560 events read in total (292ms).
[13:12:07.977] <TB3> INFO: Test took 1195ms.
[13:12:08.285] <TB3> INFO: Expecting 2560 events.
[13:12:09.168] <TB3> INFO: 2560 events read in total (292ms).
[13:12:09.168] <TB3> INFO: Test took 1191ms.
[13:12:09.476] <TB3> INFO: Expecting 2560 events.
[13:12:10.359] <TB3> INFO: 2560 events read in total (291ms).
[13:12:10.359] <TB3> INFO: Test took 1191ms.
[13:12:10.667] <TB3> INFO: Expecting 2560 events.
[13:12:11.552] <TB3> INFO: 2560 events read in total (293ms).
[13:12:11.552] <TB3> INFO: Test took 1192ms.
[13:12:11.860] <TB3> INFO: Expecting 2560 events.
[13:12:12.746] <TB3> INFO: 2560 events read in total (295ms).
[13:12:12.746] <TB3> INFO: Test took 1193ms.
[13:12:12.749] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:12:13.055] <TB3> INFO: Expecting 655360 events.
[13:12:27.413] <TB3> INFO: 655360 events read in total (13767ms).
[13:12:27.428] <TB3> INFO: Expecting 655360 events.
[13:12:41.661] <TB3> INFO: 655360 events read in total (13830ms).
[13:12:41.681] <TB3> INFO: Expecting 655360 events.
[13:12:55.757] <TB3> INFO: 655360 events read in total (13673ms).
[13:12:55.775] <TB3> INFO: Expecting 655360 events.
[13:13:09.886] <TB3> INFO: 655360 events read in total (13708ms).
[13:13:09.919] <TB3> INFO: Expecting 655360 events.
[13:13:24.043] <TB3> INFO: 655360 events read in total (13721ms).
[13:13:24.071] <TB3> INFO: Expecting 655360 events.
[13:13:38.108] <TB3> INFO: 655360 events read in total (13627ms).
[13:13:38.141] <TB3> INFO: Expecting 655360 events.
[13:13:52.265] <TB3> INFO: 655360 events read in total (13721ms).
[13:13:52.300] <TB3> INFO: Expecting 655360 events.
[13:14:06.345] <TB3> INFO: 655360 events read in total (13642ms).
[13:14:06.397] <TB3> INFO: Expecting 655360 events.
[13:14:20.405] <TB3> INFO: 655360 events read in total (13606ms).
[13:14:20.450] <TB3> INFO: Expecting 655360 events.
[13:14:34.576] <TB3> INFO: 655360 events read in total (13723ms).
[13:14:34.625] <TB3> INFO: Expecting 655360 events.
[13:14:48.693] <TB3> INFO: 655360 events read in total (13665ms).
[13:14:48.753] <TB3> INFO: Expecting 655360 events.
[13:15:02.903] <TB3> INFO: 655360 events read in total (13747ms).
[13:15:02.964] <TB3> INFO: Expecting 655360 events.
[13:15:16.970] <TB3> INFO: 655360 events read in total (13603ms).
[13:15:17.053] <TB3> INFO: Expecting 655360 events.
[13:15:31.227] <TB3> INFO: 655360 events read in total (13771ms).
[13:15:31.320] <TB3> INFO: Expecting 655360 events.
[13:15:45.428] <TB3> INFO: 655360 events read in total (13705ms).
[13:15:45.498] <TB3> INFO: Expecting 655360 events.
[13:15:59.434] <TB3> INFO: 655360 events read in total (13533ms).
[13:15:59.535] <TB3> INFO: Test took 226786ms.
[13:15:59.614] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:15:59.879] <TB3> INFO: Expecting 655360 events.
[13:16:14.070] <TB3> INFO: 655360 events read in total (13600ms).
[13:16:14.080] <TB3> INFO: Expecting 655360 events.
[13:16:28.009] <TB3> INFO: 655360 events read in total (13526ms).
[13:16:28.024] <TB3> INFO: Expecting 655360 events.
[13:16:42.028] <TB3> INFO: 655360 events read in total (13601ms).
[13:16:42.047] <TB3> INFO: Expecting 655360 events.
[13:16:56.183] <TB3> INFO: 655360 events read in total (13720ms).
[13:16:56.213] <TB3> INFO: Expecting 655360 events.
[13:17:10.217] <TB3> INFO: 655360 events read in total (13601ms).
[13:17:10.243] <TB3> INFO: Expecting 655360 events.
[13:17:24.083] <TB3> INFO: 655360 events read in total (13437ms).
[13:17:24.114] <TB3> INFO: Expecting 655360 events.
[13:17:38.141] <TB3> INFO: 655360 events read in total (13624ms).
[13:17:38.176] <TB3> INFO: Expecting 655360 events.
[13:17:52.068] <TB3> INFO: 655360 events read in total (13489ms).
[13:17:52.124] <TB3> INFO: Expecting 655360 events.
[13:18:05.731] <TB3> INFO: 655360 events read in total (13204ms).
[13:18:05.774] <TB3> INFO: Expecting 655360 events.
[13:18:19.847] <TB3> INFO: 655360 events read in total (13670ms).
[13:18:19.912] <TB3> INFO: Expecting 655360 events.
[13:18:34.098] <TB3> INFO: 655360 events read in total (13784ms).
[13:18:34.162] <TB3> INFO: Expecting 655360 events.
[13:18:48.087] <TB3> INFO: 655360 events read in total (13522ms).
[13:18:48.145] <TB3> INFO: Expecting 655360 events.
[13:19:01.978] <TB3> INFO: 655360 events read in total (13430ms).
[13:19:02.039] <TB3> INFO: Expecting 655360 events.
[13:19:15.861] <TB3> INFO: 655360 events read in total (13419ms).
[13:19:15.926] <TB3> INFO: Expecting 655360 events.
[13:19:29.959] <TB3> INFO: 655360 events read in total (13630ms).
[13:19:30.029] <TB3> INFO: Expecting 655360 events.
[13:19:43.792] <TB3> INFO: 655360 events read in total (13349ms).
[13:19:43.865] <TB3> INFO: Test took 224251ms.
[13:19:44.029] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:44.033] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:44.038] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:19:44.042] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:19:44.047] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:44.052] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:44.056] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:44.061] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:44.066] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:44.071] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:19:44.077] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:19:44.085] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:19:44.094] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[13:19:44.103] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[13:19:44.109] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[13:19:44.114] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[13:19:44.119] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:44.124] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:44.130] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:44.135] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:44.140] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:19:44.145] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:44.150] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:19:44.155] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:19:44.160] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:19:44.167] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[13:19:44.172] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[13:19:44.176] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:44.181] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:44.187] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:19:44.191] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:44.198] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:44.232] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C0.dat
[13:19:44.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C1.dat
[13:19:44.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C2.dat
[13:19:44.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C3.dat
[13:19:44.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C4.dat
[13:19:44.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C5.dat
[13:19:44.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C6.dat
[13:19:44.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C7.dat
[13:19:44.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C8.dat
[13:19:44.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C9.dat
[13:19:44.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C10.dat
[13:19:44.233] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C11.dat
[13:19:44.234] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C12.dat
[13:19:44.234] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C13.dat
[13:19:44.234] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C14.dat
[13:19:44.234] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//dacParameters35_C15.dat
[13:19:44.480] <TB3> INFO: Expecting 41600 events.
[13:19:47.583] <TB3> INFO: 41600 events read in total (2511ms).
[13:19:47.584] <TB3> INFO: Test took 3347ms.
[13:19:48.028] <TB3> INFO: Expecting 41600 events.
[13:19:51.028] <TB3> INFO: 41600 events read in total (2408ms).
[13:19:51.028] <TB3> INFO: Test took 3232ms.
[13:19:51.513] <TB3> INFO: Expecting 41600 events.
[13:19:54.614] <TB3> INFO: 41600 events read in total (2509ms).
[13:19:54.615] <TB3> INFO: Test took 3375ms.
[13:19:54.830] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:54.918] <TB3> INFO: Expecting 2560 events.
[13:19:55.806] <TB3> INFO: 2560 events read in total (296ms).
[13:19:55.806] <TB3> INFO: Test took 976ms.
[13:19:55.808] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:56.114] <TB3> INFO: Expecting 2560 events.
[13:19:56.997] <TB3> INFO: 2560 events read in total (291ms).
[13:19:56.997] <TB3> INFO: Test took 1189ms.
[13:19:56.999] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:57.306] <TB3> INFO: Expecting 2560 events.
[13:19:58.189] <TB3> INFO: 2560 events read in total (291ms).
[13:19:58.190] <TB3> INFO: Test took 1191ms.
[13:19:58.192] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:58.498] <TB3> INFO: Expecting 2560 events.
[13:19:59.380] <TB3> INFO: 2560 events read in total (290ms).
[13:19:59.380] <TB3> INFO: Test took 1189ms.
[13:19:59.383] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:59.689] <TB3> INFO: Expecting 2560 events.
[13:20:00.573] <TB3> INFO: 2560 events read in total (292ms).
[13:20:00.573] <TB3> INFO: Test took 1190ms.
[13:20:00.575] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:00.882] <TB3> INFO: Expecting 2560 events.
[13:20:01.766] <TB3> INFO: 2560 events read in total (293ms).
[13:20:01.766] <TB3> INFO: Test took 1192ms.
[13:20:01.769] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:02.074] <TB3> INFO: Expecting 2560 events.
[13:20:02.956] <TB3> INFO: 2560 events read in total (290ms).
[13:20:02.957] <TB3> INFO: Test took 1189ms.
[13:20:02.959] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:03.265] <TB3> INFO: Expecting 2560 events.
[13:20:04.149] <TB3> INFO: 2560 events read in total (292ms).
[13:20:04.150] <TB3> INFO: Test took 1191ms.
[13:20:04.151] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:04.458] <TB3> INFO: Expecting 2560 events.
[13:20:05.336] <TB3> INFO: 2560 events read in total (286ms).
[13:20:05.336] <TB3> INFO: Test took 1185ms.
[13:20:05.338] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:05.645] <TB3> INFO: Expecting 2560 events.
[13:20:06.524] <TB3> INFO: 2560 events read in total (287ms).
[13:20:06.525] <TB3> INFO: Test took 1187ms.
[13:20:06.526] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:06.833] <TB3> INFO: Expecting 2560 events.
[13:20:07.712] <TB3> INFO: 2560 events read in total (288ms).
[13:20:07.712] <TB3> INFO: Test took 1186ms.
[13:20:07.714] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:08.021] <TB3> INFO: Expecting 2560 events.
[13:20:08.898] <TB3> INFO: 2560 events read in total (286ms).
[13:20:08.899] <TB3> INFO: Test took 1185ms.
[13:20:08.901] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:09.207] <TB3> INFO: Expecting 2560 events.
[13:20:10.086] <TB3> INFO: 2560 events read in total (287ms).
[13:20:10.086] <TB3> INFO: Test took 1185ms.
[13:20:10.088] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:10.394] <TB3> INFO: Expecting 2560 events.
[13:20:11.273] <TB3> INFO: 2560 events read in total (287ms).
[13:20:11.274] <TB3> INFO: Test took 1186ms.
[13:20:11.276] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:11.582] <TB3> INFO: Expecting 2560 events.
[13:20:12.462] <TB3> INFO: 2560 events read in total (288ms).
[13:20:12.463] <TB3> INFO: Test took 1187ms.
[13:20:12.465] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:12.771] <TB3> INFO: Expecting 2560 events.
[13:20:13.650] <TB3> INFO: 2560 events read in total (288ms).
[13:20:13.650] <TB3> INFO: Test took 1186ms.
[13:20:13.652] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:13.959] <TB3> INFO: Expecting 2560 events.
[13:20:14.838] <TB3> INFO: 2560 events read in total (288ms).
[13:20:14.839] <TB3> INFO: Test took 1187ms.
[13:20:14.841] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:15.147] <TB3> INFO: Expecting 2560 events.
[13:20:16.026] <TB3> INFO: 2560 events read in total (287ms).
[13:20:16.027] <TB3> INFO: Test took 1186ms.
[13:20:16.029] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:16.335] <TB3> INFO: Expecting 2560 events.
[13:20:17.213] <TB3> INFO: 2560 events read in total (286ms).
[13:20:17.213] <TB3> INFO: Test took 1184ms.
[13:20:17.215] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:17.522] <TB3> INFO: Expecting 2560 events.
[13:20:18.400] <TB3> INFO: 2560 events read in total (287ms).
[13:20:18.401] <TB3> INFO: Test took 1186ms.
[13:20:18.403] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:18.709] <TB3> INFO: Expecting 2560 events.
[13:20:19.587] <TB3> INFO: 2560 events read in total (287ms).
[13:20:19.587] <TB3> INFO: Test took 1185ms.
[13:20:19.589] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:19.896] <TB3> INFO: Expecting 2560 events.
[13:20:20.773] <TB3> INFO: 2560 events read in total (286ms).
[13:20:20.774] <TB3> INFO: Test took 1185ms.
[13:20:20.776] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:21.082] <TB3> INFO: Expecting 2560 events.
[13:20:21.962] <TB3> INFO: 2560 events read in total (288ms).
[13:20:21.962] <TB3> INFO: Test took 1187ms.
[13:20:21.964] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:22.270] <TB3> INFO: Expecting 2560 events.
[13:20:23.151] <TB3> INFO: 2560 events read in total (289ms).
[13:20:23.151] <TB3> INFO: Test took 1187ms.
[13:20:23.152] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:23.462] <TB3> INFO: Expecting 2560 events.
[13:20:24.346] <TB3> INFO: 2560 events read in total (292ms).
[13:20:24.346] <TB3> INFO: Test took 1194ms.
[13:20:24.348] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:24.661] <TB3> INFO: Expecting 2560 events.
[13:20:25.551] <TB3> INFO: 2560 events read in total (297ms).
[13:20:25.551] <TB3> INFO: Test took 1203ms.
[13:20:25.553] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:25.860] <TB3> INFO: Expecting 2560 events.
[13:20:26.743] <TB3> INFO: 2560 events read in total (292ms).
[13:20:26.743] <TB3> INFO: Test took 1190ms.
[13:20:26.745] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:27.052] <TB3> INFO: Expecting 2560 events.
[13:20:27.940] <TB3> INFO: 2560 events read in total (297ms).
[13:20:27.940] <TB3> INFO: Test took 1195ms.
[13:20:27.942] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:28.248] <TB3> INFO: Expecting 2560 events.
[13:20:29.135] <TB3> INFO: 2560 events read in total (295ms).
[13:20:29.136] <TB3> INFO: Test took 1194ms.
[13:20:29.137] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:29.444] <TB3> INFO: Expecting 2560 events.
[13:20:30.331] <TB3> INFO: 2560 events read in total (295ms).
[13:20:30.332] <TB3> INFO: Test took 1195ms.
[13:20:30.334] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:30.640] <TB3> INFO: Expecting 2560 events.
[13:20:31.525] <TB3> INFO: 2560 events read in total (293ms).
[13:20:31.525] <TB3> INFO: Test took 1192ms.
[13:20:31.527] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:31.833] <TB3> INFO: Expecting 2560 events.
[13:20:32.716] <TB3> INFO: 2560 events read in total (292ms).
[13:20:32.717] <TB3> INFO: Test took 1191ms.
[13:20:33.180] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 631 seconds
[13:20:33.180] <TB3> INFO: PH scale (per ROC): 52 48 57 46 37 58 42 55 50 42 45 33 60 49 51 46
[13:20:33.180] <TB3> INFO: PH offset (per ROC): 102 111 117 101 103 122 98 119 109 100 107 102 136 137 98 97
[13:20:33.186] <TB3> INFO: Decoding statistics:
[13:20:33.186] <TB3> INFO: General information:
[13:20:33.186] <TB3> INFO: 16bit words read: 127886
[13:20:33.186] <TB3> INFO: valid events total: 20480
[13:20:33.186] <TB3> INFO: empty events: 17977
[13:20:33.186] <TB3> INFO: valid events with pixels: 2503
[13:20:33.186] <TB3> INFO: valid pixel hits: 2503
[13:20:33.186] <TB3> INFO: Event errors: 0
[13:20:33.186] <TB3> INFO: start marker: 0
[13:20:33.186] <TB3> INFO: stop marker: 0
[13:20:33.186] <TB3> INFO: overflow: 0
[13:20:33.186] <TB3> INFO: invalid 5bit words: 0
[13:20:33.186] <TB3> INFO: invalid XOR eye diagram: 0
[13:20:33.186] <TB3> INFO: frame (failed synchr.): 0
[13:20:33.186] <TB3> INFO: idle data (no TBM trl): 0
[13:20:33.186] <TB3> INFO: no data (only TBM hdr): 0
[13:20:33.186] <TB3> INFO: TBM errors: 0
[13:20:33.186] <TB3> INFO: flawed TBM headers: 0
[13:20:33.186] <TB3> INFO: flawed TBM trailers: 0
[13:20:33.186] <TB3> INFO: event ID mismatches: 0
[13:20:33.186] <TB3> INFO: ROC errors: 0
[13:20:33.186] <TB3> INFO: missing ROC header(s): 0
[13:20:33.186] <TB3> INFO: misplaced readback start: 0
[13:20:33.186] <TB3> INFO: Pixel decoding errors: 0
[13:20:33.186] <TB3> INFO: pixel data incomplete: 0
[13:20:33.186] <TB3> INFO: pixel address: 0
[13:20:33.186] <TB3> INFO: pulse height fill bit: 0
[13:20:33.186] <TB3> INFO: buffer corruption: 0
[13:20:33.475] <TB3> INFO: ######################################################################
[13:20:33.475] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:20:33.475] <TB3> INFO: ######################################################################
[13:20:33.488] <TB3> INFO: scanning low vcal = 10
[13:20:33.778] <TB3> INFO: Expecting 41600 events.
[13:20:37.364] <TB3> INFO: 41600 events read in total (2995ms).
[13:20:37.364] <TB3> INFO: Test took 3876ms.
[13:20:37.365] <TB3> INFO: scanning low vcal = 20
[13:20:37.665] <TB3> INFO: Expecting 41600 events.
[13:20:41.259] <TB3> INFO: 41600 events read in total (2992ms).
[13:20:41.260] <TB3> INFO: Test took 3894ms.
[13:20:41.261] <TB3> INFO: scanning low vcal = 30
[13:20:41.560] <TB3> INFO: Expecting 41600 events.
[13:20:45.217] <TB3> INFO: 41600 events read in total (3065ms).
[13:20:45.218] <TB3> INFO: Test took 3957ms.
[13:20:45.220] <TB3> INFO: scanning low vcal = 40
[13:20:45.497] <TB3> INFO: Expecting 41600 events.
[13:20:49.457] <TB3> INFO: 41600 events read in total (3369ms).
[13:20:49.458] <TB3> INFO: Test took 4238ms.
[13:20:49.461] <TB3> INFO: scanning low vcal = 50
[13:20:49.738] <TB3> INFO: Expecting 41600 events.
[13:20:53.792] <TB3> INFO: 41600 events read in total (3463ms).
[13:20:53.792] <TB3> INFO: Test took 4331ms.
[13:20:53.795] <TB3> INFO: scanning low vcal = 60
[13:20:54.072] <TB3> INFO: Expecting 41600 events.
[13:20:58.042] <TB3> INFO: 41600 events read in total (3379ms).
[13:20:58.043] <TB3> INFO: Test took 4248ms.
[13:20:58.045] <TB3> INFO: scanning low vcal = 70
[13:20:58.322] <TB3> INFO: Expecting 41600 events.
[13:21:02.299] <TB3> INFO: 41600 events read in total (3386ms).
[13:21:02.300] <TB3> INFO: Test took 4255ms.
[13:21:02.303] <TB3> INFO: scanning low vcal = 80
[13:21:02.579] <TB3> INFO: Expecting 41600 events.
[13:21:06.541] <TB3> INFO: 41600 events read in total (3370ms).
[13:21:06.541] <TB3> INFO: Test took 4238ms.
[13:21:06.544] <TB3> INFO: scanning low vcal = 90
[13:21:06.821] <TB3> INFO: Expecting 41600 events.
[13:21:10.776] <TB3> INFO: 41600 events read in total (3364ms).
[13:21:10.777] <TB3> INFO: Test took 4233ms.
[13:21:10.780] <TB3> INFO: scanning low vcal = 100
[13:21:11.057] <TB3> INFO: Expecting 41600 events.
[13:21:15.043] <TB3> INFO: 41600 events read in total (3395ms).
[13:21:15.043] <TB3> INFO: Test took 4263ms.
[13:21:15.046] <TB3> INFO: scanning low vcal = 110
[13:21:15.323] <TB3> INFO: Expecting 41600 events.
[13:21:19.345] <TB3> INFO: 41600 events read in total (3431ms).
[13:21:19.345] <TB3> INFO: Test took 4299ms.
[13:21:19.348] <TB3> INFO: scanning low vcal = 120
[13:21:19.624] <TB3> INFO: Expecting 41600 events.
[13:21:23.609] <TB3> INFO: 41600 events read in total (3393ms).
[13:21:23.609] <TB3> INFO: Test took 4261ms.
[13:21:23.612] <TB3> INFO: scanning low vcal = 130
[13:21:23.889] <TB3> INFO: Expecting 41600 events.
[13:21:27.908] <TB3> INFO: 41600 events read in total (3428ms).
[13:21:27.908] <TB3> INFO: Test took 4296ms.
[13:21:27.911] <TB3> INFO: scanning low vcal = 140
[13:21:28.188] <TB3> INFO: Expecting 41600 events.
[13:21:32.176] <TB3> INFO: 41600 events read in total (3396ms).
[13:21:32.176] <TB3> INFO: Test took 4265ms.
[13:21:32.179] <TB3> INFO: scanning low vcal = 150
[13:21:32.456] <TB3> INFO: Expecting 41600 events.
[13:21:36.482] <TB3> INFO: 41600 events read in total (3435ms).
[13:21:36.483] <TB3> INFO: Test took 4304ms.
[13:21:36.485] <TB3> INFO: scanning low vcal = 160
[13:21:36.762] <TB3> INFO: Expecting 41600 events.
[13:21:40.781] <TB3> INFO: 41600 events read in total (3427ms).
[13:21:40.782] <TB3> INFO: Test took 4297ms.
[13:21:40.784] <TB3> INFO: scanning low vcal = 170
[13:21:41.061] <TB3> INFO: Expecting 41600 events.
[13:21:45.014] <TB3> INFO: 41600 events read in total (3361ms).
[13:21:45.015] <TB3> INFO: Test took 4231ms.
[13:21:45.017] <TB3> INFO: scanning low vcal = 180
[13:21:45.294] <TB3> INFO: Expecting 41600 events.
[13:21:49.287] <TB3> INFO: 41600 events read in total (3401ms).
[13:21:49.288] <TB3> INFO: Test took 4271ms.
[13:21:49.290] <TB3> INFO: scanning low vcal = 190
[13:21:49.598] <TB3> INFO: Expecting 41600 events.
[13:21:53.605] <TB3> INFO: 41600 events read in total (3415ms).
[13:21:53.605] <TB3> INFO: Test took 4314ms.
[13:21:53.608] <TB3> INFO: scanning low vcal = 200
[13:21:53.885] <TB3> INFO: Expecting 41600 events.
[13:21:57.925] <TB3> INFO: 41600 events read in total (3448ms).
[13:21:57.926] <TB3> INFO: Test took 4318ms.
[13:21:57.929] <TB3> INFO: scanning low vcal = 210
[13:21:58.236] <TB3> INFO: Expecting 41600 events.
[13:22:02.303] <TB3> INFO: 41600 events read in total (3475ms).
[13:22:02.303] <TB3> INFO: Test took 4374ms.
[13:22:02.306] <TB3> INFO: scanning low vcal = 220
[13:22:02.618] <TB3> INFO: Expecting 41600 events.
[13:22:06.602] <TB3> INFO: 41600 events read in total (3392ms).
[13:22:06.603] <TB3> INFO: Test took 4297ms.
[13:22:06.605] <TB3> INFO: scanning low vcal = 230
[13:22:06.882] <TB3> INFO: Expecting 41600 events.
[13:22:10.891] <TB3> INFO: 41600 events read in total (3417ms).
[13:22:10.891] <TB3> INFO: Test took 4286ms.
[13:22:10.894] <TB3> INFO: scanning low vcal = 240
[13:22:11.201] <TB3> INFO: Expecting 41600 events.
[13:22:15.156] <TB3> INFO: 41600 events read in total (3363ms).
[13:22:15.157] <TB3> INFO: Test took 4263ms.
[13:22:15.159] <TB3> INFO: scanning low vcal = 250
[13:22:15.436] <TB3> INFO: Expecting 41600 events.
[13:22:19.441] <TB3> INFO: 41600 events read in total (3413ms).
[13:22:19.442] <TB3> INFO: Test took 4283ms.
[13:22:19.446] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[13:22:19.722] <TB3> INFO: Expecting 41600 events.
[13:22:23.720] <TB3> INFO: 41600 events read in total (3406ms).
[13:22:23.720] <TB3> INFO: Test took 4274ms.
[13:22:23.723] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[13:22:23.000] <TB3> INFO: Expecting 41600 events.
[13:22:28.032] <TB3> INFO: 41600 events read in total (3441ms).
[13:22:28.033] <TB3> INFO: Test took 4310ms.
[13:22:28.036] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[13:22:28.347] <TB3> INFO: Expecting 41600 events.
[13:22:32.335] <TB3> INFO: 41600 events read in total (3397ms).
[13:22:32.336] <TB3> INFO: Test took 4300ms.
[13:22:32.338] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[13:22:32.615] <TB3> INFO: Expecting 41600 events.
[13:22:36.652] <TB3> INFO: 41600 events read in total (3445ms).
[13:22:36.653] <TB3> INFO: Test took 4315ms.
[13:22:36.656] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:22:36.968] <TB3> INFO: Expecting 41600 events.
[13:22:40.988] <TB3> INFO: 41600 events read in total (3429ms).
[13:22:40.989] <TB3> INFO: Test took 4333ms.
[13:22:41.393] <TB3> INFO: PixTestGainPedestal::measure() done
[13:23:16.231] <TB3> INFO: PixTestGainPedestal::fit() done
[13:23:16.231] <TB3> INFO: non-linearity mean: 0.943 0.938 0.974 0.926 0.926 0.985 0.936 0.976 0.957 0.946 0.928 1.031 0.981 0.976 0.956 0.959
[13:23:16.231] <TB3> INFO: non-linearity RMS: 0.083 0.113 0.011 0.083 0.152 0.003 0.148 0.025 0.057 0.134 0.173 0.176 0.006 0.004 0.046 0.025
[13:23:16.231] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[13:23:16.245] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[13:23:16.259] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[13:23:16.272] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[13:23:16.286] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[13:23:16.300] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[13:23:16.313] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[13:23:16.327] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[13:23:16.340] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[13:23:16.354] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[13:23:16.367] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[13:23:16.381] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[13:23:16.394] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[13:23:16.408] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[13:23:16.421] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[13:23:16.435] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1072_FullQualification_2016-10-25_11h21m_1477387273//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[13:23:16.449] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 162 seconds
[13:23:16.449] <TB3> INFO: Decoding statistics:
[13:23:16.449] <TB3> INFO: General information:
[13:23:16.449] <TB3> INFO: 16bit words read: 3327672
[13:23:16.449] <TB3> INFO: valid events total: 332800
[13:23:16.449] <TB3> INFO: empty events: 0
[13:23:16.449] <TB3> INFO: valid events with pixels: 332800
[13:23:16.449] <TB3> INFO: valid pixel hits: 665426
[13:23:16.449] <TB3> INFO: Event errors: 0
[13:23:16.449] <TB3> INFO: start marker: 0
[13:23:16.449] <TB3> INFO: stop marker: 0
[13:23:16.449] <TB3> INFO: overflow: 0
[13:23:16.449] <TB3> INFO: invalid 5bit words: 0
[13:23:16.449] <TB3> INFO: invalid XOR eye diagram: 0
[13:23:16.449] <TB3> INFO: frame (failed synchr.): 0
[13:23:16.449] <TB3> INFO: idle data (no TBM trl): 0
[13:23:16.449] <TB3> INFO: no data (only TBM hdr): 0
[13:23:16.449] <TB3> INFO: TBM errors: 0
[13:23:16.449] <TB3> INFO: flawed TBM headers: 0
[13:23:16.449] <TB3> INFO: flawed TBM trailers: 0
[13:23:16.449] <TB3> INFO: event ID mismatches: 0
[13:23:16.449] <TB3> INFO: ROC errors: 0
[13:23:16.449] <TB3> INFO: missing ROC header(s): 0
[13:23:16.449] <TB3> INFO: misplaced readback start: 0
[13:23:16.449] <TB3> INFO: Pixel decoding errors: 10
[13:23:16.449] <TB3> INFO: pixel data incomplete: 0
[13:23:16.449] <TB3> INFO: pixel address: 0
[13:23:16.449] <TB3> INFO: pulse height fill bit: 0
[13:23:16.449] <TB3> INFO: buffer corruption: 10