[06:39:44.788] <TB0> INFO: *** Welcome to pxar ***
[06:39:44.788] <TB0> INFO: *** Today: 2016/11/04
[06:39:44.794] <TB0> INFO: *** Version: c8ba-dirty
[06:39:44.794] <TB0> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters_C15.dat
[06:39:44.795] <TB0> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[06:39:44.795] <TB0> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//defaultMaskFile.dat
[06:39:44.795] <TB0> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters_C15.dat
[06:39:44.855] <TB0> INFO: clk: 4
[06:39:44.855] <TB0> INFO: ctr: 4
[06:39:44.855] <TB0> INFO: sda: 19
[06:39:44.855] <TB0> INFO: tin: 9
[06:39:44.856] <TB0> INFO: level: 15
[06:39:44.856] <TB0> INFO: triggerdelay: 0
[06:39:44.856] <TB0> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[06:39:44.856] <TB0> INFO: Log level: INFO
[06:39:44.865] <TB0> INFO: Found DTB DTB_WRQ4OZ
[06:39:44.875] <TB0> QUIET: Connection to board DTB_WRQ4OZ opened.
[06:39:44.877] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 71
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WRQ4OZ
MAC address: 40D855118047
Hostname: pixelDTB071
Comment:
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[06:39:44.879] <TB0> INFO: RPC call hashes of host and DTB match: 486171790
[06:39:46.367] <TB0> INFO: DUT info:
[06:39:46.367] <TB0> INFO: The DUT currently contains the following objects:
[06:39:46.367] <TB0> INFO: 4 TBM Cores tbm10c (4 ON)
[06:39:46.367] <TB0> INFO: TBM Core alpha (0): 7 registers set
[06:39:46.367] <TB0> INFO: TBM Core beta (1): 7 registers set
[06:39:46.367] <TB0> INFO: TBM Core alpha (2): 7 registers set
[06:39:46.367] <TB0> INFO: TBM Core beta (3): 7 registers set
[06:39:46.367] <TB0> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[06:39:46.367] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[06:39:46.367] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[06:39:46.367] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[06:39:46.367] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[06:39:46.367] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[06:39:46.367] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[06:39:46.367] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[06:39:46.367] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[06:39:46.367] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[06:39:46.367] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[06:39:46.367] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[06:39:46.368] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[06:39:46.368] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[06:39:46.368] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[06:39:46.368] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[06:39:46.368] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[06:39:46.769] <TB0> INFO: enter 'restricted' command line mode
[06:39:46.769] <TB0> INFO: enter test to run
[06:39:46.769] <TB0> INFO: test: pretest no parameter change
[06:39:46.769] <TB0> INFO: running: pretest
[06:39:46.773] <TB0> INFO: ######################################################################
[06:39:46.773] <TB0> INFO: PixTestPretest::doTest()
[06:39:46.773] <TB0> INFO: ######################################################################
[06:39:46.774] <TB0> INFO: ----------------------------------------------------------------------
[06:39:46.774] <TB0> INFO: PixTestPretest::programROC()
[06:39:46.774] <TB0> INFO: ----------------------------------------------------------------------
[06:40:04.788] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[06:40:04.788] <TB0> INFO: IA differences per ROC: 17.7 17.7 18.5 17.7 20.1 18.5 17.7 19.3 20.9 18.5 20.1 18.5 17.7 17.7 20.1 20.1
[06:40:04.855] <TB0> INFO: ----------------------------------------------------------------------
[06:40:04.855] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[06:40:04.855] <TB0> INFO: ----------------------------------------------------------------------
[06:40:13.347] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 386.7 mA = 24.1687 mA/ROC
[06:40:13.347] <TB0> INFO: i(loss) [mA/ROC]: 19.3 19.3 19.3 19.3 19.3 20.1 19.3 19.3 19.3 18.5 19.3 18.5 20.1 19.3 19.3 18.5
[06:40:13.378] <TB0> INFO: ----------------------------------------------------------------------
[06:40:13.378] <TB0> INFO: PixTestPretest::findTiming()
[06:40:13.378] <TB0> INFO: ----------------------------------------------------------------------
[06:40:13.378] <TB0> INFO: PixTestCmd::init()

[06:40:45.756] <TB0> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[06:40:45.756] <TB0> INFO: (success/tries = 100/100), width = 4
[06:40:47.254] <TB0> INFO: ----------------------------------------------------------------------
[06:40:47.254] <TB0> INFO: PixTestPretest::findWorkingPixel()
[06:40:47.254] <TB0> INFO: ----------------------------------------------------------------------
[06:40:47.349] <TB0> INFO: Expecting 231680 events.
[06:40:57.321] <TB0> INFO: 231680 events read in total (9380ms).
[06:40:57.330] <TB0> INFO: Test took 10071ms.
[06:40:57.582] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[06:40:57.617] <TB0> INFO: ----------------------------------------------------------------------
[06:40:57.617] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[06:40:57.617] <TB0> INFO: ----------------------------------------------------------------------
[06:40:57.711] <TB0> INFO: Expecting 231680 events.
[06:41:07.505] <TB0> INFO: 231680 events read in total (9202ms).
[06:41:07.516] <TB0> INFO: Test took 9894ms.
[06:41:07.782] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[06:41:07.782] <TB0> INFO: CalDel: 93 92 85 84 94 103 77 82 100 83 104 79 89 103 108 83
[06:41:07.782] <TB0> INFO: VthrComp: 53 53 51 51 57 53 51 53 51 51 51 51 51 51 56 53
[06:41:07.785] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters_C0.dat
[06:41:07.786] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters_C1.dat
[06:41:07.786] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters_C2.dat
[06:41:07.786] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters_C3.dat
[06:41:07.786] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters_C4.dat
[06:41:07.787] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters_C5.dat
[06:41:07.787] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters_C6.dat
[06:41:07.787] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters_C7.dat
[06:41:07.787] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters_C8.dat
[06:41:07.787] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters_C9.dat
[06:41:07.788] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters_C10.dat
[06:41:07.788] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters_C11.dat
[06:41:07.788] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters_C12.dat
[06:41:07.788] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters_C13.dat
[06:41:07.788] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters_C14.dat
[06:41:07.788] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters_C15.dat
[06:41:07.789] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//tbmParameters_C0a.dat
[06:41:07.789] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//tbmParameters_C0b.dat
[06:41:07.789] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//tbmParameters_C1a.dat
[06:41:07.789] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[06:41:07.789] <TB0> INFO: PixTestPretest::doTest() done, duration: 81 seconds
[06:41:07.844] <TB0> INFO: enter test to run
[06:41:07.844] <TB0> INFO: test: fulltest no parameter change
[06:41:07.844] <TB0> INFO: running: fulltest
[06:41:07.844] <TB0> INFO: ######################################################################
[06:41:07.844] <TB0> INFO: PixTestFullTest::doTest()
[06:41:07.844] <TB0> INFO: ######################################################################
[06:41:07.845] <TB0> INFO: ######################################################################
[06:41:07.845] <TB0> INFO: PixTestAlive::doTest()
[06:41:07.846] <TB0> INFO: ######################################################################
[06:41:07.847] <TB0> INFO: ----------------------------------------------------------------------
[06:41:07.847] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[06:41:07.847] <TB0> INFO: ----------------------------------------------------------------------
[06:41:08.085] <TB0> INFO: Expecting 41600 events.
[06:41:11.718] <TB0> INFO: 41600 events read in total (3041ms).
[06:41:11.719] <TB0> INFO: Test took 3871ms.
[06:41:11.953] <TB0> INFO: PixTestAlive::aliveTest() done
[06:41:11.953] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 2 0 0 0 2 0 0 0 0 0 0
[06:41:11.955] <TB0> INFO: ----------------------------------------------------------------------
[06:41:11.955] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[06:41:11.955] <TB0> INFO: ----------------------------------------------------------------------
[06:41:12.198] <TB0> INFO: Expecting 41600 events.
[06:41:15.166] <TB0> INFO: 41600 events read in total (2376ms).
[06:41:15.166] <TB0> INFO: Test took 3209ms.
[06:41:15.166] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[06:41:15.406] <TB0> INFO: PixTestAlive::maskTest() done
[06:41:15.406] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[06:41:15.408] <TB0> INFO: ----------------------------------------------------------------------
[06:41:15.408] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[06:41:15.408] <TB0> INFO: ----------------------------------------------------------------------
[06:41:15.656] <TB0> INFO: Expecting 41600 events.
[06:41:19.226] <TB0> INFO: 41600 events read in total (2978ms).
[06:41:19.227] <TB0> INFO: Test took 3817ms.
[06:41:19.460] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[06:41:19.460] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[06:41:19.461] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[06:41:19.461] <TB0> INFO: Decoding statistics:
[06:41:19.461] <TB0> INFO: General information:
[06:41:19.461] <TB0> INFO: 16bit words read: 0
[06:41:19.461] <TB0> INFO: valid events total: 0
[06:41:19.461] <TB0> INFO: empty events: 0
[06:41:19.461] <TB0> INFO: valid events with pixels: 0
[06:41:19.461] <TB0> INFO: valid pixel hits: 0
[06:41:19.461] <TB0> INFO: Event errors: 0
[06:41:19.461] <TB0> INFO: start marker: 0
[06:41:19.461] <TB0> INFO: stop marker: 0
[06:41:19.461] <TB0> INFO: overflow: 0
[06:41:19.461] <TB0> INFO: invalid 5bit words: 0
[06:41:19.461] <TB0> INFO: invalid XOR eye diagram: 0
[06:41:19.461] <TB0> INFO: frame (failed synchr.): 0
[06:41:19.461] <TB0> INFO: idle data (no TBM trl): 0
[06:41:19.461] <TB0> INFO: no data (only TBM hdr): 0
[06:41:19.461] <TB0> INFO: TBM errors: 0
[06:41:19.461] <TB0> INFO: flawed TBM headers: 0
[06:41:19.461] <TB0> INFO: flawed TBM trailers: 0
[06:41:19.461] <TB0> INFO: event ID mismatches: 0
[06:41:19.461] <TB0> INFO: ROC errors: 0
[06:41:19.461] <TB0> INFO: missing ROC header(s): 0
[06:41:19.461] <TB0> INFO: misplaced readback start: 0
[06:41:19.461] <TB0> INFO: Pixel decoding errors: 0
[06:41:19.461] <TB0> INFO: pixel data incomplete: 0
[06:41:19.461] <TB0> INFO: pixel address: 0
[06:41:19.461] <TB0> INFO: pulse height fill bit: 0
[06:41:19.461] <TB0> INFO: buffer corruption: 0
[06:41:19.472] <TB0> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C15.dat
[06:41:19.472] <TB0> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//phCalibrationFitErr_C15.dat

[06:41:19.472] <TB0> INFO: ######################################################################
[06:41:19.472] <TB0> INFO: PixTestReadback::doTest()
[06:41:19.472] <TB0> INFO: ######################################################################
[06:41:19.472] <TB0> INFO: ----------------------------------------------------------------------
[06:41:19.472] <TB0> INFO: PixTestReadback::CalibrateVd()
[06:41:19.472] <TB0> INFO: ----------------------------------------------------------------------
[06:41:29.418] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C0.dat
[06:41:29.419] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C1.dat
[06:41:29.419] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C2.dat
[06:41:29.419] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C3.dat
[06:41:29.419] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C4.dat
[06:41:29.419] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C5.dat
[06:41:29.419] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C6.dat
[06:41:29.419] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C7.dat
[06:41:29.419] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C8.dat
[06:41:29.419] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C9.dat
[06:41:29.419] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C10.dat
[06:41:29.419] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C11.dat
[06:41:29.419] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C12.dat
[06:41:29.419] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C13.dat
[06:41:29.419] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C14.dat
[06:41:29.419] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C15.dat
[06:41:29.446] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[06:41:29.447] <TB0> INFO: ----------------------------------------------------------------------
[06:41:29.447] <TB0> INFO: PixTestReadback::CalibrateVa()
[06:41:29.447] <TB0> INFO: ----------------------------------------------------------------------
[06:41:39.370] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C0.dat
[06:41:39.370] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C1.dat
[06:41:39.370] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C2.dat
[06:41:39.370] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C3.dat
[06:41:39.371] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C4.dat
[06:41:39.371] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C5.dat
[06:41:39.371] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C6.dat
[06:41:39.371] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C7.dat
[06:41:39.371] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C8.dat
[06:41:39.371] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C9.dat
[06:41:39.371] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C10.dat
[06:41:39.371] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C11.dat
[06:41:39.371] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C12.dat
[06:41:39.371] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C13.dat
[06:41:39.371] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C14.dat
[06:41:39.371] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C15.dat
[06:41:39.398] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[06:41:39.398] <TB0> INFO: ----------------------------------------------------------------------
[06:41:39.398] <TB0> INFO: PixTestReadback::readbackVbg()
[06:41:39.398] <TB0> INFO: ----------------------------------------------------------------------
[06:41:47.064] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[06:41:47.064] <TB0> INFO: ----------------------------------------------------------------------
[06:41:47.064] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[06:41:47.064] <TB0> INFO: ----------------------------------------------------------------------
[06:41:47.065] <TB0> INFO: Vbg will be calibrated using Vd calibration
[06:41:47.065] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 160.9calibrated Vbg = 1.18261 :::*/*/*/*/
[06:41:47.065] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 149.1calibrated Vbg = 1.18468 :::*/*/*/*/
[06:41:47.065] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 152.2calibrated Vbg = 1.18097 :::*/*/*/*/
[06:41:47.065] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 159.6calibrated Vbg = 1.17703 :::*/*/*/*/
[06:41:47.065] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 159.6calibrated Vbg = 1.18249 :::*/*/*/*/
[06:41:47.065] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 148.9calibrated Vbg = 1.18808 :::*/*/*/*/
[06:41:47.065] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 152.7calibrated Vbg = 1.18622 :::*/*/*/*/
[06:41:47.065] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 151.3calibrated Vbg = 1.18836 :::*/*/*/*/
[06:41:47.065] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 149.6calibrated Vbg = 1.18063 :::*/*/*/*/
[06:41:47.065] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 157.5calibrated Vbg = 1.1784 :::*/*/*/*/
[06:41:47.065] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 143.2calibrated Vbg = 1.17463 :::*/*/*/*/
[06:41:47.065] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 160.5calibrated Vbg = 1.16889 :::*/*/*/*/
[06:41:47.065] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 159.7calibrated Vbg = 1.1778 :::*/*/*/*/
[06:41:47.065] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 156.1calibrated Vbg = 1.18745 :::*/*/*/*/
[06:41:47.065] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 158.5calibrated Vbg = 1.18534 :::*/*/*/*/
[06:41:47.065] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 157calibrated Vbg = 1.1852 :::*/*/*/*/
[06:41:47.068] <TB0> INFO: ----------------------------------------------------------------------
[06:41:47.068] <TB0> INFO: PixTestReadback::CalibrateIa()
[06:41:47.068] <TB0> INFO: ----------------------------------------------------------------------
[06:44:27.888] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C0.dat
[06:44:27.889] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C1.dat
[06:44:27.889] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C2.dat
[06:44:27.889] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C3.dat
[06:44:27.889] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C4.dat
[06:44:27.889] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C5.dat
[06:44:27.889] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C6.dat
[06:44:27.889] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C7.dat
[06:44:27.889] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C8.dat
[06:44:27.889] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C9.dat
[06:44:27.889] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C10.dat
[06:44:27.889] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C11.dat
[06:44:27.889] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C12.dat
[06:44:27.889] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C13.dat
[06:44:27.889] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C14.dat
[06:44:27.889] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//readbackCal_C15.dat
[06:44:27.917] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[06:44:27.919] <TB0> INFO: PixTestReadback::doTest() done
[06:44:27.920] <TB0> INFO: Decoding statistics:
[06:44:27.920] <TB0> INFO: General information:
[06:44:27.920] <TB0> INFO: 16bit words read: 1536
[06:44:27.920] <TB0> INFO: valid events total: 256
[06:44:27.920] <TB0> INFO: empty events: 256
[06:44:27.920] <TB0> INFO: valid events with pixels: 0
[06:44:27.920] <TB0> INFO: valid pixel hits: 0
[06:44:27.920] <TB0> INFO: Event errors: 0
[06:44:27.920] <TB0> INFO: start marker: 0
[06:44:27.920] <TB0> INFO: stop marker: 0
[06:44:27.920] <TB0> INFO: overflow: 0
[06:44:27.920] <TB0> INFO: invalid 5bit words: 0
[06:44:27.920] <TB0> INFO: invalid XOR eye diagram: 0
[06:44:27.920] <TB0> INFO: frame (failed synchr.): 0
[06:44:27.920] <TB0> INFO: idle data (no TBM trl): 0
[06:44:27.920] <TB0> INFO: no data (only TBM hdr): 0
[06:44:27.920] <TB0> INFO: TBM errors: 0
[06:44:27.920] <TB0> INFO: flawed TBM headers: 0
[06:44:27.920] <TB0> INFO: flawed TBM trailers: 0
[06:44:27.920] <TB0> INFO: event ID mismatches: 0
[06:44:27.920] <TB0> INFO: ROC errors: 0
[06:44:27.920] <TB0> INFO: missing ROC header(s): 0
[06:44:27.920] <TB0> INFO: misplaced readback start: 0
[06:44:27.920] <TB0> INFO: Pixel decoding errors: 0
[06:44:27.920] <TB0> INFO: pixel data incomplete: 0
[06:44:27.920] <TB0> INFO: pixel address: 0
[06:44:27.920] <TB0> INFO: pulse height fill bit: 0
[06:44:27.920] <TB0> INFO: buffer corruption: 0
[06:44:27.975] <TB0> INFO: ######################################################################
[06:44:27.975] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[06:44:27.975] <TB0> INFO: ######################################################################
[06:44:27.978] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[06:44:28.051] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[06:44:28.051] <TB0> INFO: run 1 of 1
[06:44:28.287] <TB0> INFO: Expecting 3120000 events.
[06:45:00.172] <TB0> INFO: 674995 events read in total (31293ms).











[06:45:30.654] <TB0> INFO: 1344620 events read in total (61775ms).











[06:46:01.058] <TB0> INFO: 2010870 events read in total (92179ms).











[06:46:31.694] <TB0> INFO: 2673580 events read in total (122815ms).











[06:46:52.015] <TB0> INFO: 3120000 events read in total (143136ms).
[06:46:52.110] <TB0> INFO: Test took 144061ms.
[06:47:16.667] <TB0> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 168 seconds
[06:47:16.667] <TB0> INFO: number of dead bumps (per ROC): 2 2 1 4 0 2 0 0 1 1 5 4 1 3 1 1
[06:47:16.667] <TB0> INFO: separation cut (per ROC): 106 103 107 105 109 108 105 107 105 107 104 107 107 106 108 105
[06:47:16.667] <TB0> INFO: Decoding statistics:
[06:47:16.667] <TB0> INFO: General information:
[06:47:16.667] <TB0> INFO: 16bit words read: 0
[06:47:16.667] <TB0> INFO: valid events total: 0
[06:47:16.667] <TB0> INFO: empty events: 0
[06:47:16.667] <TB0> INFO: valid events with pixels: 0
[06:47:16.667] <TB0> INFO: valid pixel hits: 0
[06:47:16.667] <TB0> INFO: Event errors: 0
[06:47:16.667] <TB0> INFO: start marker: 0
[06:47:16.667] <TB0> INFO: stop marker: 0
[06:47:16.667] <TB0> INFO: overflow: 0
[06:47:16.667] <TB0> INFO: invalid 5bit words: 0
[06:47:16.667] <TB0> INFO: invalid XOR eye diagram: 0
[06:47:16.667] <TB0> INFO: frame (failed synchr.): 0
[06:47:16.667] <TB0> INFO: idle data (no TBM trl): 0
[06:47:16.667] <TB0> INFO: no data (only TBM hdr): 0
[06:47:16.667] <TB0> INFO: TBM errors: 0
[06:47:16.667] <TB0> INFO: flawed TBM headers: 0
[06:47:16.667] <TB0> INFO: flawed TBM trailers: 0
[06:47:16.667] <TB0> INFO: event ID mismatches: 0
[06:47:16.667] <TB0> INFO: ROC errors: 0
[06:47:16.667] <TB0> INFO: missing ROC header(s): 0
[06:47:16.668] <TB0> INFO: misplaced readback start: 0
[06:47:16.668] <TB0> INFO: Pixel decoding errors: 0
[06:47:16.668] <TB0> INFO: pixel data incomplete: 0
[06:47:16.668] <TB0> INFO: pixel address: 0
[06:47:16.668] <TB0> INFO: pulse height fill bit: 0
[06:47:16.668] <TB0> INFO: buffer corruption: 0
[06:47:16.723] <TB0> INFO: ######################################################################
[06:47:16.723] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[06:47:16.723] <TB0> INFO: ######################################################################
[06:47:16.724] <TB0> INFO: ----------------------------------------------------------------------
[06:47:16.724] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[06:47:16.724] <TB0> INFO: ----------------------------------------------------------------------
[06:47:16.724] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[06:47:16.739] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[06:47:16.739] <TB0> INFO: run 1 of 1
[06:47:17.020] <TB0> INFO: Expecting 36608000 events.
[06:47:41.247] <TB0> INFO: 714400 events read in total (23635ms).
[06:48:04.675] <TB0> INFO: 1409200 events read in total (47063ms).
[06:48:28.150] <TB0> INFO: 2106700 events read in total (70538ms).
[06:48:51.429] <TB0> INFO: 2798150 events read in total (93817ms).
[06:49:14.630] <TB0> INFO: 3492650 events read in total (117018ms).
[06:49:38.023] <TB0> INFO: 4185650 events read in total (140411ms).
[06:50:01.513] <TB0> INFO: 4878250 events read in total (163901ms).
[06:50:25.057] <TB0> INFO: 5569750 events read in total (187445ms).
[06:50:48.615] <TB0> INFO: 6260200 events read in total (211003ms).
[06:51:12.087] <TB0> INFO: 6949050 events read in total (234475ms).
[06:51:35.705] <TB0> INFO: 7638100 events read in total (258093ms).
[06:51:59.095] <TB0> INFO: 8329450 events read in total (281483ms).
[06:52:22.208] <TB0> INFO: 9020800 events read in total (304596ms).
[06:52:45.485] <TB0> INFO: 9712100 events read in total (327873ms).
[06:53:08.796] <TB0> INFO: 10400600 events read in total (351184ms).
[06:53:32.159] <TB0> INFO: 11091200 events read in total (374547ms).
[06:53:55.540] <TB0> INFO: 11779950 events read in total (397928ms).
[06:54:18.965] <TB0> INFO: 12467750 events read in total (421353ms).
[06:54:42.323] <TB0> INFO: 13156600 events read in total (444711ms).
[06:55:05.572] <TB0> INFO: 13844250 events read in total (467960ms).
[06:55:28.904] <TB0> INFO: 14530850 events read in total (491292ms).
[06:55:51.954] <TB0> INFO: 15214650 events read in total (514342ms).
[06:56:15.467] <TB0> INFO: 15900700 events read in total (537855ms).
[06:56:38.706] <TB0> INFO: 16588200 events read in total (561094ms).
[06:57:02.396] <TB0> INFO: 17276500 events read in total (584784ms).
[06:57:25.721] <TB0> INFO: 17964300 events read in total (608109ms).
[06:57:49.188] <TB0> INFO: 18649650 events read in total (631576ms).
[06:58:12.455] <TB0> INFO: 19332250 events read in total (654843ms).
[06:58:35.669] <TB0> INFO: 20015350 events read in total (678057ms).
[06:58:58.736] <TB0> INFO: 20696900 events read in total (701124ms).
[06:59:21.749] <TB0> INFO: 21380000 events read in total (724137ms).
[06:59:44.986] <TB0> INFO: 22059600 events read in total (747374ms).
[07:00:08.394] <TB0> INFO: 22739550 events read in total (770782ms).
[07:00:31.612] <TB0> INFO: 23419550 events read in total (794000ms).
[07:00:55.019] <TB0> INFO: 24099450 events read in total (817407ms).
[07:01:18.422] <TB0> INFO: 24779750 events read in total (840810ms).
[07:01:41.679] <TB0> INFO: 25460800 events read in total (864067ms).
[07:02:05.144] <TB0> INFO: 26141050 events read in total (887532ms).
[07:02:28.428] <TB0> INFO: 26820100 events read in total (910816ms).
[07:02:51.737] <TB0> INFO: 27500850 events read in total (934125ms).
[07:03:14.868] <TB0> INFO: 28181300 events read in total (957256ms).
[07:03:38.238] <TB0> INFO: 28859550 events read in total (980626ms).
[07:04:01.196] <TB0> INFO: 29536500 events read in total (1003584ms).
[07:04:24.190] <TB0> INFO: 30216050 events read in total (1026578ms).
[07:04:47.112] <TB0> INFO: 30892950 events read in total (1049500ms).
[07:05:10.473] <TB0> INFO: 31570800 events read in total (1072861ms).
[07:05:33.977] <TB0> INFO: 32249200 events read in total (1096365ms).
[07:05:57.154] <TB0> INFO: 32927500 events read in total (1119542ms).
[07:06:20.433] <TB0> INFO: 33606500 events read in total (1142821ms).
[07:06:43.873] <TB0> INFO: 34287100 events read in total (1166261ms).
[07:07:07.043] <TB0> INFO: 34968750 events read in total (1189431ms).
[07:07:30.246] <TB0> INFO: 35650400 events read in total (1212634ms).
[07:07:53.817] <TB0> INFO: 36343700 events read in total (1236205ms).
[07:08:03.053] <TB0> INFO: 36608000 events read in total (1245441ms).
[07:08:03.160] <TB0> INFO: Test took 1246420ms.
[07:08:03.591] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[07:08:05.514] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[07:08:07.532] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[07:08:09.491] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[07:08:11.268] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[07:08:12.775] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[07:08:14.558] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[07:08:16.517] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[07:08:18.519] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[07:08:20.151] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[07:08:21.672] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[07:08:23.144] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[07:08:24.694] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[07:08:26.199] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[07:08:27.683] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[07:08:29.188] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[07:08:30.742] <TB0> INFO: PixTestScurves::scurves() done
[07:08:30.742] <TB0> INFO: Vcal mean: 133.24 128.58 127.77 123.47 133.96 138.62 121.49 126.74 125.53 121.55 126.36 128.36 125.48 121.84 137.70 137.64
[07:08:30.742] <TB0> INFO: Vcal RMS: 6.45 7.85 6.48 6.25 9.03 6.86 6.63 6.59 6.84 6.57 6.89 6.56 6.28 6.32 6.72 6.06
[07:08:30.742] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1274 seconds
[07:08:30.742] <TB0> INFO: Decoding statistics:
[07:08:30.742] <TB0> INFO: General information:
[07:08:30.742] <TB0> INFO: 16bit words read: 0
[07:08:30.742] <TB0> INFO: valid events total: 0
[07:08:30.742] <TB0> INFO: empty events: 0
[07:08:30.742] <TB0> INFO: valid events with pixels: 0
[07:08:30.742] <TB0> INFO: valid pixel hits: 0
[07:08:30.742] <TB0> INFO: Event errors: 0
[07:08:30.742] <TB0> INFO: start marker: 0
[07:08:30.742] <TB0> INFO: stop marker: 0
[07:08:30.742] <TB0> INFO: overflow: 0
[07:08:30.742] <TB0> INFO: invalid 5bit words: 0
[07:08:30.742] <TB0> INFO: invalid XOR eye diagram: 0
[07:08:30.742] <TB0> INFO: frame (failed synchr.): 0
[07:08:30.742] <TB0> INFO: idle data (no TBM trl): 0
[07:08:30.742] <TB0> INFO: no data (only TBM hdr): 0
[07:08:30.742] <TB0> INFO: TBM errors: 0
[07:08:30.742] <TB0> INFO: flawed TBM headers: 0
[07:08:30.742] <TB0> INFO: flawed TBM trailers: 0
[07:08:30.742] <TB0> INFO: event ID mismatches: 0
[07:08:30.742] <TB0> INFO: ROC errors: 0
[07:08:30.743] <TB0> INFO: missing ROC header(s): 0
[07:08:30.743] <TB0> INFO: misplaced readback start: 0
[07:08:30.743] <TB0> INFO: Pixel decoding errors: 0
[07:08:30.743] <TB0> INFO: pixel data incomplete: 0
[07:08:30.743] <TB0> INFO: pixel address: 0
[07:08:30.743] <TB0> INFO: pulse height fill bit: 0
[07:08:30.743] <TB0> INFO: buffer corruption: 0
[07:08:30.808] <TB0> INFO: ######################################################################
[07:08:30.808] <TB0> INFO: PixTestTrim::doTest()
[07:08:30.808] <TB0> INFO: ######################################################################
[07:08:30.809] <TB0> INFO: ----------------------------------------------------------------------
[07:08:30.809] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[07:08:30.809] <TB0> INFO: ----------------------------------------------------------------------
[07:08:30.857] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[07:08:30.857] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[07:08:30.871] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[07:08:30.871] <TB0> INFO: run 1 of 1
[07:08:31.118] <TB0> INFO: Expecting 5025280 events.
[07:09:02.776] <TB0> INFO: 835208 events read in total (31048ms).
[07:09:33.184] <TB0> INFO: 1669288 events read in total (61456ms).
[07:10:03.823] <TB0> INFO: 2500512 events read in total (92096ms).
[07:10:34.379] <TB0> INFO: 3327920 events read in total (122651ms).
[07:11:04.969] <TB0> INFO: 4151560 events read in total (153241ms).
[07:11:35.282] <TB0> INFO: 4973960 events read in total (183554ms).
[07:11:37.498] <TB0> INFO: 5025280 events read in total (185770ms).
[07:11:37.548] <TB0> INFO: Test took 186677ms.
[07:11:51.952] <TB0> INFO: ROC 0 VthrComp = 131
[07:11:51.952] <TB0> INFO: ROC 1 VthrComp = 119
[07:11:51.952] <TB0> INFO: ROC 2 VthrComp = 124
[07:11:51.952] <TB0> INFO: ROC 3 VthrComp = 120
[07:11:51.952] <TB0> INFO: ROC 4 VthrComp = 127
[07:11:51.952] <TB0> INFO: ROC 5 VthrComp = 126
[07:11:51.953] <TB0> INFO: ROC 6 VthrComp = 122
[07:11:51.953] <TB0> INFO: ROC 7 VthrComp = 129
[07:11:51.953] <TB0> INFO: ROC 8 VthrComp = 119
[07:11:51.953] <TB0> INFO: ROC 9 VthrComp = 121
[07:11:51.953] <TB0> INFO: ROC 10 VthrComp = 115
[07:11:51.953] <TB0> INFO: ROC 11 VthrComp = 119
[07:11:51.953] <TB0> INFO: ROC 12 VthrComp = 129
[07:11:51.953] <TB0> INFO: ROC 13 VthrComp = 119
[07:11:51.953] <TB0> INFO: ROC 14 VthrComp = 130
[07:11:51.954] <TB0> INFO: ROC 15 VthrComp = 129
[07:11:52.199] <TB0> INFO: Expecting 41600 events.
[07:11:55.711] <TB0> INFO: 41600 events read in total (2920ms).
[07:11:55.712] <TB0> INFO: Test took 3756ms.
[07:11:55.722] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[07:11:55.722] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[07:11:55.734] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[07:11:55.734] <TB0> INFO: run 1 of 1
[07:11:56.012] <TB0> INFO: Expecting 5025280 events.
[07:12:23.193] <TB0> INFO: 591848 events read in total (26590ms).
[07:12:49.137] <TB0> INFO: 1182168 events read in total (52534ms).
[07:13:14.832] <TB0> INFO: 1772816 events read in total (78229ms).
[07:13:41.194] <TB0> INFO: 2362280 events read in total (104591ms).
[07:14:07.497] <TB0> INFO: 2950584 events read in total (130894ms).
[07:14:33.270] <TB0> INFO: 3536344 events read in total (156667ms).
[07:14:59.343] <TB0> INFO: 4120984 events read in total (182740ms).
[07:15:25.452] <TB0> INFO: 4705088 events read in total (208849ms).
[07:15:39.839] <TB0> INFO: 5025280 events read in total (223236ms).
[07:15:39.979] <TB0> INFO: Test took 224245ms.
[07:16:02.969] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 62.7613 for pixel 0/4 mean/min/max = 47.2022/31.5045/62.8998
[07:16:02.970] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 65.8345 for pixel 8/78 mean/min/max = 48.3373/30.8393/65.8352
[07:16:02.970] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 61.6073 for pixel 33/14 mean/min/max = 46.6513/31.4042/61.8984
[07:16:02.971] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 62.8421 for pixel 19/15 mean/min/max = 47.9126/32.6477/63.1775
[07:16:02.971] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 68.2764 for pixel 23/79 mean/min/max = 49.2838/30.0293/68.5383
[07:16:02.971] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 65.3924 for pixel 23/11 mean/min/max = 48.7902/31.8485/65.7319
[07:16:02.972] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 61.6571 for pixel 43/17 mean/min/max = 46.7133/31.5836/61.843
[07:16:02.972] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 61.8328 for pixel 2/11 mean/min/max = 46.9006/31.5596/62.2417
[07:16:02.973] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 62.7405 for pixel 7/2 mean/min/max = 46.9732/31.0483/62.8981
[07:16:02.973] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 61.4565 for pixel 26/9 mean/min/max = 47.2694/33.0595/61.4793
[07:16:02.974] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 65.0488 for pixel 21/7 mean/min/max = 48.622/31.9406/65.3034
[07:16:02.974] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 63.6655 for pixel 25/79 mean/min/max = 47.659/31.565/63.753
[07:16:02.975] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 59.3297 for pixel 14/7 mean/min/max = 45.0595/30.4918/59.6272
[07:16:02.975] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 60.7556 for pixel 2/22 mean/min/max = 46.0414/31.2573/60.8254
[07:16:02.976] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 63.4173 for pixel 19/26 mean/min/max = 47.0596/30.677/63.4421
[07:16:02.976] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 63.4186 for pixel 0/15 mean/min/max = 47.2629/30.8198/63.7061
[07:16:02.976] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:16:03.065] <TB0> INFO: Expecting 411648 events.
[07:16:12.498] <TB0> INFO: 411648 events read in total (8842ms).
[07:16:12.506] <TB0> INFO: Expecting 411648 events.
[07:16:21.743] <TB0> INFO: 411648 events read in total (8834ms).
[07:16:21.754] <TB0> INFO: Expecting 411648 events.
[07:16:30.968] <TB0> INFO: 411648 events read in total (8811ms).
[07:16:30.981] <TB0> INFO: Expecting 411648 events.
[07:16:40.312] <TB0> INFO: 411648 events read in total (8928ms).
[07:16:40.328] <TB0> INFO: Expecting 411648 events.
[07:16:49.599] <TB0> INFO: 411648 events read in total (8868ms).
[07:16:49.617] <TB0> INFO: Expecting 411648 events.
[07:16:58.983] <TB0> INFO: 411648 events read in total (8963ms).
[07:16:59.004] <TB0> INFO: Expecting 411648 events.
[07:17:08.399] <TB0> INFO: 411648 events read in total (8992ms).
[07:17:08.424] <TB0> INFO: Expecting 411648 events.
[07:17:17.805] <TB0> INFO: 411648 events read in total (8977ms).
[07:17:17.830] <TB0> INFO: Expecting 411648 events.
[07:17:27.302] <TB0> INFO: 411648 events read in total (9069ms).
[07:17:27.332] <TB0> INFO: Expecting 411648 events.
[07:17:36.770] <TB0> INFO: 411648 events read in total (9035ms).
[07:17:36.812] <TB0> INFO: Expecting 411648 events.
[07:17:46.177] <TB0> INFO: 411648 events read in total (8962ms).
[07:17:46.214] <TB0> INFO: Expecting 411648 events.
[07:17:55.461] <TB0> INFO: 411648 events read in total (8844ms).
[07:17:55.564] <TB0> INFO: Expecting 411648 events.
[07:18:05.023] <TB0> INFO: 411648 events read in total (9055ms).
[07:18:05.066] <TB0> INFO: Expecting 411648 events.
[07:18:14.483] <TB0> INFO: 411648 events read in total (9013ms).
[07:18:14.534] <TB0> INFO: Expecting 411648 events.
[07:18:24.006] <TB0> INFO: 411648 events read in total (9069ms).
[07:18:24.055] <TB0> INFO: Expecting 411648 events.
[07:18:33.608] <TB0> INFO: 411648 events read in total (9150ms).
[07:18:33.664] <TB0> INFO: Test took 150688ms.
[07:18:34.352] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[07:18:34.366] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[07:18:34.366] <TB0> INFO: run 1 of 1
[07:18:34.604] <TB0> INFO: Expecting 5025280 events.
[07:19:01.533] <TB0> INFO: 594752 events read in total (26337ms).
[07:19:27.470] <TB0> INFO: 1187976 events read in total (52274ms).
[07:19:53.543] <TB0> INFO: 1777360 events read in total (78347ms).
[07:20:19.765] <TB0> INFO: 2368408 events read in total (104569ms).
[07:20:46.351] <TB0> INFO: 2958792 events read in total (131155ms).
[07:21:12.918] <TB0> INFO: 3556928 events read in total (157722ms).
[07:21:39.346] <TB0> INFO: 4152664 events read in total (184150ms).
[07:22:06.093] <TB0> INFO: 4748720 events read in total (210897ms).
[07:22:18.859] <TB0> INFO: 5025280 events read in total (223663ms).
[07:22:19.005] <TB0> INFO: Test took 224639ms.
[07:22:42.187] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 3.500000 .. 147.327508
[07:22:42.504] <TB0> INFO: Expecting 208000 events.
[07:22:52.136] <TB0> INFO: 208000 events read in total (9040ms).
[07:22:52.137] <TB0> INFO: Test took 9949ms.
[07:22:52.206] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 3 .. 157 (-1/-1) hits flags = 528 (plus default)
[07:22:52.221] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[07:22:52.221] <TB0> INFO: run 1 of 1
[07:22:52.505] <TB0> INFO: Expecting 5158400 events.
[07:23:19.209] <TB0> INFO: 582224 events read in total (26113ms).
[07:23:45.839] <TB0> INFO: 1163840 events read in total (52745ms).
[07:24:11.940] <TB0> INFO: 1744776 events read in total (78845ms).
[07:24:38.124] <TB0> INFO: 2326048 events read in total (105028ms).
[07:25:04.235] <TB0> INFO: 2907656 events read in total (131139ms).
[07:25:30.428] <TB0> INFO: 3489248 events read in total (157332ms).
[07:25:56.511] <TB0> INFO: 4070152 events read in total (183415ms).
[07:26:22.661] <TB0> INFO: 4650264 events read in total (209565ms).
[07:26:45.597] <TB0> INFO: 5158400 events read in total (232501ms).
[07:26:45.717] <TB0> INFO: Test took 233497ms.
[07:27:12.096] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 27.272032 .. 47.648452
[07:27:12.385] <TB0> INFO: Expecting 208000 events.
[07:27:22.706] <TB0> INFO: 208000 events read in total (9728ms).
[07:27:22.707] <TB0> INFO: Test took 10609ms.
[07:27:22.755] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 57 (-1/-1) hits flags = 528 (plus default)
[07:27:22.769] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[07:27:22.769] <TB0> INFO: run 1 of 1
[07:27:23.047] <TB0> INFO: Expecting 1364480 events.
[07:27:51.731] <TB0> INFO: 654296 events read in total (28092ms).
[07:28:19.476] <TB0> INFO: 1305352 events read in total (55837ms).
[07:28:22.381] <TB0> INFO: 1364480 events read in total (58742ms).
[07:28:22.429] <TB0> INFO: Test took 59661ms.
[07:28:36.589] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 27.526041 .. 49.162866
[07:28:36.831] <TB0> INFO: Expecting 208000 events.
[07:28:46.802] <TB0> INFO: 208000 events read in total (9379ms).
[07:28:46.804] <TB0> INFO: Test took 10213ms.
[07:28:46.851] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 17 .. 59 (-1/-1) hits flags = 528 (plus default)
[07:28:46.865] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[07:28:46.866] <TB0> INFO: run 1 of 1
[07:28:47.144] <TB0> INFO: Expecting 1431040 events.
[07:29:15.687] <TB0> INFO: 647600 events read in total (27952ms).
[07:29:43.783] <TB0> INFO: 1292560 events read in total (56048ms).
[07:29:50.181] <TB0> INFO: 1431040 events read in total (62447ms).
[07:29:50.224] <TB0> INFO: Test took 63359ms.
[07:30:04.955] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 25.277702 .. 50.298754
[07:30:05.210] <TB0> INFO: Expecting 208000 events.
[07:30:15.098] <TB0> INFO: 208000 events read in total (9297ms).
[07:30:15.099] <TB0> INFO: Test took 10141ms.
[07:30:15.148] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 60 (-1/-1) hits flags = 528 (plus default)
[07:30:15.163] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[07:30:15.163] <TB0> INFO: run 1 of 1
[07:30:15.441] <TB0> INFO: Expecting 1530880 events.
[07:30:44.282] <TB0> INFO: 650928 events read in total (28249ms).
[07:31:12.088] <TB0> INFO: 1300624 events read in total (56055ms).
[07:31:21.996] <TB0> INFO: 1530880 events read in total (65963ms).
[07:31:22.040] <TB0> INFO: Test took 66877ms.
[07:31:36.584] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[07:31:36.584] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[07:31:36.598] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[07:31:36.598] <TB0> INFO: run 1 of 1
[07:31:36.855] <TB0> INFO: Expecting 1364480 events.
[07:32:06.378] <TB0> INFO: 668896 events read in total (28932ms).
[07:32:34.560] <TB0> INFO: 1337488 events read in total (57114ms).
[07:32:36.196] <TB0> INFO: 1364480 events read in total (58751ms).
[07:32:36.227] <TB0> INFO: Test took 59630ms.
[07:32:48.993] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C0.dat
[07:32:48.993] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C1.dat
[07:32:48.993] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C2.dat
[07:32:48.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C3.dat
[07:32:48.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C4.dat
[07:32:48.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C5.dat
[07:32:48.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C6.dat
[07:32:48.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C7.dat
[07:32:48.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C8.dat
[07:32:48.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C9.dat
[07:32:48.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C10.dat
[07:32:48.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C11.dat
[07:32:48.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C12.dat
[07:32:48.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C13.dat
[07:32:48.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C14.dat
[07:32:48.995] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C15.dat
[07:32:48.995] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters35_C0.dat
[07:32:48.001] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters35_C1.dat
[07:32:49.005] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters35_C2.dat
[07:32:49.010] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters35_C3.dat
[07:32:49.015] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters35_C4.dat
[07:32:49.020] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters35_C5.dat
[07:32:49.025] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters35_C6.dat
[07:32:49.030] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters35_C7.dat
[07:32:49.035] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters35_C8.dat
[07:32:49.040] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters35_C9.dat
[07:32:49.044] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters35_C10.dat
[07:32:49.049] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters35_C11.dat
[07:32:49.054] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters35_C12.dat
[07:32:49.059] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters35_C13.dat
[07:32:49.063] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters35_C14.dat
[07:32:49.068] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters35_C15.dat
[07:32:49.073] <TB0> INFO: PixTestTrim::trimTest() done
[07:32:49.073] <TB0> INFO: vtrim: 117 118 126 126 131 133 155 128 137 132 136 126 111 123 129 114
[07:32:49.073] <TB0> INFO: vthrcomp: 131 119 124 120 127 126 122 129 119 121 115 119 129 119 130 129
[07:32:49.073] <TB0> INFO: vcal mean: 35.37 35.62 35.45 35.37 35.25 35.75 35.19 35.15 35.34 35.33 35.67 35.76 34.99 35.04 35.17 35.54
[07:32:49.073] <TB0> INFO: vcal RMS: 1.55 1.81 1.53 1.46 1.39 2.08 1.26 1.14 1.51 1.61 1.88 1.93 1.16 1.22 1.45 1.79
[07:32:49.073] <TB0> INFO: bits mean: 9.44 9.45 10.06 9.59 9.19 9.54 10.10 9.50 9.74 9.52 9.66 9.55 9.98 9.64 9.90 9.51
[07:32:49.073] <TB0> INFO: bits RMS: 2.86 2.82 2.58 2.55 2.84 2.70 2.45 2.71 2.72 2.61 2.64 2.89 2.73 2.74 2.62 3.01
[07:32:49.081] <TB0> INFO: ----------------------------------------------------------------------
[07:32:49.081] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[07:32:49.081] <TB0> INFO: ----------------------------------------------------------------------
[07:32:49.084] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[07:32:49.098] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[07:32:49.098] <TB0> INFO: run 1 of 1
[07:32:49.340] <TB0> INFO: Expecting 4160000 events.
[07:33:22.683] <TB0> INFO: 789525 events read in total (32752ms).
[07:33:55.381] <TB0> INFO: 1569860 events read in total (65450ms).
[07:34:27.947] <TB0> INFO: 2344475 events read in total (98016ms).
[07:35:00.405] <TB0> INFO: 3113155 events read in total (130474ms).
[07:35:32.776] <TB0> INFO: 3879220 events read in total (162845ms).
[07:35:45.030] <TB0> INFO: 4160000 events read in total (175099ms).
[07:35:45.161] <TB0> INFO: Test took 176064ms.
[07:36:13.284] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[07:36:13.298] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[07:36:13.298] <TB0> INFO: run 1 of 1
[07:36:13.598] <TB0> INFO: Expecting 5324800 events.
[07:36:44.575] <TB0> INFO: 694920 events read in total (30385ms).
[07:37:15.477] <TB0> INFO: 1385355 events read in total (61287ms).
[07:37:46.150] <TB0> INFO: 2073985 events read in total (91960ms).
[07:38:17.119] <TB0> INFO: 2760620 events read in total (122929ms).
[07:38:47.709] <TB0> INFO: 3444765 events read in total (153519ms).
[07:39:18.448] <TB0> INFO: 4127635 events read in total (184258ms).
[07:39:48.739] <TB0> INFO: 4809020 events read in total (214549ms).
[07:40:11.805] <TB0> INFO: 5324800 events read in total (237615ms).
[07:40:11.976] <TB0> INFO: Test took 238678ms.
[07:40:41.563] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 231 (-1/-1) hits flags = 528 (plus default)
[07:40:41.577] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[07:40:41.577] <TB0> INFO: run 1 of 1
[07:40:41.815] <TB0> INFO: Expecting 4825600 events.
[07:41:13.703] <TB0> INFO: 717500 events read in total (31297ms).
[07:41:44.679] <TB0> INFO: 1429190 events read in total (62273ms).
[07:42:15.951] <TB0> INFO: 2138245 events read in total (93545ms).
[07:42:47.096] <TB0> INFO: 2845360 events read in total (124690ms).
[07:43:17.961] <TB0> INFO: 3549125 events read in total (155555ms).
[07:43:48.822] <TB0> INFO: 4251355 events read in total (186416ms).
[07:44:13.452] <TB0> INFO: 4825600 events read in total (211046ms).
[07:44:13.590] <TB0> INFO: Test took 212013ms.
[07:44:42.111] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 231 (-1/-1) hits flags = 528 (plus default)
[07:44:42.126] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[07:44:42.126] <TB0> INFO: run 1 of 1
[07:44:42.405] <TB0> INFO: Expecting 4825600 events.
[07:45:14.415] <TB0> INFO: 717425 events read in total (31419ms).
[07:45:45.444] <TB0> INFO: 1429755 events read in total (62448ms).
[07:46:16.668] <TB0> INFO: 2139280 events read in total (93672ms).
[07:46:47.331] <TB0> INFO: 2847060 events read in total (124335ms).
[07:47:17.949] <TB0> INFO: 3551210 events read in total (154953ms).
[07:47:49.119] <TB0> INFO: 4253575 events read in total (186123ms).
[07:48:14.301] <TB0> INFO: 4825600 events read in total (211305ms).
[07:48:14.440] <TB0> INFO: Test took 212313ms.
[07:48:42.226] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 229 (-1/-1) hits flags = 528 (plus default)
[07:48:42.241] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[07:48:42.241] <TB0> INFO: run 1 of 1
[07:48:42.478] <TB0> INFO: Expecting 4784000 events.
[07:49:14.676] <TB0> INFO: 719545 events read in total (31606ms).
[07:49:45.683] <TB0> INFO: 1433250 events read in total (62613ms).
[07:50:17.163] <TB0> INFO: 2144490 events read in total (94093ms).
[07:50:47.901] <TB0> INFO: 2853915 events read in total (124831ms).
[07:51:19.052] <TB0> INFO: 3559145 events read in total (155982ms).
[07:51:50.261] <TB0> INFO: 4263815 events read in total (187191ms).
[07:52:13.282] <TB0> INFO: 4784000 events read in total (210212ms).
[07:52:13.409] <TB0> INFO: Test took 211168ms.
[07:52:39.643] <TB0> INFO: PixTestTrim::trimBitTest() done
[07:52:39.644] <TB0> INFO: PixTestTrim::doTest() done, duration: 2648 seconds
[07:52:39.644] <TB0> INFO: Decoding statistics:
[07:52:39.644] <TB0> INFO: General information:
[07:52:39.644] <TB0> INFO: 16bit words read: 0
[07:52:39.644] <TB0> INFO: valid events total: 0
[07:52:39.644] <TB0> INFO: empty events: 0
[07:52:39.644] <TB0> INFO: valid events with pixels: 0
[07:52:39.644] <TB0> INFO: valid pixel hits: 0
[07:52:39.644] <TB0> INFO: Event errors: 0
[07:52:39.644] <TB0> INFO: start marker: 0
[07:52:39.644] <TB0> INFO: stop marker: 0
[07:52:39.644] <TB0> INFO: overflow: 0
[07:52:39.644] <TB0> INFO: invalid 5bit words: 0
[07:52:39.644] <TB0> INFO: invalid XOR eye diagram: 0
[07:52:39.644] <TB0> INFO: frame (failed synchr.): 0
[07:52:39.644] <TB0> INFO: idle data (no TBM trl): 0
[07:52:39.644] <TB0> INFO: no data (only TBM hdr): 0
[07:52:39.644] <TB0> INFO: TBM errors: 0
[07:52:39.644] <TB0> INFO: flawed TBM headers: 0
[07:52:39.644] <TB0> INFO: flawed TBM trailers: 0
[07:52:39.644] <TB0> INFO: event ID mismatches: 0
[07:52:39.644] <TB0> INFO: ROC errors: 0
[07:52:39.644] <TB0> INFO: missing ROC header(s): 0
[07:52:39.644] <TB0> INFO: misplaced readback start: 0
[07:52:39.644] <TB0> INFO: Pixel decoding errors: 0
[07:52:39.644] <TB0> INFO: pixel data incomplete: 0
[07:52:39.644] <TB0> INFO: pixel address: 0
[07:52:39.644] <TB0> INFO: pulse height fill bit: 0
[07:52:39.644] <TB0> INFO: buffer corruption: 0
[07:52:40.245] <TB0> INFO: ######################################################################
[07:52:40.245] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[07:52:40.245] <TB0> INFO: ######################################################################
[07:52:40.483] <TB0> INFO: Expecting 41600 events.
[07:52:43.942] <TB0> INFO: 41600 events read in total (2867ms).
[07:52:43.943] <TB0> INFO: Test took 3696ms.
[07:52:44.388] <TB0> INFO: Expecting 41600 events.
[07:52:47.964] <TB0> INFO: 41600 events read in total (2984ms).
[07:52:47.965] <TB0> INFO: Test took 3816ms.
[07:52:48.254] <TB0> INFO: Expecting 41600 events.
[07:52:51.740] <TB0> INFO: 41600 events read in total (2894ms).
[07:52:51.741] <TB0> INFO: Test took 3751ms.
[07:52:52.031] <TB0> INFO: Expecting 41600 events.
[07:52:55.577] <TB0> INFO: 41600 events read in total (2954ms).
[07:52:55.578] <TB0> INFO: Test took 3812ms.
[07:52:55.871] <TB0> INFO: Expecting 41600 events.
[07:52:59.457] <TB0> INFO: 41600 events read in total (2994ms).
[07:52:59.458] <TB0> INFO: Test took 3852ms.
[07:52:59.799] <TB0> INFO: Expecting 41600 events.
[07:53:03.452] <TB0> INFO: 41600 events read in total (3061ms).
[07:53:03.453] <TB0> INFO: Test took 3962ms.
[07:53:03.744] <TB0> INFO: Expecting 41600 events.
[07:53:07.281] <TB0> INFO: 41600 events read in total (2945ms).
[07:53:07.283] <TB0> INFO: Test took 3806ms.
[07:53:07.572] <TB0> INFO: Expecting 41600 events.
[07:53:11.073] <TB0> INFO: 41600 events read in total (2910ms).
[07:53:11.074] <TB0> INFO: Test took 3767ms.
[07:53:11.364] <TB0> INFO: Expecting 41600 events.
[07:53:14.987] <TB0> INFO: 41600 events read in total (3031ms).
[07:53:14.988] <TB0> INFO: Test took 3889ms.
[07:53:15.277] <TB0> INFO: Expecting 41600 events.
[07:53:18.891] <TB0> INFO: 41600 events read in total (3023ms).
[07:53:18.892] <TB0> INFO: Test took 3880ms.
[07:53:19.182] <TB0> INFO: Expecting 41600 events.
[07:53:22.881] <TB0> INFO: 41600 events read in total (3108ms).
[07:53:22.882] <TB0> INFO: Test took 3965ms.
[07:53:23.171] <TB0> INFO: Expecting 41600 events.
[07:53:26.774] <TB0> INFO: 41600 events read in total (3011ms).
[07:53:26.775] <TB0> INFO: Test took 3869ms.
[07:53:27.065] <TB0> INFO: Expecting 41600 events.
[07:53:30.689] <TB0> INFO: 41600 events read in total (3033ms).
[07:53:30.690] <TB0> INFO: Test took 3891ms.
[07:53:30.980] <TB0> INFO: Expecting 41600 events.
[07:53:34.595] <TB0> INFO: 41600 events read in total (3023ms).
[07:53:34.596] <TB0> INFO: Test took 3881ms.
[07:53:34.886] <TB0> INFO: Expecting 41600 events.
[07:53:38.391] <TB0> INFO: 41600 events read in total (2913ms).
[07:53:38.392] <TB0> INFO: Test took 3772ms.
[07:53:38.682] <TB0> INFO: Expecting 41600 events.
[07:53:42.201] <TB0> INFO: 41600 events read in total (2928ms).
[07:53:42.202] <TB0> INFO: Test took 3786ms.
[07:53:42.492] <TB0> INFO: Expecting 41600 events.
[07:53:46.034] <TB0> INFO: 41600 events read in total (2950ms).
[07:53:46.035] <TB0> INFO: Test took 3809ms.
[07:53:46.327] <TB0> INFO: Expecting 41600 events.
[07:53:49.909] <TB0> INFO: 41600 events read in total (2990ms).
[07:53:49.909] <TB0> INFO: Test took 3847ms.
[07:53:50.199] <TB0> INFO: Expecting 41600 events.
[07:53:53.742] <TB0> INFO: 41600 events read in total (2951ms).
[07:53:53.743] <TB0> INFO: Test took 3809ms.
[07:53:54.033] <TB0> INFO: Expecting 41600 events.
[07:53:57.563] <TB0> INFO: 41600 events read in total (2938ms).
[07:53:57.564] <TB0> INFO: Test took 3797ms.
[07:53:57.854] <TB0> INFO: Expecting 41600 events.
[07:54:01.367] <TB0> INFO: 41600 events read in total (2921ms).
[07:54:01.368] <TB0> INFO: Test took 3779ms.
[07:54:01.657] <TB0> INFO: Expecting 41600 events.
[07:54:05.237] <TB0> INFO: 41600 events read in total (2988ms).
[07:54:05.237] <TB0> INFO: Test took 3846ms.
[07:54:05.527] <TB0> INFO: Expecting 41600 events.
[07:54:09.032] <TB0> INFO: 41600 events read in total (2913ms).
[07:54:09.034] <TB0> INFO: Test took 3772ms.
[07:54:09.327] <TB0> INFO: Expecting 41600 events.
[07:54:12.861] <TB0> INFO: 41600 events read in total (2942ms).
[07:54:12.862] <TB0> INFO: Test took 3800ms.
[07:54:13.152] <TB0> INFO: Expecting 41600 events.
[07:54:16.694] <TB0> INFO: 41600 events read in total (2950ms).
[07:54:16.695] <TB0> INFO: Test took 3809ms.
[07:54:16.987] <TB0> INFO: Expecting 41600 events.
[07:54:20.526] <TB0> INFO: 41600 events read in total (2948ms).
[07:54:20.527] <TB0> INFO: Test took 3805ms.
[07:54:20.816] <TB0> INFO: Expecting 41600 events.
[07:54:24.314] <TB0> INFO: 41600 events read in total (2906ms).
[07:54:24.315] <TB0> INFO: Test took 3764ms.
[07:54:24.605] <TB0> INFO: Expecting 41600 events.
[07:54:28.239] <TB0> INFO: 41600 events read in total (3042ms).
[07:54:28.240] <TB0> INFO: Test took 3901ms.
[07:54:28.531] <TB0> INFO: Expecting 41600 events.
[07:54:32.050] <TB0> INFO: 41600 events read in total (2927ms).
[07:54:32.051] <TB0> INFO: Test took 3785ms.
[07:54:32.344] <TB0> INFO: Expecting 2560 events.
[07:54:33.231] <TB0> INFO: 2560 events read in total (295ms).
[07:54:33.231] <TB0> INFO: Test took 1165ms.
[07:54:33.538] <TB0> INFO: Expecting 2560 events.
[07:54:34.426] <TB0> INFO: 2560 events read in total (296ms).
[07:54:34.426] <TB0> INFO: Test took 1194ms.
[07:54:34.734] <TB0> INFO: Expecting 2560 events.
[07:54:35.622] <TB0> INFO: 2560 events read in total (297ms).
[07:54:35.622] <TB0> INFO: Test took 1195ms.
[07:54:35.929] <TB0> INFO: Expecting 2560 events.
[07:54:36.816] <TB0> INFO: 2560 events read in total (295ms).
[07:54:36.816] <TB0> INFO: Test took 1193ms.
[07:54:37.123] <TB0> INFO: Expecting 2560 events.
[07:54:38.011] <TB0> INFO: 2560 events read in total (296ms).
[07:54:38.012] <TB0> INFO: Test took 1195ms.
[07:54:38.318] <TB0> INFO: Expecting 2560 events.
[07:54:39.207] <TB0> INFO: 2560 events read in total (298ms).
[07:54:39.208] <TB0> INFO: Test took 1196ms.
[07:54:39.515] <TB0> INFO: Expecting 2560 events.
[07:54:40.408] <TB0> INFO: 2560 events read in total (301ms).
[07:54:40.408] <TB0> INFO: Test took 1199ms.
[07:54:40.716] <TB0> INFO: Expecting 2560 events.
[07:54:41.608] <TB0> INFO: 2560 events read in total (300ms).
[07:54:41.608] <TB0> INFO: Test took 1199ms.
[07:54:41.915] <TB0> INFO: Expecting 2560 events.
[07:54:42.804] <TB0> INFO: 2560 events read in total (297ms).
[07:54:42.804] <TB0> INFO: Test took 1195ms.
[07:54:43.110] <TB0> INFO: Expecting 2560 events.
[07:54:43.001] <TB0> INFO: 2560 events read in total (299ms).
[07:54:43.001] <TB0> INFO: Test took 1196ms.
[07:54:44.308] <TB0> INFO: Expecting 2560 events.
[07:54:45.196] <TB0> INFO: 2560 events read in total (296ms).
[07:54:45.196] <TB0> INFO: Test took 1194ms.
[07:54:45.504] <TB0> INFO: Expecting 2560 events.
[07:54:46.388] <TB0> INFO: 2560 events read in total (292ms).
[07:54:46.388] <TB0> INFO: Test took 1192ms.
[07:54:46.696] <TB0> INFO: Expecting 2560 events.
[07:54:47.584] <TB0> INFO: 2560 events read in total (296ms).
[07:54:47.584] <TB0> INFO: Test took 1195ms.
[07:54:47.893] <TB0> INFO: Expecting 2560 events.
[07:54:48.776] <TB0> INFO: 2560 events read in total (292ms).
[07:54:48.776] <TB0> INFO: Test took 1191ms.
[07:54:49.085] <TB0> INFO: Expecting 2560 events.
[07:54:49.972] <TB0> INFO: 2560 events read in total (296ms).
[07:54:49.972] <TB0> INFO: Test took 1195ms.
[07:54:50.281] <TB0> INFO: Expecting 2560 events.
[07:54:51.165] <TB0> INFO: 2560 events read in total (292ms).
[07:54:51.165] <TB0> INFO: Test took 1192ms.
[07:54:51.168] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:54:51.475] <TB0> INFO: Expecting 655360 events.
[07:55:06.208] <TB0> INFO: 655360 events read in total (14141ms).
[07:55:06.223] <TB0> INFO: Expecting 655360 events.
[07:55:20.705] <TB0> INFO: 655360 events read in total (14079ms).
[07:55:20.724] <TB0> INFO: Expecting 655360 events.
[07:55:35.243] <TB0> INFO: 655360 events read in total (14116ms).
[07:55:35.266] <TB0> INFO: Expecting 655360 events.
[07:55:49.774] <TB0> INFO: 655360 events read in total (14105ms).
[07:55:49.802] <TB0> INFO: Expecting 655360 events.
[07:56:04.285] <TB0> INFO: 655360 events read in total (14080ms).
[07:56:04.326] <TB0> INFO: Expecting 655360 events.
[07:56:18.921] <TB0> INFO: 655360 events read in total (14192ms).
[07:56:18.970] <TB0> INFO: Expecting 655360 events.
[07:56:33.513] <TB0> INFO: 655360 events read in total (14140ms).
[07:56:33.579] <TB0> INFO: Expecting 655360 events.
[07:56:48.087] <TB0> INFO: 655360 events read in total (14105ms).
[07:56:48.143] <TB0> INFO: Expecting 655360 events.
[07:57:02.737] <TB0> INFO: 655360 events read in total (14191ms).
[07:57:02.802] <TB0> INFO: Expecting 655360 events.
[07:57:17.336] <TB0> INFO: 655360 events read in total (14131ms).
[07:57:17.446] <TB0> INFO: Expecting 655360 events.
[07:57:31.958] <TB0> INFO: 655360 events read in total (14108ms).
[07:57:32.037] <TB0> INFO: Expecting 655360 events.
[07:57:46.512] <TB0> INFO: 655360 events read in total (14072ms).
[07:57:46.590] <TB0> INFO: Expecting 655360 events.
[07:58:01.229] <TB0> INFO: 655360 events read in total (14236ms).
[07:58:01.383] <TB0> INFO: Expecting 655360 events.
[07:58:15.993] <TB0> INFO: 655360 events read in total (14207ms).
[07:58:16.120] <TB0> INFO: Expecting 655360 events.
[07:58:30.616] <TB0> INFO: 655360 events read in total (14093ms).
[07:58:30.768] <TB0> INFO: Expecting 655360 events.
[07:58:45.273] <TB0> INFO: 655360 events read in total (14102ms).
[07:58:45.420] <TB0> INFO: Test took 234252ms.
[07:58:45.519] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:58:45.772] <TB0> INFO: Expecting 655360 events.
[07:59:00.102] <TB0> INFO: 655360 events read in total (13738ms).
[07:59:00.116] <TB0> INFO: Expecting 655360 events.
[07:59:14.657] <TB0> INFO: 655360 events read in total (14137ms).
[07:59:14.675] <TB0> INFO: Expecting 655360 events.
[07:59:28.938] <TB0> INFO: 655360 events read in total (13860ms).
[07:59:28.962] <TB0> INFO: Expecting 655360 events.
[07:59:43.373] <TB0> INFO: 655360 events read in total (14008ms).
[07:59:43.400] <TB0> INFO: Expecting 655360 events.
[07:59:57.678] <TB0> INFO: 655360 events read in total (13875ms).
[07:59:57.711] <TB0> INFO: Expecting 655360 events.
[08:00:12.014] <TB0> INFO: 655360 events read in total (13900ms).
[08:00:12.069] <TB0> INFO: Expecting 655360 events.
[08:00:26.647] <TB0> INFO: 655360 events read in total (14175ms).
[08:00:26.707] <TB0> INFO: Expecting 655360 events.
[08:00:41.089] <TB0> INFO: 655360 events read in total (13979ms).
[08:00:41.152] <TB0> INFO: Expecting 655360 events.
[08:00:55.274] <TB0> INFO: 655360 events read in total (13718ms).
[08:00:55.352] <TB0> INFO: Expecting 655360 events.
[08:01:10.079] <TB0> INFO: 655360 events read in total (14324ms).
[08:01:10.159] <TB0> INFO: Expecting 655360 events.
[08:01:24.434] <TB0> INFO: 655360 events read in total (13872ms).
[08:01:24.515] <TB0> INFO: Expecting 655360 events.
[08:01:38.842] <TB0> INFO: 655360 events read in total (13924ms).
[08:01:38.941] <TB0> INFO: Expecting 655360 events.
[08:01:53.628] <TB0> INFO: 655360 events read in total (14285ms).
[08:01:53.745] <TB0> INFO: Expecting 655360 events.
[08:02:08.447] <TB0> INFO: 655360 events read in total (14299ms).
[08:02:08.591] <TB0> INFO: Expecting 655360 events.
[08:02:23.488] <TB0> INFO: 655360 events read in total (14494ms).
[08:02:23.636] <TB0> INFO: Expecting 655360 events.
[08:02:38.425] <TB0> INFO: 655360 events read in total (14386ms).
[08:02:38.527] <TB0> INFO: Test took 233008ms.
[08:02:38.704] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:02:38.711] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:02:38.717] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:02:38.722] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[08:02:38.729] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[08:02:38.735] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[08:02:38.741] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[08:02:38.747] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[08:02:38.753] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[08:02:38.759] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[08:02:38.765] <TB0> INFO: safety margin for low PH: adding 8, margin is now 28
[08:02:38.771] <TB0> INFO: safety margin for low PH: adding 9, margin is now 29
[08:02:38.777] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:02:38.783] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:02:38.789] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[08:02:38.795] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:02:38.801] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:02:38.807] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:02:38.813] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[08:02:38.819] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:02:38.825] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:02:38.831] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[08:02:38.837] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:02:38.842] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[08:02:38.848] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[08:02:38.854] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:02:38.859] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[08:02:38.865] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[08:02:38.871] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[08:02:38.876] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[08:02:38.882] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[08:02:38.888] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[08:02:38.894] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[08:02:38.900] <TB0> INFO: safety margin for low PH: adding 8, margin is now 28
[08:02:38.905] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:02:38.911] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[08:02:38.917] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[08:02:38.922] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[08:02:38.928] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[08:02:38.934] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[08:02:38.939] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[08:02:38.945] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[08:02:38.951] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:02:38.956] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:02:38.962] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[08:02:38.968] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[08:02:38.973] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[08:02:38.979] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[08:02:38.985] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[08:02:38.990] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:02:38.996] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[08:02:38.002] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[08:02:39.007] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[08:02:39.013] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[08:02:39.019] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[08:02:39.025] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[08:02:39.030] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[08:02:39.036] <TB0> INFO: safety margin for low PH: adding 8, margin is now 28
[08:02:39.071] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C0.dat
[08:02:39.071] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C1.dat
[08:02:39.071] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C2.dat
[08:02:39.071] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C3.dat
[08:02:39.072] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C4.dat
[08:02:39.072] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C5.dat
[08:02:39.072] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C6.dat
[08:02:39.072] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C7.dat
[08:02:39.072] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C8.dat
[08:02:39.072] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C9.dat
[08:02:39.072] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C10.dat
[08:02:39.072] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C11.dat
[08:02:39.072] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C12.dat
[08:02:39.073] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C13.dat
[08:02:39.073] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C14.dat
[08:02:39.073] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters35_C15.dat
[08:02:39.318] <TB0> INFO: Expecting 41600 events.
[08:02:42.494] <TB0> INFO: 41600 events read in total (2584ms).
[08:02:42.495] <TB0> INFO: Test took 3419ms.
[08:02:42.948] <TB0> INFO: Expecting 41600 events.
[08:02:46.050] <TB0> INFO: 41600 events read in total (2510ms).
[08:02:46.051] <TB0> INFO: Test took 3342ms.
[08:02:46.507] <TB0> INFO: Expecting 41600 events.
[08:02:49.694] <TB0> INFO: 41600 events read in total (2595ms).
[08:02:49.695] <TB0> INFO: Test took 3430ms.
[08:02:49.912] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:02:49.002] <TB0> INFO: Expecting 2560 events.
[08:02:50.890] <TB0> INFO: 2560 events read in total (297ms).
[08:02:50.891] <TB0> INFO: Test took 979ms.
[08:02:50.893] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:02:51.199] <TB0> INFO: Expecting 2560 events.
[08:02:52.097] <TB0> INFO: 2560 events read in total (306ms).
[08:02:52.097] <TB0> INFO: Test took 1204ms.
[08:02:52.100] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:02:52.405] <TB0> INFO: Expecting 2560 events.
[08:02:53.298] <TB0> INFO: 2560 events read in total (301ms).
[08:02:53.298] <TB0> INFO: Test took 1198ms.
[08:02:53.301] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:02:53.607] <TB0> INFO: Expecting 2560 events.
[08:02:54.502] <TB0> INFO: 2560 events read in total (303ms).
[08:02:54.502] <TB0> INFO: Test took 1201ms.
[08:02:54.506] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:02:54.810] <TB0> INFO: Expecting 2560 events.
[08:02:55.697] <TB0> INFO: 2560 events read in total (295ms).
[08:02:55.697] <TB0> INFO: Test took 1192ms.
[08:02:55.700] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:02:56.005] <TB0> INFO: Expecting 2560 events.
[08:02:56.900] <TB0> INFO: 2560 events read in total (303ms).
[08:02:56.901] <TB0> INFO: Test took 1201ms.
[08:02:56.904] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:02:57.209] <TB0> INFO: Expecting 2560 events.
[08:02:58.104] <TB0> INFO: 2560 events read in total (303ms).
[08:02:58.104] <TB0> INFO: Test took 1200ms.
[08:02:58.106] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:02:58.414] <TB0> INFO: Expecting 2560 events.
[08:02:59.308] <TB0> INFO: 2560 events read in total (303ms).
[08:02:59.309] <TB0> INFO: Test took 1203ms.
[08:02:59.312] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:02:59.615] <TB0> INFO: Expecting 2560 events.
[08:03:00.508] <TB0> INFO: 2560 events read in total (300ms).
[08:03:00.509] <TB0> INFO: Test took 1197ms.
[08:03:00.512] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:00.817] <TB0> INFO: Expecting 2560 events.
[08:03:01.706] <TB0> INFO: 2560 events read in total (297ms).
[08:03:01.706] <TB0> INFO: Test took 1195ms.
[08:03:01.709] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:02.014] <TB0> INFO: Expecting 2560 events.
[08:03:02.907] <TB0> INFO: 2560 events read in total (301ms).
[08:03:02.907] <TB0> INFO: Test took 1198ms.
[08:03:02.911] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:03.216] <TB0> INFO: Expecting 2560 events.
[08:03:04.106] <TB0> INFO: 2560 events read in total (298ms).
[08:03:04.106] <TB0> INFO: Test took 1195ms.
[08:03:04.108] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:04.416] <TB0> INFO: Expecting 2560 events.
[08:03:05.307] <TB0> INFO: 2560 events read in total (299ms).
[08:03:05.308] <TB0> INFO: Test took 1200ms.
[08:03:05.312] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:05.616] <TB0> INFO: Expecting 2560 events.
[08:03:06.501] <TB0> INFO: 2560 events read in total (293ms).
[08:03:06.501] <TB0> INFO: Test took 1190ms.
[08:03:06.504] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:06.809] <TB0> INFO: Expecting 2560 events.
[08:03:07.696] <TB0> INFO: 2560 events read in total (295ms).
[08:03:07.697] <TB0> INFO: Test took 1193ms.
[08:03:07.700] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:08.004] <TB0> INFO: Expecting 2560 events.
[08:03:08.896] <TB0> INFO: 2560 events read in total (300ms).
[08:03:08.897] <TB0> INFO: Test took 1197ms.
[08:03:08.900] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:09.204] <TB0> INFO: Expecting 2560 events.
[08:03:10.095] <TB0> INFO: 2560 events read in total (299ms).
[08:03:10.095] <TB0> INFO: Test took 1195ms.
[08:03:10.099] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:10.403] <TB0> INFO: Expecting 2560 events.
[08:03:11.287] <TB0> INFO: 2560 events read in total (292ms).
[08:03:11.287] <TB0> INFO: Test took 1189ms.
[08:03:11.291] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:11.596] <TB0> INFO: Expecting 2560 events.
[08:03:12.488] <TB0> INFO: 2560 events read in total (300ms).
[08:03:12.488] <TB0> INFO: Test took 1197ms.
[08:03:12.491] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:12.794] <TB0> INFO: Expecting 2560 events.
[08:03:13.683] <TB0> INFO: 2560 events read in total (297ms).
[08:03:13.683] <TB0> INFO: Test took 1192ms.
[08:03:13.685] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:13.992] <TB0> INFO: Expecting 2560 events.
[08:03:14.880] <TB0> INFO: 2560 events read in total (296ms).
[08:03:14.880] <TB0> INFO: Test took 1195ms.
[08:03:14.883] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:15.189] <TB0> INFO: Expecting 2560 events.
[08:03:16.076] <TB0> INFO: 2560 events read in total (296ms).
[08:03:16.077] <TB0> INFO: Test took 1194ms.
[08:03:16.079] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:16.385] <TB0> INFO: Expecting 2560 events.
[08:03:17.270] <TB0> INFO: 2560 events read in total (293ms).
[08:03:17.270] <TB0> INFO: Test took 1191ms.
[08:03:17.274] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:17.578] <TB0> INFO: Expecting 2560 events.
[08:03:18.466] <TB0> INFO: 2560 events read in total (297ms).
[08:03:18.467] <TB0> INFO: Test took 1194ms.
[08:03:18.470] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:18.775] <TB0> INFO: Expecting 2560 events.
[08:03:19.670] <TB0> INFO: 2560 events read in total (304ms).
[08:03:19.671] <TB0> INFO: Test took 1201ms.
[08:03:19.673] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:19.980] <TB0> INFO: Expecting 2560 events.
[08:03:20.873] <TB0> INFO: 2560 events read in total (302ms).
[08:03:20.873] <TB0> INFO: Test took 1200ms.
[08:03:20.876] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:21.181] <TB0> INFO: Expecting 2560 events.
[08:03:22.070] <TB0> INFO: 2560 events read in total (297ms).
[08:03:22.070] <TB0> INFO: Test took 1194ms.
[08:03:22.074] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:22.377] <TB0> INFO: Expecting 2560 events.
[08:03:23.271] <TB0> INFO: 2560 events read in total (302ms).
[08:03:23.272] <TB0> INFO: Test took 1198ms.
[08:03:23.276] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:23.578] <TB0> INFO: Expecting 2560 events.
[08:03:24.476] <TB0> INFO: 2560 events read in total (306ms).
[08:03:24.476] <TB0> INFO: Test took 1200ms.
[08:03:24.481] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:24.784] <TB0> INFO: Expecting 2560 events.
[08:03:25.678] <TB0> INFO: 2560 events read in total (302ms).
[08:03:25.678] <TB0> INFO: Test took 1197ms.
[08:03:25.681] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:25.987] <TB0> INFO: Expecting 2560 events.
[08:03:26.873] <TB0> INFO: 2560 events read in total (294ms).
[08:03:26.874] <TB0> INFO: Test took 1193ms.
[08:03:26.876] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:27.182] <TB0> INFO: Expecting 2560 events.
[08:03:28.073] <TB0> INFO: 2560 events read in total (299ms).
[08:03:28.074] <TB0> INFO: Test took 1198ms.
[08:03:28.542] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 648 seconds
[08:03:28.542] <TB0> INFO: PH scale (per ROC): 40 36 48 34 46 42 59 34 43 30 49 48 47 40 28 49
[08:03:28.542] <TB0> INFO: PH offset (per ROC): 98 110 106 107 96 128 127 112 129 101 128 130 80 86 91 112
[08:03:28.553] <TB0> INFO: Decoding statistics:
[08:03:28.553] <TB0> INFO: General information:
[08:03:28.553] <TB0> INFO: 16bit words read: 127864
[08:03:28.553] <TB0> INFO: valid events total: 20480
[08:03:28.553] <TB0> INFO: empty events: 17988
[08:03:28.553] <TB0> INFO: valid events with pixels: 2492
[08:03:28.553] <TB0> INFO: valid pixel hits: 2492
[08:03:28.553] <TB0> INFO: Event errors: 0
[08:03:28.553] <TB0> INFO: start marker: 0
[08:03:28.553] <TB0> INFO: stop marker: 0
[08:03:28.553] <TB0> INFO: overflow: 0
[08:03:28.553] <TB0> INFO: invalid 5bit words: 0
[08:03:28.553] <TB0> INFO: invalid XOR eye diagram: 0
[08:03:28.553] <TB0> INFO: frame (failed synchr.): 0
[08:03:28.553] <TB0> INFO: idle data (no TBM trl): 0
[08:03:28.553] <TB0> INFO: no data (only TBM hdr): 0
[08:03:28.553] <TB0> INFO: TBM errors: 0
[08:03:28.553] <TB0> INFO: flawed TBM headers: 0
[08:03:28.553] <TB0> INFO: flawed TBM trailers: 0
[08:03:28.553] <TB0> INFO: event ID mismatches: 0
[08:03:28.553] <TB0> INFO: ROC errors: 0
[08:03:28.554] <TB0> INFO: missing ROC header(s): 0
[08:03:28.554] <TB0> INFO: misplaced readback start: 0
[08:03:28.554] <TB0> INFO: Pixel decoding errors: 0
[08:03:28.554] <TB0> INFO: pixel data incomplete: 0
[08:03:28.554] <TB0> INFO: pixel address: 0
[08:03:28.554] <TB0> INFO: pulse height fill bit: 0
[08:03:28.554] <TB0> INFO: buffer corruption: 0
[08:03:28.722] <TB0> INFO: ######################################################################
[08:03:28.722] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[08:03:28.722] <TB0> INFO: ######################################################################
[08:03:28.737] <TB0> INFO: scanning low vcal = 10
[08:03:28.974] <TB0> INFO: Expecting 41600 events.
[08:03:32.565] <TB0> INFO: 41600 events read in total (2999ms).
[08:03:32.566] <TB0> INFO: Test took 3829ms.
[08:03:32.568] <TB0> INFO: scanning low vcal = 20
[08:03:32.866] <TB0> INFO: Expecting 41600 events.
[08:03:36.479] <TB0> INFO: 41600 events read in total (3021ms).
[08:03:36.479] <TB0> INFO: Test took 3911ms.
[08:03:36.481] <TB0> INFO: scanning low vcal = 30
[08:03:36.775] <TB0> INFO: Expecting 41600 events.
[08:03:40.474] <TB0> INFO: 41600 events read in total (3108ms).
[08:03:40.475] <TB0> INFO: Test took 3994ms.
[08:03:40.478] <TB0> INFO: scanning low vcal = 40
[08:03:40.755] <TB0> INFO: Expecting 41600 events.
[08:03:44.725] <TB0> INFO: 41600 events read in total (3378ms).
[08:03:44.726] <TB0> INFO: Test took 4247ms.
[08:03:44.730] <TB0> INFO: scanning low vcal = 50
[08:03:45.007] <TB0> INFO: Expecting 41600 events.
[08:03:49.028] <TB0> INFO: 41600 events read in total (3429ms).
[08:03:49.028] <TB0> INFO: Test took 4298ms.
[08:03:49.032] <TB0> INFO: scanning low vcal = 60
[08:03:49.309] <TB0> INFO: Expecting 41600 events.
[08:03:53.329] <TB0> INFO: 41600 events read in total (3428ms).
[08:03:53.330] <TB0> INFO: Test took 4298ms.
[08:03:53.333] <TB0> INFO: scanning low vcal = 70
[08:03:53.610] <TB0> INFO: Expecting 41600 events.
[08:03:57.651] <TB0> INFO: 41600 events read in total (3447ms).
[08:03:57.652] <TB0> INFO: Test took 4319ms.
[08:03:57.655] <TB0> INFO: scanning low vcal = 80
[08:03:57.933] <TB0> INFO: Expecting 41600 events.
[08:04:01.943] <TB0> INFO: 41600 events read in total (3419ms).
[08:04:01.944] <TB0> INFO: Test took 4289ms.
[08:04:01.947] <TB0> INFO: scanning low vcal = 90
[08:04:02.225] <TB0> INFO: Expecting 41600 events.
[08:04:06.186] <TB0> INFO: 41600 events read in total (3370ms).
[08:04:06.187] <TB0> INFO: Test took 4240ms.
[08:04:06.191] <TB0> INFO: scanning low vcal = 100
[08:04:06.467] <TB0> INFO: Expecting 41600 events.
[08:04:10.414] <TB0> INFO: 41600 events read in total (3356ms).
[08:04:10.415] <TB0> INFO: Test took 4223ms.
[08:04:10.418] <TB0> INFO: scanning low vcal = 110
[08:04:10.694] <TB0> INFO: Expecting 41600 events.
[08:04:14.668] <TB0> INFO: 41600 events read in total (3382ms).
[08:04:14.669] <TB0> INFO: Test took 4250ms.
[08:04:14.673] <TB0> INFO: scanning low vcal = 120
[08:04:14.949] <TB0> INFO: Expecting 41600 events.
[08:04:18.908] <TB0> INFO: 41600 events read in total (3368ms).
[08:04:18.909] <TB0> INFO: Test took 4236ms.
[08:04:18.912] <TB0> INFO: scanning low vcal = 130
[08:04:19.188] <TB0> INFO: Expecting 41600 events.
[08:04:23.137] <TB0> INFO: 41600 events read in total (3357ms).
[08:04:23.138] <TB0> INFO: Test took 4226ms.
[08:04:23.141] <TB0> INFO: scanning low vcal = 140
[08:04:23.417] <TB0> INFO: Expecting 41600 events.
[08:04:27.379] <TB0> INFO: 41600 events read in total (3370ms).
[08:04:27.380] <TB0> INFO: Test took 4239ms.
[08:04:27.383] <TB0> INFO: scanning low vcal = 150
[08:04:27.659] <TB0> INFO: Expecting 41600 events.
[08:04:31.654] <TB0> INFO: 41600 events read in total (3403ms).
[08:04:31.655] <TB0> INFO: Test took 4272ms.
[08:04:31.658] <TB0> INFO: scanning low vcal = 160
[08:04:31.935] <TB0> INFO: Expecting 41600 events.
[08:04:35.953] <TB0> INFO: 41600 events read in total (3426ms).
[08:04:35.954] <TB0> INFO: Test took 4296ms.
[08:04:35.958] <TB0> INFO: scanning low vcal = 170
[08:04:36.235] <TB0> INFO: Expecting 41600 events.
[08:04:40.223] <TB0> INFO: 41600 events read in total (3397ms).
[08:04:40.225] <TB0> INFO: Test took 4267ms.
[08:04:40.230] <TB0> INFO: scanning low vcal = 180
[08:04:40.504] <TB0> INFO: Expecting 41600 events.
[08:04:44.454] <TB0> INFO: 41600 events read in total (3358ms).
[08:04:44.455] <TB0> INFO: Test took 4224ms.
[08:04:44.460] <TB0> INFO: scanning low vcal = 190
[08:04:44.735] <TB0> INFO: Expecting 41600 events.
[08:04:48.693] <TB0> INFO: 41600 events read in total (3367ms).
[08:04:48.694] <TB0> INFO: Test took 4234ms.
[08:04:48.699] <TB0> INFO: scanning low vcal = 200
[08:04:48.975] <TB0> INFO: Expecting 41600 events.
[08:04:52.961] <TB0> INFO: 41600 events read in total (3394ms).
[08:04:52.962] <TB0> INFO: Test took 4263ms.
[08:04:52.965] <TB0> INFO: scanning low vcal = 210
[08:04:53.242] <TB0> INFO: Expecting 41600 events.
[08:04:57.220] <TB0> INFO: 41600 events read in total (3387ms).
[08:04:57.221] <TB0> INFO: Test took 4256ms.
[08:04:57.225] <TB0> INFO: scanning low vcal = 220
[08:04:57.501] <TB0> INFO: Expecting 41600 events.
[08:05:01.459] <TB0> INFO: 41600 events read in total (3366ms).
[08:05:01.460] <TB0> INFO: Test took 4235ms.
[08:05:01.463] <TB0> INFO: scanning low vcal = 230
[08:05:01.740] <TB0> INFO: Expecting 41600 events.
[08:05:05.707] <TB0> INFO: 41600 events read in total (3376ms).
[08:05:05.708] <TB0> INFO: Test took 4244ms.
[08:05:05.711] <TB0> INFO: scanning low vcal = 240
[08:05:05.988] <TB0> INFO: Expecting 41600 events.
[08:05:09.971] <TB0> INFO: 41600 events read in total (3391ms).
[08:05:09.971] <TB0> INFO: Test took 4259ms.
[08:05:09.975] <TB0> INFO: scanning low vcal = 250
[08:05:10.251] <TB0> INFO: Expecting 41600 events.
[08:05:14.230] <TB0> INFO: 41600 events read in total (3387ms).
[08:05:14.231] <TB0> INFO: Test took 4256ms.
[08:05:14.235] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[08:05:14.511] <TB0> INFO: Expecting 41600 events.
[08:05:18.463] <TB0> INFO: 41600 events read in total (3361ms).
[08:05:18.464] <TB0> INFO: Test took 4228ms.
[08:05:18.467] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[08:05:18.744] <TB0> INFO: Expecting 41600 events.
[08:05:22.716] <TB0> INFO: 41600 events read in total (3380ms).
[08:05:22.717] <TB0> INFO: Test took 4250ms.
[08:05:22.721] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[08:05:22.997] <TB0> INFO: Expecting 41600 events.
[08:05:26.943] <TB0> INFO: 41600 events read in total (3355ms).
[08:05:26.944] <TB0> INFO: Test took 4223ms.
[08:05:26.948] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[08:05:27.224] <TB0> INFO: Expecting 41600 events.
[08:05:31.182] <TB0> INFO: 41600 events read in total (3365ms).
[08:05:31.183] <TB0> INFO: Test took 4235ms.
[08:05:31.187] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[08:05:31.463] <TB0> INFO: Expecting 41600 events.
[08:05:35.415] <TB0> INFO: 41600 events read in total (3361ms).
[08:05:35.416] <TB0> INFO: Test took 4228ms.
[08:05:35.918] <TB0> INFO: PixTestGainPedestal::measure() done
[08:06:16.914] <TB0> INFO: PixTestGainPedestal::fit() done
[08:06:16.914] <TB0> INFO: non-linearity mean: 0.959 0.948 0.979 0.970 0.961 0.980 0.985 0.913 0.980 1.001 0.987 0.987 0.949 0.940 1.028 0.973
[08:06:16.914] <TB0> INFO: non-linearity RMS: 0.164 0.079 0.008 0.163 0.028 0.005 0.003 0.144 0.005 0.178 0.003 0.003 0.076 0.096 0.169 0.016
[08:06:16.914] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//phCalibrationFitErr35_C0.dat
[08:06:16.929] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//phCalibrationFitErr35_C1.dat
[08:06:16.942] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//phCalibrationFitErr35_C2.dat
[08:06:16.955] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//phCalibrationFitErr35_C3.dat
[08:06:16.968] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//phCalibrationFitErr35_C4.dat
[08:06:16.981] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//phCalibrationFitErr35_C5.dat
[08:06:16.994] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//phCalibrationFitErr35_C6.dat
[08:06:17.007] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//phCalibrationFitErr35_C7.dat
[08:06:17.020] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//phCalibrationFitErr35_C8.dat
[08:06:17.033] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//phCalibrationFitErr35_C9.dat
[08:06:17.045] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//phCalibrationFitErr35_C10.dat
[08:06:17.061] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//phCalibrationFitErr35_C11.dat
[08:06:17.079] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//phCalibrationFitErr35_C12.dat
[08:06:17.095] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//phCalibrationFitErr35_C13.dat
[08:06:17.109] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//phCalibrationFitErr35_C14.dat
[08:06:17.122] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//phCalibrationFitErr35_C15.dat
[08:06:17.135] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 168 seconds
[08:06:17.135] <TB0> INFO: Decoding statistics:
[08:06:17.135] <TB0> INFO: General information:
[08:06:17.135] <TB0> INFO: 16bit words read: 3281128
[08:06:17.135] <TB0> INFO: valid events total: 332800
[08:06:17.135] <TB0> INFO: empty events: 2195
[08:06:17.135] <TB0> INFO: valid events with pixels: 330605
[08:06:17.135] <TB0> INFO: valid pixel hits: 642164
[08:06:17.135] <TB0> INFO: Event errors: 0
[08:06:17.135] <TB0> INFO: start marker: 0
[08:06:17.135] <TB0> INFO: stop marker: 0
[08:06:17.135] <TB0> INFO: overflow: 0
[08:06:17.135] <TB0> INFO: invalid 5bit words: 0
[08:06:17.135] <TB0> INFO: invalid XOR eye diagram: 0
[08:06:17.135] <TB0> INFO: frame (failed synchr.): 0
[08:06:17.135] <TB0> INFO: idle data (no TBM trl): 0
[08:06:17.135] <TB0> INFO: no data (only TBM hdr): 0
[08:06:17.135] <TB0> INFO: TBM errors: 0
[08:06:17.136] <TB0> INFO: flawed TBM headers: 0
[08:06:17.136] <TB0> INFO: flawed TBM trailers: 0
[08:06:17.136] <TB0> INFO: event ID mismatches: 0
[08:06:17.136] <TB0> INFO: ROC errors: 0
[08:06:17.136] <TB0> INFO: missing ROC header(s): 0
[08:06:17.136] <TB0> INFO: misplaced readback start: 0
[08:06:17.136] <TB0> INFO: Pixel decoding errors: 0
[08:06:17.136] <TB0> INFO: pixel data incomplete: 0
[08:06:17.136] <TB0> INFO: pixel address: 0
[08:06:17.136] <TB0> INFO: pulse height fill bit: 0
[08:06:17.136] <TB0> INFO: buffer corruption: 0
[08:06:17.155] <TB0> INFO: Decoding statistics:
[08:06:17.155] <TB0> INFO: General information:
[08:06:17.155] <TB0> INFO: 16bit words read: 3410528
[08:06:17.155] <TB0> INFO: valid events total: 353536
[08:06:17.155] <TB0> INFO: empty events: 20439
[08:06:17.155] <TB0> INFO: valid events with pixels: 333097
[08:06:17.155] <TB0> INFO: valid pixel hits: 644656
[08:06:17.155] <TB0> INFO: Event errors: 0
[08:06:17.155] <TB0> INFO: start marker: 0
[08:06:17.155] <TB0> INFO: stop marker: 0
[08:06:17.155] <TB0> INFO: overflow: 0
[08:06:17.155] <TB0> INFO: invalid 5bit words: 0
[08:06:17.155] <TB0> INFO: invalid XOR eye diagram: 0
[08:06:17.155] <TB0> INFO: frame (failed synchr.): 0
[08:06:17.155] <TB0> INFO: idle data (no TBM trl): 0
[08:06:17.155] <TB0> INFO: no data (only TBM hdr): 0
[08:06:17.155] <TB0> INFO: TBM errors: 0
[08:06:17.155] <TB0> INFO: flawed TBM headers: 0
[08:06:17.155] <TB0> INFO: flawed TBM trailers: 0
[08:06:17.155] <TB0> INFO: event ID mismatches: 0
[08:06:17.155] <TB0> INFO: ROC errors: 0
[08:06:17.155] <TB0> INFO: missing ROC header(s): 0
[08:06:17.155] <TB0> INFO: misplaced readback start: 0
[08:06:17.155] <TB0> INFO: Pixel decoding errors: 0
[08:06:17.155] <TB0> INFO: pixel data incomplete: 0
[08:06:17.155] <TB0> INFO: pixel address: 0
[08:06:17.155] <TB0> INFO: pulse height fill bit: 0
[08:06:17.155] <TB0> INFO: buffer corruption: 0
[08:06:17.155] <TB0> INFO: enter test to run
[08:06:17.155] <TB0> INFO: test: trim80 no parameter change
[08:06:17.155] <TB0> INFO: running: trim80
[08:06:17.157] <TB0> INFO: ######################################################################
[08:06:17.157] <TB0> INFO: PixTestTrim80::doTest()
[08:06:17.157] <TB0> INFO: ######################################################################
[08:06:17.158] <TB0> INFO: ----------------------------------------------------------------------
[08:06:17.158] <TB0> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[08:06:17.158] <TB0> INFO: ----------------------------------------------------------------------
[08:06:17.217] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[08:06:17.217] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[08:06:17.232] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[08:06:17.232] <TB0> INFO: run 1 of 1
[08:06:17.468] <TB0> INFO: Expecting 5025280 events.
[08:06:46.037] <TB0> INFO: 688760 events read in total (27977ms).
[08:07:14.029] <TB0> INFO: 1373296 events read in total (55969ms).
[08:07:41.791] <TB0> INFO: 2054632 events read in total (83731ms).
[08:08:10.009] <TB0> INFO: 2734776 events read in total (111949ms).
[08:08:37.597] <TB0> INFO: 3413992 events read in total (139537ms).
[08:09:04.970] <TB0> INFO: 4092168 events read in total (166910ms).
[08:09:32.573] <TB0> INFO: 4769904 events read in total (194513ms).
[08:09:43.370] <TB0> INFO: 5025280 events read in total (205310ms).
[08:09:43.451] <TB0> INFO: Test took 206219ms.
[08:10:04.466] <TB0> INFO: ROC 0 VthrComp = 84
[08:10:04.466] <TB0> INFO: ROC 1 VthrComp = 77
[08:10:04.466] <TB0> INFO: ROC 2 VthrComp = 77
[08:10:04.467] <TB0> INFO: ROC 3 VthrComp = 74
[08:10:04.467] <TB0> INFO: ROC 4 VthrComp = 81
[08:10:04.467] <TB0> INFO: ROC 5 VthrComp = 84
[08:10:04.467] <TB0> INFO: ROC 6 VthrComp = 73
[08:10:04.467] <TB0> INFO: ROC 7 VthrComp = 79
[08:10:04.467] <TB0> INFO: ROC 8 VthrComp = 74
[08:10:04.467] <TB0> INFO: ROC 9 VthrComp = 74
[08:10:04.467] <TB0> INFO: ROC 10 VthrComp = 75
[08:10:04.467] <TB0> INFO: ROC 11 VthrComp = 76
[08:10:04.467] <TB0> INFO: ROC 12 VthrComp = 77
[08:10:04.468] <TB0> INFO: ROC 13 VthrComp = 73
[08:10:04.468] <TB0> INFO: ROC 14 VthrComp = 85
[08:10:04.468] <TB0> INFO: ROC 15 VthrComp = 83
[08:10:04.758] <TB0> INFO: Expecting 41600 events.
[08:10:08.429] <TB0> INFO: 41600 events read in total (3079ms).
[08:10:08.431] <TB0> INFO: Test took 3961ms.
[08:10:08.441] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[08:10:08.441] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[08:10:08.456] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[08:10:08.457] <TB0> INFO: run 1 of 1
[08:10:08.735] <TB0> INFO: Expecting 5025280 events.
[08:10:37.098] <TB0> INFO: 685800 events read in total (27771ms).
[08:11:04.688] <TB0> INFO: 1367016 events read in total (55361ms).
[08:11:32.129] <TB0> INFO: 2049688 events read in total (82802ms).
[08:11:59.895] <TB0> INFO: 2731072 events read in total (110568ms).
[08:12:27.969] <TB0> INFO: 3409704 events read in total (138643ms).
[08:12:55.977] <TB0> INFO: 4085288 events read in total (166650ms).
[08:13:23.777] <TB0> INFO: 4762200 events read in total (194450ms).
[08:13:34.609] <TB0> INFO: 5025280 events read in total (205282ms).
[08:13:34.764] <TB0> INFO: Test took 206307ms.
[08:13:55.341] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 109.529 for pixel 8/73 mean/min/max = 91.7472/73.8841/109.61
[08:13:55.341] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 117.43 for pixel 0/38 mean/min/max = 96.9939/76.0887/117.899
[08:13:55.341] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 111.321 for pixel 0/0 mean/min/max = 94.4424/77.5408/111.344
[08:13:55.342] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 111.721 for pixel 2/59 mean/min/max = 95.2886/78.7709/111.806
[08:13:55.342] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 119.196 for pixel 6/77 mean/min/max = 96.5105/73.446/119.575
[08:13:55.343] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 110.924 for pixel 19/16 mean/min/max = 92.9818/74.9234/111.04
[08:13:55.343] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 113.22 for pixel 0/10 mean/min/max = 95.3521/77.2104/113.494
[08:13:55.344] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 111.705 for pixel 6/77 mean/min/max = 94.5888/77.4115/111.766
[08:13:55.344] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 114.52 for pixel 12/79 mean/min/max = 96.5427/78.211/114.874
[08:13:55.345] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 111.025 for pixel 10/14 mean/min/max = 94.3239/77.4694/111.178
[08:13:55.345] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 113.262 for pixel 0/49 mean/min/max = 94.8574/76.4427/113.272
[08:13:55.346] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 113.582 for pixel 0/79 mean/min/max = 96.0525/78.4669/113.638
[08:13:55.346] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 111.438 for pixel 1/68 mean/min/max = 94.6056/77.7098/111.501
[08:13:55.347] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 112.293 for pixel 0/51 mean/min/max = 94.7875/77.1419/112.433
[08:13:55.347] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 109.254 for pixel 13/68 mean/min/max = 91.7158/74.0754/109.356
[08:13:55.348] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 109 for pixel 0/27 mean/min/max = 91.8776/74.626/109.129
[08:13:55.348] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:13:55.438] <TB0> INFO: Expecting 411648 events.
[08:14:04.929] <TB0> INFO: 411648 events read in total (8900ms).
[08:14:04.945] <TB0> INFO: Expecting 411648 events.
[08:14:14.305] <TB0> INFO: 411648 events read in total (8957ms).
[08:14:14.319] <TB0> INFO: Expecting 411648 events.
[08:14:23.722] <TB0> INFO: 411648 events read in total (9000ms).
[08:14:23.735] <TB0> INFO: Expecting 411648 events.
[08:14:33.138] <TB0> INFO: 411648 events read in total (9000ms).
[08:14:33.154] <TB0> INFO: Expecting 411648 events.
[08:14:42.602] <TB0> INFO: 411648 events read in total (9045ms).
[08:14:42.621] <TB0> INFO: Expecting 411648 events.
[08:14:51.889] <TB0> INFO: 411648 events read in total (8865ms).
[08:14:51.910] <TB0> INFO: Expecting 411648 events.
[08:15:01.224] <TB0> INFO: 411648 events read in total (8911ms).
[08:15:01.249] <TB0> INFO: Expecting 411648 events.
[08:15:10.685] <TB0> INFO: 411648 events read in total (9033ms).
[08:15:10.717] <TB0> INFO: Expecting 411648 events.
[08:15:19.971] <TB0> INFO: 411648 events read in total (8851ms).
[08:15:20.007] <TB0> INFO: Expecting 411648 events.
[08:15:29.180] <TB0> INFO: 411648 events read in total (8770ms).
[08:15:29.233] <TB0> INFO: Expecting 411648 events.
[08:15:38.920] <TB0> INFO: 411648 events read in total (9284ms).
[08:15:38.966] <TB0> INFO: Expecting 411648 events.
[08:15:48.277] <TB0> INFO: 411648 events read in total (8908ms).
[08:15:48.346] <TB0> INFO: Expecting 411648 events.
[08:15:57.694] <TB0> INFO: 411648 events read in total (8945ms).
[08:15:57.747] <TB0> INFO: Expecting 411648 events.
[08:16:07.156] <TB0> INFO: 411648 events read in total (9006ms).
[08:16:07.215] <TB0> INFO: Expecting 411648 events.
[08:16:16.400] <TB0> INFO: 411648 events read in total (8782ms).
[08:16:16.495] <TB0> INFO: Expecting 411648 events.
[08:16:25.911] <TB0> INFO: 411648 events read in total (9013ms).
[08:16:25.977] <TB0> INFO: Test took 150629ms.
[08:16:27.571] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[08:16:27.584] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[08:16:27.584] <TB0> INFO: run 1 of 1
[08:16:27.820] <TB0> INFO: Expecting 5025280 events.
[08:16:56.307] <TB0> INFO: 668624 events read in total (27895ms).
[08:17:24.263] <TB0> INFO: 1333976 events read in total (55851ms).
[08:17:51.995] <TB0> INFO: 1999888 events read in total (83583ms).
[08:18:19.583] <TB0> INFO: 2662304 events read in total (111171ms).
[08:18:46.994] <TB0> INFO: 3321352 events read in total (138582ms).
[08:19:14.740] <TB0> INFO: 3979592 events read in total (166328ms).
[08:19:41.628] <TB0> INFO: 4635480 events read in total (193216ms).
[08:19:57.783] <TB0> INFO: 5025280 events read in total (209371ms).
[08:19:57.855] <TB0> INFO: Test took 210270ms.
[08:20:20.682] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 50.705099 .. 106.408030
[08:20:20.932] <TB0> INFO: Expecting 208000 events.
[08:20:30.717] <TB0> INFO: 208000 events read in total (9193ms).
[08:20:30.718] <TB0> INFO: Test took 10034ms.
[08:20:30.764] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 40 .. 116 (-1/-1) hits flags = 528 (plus default)
[08:20:30.778] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[08:20:30.779] <TB0> INFO: run 1 of 1
[08:20:31.059] <TB0> INFO: Expecting 2562560 events.
[08:20:59.263] <TB0> INFO: 677448 events read in total (27612ms).
[08:21:26.666] <TB0> INFO: 1355648 events read in total (55015ms).
[08:21:55.538] <TB0> INFO: 2031248 events read in total (83887ms).
[08:22:17.484] <TB0> INFO: 2562560 events read in total (105833ms).
[08:22:17.539] <TB0> INFO: Test took 106760ms.
[08:22:37.887] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 61.724101 .. 95.523915
[08:22:38.127] <TB0> INFO: Expecting 208000 events.
[08:22:47.939] <TB0> INFO: 208000 events read in total (9220ms).
[08:22:47.940] <TB0> INFO: Test took 10052ms.
[08:22:48.009] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 51 .. 105 (-1/-1) hits flags = 528 (plus default)
[08:22:48.023] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[08:22:48.023] <TB0> INFO: run 1 of 1
[08:22:48.301] <TB0> INFO: Expecting 1830400 events.
[08:23:17.709] <TB0> INFO: 679888 events read in total (28816ms).
[08:23:45.538] <TB0> INFO: 1360368 events read in total (56645ms).
[08:24:04.829] <TB0> INFO: 1830400 events read in total (75936ms).
[08:24:04.873] <TB0> INFO: Test took 76851ms.
[08:24:20.958] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 65.988066 .. 96.916046
[08:24:21.201] <TB0> INFO: Expecting 208000 events.
[08:24:31.254] <TB0> INFO: 208000 events read in total (9461ms).
[08:24:31.255] <TB0> INFO: Test took 10295ms.
[08:24:31.338] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 55 .. 106 (-1/-1) hits flags = 528 (plus default)
[08:24:31.353] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[08:24:31.353] <TB0> INFO: run 1 of 1
[08:24:31.656] <TB0> INFO: Expecting 1730560 events.
[08:25:01.082] <TB0> INFO: 664408 events read in total (28834ms).
[08:25:29.006] <TB0> INFO: 1329000 events read in total (56758ms).
[08:25:45.606] <TB0> INFO: 1730560 events read in total (73358ms).
[08:25:45.649] <TB0> INFO: Test took 74297ms.
[08:26:04.494] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 68.589398 .. 95.061145
[08:26:04.777] <TB0> INFO: Expecting 208000 events.
[08:26:15.271] <TB0> INFO: 208000 events read in total (9902ms).
[08:26:15.272] <TB0> INFO: Test took 10776ms.
[08:26:15.322] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 58 .. 105 (-1/-1) hits flags = 528 (plus default)
[08:26:15.336] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[08:26:15.336] <TB0> INFO: run 1 of 1
[08:26:15.627] <TB0> INFO: Expecting 1597440 events.
[08:26:44.268] <TB0> INFO: 658808 events read in total (28049ms).
[08:27:11.939] <TB0> INFO: 1317432 events read in total (55720ms).
[08:27:24.309] <TB0> INFO: 1597440 events read in total (68090ms).
[08:27:24.349] <TB0> INFO: Test took 69013ms.
[08:27:42.478] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[08:27:42.478] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[08:27:42.492] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[08:27:42.492] <TB0> INFO: run 1 of 1
[08:27:42.728] <TB0> INFO: Expecting 1364480 events.
[08:28:11.210] <TB0> INFO: 668008 events read in total (27890ms).
[08:28:39.582] <TB0> INFO: 1335848 events read in total (56263ms).
[08:28:41.243] <TB0> INFO: 1364480 events read in total (57923ms).
[08:28:41.283] <TB0> INFO: Test took 58792ms.
[08:28:56.344] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters80_C0.dat
[08:28:56.345] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters80_C1.dat
[08:28:56.345] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters80_C2.dat
[08:28:56.345] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters80_C3.dat
[08:28:56.345] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters80_C4.dat
[08:28:56.345] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters80_C5.dat
[08:28:56.345] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters80_C6.dat
[08:28:56.345] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters80_C7.dat
[08:28:56.345] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters80_C8.dat
[08:28:56.346] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters80_C9.dat
[08:28:56.346] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters80_C10.dat
[08:28:56.346] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters80_C11.dat
[08:28:56.346] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters80_C12.dat
[08:28:56.346] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters80_C13.dat
[08:28:56.346] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters80_C14.dat
[08:28:56.346] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//dacParameters80_C15.dat
[08:28:56.346] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters80_C0.dat
[08:28:56.353] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters80_C1.dat
[08:28:56.360] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters80_C2.dat
[08:28:56.368] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters80_C3.dat
[08:28:56.375] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters80_C4.dat
[08:28:56.383] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters80_C5.dat
[08:28:56.390] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters80_C6.dat
[08:28:56.397] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters80_C7.dat
[08:28:56.405] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters80_C8.dat
[08:28:56.412] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters80_C9.dat
[08:28:56.419] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters80_C10.dat
[08:28:56.423] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters80_C11.dat
[08:28:56.428] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters80_C12.dat
[08:28:56.433] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters80_C13.dat
[08:28:56.438] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters80_C14.dat
[08:28:56.443] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1071_FullQualification_2016-11-03_14h08m_1478178483//003_FulltestTrim80_p17//trimParameters80_C15.dat
[08:28:56.449] <TB0> INFO: PixTestTrim80::trimTest() done
[08:28:56.449] <TB0> INFO: vtrim: 95 109 96 101 114 105 108 107 119 111 101 104 94 103 97 90
[08:28:56.449] <TB0> INFO: vthrcomp: 84 77 77 74 81 84 73 79 74 74 75 76 77 73 85 83
[08:28:56.449] <TB0> INFO: vcal mean: 79.89 79.93 79.93 79.97 79.96 79.90 80.01 79.99 79.96 79.93 79.97 79.95 79.95 80.01 79.98 79.96
[08:28:56.449] <TB0> INFO: vcal RMS: 0.82 0.84 0.78 0.80 0.91 1.96 0.77 0.80 0.82 1.92 0.81 0.80 0.75 0.97 0.92 0.80
[08:28:56.449] <TB0> INFO: bits mean: 10.10 9.27 9.30 9.38 9.59 9.88 8.95 9.46 9.21 9.78 9.32 8.67 9.33 9.41 10.14 9.62
[08:28:56.449] <TB0> INFO: bits RMS: 2.44 2.36 2.29 2.10 2.53 2.38 2.39 2.27 2.18 2.07 2.38 2.40 2.26 2.27 2.47 2.65
[08:28:56.456] <TB0> INFO: ----------------------------------------------------------------------
[08:28:56.456] <TB0> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[08:28:56.456] <TB0> INFO: ----------------------------------------------------------------------
[08:28:56.459] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[08:28:56.474] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[08:28:56.474] <TB0> INFO: run 1 of 1
[08:28:56.766] <TB0> INFO: Expecting 4160000 events.
[08:29:30.137] <TB0> INFO: 788885 events read in total (32779ms).
[08:30:03.730] <TB0> INFO: 1570020 events read in total (66372ms).
[08:30:36.679] <TB0> INFO: 2344890 events read in total (99322ms).
[08:31:09.310] <TB0> INFO: 3112985 events read in total (131952ms).
[08:31:41.914] <TB0> INFO: 3879110 events read in total (164556ms).
[08:31:53.931] <TB0> INFO: 4160000 events read in total (176573ms).
[08:31:53.999] <TB0> INFO: Test took 177526ms.
[08:32:17.240] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[08:32:17.254] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[08:32:17.254] <TB0> INFO: run 1 of 1
[08:32:17.492] <TB0> INFO: Expecting 5324800 events.
[08:32:48.838] <TB0> INFO: 694585 events read in total (30748ms).
[08:33:18.867] <TB0> INFO: 1384640 events read in total (60777ms).
[08:33:49.743] <TB0> INFO: 2072550 events read in total (91653ms).
[08:34:20.426] <TB0> INFO: 2758210 events read in total (122336ms).
[08:34:50.712] <TB0> INFO: 3442175 events read in total (152622ms).
[08:35:20.632] <TB0> INFO: 4124810 events read in total (182542ms).
[08:35:50.904] <TB0> INFO: 4806015 events read in total (212814ms).
[08:36:14.104] <TB0> INFO: 5324800 events read in total (236015ms).
[08:36:14.221] <TB0> INFO: Test took 236966ms.
[08:36:48.180] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 230 (-1/-1) hits flags = 528 (plus default)
[08:36:48.193] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[08:36:48.193] <TB0> INFO: run 1 of 1
[08:36:48.430] <TB0> INFO: Expecting 4804800 events.
[08:37:20.124] <TB0> INFO: 718055 events read in total (31102ms).
[08:37:51.450] <TB0> INFO: 1430830 events read in total (62428ms).
[08:38:22.853] <TB0> INFO: 2140185 events read in total (93831ms).
[08:38:54.143] <TB0> INFO: 2848175 events read in total (125121ms).
[08:39:24.977] <TB0> INFO: 3552445 events read in total (155955ms).
[08:39:55.489] <TB0> INFO: 4255830 events read in total (186467ms).
[08:40:19.396] <TB0> INFO: 4804800 events read in total (210374ms).
[08:40:19.488] <TB0> INFO: Test took 211294ms.
[08:40:50.415] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 230 (-1/-1) hits flags = 528 (plus default)
[08:40:50.429] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[08:40:50.429] <TB0> INFO: run 1 of 1
[08:40:50.672] <TB0> INFO: Expecting 4804800 events.
[08:41:22.505] <TB0> INFO: 718325 events read in total (31241ms).
[08:41:53.651] <TB0> INFO: 1431195 events read in total (62387ms).
[08:42:24.706] <TB0> INFO: 2140265 events read in total (93442ms).
[08:42:55.641] <TB0> INFO: 2848485 events read in total (124377ms).
[08:43:27.911] <TB0> INFO: 3553145 events read in total (156647ms).
[08:43:59.818] <TB0> INFO: 4256435 events read in total (188554ms).
[08:44:24.776] <TB0> INFO: 4804800 events read in total (213512ms).
[08:44:25.238] <TB0> INFO: Test took 214809ms.
[08:44:51.367] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 221 (-1/-1) hits flags = 528 (plus default)
[08:44:51.382] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[08:44:51.382] <TB0> INFO: run 1 of 1
[08:44:51.624] <TB0> INFO: Expecting 4617600 events.
[08:45:24.775] <TB0> INFO: 728755 events read in total (32559ms).
[08:45:57.287] <TB0> INFO: 1451880 events read in total (65071ms).
[08:46:29.629] <TB0> INFO: 2171425 events read in total (97414ms).
[08:46:59.767] <TB0> INFO: 2889145 events read in total (127551ms).
[08:47:29.765] <TB0> INFO: 3603365 events read in total (157549ms).
[08:48:00.456] <TB0> INFO: 4316685 events read in total (188240ms).
[08:48:13.281] <TB0> INFO: 4617600 events read in total (201065ms).
[08:48:13.349] <TB0> INFO: Test took 201967ms.
[08:48:38.313] <TB0> INFO: PixTestTrim80::trimBitTest() done
[08:48:38.314] <TB0> INFO: PixTestTrim80::doTest() done, duration: 2541 seconds
[08:48:38.955] <TB0> INFO: enter test to run
[08:48:38.955] <TB0> INFO: test: exit no parameter change
[08:48:39.165] <TB0> QUIET: Connection to board 71 closed.
[08:48:39.166] <TB0> INFO: pXar: this is the end, my friend