[15:24:30.469] <TB2> INFO: *** Welcome to pxar ***
[15:24:30.469] <TB2> INFO: *** Today: 2016/11/03
[15:24:30.475] <TB2> INFO: *** Version: c8ba-dirty
[15:24:30.475] <TB2> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters_C15.dat
[15:24:30.476] <TB2> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//tbmParameters_C1b.dat
[15:24:30.476] <TB2> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//defaultMaskFile.dat
[15:24:30.476] <TB2> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//trimParameters_C15.dat
[15:24:30.531] <TB2> INFO: clk: 4
[15:24:30.531] <TB2> INFO: ctr: 4
[15:24:30.531] <TB2> INFO: sda: 19
[15:24:30.531] <TB2> INFO: tin: 9
[15:24:30.531] <TB2> INFO: level: 15
[15:24:30.531] <TB2> INFO: triggerdelay: 0
[15:24:30.531] <TB2> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[15:24:30.531] <TB2> INFO: Log level: INFO
[15:24:30.539] <TB2> INFO: Found DTB DTB_WXC55Z
[15:24:30.550] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[15:24:30.552] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[15:24:30.553] <TB2> INFO: RPC call hashes of host and DTB match: 486171790
[15:24:32.040] <TB2> INFO: DUT info:
[15:24:32.040] <TB2> INFO: The DUT currently contains the following objects:
[15:24:32.040] <TB2> INFO: 4 TBM Cores tbm10c (4 ON)
[15:24:32.040] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:24:32.040] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:24:32.040] <TB2> INFO: TBM Core alpha (2): 7 registers set
[15:24:32.040] <TB2> INFO: TBM Core beta (3): 7 registers set
[15:24:32.040] <TB2> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[15:24:32.040] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[15:24:32.040] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[15:24:32.040] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[15:24:32.040] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[15:24:32.040] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[15:24:32.040] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[15:24:32.040] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[15:24:32.040] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[15:24:32.040] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[15:24:32.040] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[15:24:32.040] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[15:24:32.040] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[15:24:32.040] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[15:24:32.040] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[15:24:32.040] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[15:24:32.040] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[15:24:32.441] <TB2> INFO: enter 'restricted' command line mode
[15:24:32.441] <TB2> INFO: enter test to run
[15:24:32.441] <TB2> INFO: test: pretest no parameter change
[15:24:32.441] <TB2> INFO: running: pretest
[15:24:33.019] <TB2> INFO: ######################################################################
[15:24:33.019] <TB2> INFO: PixTestPretest::doTest()
[15:24:33.019] <TB2> INFO: ######################################################################
[15:24:33.021] <TB2> INFO: ----------------------------------------------------------------------
[15:24:33.021] <TB2> INFO: PixTestPretest::programROC()
[15:24:33.021] <TB2> INFO: ----------------------------------------------------------------------
[15:24:51.033] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[15:24:51.033] <TB2> INFO: IA differences per ROC: 20.9 20.1 18.5 20.9 18.5 18.5 20.9 19.3 20.9 17.7 20.1 19.3 18.5 20.1 20.1 20.1
[15:24:51.069] <TB2> INFO: ----------------------------------------------------------------------
[15:24:51.069] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[15:24:51.069] <TB2> INFO: ----------------------------------------------------------------------
[15:25:12.315] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 387.5 mA = 24.2188 mA/ROC
[15:25:12.315] <TB2> INFO: i(loss) [mA/ROC]: 20.1 19.3 20.1 20.1 19.3 20.1 19.3 20.1 20.1 19.3 19.3 20.1 21.7 19.3 19.3 20.1
[15:25:12.343] <TB2> INFO: ----------------------------------------------------------------------
[15:25:12.343] <TB2> INFO: PixTestPretest::findTiming()
[15:25:12.343] <TB2> INFO: ----------------------------------------------------------------------
[15:25:12.343] <TB2> INFO: PixTestCmd::init()

[15:25:43.521] <TB2> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[15:25:43.521] <TB2> INFO: (success/tries = 100/100), width = 3
[15:25:45.030] <TB2> INFO: ----------------------------------------------------------------------
[15:25:45.030] <TB2> INFO: PixTestPretest::findWorkingPixel()
[15:25:45.030] <TB2> INFO: ----------------------------------------------------------------------
[15:25:45.122] <TB2> INFO: Expecting 231680 events.
[15:25:54.766] <TB2> INFO: 231680 events read in total (9052ms).
[15:25:54.773] <TB2> INFO: Test took 9740ms.
[15:25:55.015] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[15:25:55.045] <TB2> INFO: ----------------------------------------------------------------------
[15:25:55.045] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[15:25:55.045] <TB2> INFO: ----------------------------------------------------------------------
[15:25:55.137] <TB2> INFO: Expecting 231680 events.
[15:26:04.716] <TB2> INFO: 231680 events read in total (8988ms).
[15:26:04.723] <TB2> INFO: Test took 9675ms.
[15:26:04.985] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[15:26:04.985] <TB2> INFO: CalDel: 109 113 123 116 113 108 132 121 117 111 120 139 117 111 123 118
[15:26:04.985] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 53 51 51 51 51 51
[15:26:04.988] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters_C0.dat
[15:26:04.988] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters_C1.dat
[15:26:04.988] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters_C2.dat
[15:26:04.988] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters_C3.dat
[15:26:04.988] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters_C4.dat
[15:26:04.988] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters_C5.dat
[15:26:04.988] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters_C6.dat
[15:26:04.989] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters_C7.dat
[15:26:04.989] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters_C8.dat
[15:26:04.989] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters_C9.dat
[15:26:04.989] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters_C10.dat
[15:26:04.989] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters_C11.dat
[15:26:04.989] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters_C12.dat
[15:26:04.989] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters_C13.dat
[15:26:04.989] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters_C14.dat
[15:26:04.989] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters_C15.dat
[15:26:04.989] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//tbmParameters_C0a.dat
[15:26:04.990] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//tbmParameters_C0b.dat
[15:26:04.990] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//tbmParameters_C1a.dat
[15:26:04.990] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//tbmParameters_C1b.dat
[15:26:04.990] <TB2> INFO: PixTestPretest::doTest() done, duration: 92 seconds
[15:26:05.088] <TB2> INFO: enter test to run
[15:26:05.088] <TB2> INFO: test: FullTest no parameter change
[15:26:05.088] <TB2> INFO: running: fulltest
[15:26:05.088] <TB2> INFO: ######################################################################
[15:26:05.088] <TB2> INFO: PixTestFullTest::doTest()
[15:26:05.088] <TB2> INFO: ######################################################################
[15:26:05.089] <TB2> INFO: ######################################################################
[15:26:05.089] <TB2> INFO: PixTestAlive::doTest()
[15:26:05.089] <TB2> INFO: ######################################################################
[15:26:05.090] <TB2> INFO: ----------------------------------------------------------------------
[15:26:05.090] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:26:05.091] <TB2> INFO: ----------------------------------------------------------------------
[15:26:05.324] <TB2> INFO: Expecting 41600 events.
[15:26:08.765] <TB2> INFO: 41600 events read in total (2849ms).
[15:26:08.765] <TB2> INFO: Test took 3673ms.
[15:26:08.991] <TB2> INFO: PixTestAlive::aliveTest() done
[15:26:08.991] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:26:08.992] <TB2> INFO: ----------------------------------------------------------------------
[15:26:08.992] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:26:08.992] <TB2> INFO: ----------------------------------------------------------------------
[15:26:09.228] <TB2> INFO: Expecting 41600 events.
[15:26:12.239] <TB2> INFO: 41600 events read in total (2419ms).
[15:26:12.240] <TB2> INFO: Test took 3246ms.
[15:26:12.240] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[15:26:12.478] <TB2> INFO: PixTestAlive::maskTest() done
[15:26:12.478] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:26:12.480] <TB2> INFO: ----------------------------------------------------------------------
[15:26:12.480] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:26:12.480] <TB2> INFO: ----------------------------------------------------------------------
[15:26:12.712] <TB2> INFO: Expecting 41600 events.
[15:26:16.154] <TB2> INFO: 41600 events read in total (2850ms).
[15:26:16.154] <TB2> INFO: Test took 3673ms.
[15:26:16.382] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[15:26:16.382] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:26:16.382] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[15:26:16.382] <TB2> INFO: Decoding statistics:
[15:26:16.382] <TB2> INFO: General information:
[15:26:16.382] <TB2> INFO: 16bit words read: 0
[15:26:16.382] <TB2> INFO: valid events total: 0
[15:26:16.382] <TB2> INFO: empty events: 0
[15:26:16.382] <TB2> INFO: valid events with pixels: 0
[15:26:16.382] <TB2> INFO: valid pixel hits: 0
[15:26:16.382] <TB2> INFO: Event errors: 0
[15:26:16.382] <TB2> INFO: start marker: 0
[15:26:16.382] <TB2> INFO: stop marker: 0
[15:26:16.383] <TB2> INFO: overflow: 0
[15:26:16.383] <TB2> INFO: invalid 5bit words: 0
[15:26:16.383] <TB2> INFO: invalid XOR eye diagram: 0
[15:26:16.383] <TB2> INFO: frame (failed synchr.): 0
[15:26:16.383] <TB2> INFO: idle data (no TBM trl): 0
[15:26:16.383] <TB2> INFO: no data (only TBM hdr): 0
[15:26:16.383] <TB2> INFO: TBM errors: 0
[15:26:16.383] <TB2> INFO: flawed TBM headers: 0
[15:26:16.383] <TB2> INFO: flawed TBM trailers: 0
[15:26:16.383] <TB2> INFO: event ID mismatches: 0
[15:26:16.383] <TB2> INFO: ROC errors: 0
[15:26:16.383] <TB2> INFO: missing ROC header(s): 0
[15:26:16.383] <TB2> INFO: misplaced readback start: 0
[15:26:16.383] <TB2> INFO: Pixel decoding errors: 0
[15:26:16.383] <TB2> INFO: pixel data incomplete: 0
[15:26:16.383] <TB2> INFO: pixel address: 0
[15:26:16.383] <TB2> INFO: pulse height fill bit: 0
[15:26:16.383] <TB2> INFO: buffer corruption: 0
[15:26:16.390] <TB2> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C15.dat
[15:26:16.390] <TB2> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[15:26:16.390] <TB2> INFO: ######################################################################
[15:26:16.390] <TB2> INFO: PixTestReadback::doTest()
[15:26:16.390] <TB2> INFO: ######################################################################
[15:26:16.391] <TB2> INFO: ----------------------------------------------------------------------
[15:26:16.391] <TB2> INFO: PixTestReadback::CalibrateVd()
[15:26:16.391] <TB2> INFO: ----------------------------------------------------------------------
[15:26:26.345] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C0.dat
[15:26:26.346] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C1.dat
[15:26:26.346] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C2.dat
[15:26:26.346] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C3.dat
[15:26:26.346] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C4.dat
[15:26:26.346] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C5.dat
[15:26:26.346] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C6.dat
[15:26:26.346] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C7.dat
[15:26:26.346] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C8.dat
[15:26:26.346] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C9.dat
[15:26:26.346] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C10.dat
[15:26:26.346] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C11.dat
[15:26:26.346] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C12.dat
[15:26:26.346] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C13.dat
[15:26:26.346] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C14.dat
[15:26:26.346] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C15.dat
[15:26:26.374] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[15:26:26.375] <TB2> INFO: ----------------------------------------------------------------------
[15:26:26.375] <TB2> INFO: PixTestReadback::CalibrateVa()
[15:26:26.375] <TB2> INFO: ----------------------------------------------------------------------
[15:26:36.261] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C0.dat
[15:26:36.261] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C1.dat
[15:26:36.261] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C2.dat
[15:26:36.261] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C3.dat
[15:26:36.261] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C4.dat
[15:26:36.261] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C5.dat
[15:26:36.261] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C6.dat
[15:26:36.261] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C7.dat
[15:26:36.261] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C8.dat
[15:26:36.261] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C9.dat
[15:26:36.261] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C10.dat
[15:26:36.261] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C11.dat
[15:26:36.261] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C12.dat
[15:26:36.261] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C13.dat
[15:26:36.261] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C14.dat
[15:26:36.261] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C15.dat
[15:26:36.289] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[15:26:36.289] <TB2> INFO: ----------------------------------------------------------------------
[15:26:36.289] <TB2> INFO: PixTestReadback::readbackVbg()
[15:26:36.289] <TB2> INFO: ----------------------------------------------------------------------
[15:26:43.931] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[15:26:43.931] <TB2> INFO: ----------------------------------------------------------------------
[15:26:43.931] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[15:26:43.931] <TB2> INFO: ----------------------------------------------------------------------
[15:26:43.931] <TB2> INFO: Vbg will be calibrated using Vd calibration
[15:26:43.931] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 158.3calibrated Vbg = 1.16059 :::*/*/*/*/
[15:26:43.931] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 160.9calibrated Vbg = 1.15693 :::*/*/*/*/
[15:26:43.931] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 159.2calibrated Vbg = 1.15563 :::*/*/*/*/
[15:26:43.931] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 155.5calibrated Vbg = 1.15344 :::*/*/*/*/
[15:26:43.931] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 152.7calibrated Vbg = 1.1579 :::*/*/*/*/
[15:26:43.931] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 149.8calibrated Vbg = 1.15859 :::*/*/*/*/
[15:26:43.931] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 152.4calibrated Vbg = 1.15849 :::*/*/*/*/
[15:26:43.931] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 154.4calibrated Vbg = 1.15916 :::*/*/*/*/
[15:26:43.931] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 153.4calibrated Vbg = 1.15787 :::*/*/*/*/
[15:26:43.931] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 146.8calibrated Vbg = 1.14931 :::*/*/*/*/
[15:26:43.931] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 165.7calibrated Vbg = 1.15461 :::*/*/*/*/
[15:26:43.931] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 152.8calibrated Vbg = 1.14847 :::*/*/*/*/
[15:26:43.931] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 156.4calibrated Vbg = 1.15825 :::*/*/*/*/
[15:26:43.931] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 153.5calibrated Vbg = 1.15757 :::*/*/*/*/
[15:26:43.931] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 155.6calibrated Vbg = 1.16117 :::*/*/*/*/
[15:26:43.931] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 149.8calibrated Vbg = 1.15907 :::*/*/*/*/
[15:26:43.933] <TB2> INFO: ----------------------------------------------------------------------
[15:26:43.933] <TB2> INFO: PixTestReadback::CalibrateIa()
[15:26:43.933] <TB2> INFO: ----------------------------------------------------------------------
[15:29:24.232] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C0.dat
[15:29:24.232] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C1.dat
[15:29:24.232] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C2.dat
[15:29:24.232] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C3.dat
[15:29:24.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C4.dat
[15:29:24.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C5.dat
[15:29:24.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C6.dat
[15:29:24.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C7.dat
[15:29:24.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C8.dat
[15:29:24.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C9.dat
[15:29:24.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C10.dat
[15:29:24.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C11.dat
[15:29:24.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C12.dat
[15:29:24.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C13.dat
[15:29:24.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C14.dat
[15:29:24.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//readbackCal_C15.dat
[15:29:24.261] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[15:29:24.262] <TB2> INFO: PixTestReadback::doTest() done
[15:29:24.262] <TB2> INFO: Decoding statistics:
[15:29:24.262] <TB2> INFO: General information:
[15:29:24.262] <TB2> INFO: 16bit words read: 1536
[15:29:24.262] <TB2> INFO: valid events total: 256
[15:29:24.262] <TB2> INFO: empty events: 256
[15:29:24.262] <TB2> INFO: valid events with pixels: 0
[15:29:24.262] <TB2> INFO: valid pixel hits: 0
[15:29:24.262] <TB2> INFO: Event errors: 0
[15:29:24.262] <TB2> INFO: start marker: 0
[15:29:24.262] <TB2> INFO: stop marker: 0
[15:29:24.262] <TB2> INFO: overflow: 0
[15:29:24.262] <TB2> INFO: invalid 5bit words: 0
[15:29:24.262] <TB2> INFO: invalid XOR eye diagram: 0
[15:29:24.263] <TB2> INFO: frame (failed synchr.): 0
[15:29:24.263] <TB2> INFO: idle data (no TBM trl): 0
[15:29:24.263] <TB2> INFO: no data (only TBM hdr): 0
[15:29:24.263] <TB2> INFO: TBM errors: 0
[15:29:24.263] <TB2> INFO: flawed TBM headers: 0
[15:29:24.263] <TB2> INFO: flawed TBM trailers: 0
[15:29:24.263] <TB2> INFO: event ID mismatches: 0
[15:29:24.263] <TB2> INFO: ROC errors: 0
[15:29:24.263] <TB2> INFO: missing ROC header(s): 0
[15:29:24.263] <TB2> INFO: misplaced readback start: 0
[15:29:24.263] <TB2> INFO: Pixel decoding errors: 0
[15:29:24.263] <TB2> INFO: pixel data incomplete: 0
[15:29:24.263] <TB2> INFO: pixel address: 0
[15:29:24.263] <TB2> INFO: pulse height fill bit: 0
[15:29:24.263] <TB2> INFO: buffer corruption: 0
[15:29:24.296] <TB2> INFO: ######################################################################
[15:29:24.296] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[15:29:24.296] <TB2> INFO: ######################################################################
[15:29:24.298] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[15:29:24.313] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[15:29:24.313] <TB2> INFO: run 1 of 1
[15:29:24.590] <TB2> INFO: Expecting 3120000 events.
[15:29:54.730] <TB2> INFO: 660670 events read in total (29549ms).





















[15:30:23.997] <TB2> INFO: 1317310 events read in total (58817ms).





















[15:30:53.447] <TB2> INFO: 1972605 events read in total (88266ms).











[15:31:22.985] <TB2> INFO: 2626980 events read in total (117804ms).











[15:31:45.505] <TB2> INFO: 3120000 events read in total (140324ms).
[15:31:45.571] <TB2> INFO: Test took 141259ms.
[15:32:12.123] <TB2> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 167 seconds
[15:32:12.124] <TB2> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0
[15:32:12.124] <TB2> INFO: separation cut (per ROC): 100 100 99 105 99 107 101 109 105 106 103 102 99 107 99 96
[15:32:12.124] <TB2> INFO: Decoding statistics:
[15:32:12.124] <TB2> INFO: General information:
[15:32:12.124] <TB2> INFO: 16bit words read: 0
[15:32:12.124] <TB2> INFO: valid events total: 0
[15:32:12.124] <TB2> INFO: empty events: 0
[15:32:12.124] <TB2> INFO: valid events with pixels: 0
[15:32:12.124] <TB2> INFO: valid pixel hits: 0
[15:32:12.124] <TB2> INFO: Event errors: 0
[15:32:12.124] <TB2> INFO: start marker: 0
[15:32:12.124] <TB2> INFO: stop marker: 0
[15:32:12.124] <TB2> INFO: overflow: 0
[15:32:12.124] <TB2> INFO: invalid 5bit words: 0
[15:32:12.124] <TB2> INFO: invalid XOR eye diagram: 0
[15:32:12.124] <TB2> INFO: frame (failed synchr.): 0
[15:32:12.124] <TB2> INFO: idle data (no TBM trl): 0
[15:32:12.124] <TB2> INFO: no data (only TBM hdr): 0
[15:32:12.124] <TB2> INFO: TBM errors: 0
[15:32:12.124] <TB2> INFO: flawed TBM headers: 0
[15:32:12.124] <TB2> INFO: flawed TBM trailers: 0
[15:32:12.124] <TB2> INFO: event ID mismatches: 0
[15:32:12.124] <TB2> INFO: ROC errors: 0
[15:32:12.124] <TB2> INFO: missing ROC header(s): 0
[15:32:12.124] <TB2> INFO: misplaced readback start: 0
[15:32:12.124] <TB2> INFO: Pixel decoding errors: 0
[15:32:12.124] <TB2> INFO: pixel data incomplete: 0
[15:32:12.124] <TB2> INFO: pixel address: 0
[15:32:12.124] <TB2> INFO: pulse height fill bit: 0
[15:32:12.124] <TB2> INFO: buffer corruption: 0
[15:32:12.164] <TB2> INFO: ######################################################################
[15:32:12.164] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[15:32:12.164] <TB2> INFO: ######################################################################
[15:32:12.164] <TB2> INFO: ----------------------------------------------------------------------
[15:32:12.164] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[15:32:12.164] <TB2> INFO: ----------------------------------------------------------------------
[15:32:12.165] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[15:32:12.178] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[15:32:12.178] <TB2> INFO: run 1 of 1
[15:32:12.499] <TB2> INFO: Expecting 36608000 events.
[15:32:35.993] <TB2> INFO: 677050 events read in total (22902ms).
[15:32:58.397] <TB2> INFO: 1342800 events read in total (45306ms).
[15:33:20.773] <TB2> INFO: 2006250 events read in total (67682ms).
[15:33:43.483] <TB2> INFO: 2671100 events read in total (90392ms).
[15:34:06.293] <TB2> INFO: 3334200 events read in total (113202ms).
[15:34:28.892] <TB2> INFO: 3996300 events read in total (135801ms).
[15:34:51.429] <TB2> INFO: 4659350 events read in total (158338ms).
[15:35:13.862] <TB2> INFO: 5320500 events read in total (180771ms).
[15:35:36.315] <TB2> INFO: 5981950 events read in total (203224ms).
[15:35:58.671] <TB2> INFO: 6642400 events read in total (225580ms).
[15:36:20.981] <TB2> INFO: 7302900 events read in total (247890ms).
[15:36:43.430] <TB2> INFO: 7962600 events read in total (270339ms).
[15:37:05.905] <TB2> INFO: 8622300 events read in total (292814ms).
[15:37:28.347] <TB2> INFO: 9283100 events read in total (315256ms).
[15:37:50.730] <TB2> INFO: 9942800 events read in total (337639ms).
[15:38:13.016] <TB2> INFO: 10601550 events read in total (359925ms).
[15:38:35.246] <TB2> INFO: 11259950 events read in total (382155ms).
[15:38:57.871] <TB2> INFO: 11918750 events read in total (404780ms).
[15:39:20.094] <TB2> INFO: 12578200 events read in total (427003ms).
[15:39:42.305] <TB2> INFO: 13236250 events read in total (449214ms).
[15:40:04.657] <TB2> INFO: 13893600 events read in total (471566ms).
[15:40:27.122] <TB2> INFO: 14552100 events read in total (494031ms).
[15:40:49.404] <TB2> INFO: 15208650 events read in total (516313ms).
[15:41:11.689] <TB2> INFO: 15864650 events read in total (538598ms).
[15:41:34.009] <TB2> INFO: 16522400 events read in total (560918ms).
[15:41:56.510] <TB2> INFO: 17178000 events read in total (583419ms).
[15:42:18.801] <TB2> INFO: 17834850 events read in total (605710ms).
[15:42:41.375] <TB2> INFO: 18489300 events read in total (628284ms).
[15:43:03.733] <TB2> INFO: 19144650 events read in total (650642ms).
[15:43:26.263] <TB2> INFO: 19798100 events read in total (673172ms).
[15:43:48.945] <TB2> INFO: 20452750 events read in total (695854ms).
[15:44:11.408] <TB2> INFO: 21106750 events read in total (718317ms).
[15:44:34.074] <TB2> INFO: 21759000 events read in total (740983ms).
[15:44:56.336] <TB2> INFO: 22410400 events read in total (763245ms).
[15:45:18.450] <TB2> INFO: 23062200 events read in total (785359ms).
[15:45:40.691] <TB2> INFO: 23713850 events read in total (807600ms).
[15:46:02.953] <TB2> INFO: 24365000 events read in total (829862ms).
[15:46:25.144] <TB2> INFO: 25016550 events read in total (852053ms).
[15:46:47.538] <TB2> INFO: 25668650 events read in total (874447ms).
[15:47:09.773] <TB2> INFO: 26320250 events read in total (896682ms).
[15:47:32.182] <TB2> INFO: 26971650 events read in total (919091ms).
[15:47:54.414] <TB2> INFO: 27625050 events read in total (941323ms).
[15:48:16.784] <TB2> INFO: 28277100 events read in total (963693ms).
[15:48:38.890] <TB2> INFO: 28925450 events read in total (985799ms).
[15:49:01.392] <TB2> INFO: 29574750 events read in total (1008301ms).
[15:49:23.640] <TB2> INFO: 30226750 events read in total (1030549ms).
[15:49:45.861] <TB2> INFO: 30878450 events read in total (1052770ms).
[15:50:08.082] <TB2> INFO: 31529850 events read in total (1074991ms).
[15:50:30.259] <TB2> INFO: 32181650 events read in total (1097168ms).
[15:50:52.553] <TB2> INFO: 32833900 events read in total (1119462ms).
[15:51:14.721] <TB2> INFO: 33488200 events read in total (1141630ms).
[15:51:37.043] <TB2> INFO: 34140650 events read in total (1163952ms).
[15:51:59.731] <TB2> INFO: 34792400 events read in total (1186640ms).
[15:52:21.609] <TB2> INFO: 35443600 events read in total (1208518ms).
[15:52:43.681] <TB2> INFO: 36099200 events read in total (1230590ms).
[15:53:01.190] <TB2> INFO: 36608000 events read in total (1248099ms).
[15:53:01.252] <TB2> INFO: Test took 1249073ms.
[15:53:01.682] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:53:03.628] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:53:05.747] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:53:07.700] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:53:09.581] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:53:11.557] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:53:13.083] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:53:14.638] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:53:16.203] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:53:17.737] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:53:19.220] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:53:20.665] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:53:22.734] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:53:25.022] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:53:27.021] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:53:28.540] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:53:30.241] <TB2> INFO: PixTestScurves::scurves() done
[15:53:30.241] <TB2> INFO: Vcal mean: 103.07 118.74 110.89 109.63 113.22 114.95 104.79 111.06 111.61 119.02 118.41 111.19 114.84 117.14 111.75 109.37
[15:53:30.241] <TB2> INFO: Vcal RMS: 5.98 6.11 5.35 5.01 5.06 5.41 5.62 5.25 5.68 6.02 6.27 5.38 5.72 5.78 5.41 5.66
[15:53:30.241] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1278 seconds
[15:53:30.241] <TB2> INFO: Decoding statistics:
[15:53:30.241] <TB2> INFO: General information:
[15:53:30.241] <TB2> INFO: 16bit words read: 0
[15:53:30.241] <TB2> INFO: valid events total: 0
[15:53:30.241] <TB2> INFO: empty events: 0
[15:53:30.241] <TB2> INFO: valid events with pixels: 0
[15:53:30.241] <TB2> INFO: valid pixel hits: 0
[15:53:30.241] <TB2> INFO: Event errors: 0
[15:53:30.241] <TB2> INFO: start marker: 0
[15:53:30.241] <TB2> INFO: stop marker: 0
[15:53:30.241] <TB2> INFO: overflow: 0
[15:53:30.241] <TB2> INFO: invalid 5bit words: 0
[15:53:30.241] <TB2> INFO: invalid XOR eye diagram: 0
[15:53:30.241] <TB2> INFO: frame (failed synchr.): 0
[15:53:30.241] <TB2> INFO: idle data (no TBM trl): 0
[15:53:30.241] <TB2> INFO: no data (only TBM hdr): 0
[15:53:30.241] <TB2> INFO: TBM errors: 0
[15:53:30.241] <TB2> INFO: flawed TBM headers: 0
[15:53:30.241] <TB2> INFO: flawed TBM trailers: 0
[15:53:30.241] <TB2> INFO: event ID mismatches: 0
[15:53:30.241] <TB2> INFO: ROC errors: 0
[15:53:30.241] <TB2> INFO: missing ROC header(s): 0
[15:53:30.241] <TB2> INFO: misplaced readback start: 0
[15:53:30.241] <TB2> INFO: Pixel decoding errors: 0
[15:53:30.241] <TB2> INFO: pixel data incomplete: 0
[15:53:30.241] <TB2> INFO: pixel address: 0
[15:53:30.241] <TB2> INFO: pulse height fill bit: 0
[15:53:30.241] <TB2> INFO: buffer corruption: 0
[15:53:30.306] <TB2> INFO: ######################################################################
[15:53:30.306] <TB2> INFO: PixTestTrim::doTest()
[15:53:30.306] <TB2> INFO: ######################################################################
[15:53:30.307] <TB2> INFO: ----------------------------------------------------------------------
[15:53:30.307] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[15:53:30.307] <TB2> INFO: ----------------------------------------------------------------------
[15:53:30.348] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[15:53:30.349] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[15:53:30.357] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[15:53:30.357] <TB2> INFO: run 1 of 1
[15:53:30.629] <TB2> INFO: Expecting 5025280 events.
[15:54:00.455] <TB2> INFO: 823344 events read in total (29228ms).
[15:54:29.634] <TB2> INFO: 1642784 events read in total (58407ms).
[15:54:59.052] <TB2> INFO: 2458968 events read in total (87825ms).
[15:55:28.561] <TB2> INFO: 3271256 events read in total (117334ms).
[15:55:58.004] <TB2> INFO: 4079544 events read in total (146778ms).
[15:56:27.847] <TB2> INFO: 4886192 events read in total (176620ms).
[15:56:33.388] <TB2> INFO: 5025280 events read in total (182161ms).
[15:56:33.432] <TB2> INFO: Test took 183075ms.
[15:56:51.988] <TB2> INFO: ROC 0 VthrComp = 106
[15:56:51.988] <TB2> INFO: ROC 1 VthrComp = 117
[15:56:51.988] <TB2> INFO: ROC 2 VthrComp = 110
[15:56:51.988] <TB2> INFO: ROC 3 VthrComp = 111
[15:56:51.988] <TB2> INFO: ROC 4 VthrComp = 111
[15:56:51.988] <TB2> INFO: ROC 5 VthrComp = 121
[15:56:51.989] <TB2> INFO: ROC 6 VthrComp = 108
[15:56:51.989] <TB2> INFO: ROC 7 VthrComp = 118
[15:56:51.989] <TB2> INFO: ROC 8 VthrComp = 118
[15:56:51.989] <TB2> INFO: ROC 9 VthrComp = 121
[15:56:51.989] <TB2> INFO: ROC 10 VthrComp = 124
[15:56:51.989] <TB2> INFO: ROC 11 VthrComp = 111
[15:56:51.989] <TB2> INFO: ROC 12 VthrComp = 116
[15:56:51.989] <TB2> INFO: ROC 13 VthrComp = 122
[15:56:51.989] <TB2> INFO: ROC 14 VthrComp = 111
[15:56:51.989] <TB2> INFO: ROC 15 VthrComp = 109
[15:56:52.223] <TB2> INFO: Expecting 41600 events.
[15:56:55.788] <TB2> INFO: 41600 events read in total (2973ms).
[15:56:55.788] <TB2> INFO: Test took 3797ms.
[15:56:55.797] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[15:56:55.797] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[15:56:55.807] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[15:56:55.807] <TB2> INFO: run 1 of 1
[15:56:56.085] <TB2> INFO: Expecting 5025280 events.
[15:57:21.685] <TB2> INFO: 591952 events read in total (25009ms).
[15:57:47.217] <TB2> INFO: 1182304 events read in total (50541ms).
[15:58:12.357] <TB2> INFO: 1773400 events read in total (75681ms).
[15:58:37.798] <TB2> INFO: 2363552 events read in total (101122ms).
[15:59:03.074] <TB2> INFO: 2951760 events read in total (126398ms).
[15:59:28.262] <TB2> INFO: 3538232 events read in total (151586ms).
[15:59:53.352] <TB2> INFO: 4122936 events read in total (176676ms).
[16:00:18.389] <TB2> INFO: 4706704 events read in total (201713ms).
[16:00:33.279] <TB2> INFO: 5025280 events read in total (216603ms).
[16:00:33.352] <TB2> INFO: Test took 217545ms.
[16:00:58.624] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 63.1785 for pixel 0/3 mean/min/max = 48.4472/33.5675/63.3268
[16:00:58.625] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 62.6971 for pixel 9/36 mean/min/max = 47.0262/31.3337/62.7187
[16:00:58.625] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 66.7619 for pixel 19/4 mean/min/max = 49.9305/33.0554/66.8055
[16:00:58.625] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 64.2573 for pixel 9/11 mean/min/max = 48.8899/33.3877/64.3922
[16:00:58.626] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 65.3878 for pixel 18/12 mean/min/max = 49.4563/33.4519/65.4606
[16:00:58.626] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 59.63 for pixel 3/55 mean/min/max = 45.4643/31.1699/59.7587
[16:00:58.626] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 63.0113 for pixel 20/8 mean/min/max = 48.2749/33.4875/63.0622
[16:00:58.627] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 59.342 for pixel 33/17 mean/min/max = 45.5087/31.3543/59.663
[16:00:58.627] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 59.861 for pixel 0/79 mean/min/max = 45.5051/31.0715/59.9387
[16:00:58.627] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 60.4678 for pixel 24/5 mean/min/max = 45.8974/31.0172/60.7777
[16:00:58.628] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 62.3049 for pixel 0/11 mean/min/max = 46.4406/30.3153/62.566
[16:00:58.628] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 63.6778 for pixel 20/2 mean/min/max = 48.7052/33.5767/63.8336
[16:00:58.628] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 64.4595 for pixel 21/10 mean/min/max = 47.6163/30.6065/64.6261
[16:00:58.629] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 60.4448 for pixel 0/6 mean/min/max = 46.0918/31.6514/60.5322
[16:00:58.629] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 65.5269 for pixel 0/9 mean/min/max = 49.2151/32.5536/65.8765
[16:00:58.629] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 67.5774 for pixel 20/9 mean/min/max = 50.1531/32.6764/67.6299
[16:00:58.629] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:58.718] <TB2> INFO: Expecting 411648 events.
[16:01:08.025] <TB2> INFO: 411648 events read in total (8716ms).
[16:01:08.034] <TB2> INFO: Expecting 411648 events.
[16:01:17.036] <TB2> INFO: 411648 events read in total (8599ms).
[16:01:17.044] <TB2> INFO: Expecting 411648 events.
[16:01:26.123] <TB2> INFO: 411648 events read in total (8676ms).
[16:01:26.139] <TB2> INFO: Expecting 411648 events.
[16:01:35.156] <TB2> INFO: 411648 events read in total (8614ms).
[16:01:35.170] <TB2> INFO: Expecting 411648 events.
[16:01:44.262] <TB2> INFO: 411648 events read in total (8689ms).
[16:01:44.284] <TB2> INFO: Expecting 411648 events.
[16:01:53.281] <TB2> INFO: 411648 events read in total (8594ms).
[16:01:53.300] <TB2> INFO: Expecting 411648 events.
[16:02:02.331] <TB2> INFO: 411648 events read in total (8628ms).
[16:02:02.353] <TB2> INFO: Expecting 411648 events.
[16:02:11.328] <TB2> INFO: 411648 events read in total (8572ms).
[16:02:11.352] <TB2> INFO: Expecting 411648 events.
[16:02:20.340] <TB2> INFO: 411648 events read in total (8585ms).
[16:02:20.378] <TB2> INFO: Expecting 411648 events.
[16:02:29.462] <TB2> INFO: 411648 events read in total (8681ms).
[16:02:29.502] <TB2> INFO: Expecting 411648 events.
[16:02:38.496] <TB2> INFO: 411648 events read in total (8591ms).
[16:02:38.539] <TB2> INFO: Expecting 411648 events.
[16:02:47.551] <TB2> INFO: 411648 events read in total (8609ms).
[16:02:47.599] <TB2> INFO: Expecting 411648 events.
[16:02:56.659] <TB2> INFO: 411648 events read in total (8657ms).
[16:02:56.695] <TB2> INFO: Expecting 411648 events.
[16:03:05.733] <TB2> INFO: 411648 events read in total (8635ms).
[16:03:05.774] <TB2> INFO: Expecting 411648 events.
[16:03:14.844] <TB2> INFO: 411648 events read in total (8667ms).
[16:03:14.913] <TB2> INFO: Expecting 411648 events.
[16:03:24.068] <TB2> INFO: 411648 events read in total (8752ms).
[16:03:24.115] <TB2> INFO: Test took 145487ms.
[16:03:24.855] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[16:03:24.865] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[16:03:24.865] <TB2> INFO: run 1 of 1
[16:03:25.097] <TB2> INFO: Expecting 5025280 events.
[16:03:50.840] <TB2> INFO: 591952 events read in total (25152ms).
[16:04:16.132] <TB2> INFO: 1184048 events read in total (50444ms).
[16:04:41.325] <TB2> INFO: 1771856 events read in total (75638ms).
[16:05:06.605] <TB2> INFO: 2359000 events read in total (100917ms).
[16:05:31.985] <TB2> INFO: 2949384 events read in total (126297ms).
[16:05:57.265] <TB2> INFO: 3539824 events read in total (151577ms).
[16:06:22.544] <TB2> INFO: 4133128 events read in total (176856ms).
[16:06:47.863] <TB2> INFO: 4723216 events read in total (202175ms).
[16:07:01.810] <TB2> INFO: 5025280 events read in total (216122ms).
[16:07:01.923] <TB2> INFO: Test took 217059ms.
[16:07:24.984] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.758803 .. 146.167308
[16:07:25.216] <TB2> INFO: Expecting 208000 events.
[16:07:34.532] <TB2> INFO: 208000 events read in total (8724ms).
[16:07:34.532] <TB2> INFO: Test took 9547ms.
[16:07:34.579] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 156 (-1/-1) hits flags = 528 (plus default)
[16:07:34.589] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[16:07:34.589] <TB2> INFO: run 1 of 1
[16:07:34.867] <TB2> INFO: Expecting 5224960 events.
[16:08:01.051] <TB2> INFO: 586024 events read in total (25593ms).
[16:08:26.559] <TB2> INFO: 1172008 events read in total (51101ms).
[16:08:52.306] <TB2> INFO: 1757744 events read in total (76848ms).
[16:09:17.779] <TB2> INFO: 2343832 events read in total (102321ms).
[16:09:43.147] <TB2> INFO: 2929896 events read in total (127689ms).
[16:10:08.703] <TB2> INFO: 3514968 events read in total (153245ms).
[16:10:33.826] <TB2> INFO: 4099440 events read in total (178368ms).
[16:10:59.398] <TB2> INFO: 4682888 events read in total (203940ms).
[16:11:24.280] <TB2> INFO: 5224960 events read in total (228822ms).
[16:11:24.359] <TB2> INFO: Test took 229771ms.
[16:11:50.466] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 26.898857 .. 45.060887
[16:11:50.701] <TB2> INFO: Expecting 208000 events.
[16:12:00.213] <TB2> INFO: 208000 events read in total (8921ms).
[16:12:00.214] <TB2> INFO: Test took 9746ms.
[16:12:00.266] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 55 (-1/-1) hits flags = 528 (plus default)
[16:12:00.277] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[16:12:00.277] <TB2> INFO: run 1 of 1
[16:12:00.554] <TB2> INFO: Expecting 1331200 events.
[16:12:28.361] <TB2> INFO: 663664 events read in total (27215ms).
[16:12:56.353] <TB2> INFO: 1325376 events read in total (55207ms).
[16:12:57.028] <TB2> INFO: 1331200 events read in total (55882ms).
[16:12:57.053] <TB2> INFO: Test took 56777ms.
[16:13:09.012] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 26.393871 .. 47.788998
[16:13:09.244] <TB2> INFO: Expecting 208000 events.
[16:13:18.928] <TB2> INFO: 208000 events read in total (9092ms).
[16:13:18.929] <TB2> INFO: Test took 9915ms.
[16:13:18.976] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 16 .. 57 (-1/-1) hits flags = 528 (plus default)
[16:13:18.986] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[16:13:18.986] <TB2> INFO: run 1 of 1
[16:13:19.264] <TB2> INFO: Expecting 1397760 events.
[16:13:46.893] <TB2> INFO: 656416 events read in total (27037ms).
[16:14:14.669] <TB2> INFO: 1311496 events read in total (54813ms).
[16:14:18.700] <TB2> INFO: 1397760 events read in total (58845ms).
[16:14:18.726] <TB2> INFO: Test took 59741ms.
[16:14:31.698] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 25.709607 .. 45.463281
[16:14:31.931] <TB2> INFO: Expecting 208000 events.
[16:14:41.428] <TB2> INFO: 208000 events read in total (8906ms).
[16:14:41.428] <TB2> INFO: Test took 9729ms.
[16:14:41.474] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[16:14:41.484] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[16:14:41.484] <TB2> INFO: run 1 of 1
[16:14:41.762] <TB2> INFO: Expecting 1364480 events.
[16:15:09.615] <TB2> INFO: 667208 events read in total (27262ms).
[16:15:37.232] <TB2> INFO: 1333624 events read in total (54880ms).
[16:15:39.052] <TB2> INFO: 1364480 events read in total (56699ms).
[16:15:39.076] <TB2> INFO: Test took 57593ms.
[16:15:51.818] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[16:15:51.818] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[16:15:51.828] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[16:15:51.828] <TB2> INFO: run 1 of 1
[16:15:52.064] <TB2> INFO: Expecting 1364480 events.
[16:16:20.041] <TB2> INFO: 667808 events read in total (27385ms).
[16:16:47.246] <TB2> INFO: 1334736 events read in total (54590ms).
[16:16:48.882] <TB2> INFO: 1364480 events read in total (56226ms).
[16:16:48.911] <TB2> INFO: Test took 57083ms.
[16:17:01.590] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C0.dat
[16:17:01.590] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C1.dat
[16:17:01.590] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C2.dat
[16:17:01.590] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C3.dat
[16:17:01.590] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C4.dat
[16:17:01.591] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C5.dat
[16:17:01.591] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C6.dat
[16:17:01.591] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C7.dat
[16:17:01.591] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C8.dat
[16:17:01.591] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C9.dat
[16:17:01.591] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C10.dat
[16:17:01.591] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C11.dat
[16:17:01.591] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C12.dat
[16:17:01.591] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C13.dat
[16:17:01.591] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C14.dat
[16:17:01.591] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C15.dat
[16:17:01.591] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//trimParameters35_C0.dat
[16:17:01.597] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//trimParameters35_C1.dat
[16:17:01.602] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//trimParameters35_C2.dat
[16:17:01.608] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//trimParameters35_C3.dat
[16:17:01.613] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//trimParameters35_C4.dat
[16:17:01.619] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//trimParameters35_C5.dat
[16:17:01.624] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//trimParameters35_C6.dat
[16:17:01.630] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//trimParameters35_C7.dat
[16:17:01.635] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//trimParameters35_C8.dat
[16:17:01.641] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//trimParameters35_C9.dat
[16:17:01.646] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//trimParameters35_C10.dat
[16:17:01.652] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//trimParameters35_C11.dat
[16:17:01.657] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//trimParameters35_C12.dat
[16:17:01.663] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//trimParameters35_C13.dat
[16:17:01.668] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//trimParameters35_C14.dat
[16:17:01.674] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//trimParameters35_C15.dat
[16:17:01.679] <TB2> INFO: PixTestTrim::trimTest() done
[16:17:01.679] <TB2> INFO: vtrim: 126 122 193 141 147 123 155 128 134 140 127 139 165 117 145 172
[16:17:01.679] <TB2> INFO: vthrcomp: 106 117 110 111 111 121 108 118 118 121 124 111 116 122 111 109
[16:17:01.679] <TB2> INFO: vcal mean: 34.98 34.93 35.07 35.00 35.17 34.92 34.94 34.97 34.94 34.94 35.00 35.09 35.03 35.02 35.03 35.01
[16:17:01.679] <TB2> INFO: vcal RMS: 0.96 1.12 1.29 1.07 1.31 1.15 1.05 1.03 1.00 1.10 1.23 1.33 1.19 1.04 1.13 1.13
[16:17:01.679] <TB2> INFO: bits mean: 8.70 9.60 9.95 9.27 9.55 10.06 9.68 9.97 9.56 10.14 9.73 9.70 10.09 9.66 9.36 9.44
[16:17:01.679] <TB2> INFO: bits RMS: 2.62 2.65 2.16 2.49 2.40 2.61 2.24 2.55 2.79 2.46 2.78 2.30 2.55 2.61 2.54 2.44
[16:17:01.686] <TB2> INFO: ----------------------------------------------------------------------
[16:17:01.686] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[16:17:01.686] <TB2> INFO: ----------------------------------------------------------------------
[16:17:01.689] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[16:17:01.697] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[16:17:01.697] <TB2> INFO: run 1 of 1
[16:17:01.929] <TB2> INFO: Expecting 4160000 events.
[16:17:33.866] <TB2> INFO: 745930 events read in total (31345ms).
[16:18:04.876] <TB2> INFO: 1484840 events read in total (62355ms).
[16:18:35.844] <TB2> INFO: 2218535 events read in total (93323ms).
[16:19:06.455] <TB2> INFO: 2946925 events read in total (123934ms).
[16:19:37.168] <TB2> INFO: 3673580 events read in total (154647ms).
[16:19:58.446] <TB2> INFO: 4160000 events read in total (175925ms).
[16:19:58.496] <TB2> INFO: Test took 176799ms.
[16:20:26.412] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 195 (-1/-1) hits flags = 528 (plus default)
[16:20:26.423] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[16:20:26.423] <TB2> INFO: run 1 of 1
[16:20:26.656] <TB2> INFO: Expecting 4076800 events.
[16:20:58.272] <TB2> INFO: 726865 events read in total (31025ms).
[16:21:29.175] <TB2> INFO: 1446420 events read in total (61928ms).
[16:21:59.915] <TB2> INFO: 2161510 events read in total (92668ms).
[16:22:30.260] <TB2> INFO: 2871345 events read in total (123013ms).
[16:23:00.726] <TB2> INFO: 3579795 events read in total (153479ms).
[16:23:22.345] <TB2> INFO: 4076800 events read in total (175098ms).
[16:23:22.412] <TB2> INFO: Test took 175989ms.
[16:23:52.364] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 182 (-1/-1) hits flags = 528 (plus default)
[16:23:52.376] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[16:23:52.376] <TB2> INFO: run 1 of 1
[16:23:52.628] <TB2> INFO: Expecting 3806400 events.
[16:24:24.903] <TB2> INFO: 745830 events read in total (31684ms).
[16:24:56.299] <TB2> INFO: 1483925 events read in total (63080ms).
[16:25:27.674] <TB2> INFO: 2215810 events read in total (94455ms).
[16:25:58.903] <TB2> INFO: 2942215 events read in total (125684ms).
[16:26:30.140] <TB2> INFO: 3668050 events read in total (156921ms).
[16:26:36.410] <TB2> INFO: 3806400 events read in total (163191ms).
[16:26:36.466] <TB2> INFO: Test took 164090ms.
[16:27:05.224] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 180 (-1/-1) hits flags = 528 (plus default)
[16:27:05.236] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[16:27:05.236] <TB2> INFO: run 1 of 1
[16:27:05.481] <TB2> INFO: Expecting 3764800 events.
[16:27:37.554] <TB2> INFO: 749295 events read in total (31481ms).
[16:28:08.261] <TB2> INFO: 1490335 events read in total (62188ms).
[16:28:39.334] <TB2> INFO: 2224915 events read in total (93261ms).
[16:29:10.166] <TB2> INFO: 2953915 events read in total (124093ms).
[16:29:41.061] <TB2> INFO: 3683355 events read in total (154988ms).
[16:29:44.929] <TB2> INFO: 3764800 events read in total (158856ms).
[16:29:44.983] <TB2> INFO: Test took 159747ms.
[16:30:10.433] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 183 (-1/-1) hits flags = 528 (plus default)
[16:30:10.443] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[16:30:10.444] <TB2> INFO: run 1 of 1
[16:30:10.677] <TB2> INFO: Expecting 3827200 events.
[16:30:42.424] <TB2> INFO: 744470 events read in total (31155ms).
[16:31:14.212] <TB2> INFO: 1481095 events read in total (62943ms).
[16:31:44.002] <TB2> INFO: 2212020 events read in total (93734ms).
[16:32:15.949] <TB2> INFO: 2937330 events read in total (124680ms).
[16:32:46.814] <TB2> INFO: 3661905 events read in total (155545ms).
[16:32:54.214] <TB2> INFO: 3827200 events read in total (162945ms).
[16:32:54.258] <TB2> INFO: Test took 163814ms.
[16:33:19.974] <TB2> INFO: PixTestTrim::trimBitTest() done
[16:33:19.975] <TB2> INFO: PixTestTrim::doTest() done, duration: 2389 seconds
[16:33:19.975] <TB2> INFO: Decoding statistics:
[16:33:19.975] <TB2> INFO: General information:
[16:33:19.975] <TB2> INFO: 16bit words read: 0
[16:33:19.975] <TB2> INFO: valid events total: 0
[16:33:19.975] <TB2> INFO: empty events: 0
[16:33:19.975] <TB2> INFO: valid events with pixels: 0
[16:33:19.975] <TB2> INFO: valid pixel hits: 0
[16:33:19.975] <TB2> INFO: Event errors: 0
[16:33:19.975] <TB2> INFO: start marker: 0
[16:33:19.976] <TB2> INFO: stop marker: 0
[16:33:19.976] <TB2> INFO: overflow: 0
[16:33:19.976] <TB2> INFO: invalid 5bit words: 0
[16:33:19.976] <TB2> INFO: invalid XOR eye diagram: 0
[16:33:19.976] <TB2> INFO: frame (failed synchr.): 0
[16:33:19.976] <TB2> INFO: idle data (no TBM trl): 0
[16:33:19.976] <TB2> INFO: no data (only TBM hdr): 0
[16:33:19.976] <TB2> INFO: TBM errors: 0
[16:33:19.976] <TB2> INFO: flawed TBM headers: 0
[16:33:19.976] <TB2> INFO: flawed TBM trailers: 0
[16:33:19.976] <TB2> INFO: event ID mismatches: 0
[16:33:19.976] <TB2> INFO: ROC errors: 0
[16:33:19.976] <TB2> INFO: missing ROC header(s): 0
[16:33:19.976] <TB2> INFO: misplaced readback start: 0
[16:33:19.976] <TB2> INFO: Pixel decoding errors: 0
[16:33:19.976] <TB2> INFO: pixel data incomplete: 0
[16:33:19.976] <TB2> INFO: pixel address: 0
[16:33:19.976] <TB2> INFO: pulse height fill bit: 0
[16:33:19.976] <TB2> INFO: buffer corruption: 0
[16:33:20.632] <TB2> INFO: ######################################################################
[16:33:20.632] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[16:33:20.632] <TB2> INFO: ######################################################################
[16:33:20.867] <TB2> INFO: Expecting 41600 events.
[16:33:24.367] <TB2> INFO: 41600 events read in total (2908ms).
[16:33:24.368] <TB2> INFO: Test took 3734ms.
[16:33:24.808] <TB2> INFO: Expecting 41600 events.
[16:33:28.315] <TB2> INFO: 41600 events read in total (2916ms).
[16:33:28.315] <TB2> INFO: Test took 3743ms.
[16:33:28.603] <TB2> INFO: Expecting 41600 events.
[16:33:32.104] <TB2> INFO: 41600 events read in total (2909ms).
[16:33:32.105] <TB2> INFO: Test took 3766ms.
[16:33:32.454] <TB2> INFO: Expecting 41600 events.
[16:33:35.995] <TB2> INFO: 41600 events read in total (2950ms).
[16:33:35.995] <TB2> INFO: Test took 3862ms.
[16:33:36.286] <TB2> INFO: Expecting 41600 events.
[16:33:39.909] <TB2> INFO: 41600 events read in total (3032ms).
[16:33:39.911] <TB2> INFO: Test took 3890ms.
[16:33:40.203] <TB2> INFO: Expecting 41600 events.
[16:33:43.727] <TB2> INFO: 41600 events read in total (2932ms).
[16:33:43.728] <TB2> INFO: Test took 3791ms.
[16:33:44.017] <TB2> INFO: Expecting 41600 events.
[16:33:47.488] <TB2> INFO: 41600 events read in total (2880ms).
[16:33:47.489] <TB2> INFO: Test took 3737ms.
[16:33:47.779] <TB2> INFO: Expecting 41600 events.
[16:33:51.378] <TB2> INFO: 41600 events read in total (3007ms).
[16:33:51.379] <TB2> INFO: Test took 3864ms.
[16:33:51.669] <TB2> INFO: Expecting 41600 events.
[16:33:55.238] <TB2> INFO: 41600 events read in total (2977ms).
[16:33:55.239] <TB2> INFO: Test took 3834ms.
[16:33:55.529] <TB2> INFO: Expecting 41600 events.
[16:33:59.053] <TB2> INFO: 41600 events read in total (2932ms).
[16:33:59.054] <TB2> INFO: Test took 3790ms.
[16:33:59.343] <TB2> INFO: Expecting 41600 events.
[16:34:02.909] <TB2> INFO: 41600 events read in total (2974ms).
[16:34:02.910] <TB2> INFO: Test took 3831ms.
[16:34:03.198] <TB2> INFO: Expecting 41600 events.
[16:34:06.738] <TB2> INFO: 41600 events read in total (2948ms).
[16:34:06.739] <TB2> INFO: Test took 3806ms.
[16:34:07.029] <TB2> INFO: Expecting 41600 events.
[16:34:10.526] <TB2> INFO: 41600 events read in total (2905ms).
[16:34:10.526] <TB2> INFO: Test took 3762ms.
[16:34:10.826] <TB2> INFO: Expecting 41600 events.
[16:34:14.333] <TB2> INFO: 41600 events read in total (2915ms).
[16:34:14.333] <TB2> INFO: Test took 3783ms.
[16:34:14.621] <TB2> INFO: Expecting 41600 events.
[16:34:18.155] <TB2> INFO: 41600 events read in total (2942ms).
[16:34:18.156] <TB2> INFO: Test took 3799ms.
[16:34:18.445] <TB2> INFO: Expecting 41600 events.
[16:34:21.979] <TB2> INFO: 41600 events read in total (2943ms).
[16:34:21.980] <TB2> INFO: Test took 3800ms.
[16:34:22.268] <TB2> INFO: Expecting 41600 events.
[16:34:25.755] <TB2> INFO: 41600 events read in total (2896ms).
[16:34:25.756] <TB2> INFO: Test took 3753ms.
[16:34:26.044] <TB2> INFO: Expecting 41600 events.
[16:34:29.603] <TB2> INFO: 41600 events read in total (2967ms).
[16:34:29.604] <TB2> INFO: Test took 3824ms.
[16:34:29.895] <TB2> INFO: Expecting 41600 events.
[16:34:33.392] <TB2> INFO: 41600 events read in total (2906ms).
[16:34:33.393] <TB2> INFO: Test took 3763ms.
[16:34:33.689] <TB2> INFO: Expecting 41600 events.
[16:34:37.259] <TB2> INFO: 41600 events read in total (2979ms).
[16:34:37.260] <TB2> INFO: Test took 3844ms.
[16:34:37.548] <TB2> INFO: Expecting 41600 events.
[16:34:41.133] <TB2> INFO: 41600 events read in total (2995ms).
[16:34:41.134] <TB2> INFO: Test took 3851ms.
[16:34:41.422] <TB2> INFO: Expecting 41600 events.
[16:34:44.910] <TB2> INFO: 41600 events read in total (2896ms).
[16:34:44.911] <TB2> INFO: Test took 3753ms.
[16:34:45.199] <TB2> INFO: Expecting 41600 events.
[16:34:49.009] <TB2> INFO: 41600 events read in total (3218ms).
[16:34:49.010] <TB2> INFO: Test took 4075ms.
[16:34:49.359] <TB2> INFO: Expecting 41600 events.
[16:34:53.323] <TB2> INFO: 41600 events read in total (3372ms).
[16:34:53.323] <TB2> INFO: Test took 4285ms.
[16:34:53.672] <TB2> INFO: Expecting 41600 events.
[16:34:57.191] <TB2> INFO: 41600 events read in total (2927ms).
[16:34:57.192] <TB2> INFO: Test took 3841ms.
[16:34:57.480] <TB2> INFO: Expecting 41600 events.
[16:35:00.962] <TB2> INFO: 41600 events read in total (2890ms).
[16:35:00.963] <TB2> INFO: Test took 3748ms.
[16:35:01.252] <TB2> INFO: Expecting 41600 events.
[16:35:04.706] <TB2> INFO: 41600 events read in total (2863ms).
[16:35:04.707] <TB2> INFO: Test took 3720ms.
[16:35:04.995] <TB2> INFO: Expecting 41600 events.
[16:35:08.480] <TB2> INFO: 41600 events read in total (2893ms).
[16:35:08.481] <TB2> INFO: Test took 3750ms.
[16:35:08.769] <TB2> INFO: Expecting 41600 events.
[16:35:12.319] <TB2> INFO: 41600 events read in total (2960ms).
[16:35:12.320] <TB2> INFO: Test took 3816ms.
[16:35:12.611] <TB2> INFO: Expecting 41600 events.
[16:35:16.162] <TB2> INFO: 41600 events read in total (2960ms).
[16:35:16.163] <TB2> INFO: Test took 3817ms.
[16:35:16.451] <TB2> INFO: Expecting 41600 events.
[16:35:19.975] <TB2> INFO: 41600 events read in total (2932ms).
[16:35:19.976] <TB2> INFO: Test took 3789ms.
[16:35:20.264] <TB2> INFO: Expecting 41600 events.
[16:35:23.757] <TB2> INFO: 41600 events read in total (2901ms).
[16:35:23.757] <TB2> INFO: Test took 3758ms.
[16:35:24.053] <TB2> INFO: Expecting 41600 events.
[16:35:27.561] <TB2> INFO: 41600 events read in total (2917ms).
[16:35:27.562] <TB2> INFO: Test took 3781ms.
[16:35:27.853] <TB2> INFO: Expecting 41600 events.
[16:35:31.320] <TB2> INFO: 41600 events read in total (2876ms).
[16:35:31.321] <TB2> INFO: Test took 3733ms.
[16:35:31.609] <TB2> INFO: Expecting 41600 events.
[16:35:35.095] <TB2> INFO: 41600 events read in total (2894ms).
[16:35:35.096] <TB2> INFO: Test took 3752ms.
[16:35:35.385] <TB2> INFO: Expecting 41600 events.
[16:35:38.943] <TB2> INFO: 41600 events read in total (2967ms).
[16:35:38.943] <TB2> INFO: Test took 3823ms.
[16:35:39.232] <TB2> INFO: Expecting 41600 events.
[16:35:42.795] <TB2> INFO: 41600 events read in total (2972ms).
[16:35:42.796] <TB2> INFO: Test took 3829ms.
[16:35:43.095] <TB2> INFO: Expecting 41600 events.
[16:35:46.663] <TB2> INFO: 41600 events read in total (2976ms).
[16:35:46.664] <TB2> INFO: Test took 3844ms.
[16:35:46.963] <TB2> INFO: Expecting 41600 events.
[16:35:50.512] <TB2> INFO: 41600 events read in total (2958ms).
[16:35:50.512] <TB2> INFO: Test took 3825ms.
[16:35:50.801] <TB2> INFO: Expecting 41600 events.
[16:35:54.350] <TB2> INFO: 41600 events read in total (2958ms).
[16:35:54.351] <TB2> INFO: Test took 3815ms.
[16:35:54.642] <TB2> INFO: Expecting 41600 events.
[16:35:58.201] <TB2> INFO: 41600 events read in total (2967ms).
[16:35:58.201] <TB2> INFO: Test took 3824ms.
[16:35:58.492] <TB2> INFO: Expecting 41600 events.
[16:36:02.013] <TB2> INFO: 41600 events read in total (2929ms).
[16:36:02.014] <TB2> INFO: Test took 3786ms.
[16:36:02.302] <TB2> INFO: Expecting 41600 events.
[16:36:05.802] <TB2> INFO: 41600 events read in total (2909ms).
[16:36:05.802] <TB2> INFO: Test took 3765ms.
[16:36:06.090] <TB2> INFO: Expecting 41600 events.
[16:36:09.585] <TB2> INFO: 41600 events read in total (2903ms).
[16:36:09.586] <TB2> INFO: Test took 3760ms.
[16:36:09.876] <TB2> INFO: Expecting 41600 events.
[16:36:13.311] <TB2> INFO: 41600 events read in total (2843ms).
[16:36:13.311] <TB2> INFO: Test took 3699ms.
[16:36:13.600] <TB2> INFO: Expecting 41600 events.
[16:36:17.066] <TB2> INFO: 41600 events read in total (2875ms).
[16:36:17.067] <TB2> INFO: Test took 3732ms.
[16:36:17.356] <TB2> INFO: Expecting 41600 events.
[16:36:20.863] <TB2> INFO: 41600 events read in total (2916ms).
[16:36:20.864] <TB2> INFO: Test took 3773ms.
[16:36:21.152] <TB2> INFO: Expecting 41600 events.
[16:36:24.650] <TB2> INFO: 41600 events read in total (2906ms).
[16:36:24.651] <TB2> INFO: Test took 3763ms.
[16:36:24.939] <TB2> INFO: Expecting 41600 events.
[16:36:28.406] <TB2> INFO: 41600 events read in total (2875ms).
[16:36:28.407] <TB2> INFO: Test took 3732ms.
[16:36:28.695] <TB2> INFO: Expecting 41600 events.
[16:36:32.168] <TB2> INFO: 41600 events read in total (2881ms).
[16:36:32.168] <TB2> INFO: Test took 3737ms.
[16:36:32.457] <TB2> INFO: Expecting 41600 events.
[16:36:35.950] <TB2> INFO: 41600 events read in total (2902ms).
[16:36:35.951] <TB2> INFO: Test took 3759ms.
[16:36:36.239] <TB2> INFO: Expecting 41600 events.
[16:36:39.793] <TB2> INFO: 41600 events read in total (2962ms).
[16:36:39.793] <TB2> INFO: Test took 3818ms.
[16:36:40.093] <TB2> INFO: Expecting 41600 events.
[16:36:43.569] <TB2> INFO: 41600 events read in total (2885ms).
[16:36:43.569] <TB2> INFO: Test took 3752ms.
[16:36:43.859] <TB2> INFO: Expecting 41600 events.
[16:36:47.411] <TB2> INFO: 41600 events read in total (2960ms).
[16:36:47.412] <TB2> INFO: Test took 3818ms.
[16:36:47.704] <TB2> INFO: Expecting 2560 events.
[16:36:48.586] <TB2> INFO: 2560 events read in total (291ms).
[16:36:48.586] <TB2> INFO: Test took 1159ms.
[16:36:48.894] <TB2> INFO: Expecting 2560 events.
[16:36:49.775] <TB2> INFO: 2560 events read in total (289ms).
[16:36:49.776] <TB2> INFO: Test took 1189ms.
[16:36:50.084] <TB2> INFO: Expecting 2560 events.
[16:36:50.969] <TB2> INFO: 2560 events read in total (294ms).
[16:36:50.969] <TB2> INFO: Test took 1193ms.
[16:36:51.276] <TB2> INFO: Expecting 2560 events.
[16:36:52.159] <TB2> INFO: 2560 events read in total (291ms).
[16:36:52.160] <TB2> INFO: Test took 1190ms.
[16:36:52.468] <TB2> INFO: Expecting 2560 events.
[16:36:53.346] <TB2> INFO: 2560 events read in total (287ms).
[16:36:53.346] <TB2> INFO: Test took 1186ms.
[16:36:53.654] <TB2> INFO: Expecting 2560 events.
[16:36:54.536] <TB2> INFO: 2560 events read in total (290ms).
[16:36:54.536] <TB2> INFO: Test took 1189ms.
[16:36:54.845] <TB2> INFO: Expecting 2560 events.
[16:36:55.723] <TB2> INFO: 2560 events read in total (287ms).
[16:36:55.724] <TB2> INFO: Test took 1187ms.
[16:36:56.032] <TB2> INFO: Expecting 2560 events.
[16:36:56.913] <TB2> INFO: 2560 events read in total (290ms).
[16:36:56.913] <TB2> INFO: Test took 1189ms.
[16:36:57.221] <TB2> INFO: Expecting 2560 events.
[16:36:58.098] <TB2> INFO: 2560 events read in total (285ms).
[16:36:58.098] <TB2> INFO: Test took 1185ms.
[16:36:58.406] <TB2> INFO: Expecting 2560 events.
[16:36:59.285] <TB2> INFO: 2560 events read in total (288ms).
[16:36:59.285] <TB2> INFO: Test took 1187ms.
[16:36:59.593] <TB2> INFO: Expecting 2560 events.
[16:37:00.470] <TB2> INFO: 2560 events read in total (286ms).
[16:37:00.471] <TB2> INFO: Test took 1185ms.
[16:37:00.778] <TB2> INFO: Expecting 2560 events.
[16:37:01.659] <TB2> INFO: 2560 events read in total (289ms).
[16:37:01.660] <TB2> INFO: Test took 1189ms.
[16:37:01.968] <TB2> INFO: Expecting 2560 events.
[16:37:02.852] <TB2> INFO: 2560 events read in total (292ms).
[16:37:02.852] <TB2> INFO: Test took 1192ms.
[16:37:03.160] <TB2> INFO: Expecting 2560 events.
[16:37:04.041] <TB2> INFO: 2560 events read in total (289ms).
[16:37:04.041] <TB2> INFO: Test took 1188ms.
[16:37:04.349] <TB2> INFO: Expecting 2560 events.
[16:37:05.235] <TB2> INFO: 2560 events read in total (295ms).
[16:37:05.235] <TB2> INFO: Test took 1194ms.
[16:37:05.543] <TB2> INFO: Expecting 2560 events.
[16:37:06.427] <TB2> INFO: 2560 events read in total (292ms).
[16:37:06.427] <TB2> INFO: Test took 1191ms.
[16:37:06.736] <TB2> INFO: Expecting 655360 events.
[16:37:26.947] <TB2> INFO: 531260 events read in total (19619ms).
[16:37:31.832] <TB2> INFO: 655360 events read in total (24504ms).
[16:37:31.847] <TB2> INFO: Test took 25417ms.
[16:37:31.873] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:37:32.134] <TB2> INFO: Expecting 655360 events.
[16:37:46.444] <TB2> INFO: 655360 events read in total (13718ms).
[16:37:46.454] <TB2> INFO: Expecting 655360 events.
[16:38:00.411] <TB2> INFO: 655360 events read in total (13554ms).
[16:38:00.425] <TB2> INFO: Expecting 655360 events.
[16:38:14.292] <TB2> INFO: 655360 events read in total (13464ms).
[16:38:14.317] <TB2> INFO: Expecting 655360 events.
[16:38:28.304] <TB2> INFO: 655360 events read in total (13584ms).
[16:38:28.327] <TB2> INFO: Expecting 655360 events.
[16:38:42.252] <TB2> INFO: 655360 events read in total (13522ms).
[16:38:42.280] <TB2> INFO: Expecting 655360 events.
[16:38:56.127] <TB2> INFO: 655360 events read in total (13444ms).
[16:38:56.159] <TB2> INFO: Expecting 655360 events.
[16:39:10.048] <TB2> INFO: 655360 events read in total (13486ms).
[16:39:10.083] <TB2> INFO: Expecting 655360 events.
[16:39:23.921] <TB2> INFO: 655360 events read in total (13435ms).
[16:39:23.960] <TB2> INFO: Expecting 655360 events.
[16:39:37.960] <TB2> INFO: 655360 events read in total (13597ms).
[16:39:38.009] <TB2> INFO: Expecting 655360 events.
[16:39:51.776] <TB2> INFO: 655360 events read in total (13364ms).
[16:39:51.824] <TB2> INFO: Expecting 655360 events.
[16:40:05.578] <TB2> INFO: 655360 events read in total (13351ms).
[16:40:05.632] <TB2> INFO: Expecting 655360 events.
[16:40:19.610] <TB2> INFO: 655360 events read in total (13575ms).
[16:40:19.687] <TB2> INFO: Expecting 655360 events.
[16:40:33.666] <TB2> INFO: 655360 events read in total (13576ms).
[16:40:33.728] <TB2> INFO: Expecting 655360 events.
[16:40:47.745] <TB2> INFO: 655360 events read in total (13614ms).
[16:40:47.823] <TB2> INFO: Expecting 655360 events.
[16:41:01.728] <TB2> INFO: 655360 events read in total (13502ms).
[16:41:01.827] <TB2> INFO: Expecting 655360 events.
[16:41:15.951] <TB2> INFO: 655360 events read in total (13721ms).
[16:41:16.052] <TB2> INFO: Test took 224179ms.
[16:41:16.225] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:41:16.231] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:41:16.235] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:41:16.240] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:41:16.245] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:41:16.249] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[16:41:16.253] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[16:41:16.258] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[16:41:16.264] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[16:41:16.270] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[16:41:16.276] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[16:41:16.282] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[16:41:16.288] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[16:41:16.294] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[16:41:16.300] <TB2> INFO: safety margin for low PH: adding 10, margin is now 30
[16:41:16.305] <TB2> INFO: safety margin for low PH: adding 11, margin is now 31
[16:41:16.310] <TB2> INFO: safety margin for low PH: adding 12, margin is now 32
[16:41:16.314] <TB2> INFO: safety margin for low PH: adding 13, margin is now 33
[16:41:16.319] <TB2> INFO: safety margin for low PH: adding 14, margin is now 34
[16:41:16.324] <TB2> INFO: safety margin for low PH: adding 15, margin is now 35
[16:41:16.328] <TB2> INFO: safety margin for low PH: adding 16, margin is now 36
[16:41:16.333] <TB2> INFO: safety margin for low PH: adding 17, margin is now 37
[16:41:16.338] <TB2> INFO: safety margin for low PH: adding 18, margin is now 38
[16:41:16.343] <TB2> INFO: safety margin for low PH: adding 19, margin is now 39
[16:41:16.348] <TB2> INFO: safety margin for low PH: adding 20, margin is now 40
[16:41:16.353] <TB2> INFO: safety margin for low PH: adding 21, margin is now 41
[16:41:16.358] <TB2> INFO: safety margin for low PH: adding 22, margin is now 42
[16:41:16.363] <TB2> INFO: safety margin for low PH: adding 23, margin is now 43
[16:41:16.368] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:41:16.373] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:41:16.378] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[16:41:16.383] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[16:41:16.387] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:41:16.392] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:41:16.398] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[16:41:16.403] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[16:41:16.408] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[16:41:16.413] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[16:41:16.418] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[16:41:16.422] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[16:41:16.427] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[16:41:16.432] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[16:41:16.438] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[16:41:16.444] <TB2> INFO: safety margin for low PH: adding 10, margin is now 30
[16:41:16.450] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:41:16.455] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:41:16.461] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:41:16.465] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[16:41:16.470] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[16:41:16.474] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:41:16.479] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[16:41:16.484] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:41:16.488] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[16:41:16.493] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[16:41:16.497] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[16:41:16.502] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[16:41:16.506] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[16:41:16.511] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[16:41:16.516] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[16:41:16.521] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[16:41:16.526] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[16:41:16.531] <TB2> INFO: safety margin for low PH: adding 10, margin is now 30
[16:41:16.536] <TB2> INFO: safety margin for low PH: adding 11, margin is now 31
[16:41:16.541] <TB2> INFO: safety margin for low PH: adding 12, margin is now 32
[16:41:16.546] <TB2> INFO: safety margin for low PH: adding 13, margin is now 33
[16:41:16.552] <TB2> INFO: safety margin for low PH: adding 14, margin is now 34
[16:41:16.557] <TB2> INFO: safety margin for low PH: adding 15, margin is now 35
[16:41:16.562] <TB2> INFO: safety margin for low PH: adding 16, margin is now 36
[16:41:16.567] <TB2> INFO: safety margin for low PH: adding 17, margin is now 37
[16:41:16.572] <TB2> INFO: safety margin for low PH: adding 18, margin is now 38
[16:41:16.578] <TB2> INFO: safety margin for low PH: adding 19, margin is now 39
[16:41:16.583] <TB2> INFO: safety margin for low PH: adding 20, margin is now 40
[16:41:16.588] <TB2> INFO: safety margin for low PH: adding 21, margin is now 41
[16:41:16.593] <TB2> INFO: safety margin for low PH: adding 22, margin is now 42
[16:41:16.598] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:41:16.603] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:41:16.608] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[16:41:16.614] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[16:41:16.619] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[16:41:16.624] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[16:41:16.629] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[16:41:16.634] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[16:41:16.673] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C0.dat
[16:41:16.674] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C1.dat
[16:41:16.674] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C2.dat
[16:41:16.674] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C3.dat
[16:41:16.674] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C4.dat
[16:41:16.674] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C5.dat
[16:41:16.674] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C6.dat
[16:41:16.674] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C7.dat
[16:41:16.674] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C8.dat
[16:41:16.674] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C9.dat
[16:41:16.674] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C10.dat
[16:41:16.675] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C11.dat
[16:41:16.675] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C12.dat
[16:41:16.675] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C13.dat
[16:41:16.675] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C14.dat
[16:41:16.675] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//dacParameters35_C15.dat
[16:41:16.910] <TB2> INFO: Expecting 41600 events.
[16:41:19.997] <TB2> INFO: 41600 events read in total (2495ms).
[16:41:19.997] <TB2> INFO: Test took 3319ms.
[16:41:20.443] <TB2> INFO: Expecting 41600 events.
[16:41:23.468] <TB2> INFO: 41600 events read in total (2433ms).
[16:41:23.469] <TB2> INFO: Test took 3260ms.
[16:41:23.954] <TB2> INFO: Expecting 41600 events.
[16:41:27.089] <TB2> INFO: 41600 events read in total (2544ms).
[16:41:27.089] <TB2> INFO: Test took 3410ms.
[16:41:27.303] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:27.392] <TB2> INFO: Expecting 2560 events.
[16:41:28.274] <TB2> INFO: 2560 events read in total (290ms).
[16:41:28.275] <TB2> INFO: Test took 972ms.
[16:41:28.276] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:28.583] <TB2> INFO: Expecting 2560 events.
[16:41:29.467] <TB2> INFO: 2560 events read in total (292ms).
[16:41:29.467] <TB2> INFO: Test took 1191ms.
[16:41:29.469] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:29.776] <TB2> INFO: Expecting 2560 events.
[16:41:30.659] <TB2> INFO: 2560 events read in total (292ms).
[16:41:30.659] <TB2> INFO: Test took 1190ms.
[16:41:30.661] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:30.967] <TB2> INFO: Expecting 2560 events.
[16:41:31.849] <TB2> INFO: 2560 events read in total (291ms).
[16:41:31.849] <TB2> INFO: Test took 1188ms.
[16:41:31.851] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:32.157] <TB2> INFO: Expecting 2560 events.
[16:41:33.039] <TB2> INFO: 2560 events read in total (290ms).
[16:41:33.040] <TB2> INFO: Test took 1189ms.
[16:41:33.041] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:33.348] <TB2> INFO: Expecting 2560 events.
[16:41:34.230] <TB2> INFO: 2560 events read in total (291ms).
[16:41:34.230] <TB2> INFO: Test took 1189ms.
[16:41:34.232] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:34.538] <TB2> INFO: Expecting 2560 events.
[16:41:35.420] <TB2> INFO: 2560 events read in total (290ms).
[16:41:35.420] <TB2> INFO: Test took 1188ms.
[16:41:35.422] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:35.729] <TB2> INFO: Expecting 2560 events.
[16:41:36.612] <TB2> INFO: 2560 events read in total (292ms).
[16:41:36.613] <TB2> INFO: Test took 1191ms.
[16:41:36.615] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:36.921] <TB2> INFO: Expecting 2560 events.
[16:41:37.800] <TB2> INFO: 2560 events read in total (287ms).
[16:41:37.801] <TB2> INFO: Test took 1186ms.
[16:41:37.802] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:38.109] <TB2> INFO: Expecting 2560 events.
[16:41:38.987] <TB2> INFO: 2560 events read in total (287ms).
[16:41:38.987] <TB2> INFO: Test took 1185ms.
[16:41:38.989] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:39.296] <TB2> INFO: Expecting 2560 events.
[16:41:40.175] <TB2> INFO: 2560 events read in total (288ms).
[16:41:40.175] <TB2> INFO: Test took 1186ms.
[16:41:40.177] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:40.483] <TB2> INFO: Expecting 2560 events.
[16:41:41.362] <TB2> INFO: 2560 events read in total (287ms).
[16:41:41.362] <TB2> INFO: Test took 1185ms.
[16:41:41.364] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:41.673] <TB2> INFO: Expecting 2560 events.
[16:41:42.551] <TB2> INFO: 2560 events read in total (287ms).
[16:41:42.551] <TB2> INFO: Test took 1187ms.
[16:41:42.553] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:42.860] <TB2> INFO: Expecting 2560 events.
[16:41:43.737] <TB2> INFO: 2560 events read in total (286ms).
[16:41:43.737] <TB2> INFO: Test took 1184ms.
[16:41:43.739] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:44.045] <TB2> INFO: Expecting 2560 events.
[16:41:44.924] <TB2> INFO: 2560 events read in total (287ms).
[16:41:44.924] <TB2> INFO: Test took 1185ms.
[16:41:44.926] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:45.232] <TB2> INFO: Expecting 2560 events.
[16:41:46.110] <TB2> INFO: 2560 events read in total (286ms).
[16:41:46.110] <TB2> INFO: Test took 1184ms.
[16:41:46.112] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:46.418] <TB2> INFO: Expecting 2560 events.
[16:41:47.297] <TB2> INFO: 2560 events read in total (287ms).
[16:41:47.297] <TB2> INFO: Test took 1185ms.
[16:41:47.299] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:47.605] <TB2> INFO: Expecting 2560 events.
[16:41:48.483] <TB2> INFO: 2560 events read in total (286ms).
[16:41:48.483] <TB2> INFO: Test took 1184ms.
[16:41:48.485] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:48.791] <TB2> INFO: Expecting 2560 events.
[16:41:49.669] <TB2> INFO: 2560 events read in total (286ms).
[16:41:49.670] <TB2> INFO: Test took 1185ms.
[16:41:49.671] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:49.978] <TB2> INFO: Expecting 2560 events.
[16:41:50.856] <TB2> INFO: 2560 events read in total (286ms).
[16:41:50.856] <TB2> INFO: Test took 1185ms.
[16:41:50.858] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:51.165] <TB2> INFO: Expecting 2560 events.
[16:41:52.047] <TB2> INFO: 2560 events read in total (290ms).
[16:41:52.047] <TB2> INFO: Test took 1189ms.
[16:41:52.049] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:52.355] <TB2> INFO: Expecting 2560 events.
[16:41:53.235] <TB2> INFO: 2560 events read in total (288ms).
[16:41:53.235] <TB2> INFO: Test took 1187ms.
[16:41:53.237] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:53.543] <TB2> INFO: Expecting 2560 events.
[16:41:54.423] <TB2> INFO: 2560 events read in total (288ms).
[16:41:54.424] <TB2> INFO: Test took 1187ms.
[16:41:54.426] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:54.732] <TB2> INFO: Expecting 2560 events.
[16:41:55.611] <TB2> INFO: 2560 events read in total (288ms).
[16:41:55.612] <TB2> INFO: Test took 1186ms.
[16:41:55.614] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:55.920] <TB2> INFO: Expecting 2560 events.
[16:41:56.805] <TB2> INFO: 2560 events read in total (293ms).
[16:41:56.805] <TB2> INFO: Test took 1192ms.
[16:41:56.807] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:57.113] <TB2> INFO: Expecting 2560 events.
[16:41:57.995] <TB2> INFO: 2560 events read in total (290ms).
[16:41:57.995] <TB2> INFO: Test took 1188ms.
[16:41:57.997] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:58.304] <TB2> INFO: Expecting 2560 events.
[16:41:59.189] <TB2> INFO: 2560 events read in total (294ms).
[16:41:59.189] <TB2> INFO: Test took 1192ms.
[16:41:59.191] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:41:59.498] <TB2> INFO: Expecting 2560 events.
[16:42:00.379] <TB2> INFO: 2560 events read in total (290ms).
[16:42:00.380] <TB2> INFO: Test took 1189ms.
[16:42:00.381] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:42:00.688] <TB2> INFO: Expecting 2560 events.
[16:42:01.574] <TB2> INFO: 2560 events read in total (294ms).
[16:42:01.574] <TB2> INFO: Test took 1193ms.
[16:42:01.576] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:42:01.883] <TB2> INFO: Expecting 2560 events.
[16:42:02.765] <TB2> INFO: 2560 events read in total (291ms).
[16:42:02.765] <TB2> INFO: Test took 1189ms.
[16:42:02.767] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:42:03.073] <TB2> INFO: Expecting 2560 events.
[16:42:03.956] <TB2> INFO: 2560 events read in total (291ms).
[16:42:03.957] <TB2> INFO: Test took 1190ms.
[16:42:03.958] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:42:04.265] <TB2> INFO: Expecting 2560 events.
[16:42:05.147] <TB2> INFO: 2560 events read in total (291ms).
[16:42:05.148] <TB2> INFO: Test took 1190ms.
[16:42:05.611] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 524 seconds
[16:42:05.611] <TB2> INFO: PH scale (per ROC): 44 34 41 43 47 40 37 48 48 37 36 34 46 43 40 41
[16:42:05.611] <TB2> INFO: PH offset (per ROC): 116 100 98 111 112 103 99 140 130 104 101 120 101 112 122 92
[16:42:05.617] <TB2> INFO: Decoding statistics:
[16:42:05.617] <TB2> INFO: General information:
[16:42:05.617] <TB2> INFO: 16bit words read: 127886
[16:42:05.617] <TB2> INFO: valid events total: 20480
[16:42:05.617] <TB2> INFO: empty events: 17977
[16:42:05.617] <TB2> INFO: valid events with pixels: 2503
[16:42:05.617] <TB2> INFO: valid pixel hits: 2503
[16:42:05.617] <TB2> INFO: Event errors: 0
[16:42:05.617] <TB2> INFO: start marker: 0
[16:42:05.617] <TB2> INFO: stop marker: 0
[16:42:05.617] <TB2> INFO: overflow: 0
[16:42:05.617] <TB2> INFO: invalid 5bit words: 0
[16:42:05.617] <TB2> INFO: invalid XOR eye diagram: 0
[16:42:05.617] <TB2> INFO: frame (failed synchr.): 0
[16:42:05.617] <TB2> INFO: idle data (no TBM trl): 0
[16:42:05.617] <TB2> INFO: no data (only TBM hdr): 0
[16:42:05.617] <TB2> INFO: TBM errors: 0
[16:42:05.617] <TB2> INFO: flawed TBM headers: 0
[16:42:05.617] <TB2> INFO: flawed TBM trailers: 0
[16:42:05.617] <TB2> INFO: event ID mismatches: 0
[16:42:05.617] <TB2> INFO: ROC errors: 0
[16:42:05.617] <TB2> INFO: missing ROC header(s): 0
[16:42:05.617] <TB2> INFO: misplaced readback start: 0
[16:42:05.617] <TB2> INFO: Pixel decoding errors: 0
[16:42:05.617] <TB2> INFO: pixel data incomplete: 0
[16:42:05.617] <TB2> INFO: pixel address: 0
[16:42:05.617] <TB2> INFO: pulse height fill bit: 0
[16:42:05.617] <TB2> INFO: buffer corruption: 0
[16:42:05.891] <TB2> INFO: ######################################################################
[16:42:05.891] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[16:42:05.891] <TB2> INFO: ######################################################################
[16:42:05.903] <TB2> INFO: scanning low vcal = 10
[16:42:06.135] <TB2> INFO: Expecting 41600 events.
[16:42:09.683] <TB2> INFO: 41600 events read in total (2956ms).
[16:42:09.683] <TB2> INFO: Test took 3780ms.
[16:42:09.684] <TB2> INFO: scanning low vcal = 20
[16:42:09.984] <TB2> INFO: Expecting 41600 events.
[16:42:13.533] <TB2> INFO: 41600 events read in total (2957ms).
[16:42:13.533] <TB2> INFO: Test took 3848ms.
[16:42:13.535] <TB2> INFO: scanning low vcal = 30
[16:42:13.836] <TB2> INFO: Expecting 41600 events.
[16:42:17.469] <TB2> INFO: 41600 events read in total (3042ms).
[16:42:17.470] <TB2> INFO: Test took 3935ms.
[16:42:17.473] <TB2> INFO: scanning low vcal = 40
[16:42:17.753] <TB2> INFO: Expecting 41600 events.
[16:42:21.638] <TB2> INFO: 41600 events read in total (3293ms).
[16:42:21.639] <TB2> INFO: Test took 4166ms.
[16:42:21.642] <TB2> INFO: scanning low vcal = 50
[16:42:21.918] <TB2> INFO: Expecting 41600 events.
[16:42:25.844] <TB2> INFO: 41600 events read in total (3334ms).
[16:42:25.844] <TB2> INFO: Test took 4202ms.
[16:42:25.847] <TB2> INFO: scanning low vcal = 60
[16:42:26.124] <TB2> INFO: Expecting 41600 events.
[16:42:30.030] <TB2> INFO: 41600 events read in total (3315ms).
[16:42:30.031] <TB2> INFO: Test took 4184ms.
[16:42:30.034] <TB2> INFO: scanning low vcal = 70
[16:42:30.310] <TB2> INFO: Expecting 41600 events.
[16:42:34.227] <TB2> INFO: 41600 events read in total (3325ms).
[16:42:34.228] <TB2> INFO: Test took 4194ms.
[16:42:34.230] <TB2> INFO: scanning low vcal = 80
[16:42:34.507] <TB2> INFO: Expecting 41600 events.
[16:42:38.455] <TB2> INFO: 41600 events read in total (3357ms).
[16:42:38.456] <TB2> INFO: Test took 4226ms.
[16:42:38.459] <TB2> INFO: scanning low vcal = 90
[16:42:38.735] <TB2> INFO: Expecting 41600 events.
[16:42:42.708] <TB2> INFO: 41600 events read in total (3381ms).
[16:42:42.709] <TB2> INFO: Test took 4250ms.
[16:42:42.711] <TB2> INFO: scanning low vcal = 100
[16:42:42.988] <TB2> INFO: Expecting 41600 events.
[16:42:46.909] <TB2> INFO: 41600 events read in total (3329ms).
[16:42:46.909] <TB2> INFO: Test took 4198ms.
[16:42:46.912] <TB2> INFO: scanning low vcal = 110
[16:42:47.189] <TB2> INFO: Expecting 41600 events.
[16:42:51.097] <TB2> INFO: 41600 events read in total (3317ms).
[16:42:51.098] <TB2> INFO: Test took 4186ms.
[16:42:51.101] <TB2> INFO: scanning low vcal = 120
[16:42:51.377] <TB2> INFO: Expecting 41600 events.
[16:42:55.279] <TB2> INFO: 41600 events read in total (3310ms).
[16:42:55.280] <TB2> INFO: Test took 4179ms.
[16:42:55.282] <TB2> INFO: scanning low vcal = 130
[16:42:55.559] <TB2> INFO: Expecting 41600 events.
[16:42:59.501] <TB2> INFO: 41600 events read in total (3350ms).
[16:42:59.502] <TB2> INFO: Test took 4219ms.
[16:42:59.505] <TB2> INFO: scanning low vcal = 140
[16:42:59.781] <TB2> INFO: Expecting 41600 events.
[16:43:03.711] <TB2> INFO: 41600 events read in total (3338ms).
[16:43:03.711] <TB2> INFO: Test took 4206ms.
[16:43:03.714] <TB2> INFO: scanning low vcal = 150
[16:43:03.991] <TB2> INFO: Expecting 41600 events.
[16:43:07.919] <TB2> INFO: 41600 events read in total (3337ms).
[16:43:07.919] <TB2> INFO: Test took 4205ms.
[16:43:07.922] <TB2> INFO: scanning low vcal = 160
[16:43:08.199] <TB2> INFO: Expecting 41600 events.
[16:43:12.139] <TB2> INFO: 41600 events read in total (3349ms).
[16:43:12.139] <TB2> INFO: Test took 4217ms.
[16:43:12.142] <TB2> INFO: scanning low vcal = 170
[16:43:12.419] <TB2> INFO: Expecting 41600 events.
[16:43:16.362] <TB2> INFO: 41600 events read in total (3352ms).
[16:43:16.363] <TB2> INFO: Test took 4221ms.
[16:43:16.366] <TB2> INFO: scanning low vcal = 180
[16:43:16.642] <TB2> INFO: Expecting 41600 events.
[16:43:20.572] <TB2> INFO: 41600 events read in total (3338ms).
[16:43:20.572] <TB2> INFO: Test took 4206ms.
[16:43:20.575] <TB2> INFO: scanning low vcal = 190
[16:43:20.852] <TB2> INFO: Expecting 41600 events.
[16:43:24.814] <TB2> INFO: 41600 events read in total (3371ms).
[16:43:24.815] <TB2> INFO: Test took 4239ms.
[16:43:24.818] <TB2> INFO: scanning low vcal = 200
[16:43:25.094] <TB2> INFO: Expecting 41600 events.
[16:43:29.016] <TB2> INFO: 41600 events read in total (3331ms).
[16:43:29.016] <TB2> INFO: Test took 4198ms.
[16:43:29.019] <TB2> INFO: scanning low vcal = 210
[16:43:29.296] <TB2> INFO: Expecting 41600 events.
[16:43:33.214] <TB2> INFO: 41600 events read in total (3327ms).
[16:43:33.215] <TB2> INFO: Test took 4196ms.
[16:43:33.217] <TB2> INFO: scanning low vcal = 220
[16:43:33.494] <TB2> INFO: Expecting 41600 events.
[16:43:37.437] <TB2> INFO: 41600 events read in total (3352ms).
[16:43:37.438] <TB2> INFO: Test took 4221ms.
[16:43:37.440] <TB2> INFO: scanning low vcal = 230
[16:43:37.717] <TB2> INFO: Expecting 41600 events.
[16:43:41.648] <TB2> INFO: 41600 events read in total (3339ms).
[16:43:41.648] <TB2> INFO: Test took 4207ms.
[16:43:41.651] <TB2> INFO: scanning low vcal = 240
[16:43:41.927] <TB2> INFO: Expecting 41600 events.
[16:43:45.848] <TB2> INFO: 41600 events read in total (3329ms).
[16:43:45.848] <TB2> INFO: Test took 4197ms.
[16:43:45.851] <TB2> INFO: scanning low vcal = 250
[16:43:46.128] <TB2> INFO: Expecting 41600 events.
[16:43:50.089] <TB2> INFO: 41600 events read in total (3370ms).
[16:43:50.090] <TB2> INFO: Test took 4239ms.
[16:43:50.094] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[16:43:50.369] <TB2> INFO: Expecting 41600 events.
[16:43:54.326] <TB2> INFO: 41600 events read in total (3365ms).
[16:43:54.327] <TB2> INFO: Test took 4233ms.
[16:43:54.330] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[16:43:54.606] <TB2> INFO: Expecting 41600 events.
[16:43:58.581] <TB2> INFO: 41600 events read in total (3383ms).
[16:43:58.581] <TB2> INFO: Test took 4251ms.
[16:43:58.584] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[16:43:58.861] <TB2> INFO: Expecting 41600 events.
[16:44:02.794] <TB2> INFO: 41600 events read in total (3342ms).
[16:44:02.794] <TB2> INFO: Test took 4210ms.
[16:44:02.797] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[16:44:03.074] <TB2> INFO: Expecting 41600 events.
[16:44:07.004] <TB2> INFO: 41600 events read in total (3339ms).
[16:44:07.005] <TB2> INFO: Test took 4208ms.
[16:44:07.007] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[16:44:07.284] <TB2> INFO: Expecting 41600 events.
[16:44:11.215] <TB2> INFO: 41600 events read in total (3340ms).
[16:44:11.215] <TB2> INFO: Test took 4208ms.
[16:44:11.629] <TB2> INFO: PixTestGainPedestal::measure() done
[16:44:43.910] <TB2> INFO: PixTestGainPedestal::fit() done
[16:44:43.910] <TB2> INFO: non-linearity mean: 0.927 0.918 0.919 0.936 0.925 0.952 0.917 0.973 0.949 0.916 0.937 0.935 0.933 0.933 0.955 0.927
[16:44:43.910] <TB2> INFO: non-linearity RMS: 0.052 0.116 0.090 0.043 0.113 0.202 0.089 0.003 0.025 0.090 0.041 0.139 0.165 0.078 0.012 0.073
[16:44:43.910] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[16:44:43.925] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[16:44:43.939] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[16:44:43.959] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[16:44:43.979] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[16:44:43.999] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[16:44:44.018] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[16:44:44.038] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[16:44:44.058] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[16:44:44.077] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[16:44:44.096] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[16:44:44.114] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[16:44:44.136] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[16:44:44.156] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[16:44:44.176] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[16:44:44.200] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1123_FullQualification_2016-11-03_14h28m_1478179737//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[16:44:44.219] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 158 seconds
[16:44:44.219] <TB2> INFO: Decoding statistics:
[16:44:44.219] <TB2> INFO: General information:
[16:44:44.219] <TB2> INFO: 16bit words read: 3327908
[16:44:44.219] <TB2> INFO: valid events total: 332800
[16:44:44.219] <TB2> INFO: empty events: 0
[16:44:44.219] <TB2> INFO: valid events with pixels: 332800
[16:44:44.219] <TB2> INFO: valid pixel hits: 665554
[16:44:44.219] <TB2> INFO: Event errors: 0
[16:44:44.219] <TB2> INFO: start marker: 0
[16:44:44.219] <TB2> INFO: stop marker: 0
[16:44:44.219] <TB2> INFO: overflow: 0
[16:44:44.219] <TB2> INFO: invalid 5bit words: 0
[16:44:44.219] <TB2> INFO: invalid XOR eye diagram: 0
[16:44:44.219] <TB2> INFO: frame (failed synchr.): 0
[16:44:44.219] <TB2> INFO: idle data (no TBM trl): 0
[16:44:44.219] <TB2> INFO: no data (only TBM hdr): 0
[16:44:44.219] <TB2> INFO: TBM errors: 0
[16:44:44.219] <TB2> INFO: flawed TBM headers: 0
[16:44:44.219] <TB2> INFO: flawed TBM trailers: 0
[16:44:44.219] <TB2> INFO: event ID mismatches: 0
[16:44:44.219] <TB2> INFO: ROC errors: 0
[16:44:44.219] <TB2> INFO: missing ROC header(s): 0
[16:44:44.219] <TB2> INFO: misplaced readback start: 0
[16:44:44.219] <TB2> INFO: Pixel decoding errors: 0
[16:44:44.219] <TB2> INFO: pixel data incomplete: 0
[16:44:44.219] <TB2> INFO: pixel address: 0
[16:44:44.219] <TB2> INFO: pulse height fill bit: 0
[16:44:44.219] <TB2> INFO: buffer corruption: 0
[16:44:44.237] <TB2> INFO: Decoding statistics:
[16:44:44.237] <TB2> INFO: General information:
[16:44:44.237] <TB2> INFO: 16bit words read: 3457330
[16:44:44.237] <TB2> INFO: valid events total: 353536
[16:44:44.237] <TB2> INFO: empty events: 18233
[16:44:44.237] <TB2> INFO: valid events with pixels: 335303
[16:44:44.237] <TB2> INFO: valid pixel hits: 668057
[16:44:44.237] <TB2> INFO: Event errors: 0
[16:44:44.237] <TB2> INFO: start marker: 0
[16:44:44.237] <TB2> INFO: stop marker: 0
[16:44:44.237] <TB2> INFO: overflow: 0
[16:44:44.237] <TB2> INFO: invalid 5bit words: 0
[16:44:44.237] <TB2> INFO: invalid XOR eye diagram: 0
[16:44:44.237] <TB2> INFO: frame (failed synchr.): 0
[16:44:44.237] <TB2> INFO: idle data (no TBM trl): 0
[16:44:44.237] <TB2> INFO: no data (only TBM hdr): 0
[16:44:44.237] <TB2> INFO: TBM errors: 0
[16:44:44.237] <TB2> INFO: flawed TBM headers: 0
[16:44:44.237] <TB2> INFO: flawed TBM trailers: 0
[16:44:44.237] <TB2> INFO: event ID mismatches: 0
[16:44:44.237] <TB2> INFO: ROC errors: 0
[16:44:44.237] <TB2> INFO: missing ROC header(s): 0
[16:44:44.237] <TB2> INFO: misplaced readback start: 0
[16:44:44.237] <TB2> INFO: Pixel decoding errors: 0
[16:44:44.237] <TB2> INFO: pixel data incomplete: 0
[16:44:44.237] <TB2> INFO: pixel address: 0
[16:44:44.237] <TB2> INFO: pulse height fill bit: 0
[16:44:44.237] <TB2> INFO: buffer corruption: 0
[16:44:44.237] <TB2> INFO: enter test to run
[16:44:44.237] <TB2> INFO: test: exit no parameter change
[16:44:44.298] <TB2> QUIET: Connection to board 156 closed.
[16:44:44.299] <TB2> INFO: pXar: this is the end, my friend