[10:58:05.693] <TB3> INFO: *** Welcome to pxar ***
[10:58:05.693] <TB3> INFO: *** Today: 2016/10/25
[10:58:05.699] <TB3> INFO: *** Version: c8ba-dirty
[10:58:05.699] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C15.dat
[10:58:05.700] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//tbmParameters_C1b.dat
[10:58:05.700] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//defaultMaskFile.dat
[10:58:05.700] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters_C15.dat
[10:58:05.765] <TB3> INFO: clk: 4
[10:58:05.765] <TB3> INFO: ctr: 4
[10:58:05.765] <TB3> INFO: sda: 19
[10:58:05.765] <TB3> INFO: tin: 9
[10:58:05.765] <TB3> INFO: level: 15
[10:58:05.765] <TB3> INFO: triggerdelay: 0
[10:58:05.765] <TB3> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[10:58:05.765] <TB3> INFO: Log level: INFO
[10:58:05.775] <TB3> INFO: Found DTB DTB_WWVASW
[10:58:05.784] <TB3> QUIET: Connection to board DTB_WWVASW opened.
[10:58:05.786] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[10:58:05.788] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[10:58:07.322] <TB3> INFO: DUT info:
[10:58:07.323] <TB3> INFO: The DUT currently contains the following objects:
[10:58:07.323] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[10:58:07.323] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:58:07.323] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:58:07.323] <TB3> INFO: TBM Core alpha (2): 7 registers set
[10:58:07.323] <TB3> INFO: TBM Core beta (3): 7 registers set
[10:58:07.323] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[10:58:07.323] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[10:58:07.323] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[10:58:07.323] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[10:58:07.323] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[10:58:07.323] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[10:58:07.323] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[10:58:07.323] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[10:58:07.323] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[10:58:07.323] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[10:58:07.323] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[10:58:07.323] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[10:58:07.323] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[10:58:07.323] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[10:58:07.323] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[10:58:07.323] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[10:58:07.323] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[10:58:07.725] <TB3> INFO: enter 'restricted' command line mode
[10:58:07.725] <TB3> INFO: enter test to run
[10:58:07.725] <TB3> INFO: test: pretest no parameter change
[10:58:07.725] <TB3> INFO: running: pretest
[10:58:07.733] <TB3> INFO: ######################################################################
[10:58:07.733] <TB3> INFO: PixTestPretest::doTest()
[10:58:07.733] <TB3> INFO: ######################################################################
[10:58:07.734] <TB3> INFO: ----------------------------------------------------------------------
[10:58:07.734] <TB3> INFO: PixTestPretest::programROC()
[10:58:07.734] <TB3> INFO: ----------------------------------------------------------------------
[10:58:25.750] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[10:58:25.750] <TB3> INFO: IA differences per ROC: 21.7 17.7 19.3 20.1 20.1 19.3 18.5 18.5 18.5 19.3 21.7 19.3 19.3 20.1 17.7 19.3
[10:58:25.821] <TB3> INFO: ----------------------------------------------------------------------
[10:58:25.821] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[10:58:25.821] <TB3> INFO: ----------------------------------------------------------------------
[10:58:33.634] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 392.3 mA = 24.5187 mA/ROC
[10:58:33.634] <TB3> INFO: i(loss) [mA/ROC]: 20.1 19.3 20.1 20.1 19.3 19.3 20.9 19.3 19.3 20.1 20.1 18.5 19.3 19.3 20.9 19.3
[10:58:33.669] <TB3> INFO: ----------------------------------------------------------------------
[10:58:33.669] <TB3> INFO: PixTestPretest::findTiming()
[10:58:33.669] <TB3> INFO: ----------------------------------------------------------------------
[10:58:33.669] <TB3> INFO: PixTestCmd::init()

[10:59:05.917] <TB3> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[10:59:05.917] <TB3> INFO: (success/tries = 100/100), width = 4
[10:59:07.409] <TB3> INFO: ----------------------------------------------------------------------
[10:59:07.409] <TB3> INFO: PixTestPretest::findWorkingPixel()
[10:59:07.409] <TB3> INFO: ----------------------------------------------------------------------
[10:59:07.505] <TB3> INFO: Expecting 231680 events.
[10:59:17.527] <TB3> INFO: 231680 events read in total (9430ms).
[10:59:17.535] <TB3> INFO: Test took 10120ms.
[10:59:17.782] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[10:59:17.813] <TB3> INFO: ----------------------------------------------------------------------
[10:59:17.813] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[10:59:17.813] <TB3> INFO: ----------------------------------------------------------------------
[10:59:17.907] <TB3> INFO: Expecting 231680 events.
[10:59:27.924] <TB3> INFO: 231680 events read in total (9426ms).
[10:59:27.937] <TB3> INFO: Test took 10120ms.
[10:59:28.193] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[10:59:28.193] <TB3> INFO: CalDel: 95 79 94 94 96 91 81 100 102 94 78 90 86 89 90 74
[10:59:28.193] <TB3> INFO: VthrComp: 51 51 51 51 54 53 51 51 51 51 51 51 51 51 51 51
[10:59:28.197] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C0.dat
[10:59:28.197] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C1.dat
[10:59:28.197] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C2.dat
[10:59:28.197] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C3.dat
[10:59:28.197] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C4.dat
[10:59:28.197] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C5.dat
[10:59:28.197] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C6.dat
[10:59:28.198] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C7.dat
[10:59:28.198] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C8.dat
[10:59:28.198] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C9.dat
[10:59:28.198] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C10.dat
[10:59:28.198] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C11.dat
[10:59:28.198] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C12.dat
[10:59:28.198] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C13.dat
[10:59:28.198] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C14.dat
[10:59:28.199] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C15.dat
[10:59:28.199] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//tbmParameters_C0a.dat
[10:59:28.199] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//tbmParameters_C0b.dat
[10:59:28.199] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//tbmParameters_C1a.dat
[10:59:28.199] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//tbmParameters_C1b.dat
[10:59:28.199] <TB3> INFO: PixTestPretest::doTest() done, duration: 80 seconds
[10:59:28.253] <TB3> INFO: enter test to run
[10:59:28.253] <TB3> INFO: test: FullTest no parameter change
[10:59:28.253] <TB3> INFO: running: fulltest
[10:59:28.253] <TB3> INFO: ######################################################################
[10:59:28.253] <TB3> INFO: PixTestFullTest::doTest()
[10:59:28.253] <TB3> INFO: ######################################################################
[10:59:28.254] <TB3> INFO: ######################################################################
[10:59:28.254] <TB3> INFO: PixTestAlive::doTest()
[10:59:28.254] <TB3> INFO: ######################################################################
[10:59:28.256] <TB3> INFO: ----------------------------------------------------------------------
[10:59:28.256] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:59:28.256] <TB3> INFO: ----------------------------------------------------------------------
[10:59:28.497] <TB3> INFO: Expecting 41600 events.
[10:59:32.040] <TB3> INFO: 41600 events read in total (2951ms).
[10:59:32.041] <TB3> INFO: Test took 3784ms.
[10:59:32.268] <TB3> INFO: PixTestAlive::aliveTest() done
[10:59:32.268] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0
[10:59:32.269] <TB3> INFO: ----------------------------------------------------------------------
[10:59:32.269] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:59:32.269] <TB3> INFO: ----------------------------------------------------------------------
[10:59:32.509] <TB3> INFO: Expecting 41600 events.
[10:59:35.497] <TB3> INFO: 41600 events read in total (2396ms).
[10:59:35.497] <TB3> INFO: Test took 3226ms.
[10:59:35.497] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[10:59:35.743] <TB3> INFO: PixTestAlive::maskTest() done
[10:59:35.743] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:59:35.745] <TB3> INFO: ----------------------------------------------------------------------
[10:59:35.745] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:59:35.745] <TB3> INFO: ----------------------------------------------------------------------
[10:59:36.031] <TB3> INFO: Expecting 41600 events.
[10:59:39.551] <TB3> INFO: 41600 events read in total (2928ms).
[10:59:39.552] <TB3> INFO: Test took 3805ms.
[10:59:39.786] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[10:59:39.786] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:59:39.786] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[10:59:39.786] <TB3> INFO: Decoding statistics:
[10:59:39.786] <TB3> INFO: General information:
[10:59:39.786] <TB3> INFO: 16bit words read: 0
[10:59:39.786] <TB3> INFO: valid events total: 0
[10:59:39.786] <TB3> INFO: empty events: 0
[10:59:39.786] <TB3> INFO: valid events with pixels: 0
[10:59:39.786] <TB3> INFO: valid pixel hits: 0
[10:59:39.787] <TB3> INFO: Event errors: 0
[10:59:39.787] <TB3> INFO: start marker: 0
[10:59:39.787] <TB3> INFO: stop marker: 0
[10:59:39.787] <TB3> INFO: overflow: 0
[10:59:39.787] <TB3> INFO: invalid 5bit words: 0
[10:59:39.787] <TB3> INFO: invalid XOR eye diagram: 0
[10:59:39.787] <TB3> INFO: frame (failed synchr.): 0
[10:59:39.787] <TB3> INFO: idle data (no TBM trl): 0
[10:59:39.787] <TB3> INFO: no data (only TBM hdr): 0
[10:59:39.787] <TB3> INFO: TBM errors: 0
[10:59:39.787] <TB3> INFO: flawed TBM headers: 0
[10:59:39.787] <TB3> INFO: flawed TBM trailers: 0
[10:59:39.787] <TB3> INFO: event ID mismatches: 0
[10:59:39.787] <TB3> INFO: ROC errors: 0
[10:59:39.787] <TB3> INFO: missing ROC header(s): 0
[10:59:39.787] <TB3> INFO: misplaced readback start: 0
[10:59:39.787] <TB3> INFO: Pixel decoding errors: 0
[10:59:39.787] <TB3> INFO: pixel data incomplete: 0
[10:59:39.787] <TB3> INFO: pixel address: 0
[10:59:39.787] <TB3> INFO: pulse height fill bit: 0
[10:59:39.787] <TB3> INFO: buffer corruption: 0
[10:59:39.796] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C15.dat
[10:59:39.797] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr_C15.dat

[10:59:39.797] <TB3> INFO: ######################################################################
[10:59:39.797] <TB3> INFO: PixTestReadback::doTest()
[10:59:39.797] <TB3> INFO: ######################################################################
[10:59:39.797] <TB3> INFO: ----------------------------------------------------------------------
[10:59:39.797] <TB3> INFO: PixTestReadback::CalibrateVd()
[10:59:39.797] <TB3> INFO: ----------------------------------------------------------------------
[10:59:49.774] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C0.dat
[10:59:49.775] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C1.dat
[10:59:49.775] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C2.dat
[10:59:49.775] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C3.dat
[10:59:49.775] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C4.dat
[10:59:49.775] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C5.dat
[10:59:49.775] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C6.dat
[10:59:49.775] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C7.dat
[10:59:49.775] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C8.dat
[10:59:49.775] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C9.dat
[10:59:49.776] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C10.dat
[10:59:49.776] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C11.dat
[10:59:49.776] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C12.dat
[10:59:49.776] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C13.dat
[10:59:49.776] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C14.dat
[10:59:49.776] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C15.dat
[10:59:49.806] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:59:49.806] <TB3> INFO: ----------------------------------------------------------------------
[10:59:49.806] <TB3> INFO: PixTestReadback::CalibrateVa()
[10:59:49.807] <TB3> INFO: ----------------------------------------------------------------------
[10:59:59.748] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C0.dat
[10:59:59.748] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C1.dat
[10:59:59.748] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C2.dat
[10:59:59.748] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C3.dat
[10:59:59.748] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C4.dat
[10:59:59.748] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C5.dat
[10:59:59.748] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C6.dat
[10:59:59.748] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C7.dat
[10:59:59.748] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C8.dat
[10:59:59.748] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C9.dat
[10:59:59.748] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C10.dat
[10:59:59.749] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C11.dat
[10:59:59.749] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C12.dat
[10:59:59.749] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C13.dat
[10:59:59.749] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C14.dat
[10:59:59.749] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C15.dat
[10:59:59.781] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:59:59.781] <TB3> INFO: ----------------------------------------------------------------------
[10:59:59.781] <TB3> INFO: PixTestReadback::readbackVbg()
[10:59:59.781] <TB3> INFO: ----------------------------------------------------------------------
[11:00:07.455] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:00:07.455] <TB3> INFO: ----------------------------------------------------------------------
[11:00:07.455] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[11:00:07.456] <TB3> INFO: ----------------------------------------------------------------------
[11:00:07.456] <TB3> INFO: Vbg will be calibrated using Vd calibration
[11:00:07.456] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 159calibrated Vbg = 1.21157 :::*/*/*/*/
[11:00:07.456] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 151.7calibrated Vbg = 1.20765 :::*/*/*/*/
[11:00:07.456] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 160.3calibrated Vbg = 1.20383 :::*/*/*/*/
[11:00:07.456] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 149.1calibrated Vbg = 1.20298 :::*/*/*/*/
[11:00:07.456] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 157.6calibrated Vbg = 1.19958 :::*/*/*/*/
[11:00:07.456] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 157calibrated Vbg = 1.20608 :::*/*/*/*/
[11:00:07.456] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 153.2calibrated Vbg = 1.21009 :::*/*/*/*/
[11:00:07.456] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 156.4calibrated Vbg = 1.20675 :::*/*/*/*/
[11:00:07.456] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 151.1calibrated Vbg = 1.20195 :::*/*/*/*/
[11:00:07.456] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 152.5calibrated Vbg = 1.20426 :::*/*/*/*/
[11:00:07.456] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 154.1calibrated Vbg = 1.19189 :::*/*/*/*/
[11:00:07.456] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 150.9calibrated Vbg = 1.19698 :::*/*/*/*/
[11:00:07.456] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 158.7calibrated Vbg = 1.20165 :::*/*/*/*/
[11:00:07.456] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 158.1calibrated Vbg = 1.20194 :::*/*/*/*/
[11:00:07.456] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 161.1calibrated Vbg = 1.20251 :::*/*/*/*/
[11:00:07.456] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 149.1calibrated Vbg = 1.20412 :::*/*/*/*/
[11:00:07.459] <TB3> INFO: ----------------------------------------------------------------------
[11:00:07.459] <TB3> INFO: PixTestReadback::CalibrateIa()
[11:00:07.459] <TB3> INFO: ----------------------------------------------------------------------
[11:02:48.261] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C0.dat
[11:02:48.262] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C1.dat
[11:02:48.262] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C2.dat
[11:02:48.262] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C3.dat
[11:02:48.262] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C4.dat
[11:02:48.262] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C5.dat
[11:02:48.262] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C6.dat
[11:02:48.262] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C7.dat
[11:02:48.262] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C8.dat
[11:02:48.262] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C9.dat
[11:02:48.262] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C10.dat
[11:02:48.262] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C11.dat
[11:02:48.262] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C12.dat
[11:02:48.262] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C13.dat
[11:02:48.262] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C14.dat
[11:02:48.262] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C15.dat
[11:02:48.291] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:02:48.292] <TB3> INFO: PixTestReadback::doTest() done
[11:02:48.292] <TB3> INFO: Decoding statistics:
[11:02:48.292] <TB3> INFO: General information:
[11:02:48.292] <TB3> INFO: 16bit words read: 1536
[11:02:48.292] <TB3> INFO: valid events total: 256
[11:02:48.292] <TB3> INFO: empty events: 256
[11:02:48.293] <TB3> INFO: valid events with pixels: 0
[11:02:48.293] <TB3> INFO: valid pixel hits: 0
[11:02:48.293] <TB3> INFO: Event errors: 0
[11:02:48.293] <TB3> INFO: start marker: 0
[11:02:48.293] <TB3> INFO: stop marker: 0
[11:02:48.293] <TB3> INFO: overflow: 0
[11:02:48.293] <TB3> INFO: invalid 5bit words: 0
[11:02:48.293] <TB3> INFO: invalid XOR eye diagram: 0
[11:02:48.293] <TB3> INFO: frame (failed synchr.): 0
[11:02:48.293] <TB3> INFO: idle data (no TBM trl): 0
[11:02:48.293] <TB3> INFO: no data (only TBM hdr): 0
[11:02:48.293] <TB3> INFO: TBM errors: 0
[11:02:48.293] <TB3> INFO: flawed TBM headers: 0
[11:02:48.293] <TB3> INFO: flawed TBM trailers: 0
[11:02:48.293] <TB3> INFO: event ID mismatches: 0
[11:02:48.293] <TB3> INFO: ROC errors: 0
[11:02:48.293] <TB3> INFO: missing ROC header(s): 0
[11:02:48.293] <TB3> INFO: misplaced readback start: 0
[11:02:48.293] <TB3> INFO: Pixel decoding errors: 0
[11:02:48.293] <TB3> INFO: pixel data incomplete: 0
[11:02:48.293] <TB3> INFO: pixel address: 0
[11:02:48.293] <TB3> INFO: pulse height fill bit: 0
[11:02:48.293] <TB3> INFO: buffer corruption: 0
[11:02:48.354] <TB3> INFO: ######################################################################
[11:02:48.354] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:02:48.355] <TB3> INFO: ######################################################################
[11:02:48.357] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[11:02:48.409] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:02:48.409] <TB3> INFO: run 1 of 1
[11:02:48.651] <TB3> INFO: Expecting 3120000 events.
[11:03:19.946] <TB3> INFO: 680930 events read in total (30703ms).











[11:03:50.690] <TB3> INFO: 1356890 events read in total (61447ms).











[11:04:21.066] <TB3> INFO: 2030020 events read in total (91823ms).











[11:04:51.683] <TB3> INFO: 2705145 events read in total (122440ms).











[11:05:10.640] <TB3> INFO: 3120000 events read in total (141398ms).
[11:05:10.717] <TB3> INFO: Test took 142308ms.
[11:05:38.122] <TB3> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 169 seconds
[11:05:38.122] <TB3> INFO: number of dead bumps (per ROC): 0 1 0 0 0 0 0 3 1 0 0 0 0 0 0 0
[11:05:38.122] <TB3> INFO: separation cut (per ROC): 107 108 105 103 114 120 111 103 105 112 108 104 117 112 110 116
[11:05:38.122] <TB3> INFO: Decoding statistics:
[11:05:38.122] <TB3> INFO: General information:
[11:05:38.122] <TB3> INFO: 16bit words read: 0
[11:05:38.122] <TB3> INFO: valid events total: 0
[11:05:38.122] <TB3> INFO: empty events: 0
[11:05:38.122] <TB3> INFO: valid events with pixels: 0
[11:05:38.122] <TB3> INFO: valid pixel hits: 0
[11:05:38.122] <TB3> INFO: Event errors: 0
[11:05:38.123] <TB3> INFO: start marker: 0
[11:05:38.123] <TB3> INFO: stop marker: 0
[11:05:38.123] <TB3> INFO: overflow: 0
[11:05:38.123] <TB3> INFO: invalid 5bit words: 0
[11:05:38.123] <TB3> INFO: invalid XOR eye diagram: 0
[11:05:38.123] <TB3> INFO: frame (failed synchr.): 0
[11:05:38.123] <TB3> INFO: idle data (no TBM trl): 0
[11:05:38.123] <TB3> INFO: no data (only TBM hdr): 0
[11:05:38.123] <TB3> INFO: TBM errors: 0
[11:05:38.123] <TB3> INFO: flawed TBM headers: 0
[11:05:38.123] <TB3> INFO: flawed TBM trailers: 0
[11:05:38.123] <TB3> INFO: event ID mismatches: 0
[11:05:38.123] <TB3> INFO: ROC errors: 0
[11:05:38.123] <TB3> INFO: missing ROC header(s): 0
[11:05:38.123] <TB3> INFO: misplaced readback start: 0
[11:05:38.123] <TB3> INFO: Pixel decoding errors: 0
[11:05:38.123] <TB3> INFO: pixel data incomplete: 0
[11:05:38.123] <TB3> INFO: pixel address: 0
[11:05:38.123] <TB3> INFO: pulse height fill bit: 0
[11:05:38.123] <TB3> INFO: buffer corruption: 0
[11:05:38.168] <TB3> INFO: ######################################################################
[11:05:38.168] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:05:38.168] <TB3> INFO: ######################################################################
[11:05:38.168] <TB3> INFO: ----------------------------------------------------------------------
[11:05:38.168] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:05:38.168] <TB3> INFO: ----------------------------------------------------------------------
[11:05:38.169] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[11:05:38.183] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[11:05:38.183] <TB3> INFO: run 1 of 1
[11:05:38.422] <TB3> INFO: Expecting 36608000 events.
[11:06:02.409] <TB3> INFO: 702900 events read in total (23388ms).
[11:06:25.563] <TB3> INFO: 1388450 events read in total (46542ms).
[11:06:48.363] <TB3> INFO: 2071750 events read in total (69342ms).
[11:07:11.202] <TB3> INFO: 2754650 events read in total (92181ms).
[11:07:34.320] <TB3> INFO: 3436750 events read in total (115299ms).
[11:07:57.338] <TB3> INFO: 4116500 events read in total (138317ms).
[11:08:20.821] <TB3> INFO: 4796450 events read in total (161800ms).
[11:08:43.741] <TB3> INFO: 5477800 events read in total (184720ms).
[11:09:06.489] <TB3> INFO: 6158600 events read in total (207468ms).
[11:09:29.677] <TB3> INFO: 6840350 events read in total (230656ms).
[11:09:52.775] <TB3> INFO: 7520500 events read in total (253754ms).
[11:10:15.473] <TB3> INFO: 8199400 events read in total (276452ms).
[11:10:38.383] <TB3> INFO: 8879150 events read in total (299362ms).
[11:11:01.394] <TB3> INFO: 9560150 events read in total (322373ms).
[11:11:24.471] <TB3> INFO: 10238450 events read in total (345450ms).
[11:11:47.336] <TB3> INFO: 10915600 events read in total (368315ms).
[11:12:10.549] <TB3> INFO: 11594000 events read in total (391528ms).
[11:12:33.544] <TB3> INFO: 12270750 events read in total (414523ms).
[11:12:56.614] <TB3> INFO: 12948050 events read in total (437593ms).
[11:13:19.641] <TB3> INFO: 13625300 events read in total (460620ms).
[11:13:42.622] <TB3> INFO: 14300650 events read in total (483602ms).
[11:14:05.756] <TB3> INFO: 14974950 events read in total (506735ms).
[11:14:28.416] <TB3> INFO: 15646400 events read in total (529395ms).
[11:14:51.346] <TB3> INFO: 16320050 events read in total (552325ms).
[11:15:14.066] <TB3> INFO: 16991150 events read in total (575045ms).
[11:15:36.850] <TB3> INFO: 17664700 events read in total (597829ms).
[11:15:59.697] <TB3> INFO: 18336500 events read in total (620676ms).
[11:16:22.574] <TB3> INFO: 19007100 events read in total (643553ms).
[11:16:45.491] <TB3> INFO: 19678000 events read in total (666470ms).
[11:17:08.208] <TB3> INFO: 20348900 events read in total (689187ms).
[11:17:31.413] <TB3> INFO: 21019100 events read in total (712392ms).
[11:17:54.362] <TB3> INFO: 21688250 events read in total (735341ms).
[11:18:17.366] <TB3> INFO: 22357300 events read in total (758345ms).
[11:18:40.325] <TB3> INFO: 23027450 events read in total (781304ms).
[11:19:03.256] <TB3> INFO: 23697650 events read in total (804235ms).
[11:19:26.070] <TB3> INFO: 24366650 events read in total (827049ms).
[11:19:48.648] <TB3> INFO: 25035300 events read in total (849627ms).
[11:20:11.531] <TB3> INFO: 25705050 events read in total (872510ms).
[11:20:34.436] <TB3> INFO: 26373950 events read in total (895415ms).
[11:20:57.626] <TB3> INFO: 27041600 events read in total (918605ms).
[11:21:20.502] <TB3> INFO: 27709800 events read in total (941481ms).
[11:21:43.267] <TB3> INFO: 28377600 events read in total (964246ms).
[11:22:05.799] <TB3> INFO: 29043200 events read in total (986778ms).
[11:22:28.563] <TB3> INFO: 29709400 events read in total (1009542ms).
[11:22:51.296] <TB3> INFO: 30376750 events read in total (1032275ms).
[11:23:14.067] <TB3> INFO: 31043800 events read in total (1055046ms).
[11:23:36.768] <TB3> INFO: 31707650 events read in total (1077747ms).
[11:23:59.705] <TB3> INFO: 32373500 events read in total (1100684ms).
[11:24:22.191] <TB3> INFO: 33039600 events read in total (1123170ms).
[11:24:45.181] <TB3> INFO: 33706000 events read in total (1146160ms).
[11:25:07.810] <TB3> INFO: 34374100 events read in total (1168789ms).
[11:25:30.391] <TB3> INFO: 35041550 events read in total (1191370ms).
[11:25:53.215] <TB3> INFO: 35710650 events read in total (1214194ms).
[11:26:16.426] <TB3> INFO: 36393150 events read in total (1237405ms).
[11:26:24.037] <TB3> INFO: 36608000 events read in total (1245016ms).
[11:26:24.101] <TB3> INFO: Test took 1245918ms.
[11:26:24.567] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:26:26.514] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:26:28.523] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:26:30.412] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:26:32.388] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:26:34.222] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:26:36.179] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:26:37.670] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:26:39.079] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:26:40.463] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:26:41.858] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:26:43.369] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:26:44.770] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:26:46.153] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:26:48.018] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:26:49.934] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:26:51.847] <TB3> INFO: PixTestScurves::scurves() done
[11:26:51.848] <TB3> INFO: Vcal mean: 127.41 120.78 120.72 113.64 131.49 134.21 132.56 126.88 129.78 122.07 117.09 120.93 134.11 123.60 123.02 130.31
[11:26:51.848] <TB3> INFO: Vcal RMS: 7.37 6.02 7.22 5.29 5.99 6.50 6.28 6.99 6.20 6.03 5.93 6.69 6.09 6.15 5.97 6.85
[11:26:51.848] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1273 seconds
[11:26:51.848] <TB3> INFO: Decoding statistics:
[11:26:51.848] <TB3> INFO: General information:
[11:26:51.848] <TB3> INFO: 16bit words read: 0
[11:26:51.848] <TB3> INFO: valid events total: 0
[11:26:51.848] <TB3> INFO: empty events: 0
[11:26:51.848] <TB3> INFO: valid events with pixels: 0
[11:26:51.848] <TB3> INFO: valid pixel hits: 0
[11:26:51.848] <TB3> INFO: Event errors: 0
[11:26:51.848] <TB3> INFO: start marker: 0
[11:26:51.848] <TB3> INFO: stop marker: 0
[11:26:51.848] <TB3> INFO: overflow: 0
[11:26:51.848] <TB3> INFO: invalid 5bit words: 0
[11:26:51.848] <TB3> INFO: invalid XOR eye diagram: 0
[11:26:51.848] <TB3> INFO: frame (failed synchr.): 0
[11:26:51.848] <TB3> INFO: idle data (no TBM trl): 0
[11:26:51.848] <TB3> INFO: no data (only TBM hdr): 0
[11:26:51.848] <TB3> INFO: TBM errors: 0
[11:26:51.848] <TB3> INFO: flawed TBM headers: 0
[11:26:51.848] <TB3> INFO: flawed TBM trailers: 0
[11:26:51.848] <TB3> INFO: event ID mismatches: 0
[11:26:51.848] <TB3> INFO: ROC errors: 0
[11:26:51.848] <TB3> INFO: missing ROC header(s): 0
[11:26:51.848] <TB3> INFO: misplaced readback start: 0
[11:26:51.848] <TB3> INFO: Pixel decoding errors: 0
[11:26:51.848] <TB3> INFO: pixel data incomplete: 0
[11:26:51.848] <TB3> INFO: pixel address: 0
[11:26:51.848] <TB3> INFO: pulse height fill bit: 0
[11:26:51.848] <TB3> INFO: buffer corruption: 0
[11:26:51.918] <TB3> INFO: ######################################################################
[11:26:51.918] <TB3> INFO: PixTestTrim::doTest()
[11:26:51.918] <TB3> INFO: ######################################################################
[11:26:51.920] <TB3> INFO: ----------------------------------------------------------------------
[11:26:51.920] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[11:26:51.920] <TB3> INFO: ----------------------------------------------------------------------
[11:26:51.962] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:26:51.963] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:26:51.977] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:26:51.977] <TB3> INFO: run 1 of 1
[11:26:52.217] <TB3> INFO: Expecting 5025280 events.
[11:27:22.297] <TB3> INFO: 829648 events read in total (29478ms).
[11:27:52.301] <TB3> INFO: 1656792 events read in total (59482ms).
[11:28:22.123] <TB3> INFO: 2479208 events read in total (89304ms).
[11:28:52.210] <TB3> INFO: 3298552 events read in total (119391ms).
[11:29:22.386] <TB3> INFO: 4113232 events read in total (149568ms).
[11:29:53.060] <TB3> INFO: 4926184 events read in total (180241ms).
[11:29:56.963] <TB3> INFO: 5025280 events read in total (184144ms).
[11:29:57.014] <TB3> INFO: Test took 185037ms.
[11:30:13.267] <TB3> INFO: ROC 0 VthrComp = 122
[11:30:13.268] <TB3> INFO: ROC 1 VthrComp = 122
[11:30:13.268] <TB3> INFO: ROC 2 VthrComp = 121
[11:30:13.268] <TB3> INFO: ROC 3 VthrComp = 113
[11:30:13.268] <TB3> INFO: ROC 4 VthrComp = 130
[11:30:13.268] <TB3> INFO: ROC 5 VthrComp = 131
[11:30:13.268] <TB3> INFO: ROC 6 VthrComp = 130
[11:30:13.268] <TB3> INFO: ROC 7 VthrComp = 119
[11:30:13.268] <TB3> INFO: ROC 8 VthrComp = 124
[11:30:13.269] <TB3> INFO: ROC 9 VthrComp = 128
[11:30:13.269] <TB3> INFO: ROC 10 VthrComp = 116
[11:30:13.269] <TB3> INFO: ROC 11 VthrComp = 116
[11:30:13.270] <TB3> INFO: ROC 12 VthrComp = 133
[11:30:13.270] <TB3> INFO: ROC 13 VthrComp = 126
[11:30:13.270] <TB3> INFO: ROC 14 VthrComp = 124
[11:30:13.270] <TB3> INFO: ROC 15 VthrComp = 132
[11:30:13.507] <TB3> INFO: Expecting 41600 events.
[11:30:17.059] <TB3> INFO: 41600 events read in total (2960ms).
[11:30:17.060] <TB3> INFO: Test took 3788ms.
[11:30:17.069] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:30:17.069] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:30:17.083] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:30:17.083] <TB3> INFO: run 1 of 1
[11:30:17.376] <TB3> INFO: Expecting 5025280 events.
[11:30:43.714] <TB3> INFO: 593208 events read in total (25746ms).
[11:31:09.529] <TB3> INFO: 1184200 events read in total (51561ms).
[11:31:35.369] <TB3> INFO: 1774888 events read in total (77401ms).
[11:32:00.858] <TB3> INFO: 2364904 events read in total (102890ms).
[11:32:26.667] <TB3> INFO: 2952816 events read in total (128699ms).
[11:32:52.329] <TB3> INFO: 3539392 events read in total (154361ms).
[11:33:18.180] <TB3> INFO: 4124952 events read in total (180212ms).
[11:33:43.701] <TB3> INFO: 4710680 events read in total (205733ms).
[11:33:57.705] <TB3> INFO: 5025280 events read in total (219737ms).
[11:33:57.773] <TB3> INFO: Test took 220690ms.
[11:34:22.290] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 61.6507 for pixel 21/0 mean/min/max = 46.9306/31.9794/61.8818
[11:34:22.291] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 59.9987 for pixel 4/79 mean/min/max = 46.2955/32.3022/60.2887
[11:34:22.291] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 60.634 for pixel 6/73 mean/min/max = 46.3372/32.0189/60.6555
[11:34:22.291] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 60.9761 for pixel 0/2 mean/min/max = 46.9303/32.868/60.9926
[11:34:22.292] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 64.135 for pixel 0/56 mean/min/max = 48.2803/32.4012/64.1595
[11:34:22.292] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 59.0634 for pixel 9/77 mean/min/max = 45.496/31.6922/59.2999
[11:34:22.293] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 62.2158 for pixel 27/1 mean/min/max = 46.7984/31.08/62.5167
[11:34:22.293] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 63.9477 for pixel 4/1 mean/min/max = 47.8627/31.7717/63.9537
[11:34:22.294] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 62.0655 for pixel 20/12 mean/min/max = 47.7022/33.1559/62.2486
[11:34:22.294] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 58.6423 for pixel 44/30 mean/min/max = 45.1922/31.6277/58.7567
[11:34:22.294] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 60.0348 for pixel 19/26 mean/min/max = 46.5052/32.8138/60.1966
[11:34:22.295] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 61.2672 for pixel 20/7 mean/min/max = 46.8072/32.2846/61.3299
[11:34:22.295] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 60.5424 for pixel 0/0 mean/min/max = 46.4117/31.9279/60.8954
[11:34:22.296] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 60.1843 for pixel 20/5 mean/min/max = 45.8805/31.3944/60.3666
[11:34:22.296] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 59.7964 for pixel 1/15 mean/min/max = 45.9079/31.9976/59.8181
[11:34:22.297] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 61.2135 for pixel 21/0 mean/min/max = 46.571/31.9043/61.2376
[11:34:22.297] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:22.386] <TB3> INFO: Expecting 411648 events.
[11:34:31.770] <TB3> INFO: 411648 events read in total (8792ms).
[11:34:31.778] <TB3> INFO: Expecting 411648 events.
[11:34:40.816] <TB3> INFO: 411648 events read in total (8635ms).
[11:34:40.827] <TB3> INFO: Expecting 411648 events.
[11:34:50.032] <TB3> INFO: 411648 events read in total (8802ms).
[11:34:50.046] <TB3> INFO: Expecting 411648 events.
[11:34:59.439] <TB3> INFO: 411648 events read in total (8990ms).
[11:34:59.455] <TB3> INFO: Expecting 411648 events.
[11:35:08.853] <TB3> INFO: 411648 events read in total (8995ms).
[11:35:08.871] <TB3> INFO: Expecting 411648 events.
[11:35:18.313] <TB3> INFO: 411648 events read in total (9039ms).
[11:35:18.335] <TB3> INFO: Expecting 411648 events.
[11:35:27.736] <TB3> INFO: 411648 events read in total (8998ms).
[11:35:27.765] <TB3> INFO: Expecting 411648 events.
[11:35:37.060] <TB3> INFO: 411648 events read in total (8891ms).
[11:35:37.087] <TB3> INFO: Expecting 411648 events.
[11:35:46.464] <TB3> INFO: 411648 events read in total (8974ms).
[11:35:46.497] <TB3> INFO: Expecting 411648 events.
[11:35:55.856] <TB3> INFO: 411648 events read in total (8956ms).
[11:35:55.891] <TB3> INFO: Expecting 411648 events.
[11:36:05.228] <TB3> INFO: 411648 events read in total (8933ms).
[11:36:05.268] <TB3> INFO: Expecting 411648 events.
[11:36:14.515] <TB3> INFO: 411648 events read in total (8844ms).
[11:36:14.554] <TB3> INFO: Expecting 411648 events.
[11:36:23.900] <TB3> INFO: 411648 events read in total (8943ms).
[11:36:23.941] <TB3> INFO: Expecting 411648 events.
[11:36:33.450] <TB3> INFO: 411648 events read in total (9106ms).
[11:36:33.507] <TB3> INFO: Expecting 411648 events.
[11:36:42.988] <TB3> INFO: 411648 events read in total (9078ms).
[11:36:43.049] <TB3> INFO: Expecting 411648 events.
[11:36:52.334] <TB3> INFO: 411648 events read in total (8882ms).
[11:36:52.384] <TB3> INFO: Test took 150087ms.
[11:36:53.085] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[11:36:53.099] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:36:53.099] <TB3> INFO: run 1 of 1
[11:36:53.341] <TB3> INFO: Expecting 5025280 events.
[11:37:20.014] <TB3> INFO: 588992 events read in total (26081ms).
[11:37:46.010] <TB3> INFO: 1176136 events read in total (52077ms).
[11:38:12.162] <TB3> INFO: 1763904 events read in total (78229ms).
[11:38:38.437] <TB3> INFO: 2351080 events read in total (104504ms).
[11:39:04.638] <TB3> INFO: 2936384 events read in total (130706ms).
[11:39:30.838] <TB3> INFO: 3522224 events read in total (156905ms).
[11:39:57.016] <TB3> INFO: 4110128 events read in total (183083ms).
[11:40:22.767] <TB3> INFO: 4695032 events read in total (208834ms).
[11:40:37.626] <TB3> INFO: 5025280 events read in total (223693ms).
[11:40:37.753] <TB3> INFO: Test took 224655ms.
[11:41:01.414] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.740675 .. 147.879785
[11:41:01.652] <TB3> INFO: Expecting 208000 events.
[11:41:11.064] <TB3> INFO: 208000 events read in total (8820ms).
[11:41:11.066] <TB3> INFO: Test took 9650ms.
[11:41:11.117] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 157 (-1/-1) hits flags = 528 (plus default)
[11:41:11.129] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:41:11.129] <TB3> INFO: run 1 of 1
[11:41:11.407] <TB3> INFO: Expecting 5258240 events.
[11:41:37.112] <TB3> INFO: 585360 events read in total (25113ms).
[11:42:02.947] <TB3> INFO: 1170976 events read in total (50949ms).
[11:42:28.675] <TB3> INFO: 1756000 events read in total (76676ms).
[11:42:54.122] <TB3> INFO: 2340744 events read in total (102123ms).
[11:43:19.666] <TB3> INFO: 2925456 events read in total (127668ms).
[11:43:45.430] <TB3> INFO: 3509776 events read in total (153431ms).
[11:44:10.699] <TB3> INFO: 4094488 events read in total (178700ms).
[11:44:36.267] <TB3> INFO: 4677776 events read in total (204268ms).
[11:45:02.676] <TB3> INFO: 5258240 events read in total (230677ms).
[11:45:02.783] <TB3> INFO: Test took 231655ms.
[11:45:27.634] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 27.632990 .. 46.891714
[11:45:27.871] <TB3> INFO: Expecting 208000 events.
[11:45:37.722] <TB3> INFO: 208000 events read in total (9259ms).
[11:45:37.724] <TB3> INFO: Test took 10088ms.
[11:45:37.791] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 56 (-1/-1) hits flags = 528 (plus default)
[11:45:37.804] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:45:37.804] <TB3> INFO: run 1 of 1
[11:45:38.082] <TB3> INFO: Expecting 1331200 events.
[11:46:06.274] <TB3> INFO: 656936 events read in total (27600ms).
[11:46:34.189] <TB3> INFO: 1310952 events read in total (55515ms).
[11:46:35.535] <TB3> INFO: 1331200 events read in total (56862ms).
[11:46:35.569] <TB3> INFO: Test took 57766ms.
[11:46:47.750] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 27.662949 .. 47.840244
[11:46:47.993] <TB3> INFO: Expecting 208000 events.
[11:46:57.611] <TB3> INFO: 208000 events read in total (9024ms).
[11:46:57.612] <TB3> INFO: Test took 9861ms.
[11:46:57.661] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 17 .. 57 (-1/-1) hits flags = 528 (plus default)
[11:46:57.675] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:46:57.675] <TB3> INFO: run 1 of 1
[11:46:57.954] <TB3> INFO: Expecting 1364480 events.
[11:47:26.095] <TB3> INFO: 653208 events read in total (27549ms).
[11:47:54.439] <TB3> INFO: 1305584 events read in total (55894ms).
[11:47:57.387] <TB3> INFO: 1364480 events read in total (58841ms).
[11:47:57.417] <TB3> INFO: Test took 59743ms.
[11:48:10.191] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 27.081352 .. 47.928271
[11:48:10.431] <TB3> INFO: Expecting 208000 events.
[11:48:20.410] <TB3> INFO: 208000 events read in total (9388ms).
[11:48:20.411] <TB3> INFO: Test took 10219ms.
[11:48:20.462] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 17 .. 57 (-1/-1) hits flags = 528 (plus default)
[11:48:20.477] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:48:20.477] <TB3> INFO: run 1 of 1
[11:48:20.755] <TB3> INFO: Expecting 1364480 events.
[11:48:48.923] <TB3> INFO: 652880 events read in total (27576ms).
[11:49:16.381] <TB3> INFO: 1305584 events read in total (55034ms).
[11:49:19.224] <TB3> INFO: 1364480 events read in total (57877ms).
[11:49:19.254] <TB3> INFO: Test took 58778ms.
[11:49:31.587] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:49:31.587] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[11:49:31.602] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:49:31.602] <TB3> INFO: run 1 of 1
[11:49:31.853] <TB3> INFO: Expecting 1364480 events.
[11:50:00.373] <TB3> INFO: 668800 events read in total (27928ms).
[11:50:28.750] <TB3> INFO: 1336512 events read in total (56306ms).
[11:50:30.335] <TB3> INFO: 1364480 events read in total (57891ms).
[11:50:30.368] <TB3> INFO: Test took 58766ms.
[11:50:42.391] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C0.dat
[11:50:42.391] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C1.dat
[11:50:42.391] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C2.dat
[11:50:42.391] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C3.dat
[11:50:42.391] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C4.dat
[11:50:42.391] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C5.dat
[11:50:42.392] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C6.dat
[11:50:42.392] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C7.dat
[11:50:42.392] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C8.dat
[11:50:42.392] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C9.dat
[11:50:42.392] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C10.dat
[11:50:42.392] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C11.dat
[11:50:42.392] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C12.dat
[11:50:42.392] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C13.dat
[11:50:42.392] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C14.dat
[11:50:42.392] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C15.dat
[11:50:42.392] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C0.dat
[11:50:42.399] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C1.dat
[11:50:42.403] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C2.dat
[11:50:42.408] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C3.dat
[11:50:42.413] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C4.dat
[11:50:42.418] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C5.dat
[11:50:42.423] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C6.dat
[11:50:42.428] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C7.dat
[11:50:42.433] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C8.dat
[11:50:42.438] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C9.dat
[11:50:42.443] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C10.dat
[11:50:42.448] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C11.dat
[11:50:42.452] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C12.dat
[11:50:42.457] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C13.dat
[11:50:42.462] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C14.dat
[11:50:42.467] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C15.dat
[11:50:42.472] <TB3> INFO: PixTestTrim::trimTest() done
[11:50:42.472] <TB3> INFO: vtrim: 132 97 117 123 141 112 142 142 125 126 128 105 121 128 124 126
[11:50:42.472] <TB3> INFO: vthrcomp: 122 122 121 113 130 131 130 119 124 128 116 116 133 126 124 132
[11:50:42.472] <TB3> INFO: vcal mean: 35.02 34.98 34.97 34.98 35.62 34.99 35.13 35.36 35.23 34.94 34.92 35.11 34.98 34.96 34.95 35.28
[11:50:42.472] <TB3> INFO: vcal RMS: 1.15 1.08 1.04 1.04 1.80 1.10 1.33 1.70 1.49 1.08 1.14 1.25 1.17 1.11 1.14 1.40
[11:50:42.472] <TB3> INFO: bits mean: 9.70 8.37 9.38 8.74 9.45 9.46 9.64 9.75 9.53 9.60 9.17 9.40 9.04 9.84 9.39 9.91
[11:50:42.472] <TB3> INFO: bits RMS: 2.55 3.19 2.68 2.91 2.76 2.82 2.76 2.64 2.58 2.75 2.71 2.68 2.92 2.64 2.76 2.57
[11:50:42.480] <TB3> INFO: ----------------------------------------------------------------------
[11:50:42.480] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[11:50:42.480] <TB3> INFO: ----------------------------------------------------------------------
[11:50:42.482] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[11:50:42.497] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:50:42.497] <TB3> INFO: run 1 of 1
[11:50:42.734] <TB3> INFO: Expecting 4160000 events.
[11:51:16.142] <TB3> INFO: 774940 events read in total (32816ms).
[11:51:48.826] <TB3> INFO: 1542155 events read in total (65500ms).
[11:52:21.405] <TB3> INFO: 2300185 events read in total (98079ms).
[11:52:53.687] <TB3> INFO: 3054855 events read in total (130361ms).
[11:53:25.919] <TB3> INFO: 3806045 events read in total (162593ms).
[11:53:41.808] <TB3> INFO: 4160000 events read in total (178482ms).
[11:53:41.903] <TB3> INFO: Test took 179407ms.
[11:54:05.946] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 209 (-1/-1) hits flags = 528 (plus default)
[11:54:05.961] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:54:05.961] <TB3> INFO: run 1 of 1
[11:54:06.232] <TB3> INFO: Expecting 4368000 events.
[11:54:37.932] <TB3> INFO: 734580 events read in total (31109ms).
[11:55:10.058] <TB3> INFO: 1463625 events read in total (63235ms).
[11:55:41.845] <TB3> INFO: 2186800 events read in total (95022ms).
[11:56:13.480] <TB3> INFO: 2906335 events read in total (126657ms).
[11:56:45.072] <TB3> INFO: 3622980 events read in total (158249ms).
[11:57:16.029] <TB3> INFO: 4339410 events read in total (189206ms).
[11:57:17.676] <TB3> INFO: 4368000 events read in total (190853ms).
[11:57:17.762] <TB3> INFO: Test took 191801ms.
[11:57:46.046] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 208 (-1/-1) hits flags = 528 (plus default)
[11:57:46.060] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:57:46.060] <TB3> INFO: run 1 of 1
[11:57:46.337] <TB3> INFO: Expecting 4347200 events.
[11:58:18.279] <TB3> INFO: 736890 events read in total (31350ms).
[11:58:50.017] <TB3> INFO: 1468050 events read in total (63088ms).
[11:59:21.182] <TB3> INFO: 2192705 events read in total (94253ms).
[11:59:52.410] <TB3> INFO: 2913615 events read in total (125481ms).
[12:00:23.886] <TB3> INFO: 3631990 events read in total (156957ms).
[12:00:55.166] <TB3> INFO: 4347200 events read in total (188237ms).
[12:00:55.272] <TB3> INFO: Test took 189211ms.
[12:01:21.627] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[12:01:21.640] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:01:21.640] <TB3> INFO: run 1 of 1
[12:01:21.879] <TB3> INFO: Expecting 4264000 events.
[12:01:55.261] <TB3> INFO: 743050 events read in total (32790ms).
[12:02:27.761] <TB3> INFO: 1480070 events read in total (65290ms).
[12:02:59.977] <TB3> INFO: 2210440 events read in total (97506ms).
[12:03:31.688] <TB3> INFO: 2937140 events read in total (129217ms).
[12:04:03.139] <TB3> INFO: 3659820 events read in total (160668ms).
[12:04:29.574] <TB3> INFO: 4264000 events read in total (187103ms).
[12:04:29.735] <TB3> INFO: Test took 188094ms.
[12:04:55.675] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 205 (-1/-1) hits flags = 528 (plus default)
[12:04:55.688] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:04:55.688] <TB3> INFO: run 1 of 1
[12:04:55.938] <TB3> INFO: Expecting 4284800 events.
[12:05:28.174] <TB3> INFO: 740885 events read in total (31644ms).
[12:05:59.653] <TB3> INFO: 1476235 events read in total (63123ms).
[12:06:31.172] <TB3> INFO: 2205180 events read in total (94642ms).
[12:07:02.928] <TB3> INFO: 2930185 events read in total (126398ms).
[12:07:34.444] <TB3> INFO: 3651700 events read in total (157914ms).
[12:08:01.912] <TB3> INFO: 4284800 events read in total (185382ms).
[12:08:02.070] <TB3> INFO: Test took 186381ms.
[12:08:32.178] <TB3> INFO: PixTestTrim::trimBitTest() done
[12:08:32.179] <TB3> INFO: PixTestTrim::doTest() done, duration: 2500 seconds
[12:08:32.179] <TB3> INFO: Decoding statistics:
[12:08:32.179] <TB3> INFO: General information:
[12:08:32.179] <TB3> INFO: 16bit words read: 0
[12:08:32.179] <TB3> INFO: valid events total: 0
[12:08:32.179] <TB3> INFO: empty events: 0
[12:08:32.179] <TB3> INFO: valid events with pixels: 0
[12:08:32.179] <TB3> INFO: valid pixel hits: 0
[12:08:32.179] <TB3> INFO: Event errors: 0
[12:08:32.179] <TB3> INFO: start marker: 0
[12:08:32.179] <TB3> INFO: stop marker: 0
[12:08:32.179] <TB3> INFO: overflow: 0
[12:08:32.179] <TB3> INFO: invalid 5bit words: 0
[12:08:32.179] <TB3> INFO: invalid XOR eye diagram: 0
[12:08:32.179] <TB3> INFO: frame (failed synchr.): 0
[12:08:32.179] <TB3> INFO: idle data (no TBM trl): 0
[12:08:32.179] <TB3> INFO: no data (only TBM hdr): 0
[12:08:32.179] <TB3> INFO: TBM errors: 0
[12:08:32.179] <TB3> INFO: flawed TBM headers: 0
[12:08:32.179] <TB3> INFO: flawed TBM trailers: 0
[12:08:32.179] <TB3> INFO: event ID mismatches: 0
[12:08:32.179] <TB3> INFO: ROC errors: 0
[12:08:32.179] <TB3> INFO: missing ROC header(s): 0
[12:08:32.179] <TB3> INFO: misplaced readback start: 0
[12:08:32.179] <TB3> INFO: Pixel decoding errors: 0
[12:08:32.179] <TB3> INFO: pixel data incomplete: 0
[12:08:32.179] <TB3> INFO: pixel address: 0
[12:08:32.179] <TB3> INFO: pulse height fill bit: 0
[12:08:32.179] <TB3> INFO: buffer corruption: 0
[12:08:33.056] <TB3> INFO: ######################################################################
[12:08:33.056] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:08:33.056] <TB3> INFO: ######################################################################
[12:08:33.383] <TB3> INFO: Expecting 41600 events.
[12:08:36.848] <TB3> INFO: 41600 events read in total (2873ms).
[12:08:36.849] <TB3> INFO: Test took 3792ms.
[12:08:37.291] <TB3> INFO: Expecting 41600 events.
[12:08:40.777] <TB3> INFO: 41600 events read in total (2894ms).
[12:08:40.778] <TB3> INFO: Test took 3726ms.
[12:08:41.067] <TB3> INFO: Expecting 41600 events.
[12:08:44.575] <TB3> INFO: 41600 events read in total (2916ms).
[12:08:44.576] <TB3> INFO: Test took 3774ms.
[12:08:44.866] <TB3> INFO: Expecting 41600 events.
[12:08:48.418] <TB3> INFO: 41600 events read in total (2961ms).
[12:08:48.419] <TB3> INFO: Test took 3818ms.
[12:08:48.715] <TB3> INFO: Expecting 41600 events.
[12:08:52.287] <TB3> INFO: 41600 events read in total (2980ms).
[12:08:52.288] <TB3> INFO: Test took 3845ms.
[12:08:52.579] <TB3> INFO: Expecting 41600 events.
[12:08:56.132] <TB3> INFO: 41600 events read in total (2961ms).
[12:08:56.132] <TB3> INFO: Test took 3818ms.
[12:08:56.425] <TB3> INFO: Expecting 41600 events.
[12:09:00.088] <TB3> INFO: 41600 events read in total (3072ms).
[12:09:00.089] <TB3> INFO: Test took 3930ms.
[12:09:00.382] <TB3> INFO: Expecting 41600 events.
[12:09:03.980] <TB3> INFO: 41600 events read in total (3007ms).
[12:09:03.981] <TB3> INFO: Test took 3864ms.
[12:09:04.270] <TB3> INFO: Expecting 41600 events.
[12:09:07.971] <TB3> INFO: 41600 events read in total (3109ms).
[12:09:07.972] <TB3> INFO: Test took 3967ms.
[12:09:08.261] <TB3> INFO: Expecting 41600 events.
[12:09:11.840] <TB3> INFO: 41600 events read in total (2987ms).
[12:09:11.841] <TB3> INFO: Test took 3844ms.
[12:09:12.131] <TB3> INFO: Expecting 41600 events.
[12:09:15.761] <TB3> INFO: 41600 events read in total (3039ms).
[12:09:15.762] <TB3> INFO: Test took 3896ms.
[12:09:16.051] <TB3> INFO: Expecting 41600 events.
[12:09:19.725] <TB3> INFO: 41600 events read in total (3082ms).
[12:09:19.725] <TB3> INFO: Test took 3939ms.
[12:09:20.015] <TB3> INFO: Expecting 41600 events.
[12:09:23.651] <TB3> INFO: 41600 events read in total (3045ms).
[12:09:23.652] <TB3> INFO: Test took 3902ms.
[12:09:23.941] <TB3> INFO: Expecting 41600 events.
[12:09:27.565] <TB3> INFO: 41600 events read in total (3032ms).
[12:09:27.566] <TB3> INFO: Test took 3890ms.
[12:09:27.855] <TB3> INFO: Expecting 41600 events.
[12:09:31.413] <TB3> INFO: 41600 events read in total (2966ms).
[12:09:31.414] <TB3> INFO: Test took 3823ms.
[12:09:31.707] <TB3> INFO: Expecting 41600 events.
[12:09:35.252] <TB3> INFO: 41600 events read in total (2954ms).
[12:09:35.253] <TB3> INFO: Test took 3811ms.
[12:09:35.542] <TB3> INFO: Expecting 41600 events.
[12:09:39.067] <TB3> INFO: 41600 events read in total (2933ms).
[12:09:39.068] <TB3> INFO: Test took 3791ms.
[12:09:39.360] <TB3> INFO: Expecting 41600 events.
[12:09:42.886] <TB3> INFO: 41600 events read in total (2934ms).
[12:09:42.887] <TB3> INFO: Test took 3792ms.
[12:09:43.190] <TB3> INFO: Expecting 41600 events.
[12:09:46.698] <TB3> INFO: 41600 events read in total (2917ms).
[12:09:46.699] <TB3> INFO: Test took 3787ms.
[12:09:46.992] <TB3> INFO: Expecting 41600 events.
[12:09:50.588] <TB3> INFO: 41600 events read in total (3004ms).
[12:09:50.589] <TB3> INFO: Test took 3862ms.
[12:09:50.879] <TB3> INFO: Expecting 41600 events.
[12:09:54.441] <TB3> INFO: 41600 events read in total (2971ms).
[12:09:54.442] <TB3> INFO: Test took 3828ms.
[12:09:54.731] <TB3> INFO: Expecting 41600 events.
[12:09:58.339] <TB3> INFO: 41600 events read in total (3016ms).
[12:09:58.340] <TB3> INFO: Test took 3874ms.
[12:09:58.629] <TB3> INFO: Expecting 41600 events.
[12:10:02.172] <TB3> INFO: 41600 events read in total (2946ms).
[12:10:02.173] <TB3> INFO: Test took 3809ms.
[12:10:02.462] <TB3> INFO: Expecting 41600 events.
[12:10:05.997] <TB3> INFO: 41600 events read in total (2943ms).
[12:10:05.998] <TB3> INFO: Test took 3801ms.
[12:10:06.302] <TB3> INFO: Expecting 41600 events.
[12:10:09.853] <TB3> INFO: 41600 events read in total (2959ms).
[12:10:09.854] <TB3> INFO: Test took 3829ms.
[12:10:10.152] <TB3> INFO: Expecting 41600 events.
[12:10:13.701] <TB3> INFO: 41600 events read in total (2957ms).
[12:10:13.702] <TB3> INFO: Test took 3821ms.
[12:10:13.992] <TB3> INFO: Expecting 2560 events.
[12:10:14.877] <TB3> INFO: 2560 events read in total (293ms).
[12:10:14.877] <TB3> INFO: Test took 1161ms.
[12:10:15.186] <TB3> INFO: Expecting 2560 events.
[12:10:16.071] <TB3> INFO: 2560 events read in total (294ms).
[12:10:16.071] <TB3> INFO: Test took 1194ms.
[12:10:16.378] <TB3> INFO: Expecting 2560 events.
[12:10:17.275] <TB3> INFO: 2560 events read in total (305ms).
[12:10:17.275] <TB3> INFO: Test took 1203ms.
[12:10:17.582] <TB3> INFO: Expecting 2560 events.
[12:10:18.469] <TB3> INFO: 2560 events read in total (296ms).
[12:10:18.469] <TB3> INFO: Test took 1194ms.
[12:10:18.776] <TB3> INFO: Expecting 2560 events.
[12:10:19.663] <TB3> INFO: 2560 events read in total (295ms).
[12:10:19.663] <TB3> INFO: Test took 1193ms.
[12:10:19.972] <TB3> INFO: Expecting 2560 events.
[12:10:20.853] <TB3> INFO: 2560 events read in total (290ms).
[12:10:20.854] <TB3> INFO: Test took 1190ms.
[12:10:21.161] <TB3> INFO: Expecting 2560 events.
[12:10:22.046] <TB3> INFO: 2560 events read in total (293ms).
[12:10:22.046] <TB3> INFO: Test took 1191ms.
[12:10:22.355] <TB3> INFO: Expecting 2560 events.
[12:10:23.235] <TB3> INFO: 2560 events read in total (289ms).
[12:10:23.236] <TB3> INFO: Test took 1190ms.
[12:10:23.544] <TB3> INFO: Expecting 2560 events.
[12:10:24.432] <TB3> INFO: 2560 events read in total (297ms).
[12:10:24.432] <TB3> INFO: Test took 1196ms.
[12:10:24.741] <TB3> INFO: Expecting 2560 events.
[12:10:25.621] <TB3> INFO: 2560 events read in total (289ms).
[12:10:25.621] <TB3> INFO: Test took 1189ms.
[12:10:25.928] <TB3> INFO: Expecting 2560 events.
[12:10:26.811] <TB3> INFO: 2560 events read in total (291ms).
[12:10:26.812] <TB3> INFO: Test took 1190ms.
[12:10:27.119] <TB3> INFO: Expecting 2560 events.
[12:10:27.005] <TB3> INFO: 2560 events read in total (295ms).
[12:10:27.005] <TB3> INFO: Test took 1192ms.
[12:10:28.312] <TB3> INFO: Expecting 2560 events.
[12:10:29.202] <TB3> INFO: 2560 events read in total (298ms).
[12:10:29.202] <TB3> INFO: Test took 1196ms.
[12:10:29.509] <TB3> INFO: Expecting 2560 events.
[12:10:30.399] <TB3> INFO: 2560 events read in total (298ms).
[12:10:30.400] <TB3> INFO: Test took 1197ms.
[12:10:30.707] <TB3> INFO: Expecting 2560 events.
[12:10:31.592] <TB3> INFO: 2560 events read in total (293ms).
[12:10:31.592] <TB3> INFO: Test took 1191ms.
[12:10:31.900] <TB3> INFO: Expecting 2560 events.
[12:10:32.799] <TB3> INFO: 2560 events read in total (307ms).
[12:10:32.799] <TB3> INFO: Test took 1206ms.
[12:10:32.805] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:10:33.107] <TB3> INFO: Expecting 655360 events.
[12:10:48.222] <TB3> INFO: 655360 events read in total (14523ms).
[12:10:48.238] <TB3> INFO: Expecting 655360 events.
[12:11:02.782] <TB3> INFO: 655360 events read in total (14141ms).
[12:11:02.805] <TB3> INFO: Expecting 655360 events.
[12:11:17.374] <TB3> INFO: 655360 events read in total (14166ms).
[12:11:17.401] <TB3> INFO: Expecting 655360 events.
[12:11:31.005] <TB3> INFO: 655360 events read in total (14201ms).
[12:11:32.038] <TB3> INFO: Expecting 655360 events.
[12:11:46.700] <TB3> INFO: 655360 events read in total (14259ms).
[12:11:46.734] <TB3> INFO: Expecting 655360 events.
[12:12:01.441] <TB3> INFO: 655360 events read in total (14304ms).
[12:12:01.489] <TB3> INFO: Expecting 655360 events.
[12:12:16.057] <TB3> INFO: 655360 events read in total (14165ms).
[12:12:16.166] <TB3> INFO: Expecting 655360 events.
[12:12:30.948] <TB3> INFO: 655360 events read in total (14379ms).
[12:12:30.002] <TB3> INFO: Expecting 655360 events.
[12:12:45.616] <TB3> INFO: 655360 events read in total (14211ms).
[12:12:45.676] <TB3> INFO: Expecting 655360 events.
[12:13:00.300] <TB3> INFO: 655360 events read in total (14221ms).
[12:13:00.437] <TB3> INFO: Expecting 655360 events.
[12:13:14.998] <TB3> INFO: 655360 events read in total (14158ms).
[12:13:15.106] <TB3> INFO: Expecting 655360 events.
[12:13:29.582] <TB3> INFO: 655360 events read in total (14072ms).
[12:13:29.709] <TB3> INFO: Expecting 655360 events.
[12:13:44.257] <TB3> INFO: 655360 events read in total (14145ms).
[12:13:44.402] <TB3> INFO: Expecting 655360 events.
[12:13:59.010] <TB3> INFO: 655360 events read in total (14205ms).
[12:13:59.099] <TB3> INFO: Expecting 655360 events.
[12:14:13.663] <TB3> INFO: 655360 events read in total (14161ms).
[12:14:13.756] <TB3> INFO: Expecting 655360 events.
[12:14:28.470] <TB3> INFO: 655360 events read in total (14311ms).
[12:14:28.568] <TB3> INFO: Test took 235764ms.
[12:14:28.662] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:28.920] <TB3> INFO: Expecting 655360 events.
[12:14:43.625] <TB3> INFO: 655360 events read in total (14113ms).
[12:14:43.640] <TB3> INFO: Expecting 655360 events.
[12:14:58.169] <TB3> INFO: 655360 events read in total (14126ms).
[12:14:58.189] <TB3> INFO: Expecting 655360 events.
[12:15:12.909] <TB3> INFO: 655360 events read in total (14317ms).
[12:15:12.933] <TB3> INFO: Expecting 655360 events.
[12:15:27.698] <TB3> INFO: 655360 events read in total (14361ms).
[12:15:27.727] <TB3> INFO: Expecting 655360 events.
[12:15:42.340] <TB3> INFO: 655360 events read in total (14210ms).
[12:15:42.381] <TB3> INFO: Expecting 655360 events.
[12:15:56.911] <TB3> INFO: 655360 events read in total (14126ms).
[12:15:56.959] <TB3> INFO: Expecting 655360 events.
[12:16:11.575] <TB3> INFO: 655360 events read in total (14212ms).
[12:16:11.619] <TB3> INFO: Expecting 655360 events.
[12:16:26.203] <TB3> INFO: 655360 events read in total (14181ms).
[12:16:26.257] <TB3> INFO: Expecting 655360 events.
[12:16:40.698] <TB3> INFO: 655360 events read in total (14038ms).
[12:16:40.759] <TB3> INFO: Expecting 655360 events.
[12:16:55.354] <TB3> INFO: 655360 events read in total (14192ms).
[12:16:55.425] <TB3> INFO: Expecting 655360 events.
[12:17:09.764] <TB3> INFO: 655360 events read in total (13936ms).
[12:17:09.834] <TB3> INFO: Expecting 655360 events.
[12:17:24.344] <TB3> INFO: 655360 events read in total (14107ms).
[12:17:24.423] <TB3> INFO: Expecting 655360 events.
[12:17:39.196] <TB3> INFO: 655360 events read in total (14370ms).
[12:17:39.317] <TB3> INFO: Expecting 655360 events.
[12:17:54.215] <TB3> INFO: 655360 events read in total (14495ms).
[12:17:54.307] <TB3> INFO: Expecting 655360 events.
[12:18:08.969] <TB3> INFO: 655360 events read in total (14259ms).
[12:18:09.061] <TB3> INFO: Expecting 655360 events.
[12:18:23.830] <TB3> INFO: 655360 events read in total (14366ms).
[12:18:23.931] <TB3> INFO: Test took 235269ms.
[12:18:24.159] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:24.167] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:24.175] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:24.183] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:18:24.191] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:24.199] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:24.207] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:24.215] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:24.223] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:18:24.230] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:24.238] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:24.246] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:18:24.254] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:18:24.262] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:24.270] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:24.278] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:18:24.286] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:18:24.293] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[12:18:24.298] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[12:18:24.304] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[12:18:24.310] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:24.317] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:24.324] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:24.332] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:18:24.341] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:18:24.350] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:24.358] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:18:24.366] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:18:24.374] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[12:18:24.383] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[12:18:24.391] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:24.400] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:18:24.408] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:18:24.417] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[12:18:24.452] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C0.dat
[12:18:24.453] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C1.dat
[12:18:24.453] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C2.dat
[12:18:24.453] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C3.dat
[12:18:24.453] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C4.dat
[12:18:24.453] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C5.dat
[12:18:24.453] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C6.dat
[12:18:24.453] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C7.dat
[12:18:24.453] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C8.dat
[12:18:24.453] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C9.dat
[12:18:24.453] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C10.dat
[12:18:24.453] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C11.dat
[12:18:24.454] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C12.dat
[12:18:24.454] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C13.dat
[12:18:24.454] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C14.dat
[12:18:24.454] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C15.dat
[12:18:24.711] <TB3> INFO: Expecting 41600 events.
[12:18:27.860] <TB3> INFO: 41600 events read in total (2557ms).
[12:18:27.861] <TB3> INFO: Test took 3404ms.
[12:18:28.319] <TB3> INFO: Expecting 41600 events.
[12:18:31.399] <TB3> INFO: 41600 events read in total (2488ms).
[12:18:31.400] <TB3> INFO: Test took 3324ms.
[12:18:31.849] <TB3> INFO: Expecting 41600 events.
[12:18:34.999] <TB3> INFO: 41600 events read in total (2558ms).
[12:18:34.000] <TB3> INFO: Test took 3387ms.
[12:18:35.224] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:35.314] <TB3> INFO: Expecting 2560 events.
[12:18:36.207] <TB3> INFO: 2560 events read in total (301ms).
[12:18:36.207] <TB3> INFO: Test took 983ms.
[12:18:36.212] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:36.515] <TB3> INFO: Expecting 2560 events.
[12:18:37.402] <TB3> INFO: 2560 events read in total (295ms).
[12:18:37.402] <TB3> INFO: Test took 1191ms.
[12:18:37.405] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:37.711] <TB3> INFO: Expecting 2560 events.
[12:18:38.598] <TB3> INFO: 2560 events read in total (295ms).
[12:18:38.599] <TB3> INFO: Test took 1194ms.
[12:18:38.601] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:38.906] <TB3> INFO: Expecting 2560 events.
[12:18:39.799] <TB3> INFO: 2560 events read in total (301ms).
[12:18:39.799] <TB3> INFO: Test took 1198ms.
[12:18:39.804] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:40.107] <TB3> INFO: Expecting 2560 events.
[12:18:40.996] <TB3> INFO: 2560 events read in total (297ms).
[12:18:40.996] <TB3> INFO: Test took 1193ms.
[12:18:40.998] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:41.305] <TB3> INFO: Expecting 2560 events.
[12:18:42.199] <TB3> INFO: 2560 events read in total (302ms).
[12:18:42.199] <TB3> INFO: Test took 1201ms.
[12:18:42.203] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:42.507] <TB3> INFO: Expecting 2560 events.
[12:18:43.397] <TB3> INFO: 2560 events read in total (298ms).
[12:18:43.397] <TB3> INFO: Test took 1194ms.
[12:18:43.399] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:43.705] <TB3> INFO: Expecting 2560 events.
[12:18:44.599] <TB3> INFO: 2560 events read in total (302ms).
[12:18:44.599] <TB3> INFO: Test took 1200ms.
[12:18:44.603] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:44.906] <TB3> INFO: Expecting 2560 events.
[12:18:45.795] <TB3> INFO: 2560 events read in total (297ms).
[12:18:45.795] <TB3> INFO: Test took 1192ms.
[12:18:45.799] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:46.103] <TB3> INFO: Expecting 2560 events.
[12:18:46.990] <TB3> INFO: 2560 events read in total (295ms).
[12:18:46.991] <TB3> INFO: Test took 1192ms.
[12:18:46.994] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:47.297] <TB3> INFO: Expecting 2560 events.
[12:18:48.181] <TB3> INFO: 2560 events read in total (292ms).
[12:18:48.181] <TB3> INFO: Test took 1187ms.
[12:18:48.184] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:48.489] <TB3> INFO: Expecting 2560 events.
[12:18:49.378] <TB3> INFO: 2560 events read in total (297ms).
[12:18:49.378] <TB3> INFO: Test took 1194ms.
[12:18:49.382] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:49.686] <TB3> INFO: Expecting 2560 events.
[12:18:50.567] <TB3> INFO: 2560 events read in total (289ms).
[12:18:50.567] <TB3> INFO: Test took 1185ms.
[12:18:50.571] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:50.875] <TB3> INFO: Expecting 2560 events.
[12:18:51.755] <TB3> INFO: 2560 events read in total (288ms).
[12:18:51.756] <TB3> INFO: Test took 1185ms.
[12:18:51.759] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:52.064] <TB3> INFO: Expecting 2560 events.
[12:18:52.952] <TB3> INFO: 2560 events read in total (296ms).
[12:18:52.953] <TB3> INFO: Test took 1194ms.
[12:18:52.958] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:53.261] <TB3> INFO: Expecting 2560 events.
[12:18:54.147] <TB3> INFO: 2560 events read in total (294ms).
[12:18:54.147] <TB3> INFO: Test took 1190ms.
[12:18:54.149] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:54.456] <TB3> INFO: Expecting 2560 events.
[12:18:55.346] <TB3> INFO: 2560 events read in total (298ms).
[12:18:55.347] <TB3> INFO: Test took 1198ms.
[12:18:55.350] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:55.655] <TB3> INFO: Expecting 2560 events.
[12:18:56.548] <TB3> INFO: 2560 events read in total (301ms).
[12:18:56.548] <TB3> INFO: Test took 1198ms.
[12:18:56.551] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:56.856] <TB3> INFO: Expecting 2560 events.
[12:18:57.742] <TB3> INFO: 2560 events read in total (294ms).
[12:18:57.743] <TB3> INFO: Test took 1192ms.
[12:18:57.746] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:58.051] <TB3> INFO: Expecting 2560 events.
[12:18:58.936] <TB3> INFO: 2560 events read in total (293ms).
[12:18:58.936] <TB3> INFO: Test took 1190ms.
[12:18:58.939] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:59.245] <TB3> INFO: Expecting 2560 events.
[12:19:00.134] <TB3> INFO: 2560 events read in total (297ms).
[12:19:00.135] <TB3> INFO: Test took 1196ms.
[12:19:00.139] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:00.443] <TB3> INFO: Expecting 2560 events.
[12:19:01.337] <TB3> INFO: 2560 events read in total (301ms).
[12:19:01.338] <TB3> INFO: Test took 1199ms.
[12:19:01.341] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:01.645] <TB3> INFO: Expecting 2560 events.
[12:19:02.534] <TB3> INFO: 2560 events read in total (297ms).
[12:19:02.535] <TB3> INFO: Test took 1194ms.
[12:19:02.537] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:02.844] <TB3> INFO: Expecting 2560 events.
[12:19:03.734] <TB3> INFO: 2560 events read in total (299ms).
[12:19:03.734] <TB3> INFO: Test took 1197ms.
[12:19:03.739] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:04.042] <TB3> INFO: Expecting 2560 events.
[12:19:04.938] <TB3> INFO: 2560 events read in total (304ms).
[12:19:04.939] <TB3> INFO: Test took 1200ms.
[12:19:04.942] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:05.247] <TB3> INFO: Expecting 2560 events.
[12:19:06.139] <TB3> INFO: 2560 events read in total (301ms).
[12:19:06.140] <TB3> INFO: Test took 1198ms.
[12:19:06.143] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:06.448] <TB3> INFO: Expecting 2560 events.
[12:19:07.347] <TB3> INFO: 2560 events read in total (306ms).
[12:19:07.347] <TB3> INFO: Test took 1204ms.
[12:19:07.350] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:07.654] <TB3> INFO: Expecting 2560 events.
[12:19:08.549] <TB3> INFO: 2560 events read in total (303ms).
[12:19:08.550] <TB3> INFO: Test took 1200ms.
[12:19:08.555] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:08.858] <TB3> INFO: Expecting 2560 events.
[12:19:09.749] <TB3> INFO: 2560 events read in total (299ms).
[12:19:09.750] <TB3> INFO: Test took 1195ms.
[12:19:09.753] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:10.058] <TB3> INFO: Expecting 2560 events.
[12:19:10.950] <TB3> INFO: 2560 events read in total (301ms).
[12:19:10.950] <TB3> INFO: Test took 1197ms.
[12:19:10.953] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:11.259] <TB3> INFO: Expecting 2560 events.
[12:19:12.144] <TB3> INFO: 2560 events read in total (293ms).
[12:19:12.145] <TB3> INFO: Test took 1193ms.
[12:19:12.148] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:12.453] <TB3> INFO: Expecting 2560 events.
[12:19:13.346] <TB3> INFO: 2560 events read in total (301ms).
[12:19:13.347] <TB3> INFO: Test took 1199ms.
[12:19:13.834] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 640 seconds
[12:19:13.834] <TB3> INFO: PH scale (per ROC): 47 41 43 44 29 36 33 47 47 45 43 33 30 52 41 41
[12:19:13.834] <TB3> INFO: PH offset (per ROC): 118 110 106 122 101 107 96 135 126 97 100 113 84 130 97 112
[12:19:13.845] <TB3> INFO: Decoding statistics:
[12:19:13.845] <TB3> INFO: General information:
[12:19:13.845] <TB3> INFO: 16bit words read: 127876
[12:19:13.845] <TB3> INFO: valid events total: 20480
[12:19:13.845] <TB3> INFO: empty events: 17982
[12:19:13.845] <TB3> INFO: valid events with pixels: 2498
[12:19:13.845] <TB3> INFO: valid pixel hits: 2498
[12:19:13.845] <TB3> INFO: Event errors: 0
[12:19:13.845] <TB3> INFO: start marker: 0
[12:19:13.845] <TB3> INFO: stop marker: 0
[12:19:13.845] <TB3> INFO: overflow: 0
[12:19:13.845] <TB3> INFO: invalid 5bit words: 0
[12:19:13.845] <TB3> INFO: invalid XOR eye diagram: 0
[12:19:13.845] <TB3> INFO: frame (failed synchr.): 0
[12:19:13.845] <TB3> INFO: idle data (no TBM trl): 0
[12:19:13.845] <TB3> INFO: no data (only TBM hdr): 0
[12:19:13.845] <TB3> INFO: TBM errors: 0
[12:19:13.845] <TB3> INFO: flawed TBM headers: 0
[12:19:13.845] <TB3> INFO: flawed TBM trailers: 0
[12:19:13.845] <TB3> INFO: event ID mismatches: 0
[12:19:13.845] <TB3> INFO: ROC errors: 0
[12:19:13.845] <TB3> INFO: missing ROC header(s): 0
[12:19:13.845] <TB3> INFO: misplaced readback start: 0
[12:19:13.845] <TB3> INFO: Pixel decoding errors: 0
[12:19:13.845] <TB3> INFO: pixel data incomplete: 0
[12:19:13.845] <TB3> INFO: pixel address: 0
[12:19:13.845] <TB3> INFO: pulse height fill bit: 0
[12:19:13.845] <TB3> INFO: buffer corruption: 0
[12:19:14.013] <TB3> INFO: ######################################################################
[12:19:14.013] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[12:19:14.013] <TB3> INFO: ######################################################################
[12:19:14.028] <TB3> INFO: scanning low vcal = 10
[12:19:14.263] <TB3> INFO: Expecting 41600 events.
[12:19:17.918] <TB3> INFO: 41600 events read in total (3063ms).
[12:19:17.918] <TB3> INFO: Test took 3890ms.
[12:19:17.920] <TB3> INFO: scanning low vcal = 20
[12:19:18.214] <TB3> INFO: Expecting 41600 events.
[12:19:21.820] <TB3> INFO: 41600 events read in total (3014ms).
[12:19:21.821] <TB3> INFO: Test took 3901ms.
[12:19:21.823] <TB3> INFO: scanning low vcal = 30
[12:19:22.115] <TB3> INFO: Expecting 41600 events.
[12:19:25.774] <TB3> INFO: 41600 events read in total (3068ms).
[12:19:25.776] <TB3> INFO: Test took 3953ms.
[12:19:25.778] <TB3> INFO: scanning low vcal = 40
[12:19:26.056] <TB3> INFO: Expecting 41600 events.
[12:19:30.010] <TB3> INFO: 41600 events read in total (3362ms).
[12:19:30.011] <TB3> INFO: Test took 4233ms.
[12:19:30.014] <TB3> INFO: scanning low vcal = 50
[12:19:30.291] <TB3> INFO: Expecting 41600 events.
[12:19:34.285] <TB3> INFO: 41600 events read in total (3402ms).
[12:19:34.286] <TB3> INFO: Test took 4272ms.
[12:19:34.289] <TB3> INFO: scanning low vcal = 60
[12:19:34.567] <TB3> INFO: Expecting 41600 events.
[12:19:38.591] <TB3> INFO: 41600 events read in total (3433ms).
[12:19:38.591] <TB3> INFO: Test took 4302ms.
[12:19:38.594] <TB3> INFO: scanning low vcal = 70
[12:19:38.872] <TB3> INFO: Expecting 41600 events.
[12:19:42.933] <TB3> INFO: 41600 events read in total (3469ms).
[12:19:42.934] <TB3> INFO: Test took 4339ms.
[12:19:42.937] <TB3> INFO: scanning low vcal = 80
[12:19:43.215] <TB3> INFO: Expecting 41600 events.
[12:19:47.229] <TB3> INFO: 41600 events read in total (3422ms).
[12:19:47.230] <TB3> INFO: Test took 4293ms.
[12:19:47.233] <TB3> INFO: scanning low vcal = 90
[12:19:47.511] <TB3> INFO: Expecting 41600 events.
[12:19:51.532] <TB3> INFO: 41600 events read in total (3430ms).
[12:19:51.533] <TB3> INFO: Test took 4300ms.
[12:19:51.537] <TB3> INFO: scanning low vcal = 100
[12:19:51.813] <TB3> INFO: Expecting 41600 events.
[12:19:55.815] <TB3> INFO: 41600 events read in total (3410ms).
[12:19:55.816] <TB3> INFO: Test took 4279ms.
[12:19:55.820] <TB3> INFO: scanning low vcal = 110
[12:19:56.096] <TB3> INFO: Expecting 41600 events.
[12:20:00.105] <TB3> INFO: 41600 events read in total (3417ms).
[12:20:00.106] <TB3> INFO: Test took 4286ms.
[12:20:00.110] <TB3> INFO: scanning low vcal = 120
[12:20:00.387] <TB3> INFO: Expecting 41600 events.
[12:20:04.407] <TB3> INFO: 41600 events read in total (3428ms).
[12:20:04.408] <TB3> INFO: Test took 4298ms.
[12:20:04.411] <TB3> INFO: scanning low vcal = 130
[12:20:04.688] <TB3> INFO: Expecting 41600 events.
[12:20:08.729] <TB3> INFO: 41600 events read in total (3449ms).
[12:20:08.730] <TB3> INFO: Test took 4319ms.
[12:20:08.733] <TB3> INFO: scanning low vcal = 140
[12:20:09.018] <TB3> INFO: Expecting 41600 events.
[12:20:13.076] <TB3> INFO: 41600 events read in total (3467ms).
[12:20:13.076] <TB3> INFO: Test took 4343ms.
[12:20:13.079] <TB3> INFO: scanning low vcal = 150
[12:20:13.357] <TB3> INFO: Expecting 41600 events.
[12:20:17.301] <TB3> INFO: 41600 events read in total (3353ms).
[12:20:17.302] <TB3> INFO: Test took 4223ms.
[12:20:17.306] <TB3> INFO: scanning low vcal = 160
[12:20:17.582] <TB3> INFO: Expecting 41600 events.
[12:20:21.525] <TB3> INFO: 41600 events read in total (3352ms).
[12:20:21.526] <TB3> INFO: Test took 4220ms.
[12:20:21.529] <TB3> INFO: scanning low vcal = 170
[12:20:21.806] <TB3> INFO: Expecting 41600 events.
[12:20:25.791] <TB3> INFO: 41600 events read in total (3394ms).
[12:20:25.792] <TB3> INFO: Test took 4263ms.
[12:20:25.799] <TB3> INFO: scanning low vcal = 180
[12:20:26.076] <TB3> INFO: Expecting 41600 events.
[12:20:30.035] <TB3> INFO: 41600 events read in total (3367ms).
[12:20:30.036] <TB3> INFO: Test took 4237ms.
[12:20:30.039] <TB3> INFO: scanning low vcal = 190
[12:20:30.316] <TB3> INFO: Expecting 41600 events.
[12:20:34.273] <TB3> INFO: 41600 events read in total (3366ms).
[12:20:34.273] <TB3> INFO: Test took 4234ms.
[12:20:34.277] <TB3> INFO: scanning low vcal = 200
[12:20:34.553] <TB3> INFO: Expecting 41600 events.
[12:20:38.507] <TB3> INFO: 41600 events read in total (3362ms).
[12:20:38.508] <TB3> INFO: Test took 4231ms.
[12:20:38.512] <TB3> INFO: scanning low vcal = 210
[12:20:38.788] <TB3> INFO: Expecting 41600 events.
[12:20:42.753] <TB3> INFO: 41600 events read in total (3373ms).
[12:20:42.754] <TB3> INFO: Test took 4242ms.
[12:20:42.757] <TB3> INFO: scanning low vcal = 220
[12:20:43.033] <TB3> INFO: Expecting 41600 events.
[12:20:46.984] <TB3> INFO: 41600 events read in total (3359ms).
[12:20:46.985] <TB3> INFO: Test took 4228ms.
[12:20:46.988] <TB3> INFO: scanning low vcal = 230
[12:20:47.265] <TB3> INFO: Expecting 41600 events.
[12:20:51.264] <TB3> INFO: 41600 events read in total (3408ms).
[12:20:51.265] <TB3> INFO: Test took 4277ms.
[12:20:51.268] <TB3> INFO: scanning low vcal = 240
[12:20:51.545] <TB3> INFO: Expecting 41600 events.
[12:20:55.548] <TB3> INFO: 41600 events read in total (3411ms).
[12:20:55.549] <TB3> INFO: Test took 4281ms.
[12:20:55.552] <TB3> INFO: scanning low vcal = 250
[12:20:55.829] <TB3> INFO: Expecting 41600 events.
[12:20:59.880] <TB3> INFO: 41600 events read in total (3460ms).
[12:20:59.881] <TB3> INFO: Test took 4329ms.
[12:20:59.885] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[12:21:00.161] <TB3> INFO: Expecting 41600 events.
[12:21:04.201] <TB3> INFO: 41600 events read in total (3448ms).
[12:21:04.202] <TB3> INFO: Test took 4317ms.
[12:21:04.205] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[12:21:04.481] <TB3> INFO: Expecting 41600 events.
[12:21:08.511] <TB3> INFO: 41600 events read in total (3438ms).
[12:21:08.512] <TB3> INFO: Test took 4307ms.
[12:21:08.515] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[12:21:08.792] <TB3> INFO: Expecting 41600 events.
[12:21:12.782] <TB3> INFO: 41600 events read in total (3398ms).
[12:21:12.782] <TB3> INFO: Test took 4267ms.
[12:21:12.786] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[12:21:13.062] <TB3> INFO: Expecting 41600 events.
[12:21:17.082] <TB3> INFO: 41600 events read in total (3428ms).
[12:21:17.083] <TB3> INFO: Test took 4297ms.
[12:21:17.086] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:21:17.362] <TB3> INFO: Expecting 41600 events.
[12:21:21.364] <TB3> INFO: 41600 events read in total (3410ms).
[12:21:21.365] <TB3> INFO: Test took 4279ms.
[12:21:21.764] <TB3> INFO: PixTestGainPedestal::measure() done
[12:21:54.601] <TB3> INFO: PixTestGainPedestal::fit() done
[12:21:54.601] <TB3> INFO: non-linearity mean: 0.979 0.925 0.946 0.974 1.003 0.940 0.937 0.977 0.982 0.943 0.930 0.956 1.047 0.978 0.959 0.942
[12:21:54.601] <TB3> INFO: non-linearity RMS: 0.005 0.138 0.044 0.006 0.191 0.052 0.166 0.006 0.004 0.046 0.080 0.163 0.122 0.006 0.034 0.066
[12:21:54.601] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C0.dat
[12:21:54.621] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C1.dat
[12:21:54.642] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C2.dat
[12:21:54.662] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C3.dat
[12:21:54.678] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C4.dat
[12:21:54.691] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C5.dat
[12:21:54.704] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C6.dat
[12:21:54.717] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C7.dat
[12:21:54.731] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C8.dat
[12:21:54.744] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C9.dat
[12:21:54.759] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C10.dat
[12:21:54.780] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C11.dat
[12:21:54.800] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C12.dat
[12:21:54.821] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C13.dat
[12:21:54.841] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C14.dat
[12:21:54.861] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1067_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C15.dat
[12:21:54.881] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 160 seconds
[12:21:54.881] <TB3> INFO: Decoding statistics:
[12:21:54.881] <TB3> INFO: General information:
[12:21:54.881] <TB3> INFO: 16bit words read: 3310466
[12:21:54.881] <TB3> INFO: valid events total: 332800
[12:21:54.881] <TB3> INFO: empty events: 256
[12:21:54.881] <TB3> INFO: valid events with pixels: 332544
[12:21:54.881] <TB3> INFO: valid pixel hits: 656833
[12:21:54.881] <TB3> INFO: Event errors: 0
[12:21:54.881] <TB3> INFO: start marker: 0
[12:21:54.881] <TB3> INFO: stop marker: 0
[12:21:54.881] <TB3> INFO: overflow: 0
[12:21:54.881] <TB3> INFO: invalid 5bit words: 0
[12:21:54.881] <TB3> INFO: invalid XOR eye diagram: 0
[12:21:54.881] <TB3> INFO: frame (failed synchr.): 0
[12:21:54.881] <TB3> INFO: idle data (no TBM trl): 0
[12:21:54.881] <TB3> INFO: no data (only TBM hdr): 0
[12:21:54.881] <TB3> INFO: TBM errors: 0
[12:21:54.881] <TB3> INFO: flawed TBM headers: 0
[12:21:54.881] <TB3> INFO: flawed TBM trailers: 0
[12:21:54.881] <TB3> INFO: event ID mismatches: 0
[12:21:54.882] <TB3> INFO: ROC errors: 0
[12:21:54.882] <TB3> INFO: missing ROC header(s): 0
[12:21:54.882] <TB3> INFO: misplaced readback start: 0
[12:21:54.882] <TB3> INFO: Pixel decoding errors: 0
[12:21:54.882] <TB3> INFO: pixel data incomplete: 0
[12:21:54.882] <TB3> INFO: pixel address: 0
[12:21:54.882] <TB3> INFO: pulse height fill bit: 0
[12:21:54.882] <TB3> INFO: buffer corruption: 0
[12:21:54.903] <TB3> INFO: Decoding statistics:
[12:21:54.903] <TB3> INFO: General information:
[12:21:54.903] <TB3> INFO: 16bit words read: 3439878
[12:21:54.903] <TB3> INFO: valid events total: 353536
[12:21:54.903] <TB3> INFO: empty events: 18494
[12:21:54.904] <TB3> INFO: valid events with pixels: 335042
[12:21:54.904] <TB3> INFO: valid pixel hits: 659331
[12:21:54.904] <TB3> INFO: Event errors: 0
[12:21:54.904] <TB3> INFO: start marker: 0
[12:21:54.904] <TB3> INFO: stop marker: 0
[12:21:54.904] <TB3> INFO: overflow: 0
[12:21:54.904] <TB3> INFO: invalid 5bit words: 0
[12:21:54.904] <TB3> INFO: invalid XOR eye diagram: 0
[12:21:54.904] <TB3> INFO: frame (failed synchr.): 0
[12:21:54.904] <TB3> INFO: idle data (no TBM trl): 0
[12:21:54.904] <TB3> INFO: no data (only TBM hdr): 0
[12:21:54.904] <TB3> INFO: TBM errors: 0
[12:21:54.904] <TB3> INFO: flawed TBM headers: 0
[12:21:54.904] <TB3> INFO: flawed TBM trailers: 0
[12:21:54.904] <TB3> INFO: event ID mismatches: 0
[12:21:54.904] <TB3> INFO: ROC errors: 0
[12:21:54.904] <TB3> INFO: missing ROC header(s): 0
[12:21:54.904] <TB3> INFO: misplaced readback start: 0
[12:21:54.904] <TB3> INFO: Pixel decoding errors: 0
[12:21:54.904] <TB3> INFO: pixel data incomplete: 0
[12:21:54.904] <TB3> INFO: pixel address: 0
[12:21:54.904] <TB3> INFO: pulse height fill bit: 0
[12:21:54.904] <TB3> INFO: buffer corruption: 0
[12:21:54.904] <TB3> INFO: enter test to run
[12:21:54.904] <TB3> INFO: test: exit no parameter change
[12:21:55.043] <TB3> QUIET: Connection to board 126 closed.
[12:21:55.044] <TB3> INFO: pXar: this is the end, my friend