[10:57:45.749] <TB1> INFO: *** Welcome to pxar ***
[10:57:45.749] <TB1> INFO: *** Today: 2016/10/25
[10:57:45.756] <TB1> INFO: *** Version: c8ba-dirty
[10:57:45.756] <TB1> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C15.dat
[10:57:45.757] <TB1> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//tbmParameters_C1b.dat
[10:57:45.757] <TB1> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//defaultMaskFile.dat
[10:57:45.757] <TB1> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters_C15.dat
[10:57:45.819] <TB1> INFO: clk: 4
[10:57:45.819] <TB1> INFO: ctr: 4
[10:57:45.819] <TB1> INFO: sda: 19
[10:57:45.819] <TB1> INFO: tin: 9
[10:57:45.819] <TB1> INFO: level: 15
[10:57:45.819] <TB1> INFO: triggerdelay: 0
[10:57:45.819] <TB1> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[10:57:45.820] <TB1> INFO: Log level: INFO
[10:57:45.828] <TB1> INFO: Found DTB DTB_WXC03A
[10:57:45.839] <TB1> QUIET: Connection to board DTB_WXC03A opened.
[10:57:45.841] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 154
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC03A
MAC address: 40D85511809A
Hostname: pixelDTB154
Comment:
------------------------------------------------------
[10:57:45.843] <TB1> INFO: RPC call hashes of host and DTB match: 486171790
[10:57:47.336] <TB1> INFO: DUT info:
[10:57:47.336] <TB1> INFO: The DUT currently contains the following objects:
[10:57:47.336] <TB1> INFO: 4 TBM Cores tbm10c (4 ON)
[10:57:47.336] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:57:47.336] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:57:47.336] <TB1> INFO: TBM Core alpha (2): 7 registers set
[10:57:47.336] <TB1> INFO: TBM Core beta (3): 7 registers set
[10:57:47.336] <TB1> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[10:57:47.336] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[10:57:47.336] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[10:57:47.336] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[10:57:47.336] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[10:57:47.336] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[10:57:47.336] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[10:57:47.336] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[10:57:47.336] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[10:57:47.336] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[10:57:47.336] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[10:57:47.336] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[10:57:47.336] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[10:57:47.336] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[10:57:47.336] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[10:57:47.336] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[10:57:47.336] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[10:57:47.737] <TB1> INFO: enter 'restricted' command line mode
[10:57:47.737] <TB1> INFO: enter test to run
[10:57:47.737] <TB1> INFO: test: pretest no parameter change
[10:57:47.737] <TB1> INFO: running: pretest
[10:57:47.742] <TB1> INFO: ######################################################################
[10:57:47.742] <TB1> INFO: PixTestPretest::doTest()
[10:57:47.742] <TB1> INFO: ######################################################################
[10:57:47.744] <TB1> INFO: ----------------------------------------------------------------------
[10:57:47.744] <TB1> INFO: PixTestPretest::programROC()
[10:57:47.744] <TB1> INFO: ----------------------------------------------------------------------
[10:58:05.757] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[10:58:05.757] <TB1> INFO: IA differences per ROC: 20.1 20.1 19.3 17.7 18.5 17.7 18.5 18.5 16.9 20.9 20.1 16.9 15.3 17.7 18.5 15.3
[10:58:05.821] <TB1> INFO: ----------------------------------------------------------------------
[10:58:05.821] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[10:58:05.821] <TB1> INFO: ----------------------------------------------------------------------
[10:58:27.119] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 392.3 mA = 24.5187 mA/ROC
[10:58:27.119] <TB1> INFO: i(loss) [mA/ROC]: 19.3 19.3 20.1 20.1 18.5 20.9 20.1 18.5 19.3 18.5 18.5 18.5 19.3 20.1 20.1 19.3
[10:58:27.156] <TB1> INFO: ----------------------------------------------------------------------
[10:58:27.156] <TB1> INFO: PixTestPretest::findTiming()
[10:58:27.156] <TB1> INFO: ----------------------------------------------------------------------
[10:58:27.156] <TB1> INFO: PixTestCmd::init()

[10:58:59.859] <TB1> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[10:58:59.859] <TB1> INFO: (success/tries = 100/100), width = 4
[10:59:01.365] <TB1> INFO: ----------------------------------------------------------------------
[10:59:01.365] <TB1> INFO: PixTestPretest::findWorkingPixel()
[10:59:01.365] <TB1> INFO: ----------------------------------------------------------------------
[10:59:01.460] <TB1> INFO: Expecting 231680 events.
[10:59:11.387] <TB1> INFO: 231680 events read in total (9335ms).
[10:59:11.395] <TB1> INFO: Test took 10025ms.
[10:59:11.647] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[10:59:11.682] <TB1> INFO: ----------------------------------------------------------------------
[10:59:11.682] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[10:59:11.682] <TB1> INFO: ----------------------------------------------------------------------
[10:59:11.777] <TB1> INFO: Expecting 231680 events.
[10:59:21.823] <TB1> INFO: 231680 events read in total (9454ms).
[10:59:21.835] <TB1> INFO: Test took 10147ms.
[10:59:22.103] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[10:59:22.103] <TB1> INFO: CalDel: 95 80 98 77 92 86 79 104 87 85 84 81 80 99 69 90
[10:59:22.103] <TB1> INFO: VthrComp: 55 53 51 54 51 53 52 51 51 52 53 51 51 51 55 51
[10:59:22.106] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C0.dat
[10:59:22.107] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C1.dat
[10:59:22.107] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C2.dat
[10:59:22.107] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C3.dat
[10:59:22.109] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C4.dat
[10:59:22.109] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C5.dat
[10:59:22.109] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C6.dat
[10:59:22.109] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C7.dat
[10:59:22.109] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C8.dat
[10:59:22.110] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C9.dat
[10:59:22.110] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C10.dat
[10:59:22.110] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C11.dat
[10:59:22.110] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C12.dat
[10:59:22.111] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C13.dat
[10:59:22.111] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C14.dat
[10:59:22.111] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters_C15.dat
[10:59:22.111] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//tbmParameters_C0a.dat
[10:59:22.111] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//tbmParameters_C0b.dat
[10:59:22.111] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//tbmParameters_C1a.dat
[10:59:22.111] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//tbmParameters_C1b.dat
[10:59:22.111] <TB1> INFO: PixTestPretest::doTest() done, duration: 94 seconds
[10:59:22.164] <TB1> INFO: enter test to run
[10:59:22.164] <TB1> INFO: test: FullTest no parameter change
[10:59:22.164] <TB1> INFO: running: fulltest
[10:59:22.164] <TB1> INFO: ######################################################################
[10:59:22.164] <TB1> INFO: PixTestFullTest::doTest()
[10:59:22.164] <TB1> INFO: ######################################################################
[10:59:22.165] <TB1> INFO: ######################################################################
[10:59:22.165] <TB1> INFO: PixTestAlive::doTest()
[10:59:22.165] <TB1> INFO: ######################################################################
[10:59:22.166] <TB1> INFO: ----------------------------------------------------------------------
[10:59:22.166] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:59:22.166] <TB1> INFO: ----------------------------------------------------------------------
[10:59:22.405] <TB1> INFO: Expecting 41600 events.
[10:59:25.955] <TB1> INFO: 41600 events read in total (2958ms).
[10:59:25.956] <TB1> INFO: Test took 3788ms.
[10:59:26.186] <TB1> INFO: PixTestAlive::aliveTest() done
[10:59:26.187] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:59:26.188] <TB1> INFO: ----------------------------------------------------------------------
[10:59:26.188] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:59:26.188] <TB1> INFO: ----------------------------------------------------------------------
[10:59:26.467] <TB1> INFO: Expecting 41600 events.
[10:59:29.422] <TB1> INFO: 41600 events read in total (2364ms).
[10:59:29.422] <TB1> INFO: Test took 3230ms.
[10:59:29.423] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[10:59:29.653] <TB1> INFO: PixTestAlive::maskTest() done
[10:59:29.653] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:59:29.654] <TB1> INFO: ----------------------------------------------------------------------
[10:59:29.654] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:59:29.654] <TB1> INFO: ----------------------------------------------------------------------
[10:59:29.895] <TB1> INFO: Expecting 41600 events.
[10:59:33.504] <TB1> INFO: 41600 events read in total (3017ms).
[10:59:33.505] <TB1> INFO: Test took 3849ms.
[10:59:33.733] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[10:59:33.733] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:59:33.733] <TB1> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[10:59:33.733] <TB1> INFO: Decoding statistics:
[10:59:33.733] <TB1> INFO: General information:
[10:59:33.733] <TB1> INFO: 16bit words read: 0
[10:59:33.733] <TB1> INFO: valid events total: 0
[10:59:33.733] <TB1> INFO: empty events: 0
[10:59:33.733] <TB1> INFO: valid events with pixels: 0
[10:59:33.733] <TB1> INFO: valid pixel hits: 0
[10:59:33.733] <TB1> INFO: Event errors: 0
[10:59:33.733] <TB1> INFO: start marker: 0
[10:59:33.733] <TB1> INFO: stop marker: 0
[10:59:33.733] <TB1> INFO: overflow: 0
[10:59:33.733] <TB1> INFO: invalid 5bit words: 0
[10:59:33.733] <TB1> INFO: invalid XOR eye diagram: 0
[10:59:33.733] <TB1> INFO: frame (failed synchr.): 0
[10:59:33.733] <TB1> INFO: idle data (no TBM trl): 0
[10:59:33.733] <TB1> INFO: no data (only TBM hdr): 0
[10:59:33.733] <TB1> INFO: TBM errors: 0
[10:59:33.733] <TB1> INFO: flawed TBM headers: 0
[10:59:33.733] <TB1> INFO: flawed TBM trailers: 0
[10:59:33.733] <TB1> INFO: event ID mismatches: 0
[10:59:33.733] <TB1> INFO: ROC errors: 0
[10:59:33.733] <TB1> INFO: missing ROC header(s): 0
[10:59:33.733] <TB1> INFO: misplaced readback start: 0
[10:59:33.733] <TB1> INFO: Pixel decoding errors: 0
[10:59:33.733] <TB1> INFO: pixel data incomplete: 0
[10:59:33.733] <TB1> INFO: pixel address: 0
[10:59:33.733] <TB1> INFO: pulse height fill bit: 0
[10:59:33.733] <TB1> INFO: buffer corruption: 0
[10:59:33.739] <TB1> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C15.dat
[10:59:33.740] <TB1> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr_C15.dat

[10:59:33.740] <TB1> INFO: ######################################################################
[10:59:33.740] <TB1> INFO: PixTestReadback::doTest()
[10:59:33.740] <TB1> INFO: ######################################################################
[10:59:33.740] <TB1> INFO: ----------------------------------------------------------------------
[10:59:33.740] <TB1> INFO: PixTestReadback::CalibrateVd()
[10:59:33.740] <TB1> INFO: ----------------------------------------------------------------------
[10:59:43.706] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C0.dat
[10:59:43.706] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C1.dat
[10:59:43.706] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C2.dat
[10:59:43.707] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C3.dat
[10:59:43.707] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C4.dat
[10:59:43.707] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C5.dat
[10:59:43.707] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C6.dat
[10:59:43.707] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C7.dat
[10:59:43.707] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C8.dat
[10:59:43.707] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C9.dat
[10:59:43.707] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C10.dat
[10:59:43.707] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C11.dat
[10:59:43.707] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C12.dat
[10:59:43.707] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C13.dat
[10:59:43.708] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C14.dat
[10:59:43.708] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C15.dat
[10:59:43.742] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:59:43.742] <TB1> INFO: ----------------------------------------------------------------------
[10:59:43.742] <TB1> INFO: PixTestReadback::CalibrateVa()
[10:59:43.742] <TB1> INFO: ----------------------------------------------------------------------
[10:59:53.677] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C0.dat
[10:59:53.678] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C1.dat
[10:59:53.678] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C2.dat
[10:59:53.678] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C3.dat
[10:59:53.678] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C4.dat
[10:59:53.678] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C5.dat
[10:59:53.678] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C6.dat
[10:59:53.678] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C7.dat
[10:59:53.678] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C8.dat
[10:59:53.678] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C9.dat
[10:59:53.678] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C10.dat
[10:59:53.679] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C11.dat
[10:59:53.679] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C12.dat
[10:59:53.679] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C13.dat
[10:59:53.679] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C14.dat
[10:59:53.679] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C15.dat
[10:59:53.710] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:59:53.710] <TB1> INFO: ----------------------------------------------------------------------
[10:59:53.710] <TB1> INFO: PixTestReadback::readbackVbg()
[10:59:53.710] <TB1> INFO: ----------------------------------------------------------------------
[11:00:01.385] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[11:00:01.385] <TB1> INFO: ----------------------------------------------------------------------
[11:00:01.385] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[11:00:01.385] <TB1> INFO: ----------------------------------------------------------------------
[11:00:01.385] <TB1> INFO: Vbg will be calibrated using Vd calibration
[11:00:01.385] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 152.9calibrated Vbg = 1.21052 :::*/*/*/*/
[11:00:01.386] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 151.5calibrated Vbg = 1.2077 :::*/*/*/*/
[11:00:01.386] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 160.6calibrated Vbg = 1.2019 :::*/*/*/*/
[11:00:01.386] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 162.7calibrated Vbg = 1.20056 :::*/*/*/*/
[11:00:01.386] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 161.7calibrated Vbg = 1.20887 :::*/*/*/*/
[11:00:01.386] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 163.8calibrated Vbg = 1.20438 :::*/*/*/*/
[11:00:01.386] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 159calibrated Vbg = 1.20849 :::*/*/*/*/
[11:00:01.386] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 153.1calibrated Vbg = 1.21439 :::*/*/*/*/
[11:00:01.386] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 155.8calibrated Vbg = 1.20212 :::*/*/*/*/
[11:00:01.386] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 152.2calibrated Vbg = 1.20064 :::*/*/*/*/
[11:00:01.386] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 156calibrated Vbg = 1.19575 :::*/*/*/*/
[11:00:01.386] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 157calibrated Vbg = 1.19215 :::*/*/*/*/
[11:00:01.386] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 152.8calibrated Vbg = 1.19374 :::*/*/*/*/
[11:00:01.386] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 160.1calibrated Vbg = 1.2008 :::*/*/*/*/
[11:00:01.386] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 150calibrated Vbg = 1.20145 :::*/*/*/*/
[11:00:01.386] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 157.7calibrated Vbg = 1.20496 :::*/*/*/*/
[11:00:01.389] <TB1> INFO: ----------------------------------------------------------------------
[11:00:01.389] <TB1> INFO: PixTestReadback::CalibrateIa()
[11:00:01.389] <TB1> INFO: ----------------------------------------------------------------------
[11:02:42.224] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C0.dat
[11:02:42.224] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C1.dat
[11:02:42.224] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C2.dat
[11:02:42.224] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C3.dat
[11:02:42.224] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C4.dat
[11:02:42.225] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C5.dat
[11:02:42.225] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C6.dat
[11:02:42.225] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C7.dat
[11:02:42.225] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C8.dat
[11:02:42.225] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C9.dat
[11:02:42.225] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C10.dat
[11:02:42.225] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C11.dat
[11:02:42.225] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C12.dat
[11:02:42.225] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C13.dat
[11:02:42.225] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C14.dat
[11:02:42.225] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//readbackCal_C15.dat
[11:02:42.255] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[11:02:42.256] <TB1> INFO: PixTestReadback::doTest() done
[11:02:42.256] <TB1> INFO: Decoding statistics:
[11:02:42.256] <TB1> INFO: General information:
[11:02:42.256] <TB1> INFO: 16bit words read: 1536
[11:02:42.256] <TB1> INFO: valid events total: 256
[11:02:42.256] <TB1> INFO: empty events: 256
[11:02:42.256] <TB1> INFO: valid events with pixels: 0
[11:02:42.256] <TB1> INFO: valid pixel hits: 0
[11:02:42.256] <TB1> INFO: Event errors: 0
[11:02:42.256] <TB1> INFO: start marker: 0
[11:02:42.256] <TB1> INFO: stop marker: 0
[11:02:42.256] <TB1> INFO: overflow: 0
[11:02:42.256] <TB1> INFO: invalid 5bit words: 0
[11:02:42.256] <TB1> INFO: invalid XOR eye diagram: 0
[11:02:42.256] <TB1> INFO: frame (failed synchr.): 0
[11:02:42.256] <TB1> INFO: idle data (no TBM trl): 0
[11:02:42.256] <TB1> INFO: no data (only TBM hdr): 0
[11:02:42.256] <TB1> INFO: TBM errors: 0
[11:02:42.256] <TB1> INFO: flawed TBM headers: 0
[11:02:42.256] <TB1> INFO: flawed TBM trailers: 0
[11:02:42.256] <TB1> INFO: event ID mismatches: 0
[11:02:42.256] <TB1> INFO: ROC errors: 0
[11:02:42.256] <TB1> INFO: missing ROC header(s): 0
[11:02:42.256] <TB1> INFO: misplaced readback start: 0
[11:02:42.256] <TB1> INFO: Pixel decoding errors: 0
[11:02:42.256] <TB1> INFO: pixel data incomplete: 0
[11:02:42.256] <TB1> INFO: pixel address: 0
[11:02:42.256] <TB1> INFO: pulse height fill bit: 0
[11:02:42.256] <TB1> INFO: buffer corruption: 0
[11:02:42.305] <TB1> INFO: ######################################################################
[11:02:42.305] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:02:42.305] <TB1> INFO: ######################################################################
[11:02:42.308] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[11:02:42.337] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[11:02:42.337] <TB1> INFO: run 1 of 1
[11:02:42.572] <TB1> INFO: Expecting 3120000 events.
[11:03:14.184] <TB1> INFO: 677555 events read in total (31020ms).











[11:03:44.730] <TB1> INFO: 1348795 events read in total (61566ms).




















[11:04:15.581] <TB1> INFO: 2016595 events read in total (92417ms).











[11:04:45.950] <TB1> INFO: 2684980 events read in total (122786ms).











[11:05:05.336] <TB1> INFO: 3120000 events read in total (142172ms).
[11:05:05.406] <TB1> INFO: Test took 143070ms.
[11:05:32.459] <TB1> INFO: PixTestBBMap::doTest() done with 1 decoding errors: , duration: 170 seconds
[11:05:32.459] <TB1> INFO: number of dead bumps (per ROC): 0 0 0 0 1 0 0 1 0 0 1 0 0 0 0 0
[11:05:32.459] <TB1> INFO: separation cut (per ROC): 125 108 104 124 106 119 114 100 107 113 121 109 108 106 112 104
[11:05:32.459] <TB1> INFO: Decoding statistics:
[11:05:32.459] <TB1> INFO: General information:
[11:05:32.459] <TB1> INFO: 16bit words read: 0
[11:05:32.459] <TB1> INFO: valid events total: 0
[11:05:32.459] <TB1> INFO: empty events: 0
[11:05:32.459] <TB1> INFO: valid events with pixels: 0
[11:05:32.459] <TB1> INFO: valid pixel hits: 0
[11:05:32.459] <TB1> INFO: Event errors: 0
[11:05:32.459] <TB1> INFO: start marker: 0
[11:05:32.459] <TB1> INFO: stop marker: 0
[11:05:32.459] <TB1> INFO: overflow: 0
[11:05:32.459] <TB1> INFO: invalid 5bit words: 0
[11:05:32.459] <TB1> INFO: invalid XOR eye diagram: 0
[11:05:32.459] <TB1> INFO: frame (failed synchr.): 0
[11:05:32.459] <TB1> INFO: idle data (no TBM trl): 0
[11:05:32.459] <TB1> INFO: no data (only TBM hdr): 0
[11:05:32.459] <TB1> INFO: TBM errors: 0
[11:05:32.459] <TB1> INFO: flawed TBM headers: 0
[11:05:32.459] <TB1> INFO: flawed TBM trailers: 0
[11:05:32.459] <TB1> INFO: event ID mismatches: 0
[11:05:32.459] <TB1> INFO: ROC errors: 0
[11:05:32.459] <TB1> INFO: missing ROC header(s): 0
[11:05:32.459] <TB1> INFO: misplaced readback start: 0
[11:05:32.459] <TB1> INFO: Pixel decoding errors: 0
[11:05:32.459] <TB1> INFO: pixel data incomplete: 0
[11:05:32.459] <TB1> INFO: pixel address: 0
[11:05:32.459] <TB1> INFO: pulse height fill bit: 0
[11:05:32.459] <TB1> INFO: buffer corruption: 0
[11:05:32.498] <TB1> INFO: ######################################################################
[11:05:32.498] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:05:32.498] <TB1> INFO: ######################################################################
[11:05:32.498] <TB1> INFO: ----------------------------------------------------------------------
[11:05:32.498] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:05:32.498] <TB1> INFO: ----------------------------------------------------------------------
[11:05:32.498] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[11:05:32.513] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[11:05:32.513] <TB1> INFO: run 1 of 1
[11:05:32.749] <TB1> INFO: Expecting 36608000 events.
[11:05:56.777] <TB1> INFO: 712000 events read in total (23436ms).
[11:06:19.958] <TB1> INFO: 1402250 events read in total (46617ms).
[11:06:43.128] <TB1> INFO: 2094550 events read in total (69787ms).
[11:07:05.896] <TB1> INFO: 2782900 events read in total (92555ms).
[11:07:29.068] <TB1> INFO: 3473800 events read in total (115727ms).
[11:07:52.017] <TB1> INFO: 4160350 events read in total (138676ms).
[11:08:14.964] <TB1> INFO: 4848600 events read in total (161623ms).
[11:08:37.870] <TB1> INFO: 5537000 events read in total (184529ms).
[11:09:00.895] <TB1> INFO: 6227950 events read in total (207554ms).
[11:09:23.795] <TB1> INFO: 6916450 events read in total (230454ms).
[11:09:47.114] <TB1> INFO: 7603550 events read in total (253773ms).
[11:10:10.252] <TB1> INFO: 8287500 events read in total (276911ms).
[11:10:33.555] <TB1> INFO: 8978200 events read in total (300214ms).
[11:10:56.843] <TB1> INFO: 9668400 events read in total (323502ms).
[11:11:19.741] <TB1> INFO: 10357100 events read in total (346400ms).
[11:11:42.701] <TB1> INFO: 11042100 events read in total (369360ms).
[11:12:05.800] <TB1> INFO: 11727500 events read in total (392459ms).
[11:12:28.976] <TB1> INFO: 12412250 events read in total (415635ms).
[11:12:52.041] <TB1> INFO: 13098100 events read in total (438700ms).
[11:13:14.909] <TB1> INFO: 13782200 events read in total (461568ms).
[11:13:38.105] <TB1> INFO: 14465800 events read in total (484764ms).
[11:14:01.235] <TB1> INFO: 15148900 events read in total (507894ms).
[11:14:24.483] <TB1> INFO: 15831450 events read in total (531142ms).
[11:14:47.446] <TB1> INFO: 16514450 events read in total (554105ms).
[11:15:10.565] <TB1> INFO: 17197200 events read in total (577224ms).
[11:15:33.323] <TB1> INFO: 17879450 events read in total (599982ms).
[11:15:56.021] <TB1> INFO: 18561200 events read in total (622680ms).
[11:16:18.649] <TB1> INFO: 19244050 events read in total (645308ms).
[11:16:41.550] <TB1> INFO: 19924900 events read in total (668209ms).
[11:17:04.800] <TB1> INFO: 20607350 events read in total (691459ms).
[11:17:27.902] <TB1> INFO: 21286900 events read in total (714561ms).
[11:17:50.797] <TB1> INFO: 21966000 events read in total (737456ms).
[11:18:13.652] <TB1> INFO: 22645400 events read in total (760311ms).
[11:18:36.471] <TB1> INFO: 23325850 events read in total (783130ms).
[11:18:59.526] <TB1> INFO: 24003600 events read in total (806185ms).
[11:19:22.600] <TB1> INFO: 24682100 events read in total (829259ms).
[11:19:45.498] <TB1> INFO: 25360400 events read in total (852158ms).
[11:20:08.355] <TB1> INFO: 26039350 events read in total (875014ms).
[11:20:31.217] <TB1> INFO: 26715200 events read in total (897876ms).
[11:20:54.343] <TB1> INFO: 27394500 events read in total (921002ms).
[11:21:17.352] <TB1> INFO: 28070950 events read in total (944011ms).
[11:21:39.945] <TB1> INFO: 28747650 events read in total (966604ms).
[11:22:02.975] <TB1> INFO: 29423450 events read in total (989634ms).
[11:22:26.061] <TB1> INFO: 30100850 events read in total (1012720ms).
[11:22:48.814] <TB1> INFO: 30778400 events read in total (1035473ms).
[11:23:11.846] <TB1> INFO: 31454050 events read in total (1058505ms).
[11:23:34.681] <TB1> INFO: 32128650 events read in total (1081340ms).
[11:23:57.338] <TB1> INFO: 32805000 events read in total (1103998ms).
[11:24:20.369] <TB1> INFO: 33481100 events read in total (1127028ms).
[11:24:43.143] <TB1> INFO: 34158900 events read in total (1149802ms).
[11:25:05.003] <TB1> INFO: 34836100 events read in total (1172662ms).
[11:25:28.655] <TB1> INFO: 35512800 events read in total (1195314ms).
[11:25:51.701] <TB1> INFO: 36197600 events read in total (1218361ms).
[11:26:05.506] <TB1> INFO: 36608000 events read in total (1232165ms).
[11:26:05.580] <TB1> INFO: Test took 1233067ms.
[11:26:06.069] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:26:08.437] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:26:09.980] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:26:11.532] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:26:13.879] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:26:15.657] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:26:17.190] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:26:18.720] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:26:20.270] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:26:21.750] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:26:23.582] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:26:25.554] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:26:27.114] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:26:28.614] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:26:30.097] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:26:31.722] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:26:33.784] <TB1> INFO: PixTestScurves::scurves() done
[11:26:33.784] <TB1> INFO: Vcal mean: 135.03 123.80 129.35 132.35 128.56 135.89 135.26 120.78 133.91 127.39 126.83 130.06 119.63 130.65 125.21 118.40
[11:26:33.784] <TB1> INFO: Vcal RMS: 6.48 6.08 6.28 5.57 7.09 5.90 6.00 5.52 6.50 5.68 6.65 6.47 5.73 6.14 6.43 5.64
[11:26:33.784] <TB1> INFO: PixTestScurves::fullTest() done, duration: 1261 seconds
[11:26:33.784] <TB1> INFO: Decoding statistics:
[11:26:33.784] <TB1> INFO: General information:
[11:26:33.784] <TB1> INFO: 16bit words read: 0
[11:26:33.784] <TB1> INFO: valid events total: 0
[11:26:33.784] <TB1> INFO: empty events: 0
[11:26:33.784] <TB1> INFO: valid events with pixels: 0
[11:26:33.784] <TB1> INFO: valid pixel hits: 0
[11:26:33.784] <TB1> INFO: Event errors: 0
[11:26:33.784] <TB1> INFO: start marker: 0
[11:26:33.784] <TB1> INFO: stop marker: 0
[11:26:33.784] <TB1> INFO: overflow: 0
[11:26:33.784] <TB1> INFO: invalid 5bit words: 0
[11:26:33.784] <TB1> INFO: invalid XOR eye diagram: 0
[11:26:33.784] <TB1> INFO: frame (failed synchr.): 0
[11:26:33.784] <TB1> INFO: idle data (no TBM trl): 0
[11:26:33.784] <TB1> INFO: no data (only TBM hdr): 0
[11:26:33.784] <TB1> INFO: TBM errors: 0
[11:26:33.784] <TB1> INFO: flawed TBM headers: 0
[11:26:33.784] <TB1> INFO: flawed TBM trailers: 0
[11:26:33.784] <TB1> INFO: event ID mismatches: 0
[11:26:33.784] <TB1> INFO: ROC errors: 0
[11:26:33.784] <TB1> INFO: missing ROC header(s): 0
[11:26:33.784] <TB1> INFO: misplaced readback start: 0
[11:26:33.784] <TB1> INFO: Pixel decoding errors: 0
[11:26:33.784] <TB1> INFO: pixel data incomplete: 0
[11:26:33.784] <TB1> INFO: pixel address: 0
[11:26:33.784] <TB1> INFO: pulse height fill bit: 0
[11:26:33.785] <TB1> INFO: buffer corruption: 0
[11:26:33.853] <TB1> INFO: ######################################################################
[11:26:33.853] <TB1> INFO: PixTestTrim::doTest()
[11:26:33.853] <TB1> INFO: ######################################################################
[11:26:33.854] <TB1> INFO: ----------------------------------------------------------------------
[11:26:33.854] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[11:26:33.854] <TB1> INFO: ----------------------------------------------------------------------
[11:26:33.897] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:26:33.897] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:26:33.911] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:26:33.911] <TB1> INFO: run 1 of 1
[11:26:34.160] <TB1> INFO: Expecting 5025280 events.
[11:27:05.253] <TB1> INFO: 839616 events read in total (30494ms).
[11:27:35.189] <TB1> INFO: 1676288 events read in total (60431ms).
[11:28:05.306] <TB1> INFO: 2509488 events read in total (90548ms).
[11:28:35.795] <TB1> INFO: 3340280 events read in total (121036ms).
[11:29:06.205] <TB1> INFO: 4166392 events read in total (151446ms).
[11:29:36.719] <TB1> INFO: 4992016 events read in total (181960ms).
[11:29:38.290] <TB1> INFO: 5025280 events read in total (183531ms).
[11:29:38.335] <TB1> INFO: Test took 184425ms.
[11:29:53.680] <TB1> INFO: ROC 0 VthrComp = 134
[11:29:53.680] <TB1> INFO: ROC 1 VthrComp = 128
[11:29:53.681] <TB1> INFO: ROC 2 VthrComp = 125
[11:29:53.681] <TB1> INFO: ROC 3 VthrComp = 133
[11:29:53.681] <TB1> INFO: ROC 4 VthrComp = 126
[11:29:53.681] <TB1> INFO: ROC 5 VthrComp = 134
[11:29:53.681] <TB1> INFO: ROC 6 VthrComp = 132
[11:29:53.681] <TB1> INFO: ROC 7 VthrComp = 117
[11:29:53.681] <TB1> INFO: ROC 8 VthrComp = 129
[11:29:53.681] <TB1> INFO: ROC 9 VthrComp = 131
[11:29:53.681] <TB1> INFO: ROC 10 VthrComp = 131
[11:29:53.681] <TB1> INFO: ROC 11 VthrComp = 129
[11:29:53.682] <TB1> INFO: ROC 12 VthrComp = 116
[11:29:53.682] <TB1> INFO: ROC 13 VthrComp = 126
[11:29:53.682] <TB1> INFO: ROC 14 VthrComp = 134
[11:29:53.682] <TB1> INFO: ROC 15 VthrComp = 117
[11:29:54.009] <TB1> INFO: Expecting 41600 events.
[11:29:57.943] <TB1> INFO: 41600 events read in total (3343ms).
[11:29:57.944] <TB1> INFO: Test took 4260ms.
[11:29:57.956] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:29:57.956] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:29:57.970] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:29:57.970] <TB1> INFO: run 1 of 1
[11:29:58.249] <TB1> INFO: Expecting 5025280 events.
[11:30:24.326] <TB1> INFO: 593912 events read in total (25486ms).
[11:30:50.030] <TB1> INFO: 1186080 events read in total (51190ms).
[11:31:15.708] <TB1> INFO: 1778072 events read in total (76868ms).
[11:31:41.452] <TB1> INFO: 2369384 events read in total (102612ms).
[11:32:07.192] <TB1> INFO: 2958272 events read in total (128352ms).
[11:32:32.717] <TB1> INFO: 3545664 events read in total (153877ms).
[11:32:58.265] <TB1> INFO: 4131576 events read in total (179425ms).
[11:33:23.591] <TB1> INFO: 4717240 events read in total (204751ms).
[11:33:37.352] <TB1> INFO: 5025280 events read in total (218512ms).
[11:33:37.419] <TB1> INFO: Test took 219449ms.
[11:34:04.726] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 65.9009 for pixel 0/62 mean/min/max = 50.0509/34.1644/65.9374
[11:34:04.726] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 59.3104 for pixel 6/10 mean/min/max = 45.4235/31.3903/59.4567
[11:34:04.727] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 64.8497 for pixel 0/16 mean/min/max = 48.5267/32.0365/65.017
[11:34:04.727] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 66.5111 for pixel 19/1 mean/min/max = 51.7446/36.9688/66.5205
[11:34:04.728] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 61.3142 for pixel 8/13 mean/min/max = 46.2147/31.0622/61.3673
[11:34:04.728] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 66.6162 for pixel 8/11 mean/min/max = 50.2066/33.7479/66.6653
[11:34:04.729] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 68.2124 for pixel 19/2 mean/min/max = 52.1454/36.0416/68.2493
[11:34:04.729] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 62.618 for pixel 24/54 mean/min/max = 47.5537/32.4842/62.6232
[11:34:04.730] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 64.3893 for pixel 20/7 mean/min/max = 48.5907/32.747/64.4344
[11:34:04.731] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 59.6806 for pixel 1/8 mean/min/max = 46.4321/33.0206/59.8435
[11:34:04.731] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 59.4233 for pixel 0/5 mean/min/max = 45.5169/31.5007/59.5331
[11:34:04.732] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 61.2776 for pixel 0/23 mean/min/max = 47.3279/33.0195/61.6362
[11:34:04.732] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 61.6825 for pixel 0/79 mean/min/max = 47.0315/32.2683/61.7947
[11:34:04.733] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 63.1498 for pixel 5/1 mean/min/max = 47.6949/31.7384/63.6513
[11:34:04.733] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 62.1652 for pixel 17/23 mean/min/max = 48.732/35.2788/62.1852
[11:34:04.734] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 62.3604 for pixel 0/14 mean/min/max = 47.2218/32.062/62.3816
[11:34:04.737] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:04.826] <TB1> INFO: Expecting 411648 events.
[11:34:14.371] <TB1> INFO: 411648 events read in total (8954ms).
[11:34:14.378] <TB1> INFO: Expecting 411648 events.
[11:34:23.560] <TB1> INFO: 411648 events read in total (8779ms).
[11:34:23.574] <TB1> INFO: Expecting 411648 events.
[11:34:32.676] <TB1> INFO: 411648 events read in total (8700ms).
[11:34:32.689] <TB1> INFO: Expecting 411648 events.
[11:34:41.751] <TB1> INFO: 411648 events read in total (8659ms).
[11:34:41.767] <TB1> INFO: Expecting 411648 events.
[11:34:50.837] <TB1> INFO: 411648 events read in total (8667ms).
[11:34:50.856] <TB1> INFO: Expecting 411648 events.
[11:35:00.220] <TB1> INFO: 411648 events read in total (8961ms).
[11:35:00.242] <TB1> INFO: Expecting 411648 events.
[11:35:09.540] <TB1> INFO: 411648 events read in total (8895ms).
[11:35:09.565] <TB1> INFO: Expecting 411648 events.
[11:35:18.958] <TB1> INFO: 411648 events read in total (8990ms).
[11:35:18.985] <TB1> INFO: Expecting 411648 events.
[11:35:28.294] <TB1> INFO: 411648 events read in total (8906ms).
[11:35:28.324] <TB1> INFO: Expecting 411648 events.
[11:35:37.644] <TB1> INFO: 411648 events read in total (8917ms).
[11:35:37.678] <TB1> INFO: Expecting 411648 events.
[11:35:47.037] <TB1> INFO: 411648 events read in total (8956ms).
[11:35:47.074] <TB1> INFO: Expecting 411648 events.
[11:35:56.367] <TB1> INFO: 411648 events read in total (8890ms).
[11:35:56.405] <TB1> INFO: Expecting 411648 events.
[11:36:05.730] <TB1> INFO: 411648 events read in total (8922ms).
[11:36:05.770] <TB1> INFO: Expecting 411648 events.
[11:36:15.154] <TB1> INFO: 411648 events read in total (8981ms).
[11:36:15.197] <TB1> INFO: Expecting 411648 events.
[11:36:24.569] <TB1> INFO: 411648 events read in total (8969ms).
[11:36:24.626] <TB1> INFO: Expecting 411648 events.
[11:36:34.040] <TB1> INFO: 411648 events read in total (9011ms).
[11:36:34.104] <TB1> INFO: Test took 149367ms.
[11:36:34.870] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[11:36:34.884] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:36:34.884] <TB1> INFO: run 1 of 1
[11:36:35.122] <TB1> INFO: Expecting 5025280 events.
[11:37:01.731] <TB1> INFO: 590648 events read in total (26017ms).
[11:37:27.513] <TB1> INFO: 1180976 events read in total (51799ms).
[11:37:53.768] <TB1> INFO: 1771072 events read in total (78054ms).
[11:38:19.773] <TB1> INFO: 2359424 events read in total (104059ms).
[11:38:45.519] <TB1> INFO: 2947288 events read in total (129805ms).
[11:39:11.501] <TB1> INFO: 3536368 events read in total (155787ms).
[11:39:37.445] <TB1> INFO: 4127328 events read in total (181731ms).
[11:40:03.481] <TB1> INFO: 4718824 events read in total (207767ms).
[11:40:17.277] <TB1> INFO: 5025280 events read in total (221563ms).
[11:40:17.438] <TB1> INFO: Test took 222555ms.
[11:40:41.701] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 9.287837 .. 145.626746
[11:40:41.944] <TB1> INFO: Expecting 208000 events.
[11:40:51.714] <TB1> INFO: 208000 events read in total (9179ms).
[11:40:51.716] <TB1> INFO: Test took 10011ms.
[11:40:51.767] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 9 .. 155 (-1/-1) hits flags = 528 (plus default)
[11:40:51.781] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:40:51.781] <TB1> INFO: run 1 of 1
[11:40:52.059] <TB1> INFO: Expecting 4892160 events.
[11:41:17.778] <TB1> INFO: 573880 events read in total (25127ms).
[11:41:43.271] <TB1> INFO: 1148256 events read in total (50622ms).
[11:42:08.862] <TB1> INFO: 1722408 events read in total (76212ms).
[11:42:34.529] <TB1> INFO: 2296528 events read in total (101878ms).
[11:43:00.222] <TB1> INFO: 2870304 events read in total (127571ms).
[11:43:25.570] <TB1> INFO: 3444144 events read in total (152919ms).
[11:43:51.183] <TB1> INFO: 4018056 events read in total (178532ms).
[11:44:16.457] <TB1> INFO: 4591080 events read in total (203806ms).
[11:44:30.323] <TB1> INFO: 4892160 events read in total (217672ms).
[11:44:30.467] <TB1> INFO: Test took 218685ms.
[11:44:55.831] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 27.983213 .. 46.633707
[11:44:56.162] <TB1> INFO: Expecting 208000 events.
[11:45:06.423] <TB1> INFO: 208000 events read in total (9670ms).
[11:45:06.424] <TB1> INFO: Test took 10592ms.
[11:45:06.484] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 56 (-1/-1) hits flags = 528 (plus default)
[11:45:06.497] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:45:06.497] <TB1> INFO: run 1 of 1
[11:45:06.776] <TB1> INFO: Expecting 1331200 events.
[11:45:34.895] <TB1> INFO: 656784 events read in total (27527ms).
[11:46:02.412] <TB1> INFO: 1311912 events read in total (55044ms).
[11:46:03.651] <TB1> INFO: 1331200 events read in total (56284ms).
[11:46:03.688] <TB1> INFO: Test took 57191ms.
[11:46:16.559] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 28.207698 .. 51.485268
[11:46:16.836] <TB1> INFO: Expecting 208000 events.
[11:46:26.826] <TB1> INFO: 208000 events read in total (9398ms).
[11:46:26.827] <TB1> INFO: Test took 10267ms.
[11:46:26.878] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 18 .. 61 (-1/-1) hits flags = 528 (plus default)
[11:46:26.891] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:46:26.891] <TB1> INFO: run 1 of 1
[11:46:27.170] <TB1> INFO: Expecting 1464320 events.
[11:46:54.554] <TB1> INFO: 636296 events read in total (26793ms).
[11:47:21.790] <TB1> INFO: 1271336 events read in total (54029ms).
[11:47:30.329] <TB1> INFO: 1464320 events read in total (62568ms).
[11:47:30.362] <TB1> INFO: Test took 63470ms.
[11:47:44.250] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 27.791314 .. 53.742790
[11:47:44.516] <TB1> INFO: Expecting 208000 events.
[11:47:54.291] <TB1> INFO: 208000 events read in total (9184ms).
[11:47:54.291] <TB1> INFO: Test took 10039ms.
[11:47:54.341] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 17 .. 63 (-1/-1) hits flags = 528 (plus default)
[11:47:54.359] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:47:54.359] <TB1> INFO: run 1 of 1
[11:47:54.636] <TB1> INFO: Expecting 1564160 events.
[11:48:22.316] <TB1> INFO: 634352 events read in total (27088ms).
[11:48:49.029] <TB1> INFO: 1268400 events read in total (53802ms).
[11:49:01.931] <TB1> INFO: 1564160 events read in total (66703ms).
[11:49:01.976] <TB1> INFO: Test took 67618ms.
[11:49:18.289] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:49:18.289] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[11:49:18.303] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:49:18.303] <TB1> INFO: run 1 of 1
[11:49:18.541] <TB1> INFO: Expecting 1364480 events.
[11:49:47.017] <TB1> INFO: 669544 events read in total (27885ms).
[11:50:14.445] <TB1> INFO: 1337480 events read in total (55313ms).
[11:50:15.970] <TB1> INFO: 1364480 events read in total (56838ms).
[11:50:15.998] <TB1> INFO: Test took 57696ms.
[11:50:28.490] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C0.dat
[11:50:28.490] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C1.dat
[11:50:28.491] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C2.dat
[11:50:28.491] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C3.dat
[11:50:28.491] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C4.dat
[11:50:28.491] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C5.dat
[11:50:28.491] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C6.dat
[11:50:28.491] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C7.dat
[11:50:28.491] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C8.dat
[11:50:28.491] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C9.dat
[11:50:28.491] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C10.dat
[11:50:28.491] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C11.dat
[11:50:28.491] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C12.dat
[11:50:28.491] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C13.dat
[11:50:28.492] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C14.dat
[11:50:28.492] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C15.dat
[11:50:28.492] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C0.dat
[11:50:28.497] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C1.dat
[11:50:28.502] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C2.dat
[11:50:28.507] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C3.dat
[11:50:28.512] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C4.dat
[11:50:28.516] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C5.dat
[11:50:28.521] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C6.dat
[11:50:28.526] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C7.dat
[11:50:28.531] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C8.dat
[11:50:28.536] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C9.dat
[11:50:28.541] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C10.dat
[11:50:28.546] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C11.dat
[11:50:28.550] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C12.dat
[11:50:28.555] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C13.dat
[11:50:28.560] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C14.dat
[11:50:28.565] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//trimParameters35_C15.dat
[11:50:28.569] <TB1> INFO: PixTestTrim::trimTest() done
[11:50:28.569] <TB1> INFO: vtrim: 142 129 128 158 126 164 155 137 143 141 117 131 118 140 163 138
[11:50:28.569] <TB1> INFO: vthrcomp: 134 128 125 133 126 134 132 117 129 131 131 129 116 126 134 117
[11:50:28.569] <TB1> INFO: vcal mean: 35.12 35.07 35.25 35.13 35.17 35.29 35.18 35.37 35.33 35.05 34.97 35.09 35.03 35.14 35.26 35.24
[11:50:28.569] <TB1> INFO: vcal RMS: 1.20 1.06 1.37 1.17 1.30 1.28 1.23 1.47 1.42 1.04 1.11 1.08 1.07 1.20 1.40 1.25
[11:50:28.569] <TB1> INFO: bits mean: 8.45 9.79 8.82 7.87 9.80 8.51 7.90 9.55 9.14 9.36 9.51 8.42 8.30 9.52 8.88 9.44
[11:50:28.569] <TB1> INFO: bits RMS: 2.60 2.65 2.91 2.30 2.67 2.66 2.45 2.63 2.73 2.60 2.85 2.93 3.12 2.64 2.36 2.73
[11:50:28.578] <TB1> INFO: ----------------------------------------------------------------------
[11:50:28.578] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[11:50:28.578] <TB1> INFO: ----------------------------------------------------------------------
[11:50:28.580] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[11:50:28.595] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[11:50:28.595] <TB1> INFO: run 1 of 1
[11:50:28.851] <TB1> INFO: Expecting 4160000 events.
[11:51:02.152] <TB1> INFO: 788105 events read in total (32709ms).
[11:51:34.502] <TB1> INFO: 1569020 events read in total (65059ms).
[11:52:07.374] <TB1> INFO: 2344440 events read in total (97932ms).
[11:52:40.063] <TB1> INFO: 3114925 events read in total (130620ms).
[11:53:12.416] <TB1> INFO: 3881540 events read in total (162973ms).
[11:53:24.606] <TB1> INFO: 4160000 events read in total (175163ms).
[11:53:24.671] <TB1> INFO: Test took 176076ms.
[11:53:48.948] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 212 (-1/-1) hits flags = 528 (plus default)
[11:53:48.963] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[11:53:48.963] <TB1> INFO: run 1 of 1
[11:53:49.228] <TB1> INFO: Expecting 4430400 events.
[11:54:21.567] <TB1> INFO: 741975 events read in total (31747ms).
[11:54:53.481] <TB1> INFO: 1479195 events read in total (63661ms).
[11:55:24.789] <TB1> INFO: 2211835 events read in total (94969ms).
[11:55:56.436] <TB1> INFO: 2941990 events read in total (126616ms).
[11:56:27.766] <TB1> INFO: 3669200 events read in total (157946ms).
[11:56:59.131] <TB1> INFO: 4395970 events read in total (189311ms).
[11:57:00.950] <TB1> INFO: 4430400 events read in total (191130ms).
[11:57:01.026] <TB1> INFO: Test took 192063ms.
[11:57:30.899] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 212 (-1/-1) hits flags = 528 (plus default)
[11:57:30.914] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[11:57:30.914] <TB1> INFO: run 1 of 1
[11:57:31.151] <TB1> INFO: Expecting 4430400 events.
[11:58:02.906] <TB1> INFO: 742395 events read in total (31163ms).
[11:58:35.224] <TB1> INFO: 1480505 events read in total (63481ms).
[11:59:07.266] <TB1> INFO: 2214035 events read in total (95523ms).
[11:59:38.976] <TB1> INFO: 2944570 events read in total (127233ms).
[12:00:11.049] <TB1> INFO: 3672710 events read in total (159306ms).
[12:00:42.305] <TB1> INFO: 4400350 events read in total (190562ms).
[12:00:43.951] <TB1> INFO: 4430400 events read in total (192208ms).
[12:00:44.037] <TB1> INFO: Test took 193124ms.
[12:01:11.848] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 209 (-1/-1) hits flags = 528 (plus default)
[12:01:11.863] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[12:01:11.863] <TB1> INFO: run 1 of 1
[12:01:12.137] <TB1> INFO: Expecting 4368000 events.
[12:01:45.771] <TB1> INFO: 747235 events read in total (33042ms).
[12:02:17.959] <TB1> INFO: 1489555 events read in total (65230ms).
[12:02:49.792] <TB1> INFO: 2227665 events read in total (97063ms).
[12:03:21.482] <TB1> INFO: 2962955 events read in total (128753ms).
[12:03:52.734] <TB1> INFO: 3694880 events read in total (160005ms).
[12:04:22.392] <TB1> INFO: 4368000 events read in total (189663ms).
[12:04:22.476] <TB1> INFO: Test took 190613ms.
[12:04:51.967] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 211 (-1/-1) hits flags = 528 (plus default)
[12:04:51.981] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[12:04:51.981] <TB1> INFO: run 1 of 1
[12:04:52.220] <TB1> INFO: Expecting 4409600 events.
[12:05:24.312] <TB1> INFO: 744390 events read in total (31500ms).
[12:05:55.966] <TB1> INFO: 1483905 events read in total (63154ms).
[12:06:27.696] <TB1> INFO: 2219560 events read in total (94884ms).
[12:06:58.951] <TB1> INFO: 2951945 events read in total (126139ms).
[12:07:30.560] <TB1> INFO: 3681375 events read in total (157749ms).
[12:08:02.047] <TB1> INFO: 4409600 events read in total (189235ms).
[12:08:02.154] <TB1> INFO: Test took 190173ms.
[12:08:30.268] <TB1> INFO: PixTestTrim::trimBitTest() done
[12:08:30.269] <TB1> INFO: PixTestTrim::doTest() done, duration: 2516 seconds
[12:08:30.269] <TB1> INFO: Decoding statistics:
[12:08:30.269] <TB1> INFO: General information:
[12:08:30.269] <TB1> INFO: 16bit words read: 0
[12:08:30.269] <TB1> INFO: valid events total: 0
[12:08:30.269] <TB1> INFO: empty events: 0
[12:08:30.269] <TB1> INFO: valid events with pixels: 0
[12:08:30.269] <TB1> INFO: valid pixel hits: 0
[12:08:30.269] <TB1> INFO: Event errors: 0
[12:08:30.269] <TB1> INFO: start marker: 0
[12:08:30.269] <TB1> INFO: stop marker: 0
[12:08:30.269] <TB1> INFO: overflow: 0
[12:08:30.269] <TB1> INFO: invalid 5bit words: 0
[12:08:30.269] <TB1> INFO: invalid XOR eye diagram: 0
[12:08:30.269] <TB1> INFO: frame (failed synchr.): 0
[12:08:30.269] <TB1> INFO: idle data (no TBM trl): 0
[12:08:30.269] <TB1> INFO: no data (only TBM hdr): 0
[12:08:30.269] <TB1> INFO: TBM errors: 0
[12:08:30.269] <TB1> INFO: flawed TBM headers: 0
[12:08:30.269] <TB1> INFO: flawed TBM trailers: 0
[12:08:30.269] <TB1> INFO: event ID mismatches: 0
[12:08:30.269] <TB1> INFO: ROC errors: 0
[12:08:30.269] <TB1> INFO: missing ROC header(s): 0
[12:08:30.269] <TB1> INFO: misplaced readback start: 0
[12:08:30.269] <TB1> INFO: Pixel decoding errors: 0
[12:08:30.269] <TB1> INFO: pixel data incomplete: 0
[12:08:30.269] <TB1> INFO: pixel address: 0
[12:08:30.269] <TB1> INFO: pulse height fill bit: 0
[12:08:30.269] <TB1> INFO: buffer corruption: 0
[12:08:30.863] <TB1> INFO: ######################################################################
[12:08:30.863] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:08:30.863] <TB1> INFO: ######################################################################
[12:08:31.103] <TB1> INFO: Expecting 41600 events.
[12:08:34.578] <TB1> INFO: 41600 events read in total (2884ms).
[12:08:34.579] <TB1> INFO: Test took 3715ms.
[12:08:35.018] <TB1> INFO: Expecting 41600 events.
[12:08:38.507] <TB1> INFO: 41600 events read in total (2897ms).
[12:08:38.508] <TB1> INFO: Test took 3725ms.
[12:08:38.797] <TB1> INFO: Expecting 41600 events.
[12:08:42.357] <TB1> INFO: 41600 events read in total (2968ms).
[12:08:42.358] <TB1> INFO: Test took 3826ms.
[12:08:42.649] <TB1> INFO: Expecting 41600 events.
[12:08:46.166] <TB1> INFO: 41600 events read in total (2925ms).
[12:08:46.167] <TB1> INFO: Test took 3783ms.
[12:08:46.457] <TB1> INFO: Expecting 41600 events.
[12:08:49.976] <TB1> INFO: 41600 events read in total (2927ms).
[12:08:49.977] <TB1> INFO: Test took 3786ms.
[12:08:50.267] <TB1> INFO: Expecting 41600 events.
[12:08:53.913] <TB1> INFO: 41600 events read in total (3054ms).
[12:08:53.914] <TB1> INFO: Test took 3913ms.
[12:08:54.203] <TB1> INFO: Expecting 41600 events.
[12:08:57.729] <TB1> INFO: 41600 events read in total (2934ms).
[12:08:57.730] <TB1> INFO: Test took 3792ms.
[12:08:58.021] <TB1> INFO: Expecting 41600 events.
[12:09:01.516] <TB1> INFO: 41600 events read in total (2903ms).
[12:09:01.517] <TB1> INFO: Test took 3763ms.
[12:09:01.810] <TB1> INFO: Expecting 41600 events.
[12:09:05.328] <TB1> INFO: 41600 events read in total (2926ms).
[12:09:05.329] <TB1> INFO: Test took 3787ms.
[12:09:05.619] <TB1> INFO: Expecting 41600 events.
[12:09:09.204] <TB1> INFO: 41600 events read in total (2993ms).
[12:09:09.205] <TB1> INFO: Test took 3852ms.
[12:09:09.495] <TB1> INFO: Expecting 41600 events.
[12:09:12.986] <TB1> INFO: 41600 events read in total (2899ms).
[12:09:12.986] <TB1> INFO: Test took 3757ms.
[12:09:13.276] <TB1> INFO: Expecting 41600 events.
[12:09:16.789] <TB1> INFO: 41600 events read in total (2921ms).
[12:09:16.790] <TB1> INFO: Test took 3779ms.
[12:09:17.082] <TB1> INFO: Expecting 41600 events.
[12:09:20.630] <TB1> INFO: 41600 events read in total (2955ms).
[12:09:20.631] <TB1> INFO: Test took 3814ms.
[12:09:20.920] <TB1> INFO: Expecting 41600 events.
[12:09:24.442] <TB1> INFO: 41600 events read in total (2930ms).
[12:09:24.442] <TB1> INFO: Test took 3787ms.
[12:09:24.731] <TB1> INFO: Expecting 41600 events.
[12:09:28.243] <TB1> INFO: 41600 events read in total (2920ms).
[12:09:28.244] <TB1> INFO: Test took 3778ms.
[12:09:28.533] <TB1> INFO: Expecting 41600 events.
[12:09:32.068] <TB1> INFO: 41600 events read in total (2943ms).
[12:09:32.069] <TB1> INFO: Test took 3801ms.
[12:09:32.378] <TB1> INFO: Expecting 41600 events.
[12:09:35.905] <TB1> INFO: 41600 events read in total (2936ms).
[12:09:35.906] <TB1> INFO: Test took 3813ms.
[12:09:36.195] <TB1> INFO: Expecting 41600 events.
[12:09:39.670] <TB1> INFO: 41600 events read in total (2883ms).
[12:09:39.671] <TB1> INFO: Test took 3741ms.
[12:09:39.960] <TB1> INFO: Expecting 41600 events.
[12:09:43.454] <TB1> INFO: 41600 events read in total (2902ms).
[12:09:43.455] <TB1> INFO: Test took 3760ms.
[12:09:43.762] <TB1> INFO: Expecting 41600 events.
[12:09:47.423] <TB1> INFO: 41600 events read in total (3070ms).
[12:09:47.424] <TB1> INFO: Test took 3945ms.
[12:09:47.716] <TB1> INFO: Expecting 41600 events.
[12:09:51.316] <TB1> INFO: 41600 events read in total (3009ms).
[12:09:51.317] <TB1> INFO: Test took 3866ms.
[12:09:51.630] <TB1> INFO: Expecting 41600 events.
[12:09:55.121] <TB1> INFO: 41600 events read in total (2899ms).
[12:09:55.121] <TB1> INFO: Test took 3778ms.
[12:09:55.415] <TB1> INFO: Expecting 41600 events.
[12:09:58.912] <TB1> INFO: 41600 events read in total (2905ms).
[12:09:58.913] <TB1> INFO: Test took 3763ms.
[12:09:59.223] <TB1> INFO: Expecting 41600 events.
[12:10:02.739] <TB1> INFO: 41600 events read in total (2924ms).
[12:10:02.740] <TB1> INFO: Test took 3802ms.
[12:10:03.030] <TB1> INFO: Expecting 41600 events.
[12:10:06.533] <TB1> INFO: 41600 events read in total (2911ms).
[12:10:06.533] <TB1> INFO: Test took 3768ms.
[12:10:06.823] <TB1> INFO: Expecting 41600 events.
[12:10:10.341] <TB1> INFO: 41600 events read in total (2926ms).
[12:10:10.342] <TB1> INFO: Test took 3784ms.
[12:10:10.651] <TB1> INFO: Expecting 41600 events.
[12:10:14.143] <TB1> INFO: 41600 events read in total (2900ms).
[12:10:14.144] <TB1> INFO: Test took 3777ms.
[12:10:14.433] <TB1> INFO: Expecting 41600 events.
[12:10:17.948] <TB1> INFO: 41600 events read in total (2923ms).
[12:10:17.949] <TB1> INFO: Test took 3781ms.
[12:10:18.243] <TB1> INFO: Expecting 41600 events.
[12:10:21.824] <TB1> INFO: 41600 events read in total (2989ms).
[12:10:21.825] <TB1> INFO: Test took 3852ms.
[12:10:22.117] <TB1> INFO: Expecting 41600 events.
[12:10:25.660] <TB1> INFO: 41600 events read in total (2952ms).
[12:10:25.661] <TB1> INFO: Test took 3810ms.
[12:10:25.954] <TB1> INFO: Expecting 2560 events.
[12:10:26.843] <TB1> INFO: 2560 events read in total (297ms).
[12:10:26.843] <TB1> INFO: Test took 1166ms.
[12:10:27.151] <TB1> INFO: Expecting 2560 events.
[12:10:28.038] <TB1> INFO: 2560 events read in total (295ms).
[12:10:28.038] <TB1> INFO: Test took 1195ms.
[12:10:28.345] <TB1> INFO: Expecting 2560 events.
[12:10:29.229] <TB1> INFO: 2560 events read in total (292ms).
[12:10:29.230] <TB1> INFO: Test took 1192ms.
[12:10:29.537] <TB1> INFO: Expecting 2560 events.
[12:10:30.425] <TB1> INFO: 2560 events read in total (297ms).
[12:10:30.426] <TB1> INFO: Test took 1196ms.
[12:10:30.733] <TB1> INFO: Expecting 2560 events.
[12:10:31.613] <TB1> INFO: 2560 events read in total (288ms).
[12:10:31.613] <TB1> INFO: Test took 1185ms.
[12:10:31.922] <TB1> INFO: Expecting 2560 events.
[12:10:32.804] <TB1> INFO: 2560 events read in total (291ms).
[12:10:32.804] <TB1> INFO: Test took 1190ms.
[12:10:33.112] <TB1> INFO: Expecting 2560 events.
[12:10:33.994] <TB1> INFO: 2560 events read in total (291ms).
[12:10:33.994] <TB1> INFO: Test took 1189ms.
[12:10:34.301] <TB1> INFO: Expecting 2560 events.
[12:10:35.189] <TB1> INFO: 2560 events read in total (296ms).
[12:10:35.189] <TB1> INFO: Test took 1194ms.
[12:10:35.497] <TB1> INFO: Expecting 2560 events.
[12:10:36.386] <TB1> INFO: 2560 events read in total (297ms).
[12:10:36.387] <TB1> INFO: Test took 1197ms.
[12:10:36.695] <TB1> INFO: Expecting 2560 events.
[12:10:37.576] <TB1> INFO: 2560 events read in total (289ms).
[12:10:37.577] <TB1> INFO: Test took 1190ms.
[12:10:37.885] <TB1> INFO: Expecting 2560 events.
[12:10:38.766] <TB1> INFO: 2560 events read in total (290ms).
[12:10:38.766] <TB1> INFO: Test took 1189ms.
[12:10:39.073] <TB1> INFO: Expecting 2560 events.
[12:10:39.962] <TB1> INFO: 2560 events read in total (297ms).
[12:10:39.962] <TB1> INFO: Test took 1195ms.
[12:10:40.270] <TB1> INFO: Expecting 2560 events.
[12:10:41.155] <TB1> INFO: 2560 events read in total (294ms).
[12:10:41.155] <TB1> INFO: Test took 1193ms.
[12:10:41.463] <TB1> INFO: Expecting 2560 events.
[12:10:42.354] <TB1> INFO: 2560 events read in total (299ms).
[12:10:42.354] <TB1> INFO: Test took 1198ms.
[12:10:42.662] <TB1> INFO: Expecting 2560 events.
[12:10:43.547] <TB1> INFO: 2560 events read in total (293ms).
[12:10:43.547] <TB1> INFO: Test took 1192ms.
[12:10:43.855] <TB1> INFO: Expecting 2560 events.
[12:10:44.744] <TB1> INFO: 2560 events read in total (297ms).
[12:10:44.744] <TB1> INFO: Test took 1196ms.
[12:10:44.748] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:10:45.052] <TB1> INFO: Expecting 655360 events.
[12:10:59.922] <TB1> INFO: 655360 events read in total (14278ms).
[12:10:59.938] <TB1> INFO: Expecting 655360 events.
[12:11:14.436] <TB1> INFO: 655360 events read in total (14095ms).
[12:11:14.455] <TB1> INFO: Expecting 655360 events.
[12:11:29.064] <TB1> INFO: 655360 events read in total (14206ms).
[12:11:29.089] <TB1> INFO: Expecting 655360 events.
[12:11:43.691] <TB1> INFO: 655360 events read in total (14199ms).
[12:11:43.719] <TB1> INFO: Expecting 655360 events.
[12:11:58.328] <TB1> INFO: 655360 events read in total (14206ms).
[12:11:58.360] <TB1> INFO: Expecting 655360 events.
[12:12:12.938] <TB1> INFO: 655360 events read in total (14175ms).
[12:12:12.976] <TB1> INFO: Expecting 655360 events.
[12:12:27.527] <TB1> INFO: 655360 events read in total (14148ms).
[12:12:27.577] <TB1> INFO: Expecting 655360 events.
[12:12:42.104] <TB1> INFO: 655360 events read in total (14124ms).
[12:12:42.154] <TB1> INFO: Expecting 655360 events.
[12:12:56.697] <TB1> INFO: 655360 events read in total (14140ms).
[12:12:56.748] <TB1> INFO: Expecting 655360 events.
[12:13:11.448] <TB1> INFO: 655360 events read in total (14297ms).
[12:13:11.535] <TB1> INFO: Expecting 655360 events.
[12:13:26.133] <TB1> INFO: 655360 events read in total (14195ms).
[12:13:26.208] <TB1> INFO: Expecting 655360 events.
[12:13:40.890] <TB1> INFO: 655360 events read in total (14279ms).
[12:13:41.010] <TB1> INFO: Expecting 655360 events.
[12:13:55.537] <TB1> INFO: 655360 events read in total (14124ms).
[12:13:55.621] <TB1> INFO: Expecting 655360 events.
[12:14:10.130] <TB1> INFO: 655360 events read in total (14106ms).
[12:14:10.215] <TB1> INFO: Expecting 655360 events.
[12:14:24.810] <TB1> INFO: 655360 events read in total (14192ms).
[12:14:24.927] <TB1> INFO: Expecting 655360 events.
[12:14:39.517] <TB1> INFO: 655360 events read in total (14187ms).
[12:14:39.665] <TB1> INFO: Test took 234917ms.
[12:14:39.798] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:40.050] <TB1> INFO: Expecting 655360 events.
[12:14:54.519] <TB1> INFO: 655360 events read in total (13877ms).
[12:14:54.535] <TB1> INFO: Expecting 655360 events.
[12:15:08.990] <TB1> INFO: 655360 events read in total (14052ms).
[12:15:09.009] <TB1> INFO: Expecting 655360 events.
[12:15:23.335] <TB1> INFO: 655360 events read in total (13923ms).
[12:15:23.359] <TB1> INFO: Expecting 655360 events.
[12:15:37.725] <TB1> INFO: 655360 events read in total (13963ms).
[12:15:37.756] <TB1> INFO: Expecting 655360 events.
[12:15:52.125] <TB1> INFO: 655360 events read in total (13966ms).
[12:15:52.160] <TB1> INFO: Expecting 655360 events.
[12:16:06.556] <TB1> INFO: 655360 events read in total (13992ms).
[12:16:06.603] <TB1> INFO: Expecting 655360 events.
[12:16:21.075] <TB1> INFO: 655360 events read in total (14069ms).
[12:16:21.131] <TB1> INFO: Expecting 655360 events.
[12:16:35.447] <TB1> INFO: 655360 events read in total (13913ms).
[12:16:35.499] <TB1> INFO: Expecting 655360 events.
[12:16:49.685] <TB1> INFO: 655360 events read in total (13782ms).
[12:16:49.751] <TB1> INFO: Expecting 655360 events.
[12:17:03.834] <TB1> INFO: 655360 events read in total (13679ms).
[12:17:03.904] <TB1> INFO: Expecting 655360 events.
[12:17:18.329] <TB1> INFO: 655360 events read in total (14022ms).
[12:17:18.409] <TB1> INFO: Expecting 655360 events.
[12:17:32.848] <TB1> INFO: 655360 events read in total (14036ms).
[12:17:32.927] <TB1> INFO: Expecting 655360 events.
[12:17:47.371] <TB1> INFO: 655360 events read in total (14041ms).
[12:17:47.453] <TB1> INFO: Expecting 655360 events.
[12:18:02.215] <TB1> INFO: 655360 events read in total (14359ms).
[12:18:02.301] <TB1> INFO: Expecting 655360 events.
[12:18:16.741] <TB1> INFO: 655360 events read in total (14037ms).
[12:18:16.833] <TB1> INFO: Expecting 655360 events.
[12:18:31.440] <TB1> INFO: 655360 events read in total (14204ms).
[12:18:31.582] <TB1> INFO: Test took 231784ms.
[12:18:31.769] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:31.775] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:31.781] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:31.787] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[12:18:31.793] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:31.798] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[12:18:31.804] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[12:18:31.810] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[12:18:31.816] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[12:18:31.822] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:31.828] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[12:18:31.834] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:31.839] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:31.845] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:31.851] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:31.857] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:31.863] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[12:18:31.869] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:31.875] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:31.880] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[12:18:31.886] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[12:18:31.892] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[12:18:31.897] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[12:18:31.903] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[12:18:31.909] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[12:18:31.915] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:31.921] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:31.927] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:31.932] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:18:31.938] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[12:18:31.945] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[12:18:31.950] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[12:18:31.956] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[12:18:31.962] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[12:18:31.968] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[12:18:31.003] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C0.dat
[12:18:31.003] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C1.dat
[12:18:31.003] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C2.dat
[12:18:31.004] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C3.dat
[12:18:31.004] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C4.dat
[12:18:31.004] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C5.dat
[12:18:31.004] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C6.dat
[12:18:31.004] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C7.dat
[12:18:31.004] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C8.dat
[12:18:31.004] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C9.dat
[12:18:31.004] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C10.dat
[12:18:31.004] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C11.dat
[12:18:31.004] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C12.dat
[12:18:31.004] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C13.dat
[12:18:31.004] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C14.dat
[12:18:31.004] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//dacParameters35_C15.dat
[12:18:32.244] <TB1> INFO: Expecting 41600 events.
[12:18:35.401] <TB1> INFO: 41600 events read in total (2565ms).
[12:18:35.402] <TB1> INFO: Test took 3394ms.
[12:18:35.856] <TB1> INFO: Expecting 41600 events.
[12:18:38.931] <TB1> INFO: 41600 events read in total (2483ms).
[12:18:38.932] <TB1> INFO: Test took 3316ms.
[12:18:39.381] <TB1> INFO: Expecting 41600 events.
[12:18:42.513] <TB1> INFO: 41600 events read in total (2540ms).
[12:18:42.514] <TB1> INFO: Test took 3371ms.
[12:18:42.734] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:42.824] <TB1> INFO: Expecting 2560 events.
[12:18:43.710] <TB1> INFO: 2560 events read in total (295ms).
[12:18:43.710] <TB1> INFO: Test took 976ms.
[12:18:43.712] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:44.020] <TB1> INFO: Expecting 2560 events.
[12:18:44.912] <TB1> INFO: 2560 events read in total (300ms).
[12:18:44.913] <TB1> INFO: Test took 1201ms.
[12:18:44.915] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:45.221] <TB1> INFO: Expecting 2560 events.
[12:18:46.108] <TB1> INFO: 2560 events read in total (296ms).
[12:18:46.109] <TB1> INFO: Test took 1194ms.
[12:18:46.112] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:46.416] <TB1> INFO: Expecting 2560 events.
[12:18:47.309] <TB1> INFO: 2560 events read in total (301ms).
[12:18:47.309] <TB1> INFO: Test took 1197ms.
[12:18:47.312] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:47.618] <TB1> INFO: Expecting 2560 events.
[12:18:48.512] <TB1> INFO: 2560 events read in total (303ms).
[12:18:48.513] <TB1> INFO: Test took 1201ms.
[12:18:48.516] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:48.821] <TB1> INFO: Expecting 2560 events.
[12:18:49.717] <TB1> INFO: 2560 events read in total (304ms).
[12:18:49.717] <TB1> INFO: Test took 1201ms.
[12:18:49.721] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:50.025] <TB1> INFO: Expecting 2560 events.
[12:18:50.916] <TB1> INFO: 2560 events read in total (299ms).
[12:18:50.917] <TB1> INFO: Test took 1197ms.
[12:18:50.920] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:51.225] <TB1> INFO: Expecting 2560 events.
[12:18:52.119] <TB1> INFO: 2560 events read in total (303ms).
[12:18:52.120] <TB1> INFO: Test took 1200ms.
[12:18:52.123] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:52.428] <TB1> INFO: Expecting 2560 events.
[12:18:53.319] <TB1> INFO: 2560 events read in total (299ms).
[12:18:53.320] <TB1> INFO: Test took 1197ms.
[12:18:53.322] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:53.627] <TB1> INFO: Expecting 2560 events.
[12:18:54.515] <TB1> INFO: 2560 events read in total (296ms).
[12:18:54.515] <TB1> INFO: Test took 1193ms.
[12:18:54.518] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:54.824] <TB1> INFO: Expecting 2560 events.
[12:18:55.716] <TB1> INFO: 2560 events read in total (301ms).
[12:18:55.717] <TB1> INFO: Test took 1199ms.
[12:18:55.720] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:56.026] <TB1> INFO: Expecting 2560 events.
[12:18:56.913] <TB1> INFO: 2560 events read in total (295ms).
[12:18:56.914] <TB1> INFO: Test took 1194ms.
[12:18:56.919] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:57.223] <TB1> INFO: Expecting 2560 events.
[12:18:58.110] <TB1> INFO: 2560 events read in total (295ms).
[12:18:58.111] <TB1> INFO: Test took 1192ms.
[12:18:58.114] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:58.418] <TB1> INFO: Expecting 2560 events.
[12:18:59.307] <TB1> INFO: 2560 events read in total (298ms).
[12:18:59.307] <TB1> INFO: Test took 1193ms.
[12:18:59.311] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:59.617] <TB1> INFO: Expecting 2560 events.
[12:19:00.508] <TB1> INFO: 2560 events read in total (299ms).
[12:19:00.508] <TB1> INFO: Test took 1197ms.
[12:19:00.511] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:00.817] <TB1> INFO: Expecting 2560 events.
[12:19:01.709] <TB1> INFO: 2560 events read in total (300ms).
[12:19:01.710] <TB1> INFO: Test took 1199ms.
[12:19:01.714] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:02.017] <TB1> INFO: Expecting 2560 events.
[12:19:02.906] <TB1> INFO: 2560 events read in total (298ms).
[12:19:02.906] <TB1> INFO: Test took 1192ms.
[12:19:02.908] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:03.215] <TB1> INFO: Expecting 2560 events.
[12:19:04.106] <TB1> INFO: 2560 events read in total (299ms).
[12:19:04.107] <TB1> INFO: Test took 1199ms.
[12:19:04.111] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:04.415] <TB1> INFO: Expecting 2560 events.
[12:19:05.308] <TB1> INFO: 2560 events read in total (301ms).
[12:19:05.309] <TB1> INFO: Test took 1198ms.
[12:19:05.312] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:05.616] <TB1> INFO: Expecting 2560 events.
[12:19:06.507] <TB1> INFO: 2560 events read in total (299ms).
[12:19:06.508] <TB1> INFO: Test took 1196ms.
[12:19:06.511] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:06.816] <TB1> INFO: Expecting 2560 events.
[12:19:07.709] <TB1> INFO: 2560 events read in total (301ms).
[12:19:07.709] <TB1> INFO: Test took 1199ms.
[12:19:07.711] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:08.019] <TB1> INFO: Expecting 2560 events.
[12:19:08.908] <TB1> INFO: 2560 events read in total (298ms).
[12:19:08.908] <TB1> INFO: Test took 1197ms.
[12:19:08.911] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:09.217] <TB1> INFO: Expecting 2560 events.
[12:19:10.108] <TB1> INFO: 2560 events read in total (299ms).
[12:19:10.109] <TB1> INFO: Test took 1198ms.
[12:19:10.113] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:10.416] <TB1> INFO: Expecting 2560 events.
[12:19:11.307] <TB1> INFO: 2560 events read in total (299ms).
[12:19:11.307] <TB1> INFO: Test took 1194ms.
[12:19:11.311] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:11.616] <TB1> INFO: Expecting 2560 events.
[12:19:12.513] <TB1> INFO: 2560 events read in total (306ms).
[12:19:12.513] <TB1> INFO: Test took 1202ms.
[12:19:12.518] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:12.822] <TB1> INFO: Expecting 2560 events.
[12:19:13.718] <TB1> INFO: 2560 events read in total (304ms).
[12:19:13.718] <TB1> INFO: Test took 1201ms.
[12:19:13.722] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:14.026] <TB1> INFO: Expecting 2560 events.
[12:19:14.920] <TB1> INFO: 2560 events read in total (302ms).
[12:19:14.920] <TB1> INFO: Test took 1199ms.
[12:19:14.923] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:15.229] <TB1> INFO: Expecting 2560 events.
[12:19:16.119] <TB1> INFO: 2560 events read in total (298ms).
[12:19:16.119] <TB1> INFO: Test took 1196ms.
[12:19:16.122] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:16.428] <TB1> INFO: Expecting 2560 events.
[12:19:17.322] <TB1> INFO: 2560 events read in total (302ms).
[12:19:17.322] <TB1> INFO: Test took 1200ms.
[12:19:17.328] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:17.630] <TB1> INFO: Expecting 2560 events.
[12:19:18.525] <TB1> INFO: 2560 events read in total (304ms).
[12:19:18.526] <TB1> INFO: Test took 1198ms.
[12:19:18.529] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:18.834] <TB1> INFO: Expecting 2560 events.
[12:19:19.728] <TB1> INFO: 2560 events read in total (302ms).
[12:19:19.728] <TB1> INFO: Test took 1199ms.
[12:19:19.740] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:19:20.036] <TB1> INFO: Expecting 2560 events.
[12:19:20.929] <TB1> INFO: 2560 events read in total (301ms).
[12:19:20.930] <TB1> INFO: Test took 1191ms.
[12:19:21.410] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 650 seconds
[12:19:21.410] <TB1> INFO: PH scale (per ROC): 44 58 35 34 45 54 56 47 43 42 41 34 47 41 54 43
[12:19:21.410] <TB1> INFO: PH offset (per ROC): 108 123 102 83 108 130 127 122 119 84 98 111 115 105 117 118
[12:19:21.420] <TB1> INFO: Decoding statistics:
[12:19:21.420] <TB1> INFO: General information:
[12:19:21.420] <TB1> INFO: 16bit words read: 127884
[12:19:21.420] <TB1> INFO: valid events total: 20480
[12:19:21.420] <TB1> INFO: empty events: 17978
[12:19:21.420] <TB1> INFO: valid events with pixels: 2502
[12:19:21.420] <TB1> INFO: valid pixel hits: 2502
[12:19:21.420] <TB1> INFO: Event errors: 0
[12:19:21.420] <TB1> INFO: start marker: 0
[12:19:21.420] <TB1> INFO: stop marker: 0
[12:19:21.420] <TB1> INFO: overflow: 0
[12:19:21.420] <TB1> INFO: invalid 5bit words: 0
[12:19:21.420] <TB1> INFO: invalid XOR eye diagram: 0
[12:19:21.420] <TB1> INFO: frame (failed synchr.): 0
[12:19:21.420] <TB1> INFO: idle data (no TBM trl): 0
[12:19:21.420] <TB1> INFO: no data (only TBM hdr): 0
[12:19:21.420] <TB1> INFO: TBM errors: 0
[12:19:21.420] <TB1> INFO: flawed TBM headers: 0
[12:19:21.420] <TB1> INFO: flawed TBM trailers: 0
[12:19:21.421] <TB1> INFO: event ID mismatches: 0
[12:19:21.421] <TB1> INFO: ROC errors: 0
[12:19:21.421] <TB1> INFO: missing ROC header(s): 0
[12:19:21.421] <TB1> INFO: misplaced readback start: 0
[12:19:21.421] <TB1> INFO: Pixel decoding errors: 0
[12:19:21.421] <TB1> INFO: pixel data incomplete: 0
[12:19:21.421] <TB1> INFO: pixel address: 0
[12:19:21.421] <TB1> INFO: pulse height fill bit: 0
[12:19:21.421] <TB1> INFO: buffer corruption: 0
[12:19:21.587] <TB1> INFO: ######################################################################
[12:19:21.587] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[12:19:21.587] <TB1> INFO: ######################################################################
[12:19:21.601] <TB1> INFO: scanning low vcal = 10
[12:19:21.840] <TB1> INFO: Expecting 41600 events.
[12:19:25.429] <TB1> INFO: 41600 events read in total (2997ms).
[12:19:25.429] <TB1> INFO: Test took 3828ms.
[12:19:25.431] <TB1> INFO: scanning low vcal = 20
[12:19:25.727] <TB1> INFO: Expecting 41600 events.
[12:19:29.325] <TB1> INFO: 41600 events read in total (3006ms).
[12:19:29.326] <TB1> INFO: Test took 3895ms.
[12:19:29.327] <TB1> INFO: scanning low vcal = 30
[12:19:29.625] <TB1> INFO: Expecting 41600 events.
[12:19:33.298] <TB1> INFO: 41600 events read in total (3081ms).
[12:19:33.299] <TB1> INFO: Test took 3972ms.
[12:19:33.301] <TB1> INFO: scanning low vcal = 40
[12:19:33.578] <TB1> INFO: Expecting 41600 events.
[12:19:37.566] <TB1> INFO: 41600 events read in total (3396ms).
[12:19:37.567] <TB1> INFO: Test took 4266ms.
[12:19:37.569] <TB1> INFO: scanning low vcal = 50
[12:19:37.846] <TB1> INFO: Expecting 41600 events.
[12:19:41.830] <TB1> INFO: 41600 events read in total (3392ms).
[12:19:41.831] <TB1> INFO: Test took 4261ms.
[12:19:41.834] <TB1> INFO: scanning low vcal = 60
[12:19:42.110] <TB1> INFO: Expecting 41600 events.
[12:19:46.126] <TB1> INFO: 41600 events read in total (3424ms).
[12:19:46.127] <TB1> INFO: Test took 4293ms.
[12:19:46.129] <TB1> INFO: scanning low vcal = 70
[12:19:46.406] <TB1> INFO: Expecting 41600 events.
[12:19:50.427] <TB1> INFO: 41600 events read in total (3429ms).
[12:19:50.427] <TB1> INFO: Test took 4297ms.
[12:19:50.431] <TB1> INFO: scanning low vcal = 80
[12:19:50.707] <TB1> INFO: Expecting 41600 events.
[12:19:54.716] <TB1> INFO: 41600 events read in total (3417ms).
[12:19:54.717] <TB1> INFO: Test took 4286ms.
[12:19:54.720] <TB1> INFO: scanning low vcal = 90
[12:19:54.996] <TB1> INFO: Expecting 41600 events.
[12:19:58.976] <TB1> INFO: 41600 events read in total (3388ms).
[12:19:58.977] <TB1> INFO: Test took 4257ms.
[12:19:58.981] <TB1> INFO: scanning low vcal = 100
[12:19:59.258] <TB1> INFO: Expecting 41600 events.
[12:20:03.253] <TB1> INFO: 41600 events read in total (3404ms).
[12:20:03.254] <TB1> INFO: Test took 4273ms.
[12:20:03.257] <TB1> INFO: scanning low vcal = 110
[12:20:03.534] <TB1> INFO: Expecting 41600 events.
[12:20:07.523] <TB1> INFO: 41600 events read in total (3397ms).
[12:20:07.524] <TB1> INFO: Test took 4266ms.
[12:20:07.527] <TB1> INFO: scanning low vcal = 120
[12:20:07.804] <TB1> INFO: Expecting 41600 events.
[12:20:11.813] <TB1> INFO: 41600 events read in total (3418ms).
[12:20:11.814] <TB1> INFO: Test took 4287ms.
[12:20:11.817] <TB1> INFO: scanning low vcal = 130
[12:20:12.094] <TB1> INFO: Expecting 41600 events.
[12:20:16.100] <TB1> INFO: 41600 events read in total (3414ms).
[12:20:16.102] <TB1> INFO: Test took 4285ms.
[12:20:16.105] <TB1> INFO: scanning low vcal = 140
[12:20:16.382] <TB1> INFO: Expecting 41600 events.
[12:20:20.459] <TB1> INFO: 41600 events read in total (3486ms).
[12:20:20.460] <TB1> INFO: Test took 4355ms.
[12:20:20.463] <TB1> INFO: scanning low vcal = 150
[12:20:20.788] <TB1> INFO: Expecting 41600 events.
[12:20:24.735] <TB1> INFO: 41600 events read in total (3355ms).
[12:20:24.735] <TB1> INFO: Test took 4272ms.
[12:20:24.738] <TB1> INFO: scanning low vcal = 160
[12:20:25.015] <TB1> INFO: Expecting 41600 events.
[12:20:28.975] <TB1> INFO: 41600 events read in total (3368ms).
[12:20:28.976] <TB1> INFO: Test took 4237ms.
[12:20:28.980] <TB1> INFO: scanning low vcal = 170
[12:20:29.256] <TB1> INFO: Expecting 41600 events.
[12:20:33.224] <TB1> INFO: 41600 events read in total (3376ms).
[12:20:33.225] <TB1> INFO: Test took 4245ms.
[12:20:33.231] <TB1> INFO: scanning low vcal = 180
[12:20:33.505] <TB1> INFO: Expecting 41600 events.
[12:20:37.452] <TB1> INFO: 41600 events read in total (3355ms).
[12:20:37.453] <TB1> INFO: Test took 4222ms.
[12:20:37.456] <TB1> INFO: scanning low vcal = 190
[12:20:37.733] <TB1> INFO: Expecting 41600 events.
[12:20:41.709] <TB1> INFO: 41600 events read in total (3385ms).
[12:20:41.710] <TB1> INFO: Test took 4254ms.
[12:20:41.713] <TB1> INFO: scanning low vcal = 200
[12:20:41.989] <TB1> INFO: Expecting 41600 events.
[12:20:45.980] <TB1> INFO: 41600 events read in total (3399ms).
[12:20:45.981] <TB1> INFO: Test took 4268ms.
[12:20:45.984] <TB1> INFO: scanning low vcal = 210
[12:20:46.260] <TB1> INFO: Expecting 41600 events.
[12:20:50.225] <TB1> INFO: 41600 events read in total (3373ms).
[12:20:50.225] <TB1> INFO: Test took 4241ms.
[12:20:50.228] <TB1> INFO: scanning low vcal = 220
[12:20:50.505] <TB1> INFO: Expecting 41600 events.
[12:20:54.531] <TB1> INFO: 41600 events read in total (3434ms).
[12:20:54.532] <TB1> INFO: Test took 4304ms.
[12:20:54.535] <TB1> INFO: scanning low vcal = 230
[12:20:54.812] <TB1> INFO: Expecting 41600 events.
[12:20:58.825] <TB1> INFO: 41600 events read in total (3421ms).
[12:20:58.826] <TB1> INFO: Test took 4291ms.
[12:20:58.829] <TB1> INFO: scanning low vcal = 240
[12:20:59.106] <TB1> INFO: Expecting 41600 events.
[12:21:03.184] <TB1> INFO: 41600 events read in total (3487ms).
[12:21:03.184] <TB1> INFO: Test took 4356ms.
[12:21:03.188] <TB1> INFO: scanning low vcal = 250
[12:21:03.464] <TB1> INFO: Expecting 41600 events.
[12:21:07.496] <TB1> INFO: 41600 events read in total (3440ms).
[12:21:07.497] <TB1> INFO: Test took 4309ms.
[12:21:07.501] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[12:21:07.777] <TB1> INFO: Expecting 41600 events.
[12:21:11.798] <TB1> INFO: 41600 events read in total (3429ms).
[12:21:11.799] <TB1> INFO: Test took 4298ms.
[12:21:11.802] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[12:21:12.078] <TB1> INFO: Expecting 41600 events.
[12:21:16.124] <TB1> INFO: 41600 events read in total (3454ms).
[12:21:16.125] <TB1> INFO: Test took 4322ms.
[12:21:16.128] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[12:21:16.405] <TB1> INFO: Expecting 41600 events.
[12:21:20.474] <TB1> INFO: 41600 events read in total (3477ms).
[12:21:20.475] <TB1> INFO: Test took 4347ms.
[12:21:20.479] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[12:21:20.754] <TB1> INFO: Expecting 41600 events.
[12:21:24.745] <TB1> INFO: 41600 events read in total (3399ms).
[12:21:24.746] <TB1> INFO: Test took 4267ms.
[12:21:24.749] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:21:25.025] <TB1> INFO: Expecting 41600 events.
[12:21:28.974] <TB1> INFO: 41600 events read in total (3357ms).
[12:21:28.975] <TB1> INFO: Test took 4226ms.
[12:21:29.378] <TB1> INFO: PixTestGainPedestal::measure() done
[12:22:03.416] <TB1> INFO: PixTestGainPedestal::fit() done
[12:22:03.416] <TB1> INFO: non-linearity mean: 0.959 0.984 0.943 1.001 0.940 0.983 0.981 0.982 0.946 0.931 0.952 0.963 0.964 0.963 0.980 0.942
[12:22:03.416] <TB1> INFO: non-linearity RMS: 0.038 0.004 0.117 0.158 0.067 0.005 0.004 0.004 0.060 0.128 0.133 0.166 0.038 0.028 0.004 0.055
[12:22:03.416] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C0.dat
[12:22:03.430] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C1.dat
[12:22:03.443] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C2.dat
[12:22:03.457] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C3.dat
[12:22:03.470] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C4.dat
[12:22:03.483] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C5.dat
[12:22:03.496] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C6.dat
[12:22:03.509] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C7.dat
[12:22:03.522] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C8.dat
[12:22:03.535] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C9.dat
[12:22:03.548] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C10.dat
[12:22:03.561] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C11.dat
[12:22:03.574] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C12.dat
[12:22:03.587] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C13.dat
[12:22:03.600] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C14.dat
[12:22:03.613] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_10h38m_1477384707//001_Fulltest_p17//phCalibrationFitErr35_C15.dat
[12:22:03.627] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 162 seconds
[12:22:03.627] <TB1> INFO: Decoding statistics:
[12:22:03.627] <TB1> INFO: General information:
[12:22:03.627] <TB1> INFO: 16bit words read: 3284204
[12:22:03.627] <TB1> INFO: valid events total: 332800
[12:22:03.627] <TB1> INFO: empty events: 2793
[12:22:03.627] <TB1> INFO: valid events with pixels: 330007
[12:22:03.627] <TB1> INFO: valid pixel hits: 643702
[12:22:03.627] <TB1> INFO: Event errors: 0
[12:22:03.627] <TB1> INFO: start marker: 0
[12:22:03.627] <TB1> INFO: stop marker: 0
[12:22:03.627] <TB1> INFO: overflow: 0
[12:22:03.627] <TB1> INFO: invalid 5bit words: 0
[12:22:03.627] <TB1> INFO: invalid XOR eye diagram: 0
[12:22:03.627] <TB1> INFO: frame (failed synchr.): 0
[12:22:03.627] <TB1> INFO: idle data (no TBM trl): 0
[12:22:03.627] <TB1> INFO: no data (only TBM hdr): 0
[12:22:03.627] <TB1> INFO: TBM errors: 0
[12:22:03.627] <TB1> INFO: flawed TBM headers: 0
[12:22:03.627] <TB1> INFO: flawed TBM trailers: 0
[12:22:03.627] <TB1> INFO: event ID mismatches: 0
[12:22:03.627] <TB1> INFO: ROC errors: 0
[12:22:03.627] <TB1> INFO: missing ROC header(s): 0
[12:22:03.627] <TB1> INFO: misplaced readback start: 0
[12:22:03.627] <TB1> INFO: Pixel decoding errors: 0
[12:22:03.627] <TB1> INFO: pixel data incomplete: 0
[12:22:03.627] <TB1> INFO: pixel address: 0
[12:22:03.627] <TB1> INFO: pulse height fill bit: 0
[12:22:03.627] <TB1> INFO: buffer corruption: 0
[12:22:03.644] <TB1> INFO: Decoding statistics:
[12:22:03.644] <TB1> INFO: General information:
[12:22:03.644] <TB1> INFO: 16bit words read: 3413624
[12:22:03.644] <TB1> INFO: valid events total: 353536
[12:22:03.644] <TB1> INFO: empty events: 21027
[12:22:03.644] <TB1> INFO: valid events with pixels: 332509
[12:22:03.644] <TB1> INFO: valid pixel hits: 646204
[12:22:03.644] <TB1> INFO: Event errors: 0
[12:22:03.644] <TB1> INFO: start marker: 0
[12:22:03.644] <TB1> INFO: stop marker: 0
[12:22:03.644] <TB1> INFO: overflow: 0
[12:22:03.644] <TB1> INFO: invalid 5bit words: 0
[12:22:03.644] <TB1> INFO: invalid XOR eye diagram: 0
[12:22:03.644] <TB1> INFO: frame (failed synchr.): 0
[12:22:03.644] <TB1> INFO: idle data (no TBM trl): 0
[12:22:03.644] <TB1> INFO: no data (only TBM hdr): 0
[12:22:03.644] <TB1> INFO: TBM errors: 0
[12:22:03.644] <TB1> INFO: flawed TBM headers: 0
[12:22:03.644] <TB1> INFO: flawed TBM trailers: 0
[12:22:03.644] <TB1> INFO: event ID mismatches: 0
[12:22:03.644] <TB1> INFO: ROC errors: 0
[12:22:03.644] <TB1> INFO: missing ROC header(s): 0
[12:22:03.644] <TB1> INFO: misplaced readback start: 0
[12:22:03.644] <TB1> INFO: Pixel decoding errors: 0
[12:22:03.644] <TB1> INFO: pixel data incomplete: 0
[12:22:03.644] <TB1> INFO: pixel address: 0
[12:22:03.644] <TB1> INFO: pulse height fill bit: 0
[12:22:03.644] <TB1> INFO: buffer corruption: 0
[12:22:03.644] <TB1> INFO: enter test to run
[12:22:03.644] <TB1> INFO: test: exit no parameter change
[12:22:03.770] <TB1> QUIET: Connection to board 154 closed.
[12:22:03.770] <TB1> INFO: pXar: this is the end, my friend