[13:27:17.160] <TB1> INFO: *** Welcome to pxar ***
[13:27:17.160] <TB1> INFO: *** Today: 2016/10/25
[13:27:17.166] <TB1> INFO: *** Version: c8ba-dirty
[13:27:17.166] <TB1> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters_C15.dat
[13:27:17.167] <TB1> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//tbmParameters_C1b.dat
[13:27:17.167] <TB1> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//defaultMaskFile.dat
[13:27:17.167] <TB1> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//trimParameters_C15.dat
[13:27:17.230] <TB1> INFO: clk: 4
[13:27:17.230] <TB1> INFO: ctr: 4
[13:27:17.230] <TB1> INFO: sda: 19
[13:27:17.230] <TB1> INFO: tin: 9
[13:27:17.230] <TB1> INFO: level: 15
[13:27:17.230] <TB1> INFO: triggerdelay: 0
[13:27:17.230] <TB1> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[13:27:17.230] <TB1> INFO: Log level: INFO
[13:27:17.239] <TB1> INFO: Found DTB DTB_WXC03A
[13:27:17.250] <TB1> QUIET: Connection to board DTB_WXC03A opened.
[13:27:17.252] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 154
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC03A
MAC address: 40D85511809A
Hostname: pixelDTB154
Comment:
------------------------------------------------------
[13:27:17.254] <TB1> INFO: RPC call hashes of host and DTB match: 486171790
[13:27:18.743] <TB1> INFO: DUT info:
[13:27:18.743] <TB1> INFO: The DUT currently contains the following objects:
[13:27:18.743] <TB1> INFO: 4 TBM Cores tbm10c (4 ON)
[13:27:18.743] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:27:18.743] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:27:18.743] <TB1> INFO: TBM Core alpha (2): 7 registers set
[13:27:18.743] <TB1> INFO: TBM Core beta (3): 7 registers set
[13:27:18.743] <TB1> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[13:27:18.743] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:18.744] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:18.744] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:18.744] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:18.744] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:18.744] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:18.744] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:18.744] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:18.744] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:18.744] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:18.744] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:18.744] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:18.744] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:18.744] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:18.744] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:18.744] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:19.145] <TB1> INFO: enter 'restricted' command line mode
[13:27:19.145] <TB1> INFO: enter test to run
[13:27:19.145] <TB1> INFO: test: pretest no parameter change
[13:27:19.145] <TB1> INFO: running: pretest
[13:27:19.149] <TB1> INFO: ######################################################################
[13:27:19.149] <TB1> INFO: PixTestPretest::doTest()
[13:27:19.149] <TB1> INFO: ######################################################################
[13:27:19.151] <TB1> INFO: ----------------------------------------------------------------------
[13:27:19.151] <TB1> INFO: PixTestPretest::programROC()
[13:27:19.151] <TB1> INFO: ----------------------------------------------------------------------
[13:27:37.164] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[13:27:37.164] <TB1> INFO: IA differences per ROC: 19.3 20.1 19.3 16.9 18.5 17.7 17.7 18.5 16.1 20.9 19.3 15.3 15.3 16.9 18.5 14.5
[13:27:37.223] <TB1> INFO: ----------------------------------------------------------------------
[13:27:37.223] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[13:27:37.223] <TB1> INFO: ----------------------------------------------------------------------
[13:27:58.523] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 403.6 mA = 25.225 mA/ROC
[13:27:58.523] <TB1> INFO: i(loss) [mA/ROC]: 20.1 19.3 20.1 19.3 20.1 20.9 20.9 20.9 20.1 20.1 20.1 19.3 20.1 19.3 20.9 20.1
[13:27:58.559] <TB1> INFO: ----------------------------------------------------------------------
[13:27:58.559] <TB1> INFO: PixTestPretest::findTiming()
[13:27:58.559] <TB1> INFO: ----------------------------------------------------------------------
[13:27:58.559] <TB1> INFO: PixTestCmd::init()

[13:28:31.010] <TB1> INFO: TBM phases: 160MHz: 0, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[13:28:31.010] <TB1> INFO: (success/tries = 100/100), width = 4
[13:28:32.515] <TB1> INFO: ----------------------------------------------------------------------
[13:28:32.515] <TB1> INFO: PixTestPretest::findWorkingPixel()
[13:28:32.515] <TB1> INFO: ----------------------------------------------------------------------
[13:28:32.610] <TB1> INFO: Expecting 231680 events.
[13:28:42.471] <TB1> INFO: 231680 events read in total (9269ms).
[13:28:42.481] <TB1> INFO: Test took 9961ms.
[13:28:42.730] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[13:28:42.766] <TB1> INFO: ----------------------------------------------------------------------
[13:28:42.766] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[13:28:42.766] <TB1> INFO: ----------------------------------------------------------------------
[13:28:42.861] <TB1> INFO: Expecting 231680 events.
[13:28:52.778] <TB1> INFO: 231680 events read in total (9325ms).
[13:28:52.789] <TB1> INFO: Test took 10018ms.
[13:28:53.055] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[13:28:53.055] <TB1> INFO: CalDel: 106 90 111 85 106 98 87 116 98 97 96 93 89 111 78 102
[13:28:53.055] <TB1> INFO: VthrComp: 56 52 51 51 51 52 51 51 51 52 53 51 51 51 52 51
[13:28:53.059] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters_C0.dat
[13:28:53.059] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters_C1.dat
[13:28:53.059] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters_C2.dat
[13:28:53.059] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters_C3.dat
[13:28:53.060] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters_C4.dat
[13:28:53.060] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters_C5.dat
[13:28:53.060] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters_C6.dat
[13:28:53.060] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters_C7.dat
[13:28:53.060] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters_C8.dat
[13:28:53.060] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters_C9.dat
[13:28:53.060] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters_C10.dat
[13:28:53.061] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters_C11.dat
[13:28:53.061] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters_C12.dat
[13:28:53.061] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters_C13.dat
[13:28:53.061] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters_C14.dat
[13:28:53.061] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters_C15.dat
[13:28:53.061] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//tbmParameters_C0a.dat
[13:28:53.061] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//tbmParameters_C0b.dat
[13:28:53.062] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//tbmParameters_C1a.dat
[13:28:53.062] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//tbmParameters_C1b.dat
[13:28:53.062] <TB1> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[13:28:53.115] <TB1> INFO: enter test to run
[13:28:53.115] <TB1> INFO: test: FullTest no parameter change
[13:28:53.115] <TB1> INFO: running: fulltest
[13:28:53.115] <TB1> INFO: ######################################################################
[13:28:53.115] <TB1> INFO: PixTestFullTest::doTest()
[13:28:53.115] <TB1> INFO: ######################################################################
[13:28:53.116] <TB1> INFO: ######################################################################
[13:28:53.116] <TB1> INFO: PixTestAlive::doTest()
[13:28:53.116] <TB1> INFO: ######################################################################
[13:28:53.117] <TB1> INFO: ----------------------------------------------------------------------
[13:28:53.117] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:28:53.117] <TB1> INFO: ----------------------------------------------------------------------
[13:28:53.360] <TB1> INFO: Expecting 41600 events.
[13:28:56.883] <TB1> INFO: 41600 events read in total (2932ms).
[13:28:56.884] <TB1> INFO: Test took 3765ms.
[13:28:57.116] <TB1> INFO: PixTestAlive::aliveTest() done
[13:28:57.116] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:28:57.118] <TB1> INFO: ----------------------------------------------------------------------
[13:28:57.118] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:28:57.118] <TB1> INFO: ----------------------------------------------------------------------
[13:28:57.363] <TB1> INFO: Expecting 41600 events.
[13:29:00.413] <TB1> INFO: 41600 events read in total (2458ms).
[13:29:00.414] <TB1> INFO: Test took 3294ms.
[13:29:00.415] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[13:29:00.654] <TB1> INFO: PixTestAlive::maskTest() done
[13:29:00.654] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:29:00.656] <TB1> INFO: ----------------------------------------------------------------------
[13:29:00.656] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:29:00.656] <TB1> INFO: ----------------------------------------------------------------------
[13:29:00.895] <TB1> INFO: Expecting 41600 events.
[13:29:04.392] <TB1> INFO: 41600 events read in total (2906ms).
[13:29:04.392] <TB1> INFO: Test took 3734ms.
[13:29:04.627] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[13:29:04.627] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:29:04.627] <TB1> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[13:29:04.627] <TB1> INFO: Decoding statistics:
[13:29:04.627] <TB1> INFO: General information:
[13:29:04.627] <TB1> INFO: 16bit words read: 0
[13:29:04.627] <TB1> INFO: valid events total: 0
[13:29:04.627] <TB1> INFO: empty events: 0
[13:29:04.627] <TB1> INFO: valid events with pixels: 0
[13:29:04.627] <TB1> INFO: valid pixel hits: 0
[13:29:04.627] <TB1> INFO: Event errors: 0
[13:29:04.627] <TB1> INFO: start marker: 0
[13:29:04.627] <TB1> INFO: stop marker: 0
[13:29:04.627] <TB1> INFO: overflow: 0
[13:29:04.627] <TB1> INFO: invalid 5bit words: 0
[13:29:04.627] <TB1> INFO: invalid XOR eye diagram: 0
[13:29:04.627] <TB1> INFO: frame (failed synchr.): 0
[13:29:04.627] <TB1> INFO: idle data (no TBM trl): 0
[13:29:04.627] <TB1> INFO: no data (only TBM hdr): 0
[13:29:04.627] <TB1> INFO: TBM errors: 0
[13:29:04.627] <TB1> INFO: flawed TBM headers: 0
[13:29:04.627] <TB1> INFO: flawed TBM trailers: 0
[13:29:04.627] <TB1> INFO: event ID mismatches: 0
[13:29:04.627] <TB1> INFO: ROC errors: 0
[13:29:04.627] <TB1> INFO: missing ROC header(s): 0
[13:29:04.627] <TB1> INFO: misplaced readback start: 0
[13:29:04.627] <TB1> INFO: Pixel decoding errors: 0
[13:29:04.627] <TB1> INFO: pixel data incomplete: 0
[13:29:04.627] <TB1> INFO: pixel address: 0
[13:29:04.628] <TB1> INFO: pulse height fill bit: 0
[13:29:04.628] <TB1> INFO: buffer corruption: 0
[13:29:04.635] <TB1> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C15.dat
[13:29:04.636] <TB1> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//phCalibrationFitErr_C15.dat

[13:29:04.636] <TB1> INFO: ######################################################################
[13:29:04.636] <TB1> INFO: PixTestReadback::doTest()
[13:29:04.636] <TB1> INFO: ######################################################################
[13:29:04.636] <TB1> INFO: ----------------------------------------------------------------------
[13:29:04.636] <TB1> INFO: PixTestReadback::CalibrateVd()
[13:29:04.636] <TB1> INFO: ----------------------------------------------------------------------
[13:29:14.603] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C0.dat
[13:29:14.603] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C1.dat
[13:29:14.603] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C2.dat
[13:29:14.603] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C3.dat
[13:29:14.603] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C4.dat
[13:29:14.603] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C5.dat
[13:29:14.603] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C6.dat
[13:29:14.603] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C7.dat
[13:29:14.603] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C8.dat
[13:29:14.604] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C9.dat
[13:29:14.604] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C10.dat
[13:29:14.604] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C11.dat
[13:29:14.604] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C12.dat
[13:29:14.604] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C13.dat
[13:29:14.604] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C14.dat
[13:29:14.604] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C15.dat
[13:29:14.636] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[13:29:14.636] <TB1> INFO: ----------------------------------------------------------------------
[13:29:14.636] <TB1> INFO: PixTestReadback::CalibrateVa()
[13:29:14.636] <TB1> INFO: ----------------------------------------------------------------------
[13:29:24.573] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C0.dat
[13:29:24.573] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C1.dat
[13:29:24.573] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C2.dat
[13:29:24.573] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C3.dat
[13:29:24.573] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C4.dat
[13:29:24.573] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C5.dat
[13:29:24.573] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C6.dat
[13:29:24.573] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C7.dat
[13:29:24.574] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C8.dat
[13:29:24.574] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C9.dat
[13:29:24.574] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C10.dat
[13:29:24.574] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C11.dat
[13:29:24.574] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C12.dat
[13:29:24.574] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C13.dat
[13:29:24.574] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C14.dat
[13:29:24.574] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C15.dat
[13:29:24.605] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[13:29:24.605] <TB1> INFO: ----------------------------------------------------------------------
[13:29:24.605] <TB1> INFO: PixTestReadback::readbackVbg()
[13:29:24.605] <TB1> INFO: ----------------------------------------------------------------------
[13:29:32.278] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[13:29:32.278] <TB1> INFO: ----------------------------------------------------------------------
[13:29:32.278] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[13:29:32.278] <TB1> INFO: ----------------------------------------------------------------------
[13:29:32.278] <TB1> INFO: Vbg will be calibrated using Vd calibration
[13:29:32.278] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 151.8calibrated Vbg = 1.19533 :::*/*/*/*/
[13:29:32.278] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 150.1calibrated Vbg = 1.19279 :::*/*/*/*/
[13:29:32.279] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 160.2calibrated Vbg = 1.18603 :::*/*/*/*/
[13:29:32.279] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 162.2calibrated Vbg = 1.18641 :::*/*/*/*/
[13:29:32.279] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 161.3calibrated Vbg = 1.18898 :::*/*/*/*/
[13:29:32.279] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 163.3calibrated Vbg = 1.18939 :::*/*/*/*/
[13:29:32.279] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 158.7calibrated Vbg = 1.19317 :::*/*/*/*/
[13:29:32.279] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 152.8calibrated Vbg = 1.19327 :::*/*/*/*/
[13:29:32.279] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 154.8calibrated Vbg = 1.18669 :::*/*/*/*/
[13:29:32.279] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 151calibrated Vbg = 1.18845 :::*/*/*/*/
[13:29:32.279] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 155.9calibrated Vbg = 1.1838 :::*/*/*/*/
[13:29:32.279] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 156.8calibrated Vbg = 1.17774 :::*/*/*/*/
[13:29:32.279] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 151.7calibrated Vbg = 1.17777 :::*/*/*/*/
[13:29:32.279] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 159calibrated Vbg = 1.17928 :::*/*/*/*/
[13:29:32.279] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 148.8calibrated Vbg = 1.18406 :::*/*/*/*/
[13:29:32.279] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 156.7calibrated Vbg = 1.18683 :::*/*/*/*/
[13:29:32.282] <TB1> INFO: ----------------------------------------------------------------------
[13:29:32.282] <TB1> INFO: PixTestReadback::CalibrateIa()
[13:29:32.282] <TB1> INFO: ----------------------------------------------------------------------
[13:32:13.097] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C0.dat
[13:32:13.097] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C1.dat
[13:32:13.097] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C2.dat
[13:32:13.097] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C3.dat
[13:32:13.097] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C4.dat
[13:32:13.097] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C5.dat
[13:32:13.097] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C6.dat
[13:32:13.097] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C7.dat
[13:32:13.097] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C8.dat
[13:32:13.097] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C9.dat
[13:32:13.098] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C10.dat
[13:32:13.098] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C11.dat
[13:32:13.098] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C12.dat
[13:32:13.098] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C13.dat
[13:32:13.098] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C14.dat
[13:32:13.098] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//readbackCal_C15.dat
[13:32:13.125] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[13:32:13.126] <TB1> INFO: PixTestReadback::doTest() done
[13:32:13.127] <TB1> INFO: Decoding statistics:
[13:32:13.127] <TB1> INFO: General information:
[13:32:13.127] <TB1> INFO: 16bit words read: 1536
[13:32:13.127] <TB1> INFO: valid events total: 256
[13:32:13.127] <TB1> INFO: empty events: 256
[13:32:13.127] <TB1> INFO: valid events with pixels: 0
[13:32:13.127] <TB1> INFO: valid pixel hits: 0
[13:32:13.127] <TB1> INFO: Event errors: 0
[13:32:13.127] <TB1> INFO: start marker: 0
[13:32:13.127] <TB1> INFO: stop marker: 0
[13:32:13.127] <TB1> INFO: overflow: 0
[13:32:13.127] <TB1> INFO: invalid 5bit words: 0
[13:32:13.127] <TB1> INFO: invalid XOR eye diagram: 0
[13:32:13.127] <TB1> INFO: frame (failed synchr.): 0
[13:32:13.127] <TB1> INFO: idle data (no TBM trl): 0
[13:32:13.127] <TB1> INFO: no data (only TBM hdr): 0
[13:32:13.127] <TB1> INFO: TBM errors: 0
[13:32:13.127] <TB1> INFO: flawed TBM headers: 0
[13:32:13.127] <TB1> INFO: flawed TBM trailers: 0
[13:32:13.127] <TB1> INFO: event ID mismatches: 0
[13:32:13.127] <TB1> INFO: ROC errors: 0
[13:32:13.127] <TB1> INFO: missing ROC header(s): 0
[13:32:13.127] <TB1> INFO: misplaced readback start: 0
[13:32:13.127] <TB1> INFO: Pixel decoding errors: 0
[13:32:13.127] <TB1> INFO: pixel data incomplete: 0
[13:32:13.127] <TB1> INFO: pixel address: 0
[13:32:13.127] <TB1> INFO: pulse height fill bit: 0
[13:32:13.127] <TB1> INFO: buffer corruption: 0
[13:32:13.179] <TB1> INFO: ######################################################################
[13:32:13.179] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[13:32:13.179] <TB1> INFO: ######################################################################
[13:32:13.182] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[13:32:13.194] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[13:32:13.194] <TB1> INFO: run 1 of 1
[13:32:13.430] <TB1> INFO: Expecting 3120000 events.
[13:32:44.804] <TB1> INFO: 667670 events read in total (30782ms).











[13:33:15.314] <TB1> INFO: 1330880 events read in total (61292ms).











[13:33:45.750] <TB1> INFO: 1991875 events read in total (91728ms).











[13:34:16.523] <TB1> INFO: 2652610 events read in total (122501ms).











[13:34:37.613] <TB1> INFO: 3120000 events read in total (143592ms).
[13:34:37.681] <TB1> INFO: Test took 144488ms.
[13:35:03.280] <TB1> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 170 seconds
[13:35:03.280] <TB1> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1
[13:35:03.280] <TB1> INFO: separation cut (per ROC): 128 106 101 111 110 113 114 105 108 115 123 109 106 100 109 103
[13:35:03.280] <TB1> INFO: Decoding statistics:
[13:35:03.280] <TB1> INFO: General information:
[13:35:03.280] <TB1> INFO: 16bit words read: 0
[13:35:03.280] <TB1> INFO: valid events total: 0
[13:35:03.280] <TB1> INFO: empty events: 0
[13:35:03.280] <TB1> INFO: valid events with pixels: 0
[13:35:03.280] <TB1> INFO: valid pixel hits: 0
[13:35:03.280] <TB1> INFO: Event errors: 0
[13:35:03.280] <TB1> INFO: start marker: 0
[13:35:03.280] <TB1> INFO: stop marker: 0
[13:35:03.280] <TB1> INFO: overflow: 0
[13:35:03.280] <TB1> INFO: invalid 5bit words: 0
[13:35:03.280] <TB1> INFO: invalid XOR eye diagram: 0
[13:35:03.280] <TB1> INFO: frame (failed synchr.): 0
[13:35:03.280] <TB1> INFO: idle data (no TBM trl): 0
[13:35:03.280] <TB1> INFO: no data (only TBM hdr): 0
[13:35:03.280] <TB1> INFO: TBM errors: 0
[13:35:03.280] <TB1> INFO: flawed TBM headers: 0
[13:35:03.280] <TB1> INFO: flawed TBM trailers: 0
[13:35:03.280] <TB1> INFO: event ID mismatches: 0
[13:35:03.280] <TB1> INFO: ROC errors: 0
[13:35:03.280] <TB1> INFO: missing ROC header(s): 0
[13:35:03.280] <TB1> INFO: misplaced readback start: 0
[13:35:03.280] <TB1> INFO: Pixel decoding errors: 0
[13:35:03.280] <TB1> INFO: pixel data incomplete: 0
[13:35:03.280] <TB1> INFO: pixel address: 0
[13:35:03.280] <TB1> INFO: pulse height fill bit: 0
[13:35:03.280] <TB1> INFO: buffer corruption: 0
[13:35:03.319] <TB1> INFO: ######################################################################
[13:35:03.319] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[13:35:03.319] <TB1> INFO: ######################################################################
[13:35:03.319] <TB1> INFO: ----------------------------------------------------------------------
[13:35:03.319] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[13:35:03.319] <TB1> INFO: ----------------------------------------------------------------------
[13:35:03.319] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[13:35:03.333] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[13:35:03.333] <TB1> INFO: run 1 of 1
[13:35:03.578] <TB1> INFO: Expecting 36608000 events.
[13:35:26.908] <TB1> INFO: 683600 events read in total (22739ms).
[13:35:49.555] <TB1> INFO: 1350500 events read in total (45386ms).
[13:36:12.284] <TB1> INFO: 2018400 events read in total (68115ms).
[13:36:34.782] <TB1> INFO: 2684100 events read in total (90613ms).
[13:36:57.211] <TB1> INFO: 3352300 events read in total (113042ms).
[13:37:20.078] <TB1> INFO: 4019850 events read in total (135909ms).
[13:37:42.696] <TB1> INFO: 4686900 events read in total (158527ms).
[13:38:05.342] <TB1> INFO: 5351350 events read in total (181173ms).
[13:38:27.694] <TB1> INFO: 6016850 events read in total (203525ms).
[13:38:50.228] <TB1> INFO: 6684000 events read in total (226059ms).
[13:39:12.959] <TB1> INFO: 7349200 events read in total (248790ms).
[13:39:35.854] <TB1> INFO: 8015300 events read in total (271685ms).
[13:39:58.659] <TB1> INFO: 8679700 events read in total (294490ms).
[13:40:21.145] <TB1> INFO: 9343300 events read in total (316976ms).
[13:40:43.616] <TB1> INFO: 10005300 events read in total (339447ms).
[13:41:06.696] <TB1> INFO: 10670650 events read in total (362527ms).
[13:41:29.267] <TB1> INFO: 11332900 events read in total (385098ms).
[13:41:52.212] <TB1> INFO: 11997500 events read in total (408043ms).
[13:42:15.058] <TB1> INFO: 12659450 events read in total (430889ms).
[13:42:37.926] <TB1> INFO: 13321700 events read in total (453757ms).
[13:43:00.738] <TB1> INFO: 13982500 events read in total (476569ms).
[13:43:23.473] <TB1> INFO: 14644350 events read in total (499304ms).
[13:43:46.332] <TB1> INFO: 15305450 events read in total (522163ms).
[13:44:09.036] <TB1> INFO: 15966950 events read in total (544867ms).
[13:44:31.533] <TB1> INFO: 16628950 events read in total (567364ms).
[13:44:54.230] <TB1> INFO: 17290900 events read in total (590061ms).
[13:45:16.944] <TB1> INFO: 17951800 events read in total (612775ms).
[13:45:39.700] <TB1> INFO: 18614400 events read in total (635531ms).
[13:46:02.406] <TB1> INFO: 19277000 events read in total (658237ms).
[13:46:25.014] <TB1> INFO: 19937600 events read in total (680845ms).
[13:46:47.677] <TB1> INFO: 20595750 events read in total (703508ms).
[13:47:10.377] <TB1> INFO: 21252900 events read in total (726208ms).
[13:47:33.247] <TB1> INFO: 21914350 events read in total (749078ms).
[13:47:55.920] <TB1> INFO: 22573250 events read in total (771751ms).
[13:48:18.591] <TB1> INFO: 23234950 events read in total (794422ms).
[13:48:41.065] <TB1> INFO: 23893200 events read in total (816896ms).
[13:49:03.757] <TB1> INFO: 24551750 events read in total (839588ms).
[13:49:26.387] <TB1> INFO: 25210300 events read in total (862218ms).
[13:49:49.138] <TB1> INFO: 25870150 events read in total (884969ms).
[13:50:11.729] <TB1> INFO: 26528250 events read in total (907560ms).
[13:50:34.269] <TB1> INFO: 27186250 events read in total (930100ms).
[13:50:56.941] <TB1> INFO: 27842500 events read in total (952772ms).
[13:51:19.521] <TB1> INFO: 28500500 events read in total (975352ms).
[13:51:42.365] <TB1> INFO: 29157250 events read in total (998196ms).
[13:52:05.049] <TB1> INFO: 29813150 events read in total (1020880ms).
[13:52:27.647] <TB1> INFO: 30472300 events read in total (1043478ms).
[13:52:50.362] <TB1> INFO: 31130750 events read in total (1066193ms).
[13:53:13.155] <TB1> INFO: 31790100 events read in total (1088986ms).
[13:53:35.687] <TB1> INFO: 32448800 events read in total (1111518ms).
[13:53:58.404] <TB1> INFO: 33108500 events read in total (1134235ms).
[13:54:20.916] <TB1> INFO: 33767000 events read in total (1156747ms).
[13:54:43.391] <TB1> INFO: 34427600 events read in total (1179222ms).
[13:55:05.970] <TB1> INFO: 35086450 events read in total (1201801ms).
[13:55:28.487] <TB1> INFO: 35746950 events read in total (1224318ms).
[13:55:51.096] <TB1> INFO: 36416250 events read in total (1246927ms).
[13:55:57.876] <TB1> INFO: 36608000 events read in total (1253707ms).
[13:55:57.975] <TB1> INFO: Test took 1254641ms.
[13:55:58.443] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:56:00.024] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:56:01.926] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:56:03.645] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:56:05.362] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:56:07.329] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:56:09.023] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:56:11.066] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:56:12.915] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:56:15.024] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:56:17.042] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:56:18.804] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:56:20.311] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:56:22.025] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:56:24.018] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:56:26.243] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:56:27.851] <TB1> INFO: PixTestScurves::scurves() done
[13:56:27.851] <TB1> INFO: Vcal mean: 128.51 113.20 117.21 119.99 122.24 124.97 127.57 117.90 122.64 120.62 120.98 118.56 109.90 112.17 116.83 109.95
[13:56:27.851] <TB1> INFO: Vcal RMS: 6.91 4.96 5.85 5.54 6.94 6.29 6.18 5.40 6.64 5.60 6.58 6.05 4.91 5.44 5.62 4.84
[13:56:27.851] <TB1> INFO: PixTestScurves::fullTest() done, duration: 1284 seconds
[13:56:27.851] <TB1> INFO: Decoding statistics:
[13:56:27.851] <TB1> INFO: General information:
[13:56:27.851] <TB1> INFO: 16bit words read: 0
[13:56:27.851] <TB1> INFO: valid events total: 0
[13:56:27.851] <TB1> INFO: empty events: 0
[13:56:27.851] <TB1> INFO: valid events with pixels: 0
[13:56:27.851] <TB1> INFO: valid pixel hits: 0
[13:56:27.851] <TB1> INFO: Event errors: 0
[13:56:27.851] <TB1> INFO: start marker: 0
[13:56:27.851] <TB1> INFO: stop marker: 0
[13:56:27.851] <TB1> INFO: overflow: 0
[13:56:27.851] <TB1> INFO: invalid 5bit words: 0
[13:56:27.851] <TB1> INFO: invalid XOR eye diagram: 0
[13:56:27.851] <TB1> INFO: frame (failed synchr.): 0
[13:56:27.851] <TB1> INFO: idle data (no TBM trl): 0
[13:56:27.851] <TB1> INFO: no data (only TBM hdr): 0
[13:56:27.851] <TB1> INFO: TBM errors: 0
[13:56:27.851] <TB1> INFO: flawed TBM headers: 0
[13:56:27.851] <TB1> INFO: flawed TBM trailers: 0
[13:56:27.851] <TB1> INFO: event ID mismatches: 0
[13:56:27.851] <TB1> INFO: ROC errors: 0
[13:56:27.851] <TB1> INFO: missing ROC header(s): 0
[13:56:27.851] <TB1> INFO: misplaced readback start: 0
[13:56:27.851] <TB1> INFO: Pixel decoding errors: 0
[13:56:27.851] <TB1> INFO: pixel data incomplete: 0
[13:56:27.852] <TB1> INFO: pixel address: 0
[13:56:27.852] <TB1> INFO: pulse height fill bit: 0
[13:56:27.852] <TB1> INFO: buffer corruption: 0
[13:56:27.920] <TB1> INFO: ######################################################################
[13:56:27.921] <TB1> INFO: PixTestTrim::doTest()
[13:56:27.921] <TB1> INFO: ######################################################################
[13:56:27.922] <TB1> INFO: ----------------------------------------------------------------------
[13:56:27.922] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[13:56:27.922] <TB1> INFO: ----------------------------------------------------------------------
[13:56:27.969] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:56:27.969] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[13:56:27.982] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[13:56:27.982] <TB1> INFO: run 1 of 1
[13:56:28.232] <TB1> INFO: Expecting 5025280 events.
[13:56:59.326] <TB1> INFO: 828552 events read in total (30493ms).
[13:57:29.779] <TB1> INFO: 1654048 events read in total (60946ms).
[13:57:59.370] <TB1> INFO: 2475800 events read in total (90537ms).
[13:58:29.391] <TB1> INFO: 3296544 events read in total (120558ms).
[13:58:59.251] <TB1> INFO: 4113312 events read in total (150419ms).
[13:59:29.232] <TB1> INFO: 4929368 events read in total (180399ms).
[13:59:33.166] <TB1> INFO: 5025280 events read in total (184333ms).
[13:59:33.229] <TB1> INFO: Test took 185248ms.
[13:59:48.045] <TB1> INFO: ROC 0 VthrComp = 136
[13:59:48.045] <TB1> INFO: ROC 1 VthrComp = 121
[13:59:48.045] <TB1> INFO: ROC 2 VthrComp = 120
[13:59:48.045] <TB1> INFO: ROC 3 VthrComp = 129
[13:59:48.045] <TB1> INFO: ROC 4 VthrComp = 129
[13:59:48.045] <TB1> INFO: ROC 5 VthrComp = 131
[13:59:48.045] <TB1> INFO: ROC 6 VthrComp = 132
[13:59:48.045] <TB1> INFO: ROC 7 VthrComp = 126
[13:59:48.046] <TB1> INFO: ROC 8 VthrComp = 126
[13:59:48.046] <TB1> INFO: ROC 9 VthrComp = 132
[13:59:48.046] <TB1> INFO: ROC 10 VthrComp = 132
[13:59:48.046] <TB1> INFO: ROC 11 VthrComp = 126
[13:59:48.046] <TB1> INFO: ROC 12 VthrComp = 112
[13:59:48.046] <TB1> INFO: ROC 13 VthrComp = 110
[13:59:48.046] <TB1> INFO: ROC 14 VthrComp = 132
[13:59:48.046] <TB1> INFO: ROC 15 VthrComp = 114
[13:59:48.297] <TB1> INFO: Expecting 41600 events.
[13:59:51.826] <TB1> INFO: 41600 events read in total (2937ms).
[13:59:51.827] <TB1> INFO: Test took 3778ms.
[13:59:51.836] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:59:51.837] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[13:59:51.848] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[13:59:51.848] <TB1> INFO: run 1 of 1
[13:59:52.126] <TB1> INFO: Expecting 5025280 events.
[14:00:18.957] <TB1> INFO: 591720 events read in total (26239ms).
[14:00:44.835] <TB1> INFO: 1181928 events read in total (52117ms).
[14:01:10.810] <TB1> INFO: 1772256 events read in total (78092ms).
[14:01:36.574] <TB1> INFO: 2361152 events read in total (103856ms).
[14:02:02.568] <TB1> INFO: 2948768 events read in total (129850ms).
[14:02:28.487] <TB1> INFO: 3535232 events read in total (155769ms).
[14:02:54.184] <TB1> INFO: 4120304 events read in total (181466ms).
[14:03:19.866] <TB1> INFO: 4705352 events read in total (207148ms).
[14:03:34.108] <TB1> INFO: 5025280 events read in total (221390ms).
[14:03:34.180] <TB1> INFO: Test took 222331ms.
[14:03:56.878] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 65.2626 for pixel 32/72 mean/min/max = 49.8252/34.3293/65.321
[14:03:56.879] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 59.4072 for pixel 0/79 mean/min/max = 45.8628/32.2561/59.4695
[14:03:56.879] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 63.7426 for pixel 8/2 mean/min/max = 47.6937/31.488/63.8994
[14:03:56.880] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 59.1234 for pixel 0/6 mean/min/max = 45.2217/31.1999/59.2436
[14:03:56.880] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 60.2624 for pixel 15/4 mean/min/max = 45.6314/30.9278/60.335
[14:03:56.881] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 63.6042 for pixel 0/1 mean/min/max = 48.0006/32.3612/63.64
[14:03:56.881] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 65.5424 for pixel 12/6 mean/min/max = 50.5028/35.3584/65.6471
[14:03:56.882] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 60.7229 for pixel 26/12 mean/min/max = 46.168/31.5972/60.7388
[14:03:56.882] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 63.8053 for pixel 15/2 mean/min/max = 48.459/33.1059/63.8122
[14:03:56.883] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 59.5041 for pixel 5/13 mean/min/max = 46.3874/33.1585/59.6164
[14:03:56.883] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 59.6678 for pixel 20/4 mean/min/max = 46.004/32.0731/59.935
[14:03:56.884] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 59.574 for pixel 9/10 mean/min/max = 45.6936/31.5957/59.7915
[14:03:56.884] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 60.7513 for pixel 0/5 mean/min/max = 46.5932/32.3807/60.8057
[14:03:56.884] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 64.9385 for pixel 2/2 mean/min/max = 49.3153/33.6597/64.971
[14:03:56.885] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 58.4575 for pixel 16/72 mean/min/max = 45.4062/32.2886/58.5239
[14:03:56.885] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 60.9181 for pixel 3/3 mean/min/max = 46.1947/31.4437/60.9456
[14:03:56.886] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:03:56.975] <TB1> INFO: Expecting 411648 events.
[14:04:06.467] <TB1> INFO: 411648 events read in total (8900ms).
[14:04:06.475] <TB1> INFO: Expecting 411648 events.
[14:04:16.030] <TB1> INFO: 411648 events read in total (9152ms).
[14:04:16.040] <TB1> INFO: Expecting 411648 events.
[14:04:25.408] <TB1> INFO: 411648 events read in total (8965ms).
[14:04:25.427] <TB1> INFO: Expecting 411648 events.
[14:04:34.491] <TB1> INFO: 411648 events read in total (8661ms).
[14:04:34.507] <TB1> INFO: Expecting 411648 events.
[14:04:43.792] <TB1> INFO: 411648 events read in total (8882ms).
[14:04:43.811] <TB1> INFO: Expecting 411648 events.
[14:04:53.099] <TB1> INFO: 411648 events read in total (8885ms).
[14:04:53.121] <TB1> INFO: Expecting 411648 events.
[14:05:02.510] <TB1> INFO: 411648 events read in total (8985ms).
[14:05:02.543] <TB1> INFO: Expecting 411648 events.
[14:05:11.902] <TB1> INFO: 411648 events read in total (8956ms).
[14:05:11.930] <TB1> INFO: Expecting 411648 events.
[14:05:21.401] <TB1> INFO: 411648 events read in total (9067ms).
[14:05:21.443] <TB1> INFO: Expecting 411648 events.
[14:05:30.771] <TB1> INFO: 411648 events read in total (8925ms).
[14:05:30.807] <TB1> INFO: Expecting 411648 events.
[14:05:40.108] <TB1> INFO: 411648 events read in total (8898ms).
[14:05:40.148] <TB1> INFO: Expecting 411648 events.
[14:05:49.597] <TB1> INFO: 411648 events read in total (9045ms).
[14:05:49.671] <TB1> INFO: Expecting 411648 events.
[14:05:59.040] <TB1> INFO: 411648 events read in total (8966ms).
[14:05:59.095] <TB1> INFO: Expecting 411648 events.
[14:06:08.487] <TB1> INFO: 411648 events read in total (8989ms).
[14:06:08.547] <TB1> INFO: Expecting 411648 events.
[14:06:17.862] <TB1> INFO: 411648 events read in total (8911ms).
[14:06:17.951] <TB1> INFO: Expecting 411648 events.
[14:06:27.265] <TB1> INFO: 411648 events read in total (8911ms).
[14:06:27.347] <TB1> INFO: Test took 150461ms.
[14:06:28.174] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[14:06:28.191] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[14:06:28.192] <TB1> INFO: run 1 of 1
[14:06:28.430] <TB1> INFO: Expecting 5025280 events.
[14:06:54.852] <TB1> INFO: 586408 events read in total (25831ms).
[14:07:20.628] <TB1> INFO: 1173576 events read in total (51607ms).
[14:07:46.384] <TB1> INFO: 1759384 events read in total (77364ms).
[14:08:12.157] <TB1> INFO: 2345752 events read in total (103136ms).
[14:08:38.110] <TB1> INFO: 2931096 events read in total (129089ms).
[14:09:04.461] <TB1> INFO: 3516800 events read in total (155440ms).
[14:09:30.412] <TB1> INFO: 4101728 events read in total (181391ms).
[14:09:56.562] <TB1> INFO: 4688648 events read in total (207541ms).
[14:10:11.845] <TB1> INFO: 5025280 events read in total (222824ms).
[14:10:12.018] <TB1> INFO: Test took 223828ms.
[14:10:34.860] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 1.378889 .. 147.914543
[14:10:35.098] <TB1> INFO: Expecting 208000 events.
[14:10:44.659] <TB1> INFO: 208000 events read in total (8969ms).
[14:10:44.660] <TB1> INFO: Test took 9798ms.
[14:10:44.709] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 157 (-1/-1) hits flags = 528 (plus default)
[14:10:44.721] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[14:10:44.721] <TB1> INFO: run 1 of 1
[14:10:44.999] <TB1> INFO: Expecting 5224960 events.
[14:11:11.305] <TB1> INFO: 583608 events read in total (25714ms).
[14:11:36.608] <TB1> INFO: 1167280 events read in total (51017ms).
[14:12:02.089] <TB1> INFO: 1750648 events read in total (76498ms).
[14:12:28.390] <TB1> INFO: 2334280 events read in total (102799ms).
[14:12:53.908] <TB1> INFO: 2917568 events read in total (128317ms).
[14:13:19.670] <TB1> INFO: 3500824 events read in total (154080ms).
[14:13:45.478] <TB1> INFO: 4083984 events read in total (179888ms).
[14:14:11.381] <TB1> INFO: 4666696 events read in total (205790ms).
[14:14:36.059] <TB1> INFO: 5224960 events read in total (230468ms).
[14:14:36.144] <TB1> INFO: Test took 231422ms.
[14:15:02.513] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 27.490205 .. 46.108227
[14:15:02.750] <TB1> INFO: Expecting 208000 events.
[14:15:12.858] <TB1> INFO: 208000 events read in total (9517ms).
[14:15:12.859] <TB1> INFO: Test took 10345ms.
[14:15:12.927] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 56 (-1/-1) hits flags = 528 (plus default)
[14:15:12.941] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[14:15:12.941] <TB1> INFO: run 1 of 1
[14:15:13.219] <TB1> INFO: Expecting 1331200 events.
[14:15:41.070] <TB1> INFO: 654376 events read in total (27259ms).
[14:16:08.765] <TB1> INFO: 1307536 events read in total (54954ms).
[14:16:10.249] <TB1> INFO: 1331200 events read in total (56438ms).
[14:16:10.285] <TB1> INFO: Test took 57345ms.
[14:16:25.595] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 25.999619 .. 47.417713
[14:16:25.855] <TB1> INFO: Expecting 208000 events.
[14:16:35.576] <TB1> INFO: 208000 events read in total (9129ms).
[14:16:35.577] <TB1> INFO: Test took 9980ms.
[14:16:35.625] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 15 .. 57 (-1/-1) hits flags = 528 (plus default)
[14:16:35.638] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[14:16:35.638] <TB1> INFO: run 1 of 1
[14:16:35.917] <TB1> INFO: Expecting 1431040 events.
[14:17:04.350] <TB1> INFO: 659368 events read in total (27841ms).
[14:17:32.309] <TB1> INFO: 1317912 events read in total (55800ms).
[14:17:37.434] <TB1> INFO: 1431040 events read in total (60925ms).
[14:17:37.464] <TB1> INFO: Test took 61827ms.
[14:17:50.627] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 24.650373 .. 44.007744
[14:17:50.865] <TB1> INFO: Expecting 208000 events.
[14:18:00.796] <TB1> INFO: 208000 events read in total (9339ms).
[14:18:00.797] <TB1> INFO: Test took 10168ms.
[14:18:00.846] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 14 .. 54 (-1/-1) hits flags = 528 (plus default)
[14:18:00.860] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[14:18:00.860] <TB1> INFO: run 1 of 1
[14:18:01.138] <TB1> INFO: Expecting 1364480 events.
[14:18:30.653] <TB1> INFO: 675704 events read in total (28923ms).
[14:18:59.360] <TB1> INFO: 1350568 events read in total (57630ms).
[14:19:00.437] <TB1> INFO: 1364480 events read in total (58708ms).
[14:19:00.472] <TB1> INFO: Test took 59613ms.
[14:19:14.804] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[14:19:14.804] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[14:19:14.817] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[14:19:14.817] <TB1> INFO: run 1 of 1
[14:19:15.054] <TB1> INFO: Expecting 1364480 events.
[14:19:44.514] <TB1> INFO: 667008 events read in total (28868ms).
[14:20:12.439] <TB1> INFO: 1333624 events read in total (56793ms).
[14:20:14.131] <TB1> INFO: 1364480 events read in total (58485ms).
[14:20:14.168] <TB1> INFO: Test took 59352ms.
[14:20:28.038] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C0.dat
[14:20:28.038] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C1.dat
[14:20:28.038] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C2.dat
[14:20:28.038] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C3.dat
[14:20:28.038] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C4.dat
[14:20:28.038] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C5.dat
[14:20:28.039] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C6.dat
[14:20:28.039] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C7.dat
[14:20:28.039] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C8.dat
[14:20:28.039] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C9.dat
[14:20:28.039] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C10.dat
[14:20:28.039] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C11.dat
[14:20:28.040] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C12.dat
[14:20:28.040] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C13.dat
[14:20:28.040] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C14.dat
[14:20:28.040] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C15.dat
[14:20:28.040] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//trimParameters35_C0.dat
[14:20:28.051] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//trimParameters35_C1.dat
[14:20:28.056] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//trimParameters35_C2.dat
[14:20:28.061] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//trimParameters35_C3.dat
[14:20:28.065] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//trimParameters35_C4.dat
[14:20:28.070] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//trimParameters35_C5.dat
[14:20:28.075] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//trimParameters35_C6.dat
[14:20:28.080] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//trimParameters35_C7.dat
[14:20:28.084] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//trimParameters35_C8.dat
[14:20:28.089] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//trimParameters35_C9.dat
[14:20:28.094] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//trimParameters35_C10.dat
[14:20:28.098] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//trimParameters35_C11.dat
[14:20:28.103] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//trimParameters35_C12.dat
[14:20:28.108] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//trimParameters35_C13.dat
[14:20:28.113] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//trimParameters35_C14.dat
[14:20:28.117] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//trimParameters35_C15.dat
[14:20:28.122] <TB1> INFO: PixTestTrim::trimTest() done
[14:20:28.122] <TB1> INFO: vtrim: 156 114 132 108 132 147 162 148 162 151 143 149 143 144 161 138
[14:20:28.122] <TB1> INFO: vthrcomp: 136 121 120 129 129 131 132 126 126 132 132 126 112 110 132 114
[14:20:28.122] <TB1> INFO: vcal mean: 34.98 34.95 34.98 34.90 34.94 34.99 34.98 34.98 34.98 35.02 35.05 35.02 34.99 35.02 34.97 34.92
[14:20:28.122] <TB1> INFO: vcal RMS: 1.10 0.96 1.13 1.06 1.10 1.07 1.08 1.06 1.15 1.00 1.06 1.09 1.02 1.12 1.08 1.07
[14:20:28.122] <TB1> INFO: bits mean: 8.67 8.55 9.06 8.83 9.82 8.51 8.53 9.77 9.44 9.28 9.55 9.73 9.19 9.29 10.05 9.62
[14:20:28.122] <TB1> INFO: bits RMS: 2.44 3.03 2.81 3.13 2.66 2.89 2.35 2.60 2.42 2.58 2.60 2.65 2.74 2.38 2.36 2.72
[14:20:28.130] <TB1> INFO: ----------------------------------------------------------------------
[14:20:28.130] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[14:20:28.130] <TB1> INFO: ----------------------------------------------------------------------
[14:20:28.132] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[14:20:28.147] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[14:20:28.147] <TB1> INFO: run 1 of 1
[14:20:28.384] <TB1> INFO: Expecting 4160000 events.
[14:21:00.988] <TB1> INFO: 751955 events read in total (32012ms).
[14:21:32.765] <TB1> INFO: 1497410 events read in total (63789ms).
[14:22:04.510] <TB1> INFO: 2239625 events read in total (95534ms).
[14:22:36.408] <TB1> INFO: 2978790 events read in total (127432ms).
[14:23:07.865] <TB1> INFO: 3715720 events read in total (158889ms).
[14:23:26.823] <TB1> INFO: 4160000 events read in total (177847ms).
[14:23:26.954] <TB1> INFO: Test took 178807ms.
[14:23:52.354] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[14:23:52.366] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[14:23:52.367] <TB1> INFO: run 1 of 1
[14:23:52.603] <TB1> INFO: Expecting 4243200 events.
[14:24:25.017] <TB1> INFO: 724505 events read in total (31823ms).
[14:24:56.286] <TB1> INFO: 1443430 events read in total (63092ms).
[14:25:27.862] <TB1> INFO: 2159075 events read in total (94668ms).
[14:25:59.240] <TB1> INFO: 2872445 events read in total (126046ms).
[14:26:30.360] <TB1> INFO: 3582830 events read in total (157166ms).
[14:26:59.148] <TB1> INFO: 4243200 events read in total (185954ms).
[14:26:59.233] <TB1> INFO: Test took 186866ms.
[14:27:27.606] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 201 (-1/-1) hits flags = 528 (plus default)
[14:27:27.619] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[14:27:27.619] <TB1> INFO: run 1 of 1
[14:27:27.854] <TB1> INFO: Expecting 4201600 events.
[14:27:59.555] <TB1> INFO: 727235 events read in total (31109ms).
[14:28:30.542] <TB1> INFO: 1448845 events read in total (62096ms).
[14:29:01.584] <TB1> INFO: 2167110 events read in total (93138ms).
[14:29:32.815] <TB1> INFO: 2882745 events read in total (124369ms).
[14:30:03.665] <TB1> INFO: 3595930 events read in total (155219ms).
[14:30:30.357] <TB1> INFO: 4201600 events read in total (181911ms).
[14:30:30.432] <TB1> INFO: Test took 182813ms.
[14:30:55.848] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[14:30:55.861] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[14:30:55.861] <TB1> INFO: run 1 of 1
[14:30:56.097] <TB1> INFO: Expecting 4160000 events.
[14:31:27.689] <TB1> INFO: 730095 events read in total (31001ms).
[14:31:58.902] <TB1> INFO: 1454500 events read in total (62214ms).
[14:32:30.128] <TB1> INFO: 2175160 events read in total (93440ms).
[14:33:01.183] <TB1> INFO: 2893470 events read in total (124495ms).
[14:33:31.965] <TB1> INFO: 3609240 events read in total (155277ms).
[14:33:56.176] <TB1> INFO: 4160000 events read in total (179488ms).
[14:33:56.270] <TB1> INFO: Test took 180409ms.
[14:34:21.052] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[14:34:21.065] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[14:34:21.065] <TB1> INFO: run 1 of 1
[14:34:21.303] <TB1> INFO: Expecting 4160000 events.
[14:34:53.340] <TB1> INFO: 730255 events read in total (31445ms).
[14:35:24.682] <TB1> INFO: 1454730 events read in total (62787ms).
[14:35:56.413] <TB1> INFO: 2175670 events read in total (94518ms).
[14:36:27.410] <TB1> INFO: 2893935 events read in total (125515ms).
[14:36:58.380] <TB1> INFO: 3609830 events read in total (156485ms).
[14:37:22.233] <TB1> INFO: 4160000 events read in total (180338ms).
[14:37:22.364] <TB1> INFO: Test took 181298ms.
[14:37:47.635] <TB1> INFO: PixTestTrim::trimBitTest() done
[14:37:47.636] <TB1> INFO: PixTestTrim::doTest() done, duration: 2479 seconds
[14:37:47.636] <TB1> INFO: Decoding statistics:
[14:37:47.636] <TB1> INFO: General information:
[14:37:47.636] <TB1> INFO: 16bit words read: 0
[14:37:47.636] <TB1> INFO: valid events total: 0
[14:37:47.636] <TB1> INFO: empty events: 0
[14:37:47.636] <TB1> INFO: valid events with pixels: 0
[14:37:47.636] <TB1> INFO: valid pixel hits: 0
[14:37:47.636] <TB1> INFO: Event errors: 0
[14:37:47.636] <TB1> INFO: start marker: 0
[14:37:47.636] <TB1> INFO: stop marker: 0
[14:37:47.636] <TB1> INFO: overflow: 0
[14:37:47.636] <TB1> INFO: invalid 5bit words: 0
[14:37:47.636] <TB1> INFO: invalid XOR eye diagram: 0
[14:37:47.636] <TB1> INFO: frame (failed synchr.): 0
[14:37:47.636] <TB1> INFO: idle data (no TBM trl): 0
[14:37:47.636] <TB1> INFO: no data (only TBM hdr): 0
[14:37:47.636] <TB1> INFO: TBM errors: 0
[14:37:47.636] <TB1> INFO: flawed TBM headers: 0
[14:37:47.636] <TB1> INFO: flawed TBM trailers: 0
[14:37:47.637] <TB1> INFO: event ID mismatches: 0
[14:37:47.637] <TB1> INFO: ROC errors: 0
[14:37:47.637] <TB1> INFO: missing ROC header(s): 0
[14:37:47.637] <TB1> INFO: misplaced readback start: 0
[14:37:47.637] <TB1> INFO: Pixel decoding errors: 0
[14:37:47.637] <TB1> INFO: pixel data incomplete: 0
[14:37:47.637] <TB1> INFO: pixel address: 0
[14:37:47.637] <TB1> INFO: pulse height fill bit: 0
[14:37:47.637] <TB1> INFO: buffer corruption: 0
[14:37:48.248] <TB1> INFO: ######################################################################
[14:37:48.248] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:37:48.248] <TB1> INFO: ######################################################################
[14:37:48.504] <TB1> INFO: Expecting 41600 events.
[14:37:51.923] <TB1> INFO: 41600 events read in total (2827ms).
[14:37:51.924] <TB1> INFO: Test took 3675ms.
[14:37:52.372] <TB1> INFO: Expecting 41600 events.
[14:37:55.852] <TB1> INFO: 41600 events read in total (2888ms).
[14:37:55.853] <TB1> INFO: Test took 3725ms.
[14:37:56.203] <TB1> INFO: Expecting 41600 events.
[14:37:59.675] <TB1> INFO: 41600 events read in total (2880ms).
[14:37:59.676] <TB1> INFO: Test took 3799ms.
[14:37:59.965] <TB1> INFO: Expecting 41600 events.
[14:38:03.434] <TB1> INFO: 41600 events read in total (2877ms).
[14:38:03.435] <TB1> INFO: Test took 3735ms.
[14:38:03.724] <TB1> INFO: Expecting 41600 events.
[14:38:07.246] <TB1> INFO: 41600 events read in total (2930ms).
[14:38:07.247] <TB1> INFO: Test took 3788ms.
[14:38:07.536] <TB1> INFO: Expecting 41600 events.
[14:38:11.139] <TB1> INFO: 41600 events read in total (3012ms).
[14:38:11.140] <TB1> INFO: Test took 3869ms.
[14:38:11.449] <TB1> INFO: Expecting 41600 events.
[14:38:15.103] <TB1> INFO: 41600 events read in total (3063ms).
[14:38:15.105] <TB1> INFO: Test took 3941ms.
[14:38:15.427] <TB1> INFO: Expecting 41600 events.
[14:38:19.032] <TB1> INFO: 41600 events read in total (3013ms).
[14:38:19.033] <TB1> INFO: Test took 3901ms.
[14:38:19.323] <TB1> INFO: Expecting 41600 events.
[14:38:22.846] <TB1> INFO: 41600 events read in total (2931ms).
[14:38:22.847] <TB1> INFO: Test took 3789ms.
[14:38:23.139] <TB1> INFO: Expecting 41600 events.
[14:38:26.663] <TB1> INFO: 41600 events read in total (2932ms).
[14:38:26.664] <TB1> INFO: Test took 3790ms.
[14:38:26.952] <TB1> INFO: Expecting 41600 events.
[14:38:30.555] <TB1> INFO: 41600 events read in total (3011ms).
[14:38:30.555] <TB1> INFO: Test took 3867ms.
[14:38:30.844] <TB1> INFO: Expecting 41600 events.
[14:38:34.502] <TB1> INFO: 41600 events read in total (3066ms).
[14:38:34.504] <TB1> INFO: Test took 3925ms.
[14:38:34.794] <TB1> INFO: Expecting 41600 events.
[14:38:38.398] <TB1> INFO: 41600 events read in total (3013ms).
[14:38:38.399] <TB1> INFO: Test took 3870ms.
[14:38:38.700] <TB1> INFO: Expecting 41600 events.
[14:38:42.307] <TB1> INFO: 41600 events read in total (3015ms).
[14:38:42.308] <TB1> INFO: Test took 3883ms.
[14:38:42.617] <TB1> INFO: Expecting 41600 events.
[14:38:46.136] <TB1> INFO: 41600 events read in total (2927ms).
[14:38:46.137] <TB1> INFO: Test took 3800ms.
[14:38:46.426] <TB1> INFO: Expecting 41600 events.
[14:38:49.004] <TB1> INFO: 41600 events read in total (2986ms).
[14:38:49.005] <TB1> INFO: Test took 3844ms.
[14:38:50.308] <TB1> INFO: Expecting 41600 events.
[14:38:53.807] <TB1> INFO: 41600 events read in total (2908ms).
[14:38:53.808] <TB1> INFO: Test took 3769ms.
[14:38:54.126] <TB1> INFO: Expecting 41600 events.
[14:38:57.710] <TB1> INFO: 41600 events read in total (2992ms).
[14:38:57.711] <TB1> INFO: Test took 3878ms.
[14:38:57.000] <TB1> INFO: Expecting 41600 events.
[14:39:01.608] <TB1> INFO: 41600 events read in total (3017ms).
[14:39:01.609] <TB1> INFO: Test took 3874ms.
[14:39:01.898] <TB1> INFO: Expecting 41600 events.
[14:39:05.495] <TB1> INFO: 41600 events read in total (3005ms).
[14:39:05.496] <TB1> INFO: Test took 3863ms.
[14:39:05.788] <TB1> INFO: Expecting 41600 events.
[14:39:09.322] <TB1> INFO: 41600 events read in total (2943ms).
[14:39:09.323] <TB1> INFO: Test took 3800ms.
[14:39:09.613] <TB1> INFO: Expecting 41600 events.
[14:39:13.190] <TB1> INFO: 41600 events read in total (2986ms).
[14:39:13.191] <TB1> INFO: Test took 3843ms.
[14:39:13.481] <TB1> INFO: Expecting 41600 events.
[14:39:17.050] <TB1> INFO: 41600 events read in total (2976ms).
[14:39:17.051] <TB1> INFO: Test took 3834ms.
[14:39:17.343] <TB1> INFO: Expecting 41600 events.
[14:39:20.873] <TB1> INFO: 41600 events read in total (2938ms).
[14:39:20.875] <TB1> INFO: Test took 3797ms.
[14:39:21.168] <TB1> INFO: Expecting 41600 events.
[14:39:24.750] <TB1> INFO: 41600 events read in total (2990ms).
[14:39:24.751] <TB1> INFO: Test took 3848ms.
[14:39:25.059] <TB1> INFO: Expecting 41600 events.
[14:39:28.560] <TB1> INFO: 41600 events read in total (2909ms).
[14:39:28.561] <TB1> INFO: Test took 3785ms.
[14:39:28.850] <TB1> INFO: Expecting 41600 events.
[14:39:32.424] <TB1> INFO: 41600 events read in total (2982ms).
[14:39:32.425] <TB1> INFO: Test took 3840ms.
[14:39:32.714] <TB1> INFO: Expecting 41600 events.
[14:39:36.314] <TB1> INFO: 41600 events read in total (3008ms).
[14:39:36.315] <TB1> INFO: Test took 3866ms.
[14:39:36.614] <TB1> INFO: Expecting 41600 events.
[14:39:40.236] <TB1> INFO: 41600 events read in total (3030ms).
[14:39:40.237] <TB1> INFO: Test took 3897ms.
[14:39:40.527] <TB1> INFO: Expecting 41600 events.
[14:39:44.063] <TB1> INFO: 41600 events read in total (2944ms).
[14:39:44.064] <TB1> INFO: Test took 3803ms.
[14:39:44.359] <TB1> INFO: Expecting 41600 events.
[14:39:47.946] <TB1> INFO: 41600 events read in total (2996ms).
[14:39:47.947] <TB1> INFO: Test took 3854ms.
[14:39:48.237] <TB1> INFO: Expecting 41600 events.
[14:39:51.745] <TB1> INFO: 41600 events read in total (2916ms).
[14:39:51.745] <TB1> INFO: Test took 3773ms.
[14:39:52.036] <TB1> INFO: Expecting 41600 events.
[14:39:55.552] <TB1> INFO: 41600 events read in total (2925ms).
[14:39:55.553] <TB1> INFO: Test took 3783ms.
[14:39:55.842] <TB1> INFO: Expecting 41600 events.
[14:39:59.416] <TB1> INFO: 41600 events read in total (2983ms).
[14:39:59.417] <TB1> INFO: Test took 3840ms.
[14:39:59.710] <TB1> INFO: Expecting 41600 events.
[14:40:03.259] <TB1> INFO: 41600 events read in total (2957ms).
[14:40:03.260] <TB1> INFO: Test took 3816ms.
[14:40:03.552] <TB1> INFO: Expecting 41600 events.
[14:40:07.105] <TB1> INFO: 41600 events read in total (2961ms).
[14:40:07.106] <TB1> INFO: Test took 3819ms.
[14:40:07.398] <TB1> INFO: Expecting 41600 events.
[14:40:10.906] <TB1> INFO: 41600 events read in total (2916ms).
[14:40:10.908] <TB1> INFO: Test took 3775ms.
[14:40:11.202] <TB1> INFO: Expecting 41600 events.
[14:40:14.802] <TB1> INFO: 41600 events read in total (3008ms).
[14:40:14.803] <TB1> INFO: Test took 3866ms.
[14:40:15.093] <TB1> INFO: Expecting 41600 events.
[14:40:18.579] <TB1> INFO: 41600 events read in total (2894ms).
[14:40:18.580] <TB1> INFO: Test took 3753ms.
[14:40:18.871] <TB1> INFO: Expecting 41600 events.
[14:40:22.339] <TB1> INFO: 41600 events read in total (2876ms).
[14:40:22.339] <TB1> INFO: Test took 3732ms.
[14:40:22.629] <TB1> INFO: Expecting 41600 events.
[14:40:26.117] <TB1> INFO: 41600 events read in total (2896ms).
[14:40:26.118] <TB1> INFO: Test took 3754ms.
[14:40:26.407] <TB1> INFO: Expecting 41600 events.
[14:40:29.917] <TB1> INFO: 41600 events read in total (2918ms).
[14:40:29.917] <TB1> INFO: Test took 3775ms.
[14:40:30.206] <TB1> INFO: Expecting 41600 events.
[14:40:33.738] <TB1> INFO: 41600 events read in total (2940ms).
[14:40:33.739] <TB1> INFO: Test took 3798ms.
[14:40:34.034] <TB1> INFO: Expecting 41600 events.
[14:40:37.540] <TB1> INFO: 41600 events read in total (2915ms).
[14:40:37.541] <TB1> INFO: Test took 3778ms.
[14:40:37.846] <TB1> INFO: Expecting 41600 events.
[14:40:41.401] <TB1> INFO: 41600 events read in total (2963ms).
[14:40:41.402] <TB1> INFO: Test took 3836ms.
[14:40:41.692] <TB1> INFO: Expecting 41600 events.
[14:40:45.279] <TB1> INFO: 41600 events read in total (2995ms).
[14:40:45.280] <TB1> INFO: Test took 3853ms.
[14:40:45.569] <TB1> INFO: Expecting 41600 events.
[14:40:49.062] <TB1> INFO: 41600 events read in total (2901ms).
[14:40:49.062] <TB1> INFO: Test took 3758ms.
[14:40:49.351] <TB1> INFO: Expecting 41600 events.
[14:40:52.843] <TB1> INFO: 41600 events read in total (2900ms).
[14:40:52.844] <TB1> INFO: Test took 3758ms.
[14:40:53.133] <TB1> INFO: Expecting 41600 events.
[14:40:56.692] <TB1> INFO: 41600 events read in total (2967ms).
[14:40:56.693] <TB1> INFO: Test took 3825ms.
[14:40:56.007] <TB1> INFO: Expecting 41600 events.
[14:41:00.618] <TB1> INFO: 41600 events read in total (3020ms).
[14:41:00.618] <TB1> INFO: Test took 3899ms.
[14:41:00.913] <TB1> INFO: Expecting 41600 events.
[14:41:04.456] <TB1> INFO: 41600 events read in total (2952ms).
[14:41:04.457] <TB1> INFO: Test took 3810ms.
[14:41:04.754] <TB1> INFO: Expecting 41600 events.
[14:41:08.332] <TB1> INFO: 41600 events read in total (2986ms).
[14:41:08.333] <TB1> INFO: Test took 3851ms.
[14:41:08.622] <TB1> INFO: Expecting 41600 events.
[14:41:12.281] <TB1> INFO: 41600 events read in total (3067ms).
[14:41:12.281] <TB1> INFO: Test took 3924ms.
[14:41:12.573] <TB1> INFO: Expecting 41600 events.
[14:41:16.061] <TB1> INFO: 41600 events read in total (2896ms).
[14:41:16.061] <TB1> INFO: Test took 3753ms.
[14:41:16.352] <TB1> INFO: Expecting 2560 events.
[14:41:17.240] <TB1> INFO: 2560 events read in total (296ms).
[14:41:17.240] <TB1> INFO: Test took 1166ms.
[14:41:17.548] <TB1> INFO: Expecting 2560 events.
[14:41:18.436] <TB1> INFO: 2560 events read in total (296ms).
[14:41:18.437] <TB1> INFO: Test took 1197ms.
[14:41:18.744] <TB1> INFO: Expecting 2560 events.
[14:41:19.628] <TB1> INFO: 2560 events read in total (292ms).
[14:41:19.628] <TB1> INFO: Test took 1191ms.
[14:41:19.937] <TB1> INFO: Expecting 2560 events.
[14:41:20.824] <TB1> INFO: 2560 events read in total (295ms).
[14:41:20.824] <TB1> INFO: Test took 1195ms.
[14:41:21.132] <TB1> INFO: Expecting 2560 events.
[14:41:22.020] <TB1> INFO: 2560 events read in total (296ms).
[14:41:22.020] <TB1> INFO: Test took 1196ms.
[14:41:22.328] <TB1> INFO: Expecting 2560 events.
[14:41:23.215] <TB1> INFO: 2560 events read in total (295ms).
[14:41:23.215] <TB1> INFO: Test took 1195ms.
[14:41:23.523] <TB1> INFO: Expecting 2560 events.
[14:41:24.406] <TB1> INFO: 2560 events read in total (291ms).
[14:41:24.407] <TB1> INFO: Test took 1191ms.
[14:41:24.715] <TB1> INFO: Expecting 2560 events.
[14:41:25.599] <TB1> INFO: 2560 events read in total (293ms).
[14:41:25.599] <TB1> INFO: Test took 1192ms.
[14:41:25.907] <TB1> INFO: Expecting 2560 events.
[14:41:26.799] <TB1> INFO: 2560 events read in total (300ms).
[14:41:26.799] <TB1> INFO: Test took 1199ms.
[14:41:27.106] <TB1> INFO: Expecting 2560 events.
[14:41:27.994] <TB1> INFO: 2560 events read in total (296ms).
[14:41:27.994] <TB1> INFO: Test took 1194ms.
[14:41:28.302] <TB1> INFO: Expecting 2560 events.
[14:41:29.186] <TB1> INFO: 2560 events read in total (293ms).
[14:41:29.186] <TB1> INFO: Test took 1191ms.
[14:41:29.495] <TB1> INFO: Expecting 2560 events.
[14:41:30.375] <TB1> INFO: 2560 events read in total (288ms).
[14:41:30.375] <TB1> INFO: Test took 1188ms.
[14:41:30.683] <TB1> INFO: Expecting 2560 events.
[14:41:31.568] <TB1> INFO: 2560 events read in total (293ms).
[14:41:31.568] <TB1> INFO: Test took 1192ms.
[14:41:31.875] <TB1> INFO: Expecting 2560 events.
[14:41:32.759] <TB1> INFO: 2560 events read in total (292ms).
[14:41:32.759] <TB1> INFO: Test took 1191ms.
[14:41:33.067] <TB1> INFO: Expecting 2560 events.
[14:41:33.955] <TB1> INFO: 2560 events read in total (296ms).
[14:41:33.955] <TB1> INFO: Test took 1196ms.
[14:41:34.263] <TB1> INFO: Expecting 2560 events.
[14:41:35.152] <TB1> INFO: 2560 events read in total (297ms).
[14:41:35.152] <TB1> INFO: Test took 1196ms.
[14:41:35.460] <TB1> INFO: Expecting 655360 events.
[14:41:56.075] <TB1> INFO: 531260 events read in total (20023ms).
[14:42:01.054] <TB1> INFO: 655360 events read in total (25002ms).
[14:42:01.073] <TB1> INFO: Test took 25918ms.
[14:42:01.102] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:42:01.362] <TB1> INFO: Expecting 655360 events.
[14:42:16.126] <TB1> INFO: 655360 events read in total (14172ms).
[14:42:16.140] <TB1> INFO: Expecting 655360 events.
[14:42:30.935] <TB1> INFO: 655360 events read in total (14392ms).
[14:42:30.954] <TB1> INFO: Expecting 655360 events.
[14:42:45.504] <TB1> INFO: 655360 events read in total (14147ms).
[14:42:45.528] <TB1> INFO: Expecting 655360 events.
[14:43:00.317] <TB1> INFO: 655360 events read in total (14386ms).
[14:43:00.344] <TB1> INFO: Expecting 655360 events.
[14:43:14.936] <TB1> INFO: 655360 events read in total (14189ms).
[14:43:14.967] <TB1> INFO: Expecting 655360 events.
[14:43:29.621] <TB1> INFO: 655360 events read in total (14251ms).
[14:43:29.656] <TB1> INFO: Expecting 655360 events.
[14:43:44.232] <TB1> INFO: 655360 events read in total (14173ms).
[14:43:44.272] <TB1> INFO: Expecting 655360 events.
[14:43:59.045] <TB1> INFO: 655360 events read in total (14370ms).
[14:43:59.105] <TB1> INFO: Expecting 655360 events.
[14:44:13.734] <TB1> INFO: 655360 events read in total (14226ms).
[14:44:13.785] <TB1> INFO: Expecting 655360 events.
[14:44:28.518] <TB1> INFO: 655360 events read in total (14330ms).
[14:44:28.608] <TB1> INFO: Expecting 655360 events.
[14:44:42.972] <TB1> INFO: 655360 events read in total (13961ms).
[14:44:43.042] <TB1> INFO: Expecting 655360 events.
[14:44:57.588] <TB1> INFO: 655360 events read in total (14144ms).
[14:44:57.664] <TB1> INFO: Expecting 655360 events.
[14:45:12.472] <TB1> INFO: 655360 events read in total (14405ms).
[14:45:12.580] <TB1> INFO: Expecting 655360 events.
[14:45:27.291] <TB1> INFO: 655360 events read in total (14308ms).
[14:45:27.388] <TB1> INFO: Expecting 655360 events.
[14:45:42.108] <TB1> INFO: 655360 events read in total (14317ms).
[14:45:42.224] <TB1> INFO: Expecting 655360 events.
[14:45:56.607] <TB1> INFO: 655360 events read in total (13980ms).
[14:45:56.704] <TB1> INFO: Test took 235602ms.
[14:45:56.869] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:45:56.874] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:45:56.880] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[14:45:56.886] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:45:56.892] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[14:45:56.898] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[14:45:56.903] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[14:45:56.910] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[14:45:56.916] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[14:45:56.922] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[14:45:56.929] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[14:45:56.935] <TB1> INFO: safety margin for low PH: adding 8, margin is now 28
[14:45:56.941] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:45:56.948] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[14:45:56.954] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:45:56.960] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[14:45:56.966] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[14:45:56.972] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[14:45:56.979] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[14:45:56.985] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:45:56.991] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[14:45:56.997] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[14:45:56.003] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[14:45:57.009] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[14:45:57.016] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[14:45:57.022] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[14:45:57.028] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[14:45:57.035] <TB1> INFO: safety margin for low PH: adding 8, margin is now 28
[14:45:57.044] <TB1> INFO: safety margin for low PH: adding 9, margin is now 29
[14:45:57.051] <TB1> INFO: safety margin for low PH: adding 10, margin is now 30
[14:45:57.058] <TB1> INFO: safety margin for low PH: adding 11, margin is now 31
[14:45:57.066] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:45:57.072] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:45:57.078] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[14:45:57.084] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:45:57.090] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:45:57.097] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:45:57.102] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:45:57.109] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:45:57.115] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[14:45:57.122] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[14:45:57.128] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[14:45:57.134] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[14:45:57.143] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[14:45:57.149] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[14:45:57.155] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[14:45:57.161] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:45:57.167] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[14:45:57.173] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:45:57.180] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[14:45:57.186] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[14:45:57.194] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[14:45:57.202] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:45:57.239] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C0.dat
[14:45:57.239] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C1.dat
[14:45:57.239] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C2.dat
[14:45:57.240] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C3.dat
[14:45:57.240] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C4.dat
[14:45:57.240] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C5.dat
[14:45:57.240] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C6.dat
[14:45:57.240] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C7.dat
[14:45:57.240] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C8.dat
[14:45:57.240] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C9.dat
[14:45:57.241] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C10.dat
[14:45:57.241] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C11.dat
[14:45:57.241] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C12.dat
[14:45:57.241] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C13.dat
[14:45:57.241] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C14.dat
[14:45:57.241] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//dacParameters35_C15.dat
[14:45:57.527] <TB1> INFO: Expecting 41600 events.
[14:46:00.646] <TB1> INFO: 41600 events read in total (2527ms).
[14:46:00.646] <TB1> INFO: Test took 3401ms.
[14:46:01.138] <TB1> INFO: Expecting 41600 events.
[14:46:04.238] <TB1> INFO: 41600 events read in total (2508ms).
[14:46:04.239] <TB1> INFO: Test took 3380ms.
[14:46:04.696] <TB1> INFO: Expecting 41600 events.
[14:46:07.821] <TB1> INFO: 41600 events read in total (2533ms).
[14:46:07.822] <TB1> INFO: Test took 3369ms.
[14:46:08.038] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:08.127] <TB1> INFO: Expecting 2560 events.
[14:46:09.016] <TB1> INFO: 2560 events read in total (297ms).
[14:46:09.017] <TB1> INFO: Test took 979ms.
[14:46:09.019] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:09.324] <TB1> INFO: Expecting 2560 events.
[14:46:10.214] <TB1> INFO: 2560 events read in total (298ms).
[14:46:10.214] <TB1> INFO: Test took 1195ms.
[14:46:10.217] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:10.523] <TB1> INFO: Expecting 2560 events.
[14:46:11.415] <TB1> INFO: 2560 events read in total (300ms).
[14:46:11.415] <TB1> INFO: Test took 1198ms.
[14:46:11.418] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:11.724] <TB1> INFO: Expecting 2560 events.
[14:46:12.615] <TB1> INFO: 2560 events read in total (299ms).
[14:46:12.615] <TB1> INFO: Test took 1197ms.
[14:46:12.617] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:12.924] <TB1> INFO: Expecting 2560 events.
[14:46:13.814] <TB1> INFO: 2560 events read in total (298ms).
[14:46:13.814] <TB1> INFO: Test took 1197ms.
[14:46:13.818] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:14.123] <TB1> INFO: Expecting 2560 events.
[14:46:15.008] <TB1> INFO: 2560 events read in total (294ms).
[14:46:15.008] <TB1> INFO: Test took 1190ms.
[14:46:15.010] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:15.317] <TB1> INFO: Expecting 2560 events.
[14:46:16.200] <TB1> INFO: 2560 events read in total (292ms).
[14:46:16.201] <TB1> INFO: Test took 1191ms.
[14:46:16.204] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:16.510] <TB1> INFO: Expecting 2560 events.
[14:46:17.395] <TB1> INFO: 2560 events read in total (293ms).
[14:46:17.395] <TB1> INFO: Test took 1191ms.
[14:46:17.399] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:17.703] <TB1> INFO: Expecting 2560 events.
[14:46:18.583] <TB1> INFO: 2560 events read in total (288ms).
[14:46:18.583] <TB1> INFO: Test took 1184ms.
[14:46:18.586] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:18.892] <TB1> INFO: Expecting 2560 events.
[14:46:19.781] <TB1> INFO: 2560 events read in total (297ms).
[14:46:19.782] <TB1> INFO: Test took 1196ms.
[14:46:19.785] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:20.090] <TB1> INFO: Expecting 2560 events.
[14:46:20.981] <TB1> INFO: 2560 events read in total (299ms).
[14:46:20.982] <TB1> INFO: Test took 1197ms.
[14:46:20.986] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:21.289] <TB1> INFO: Expecting 2560 events.
[14:46:22.174] <TB1> INFO: 2560 events read in total (293ms).
[14:46:22.174] <TB1> INFO: Test took 1188ms.
[14:46:22.176] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:22.482] <TB1> INFO: Expecting 2560 events.
[14:46:23.367] <TB1> INFO: 2560 events read in total (293ms).
[14:46:23.367] <TB1> INFO: Test took 1191ms.
[14:46:23.369] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:23.677] <TB1> INFO: Expecting 2560 events.
[14:46:24.568] <TB1> INFO: 2560 events read in total (300ms).
[14:46:24.569] <TB1> INFO: Test took 1200ms.
[14:46:24.573] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:24.876] <TB1> INFO: Expecting 2560 events.
[14:46:25.759] <TB1> INFO: 2560 events read in total (291ms).
[14:46:25.759] <TB1> INFO: Test took 1186ms.
[14:46:25.762] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:26.068] <TB1> INFO: Expecting 2560 events.
[14:46:26.948] <TB1> INFO: 2560 events read in total (289ms).
[14:46:26.948] <TB1> INFO: Test took 1186ms.
[14:46:26.950] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:27.257] <TB1> INFO: Expecting 2560 events.
[14:46:28.144] <TB1> INFO: 2560 events read in total (295ms).
[14:46:28.144] <TB1> INFO: Test took 1194ms.
[14:46:28.148] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:28.453] <TB1> INFO: Expecting 2560 events.
[14:46:29.342] <TB1> INFO: 2560 events read in total (297ms).
[14:46:29.342] <TB1> INFO: Test took 1194ms.
[14:46:29.345] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:29.651] <TB1> INFO: Expecting 2560 events.
[14:46:30.537] <TB1> INFO: 2560 events read in total (294ms).
[14:46:30.537] <TB1> INFO: Test took 1192ms.
[14:46:30.540] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:30.846] <TB1> INFO: Expecting 2560 events.
[14:46:31.733] <TB1> INFO: 2560 events read in total (295ms).
[14:46:31.733] <TB1> INFO: Test took 1193ms.
[14:46:31.735] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:32.041] <TB1> INFO: Expecting 2560 events.
[14:46:32.934] <TB1> INFO: 2560 events read in total (301ms).
[14:46:32.934] <TB1> INFO: Test took 1199ms.
[14:46:32.937] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:33.243] <TB1> INFO: Expecting 2560 events.
[14:46:34.131] <TB1> INFO: 2560 events read in total (296ms).
[14:46:34.131] <TB1> INFO: Test took 1194ms.
[14:46:34.133] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:34.441] <TB1> INFO: Expecting 2560 events.
[14:46:35.322] <TB1> INFO: 2560 events read in total (290ms).
[14:46:35.322] <TB1> INFO: Test took 1189ms.
[14:46:35.326] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:35.630] <TB1> INFO: Expecting 2560 events.
[14:46:36.518] <TB1> INFO: 2560 events read in total (296ms).
[14:46:36.518] <TB1> INFO: Test took 1192ms.
[14:46:36.522] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:36.826] <TB1> INFO: Expecting 2560 events.
[14:46:37.719] <TB1> INFO: 2560 events read in total (301ms).
[14:46:37.719] <TB1> INFO: Test took 1197ms.
[14:46:37.722] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:38.026] <TB1> INFO: Expecting 2560 events.
[14:46:38.917] <TB1> INFO: 2560 events read in total (299ms).
[14:46:38.917] <TB1> INFO: Test took 1196ms.
[14:46:38.921] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:39.225] <TB1> INFO: Expecting 2560 events.
[14:46:40.115] <TB1> INFO: 2560 events read in total (298ms).
[14:46:40.116] <TB1> INFO: Test took 1195ms.
[14:46:40.118] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:40.424] <TB1> INFO: Expecting 2560 events.
[14:46:41.314] <TB1> INFO: 2560 events read in total (298ms).
[14:46:41.314] <TB1> INFO: Test took 1197ms.
[14:46:41.318] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:41.623] <TB1> INFO: Expecting 2560 events.
[14:46:42.516] <TB1> INFO: 2560 events read in total (301ms).
[14:46:42.516] <TB1> INFO: Test took 1198ms.
[14:46:42.519] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:42.826] <TB1> INFO: Expecting 2560 events.
[14:46:43.712] <TB1> INFO: 2560 events read in total (295ms).
[14:46:43.713] <TB1> INFO: Test took 1195ms.
[14:46:43.716] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:44.021] <TB1> INFO: Expecting 2560 events.
[14:46:44.910] <TB1> INFO: 2560 events read in total (297ms).
[14:46:44.910] <TB1> INFO: Test took 1194ms.
[14:46:44.912] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:45.219] <TB1> INFO: Expecting 2560 events.
[14:46:46.110] <TB1> INFO: 2560 events read in total (299ms).
[14:46:46.110] <TB1> INFO: Test took 1198ms.
[14:46:46.601] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 538 seconds
[14:46:46.601] <TB1> INFO: PH scale (per ROC): 44 49 35 42 37 53 66 43 48 44 39 59 48 36 48 50
[14:46:46.601] <TB1> INFO: PH offset (per ROC): 127 141 112 87 122 144 134 136 142 92 111 129 139 115 133 134
[14:46:46.611] <TB1> INFO: Decoding statistics:
[14:46:46.611] <TB1> INFO: General information:
[14:46:46.611] <TB1> INFO: 16bit words read: 127876
[14:46:46.611] <TB1> INFO: valid events total: 20480
[14:46:46.611] <TB1> INFO: empty events: 17982
[14:46:46.611] <TB1> INFO: valid events with pixels: 2498
[14:46:46.611] <TB1> INFO: valid pixel hits: 2498
[14:46:46.611] <TB1> INFO: Event errors: 0
[14:46:46.611] <TB1> INFO: start marker: 0
[14:46:46.611] <TB1> INFO: stop marker: 0
[14:46:46.611] <TB1> INFO: overflow: 0
[14:46:46.611] <TB1> INFO: invalid 5bit words: 0
[14:46:46.611] <TB1> INFO: invalid XOR eye diagram: 0
[14:46:46.611] <TB1> INFO: frame (failed synchr.): 0
[14:46:46.612] <TB1> INFO: idle data (no TBM trl): 0
[14:46:46.612] <TB1> INFO: no data (only TBM hdr): 0
[14:46:46.612] <TB1> INFO: TBM errors: 0
[14:46:46.612] <TB1> INFO: flawed TBM headers: 0
[14:46:46.612] <TB1> INFO: flawed TBM trailers: 0
[14:46:46.612] <TB1> INFO: event ID mismatches: 0
[14:46:46.612] <TB1> INFO: ROC errors: 0
[14:46:46.612] <TB1> INFO: missing ROC header(s): 0
[14:46:46.612] <TB1> INFO: misplaced readback start: 0
[14:46:46.612] <TB1> INFO: Pixel decoding errors: 0
[14:46:46.612] <TB1> INFO: pixel data incomplete: 0
[14:46:46.612] <TB1> INFO: pixel address: 0
[14:46:46.612] <TB1> INFO: pulse height fill bit: 0
[14:46:46.612] <TB1> INFO: buffer corruption: 0
[14:46:46.775] <TB1> INFO: ######################################################################
[14:46:46.775] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:46:46.775] <TB1> INFO: ######################################################################
[14:46:46.789] <TB1> INFO: scanning low vcal = 10
[14:46:47.026] <TB1> INFO: Expecting 41600 events.
[14:46:50.626] <TB1> INFO: 41600 events read in total (3008ms).
[14:46:50.626] <TB1> INFO: Test took 3837ms.
[14:46:50.628] <TB1> INFO: scanning low vcal = 20
[14:46:50.923] <TB1> INFO: Expecting 41600 events.
[14:46:54.500] <TB1> INFO: 41600 events read in total (2986ms).
[14:46:54.500] <TB1> INFO: Test took 3872ms.
[14:46:54.502] <TB1> INFO: scanning low vcal = 30
[14:46:54.796] <TB1> INFO: Expecting 41600 events.
[14:46:58.443] <TB1> INFO: 41600 events read in total (3056ms).
[14:46:58.444] <TB1> INFO: Test took 3942ms.
[14:46:58.447] <TB1> INFO: scanning low vcal = 40
[14:46:58.724] <TB1> INFO: Expecting 41600 events.
[14:47:02.732] <TB1> INFO: 41600 events read in total (3417ms).
[14:47:02.733] <TB1> INFO: Test took 4286ms.
[14:47:02.736] <TB1> INFO: scanning low vcal = 50
[14:47:03.014] <TB1> INFO: Expecting 41600 events.
[14:47:07.025] <TB1> INFO: 41600 events read in total (3420ms).
[14:47:07.026] <TB1> INFO: Test took 4290ms.
[14:47:07.029] <TB1> INFO: scanning low vcal = 60
[14:47:07.308] <TB1> INFO: Expecting 41600 events.
[14:47:11.321] <TB1> INFO: 41600 events read in total (3421ms).
[14:47:11.322] <TB1> INFO: Test took 4293ms.
[14:47:11.325] <TB1> INFO: scanning low vcal = 70
[14:47:11.605] <TB1> INFO: Expecting 41600 events.
[14:47:15.638] <TB1> INFO: 41600 events read in total (3441ms).
[14:47:15.639] <TB1> INFO: Test took 4314ms.
[14:47:15.642] <TB1> INFO: scanning low vcal = 80
[14:47:15.920] <TB1> INFO: Expecting 41600 events.
[14:47:19.906] <TB1> INFO: 41600 events read in total (3395ms).
[14:47:19.907] <TB1> INFO: Test took 4264ms.
[14:47:19.910] <TB1> INFO: scanning low vcal = 90
[14:47:20.187] <TB1> INFO: Expecting 41600 events.
[14:47:24.181] <TB1> INFO: 41600 events read in total (3402ms).
[14:47:24.182] <TB1> INFO: Test took 4272ms.
[14:47:24.186] <TB1> INFO: scanning low vcal = 100
[14:47:24.464] <TB1> INFO: Expecting 41600 events.
[14:47:28.456] <TB1> INFO: 41600 events read in total (3400ms).
[14:47:28.457] <TB1> INFO: Test took 4270ms.
[14:47:28.460] <TB1> INFO: scanning low vcal = 110
[14:47:28.738] <TB1> INFO: Expecting 41600 events.
[14:47:32.737] <TB1> INFO: 41600 events read in total (3407ms).
[14:47:32.738] <TB1> INFO: Test took 4278ms.
[14:47:32.741] <TB1> INFO: scanning low vcal = 120
[14:47:33.018] <TB1> INFO: Expecting 41600 events.
[14:47:36.987] <TB1> INFO: 41600 events read in total (3377ms).
[14:47:36.992] <TB1> INFO: Test took 4251ms.
[14:47:36.995] <TB1> INFO: scanning low vcal = 130
[14:47:37.272] <TB1> INFO: Expecting 41600 events.
[14:47:41.280] <TB1> INFO: 41600 events read in total (3417ms).
[14:47:41.281] <TB1> INFO: Test took 4286ms.
[14:47:41.285] <TB1> INFO: scanning low vcal = 140
[14:47:41.568] <TB1> INFO: Expecting 41600 events.
[14:47:45.577] <TB1> INFO: 41600 events read in total (3418ms).
[14:47:45.578] <TB1> INFO: Test took 4293ms.
[14:47:45.581] <TB1> INFO: scanning low vcal = 150
[14:47:45.863] <TB1> INFO: Expecting 41600 events.
[14:47:49.847] <TB1> INFO: 41600 events read in total (3392ms).
[14:47:49.848] <TB1> INFO: Test took 4266ms.
[14:47:49.851] <TB1> INFO: scanning low vcal = 160
[14:47:50.128] <TB1> INFO: Expecting 41600 events.
[14:47:54.116] <TB1> INFO: 41600 events read in total (3396ms).
[14:47:54.116] <TB1> INFO: Test took 4265ms.
[14:47:54.119] <TB1> INFO: scanning low vcal = 170
[14:47:54.397] <TB1> INFO: Expecting 41600 events.
[14:47:58.388] <TB1> INFO: 41600 events read in total (3399ms).
[14:47:58.389] <TB1> INFO: Test took 4269ms.
[14:47:58.394] <TB1> INFO: scanning low vcal = 180
[14:47:58.669] <TB1> INFO: Expecting 41600 events.
[14:48:02.677] <TB1> INFO: 41600 events read in total (3416ms).
[14:48:02.678] <TB1> INFO: Test took 4284ms.
[14:48:02.681] <TB1> INFO: scanning low vcal = 190
[14:48:02.958] <TB1> INFO: Expecting 41600 events.
[14:48:06.997] <TB1> INFO: 41600 events read in total (3447ms).
[14:48:06.998] <TB1> INFO: Test took 4317ms.
[14:48:06.002] <TB1> INFO: scanning low vcal = 200
[14:48:07.278] <TB1> INFO: Expecting 41600 events.
[14:48:11.278] <TB1> INFO: 41600 events read in total (3408ms).
[14:48:11.279] <TB1> INFO: Test took 4276ms.
[14:48:11.283] <TB1> INFO: scanning low vcal = 210
[14:48:11.559] <TB1> INFO: Expecting 41600 events.
[14:48:15.578] <TB1> INFO: 41600 events read in total (3427ms).
[14:48:15.579] <TB1> INFO: Test took 4296ms.
[14:48:15.582] <TB1> INFO: scanning low vcal = 220
[14:48:15.859] <TB1> INFO: Expecting 41600 events.
[14:48:19.879] <TB1> INFO: 41600 events read in total (3428ms).
[14:48:19.879] <TB1> INFO: Test took 4296ms.
[14:48:19.883] <TB1> INFO: scanning low vcal = 230
[14:48:20.160] <TB1> INFO: Expecting 41600 events.
[14:48:24.152] <TB1> INFO: 41600 events read in total (3400ms).
[14:48:24.153] <TB1> INFO: Test took 4270ms.
[14:48:24.156] <TB1> INFO: scanning low vcal = 240
[14:48:24.433] <TB1> INFO: Expecting 41600 events.
[14:48:28.413] <TB1> INFO: 41600 events read in total (3388ms).
[14:48:28.413] <TB1> INFO: Test took 4257ms.
[14:48:28.416] <TB1> INFO: scanning low vcal = 250
[14:48:28.694] <TB1> INFO: Expecting 41600 events.
[14:48:32.706] <TB1> INFO: 41600 events read in total (3420ms).
[14:48:32.706] <TB1> INFO: Test took 4290ms.
[14:48:32.710] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[14:48:32.987] <TB1> INFO: Expecting 41600 events.
[14:48:37.028] <TB1> INFO: 41600 events read in total (3449ms).
[14:48:37.028] <TB1> INFO: Test took 4317ms.
[14:48:37.032] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[14:48:37.313] <TB1> INFO: Expecting 41600 events.
[14:48:41.332] <TB1> INFO: 41600 events read in total (3428ms).
[14:48:41.333] <TB1> INFO: Test took 4301ms.
[14:48:41.336] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[14:48:41.613] <TB1> INFO: Expecting 41600 events.
[14:48:45.641] <TB1> INFO: 41600 events read in total (3436ms).
[14:48:45.642] <TB1> INFO: Test took 4306ms.
[14:48:45.646] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[14:48:45.922] <TB1> INFO: Expecting 41600 events.
[14:48:49.956] <TB1> INFO: 41600 events read in total (3442ms).
[14:48:49.957] <TB1> INFO: Test took 4311ms.
[14:48:49.960] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:48:50.237] <TB1> INFO: Expecting 41600 events.
[14:48:54.231] <TB1> INFO: 41600 events read in total (3402ms).
[14:48:54.232] <TB1> INFO: Test took 4272ms.
[14:48:54.821] <TB1> INFO: PixTestGainPedestal::measure() done
[14:49:30.727] <TB1> INFO: PixTestGainPedestal::fit() done
[14:49:30.727] <TB1> INFO: non-linearity mean: 0.962 0.971 0.924 1.001 0.915 0.980 0.984 0.967 0.974 0.917 0.934 0.979 0.972 0.948 0.967 0.966
[14:49:30.727] <TB1> INFO: non-linearity RMS: 0.008 0.004 0.123 0.153 0.075 0.003 0.003 0.006 0.003 0.125 0.151 0.004 0.004 0.031 0.005 0.006
[14:49:30.727] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//phCalibrationFitErr35_C0.dat
[14:49:30.741] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//phCalibrationFitErr35_C1.dat
[14:49:30.755] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//phCalibrationFitErr35_C2.dat
[14:49:30.768] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//phCalibrationFitErr35_C3.dat
[14:49:30.782] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//phCalibrationFitErr35_C4.dat
[14:49:30.795] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//phCalibrationFitErr35_C5.dat
[14:49:30.809] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//phCalibrationFitErr35_C6.dat
[14:49:30.822] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//phCalibrationFitErr35_C7.dat
[14:49:30.836] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//phCalibrationFitErr35_C8.dat
[14:49:30.849] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//phCalibrationFitErr35_C9.dat
[14:49:30.863] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//phCalibrationFitErr35_C10.dat
[14:49:30.876] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//phCalibrationFitErr35_C11.dat
[14:49:30.890] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//phCalibrationFitErr35_C12.dat
[14:49:30.904] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//phCalibrationFitErr35_C13.dat
[14:49:30.917] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//phCalibrationFitErr35_C14.dat
[14:49:30.930] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1065_FullQualification_2016-10-25_13h17m_1477394256//000_Fulltest_m20//phCalibrationFitErr35_C15.dat
[14:49:30.944] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 164 seconds
[14:49:30.944] <TB1> INFO: Decoding statistics:
[14:49:30.944] <TB1> INFO: General information:
[14:49:30.944] <TB1> INFO: 16bit words read: 3327408
[14:49:30.944] <TB1> INFO: valid events total: 332800
[14:49:30.944] <TB1> INFO: empty events: 0
[14:49:30.944] <TB1> INFO: valid events with pixels: 332800
[14:49:30.944] <TB1> INFO: valid pixel hits: 665304
[14:49:30.944] <TB1> INFO: Event errors: 0
[14:49:30.944] <TB1> INFO: start marker: 0
[14:49:30.944] <TB1> INFO: stop marker: 0
[14:49:30.944] <TB1> INFO: overflow: 0
[14:49:30.944] <TB1> INFO: invalid 5bit words: 0
[14:49:30.944] <TB1> INFO: invalid XOR eye diagram: 0
[14:49:30.944] <TB1> INFO: frame (failed synchr.): 0
[14:49:30.944] <TB1> INFO: idle data (no TBM trl): 0
[14:49:30.944] <TB1> INFO: no data (only TBM hdr): 0
[14:49:30.944] <TB1> INFO: TBM errors: 0
[14:49:30.944] <TB1> INFO: flawed TBM headers: 0
[14:49:30.944] <TB1> INFO: flawed TBM trailers: 0
[14:49:30.944] <TB1> INFO: event ID mismatches: 0
[14:49:30.944] <TB1> INFO: ROC errors: 0
[14:49:30.944] <TB1> INFO: missing ROC header(s): 0
[14:49:30.944] <TB1> INFO: misplaced readback start: 0
[14:49:30.944] <TB1> INFO: Pixel decoding errors: 0
[14:49:30.944] <TB1> INFO: pixel data incomplete: 0
[14:49:30.944] <TB1> INFO: pixel address: 0
[14:49:30.944] <TB1> INFO: pulse height fill bit: 0
[14:49:30.944] <TB1> INFO: buffer corruption: 0
[14:49:30.962] <TB1> INFO: Decoding statistics:
[14:49:30.962] <TB1> INFO: General information:
[14:49:30.962] <TB1> INFO: 16bit words read: 3456820
[14:49:30.962] <TB1> INFO: valid events total: 353536
[14:49:30.962] <TB1> INFO: empty events: 18238
[14:49:30.962] <TB1> INFO: valid events with pixels: 335298
[14:49:30.962] <TB1> INFO: valid pixel hits: 667802
[14:49:30.962] <TB1> INFO: Event errors: 0
[14:49:30.962] <TB1> INFO: start marker: 0
[14:49:30.962] <TB1> INFO: stop marker: 0
[14:49:30.962] <TB1> INFO: overflow: 0
[14:49:30.962] <TB1> INFO: invalid 5bit words: 0
[14:49:30.962] <TB1> INFO: invalid XOR eye diagram: 0
[14:49:30.962] <TB1> INFO: frame (failed synchr.): 0
[14:49:30.962] <TB1> INFO: idle data (no TBM trl): 0
[14:49:30.962] <TB1> INFO: no data (only TBM hdr): 0
[14:49:30.962] <TB1> INFO: TBM errors: 0
[14:49:30.962] <TB1> INFO: flawed TBM headers: 0
[14:49:30.962] <TB1> INFO: flawed TBM trailers: 0
[14:49:30.962] <TB1> INFO: event ID mismatches: 0
[14:49:30.962] <TB1> INFO: ROC errors: 0
[14:49:30.962] <TB1> INFO: missing ROC header(s): 0
[14:49:30.962] <TB1> INFO: misplaced readback start: 0
[14:49:30.962] <TB1> INFO: Pixel decoding errors: 0
[14:49:30.962] <TB1> INFO: pixel data incomplete: 0
[14:49:30.962] <TB1> INFO: pixel address: 0
[14:49:30.962] <TB1> INFO: pulse height fill bit: 0
[14:49:30.962] <TB1> INFO: buffer corruption: 0
[14:49:30.962] <TB1> INFO: enter test to run
[14:49:30.962] <TB1> INFO: test: exit no parameter change
[14:49:31.122] <TB1> QUIET: Connection to board 154 closed.
[14:49:31.123] <TB1> INFO: pXar: this is the end, my friend