[08:09:28.029] <TB3> INFO: *** Welcome to pxar ***
[08:09:28.029] <TB3> INFO: *** Today: 2016/10/25
[08:09:28.037] <TB3> INFO: *** Version: c8ba-dirty
[08:09:28.037] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters_C15.dat
[08:09:28.037] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//tbmParameters_C1b.dat
[08:09:28.038] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//defaultMaskFile.dat
[08:09:28.038] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//trimParameters_C15.dat
[08:09:28.099] <TB3> INFO: clk: 4
[08:09:28.099] <TB3> INFO: ctr: 4
[08:09:28.099] <TB3> INFO: sda: 19
[08:09:28.099] <TB3> INFO: tin: 9
[08:09:28.099] <TB3> INFO: level: 15
[08:09:28.099] <TB3> INFO: triggerdelay: 0
[08:09:28.099] <TB3> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[08:09:28.099] <TB3> INFO: Log level: INFO
[08:09:28.107] <TB3> INFO: Found DTB DTB_WWVASW
[08:09:28.116] <TB3> QUIET: Connection to board DTB_WWVASW opened.
[08:09:28.118] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[08:09:28.124] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[08:09:29.645] <TB3> INFO: DUT info:
[08:09:29.645] <TB3> INFO: The DUT currently contains the following objects:
[08:09:29.645] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[08:09:29.645] <TB3> INFO: TBM Core alpha (0): 7 registers set
[08:09:29.645] <TB3> INFO: TBM Core beta (1): 7 registers set
[08:09:29.645] <TB3> INFO: TBM Core alpha (2): 7 registers set
[08:09:29.645] <TB3> INFO: TBM Core beta (3): 7 registers set
[08:09:29.645] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[08:09:29.645] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[08:09:29.645] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[08:09:29.645] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[08:09:29.645] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[08:09:29.645] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[08:09:29.645] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[08:09:29.645] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[08:09:29.645] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[08:09:29.645] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[08:09:29.645] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[08:09:29.645] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[08:09:29.645] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[08:09:29.645] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[08:09:29.645] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[08:09:29.645] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[08:09:29.645] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[08:09:30.046] <TB3> INFO: enter 'restricted' command line mode
[08:09:30.046] <TB3> INFO: enter test to run
[08:09:30.046] <TB3> INFO: test: pretest no parameter change
[08:09:30.046] <TB3> INFO: running: pretest
[08:09:30.051] <TB3> INFO: ######################################################################
[08:09:30.051] <TB3> INFO: PixTestPretest::doTest()
[08:09:30.051] <TB3> INFO: ######################################################################
[08:09:30.052] <TB3> INFO: ----------------------------------------------------------------------
[08:09:30.052] <TB3> INFO: PixTestPretest::programROC()
[08:09:30.052] <TB3> INFO: ----------------------------------------------------------------------
[08:09:48.065] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[08:09:48.065] <TB3> INFO: IA differences per ROC: 20.1 17.7 18.5 20.1 17.7 20.9 18.5 18.5 19.3 22.5 19.3 20.9 20.9 19.3 18.5 20.9
[08:09:48.134] <TB3> INFO: ----------------------------------------------------------------------
[08:09:48.134] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[08:09:48.134] <TB3> INFO: ----------------------------------------------------------------------
[08:09:57.529] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 385.9 mA = 24.1188 mA/ROC
[08:09:57.530] <TB3> INFO: i(loss) [mA/ROC]: 19.3 19.3 19.3 19.3 19.3 18.5 19.3 19.3 19.3 18.5 19.3 19.3 19.3 19.3 19.3 19.3
[08:09:57.558] <TB3> INFO: ----------------------------------------------------------------------
[08:09:57.558] <TB3> INFO: PixTestPretest::findTiming()
[08:09:57.558] <TB3> INFO: ----------------------------------------------------------------------
[08:09:57.559] <TB3> INFO: PixTestCmd::init()

[08:10:29.024] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[08:10:29.024] <TB3> INFO: (success/tries = 100/100), width = 4
[08:10:30.514] <TB3> INFO: ----------------------------------------------------------------------
[08:10:30.514] <TB3> INFO: PixTestPretest::findWorkingPixel()
[08:10:30.514] <TB3> INFO: ----------------------------------------------------------------------
[08:10:30.607] <TB3> INFO: Expecting 231680 events.
[08:10:40.563] <TB3> INFO: 231680 events read in total (9364ms).
[08:10:40.573] <TB3> INFO: Test took 10055ms.
[08:10:40.810] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[08:10:40.839] <TB3> INFO: ----------------------------------------------------------------------
[08:10:40.839] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[08:10:40.839] <TB3> INFO: ----------------------------------------------------------------------
[08:10:40.932] <TB3> INFO: Expecting 231680 events.
[08:10:50.912] <TB3> INFO: 231680 events read in total (9388ms).
[08:10:50.932] <TB3> INFO: Test took 10088ms.
[08:10:51.195] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[08:10:51.195] <TB3> INFO: CalDel: 87 78 106 105 96 85 96 91 93 102 78 85 91 92 98 100
[08:10:51.195] <TB3> INFO: VthrComp: 51 52 51 51 52 51 51 51 51 51 52 51 51 51 54 52
[08:10:51.200] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters_C0.dat
[08:10:51.200] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters_C1.dat
[08:10:51.200] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters_C2.dat
[08:10:51.200] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters_C3.dat
[08:10:51.201] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters_C4.dat
[08:10:51.201] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters_C5.dat
[08:10:51.201] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters_C6.dat
[08:10:51.201] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters_C7.dat
[08:10:51.201] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters_C8.dat
[08:10:51.201] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters_C9.dat
[08:10:51.202] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters_C10.dat
[08:10:51.202] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters_C11.dat
[08:10:51.202] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters_C12.dat
[08:10:51.202] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters_C13.dat
[08:10:51.202] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters_C14.dat
[08:10:51.202] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters_C15.dat
[08:10:51.202] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//tbmParameters_C0a.dat
[08:10:51.202] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//tbmParameters_C0b.dat
[08:10:51.202] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//tbmParameters_C1a.dat
[08:10:51.203] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//tbmParameters_C1b.dat
[08:10:51.203] <TB3> INFO: PixTestPretest::doTest() done, duration: 81 seconds
[08:10:51.298] <TB3> INFO: enter test to run
[08:10:51.298] <TB3> INFO: test: FullTest no parameter change
[08:10:51.298] <TB3> INFO: running: fulltest
[08:10:51.298] <TB3> INFO: ######################################################################
[08:10:51.298] <TB3> INFO: PixTestFullTest::doTest()
[08:10:51.298] <TB3> INFO: ######################################################################
[08:10:51.302] <TB3> INFO: ######################################################################
[08:10:51.302] <TB3> INFO: PixTestAlive::doTest()
[08:10:51.302] <TB3> INFO: ######################################################################
[08:10:51.304] <TB3> INFO: ----------------------------------------------------------------------
[08:10:51.304] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:10:51.304] <TB3> INFO: ----------------------------------------------------------------------
[08:10:51.629] <TB3> INFO: Expecting 41600 events.
[08:10:55.413] <TB3> INFO: 41600 events read in total (3192ms).
[08:10:55.413] <TB3> INFO: Test took 4102ms.
[08:10:55.639] <TB3> INFO: PixTestAlive::aliveTest() done
[08:10:55.639] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0
[08:10:55.640] <TB3> INFO: ----------------------------------------------------------------------
[08:10:55.640] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:10:55.640] <TB3> INFO: ----------------------------------------------------------------------
[08:10:55.883] <TB3> INFO: Expecting 41600 events.
[08:10:58.998] <TB3> INFO: 41600 events read in total (2523ms).
[08:10:58.998] <TB3> INFO: Test took 3357ms.
[08:10:58.999] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[08:10:59.237] <TB3> INFO: PixTestAlive::maskTest() done
[08:10:59.237] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:10:59.238] <TB3> INFO: ----------------------------------------------------------------------
[08:10:59.238] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:10:59.238] <TB3> INFO: ----------------------------------------------------------------------
[08:10:59.476] <TB3> INFO: Expecting 41600 events.
[08:11:03.082] <TB3> INFO: 41600 events read in total (3014ms).
[08:11:03.082] <TB3> INFO: Test took 3842ms.
[08:11:03.309] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[08:11:03.309] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:11:03.309] <TB3> INFO: PixTestAlive::doTest() done, duration: 12 seconds
[08:11:03.309] <TB3> INFO: Decoding statistics:
[08:11:03.309] <TB3> INFO: General information:
[08:11:03.309] <TB3> INFO: 16bit words read: 0
[08:11:03.309] <TB3> INFO: valid events total: 0
[08:11:03.309] <TB3> INFO: empty events: 0
[08:11:03.309] <TB3> INFO: valid events with pixels: 0
[08:11:03.309] <TB3> INFO: valid pixel hits: 0
[08:11:03.309] <TB3> INFO: Event errors: 0
[08:11:03.309] <TB3> INFO: start marker: 0
[08:11:03.309] <TB3> INFO: stop marker: 0
[08:11:03.309] <TB3> INFO: overflow: 0
[08:11:03.309] <TB3> INFO: invalid 5bit words: 0
[08:11:03.309] <TB3> INFO: invalid XOR eye diagram: 0
[08:11:03.309] <TB3> INFO: frame (failed synchr.): 0
[08:11:03.309] <TB3> INFO: idle data (no TBM trl): 0
[08:11:03.309] <TB3> INFO: no data (only TBM hdr): 0
[08:11:03.309] <TB3> INFO: TBM errors: 0
[08:11:03.310] <TB3> INFO: flawed TBM headers: 0
[08:11:03.310] <TB3> INFO: flawed TBM trailers: 0
[08:11:03.310] <TB3> INFO: event ID mismatches: 0
[08:11:03.310] <TB3> INFO: ROC errors: 0
[08:11:03.310] <TB3> INFO: missing ROC header(s): 0
[08:11:03.310] <TB3> INFO: misplaced readback start: 0
[08:11:03.310] <TB3> INFO: Pixel decoding errors: 0
[08:11:03.310] <TB3> INFO: pixel data incomplete: 0
[08:11:03.310] <TB3> INFO: pixel address: 0
[08:11:03.310] <TB3> INFO: pulse height fill bit: 0
[08:11:03.310] <TB3> INFO: buffer corruption: 0
[08:11:03.315] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C15.dat
[08:11:03.317] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//phCalibrationFitErr_C15.dat

[08:11:03.318] <TB3> INFO: ######################################################################
[08:11:03.318] <TB3> INFO: PixTestReadback::doTest()
[08:11:03.318] <TB3> INFO: ######################################################################
[08:11:03.318] <TB3> INFO: ----------------------------------------------------------------------
[08:11:03.318] <TB3> INFO: PixTestReadback::CalibrateVd()
[08:11:03.318] <TB3> INFO: ----------------------------------------------------------------------
[08:11:13.266] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C0.dat
[08:11:13.266] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C1.dat
[08:11:13.266] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C2.dat
[08:11:13.266] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C3.dat
[08:11:13.266] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C4.dat
[08:11:13.267] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C5.dat
[08:11:13.267] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C6.dat
[08:11:13.267] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C7.dat
[08:11:13.267] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C8.dat
[08:11:13.267] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C9.dat
[08:11:13.267] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C10.dat
[08:11:13.267] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C11.dat
[08:11:13.267] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C12.dat
[08:11:13.267] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C13.dat
[08:11:13.267] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C14.dat
[08:11:13.267] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C15.dat
[08:11:13.295] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[08:11:13.295] <TB3> INFO: ----------------------------------------------------------------------
[08:11:13.295] <TB3> INFO: PixTestReadback::CalibrateVa()
[08:11:13.295] <TB3> INFO: ----------------------------------------------------------------------
[08:11:23.201] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C0.dat
[08:11:23.201] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C1.dat
[08:11:23.201] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C2.dat
[08:11:23.201] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C3.dat
[08:11:23.201] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C4.dat
[08:11:23.201] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C5.dat
[08:11:23.201] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C6.dat
[08:11:23.201] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C7.dat
[08:11:23.201] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C8.dat
[08:11:23.201] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C9.dat
[08:11:23.202] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C10.dat
[08:11:23.202] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C11.dat
[08:11:23.202] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C12.dat
[08:11:23.202] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C13.dat
[08:11:23.202] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C14.dat
[08:11:23.202] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C15.dat
[08:11:23.230] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[08:11:23.230] <TB3> INFO: ----------------------------------------------------------------------
[08:11:23.230] <TB3> INFO: PixTestReadback::readbackVbg()
[08:11:23.230] <TB3> INFO: ----------------------------------------------------------------------
[08:11:30.874] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[08:11:30.874] <TB3> INFO: ----------------------------------------------------------------------
[08:11:30.874] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[08:11:30.874] <TB3> INFO: ----------------------------------------------------------------------
[08:11:30.874] <TB3> INFO: Vbg will be calibrated using Vd calibration
[08:11:30.874] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 158.3calibrated Vbg = 1.20749 :::*/*/*/*/
[08:11:30.874] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 158.1calibrated Vbg = 1.20681 :::*/*/*/*/
[08:11:30.874] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 155.3calibrated Vbg = 1.20237 :::*/*/*/*/
[08:11:30.874] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 158.6calibrated Vbg = 1.19195 :::*/*/*/*/
[08:11:30.874] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 156calibrated Vbg = 1.20691 :::*/*/*/*/
[08:11:30.874] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 153.3calibrated Vbg = 1.20575 :::*/*/*/*/
[08:11:30.874] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 159.8calibrated Vbg = 1.21211 :::*/*/*/*/
[08:11:30.874] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 159calibrated Vbg = 1.20879 :::*/*/*/*/
[08:11:30.874] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 147calibrated Vbg = 1.20016 :::*/*/*/*/
[08:11:30.874] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 153.8calibrated Vbg = 1.20387 :::*/*/*/*/
[08:11:30.874] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 158.5calibrated Vbg = 1.20111 :::*/*/*/*/
[08:11:30.874] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 149.8calibrated Vbg = 1.19441 :::*/*/*/*/
[08:11:30.874] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 151.2calibrated Vbg = 1.20045 :::*/*/*/*/
[08:11:30.874] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 162.4calibrated Vbg = 1.2037 :::*/*/*/*/
[08:11:30.874] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 164.1calibrated Vbg = 1.19966 :::*/*/*/*/
[08:11:30.875] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 152.6calibrated Vbg = 1.20282 :::*/*/*/*/
[08:11:30.877] <TB3> INFO: ----------------------------------------------------------------------
[08:11:30.877] <TB3> INFO: PixTestReadback::CalibrateIa()
[08:11:30.877] <TB3> INFO: ----------------------------------------------------------------------
[08:14:11.226] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C0.dat
[08:14:11.226] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C1.dat
[08:14:11.226] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C2.dat
[08:14:11.227] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C3.dat
[08:14:11.227] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C4.dat
[08:14:11.227] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C5.dat
[08:14:11.227] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C6.dat
[08:14:11.227] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C7.dat
[08:14:11.227] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C8.dat
[08:14:11.227] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C9.dat
[08:14:11.227] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C10.dat
[08:14:11.227] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C11.dat
[08:14:11.227] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C12.dat
[08:14:11.227] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C13.dat
[08:14:11.227] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C14.dat
[08:14:11.227] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//readbackCal_C15.dat
[08:14:11.256] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[08:14:11.257] <TB3> INFO: PixTestReadback::doTest() done
[08:14:11.258] <TB3> INFO: Decoding statistics:
[08:14:11.258] <TB3> INFO: General information:
[08:14:11.258] <TB3> INFO: 16bit words read: 1536
[08:14:11.258] <TB3> INFO: valid events total: 256
[08:14:11.258] <TB3> INFO: empty events: 256
[08:14:11.258] <TB3> INFO: valid events with pixels: 0
[08:14:11.258] <TB3> INFO: valid pixel hits: 0
[08:14:11.258] <TB3> INFO: Event errors: 0
[08:14:11.258] <TB3> INFO: start marker: 0
[08:14:11.258] <TB3> INFO: stop marker: 0
[08:14:11.258] <TB3> INFO: overflow: 0
[08:14:11.258] <TB3> INFO: invalid 5bit words: 0
[08:14:11.258] <TB3> INFO: invalid XOR eye diagram: 0
[08:14:11.258] <TB3> INFO: frame (failed synchr.): 0
[08:14:11.258] <TB3> INFO: idle data (no TBM trl): 0
[08:14:11.258] <TB3> INFO: no data (only TBM hdr): 0
[08:14:11.258] <TB3> INFO: TBM errors: 0
[08:14:11.258] <TB3> INFO: flawed TBM headers: 0
[08:14:11.258] <TB3> INFO: flawed TBM trailers: 0
[08:14:11.258] <TB3> INFO: event ID mismatches: 0
[08:14:11.258] <TB3> INFO: ROC errors: 0
[08:14:11.258] <TB3> INFO: missing ROC header(s): 0
[08:14:11.258] <TB3> INFO: misplaced readback start: 0
[08:14:11.258] <TB3> INFO: Pixel decoding errors: 0
[08:14:11.258] <TB3> INFO: pixel data incomplete: 0
[08:14:11.258] <TB3> INFO: pixel address: 0
[08:14:11.258] <TB3> INFO: pulse height fill bit: 0
[08:14:11.258] <TB3> INFO: buffer corruption: 0
[08:14:11.312] <TB3> INFO: ######################################################################
[08:14:11.312] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[08:14:11.312] <TB3> INFO: ######################################################################
[08:14:11.314] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[08:14:11.336] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[08:14:11.336] <TB3> INFO: run 1 of 1
[08:14:11.600] <TB3> INFO: Expecting 3120000 events.
[08:14:43.442] <TB3> INFO: 674330 events read in total (31250ms).











[08:15:14.517] <TB3> INFO: 1343675 events read in total (62325ms).











[08:15:46.348] <TB3> INFO: 2009190 events read in total (94156ms).











[08:16:18.010] <TB3> INFO: 2675860 events read in total (125818ms).











[08:16:38.936] <TB3> INFO: 3120000 events read in total (146744ms).
[08:16:39.021] <TB3> INFO: Test took 147687ms.
[08:16:59.340] <TB3> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 168 seconds
[08:16:59.340] <TB3> INFO: number of dead bumps (per ROC): 0 0 0 0 0 1 0 0 0 0 1 0 0 1 0 0
[08:16:59.340] <TB3> INFO: separation cut (per ROC): 125 103 100 106 101 108 106 104 101 103 110 124 117 103 113 113
[08:16:59.341] <TB3> INFO: Decoding statistics:
[08:16:59.341] <TB3> INFO: General information:
[08:16:59.341] <TB3> INFO: 16bit words read: 0
[08:16:59.341] <TB3> INFO: valid events total: 0
[08:16:59.341] <TB3> INFO: empty events: 0
[08:16:59.341] <TB3> INFO: valid events with pixels: 0
[08:16:59.341] <TB3> INFO: valid pixel hits: 0
[08:16:59.341] <TB3> INFO: Event errors: 0
[08:16:59.341] <TB3> INFO: start marker: 0
[08:16:59.341] <TB3> INFO: stop marker: 0
[08:16:59.341] <TB3> INFO: overflow: 0
[08:16:59.341] <TB3> INFO: invalid 5bit words: 0
[08:16:59.341] <TB3> INFO: invalid XOR eye diagram: 0
[08:16:59.341] <TB3> INFO: frame (failed synchr.): 0
[08:16:59.341] <TB3> INFO: idle data (no TBM trl): 0
[08:16:59.341] <TB3> INFO: no data (only TBM hdr): 0
[08:16:59.341] <TB3> INFO: TBM errors: 0
[08:16:59.341] <TB3> INFO: flawed TBM headers: 0
[08:16:59.341] <TB3> INFO: flawed TBM trailers: 0
[08:16:59.341] <TB3> INFO: event ID mismatches: 0
[08:16:59.341] <TB3> INFO: ROC errors: 0
[08:16:59.341] <TB3> INFO: missing ROC header(s): 0
[08:16:59.341] <TB3> INFO: misplaced readback start: 0
[08:16:59.341] <TB3> INFO: Pixel decoding errors: 0
[08:16:59.341] <TB3> INFO: pixel data incomplete: 0
[08:16:59.341] <TB3> INFO: pixel address: 0
[08:16:59.341] <TB3> INFO: pulse height fill bit: 0
[08:16:59.341] <TB3> INFO: buffer corruption: 0
[08:16:59.379] <TB3> INFO: ######################################################################
[08:16:59.379] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[08:16:59.379] <TB3> INFO: ######################################################################
[08:16:59.379] <TB3> INFO: ----------------------------------------------------------------------
[08:16:59.379] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[08:16:59.379] <TB3> INFO: ----------------------------------------------------------------------
[08:16:59.379] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[08:16:59.392] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[08:16:59.392] <TB3> INFO: run 1 of 1
[08:16:59.628] <TB3> INFO: Expecting 36608000 events.
[08:17:24.682] <TB3> INFO: 702950 events read in total (24462ms).
[08:17:48.631] <TB3> INFO: 1390450 events read in total (48411ms).
[08:18:12.507] <TB3> INFO: 2080250 events read in total (72287ms).
[08:18:36.583] <TB3> INFO: 2768550 events read in total (96363ms).
[08:19:01.171] <TB3> INFO: 3454300 events read in total (120951ms).
[08:19:25.485] <TB3> INFO: 4139750 events read in total (145265ms).
[08:19:49.499] <TB3> INFO: 4824000 events read in total (169279ms).
[08:20:13.981] <TB3> INFO: 5508150 events read in total (193761ms).
[08:20:38.747] <TB3> INFO: 6193400 events read in total (218527ms).
[08:21:03.399] <TB3> INFO: 6878950 events read in total (243179ms).
[08:21:27.724] <TB3> INFO: 7563800 events read in total (267504ms).
[08:21:51.830] <TB3> INFO: 8249400 events read in total (291610ms).
[08:22:16.108] <TB3> INFO: 8934300 events read in total (315888ms).
[08:22:40.533] <TB3> INFO: 9618400 events read in total (340313ms).
[08:23:56.971] <TB3> INFO: 10302650 events read in total (416751ms).
[08:24:21.595] <TB3> INFO: 10986100 events read in total (441375ms).
[08:25:34.446] <TB3> INFO: 11669200 events read in total (514226ms).
[08:25:58.403] <TB3> INFO: 12353250 events read in total (538183ms).
[08:27:12.042] <TB3> INFO: 13035200 events read in total (611822ms).
[08:27:36.289] <TB3> INFO: 13715350 events read in total (636069ms).
[08:28:00.764] <TB3> INFO: 14395350 events read in total (660544ms).
[08:28:25.068] <TB3> INFO: 15075600 events read in total (684848ms).
[08:28:49.291] <TB3> INFO: 15757050 events read in total (709071ms).
[08:29:13.460] <TB3> INFO: 16436050 events read in total (733240ms).
[08:29:37.782] <TB3> INFO: 17115650 events read in total (757562ms).
[08:30:01.435] <TB3> INFO: 17792950 events read in total (781215ms).
[08:30:25.216] <TB3> INFO: 18468950 events read in total (804996ms).
[08:30:49.509] <TB3> INFO: 19143950 events read in total (829289ms).
[08:31:13.713] <TB3> INFO: 19817850 events read in total (853493ms).
[08:31:37.500] <TB3> INFO: 20493700 events read in total (877280ms).
[08:32:01.510] <TB3> INFO: 21167550 events read in total (901290ms).
[08:32:25.635] <TB3> INFO: 21841100 events read in total (925415ms).
[08:32:49.948] <TB3> INFO: 22514550 events read in total (949729ms).
[08:33:14.300] <TB3> INFO: 23186600 events read in total (974080ms).
[08:33:38.517] <TB3> INFO: 23860850 events read in total (998297ms).
[08:34:02.413] <TB3> INFO: 24533150 events read in total (1022193ms).
[08:34:26.671] <TB3> INFO: 25208800 events read in total (1046451ms).
[08:34:50.630] <TB3> INFO: 25880450 events read in total (1070410ms).
[08:35:14.542] <TB3> INFO: 26553450 events read in total (1094322ms).
[08:35:38.954] <TB3> INFO: 27225100 events read in total (1118734ms).
[08:36:03.149] <TB3> INFO: 27894950 events read in total (1142929ms).
[08:36:27.063] <TB3> INFO: 28565750 events read in total (1166843ms).
[08:36:51.024] <TB3> INFO: 29236950 events read in total (1190805ms).
[08:37:14.972] <TB3> INFO: 29907200 events read in total (1214752ms).
[08:37:38.906] <TB3> INFO: 30578400 events read in total (1238686ms).
[08:38:03.312] <TB3> INFO: 31248400 events read in total (1263092ms).
[08:38:27.063] <TB3> INFO: 31919500 events read in total (1286843ms).
[08:38:51.288] <TB3> INFO: 32591200 events read in total (1311068ms).
[08:39:15.275] <TB3> INFO: 33260650 events read in total (1335055ms).
[08:39:39.090] <TB3> INFO: 33931300 events read in total (1358870ms).
[08:40:03.373] <TB3> INFO: 34602700 events read in total (1383153ms).
[08:40:27.742] <TB3> INFO: 35274350 events read in total (1407522ms).
[08:40:52.137] <TB3> INFO: 35948300 events read in total (1431917ms).
[08:41:15.431] <TB3> INFO: 36608000 events read in total (1455211ms).
[08:41:15.488] <TB3> INFO: Test took 1456096ms.
[08:41:15.861] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[08:41:17.259] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[08:41:18.678] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[08:41:20.083] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[08:41:21.478] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[08:41:22.884] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[08:41:24.271] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[08:41:25.651] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[08:41:27.057] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[08:41:28.438] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[08:41:29.832] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[08:41:31.259] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[08:41:32.665] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[08:41:34.081] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[08:41:35.488] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[08:41:36.911] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[08:41:38.337] <TB3> INFO: PixTestScurves::scurves() done
[08:41:38.337] <TB3> INFO: Vcal mean: 140.41 122.18 115.62 124.23 127.36 131.30 122.04 124.42 119.37 128.19 125.82 125.69 124.91 116.43 123.81 126.38
[08:41:38.338] <TB3> INFO: Vcal RMS: 5.56 6.29 5.95 7.11 7.80 6.22 5.74 6.30 6.01 5.97 6.36 6.43 5.44 5.21 6.27 5.75
[08:41:38.338] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1478 seconds
[08:41:38.338] <TB3> INFO: Decoding statistics:
[08:41:38.338] <TB3> INFO: General information:
[08:41:38.338] <TB3> INFO: 16bit words read: 0
[08:41:38.338] <TB3> INFO: valid events total: 0
[08:41:38.338] <TB3> INFO: empty events: 0
[08:41:38.338] <TB3> INFO: valid events with pixels: 0
[08:41:38.338] <TB3> INFO: valid pixel hits: 0
[08:41:38.338] <TB3> INFO: Event errors: 0
[08:41:38.338] <TB3> INFO: start marker: 0
[08:41:38.338] <TB3> INFO: stop marker: 0
[08:41:38.338] <TB3> INFO: overflow: 0
[08:41:38.338] <TB3> INFO: invalid 5bit words: 0
[08:41:38.338] <TB3> INFO: invalid XOR eye diagram: 0
[08:41:38.338] <TB3> INFO: frame (failed synchr.): 0
[08:41:38.338] <TB3> INFO: idle data (no TBM trl): 0
[08:41:38.338] <TB3> INFO: no data (only TBM hdr): 0
[08:41:38.338] <TB3> INFO: TBM errors: 0
[08:41:38.338] <TB3> INFO: flawed TBM headers: 0
[08:41:38.338] <TB3> INFO: flawed TBM trailers: 0
[08:41:38.338] <TB3> INFO: event ID mismatches: 0
[08:41:38.338] <TB3> INFO: ROC errors: 0
[08:41:38.338] <TB3> INFO: missing ROC header(s): 0
[08:41:38.338] <TB3> INFO: misplaced readback start: 0
[08:41:38.338] <TB3> INFO: Pixel decoding errors: 0
[08:41:38.338] <TB3> INFO: pixel data incomplete: 0
[08:41:38.338] <TB3> INFO: pixel address: 0
[08:41:38.338] <TB3> INFO: pulse height fill bit: 0
[08:41:38.338] <TB3> INFO: buffer corruption: 0
[08:41:38.437] <TB3> INFO: ######################################################################
[08:41:38.437] <TB3> INFO: PixTestTrim::doTest()
[08:41:38.437] <TB3> INFO: ######################################################################
[08:41:38.438] <TB3> INFO: ----------------------------------------------------------------------
[08:41:38.438] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[08:41:38.438] <TB3> INFO: ----------------------------------------------------------------------
[08:41:38.483] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[08:41:38.483] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[08:41:38.496] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[08:41:38.496] <TB3> INFO: run 1 of 1
[08:41:38.741] <TB3> INFO: Expecting 5025280 events.
[08:42:11.323] <TB3> INFO: 832888 events read in total (31987ms).
[08:42:42.892] <TB3> INFO: 1664264 events read in total (63556ms).
[08:43:14.347] <TB3> INFO: 2492592 events read in total (95012ms).
[08:43:45.441] <TB3> INFO: 3316800 events read in total (126105ms).
[08:44:17.524] <TB3> INFO: 4138456 events read in total (158188ms).
[08:44:50.012] <TB3> INFO: 4959968 events read in total (190676ms).
[08:44:52.750] <TB3> INFO: 5025280 events read in total (193414ms).
[08:44:52.816] <TB3> INFO: Test took 194321ms.
[08:45:08.949] <TB3> INFO: ROC 0 VthrComp = 133
[08:45:08.950] <TB3> INFO: ROC 1 VthrComp = 122
[08:45:08.950] <TB3> INFO: ROC 2 VthrComp = 109
[08:45:08.952] <TB3> INFO: ROC 3 VthrComp = 120
[08:45:08.952] <TB3> INFO: ROC 4 VthrComp = 120
[08:45:08.952] <TB3> INFO: ROC 5 VthrComp = 132
[08:45:08.953] <TB3> INFO: ROC 6 VthrComp = 122
[08:45:08.953] <TB3> INFO: ROC 7 VthrComp = 119
[08:45:08.953] <TB3> INFO: ROC 8 VthrComp = 116
[08:45:08.953] <TB3> INFO: ROC 9 VthrComp = 125
[08:45:08.953] <TB3> INFO: ROC 10 VthrComp = 125
[08:45:08.953] <TB3> INFO: ROC 11 VthrComp = 127
[08:45:08.954] <TB3> INFO: ROC 12 VthrComp = 129
[08:45:08.954] <TB3> INFO: ROC 13 VthrComp = 120
[08:45:08.955] <TB3> INFO: ROC 14 VthrComp = 128
[08:45:08.955] <TB3> INFO: ROC 15 VthrComp = 126
[08:45:09.195] <TB3> INFO: Expecting 41600 events.
[08:45:12.685] <TB3> INFO: 41600 events read in total (2898ms).
[08:45:12.686] <TB3> INFO: Test took 3729ms.
[08:45:12.695] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[08:45:12.695] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[08:45:12.707] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[08:45:12.707] <TB3> INFO: run 1 of 1
[08:45:12.985] <TB3> INFO: Expecting 5025280 events.
[08:45:40.877] <TB3> INFO: 591128 events read in total (27300ms).
[08:46:07.653] <TB3> INFO: 1180984 events read in total (54076ms).
[08:46:34.692] <TB3> INFO: 1771592 events read in total (81115ms).
[08:47:01.818] <TB3> INFO: 2360792 events read in total (108241ms).
[08:47:28.555] <TB3> INFO: 2948112 events read in total (134978ms).
[08:47:55.262] <TB3> INFO: 3534224 events read in total (161685ms).
[08:48:22.233] <TB3> INFO: 4119776 events read in total (188656ms).
[08:48:48.752] <TB3> INFO: 4704536 events read in total (215175ms).
[08:49:04.217] <TB3> INFO: 5025280 events read in total (230641ms).
[08:49:04.283] <TB3> INFO: Test took 231576ms.
[08:49:25.469] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 68.5874 for pixel 0/4 mean/min/max = 52.9481/37.2137/68.6825
[08:49:25.469] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 61.5591 for pixel 11/8 mean/min/max = 47.2504/32.9338/61.567
[08:49:25.470] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 65.4393 for pixel 0/22 mean/min/max = 50.3377/34.9161/65.7592
[08:49:25.470] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 62.7039 for pixel 1/12 mean/min/max = 47.6224/32.2292/63.0155
[08:49:25.471] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 65.2001 for pixel 7/70 mean/min/max = 48.738/32.2688/65.2073
[08:49:25.472] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 59.1944 for pixel 17/1 mean/min/max = 45.7613/31.9945/59.5282
[08:49:25.472] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 59.3776 for pixel 2/69 mean/min/max = 46.3304/33.1733/59.4875
[08:49:25.473] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 61.8327 for pixel 0/3 mean/min/max = 46.8748/31.8452/61.9045
[08:49:25.473] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 60.5679 for pixel 5/79 mean/min/max = 46.7518/32.9357/60.5679
[08:49:25.474] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 61.0806 for pixel 9/4 mean/min/max = 46.4688/31.679/61.2586
[08:49:25.474] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 61.5707 for pixel 50/1 mean/min/max = 46.8174/32.0266/61.6082
[08:49:25.475] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 59.7051 for pixel 23/9 mean/min/max = 45.7658/31.7656/59.7659
[08:49:25.475] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 58.6829 for pixel 14/18 mean/min/max = 45.7145/32.676/58.7529
[08:49:25.476] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 58.8902 for pixel 51/5 mean/min/max = 46.0922/33.2826/58.9019
[08:49:25.476] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 60.135 for pixel 24/4 mean/min/max = 45.8039/31.3396/60.2681
[08:49:25.477] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 58.8963 for pixel 18/3 mean/min/max = 45.2723/31.5605/58.9842
[08:49:25.477] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:49:25.566] <TB3> INFO: Expecting 411648 events.
[08:49:35.234] <TB3> INFO: 411648 events read in total (9077ms).
[08:49:35.242] <TB3> INFO: Expecting 411648 events.
[08:49:44.748] <TB3> INFO: 411648 events read in total (9103ms).
[08:49:44.757] <TB3> INFO: Expecting 411648 events.
[08:49:54.187] <TB3> INFO: 411648 events read in total (9027ms).
[08:49:54.203] <TB3> INFO: Expecting 411648 events.
[08:50:03.745] <TB3> INFO: 411648 events read in total (9139ms).
[08:50:03.761] <TB3> INFO: Expecting 411648 events.
[08:50:13.310] <TB3> INFO: 411648 events read in total (9146ms).
[08:50:13.338] <TB3> INFO: Expecting 411648 events.
[08:50:22.883] <TB3> INFO: 411648 events read in total (9142ms).
[08:50:22.903] <TB3> INFO: Expecting 411648 events.
[08:50:32.519] <TB3> INFO: 411648 events read in total (9213ms).
[08:50:32.543] <TB3> INFO: Expecting 411648 events.
[08:50:42.060] <TB3> INFO: 411648 events read in total (9114ms).
[08:50:42.085] <TB3> INFO: Expecting 411648 events.
[08:50:51.925] <TB3> INFO: 411648 events read in total (9437ms).
[08:50:51.965] <TB3> INFO: Expecting 411648 events.
[08:51:01.359] <TB3> INFO: 411648 events read in total (8991ms).
[08:51:01.389] <TB3> INFO: Expecting 411648 events.
[08:51:11.026] <TB3> INFO: 411648 events read in total (9234ms).
[08:51:11.058] <TB3> INFO: Expecting 411648 events.
[08:51:20.584] <TB3> INFO: 411648 events read in total (9123ms).
[08:51:20.619] <TB3> INFO: Expecting 411648 events.
[08:51:30.140] <TB3> INFO: 411648 events read in total (9118ms).
[08:51:30.178] <TB3> INFO: Expecting 411648 events.
[08:51:39.725] <TB3> INFO: 411648 events read in total (9144ms).
[08:51:39.765] <TB3> INFO: Expecting 411648 events.
[08:51:49.405] <TB3> INFO: 411648 events read in total (9237ms).
[08:51:49.468] <TB3> INFO: Expecting 411648 events.
[08:51:59.015] <TB3> INFO: 411648 events read in total (9144ms).
[08:51:59.061] <TB3> INFO: Test took 153584ms.
[08:51:59.674] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[08:51:59.687] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[08:51:59.687] <TB3> INFO: run 1 of 1
[08:51:59.940] <TB3> INFO: Expecting 5025280 events.
[08:52:27.301] <TB3> INFO: 587920 events read in total (26769ms).
[08:52:54.413] <TB3> INFO: 1175456 events read in total (53881ms).
[08:53:21.768] <TB3> INFO: 1762352 events read in total (81236ms).
[08:53:49.321] <TB3> INFO: 2350448 events read in total (108789ms).
[08:54:16.673] <TB3> INFO: 2938056 events read in total (136141ms).
[08:54:43.902] <TB3> INFO: 3526800 events read in total (163370ms).
[08:55:10.728] <TB3> INFO: 4112736 events read in total (190196ms).
[08:55:37.527] <TB3> INFO: 4700992 events read in total (216995ms).
[08:55:52.821] <TB3> INFO: 5025280 events read in total (232289ms).
[08:55:52.936] <TB3> INFO: Test took 233250ms.
[08:56:12.526] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 4.250509 .. 145.341425
[08:56:12.844] <TB3> INFO: Expecting 208000 events.
[08:56:23.052] <TB3> INFO: 208000 events read in total (9617ms).
[08:56:23.054] <TB3> INFO: Test took 10526ms.
[08:56:23.101] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 4 .. 155 (-1/-1) hits flags = 528 (plus default)
[08:56:23.113] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[08:56:23.113] <TB3> INFO: run 1 of 1
[08:56:23.391] <TB3> INFO: Expecting 5058560 events.
[08:56:50.764] <TB3> INFO: 580992 events read in total (26781ms).
[08:57:17.115] <TB3> INFO: 1161312 events read in total (53134ms).
[08:57:43.525] <TB3> INFO: 1741888 events read in total (79542ms).
[08:58:10.164] <TB3> INFO: 2322640 events read in total (106181ms).
[08:58:37.499] <TB3> INFO: 2903128 events read in total (133516ms).
[08:59:03.525] <TB3> INFO: 3483080 events read in total (159542ms).
[08:59:30.832] <TB3> INFO: 4063664 events read in total (186849ms).
[08:59:57.377] <TB3> INFO: 4643800 events read in total (213394ms).
[09:00:16.357] <TB3> INFO: 5058560 events read in total (232374ms).
[09:00:16.450] <TB3> INFO: Test took 233337ms.
[09:00:38.234] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 27.005550 .. 47.942388
[09:00:38.472] <TB3> INFO: Expecting 208000 events.
[09:00:48.637] <TB3> INFO: 208000 events read in total (9573ms).
[09:00:48.638] <TB3> INFO: Test took 10403ms.
[09:00:48.686] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 57 (-1/-1) hits flags = 528 (plus default)
[09:00:48.698] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[09:00:48.698] <TB3> INFO: run 1 of 1
[09:00:48.976] <TB3> INFO: Expecting 1364480 events.
[09:01:17.705] <TB3> INFO: 652968 events read in total (28137ms).
[09:01:46.568] <TB3> INFO: 1304288 events read in total (57001ms).
[09:01:49.498] <TB3> INFO: 1364480 events read in total (59930ms).
[09:01:49.527] <TB3> INFO: Test took 60830ms.
[09:02:01.979] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 26.479289 .. 48.432593
[09:02:02.215] <TB3> INFO: Expecting 208000 events.
[09:02:12.619] <TB3> INFO: 208000 events read in total (9812ms).
[09:02:12.620] <TB3> INFO: Test took 10639ms.
[09:02:12.669] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 16 .. 58 (-1/-1) hits flags = 528 (plus default)
[09:02:12.681] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[09:02:12.681] <TB3> INFO: run 1 of 1
[09:02:12.960] <TB3> INFO: Expecting 1431040 events.
[09:02:42.320] <TB3> INFO: 653352 events read in total (28768ms).
[09:03:10.364] <TB3> INFO: 1305784 events read in total (56812ms).
[09:03:16.686] <TB3> INFO: 1431040 events read in total (63134ms).
[09:03:16.714] <TB3> INFO: Test took 64033ms.
[09:03:28.572] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 25.340712 .. 49.298986
[09:03:28.892] <TB3> INFO: Expecting 208000 events.
[09:03:39.105] <TB3> INFO: 208000 events read in total (9621ms).
[09:03:39.106] <TB3> INFO: Test took 10532ms.
[09:03:39.153] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 59 (-1/-1) hits flags = 528 (plus default)
[09:03:39.165] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[09:03:39.165] <TB3> INFO: run 1 of 1
[09:03:39.443] <TB3> INFO: Expecting 1497600 events.
[09:04:08.681] <TB3> INFO: 653816 events read in total (28646ms).
[09:04:37.353] <TB3> INFO: 1307200 events read in total (57318ms).
[09:04:45.664] <TB3> INFO: 1497600 events read in total (65629ms).
[09:04:45.706] <TB3> INFO: Test took 66541ms.
[09:04:58.352] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[09:04:58.352] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[09:04:58.364] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[09:04:58.365] <TB3> INFO: run 1 of 1
[09:04:58.600] <TB3> INFO: Expecting 1364480 events.
[09:05:27.928] <TB3> INFO: 668528 events read in total (28736ms).
[09:05:56.860] <TB3> INFO: 1336144 events read in total (57668ms).
[09:05:58.486] <TB3> INFO: 1364480 events read in total (59295ms).
[09:05:58.522] <TB3> INFO: Test took 60157ms.
[09:06:10.688] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C0.dat
[09:06:10.688] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C1.dat
[09:06:10.688] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C2.dat
[09:06:10.688] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C3.dat
[09:06:10.688] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C4.dat
[09:06:10.688] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C5.dat
[09:06:10.688] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C6.dat
[09:06:10.688] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C7.dat
[09:06:10.688] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C8.dat
[09:06:10.688] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C9.dat
[09:06:10.689] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C10.dat
[09:06:10.689] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C11.dat
[09:06:10.689] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C12.dat
[09:06:10.689] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C13.dat
[09:06:10.689] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C14.dat
[09:06:10.689] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C15.dat
[09:06:10.689] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//trimParameters35_C0.dat
[09:06:10.697] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//trimParameters35_C1.dat
[09:06:10.704] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//trimParameters35_C2.dat
[09:06:10.711] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//trimParameters35_C3.dat
[09:06:10.719] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//trimParameters35_C4.dat
[09:06:10.727] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//trimParameters35_C5.dat
[09:06:10.734] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//trimParameters35_C6.dat
[09:06:10.742] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//trimParameters35_C7.dat
[09:06:10.749] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//trimParameters35_C8.dat
[09:06:10.757] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//trimParameters35_C9.dat
[09:06:10.764] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//trimParameters35_C10.dat
[09:06:10.772] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//trimParameters35_C11.dat
[09:06:10.779] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//trimParameters35_C12.dat
[09:06:10.786] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//trimParameters35_C13.dat
[09:06:10.794] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//trimParameters35_C14.dat
[09:06:10.801] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//trimParameters35_C15.dat
[09:06:10.809] <TB3> INFO: PixTestTrim::trimTest() done
[09:06:10.809] <TB3> INFO: vtrim: 158 126 119 131 131 117 116 113 116 120 123 127 125 108 131 122
[09:06:10.809] <TB3> INFO: vthrcomp: 133 122 109 120 120 132 122 119 116 125 125 127 129 120 128 126
[09:06:10.809] <TB3> INFO: vcal mean: 34.98 35.32 35.33 35.00 35.32 34.98 34.94 35.30 35.02 35.16 35.27 34.98 34.99 34.95 34.99 34.94
[09:06:10.809] <TB3> INFO: vcal RMS: 1.20 1.44 1.55 1.07 1.47 1.17 0.94 1.48 1.07 1.31 1.50 1.01 0.97 1.01 1.13 1.08
[09:06:10.809] <TB3> INFO: bits mean: 7.08 9.35 8.35 9.04 9.24 9.67 9.16 9.05 9.10 9.78 9.51 9.51 9.53 8.73 10.03 9.98
[09:06:10.809] <TB3> INFO: bits RMS: 2.52 2.71 2.67 2.78 2.70 2.66 2.70 3.04 2.77 2.68 2.77 2.76 2.66 2.87 2.57 2.61
[09:06:10.818] <TB3> INFO: ----------------------------------------------------------------------
[09:06:10.818] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[09:06:10.818] <TB3> INFO: ----------------------------------------------------------------------
[09:06:10.821] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[09:06:10.835] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[09:06:10.835] <TB3> INFO: run 1 of 1
[09:06:11.152] <TB3> INFO: Expecting 4160000 events.
[09:06:45.434] <TB3> INFO: 774590 events read in total (33690ms).
[09:07:19.040] <TB3> INFO: 1543455 events read in total (67296ms).
[09:07:52.627] <TB3> INFO: 2305800 events read in total (100883ms).
[09:08:26.420] <TB3> INFO: 3064890 events read in total (134676ms).
[09:08:59.876] <TB3> INFO: 3822455 events read in total (168132ms).
[09:09:14.956] <TB3> INFO: 4160000 events read in total (183212ms).
[09:09:15.028] <TB3> INFO: Test took 184193ms.
[09:09:36.682] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 207 (-1/-1) hits flags = 528 (plus default)
[09:09:36.694] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[09:09:36.694] <TB3> INFO: run 1 of 1
[09:09:36.934] <TB3> INFO: Expecting 4326400 events.
[09:10:10.061] <TB3> INFO: 736465 events read in total (32535ms).
[09:10:43.126] <TB3> INFO: 1469450 events read in total (65600ms).
[09:11:15.161] <TB3> INFO: 2197415 events read in total (97635ms).
[09:11:47.289] <TB3> INFO: 2922165 events read in total (129763ms).
[09:12:19.950] <TB3> INFO: 3646245 events read in total (162424ms).
[09:12:50.708] <TB3> INFO: 4326400 events read in total (193182ms).
[09:12:50.774] <TB3> INFO: Test took 194080ms.
[09:13:13.725] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[09:13:13.741] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[09:13:13.741] <TB3> INFO: run 1 of 1
[09:13:13.977] <TB3> INFO: Expecting 4305600 events.
[09:13:48.003] <TB3> INFO: 738170 events read in total (33434ms).
[09:14:20.648] <TB3> INFO: 1472640 events read in total (66079ms).
[09:14:53.586] <TB3> INFO: 2202080 events read in total (99017ms).
[09:15:26.142] <TB3> INFO: 2928370 events read in total (131573ms).
[09:15:58.856] <TB3> INFO: 3654145 events read in total (164287ms).
[09:16:28.299] <TB3> INFO: 4305600 events read in total (193730ms).
[09:16:28.381] <TB3> INFO: Test took 194640ms.
[09:16:51.216] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[09:16:51.229] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[09:16:51.229] <TB3> INFO: run 1 of 1
[09:16:51.467] <TB3> INFO: Expecting 4305600 events.
[09:17:25.027] <TB3> INFO: 738370 events read in total (32968ms).
[09:17:58.382] <TB3> INFO: 1472865 events read in total (66323ms).
[09:18:30.766] <TB3> INFO: 2202560 events read in total (98707ms).
[09:19:03.318] <TB3> INFO: 2929065 events read in total (131259ms).
[09:19:36.052] <TB3> INFO: 3655125 events read in total (163993ms).
[09:20:05.481] <TB3> INFO: 4305600 events read in total (193422ms).
[09:20:05.539] <TB3> INFO: Test took 194311ms.
[09:20:28.265] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[09:20:28.277] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[09:20:28.277] <TB3> INFO: run 1 of 1
[09:20:28.512] <TB3> INFO: Expecting 4243200 events.
[09:21:02.250] <TB3> INFO: 742870 events read in total (33146ms).
[09:21:35.103] <TB3> INFO: 1481895 events read in total (65999ms).
[09:22:07.871] <TB3> INFO: 2215820 events read in total (98767ms).
[09:22:40.663] <TB3> INFO: 2946605 events read in total (131559ms).
[09:23:12.764] <TB3> INFO: 3676030 events read in total (163660ms).
[09:23:37.894] <TB3> INFO: 4243200 events read in total (188790ms).
[09:23:37.954] <TB3> INFO: Test took 189676ms.
[09:24:00.610] <TB3> INFO: PixTestTrim::trimBitTest() done
[09:24:00.611] <TB3> INFO: PixTestTrim::doTest() done, duration: 2542 seconds
[09:24:00.611] <TB3> INFO: Decoding statistics:
[09:24:00.611] <TB3> INFO: General information:
[09:24:00.611] <TB3> INFO: 16bit words read: 0
[09:24:00.611] <TB3> INFO: valid events total: 0
[09:24:00.611] <TB3> INFO: empty events: 0
[09:24:00.611] <TB3> INFO: valid events with pixels: 0
[09:24:00.611] <TB3> INFO: valid pixel hits: 0
[09:24:00.611] <TB3> INFO: Event errors: 0
[09:24:00.611] <TB3> INFO: start marker: 0
[09:24:00.611] <TB3> INFO: stop marker: 0
[09:24:00.611] <TB3> INFO: overflow: 0
[09:24:00.611] <TB3> INFO: invalid 5bit words: 0
[09:24:00.611] <TB3> INFO: invalid XOR eye diagram: 0
[09:24:00.611] <TB3> INFO: frame (failed synchr.): 0
[09:24:00.611] <TB3> INFO: idle data (no TBM trl): 0
[09:24:00.611] <TB3> INFO: no data (only TBM hdr): 0
[09:24:00.611] <TB3> INFO: TBM errors: 0
[09:24:00.611] <TB3> INFO: flawed TBM headers: 0
[09:24:00.611] <TB3> INFO: flawed TBM trailers: 0
[09:24:00.611] <TB3> INFO: event ID mismatches: 0
[09:24:00.611] <TB3> INFO: ROC errors: 0
[09:24:00.611] <TB3> INFO: missing ROC header(s): 0
[09:24:00.611] <TB3> INFO: misplaced readback start: 0
[09:24:00.611] <TB3> INFO: Pixel decoding errors: 0
[09:24:00.611] <TB3> INFO: pixel data incomplete: 0
[09:24:00.611] <TB3> INFO: pixel address: 0
[09:24:00.611] <TB3> INFO: pulse height fill bit: 0
[09:24:00.611] <TB3> INFO: buffer corruption: 0
[09:24:01.208] <TB3> INFO: ######################################################################
[09:24:01.208] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[09:24:01.208] <TB3> INFO: ######################################################################
[09:24:01.447] <TB3> INFO: Expecting 41600 events.
[09:24:05.059] <TB3> INFO: 41600 events read in total (3021ms).
[09:24:05.060] <TB3> INFO: Test took 3851ms.
[09:24:05.501] <TB3> INFO: Expecting 41600 events.
[09:24:09.168] <TB3> INFO: 41600 events read in total (3075ms).
[09:24:09.169] <TB3> INFO: Test took 3906ms.
[09:24:09.462] <TB3> INFO: Expecting 41600 events.
[09:24:13.049] <TB3> INFO: 41600 events read in total (2995ms).
[09:24:13.050] <TB3> INFO: Test took 3853ms.
[09:24:13.390] <TB3> INFO: Expecting 41600 events.
[09:24:16.954] <TB3> INFO: 41600 events read in total (2973ms).
[09:24:16.955] <TB3> INFO: Test took 3881ms.
[09:24:17.299] <TB3> INFO: Expecting 41600 events.
[09:24:20.997] <TB3> INFO: 41600 events read in total (3106ms).
[09:24:20.998] <TB3> INFO: Test took 4015ms.
[09:24:21.286] <TB3> INFO: Expecting 41600 events.
[09:24:25.188] <TB3> INFO: 41600 events read in total (3310ms).
[09:24:25.189] <TB3> INFO: Test took 4168ms.
[09:24:25.478] <TB3> INFO: Expecting 41600 events.
[09:24:29.060] <TB3> INFO: 41600 events read in total (2990ms).
[09:24:29.060] <TB3> INFO: Test took 3847ms.
[09:24:29.401] <TB3> INFO: Expecting 41600 events.
[09:24:33.085] <TB3> INFO: 41600 events read in total (3093ms).
[09:24:33.086] <TB3> INFO: Test took 4002ms.
[09:24:33.426] <TB3> INFO: Expecting 41600 events.
[09:24:37.213] <TB3> INFO: 41600 events read in total (3196ms).
[09:24:37.213] <TB3> INFO: Test took 4098ms.
[09:24:37.502] <TB3> INFO: Expecting 41600 events.
[09:24:41.186] <TB3> INFO: 41600 events read in total (3092ms).
[09:24:41.188] <TB3> INFO: Test took 3951ms.
[09:24:41.481] <TB3> INFO: Expecting 41600 events.
[09:24:45.123] <TB3> INFO: 41600 events read in total (3050ms).
[09:24:45.124] <TB3> INFO: Test took 3908ms.
[09:24:45.413] <TB3> INFO: Expecting 41600 events.
[09:24:48.922] <TB3> INFO: 41600 events read in total (2917ms).
[09:24:48.923] <TB3> INFO: Test took 3775ms.
[09:24:49.262] <TB3> INFO: Expecting 41600 events.
[09:24:52.799] <TB3> INFO: 41600 events read in total (2945ms).
[09:24:52.800] <TB3> INFO: Test took 3852ms.
[09:24:53.093] <TB3> INFO: Expecting 41600 events.
[09:24:56.719] <TB3> INFO: 41600 events read in total (3034ms).
[09:24:56.720] <TB3> INFO: Test took 3891ms.
[09:24:57.057] <TB3> INFO: Expecting 41600 events.
[09:25:00.874] <TB3> INFO: 41600 events read in total (3226ms).
[09:25:00.875] <TB3> INFO: Test took 4131ms.
[09:25:01.165] <TB3> INFO: Expecting 41600 events.
[09:25:04.812] <TB3> INFO: 41600 events read in total (3055ms).
[09:25:04.813] <TB3> INFO: Test took 3913ms.
[09:25:05.102] <TB3> INFO: Expecting 41600 events.
[09:25:08.725] <TB3> INFO: 41600 events read in total (3031ms).
[09:25:08.727] <TB3> INFO: Test took 3889ms.
[09:25:09.020] <TB3> INFO: Expecting 41600 events.
[09:25:12.704] <TB3> INFO: 41600 events read in total (3092ms).
[09:25:12.705] <TB3> INFO: Test took 3949ms.
[09:25:13.047] <TB3> INFO: Expecting 41600 events.
[09:25:16.685] <TB3> INFO: 41600 events read in total (3047ms).
[09:25:16.686] <TB3> INFO: Test took 3952ms.
[09:25:16.975] <TB3> INFO: Expecting 41600 events.
[09:25:20.626] <TB3> INFO: 41600 events read in total (3059ms).
[09:25:20.626] <TB3> INFO: Test took 3916ms.
[09:25:20.915] <TB3> INFO: Expecting 41600 events.
[09:25:24.490] <TB3> INFO: 41600 events read in total (2983ms).
[09:25:24.491] <TB3> INFO: Test took 3841ms.
[09:25:24.833] <TB3> INFO: Expecting 41600 events.
[09:25:28.512] <TB3> INFO: 41600 events read in total (3087ms).
[09:25:28.513] <TB3> INFO: Test took 3993ms.
[09:25:28.807] <TB3> INFO: Expecting 41600 events.
[09:25:32.457] <TB3> INFO: 41600 events read in total (3058ms).
[09:25:32.458] <TB3> INFO: Test took 3916ms.
[09:25:32.746] <TB3> INFO: Expecting 41600 events.
[09:25:36.240] <TB3> INFO: 41600 events read in total (2902ms).
[09:25:36.240] <TB3> INFO: Test took 3758ms.
[09:25:36.529] <TB3> INFO: Expecting 41600 events.
[09:25:40.247] <TB3> INFO: 41600 events read in total (3126ms).
[09:25:40.248] <TB3> INFO: Test took 3984ms.
[09:25:40.537] <TB3> INFO: Expecting 41600 events.
[09:25:44.048] <TB3> INFO: 41600 events read in total (2920ms).
[09:25:44.048] <TB3> INFO: Test took 3776ms.
[09:25:44.337] <TB3> INFO: Expecting 41600 events.
[09:25:47.970] <TB3> INFO: 41600 events read in total (3041ms).
[09:25:47.971] <TB3> INFO: Test took 3899ms.
[09:25:48.260] <TB3> INFO: Expecting 41600 events.
[09:25:51.758] <TB3> INFO: 41600 events read in total (2907ms).
[09:25:51.759] <TB3> INFO: Test took 3764ms.
[09:25:52.049] <TB3> INFO: Expecting 41600 events.
[09:25:55.855] <TB3> INFO: 41600 events read in total (3214ms).
[09:25:55.856] <TB3> INFO: Test took 4072ms.
[09:25:56.146] <TB3> INFO: Expecting 2560 events.
[09:25:57.040] <TB3> INFO: 2560 events read in total (302ms).
[09:25:57.040] <TB3> INFO: Test took 1171ms.
[09:25:57.347] <TB3> INFO: Expecting 2560 events.
[09:25:58.234] <TB3> INFO: 2560 events read in total (295ms).
[09:25:58.234] <TB3> INFO: Test took 1193ms.
[09:25:58.542] <TB3> INFO: Expecting 2560 events.
[09:25:59.429] <TB3> INFO: 2560 events read in total (295ms).
[09:25:59.429] <TB3> INFO: Test took 1194ms.
[09:25:59.737] <TB3> INFO: Expecting 2560 events.
[09:26:00.624] <TB3> INFO: 2560 events read in total (295ms).
[09:26:00.624] <TB3> INFO: Test took 1195ms.
[09:26:00.933] <TB3> INFO: Expecting 2560 events.
[09:26:01.815] <TB3> INFO: 2560 events read in total (291ms).
[09:26:01.815] <TB3> INFO: Test took 1190ms.
[09:26:02.123] <TB3> INFO: Expecting 2560 events.
[09:26:03.009] <TB3> INFO: 2560 events read in total (294ms).
[09:26:03.010] <TB3> INFO: Test took 1194ms.
[09:26:03.317] <TB3> INFO: Expecting 2560 events.
[09:26:04.199] <TB3> INFO: 2560 events read in total (290ms).
[09:26:04.200] <TB3> INFO: Test took 1190ms.
[09:26:04.508] <TB3> INFO: Expecting 2560 events.
[09:26:05.396] <TB3> INFO: 2560 events read in total (298ms).
[09:26:05.397] <TB3> INFO: Test took 1197ms.
[09:26:05.705] <TB3> INFO: Expecting 2560 events.
[09:26:06.586] <TB3> INFO: 2560 events read in total (290ms).
[09:26:06.587] <TB3> INFO: Test took 1190ms.
[09:26:06.894] <TB3> INFO: Expecting 2560 events.
[09:26:07.777] <TB3> INFO: 2560 events read in total (291ms).
[09:26:07.777] <TB3> INFO: Test took 1191ms.
[09:26:08.085] <TB3> INFO: Expecting 2560 events.
[09:26:08.971] <TB3> INFO: 2560 events read in total (291ms).
[09:26:08.971] <TB3> INFO: Test took 1193ms.
[09:26:09.279] <TB3> INFO: Expecting 2560 events.
[09:26:10.170] <TB3> INFO: 2560 events read in total (299ms).
[09:26:10.171] <TB3> INFO: Test took 1199ms.
[09:26:10.479] <TB3> INFO: Expecting 2560 events.
[09:26:11.365] <TB3> INFO: 2560 events read in total (295ms).
[09:26:11.365] <TB3> INFO: Test took 1194ms.
[09:26:11.673] <TB3> INFO: Expecting 2560 events.
[09:26:12.559] <TB3> INFO: 2560 events read in total (294ms).
[09:26:12.559] <TB3> INFO: Test took 1194ms.
[09:26:12.867] <TB3> INFO: Expecting 2560 events.
[09:26:13.759] <TB3> INFO: 2560 events read in total (300ms).
[09:26:13.759] <TB3> INFO: Test took 1200ms.
[09:26:14.067] <TB3> INFO: Expecting 2560 events.
[09:26:14.959] <TB3> INFO: 2560 events read in total (300ms).
[09:26:14.960] <TB3> INFO: Test took 1200ms.
[09:26:14.963] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:26:15.268] <TB3> INFO: Expecting 655360 events.
[09:26:30.403] <TB3> INFO: 655360 events read in total (14543ms).
[09:26:30.414] <TB3> INFO: Expecting 655360 events.
[09:26:45.308] <TB3> INFO: 655360 events read in total (14491ms).
[09:26:45.324] <TB3> INFO: Expecting 655360 events.
[09:27:00.291] <TB3> INFO: 655360 events read in total (14564ms).
[09:27:00.310] <TB3> INFO: Expecting 655360 events.
[09:27:15.398] <TB3> INFO: 655360 events read in total (14684ms).
[09:27:15.434] <TB3> INFO: Expecting 655360 events.
[09:27:30.298] <TB3> INFO: 655360 events read in total (14461ms).
[09:27:30.327] <TB3> INFO: Expecting 655360 events.
[09:27:45.370] <TB3> INFO: 655360 events read in total (14640ms).
[09:27:45.403] <TB3> INFO: Expecting 655360 events.
[09:28:00.248] <TB3> INFO: 655360 events read in total (14442ms).
[09:28:00.285] <TB3> INFO: Expecting 655360 events.
[09:28:15.238] <TB3> INFO: 655360 events read in total (14549ms).
[09:28:15.284] <TB3> INFO: Expecting 655360 events.
[09:28:30.133] <TB3> INFO: 655360 events read in total (14446ms).
[09:28:30.204] <TB3> INFO: Expecting 655360 events.
[09:28:45.272] <TB3> INFO: 655360 events read in total (14665ms).
[09:28:45.325] <TB3> INFO: Expecting 655360 events.
[09:29:00.396] <TB3> INFO: 655360 events read in total (14668ms).
[09:29:00.477] <TB3> INFO: Expecting 655360 events.
[09:29:15.500] <TB3> INFO: 655360 events read in total (14620ms).
[09:29:15.562] <TB3> INFO: Expecting 655360 events.
[09:29:30.340] <TB3> INFO: 655360 events read in total (14375ms).
[09:29:30.403] <TB3> INFO: Expecting 655360 events.
[09:29:45.486] <TB3> INFO: 655360 events read in total (14680ms).
[09:29:45.558] <TB3> INFO: Expecting 655360 events.
[09:30:00.380] <TB3> INFO: 655360 events read in total (14419ms).
[09:30:00.457] <TB3> INFO: Expecting 655360 events.
[09:30:15.392] <TB3> INFO: 655360 events read in total (14531ms).
[09:30:15.481] <TB3> INFO: Test took 240518ms.
[09:30:15.580] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:30:15.832] <TB3> INFO: Expecting 655360 events.
[09:30:30.855] <TB3> INFO: 655360 events read in total (14431ms).
[09:30:30.868] <TB3> INFO: Expecting 655360 events.
[09:30:45.716] <TB3> INFO: 655360 events read in total (14445ms).
[09:30:45.731] <TB3> INFO: Expecting 655360 events.
[09:31:00.633] <TB3> INFO: 655360 events read in total (14499ms).
[09:31:00.653] <TB3> INFO: Expecting 655360 events.
[09:31:15.783] <TB3> INFO: 655360 events read in total (14727ms).
[09:31:15.809] <TB3> INFO: Expecting 655360 events.
[09:31:30.786] <TB3> INFO: 655360 events read in total (14574ms).
[09:31:30.829] <TB3> INFO: Expecting 655360 events.
[09:31:45.590] <TB3> INFO: 655360 events read in total (14358ms).
[09:31:45.639] <TB3> INFO: Expecting 655360 events.
[09:32:00.556] <TB3> INFO: 655360 events read in total (14514ms).
[09:32:00.605] <TB3> INFO: Expecting 655360 events.
[09:32:15.526] <TB3> INFO: 655360 events read in total (14518ms).
[09:32:15.566] <TB3> INFO: Expecting 655360 events.
[09:32:30.567] <TB3> INFO: 655360 events read in total (14598ms).
[09:32:30.615] <TB3> INFO: Expecting 655360 events.
[09:32:45.597] <TB3> INFO: 655360 events read in total (14579ms).
[09:32:45.676] <TB3> INFO: Expecting 655360 events.
[09:33:00.686] <TB3> INFO: 655360 events read in total (14607ms).
[09:33:00.754] <TB3> INFO: Expecting 655360 events.
[09:33:15.614] <TB3> INFO: 655360 events read in total (14457ms).
[09:33:15.674] <TB3> INFO: Expecting 655360 events.
[09:33:30.614] <TB3> INFO: 655360 events read in total (14537ms).
[09:33:30.678] <TB3> INFO: Expecting 655360 events.
[09:33:45.130] <TB3> INFO: 655360 events read in total (14049ms).
[09:33:45.201] <TB3> INFO: Expecting 655360 events.
[09:34:00.152] <TB3> INFO: 655360 events read in total (14548ms).
[09:34:00.270] <TB3> INFO: Expecting 655360 events.
[09:34:15.292] <TB3> INFO: 655360 events read in total (14618ms).
[09:34:15.400] <TB3> INFO: Test took 239820ms.
[09:34:15.563] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:15.569] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:15.575] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[09:34:15.581] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[09:34:15.586] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[09:34:15.592] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:15.598] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[09:34:15.603] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:15.610] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[09:34:15.615] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:15.621] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:15.627] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:15.633] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:15.638] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:15.644] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:15.650] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[09:34:15.656] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:15.662] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:15.668] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[09:34:15.674] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[09:34:15.680] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[09:34:15.685] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:15.692] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:15.697] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[09:34:15.703] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[09:34:15.709] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[09:34:15.715] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[09:34:15.720] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[09:34:15.727] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[09:34:15.732] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:15.738] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[09:34:15.744] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:15.749] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[09:34:15.784] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C0.dat
[09:34:15.784] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C1.dat
[09:34:15.784] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C2.dat
[09:34:15.784] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C3.dat
[09:34:15.784] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C4.dat
[09:34:15.784] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C5.dat
[09:34:15.784] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C6.dat
[09:34:15.784] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C7.dat
[09:34:15.784] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C8.dat
[09:34:15.784] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C9.dat
[09:34:15.785] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C10.dat
[09:34:15.785] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C11.dat
[09:34:15.785] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C12.dat
[09:34:15.785] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C13.dat
[09:34:15.785] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C14.dat
[09:34:15.785] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//dacParameters35_C15.dat
[09:34:16.029] <TB3> INFO: Expecting 41600 events.
[09:34:19.267] <TB3> INFO: 41600 events read in total (2646ms).
[09:34:19.268] <TB3> INFO: Test took 3480ms.
[09:34:19.767] <TB3> INFO: Expecting 41600 events.
[09:34:22.876] <TB3> INFO: 41600 events read in total (2518ms).
[09:34:22.877] <TB3> INFO: Test took 3393ms.
[09:34:23.324] <TB3> INFO: Expecting 41600 events.
[09:34:26.520] <TB3> INFO: 41600 events read in total (2604ms).
[09:34:26.521] <TB3> INFO: Test took 3433ms.
[09:34:26.744] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:26.833] <TB3> INFO: Expecting 2560 events.
[09:34:27.722] <TB3> INFO: 2560 events read in total (297ms).
[09:34:27.722] <TB3> INFO: Test took 978ms.
[09:34:27.725] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:28.031] <TB3> INFO: Expecting 2560 events.
[09:34:28.918] <TB3> INFO: 2560 events read in total (295ms).
[09:34:28.918] <TB3> INFO: Test took 1193ms.
[09:34:28.920] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:29.227] <TB3> INFO: Expecting 2560 events.
[09:34:30.114] <TB3> INFO: 2560 events read in total (296ms).
[09:34:30.114] <TB3> INFO: Test took 1194ms.
[09:34:30.116] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:30.422] <TB3> INFO: Expecting 2560 events.
[09:34:31.309] <TB3> INFO: 2560 events read in total (295ms).
[09:34:31.310] <TB3> INFO: Test took 1194ms.
[09:34:31.312] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:31.618] <TB3> INFO: Expecting 2560 events.
[09:34:32.512] <TB3> INFO: 2560 events read in total (302ms).
[09:34:32.513] <TB3> INFO: Test took 1201ms.
[09:34:32.515] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:32.821] <TB3> INFO: Expecting 2560 events.
[09:34:33.710] <TB3> INFO: 2560 events read in total (298ms).
[09:34:33.710] <TB3> INFO: Test took 1196ms.
[09:34:33.712] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:34.019] <TB3> INFO: Expecting 2560 events.
[09:34:34.906] <TB3> INFO: 2560 events read in total (296ms).
[09:34:34.906] <TB3> INFO: Test took 1194ms.
[09:34:34.910] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:35.215] <TB3> INFO: Expecting 2560 events.
[09:34:36.108] <TB3> INFO: 2560 events read in total (301ms).
[09:34:36.108] <TB3> INFO: Test took 1198ms.
[09:34:36.111] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:36.416] <TB3> INFO: Expecting 2560 events.
[09:34:37.299] <TB3> INFO: 2560 events read in total (291ms).
[09:34:37.299] <TB3> INFO: Test took 1189ms.
[09:34:37.302] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:37.608] <TB3> INFO: Expecting 2560 events.
[09:34:38.490] <TB3> INFO: 2560 events read in total (290ms).
[09:34:38.491] <TB3> INFO: Test took 1189ms.
[09:34:38.493] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:38.801] <TB3> INFO: Expecting 2560 events.
[09:34:39.690] <TB3> INFO: 2560 events read in total (298ms).
[09:34:39.691] <TB3> INFO: Test took 1199ms.
[09:34:39.693] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:39.999] <TB3> INFO: Expecting 2560 events.
[09:34:40.880] <TB3> INFO: 2560 events read in total (290ms).
[09:34:40.880] <TB3> INFO: Test took 1187ms.
[09:34:40.882] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:41.188] <TB3> INFO: Expecting 2560 events.
[09:34:42.071] <TB3> INFO: 2560 events read in total (291ms).
[09:34:42.071] <TB3> INFO: Test took 1189ms.
[09:34:42.074] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:42.380] <TB3> INFO: Expecting 2560 events.
[09:34:43.261] <TB3> INFO: 2560 events read in total (290ms).
[09:34:43.262] <TB3> INFO: Test took 1189ms.
[09:34:43.265] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:43.570] <TB3> INFO: Expecting 2560 events.
[09:34:44.452] <TB3> INFO: 2560 events read in total (290ms).
[09:34:44.453] <TB3> INFO: Test took 1188ms.
[09:34:44.455] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:44.762] <TB3> INFO: Expecting 2560 events.
[09:34:45.647] <TB3> INFO: 2560 events read in total (294ms).
[09:34:45.647] <TB3> INFO: Test took 1192ms.
[09:34:45.649] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:45.955] <TB3> INFO: Expecting 2560 events.
[09:34:46.844] <TB3> INFO: 2560 events read in total (296ms).
[09:34:46.845] <TB3> INFO: Test took 1196ms.
[09:34:46.848] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:47.153] <TB3> INFO: Expecting 2560 events.
[09:34:48.036] <TB3> INFO: 2560 events read in total (291ms).
[09:34:48.036] <TB3> INFO: Test took 1188ms.
[09:34:48.038] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:48.345] <TB3> INFO: Expecting 2560 events.
[09:34:49.227] <TB3> INFO: 2560 events read in total (290ms).
[09:34:49.228] <TB3> INFO: Test took 1190ms.
[09:34:49.230] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:49.537] <TB3> INFO: Expecting 2560 events.
[09:34:50.427] <TB3> INFO: 2560 events read in total (299ms).
[09:34:50.428] <TB3> INFO: Test took 1198ms.
[09:34:50.430] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:50.735] <TB3> INFO: Expecting 2560 events.
[09:34:51.617] <TB3> INFO: 2560 events read in total (291ms).
[09:34:51.618] <TB3> INFO: Test took 1188ms.
[09:34:51.620] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:51.926] <TB3> INFO: Expecting 2560 events.
[09:34:52.815] <TB3> INFO: 2560 events read in total (297ms).
[09:34:52.815] <TB3> INFO: Test took 1195ms.
[09:34:52.818] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:53.123] <TB3> INFO: Expecting 2560 events.
[09:34:54.006] <TB3> INFO: 2560 events read in total (291ms).
[09:34:54.007] <TB3> INFO: Test took 1189ms.
[09:34:54.009] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:54.314] <TB3> INFO: Expecting 2560 events.
[09:34:55.197] <TB3> INFO: 2560 events read in total (291ms).
[09:34:55.197] <TB3> INFO: Test took 1188ms.
[09:34:55.199] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:55.505] <TB3> INFO: Expecting 2560 events.
[09:34:56.390] <TB3> INFO: 2560 events read in total (293ms).
[09:34:56.390] <TB3> INFO: Test took 1191ms.
[09:34:56.393] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:56.698] <TB3> INFO: Expecting 2560 events.
[09:34:57.592] <TB3> INFO: 2560 events read in total (302ms).
[09:34:57.592] <TB3> INFO: Test took 1200ms.
[09:34:57.594] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:57.901] <TB3> INFO: Expecting 2560 events.
[09:34:58.788] <TB3> INFO: 2560 events read in total (296ms).
[09:34:58.789] <TB3> INFO: Test took 1195ms.
[09:34:58.791] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:59.097] <TB3> INFO: Expecting 2560 events.
[09:34:59.985] <TB3> INFO: 2560 events read in total (296ms).
[09:34:59.985] <TB3> INFO: Test took 1194ms.
[09:34:59.988] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:00.293] <TB3> INFO: Expecting 2560 events.
[09:35:01.179] <TB3> INFO: 2560 events read in total (294ms).
[09:35:01.180] <TB3> INFO: Test took 1193ms.
[09:35:01.182] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:01.488] <TB3> INFO: Expecting 2560 events.
[09:35:02.381] <TB3> INFO: 2560 events read in total (301ms).
[09:35:02.381] <TB3> INFO: Test took 1199ms.
[09:35:02.384] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:02.690] <TB3> INFO: Expecting 2560 events.
[09:35:03.578] <TB3> INFO: 2560 events read in total (296ms).
[09:35:03.579] <TB3> INFO: Test took 1195ms.
[09:35:03.581] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:03.887] <TB3> INFO: Expecting 2560 events.
[09:35:04.774] <TB3> INFO: 2560 events read in total (296ms).
[09:35:04.774] <TB3> INFO: Test took 1193ms.
[09:35:05.238] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 664 seconds
[09:35:05.238] <TB3> INFO: PH scale (per ROC): 42 53 29 46 39 43 41 47 41 36 44 33 41 39 48 42
[09:35:05.238] <TB3> INFO: PH offset (per ROC): 111 123 108 107 104 94 92 118 115 112 111 115 98 103 112 108
[09:35:05.245] <TB3> INFO: Decoding statistics:
[09:35:05.246] <TB3> INFO: General information:
[09:35:05.246] <TB3> INFO: 16bit words read: 127882
[09:35:05.246] <TB3> INFO: valid events total: 20480
[09:35:05.246] <TB3> INFO: empty events: 17979
[09:35:05.246] <TB3> INFO: valid events with pixels: 2501
[09:35:05.246] <TB3> INFO: valid pixel hits: 2501
[09:35:05.246] <TB3> INFO: Event errors: 0
[09:35:05.246] <TB3> INFO: start marker: 0
[09:35:05.246] <TB3> INFO: stop marker: 0
[09:35:05.246] <TB3> INFO: overflow: 0
[09:35:05.246] <TB3> INFO: invalid 5bit words: 0
[09:35:05.246] <TB3> INFO: invalid XOR eye diagram: 0
[09:35:05.246] <TB3> INFO: frame (failed synchr.): 0
[09:35:05.246] <TB3> INFO: idle data (no TBM trl): 0
[09:35:05.246] <TB3> INFO: no data (only TBM hdr): 0
[09:35:05.246] <TB3> INFO: TBM errors: 0
[09:35:05.246] <TB3> INFO: flawed TBM headers: 0
[09:35:05.246] <TB3> INFO: flawed TBM trailers: 0
[09:35:05.246] <TB3> INFO: event ID mismatches: 0
[09:35:05.246] <TB3> INFO: ROC errors: 0
[09:35:05.246] <TB3> INFO: missing ROC header(s): 0
[09:35:05.246] <TB3> INFO: misplaced readback start: 0
[09:35:05.246] <TB3> INFO: Pixel decoding errors: 0
[09:35:05.246] <TB3> INFO: pixel data incomplete: 0
[09:35:05.246] <TB3> INFO: pixel address: 0
[09:35:05.246] <TB3> INFO: pulse height fill bit: 0
[09:35:05.246] <TB3> INFO: buffer corruption: 0
[09:35:05.407] <TB3> INFO: ######################################################################
[09:35:05.407] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[09:35:05.407] <TB3> INFO: ######################################################################
[09:35:05.421] <TB3> INFO: scanning low vcal = 10
[09:35:05.659] <TB3> INFO: Expecting 41600 events.
[09:35:09.242] <TB3> INFO: 41600 events read in total (2992ms).
[09:35:09.242] <TB3> INFO: Test took 3821ms.
[09:35:09.244] <TB3> INFO: scanning low vcal = 20
[09:35:09.541] <TB3> INFO: Expecting 41600 events.
[09:35:13.168] <TB3> INFO: 41600 events read in total (3036ms).
[09:35:13.168] <TB3> INFO: Test took 3923ms.
[09:35:13.170] <TB3> INFO: scanning low vcal = 30
[09:35:13.486] <TB3> INFO: Expecting 41600 events.
[09:35:17.135] <TB3> INFO: 41600 events read in total (3057ms).
[09:35:17.136] <TB3> INFO: Test took 3966ms.
[09:35:17.138] <TB3> INFO: scanning low vcal = 40
[09:35:17.416] <TB3> INFO: Expecting 41600 events.
[09:35:21.451] <TB3> INFO: 41600 events read in total (3443ms).
[09:35:21.452] <TB3> INFO: Test took 4313ms.
[09:35:21.455] <TB3> INFO: scanning low vcal = 50
[09:35:21.773] <TB3> INFO: Expecting 41600 events.
[09:35:25.836] <TB3> INFO: 41600 events read in total (3471ms).
[09:35:25.837] <TB3> INFO: Test took 4382ms.
[09:35:25.840] <TB3> INFO: scanning low vcal = 60
[09:35:26.157] <TB3> INFO: Expecting 41600 events.
[09:35:30.203] <TB3> INFO: 41600 events read in total (3454ms).
[09:35:30.203] <TB3> INFO: Test took 4363ms.
[09:35:30.206] <TB3> INFO: scanning low vcal = 70
[09:35:30.483] <TB3> INFO: Expecting 41600 events.
[09:35:34.468] <TB3> INFO: 41600 events read in total (3394ms).
[09:35:34.469] <TB3> INFO: Test took 4263ms.
[09:35:34.472] <TB3> INFO: scanning low vcal = 80
[09:35:34.748] <TB3> INFO: Expecting 41600 events.
[09:35:38.817] <TB3> INFO: 41600 events read in total (3477ms).
[09:35:38.818] <TB3> INFO: Test took 4346ms.
[09:35:38.821] <TB3> INFO: scanning low vcal = 90
[09:35:39.137] <TB3> INFO: Expecting 41600 events.
[09:35:43.129] <TB3> INFO: 41600 events read in total (3400ms).
[09:35:43.130] <TB3> INFO: Test took 4309ms.
[09:35:43.134] <TB3> INFO: scanning low vcal = 100
[09:35:43.409] <TB3> INFO: Expecting 41600 events.
[09:35:47.504] <TB3> INFO: 41600 events read in total (3503ms).
[09:35:47.505] <TB3> INFO: Test took 4371ms.
[09:35:47.507] <TB3> INFO: scanning low vcal = 110
[09:35:47.822] <TB3> INFO: Expecting 41600 events.
[09:35:51.837] <TB3> INFO: 41600 events read in total (3423ms).
[09:35:51.837] <TB3> INFO: Test took 4330ms.
[09:35:51.840] <TB3> INFO: scanning low vcal = 120
[09:35:52.117] <TB3> INFO: Expecting 41600 events.
[09:35:56.132] <TB3> INFO: 41600 events read in total (3423ms).
[09:35:56.133] <TB3> INFO: Test took 4293ms.
[09:35:56.136] <TB3> INFO: scanning low vcal = 130
[09:35:56.413] <TB3> INFO: Expecting 41600 events.
[09:36:00.516] <TB3> INFO: 41600 events read in total (3511ms).
[09:36:00.517] <TB3> INFO: Test took 4381ms.
[09:36:00.520] <TB3> INFO: scanning low vcal = 140
[09:36:00.838] <TB3> INFO: Expecting 41600 events.
[09:36:04.853] <TB3> INFO: 41600 events read in total (3423ms).
[09:36:04.854] <TB3> INFO: Test took 4334ms.
[09:36:04.857] <TB3> INFO: scanning low vcal = 150
[09:36:05.134] <TB3> INFO: Expecting 41600 events.
[09:36:09.126] <TB3> INFO: 41600 events read in total (3401ms).
[09:36:09.127] <TB3> INFO: Test took 4270ms.
[09:36:09.130] <TB3> INFO: scanning low vcal = 160
[09:36:09.407] <TB3> INFO: Expecting 41600 events.
[09:36:13.439] <TB3> INFO: 41600 events read in total (3441ms).
[09:36:13.440] <TB3> INFO: Test took 4310ms.
[09:36:13.443] <TB3> INFO: scanning low vcal = 170
[09:36:13.759] <TB3> INFO: Expecting 41600 events.
[09:36:17.779] <TB3> INFO: 41600 events read in total (3428ms).
[09:36:17.779] <TB3> INFO: Test took 4336ms.
[09:36:17.784] <TB3> INFO: scanning low vcal = 180
[09:36:18.059] <TB3> INFO: Expecting 41600 events.
[09:36:22.073] <TB3> INFO: 41600 events read in total (3423ms).
[09:36:22.074] <TB3> INFO: Test took 4290ms.
[09:36:22.077] <TB3> INFO: scanning low vcal = 190
[09:36:22.353] <TB3> INFO: Expecting 41600 events.
[09:36:26.360] <TB3> INFO: 41600 events read in total (3415ms).
[09:36:26.360] <TB3> INFO: Test took 4283ms.
[09:36:26.364] <TB3> INFO: scanning low vcal = 200
[09:36:26.640] <TB3> INFO: Expecting 41600 events.
[09:36:30.662] <TB3> INFO: 41600 events read in total (3430ms).
[09:36:30.662] <TB3> INFO: Test took 4298ms.
[09:36:30.665] <TB3> INFO: scanning low vcal = 210
[09:36:30.942] <TB3> INFO: Expecting 41600 events.
[09:36:34.990] <TB3> INFO: 41600 events read in total (3457ms).
[09:36:34.990] <TB3> INFO: Test took 4325ms.
[09:36:34.993] <TB3> INFO: scanning low vcal = 220
[09:36:35.270] <TB3> INFO: Expecting 41600 events.
[09:36:39.264] <TB3> INFO: 41600 events read in total (3403ms).
[09:36:39.265] <TB3> INFO: Test took 4272ms.
[09:36:39.268] <TB3> INFO: scanning low vcal = 230
[09:36:39.586] <TB3> INFO: Expecting 41600 events.
[09:36:43.661] <TB3> INFO: 41600 events read in total (3483ms).
[09:36:43.661] <TB3> INFO: Test took 4393ms.
[09:36:43.665] <TB3> INFO: scanning low vcal = 240
[09:36:43.979] <TB3> INFO: Expecting 41600 events.
[09:36:47.994] <TB3> INFO: 41600 events read in total (3423ms).
[09:36:47.995] <TB3> INFO: Test took 4330ms.
[09:36:47.998] <TB3> INFO: scanning low vcal = 250
[09:36:48.274] <TB3> INFO: Expecting 41600 events.
[09:36:52.265] <TB3> INFO: 41600 events read in total (3399ms).
[09:36:52.266] <TB3> INFO: Test took 4268ms.
[09:36:52.270] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[09:36:52.546] <TB3> INFO: Expecting 41600 events.
[09:36:56.598] <TB3> INFO: 41600 events read in total (3461ms).
[09:36:56.599] <TB3> INFO: Test took 4329ms.
[09:36:56.601] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[09:36:56.878] <TB3> INFO: Expecting 41600 events.
[09:37:00.894] <TB3> INFO: 41600 events read in total (3424ms).
[09:37:00.894] <TB3> INFO: Test took 4292ms.
[09:37:00.897] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[09:37:01.174] <TB3> INFO: Expecting 41600 events.
[09:37:05.274] <TB3> INFO: 41600 events read in total (3508ms).
[09:37:05.275] <TB3> INFO: Test took 4377ms.
[09:37:05.278] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[09:37:05.554] <TB3> INFO: Expecting 41600 events.
[09:37:09.573] <TB3> INFO: 41600 events read in total (3427ms).
[09:37:09.574] <TB3> INFO: Test took 4296ms.
[09:37:09.577] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[09:37:09.854] <TB3> INFO: Expecting 41600 events.
[09:37:13.840] <TB3> INFO: 41600 events read in total (3394ms).
[09:37:13.840] <TB3> INFO: Test took 4263ms.
[09:37:14.251] <TB3> INFO: PixTestGainPedestal::measure() done
[09:37:46.362] <TB3> INFO: PixTestGainPedestal::fit() done
[09:37:46.362] <TB3> INFO: non-linearity mean: 0.945 0.984 0.984 0.962 0.944 0.942 0.916 0.981 0.965 0.935 0.966 0.915 0.977 0.925 0.958 0.947
[09:37:46.362] <TB3> INFO: non-linearity RMS: 0.050 0.003 0.176 0.019 0.077 0.066 0.164 0.006 0.032 0.109 0.031 0.109 0.164 0.145 0.034 0.058
[09:37:46.362] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//phCalibrationFitErr35_C0.dat
[09:37:46.376] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//phCalibrationFitErr35_C1.dat
[09:37:46.389] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//phCalibrationFitErr35_C2.dat
[09:37:46.403] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//phCalibrationFitErr35_C3.dat
[09:37:46.416] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//phCalibrationFitErr35_C4.dat
[09:37:46.429] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//phCalibrationFitErr35_C5.dat
[09:37:46.442] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//phCalibrationFitErr35_C6.dat
[09:37:46.455] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//phCalibrationFitErr35_C7.dat
[09:37:46.468] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//phCalibrationFitErr35_C8.dat
[09:37:46.481] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//phCalibrationFitErr35_C9.dat
[09:37:46.494] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//phCalibrationFitErr35_C10.dat
[09:37:46.508] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//phCalibrationFitErr35_C11.dat
[09:37:46.521] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//phCalibrationFitErr35_C12.dat
[09:37:46.534] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//phCalibrationFitErr35_C13.dat
[09:37:46.547] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//phCalibrationFitErr35_C14.dat
[09:37:46.561] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1063_FullQualification_2016-10-25_08h01m_1477375284//001_Fulltest_p17//phCalibrationFitErr35_C15.dat
[09:37:46.575] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 161 seconds
[09:37:46.575] <TB3> INFO: Decoding statistics:
[09:37:46.575] <TB3> INFO: General information:
[09:37:46.575] <TB3> INFO: 16bit words read: 3300582
[09:37:46.575] <TB3> INFO: valid events total: 332800
[09:37:46.575] <TB3> INFO: empty events: 532
[09:37:46.575] <TB3> INFO: valid events with pixels: 332268
[09:37:46.575] <TB3> INFO: valid pixel hits: 651891
[09:37:46.575] <TB3> INFO: Event errors: 0
[09:37:46.575] <TB3> INFO: start marker: 0
[09:37:46.575] <TB3> INFO: stop marker: 0
[09:37:46.575] <TB3> INFO: overflow: 0
[09:37:46.575] <TB3> INFO: invalid 5bit words: 0
[09:37:46.575] <TB3> INFO: invalid XOR eye diagram: 0
[09:37:46.575] <TB3> INFO: frame (failed synchr.): 0
[09:37:46.575] <TB3> INFO: idle data (no TBM trl): 0
[09:37:46.575] <TB3> INFO: no data (only TBM hdr): 0
[09:37:46.575] <TB3> INFO: TBM errors: 0
[09:37:46.575] <TB3> INFO: flawed TBM headers: 0
[09:37:46.575] <TB3> INFO: flawed TBM trailers: 0
[09:37:46.575] <TB3> INFO: event ID mismatches: 0
[09:37:46.575] <TB3> INFO: ROC errors: 0
[09:37:46.575] <TB3> INFO: missing ROC header(s): 0
[09:37:46.575] <TB3> INFO: misplaced readback start: 0
[09:37:46.575] <TB3> INFO: Pixel decoding errors: 0
[09:37:46.575] <TB3> INFO: pixel data incomplete: 0
[09:37:46.575] <TB3> INFO: pixel address: 0
[09:37:46.575] <TB3> INFO: pulse height fill bit: 0
[09:37:46.575] <TB3> INFO: buffer corruption: 0
[09:37:46.591] <TB3> INFO: Decoding statistics:
[09:37:46.591] <TB3> INFO: General information:
[09:37:46.591] <TB3> INFO: 16bit words read: 3430000
[09:37:46.591] <TB3> INFO: valid events total: 353536
[09:37:46.591] <TB3> INFO: empty events: 18767
[09:37:46.591] <TB3> INFO: valid events with pixels: 334769
[09:37:46.591] <TB3> INFO: valid pixel hits: 654392
[09:37:46.591] <TB3> INFO: Event errors: 0
[09:37:46.591] <TB3> INFO: start marker: 0
[09:37:46.591] <TB3> INFO: stop marker: 0
[09:37:46.591] <TB3> INFO: overflow: 0
[09:37:46.591] <TB3> INFO: invalid 5bit words: 0
[09:37:46.591] <TB3> INFO: invalid XOR eye diagram: 0
[09:37:46.591] <TB3> INFO: frame (failed synchr.): 0
[09:37:46.591] <TB3> INFO: idle data (no TBM trl): 0
[09:37:46.591] <TB3> INFO: no data (only TBM hdr): 0
[09:37:46.591] <TB3> INFO: TBM errors: 0
[09:37:46.591] <TB3> INFO: flawed TBM headers: 0
[09:37:46.591] <TB3> INFO: flawed TBM trailers: 0
[09:37:46.591] <TB3> INFO: event ID mismatches: 0
[09:37:46.591] <TB3> INFO: ROC errors: 0
[09:37:46.591] <TB3> INFO: missing ROC header(s): 0
[09:37:46.591] <TB3> INFO: misplaced readback start: 0
[09:37:46.591] <TB3> INFO: Pixel decoding errors: 0
[09:37:46.591] <TB3> INFO: pixel data incomplete: 0
[09:37:46.591] <TB3> INFO: pixel address: 0
[09:37:46.591] <TB3> INFO: pulse height fill bit: 0
[09:37:46.591] <TB3> INFO: buffer corruption: 0
[09:37:46.591] <TB3> INFO: enter test to run
[09:37:46.591] <TB3> INFO: test: exit no parameter change
[09:37:46.709] <TB3> QUIET: Connection to board 126 closed.
[09:37:46.709] <TB3> INFO: pXar: this is the end, my friend