[22:43:15.008] <TB1> INFO: *** Welcome to pxar ***
[22:43:15.008] <TB1> INFO: *** Today: 2016/11/07
[22:43:15.015] <TB1> INFO: *** Version: c8ba-dirty
[22:43:15.015] <TB1> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C15.dat
[22:43:15.016] <TB1> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[22:43:15.016] <TB1> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//defaultMaskFile.dat
[22:43:15.016] <TB1> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters_C15.dat
[22:43:15.079] <TB1> INFO: clk: 4
[22:43:15.079] <TB1> INFO: ctr: 4
[22:43:15.079] <TB1> INFO: sda: 19
[22:43:15.079] <TB1> INFO: tin: 9
[22:43:15.079] <TB1> INFO: level: 15
[22:43:15.079] <TB1> INFO: triggerdelay: 0
[22:43:15.079] <TB1> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[22:43:15.079] <TB1> INFO: Log level: INFO
[22:43:15.087] <TB1> INFO: Found DTB DTB_WXC03A
[22:43:15.098] <TB1> QUIET: Connection to board DTB_WXC03A opened.
[22:43:15.100] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 154
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC03A
MAC address: 40D85511809A
Hostname: pixelDTB154
Comment:
------------------------------------------------------
[22:43:15.102] <TB1> INFO: RPC call hashes of host and DTB match: 486171790
[22:43:16.660] <TB1> INFO: DUT info:
[22:43:16.660] <TB1> INFO: The DUT currently contains the following objects:
[22:43:16.660] <TB1> INFO: 4 TBM Cores tbm10c (4 ON)
[22:43:16.660] <TB1> INFO: TBM Core alpha (0): 7 registers set
[22:43:16.660] <TB1> INFO: TBM Core beta (1): 7 registers set
[22:43:16.660] <TB1> INFO: TBM Core alpha (2): 7 registers set
[22:43:16.660] <TB1> INFO: TBM Core beta (3): 7 registers set
[22:43:16.660] <TB1> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[22:43:16.660] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:16.660] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:16.660] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:16.660] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:16.660] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:16.660] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:16.660] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:16.660] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:16.660] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:16.660] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:16.660] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:16.660] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:16.660] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:16.660] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:16.660] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:16.660] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:17.061] <TB1> INFO: enter 'restricted' command line mode
[22:43:17.061] <TB1> INFO: enter test to run
[22:43:17.061] <TB1> INFO: test: pretest no parameter change
[22:43:17.061] <TB1> INFO: running: pretest
[22:43:17.066] <TB1> INFO: ######################################################################
[22:43:17.066] <TB1> INFO: PixTestPretest::doTest()
[22:43:17.066] <TB1> INFO: ######################################################################
[22:43:17.067] <TB1> INFO: ----------------------------------------------------------------------
[22:43:17.067] <TB1> INFO: PixTestPretest::programROC()
[22:43:17.067] <TB1> INFO: ----------------------------------------------------------------------
[22:43:35.082] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[22:43:35.082] <TB1> INFO: IA differences per ROC: 15.3 19.3 19.3 18.5 18.5 15.3 20.1 20.9 19.3 19.3 20.1 20.9 20.1 20.1 19.3 19.3
[22:43:35.138] <TB1> INFO: ----------------------------------------------------------------------
[22:43:35.138] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[22:43:35.138] <TB1> INFO: ----------------------------------------------------------------------
[22:43:56.433] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 380.2 mA = 23.7625 mA/ROC
[22:43:56.433] <TB1> INFO: i(loss) [mA/ROC]: 19.3 19.3 19.3 20.9 19.3 19.3 20.1 19.3 18.4 19.3 19.3 19.3 19.3 19.3 18.4 19.3
[22:43:56.468] <TB1> INFO: ----------------------------------------------------------------------
[22:43:56.468] <TB1> INFO: PixTestPretest::findTiming()
[22:43:56.468] <TB1> INFO: ----------------------------------------------------------------------
[22:43:56.468] <TB1> INFO: PixTestCmd::init()

[22:44:28.946] <TB1> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[22:44:28.946] <TB1> INFO: (success/tries = 100/100), width = 4
[22:44:30.460] <TB1> INFO: ----------------------------------------------------------------------
[22:44:30.460] <TB1> INFO: PixTestPretest::findWorkingPixel()
[22:44:30.460] <TB1> INFO: ----------------------------------------------------------------------
[22:44:30.554] <TB1> INFO: Expecting 231680 events.
[22:44:40.506] <TB1> INFO: 231680 events read in total (9360ms).
[22:44:40.515] <TB1> INFO: Test took 10050ms.
[22:44:40.767] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[22:44:40.801] <TB1> INFO: ----------------------------------------------------------------------
[22:44:40.801] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[22:44:40.801] <TB1> INFO: ----------------------------------------------------------------------
[22:44:40.901] <TB1> INFO: Expecting 231680 events.
[22:44:50.826] <TB1> INFO: 231680 events read in total (9334ms).
[22:44:50.835] <TB1> INFO: Test took 10025ms.
[22:44:51.106] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[22:44:51.106] <TB1> INFO: CalDel: 95 105 93 86 76 90 110 88 93 102 91 78 96 89 82 82
[22:44:51.107] <TB1> INFO: VthrComp: 51 51 52 53 52 51 55 52 51 55 51 51 51 52 51 54
[22:44:51.111] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C0.dat
[22:44:51.111] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C1.dat
[22:44:51.111] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C2.dat
[22:44:51.112] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C3.dat
[22:44:51.112] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C4.dat
[22:44:51.112] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C5.dat
[22:44:51.112] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C6.dat
[22:44:51.113] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C7.dat
[22:44:51.113] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C8.dat
[22:44:51.113] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C9.dat
[22:44:51.113] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C10.dat
[22:44:51.113] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C11.dat
[22:44:51.114] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C12.dat
[22:44:51.114] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C13.dat
[22:44:51.114] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C14.dat
[22:44:51.114] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C15.dat
[22:44:51.114] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//tbmParameters_C0a.dat
[22:44:51.114] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//tbmParameters_C0b.dat
[22:44:51.115] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//tbmParameters_C1a.dat
[22:44:51.115] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[22:44:51.115] <TB1> INFO: PixTestPretest::doTest() done, duration: 94 seconds
[22:44:51.180] <TB1> INFO: enter test to run
[22:44:51.180] <TB1> INFO: test: fulltest no parameter change
[22:44:51.180] <TB1> INFO: running: fulltest
[22:44:51.180] <TB1> INFO: ######################################################################
[22:44:51.180] <TB1> INFO: PixTestFullTest::doTest()
[22:44:51.180] <TB1> INFO: ######################################################################
[22:44:51.183] <TB1> INFO: ######################################################################
[22:44:51.183] <TB1> INFO: PixTestAlive::doTest()
[22:44:51.183] <TB1> INFO: ######################################################################
[22:44:51.184] <TB1> INFO: ----------------------------------------------------------------------
[22:44:51.184] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[22:44:51.184] <TB1> INFO: ----------------------------------------------------------------------
[22:44:51.425] <TB1> INFO: Expecting 41600 events.
[22:44:54.970] <TB1> INFO: 41600 events read in total (2954ms).
[22:44:54.971] <TB1> INFO: Test took 3786ms.
[22:44:55.200] <TB1> INFO: PixTestAlive::aliveTest() done
[22:44:55.200] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[22:44:55.202] <TB1> INFO: ----------------------------------------------------------------------
[22:44:55.202] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[22:44:55.202] <TB1> INFO: ----------------------------------------------------------------------
[22:44:55.440] <TB1> INFO: Expecting 41600 events.
[22:44:58.424] <TB1> INFO: 41600 events read in total (2392ms).
[22:44:58.424] <TB1> INFO: Test took 3221ms.
[22:44:58.425] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[22:44:58.669] <TB1> INFO: PixTestAlive::maskTest() done
[22:44:58.669] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[22:44:58.670] <TB1> INFO: ----------------------------------------------------------------------
[22:44:58.670] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[22:44:58.670] <TB1> INFO: ----------------------------------------------------------------------
[22:44:58.916] <TB1> INFO: Expecting 41600 events.
[22:45:02.437] <TB1> INFO: 41600 events read in total (2929ms).
[22:45:02.438] <TB1> INFO: Test took 3766ms.
[22:45:02.678] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[22:45:02.679] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[22:45:02.679] <TB1> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[22:45:02.679] <TB1> INFO: Decoding statistics:
[22:45:02.679] <TB1> INFO: General information:
[22:45:02.679] <TB1> INFO: 16bit words read: 0
[22:45:02.679] <TB1> INFO: valid events total: 0
[22:45:02.679] <TB1> INFO: empty events: 0
[22:45:02.679] <TB1> INFO: valid events with pixels: 0
[22:45:02.679] <TB1> INFO: valid pixel hits: 0
[22:45:02.679] <TB1> INFO: Event errors: 0
[22:45:02.679] <TB1> INFO: start marker: 0
[22:45:02.679] <TB1> INFO: stop marker: 0
[22:45:02.679] <TB1> INFO: overflow: 0
[22:45:02.679] <TB1> INFO: invalid 5bit words: 0
[22:45:02.679] <TB1> INFO: invalid XOR eye diagram: 0
[22:45:02.679] <TB1> INFO: frame (failed synchr.): 0
[22:45:02.679] <TB1> INFO: idle data (no TBM trl): 0
[22:45:02.679] <TB1> INFO: no data (only TBM hdr): 0
[22:45:02.679] <TB1> INFO: TBM errors: 0
[22:45:02.679] <TB1> INFO: flawed TBM headers: 0
[22:45:02.679] <TB1> INFO: flawed TBM trailers: 0
[22:45:02.679] <TB1> INFO: event ID mismatches: 0
[22:45:02.679] <TB1> INFO: ROC errors: 0
[22:45:02.679] <TB1> INFO: missing ROC header(s): 0
[22:45:02.679] <TB1> INFO: misplaced readback start: 0
[22:45:02.679] <TB1> INFO: Pixel decoding errors: 0
[22:45:02.679] <TB1> INFO: pixel data incomplete: 0
[22:45:02.679] <TB1> INFO: pixel address: 0
[22:45:02.679] <TB1> INFO: pulse height fill bit: 0
[22:45:02.679] <TB1> INFO: buffer corruption: 0
[22:45:02.687] <TB1> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C15.dat
[22:45:02.688] <TB1> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr_C15.dat

[22:45:02.688] <TB1> INFO: ######################################################################
[22:45:02.688] <TB1> INFO: PixTestReadback::doTest()
[22:45:02.688] <TB1> INFO: ######################################################################
[22:45:02.688] <TB1> INFO: ----------------------------------------------------------------------
[22:45:02.688] <TB1> INFO: PixTestReadback::CalibrateVd()
[22:45:02.688] <TB1> INFO: ----------------------------------------------------------------------
[22:45:12.663] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C0.dat
[22:45:12.663] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C1.dat
[22:45:12.663] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C2.dat
[22:45:12.663] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C3.dat
[22:45:12.663] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C4.dat
[22:45:12.663] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C5.dat
[22:45:12.663] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C6.dat
[22:45:12.663] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C7.dat
[22:45:12.663] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C8.dat
[22:45:12.663] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C9.dat
[22:45:12.664] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C10.dat
[22:45:12.664] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C11.dat
[22:45:12.664] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C12.dat
[22:45:12.664] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C13.dat
[22:45:12.664] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C14.dat
[22:45:12.664] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C15.dat
[22:45:12.693] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[22:45:12.693] <TB1> INFO: ----------------------------------------------------------------------
[22:45:12.693] <TB1> INFO: PixTestReadback::CalibrateVa()
[22:45:12.693] <TB1> INFO: ----------------------------------------------------------------------
[22:45:22.636] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C0.dat
[22:45:22.636] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C1.dat
[22:45:22.636] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C2.dat
[22:45:22.636] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C3.dat
[22:45:22.636] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C4.dat
[22:45:22.636] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C5.dat
[22:45:22.636] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C6.dat
[22:45:22.636] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C7.dat
[22:45:22.636] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C8.dat
[22:45:22.636] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C9.dat
[22:45:22.637] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C10.dat
[22:45:22.637] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C11.dat
[22:45:22.637] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C12.dat
[22:45:22.637] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C13.dat
[22:45:22.637] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C14.dat
[22:45:22.637] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C15.dat
[22:45:22.667] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[22:45:22.667] <TB1> INFO: ----------------------------------------------------------------------
[22:45:22.667] <TB1> INFO: PixTestReadback::readbackVbg()
[22:45:22.667] <TB1> INFO: ----------------------------------------------------------------------
[22:45:30.340] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[22:45:30.340] <TB1> INFO: ----------------------------------------------------------------------
[22:45:30.340] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[22:45:30.340] <TB1> INFO: ----------------------------------------------------------------------
[22:45:30.341] <TB1> INFO: Vbg will be calibrated using Vd calibration
[22:45:30.341] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 160.1calibrated Vbg = 1.19148 :::*/*/*/*/
[22:45:30.341] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 155.7calibrated Vbg = 1.19721 :::*/*/*/*/
[22:45:30.341] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 150.8calibrated Vbg = 1.19136 :::*/*/*/*/
[22:45:30.341] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 155.9calibrated Vbg = 1.19259 :::*/*/*/*/
[22:45:30.341] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 162.9calibrated Vbg = 1.19012 :::*/*/*/*/
[22:45:30.341] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 163.6calibrated Vbg = 1.19644 :::*/*/*/*/
[22:45:30.341] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 158.6calibrated Vbg = 1.20344 :::*/*/*/*/
[22:45:30.341] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 153.4calibrated Vbg = 1.19967 :::*/*/*/*/
[22:45:30.341] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 149calibrated Vbg = 1.18984 :::*/*/*/*/
[22:45:30.341] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 162calibrated Vbg = 1.18918 :::*/*/*/*/
[22:45:30.341] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 145.6calibrated Vbg = 1.18419 :::*/*/*/*/
[22:45:30.341] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 164.7calibrated Vbg = 1.18274 :::*/*/*/*/
[22:45:30.341] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 153.1calibrated Vbg = 1.19093 :::*/*/*/*/
[22:45:30.341] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 149.4calibrated Vbg = 1.19135 :::*/*/*/*/
[22:45:30.341] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 157.5calibrated Vbg = 1.19448 :::*/*/*/*/
[22:45:30.341] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 153.9calibrated Vbg = 1.18982 :::*/*/*/*/
[22:45:30.344] <TB1> INFO: ----------------------------------------------------------------------
[22:45:30.344] <TB1> INFO: PixTestReadback::CalibrateIa()
[22:45:30.344] <TB1> INFO: ----------------------------------------------------------------------
[22:48:11.149] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C0.dat
[22:48:11.150] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C1.dat
[22:48:11.150] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C2.dat
[22:48:11.150] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C3.dat
[22:48:11.150] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C4.dat
[22:48:11.150] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C5.dat
[22:48:11.150] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C6.dat
[22:48:11.150] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C7.dat
[22:48:11.150] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C8.dat
[22:48:11.150] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C9.dat
[22:48:11.150] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C10.dat
[22:48:11.150] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C11.dat
[22:48:11.150] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C12.dat
[22:48:11.150] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C13.dat
[22:48:11.150] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C14.dat
[22:48:11.150] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C15.dat
[22:48:11.177] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[22:48:11.179] <TB1> INFO: PixTestReadback::doTest() done
[22:48:11.179] <TB1> INFO: Decoding statistics:
[22:48:11.179] <TB1> INFO: General information:
[22:48:11.179] <TB1> INFO: 16bit words read: 1536
[22:48:11.179] <TB1> INFO: valid events total: 256
[22:48:11.179] <TB1> INFO: empty events: 256
[22:48:11.179] <TB1> INFO: valid events with pixels: 0
[22:48:11.179] <TB1> INFO: valid pixel hits: 0
[22:48:11.179] <TB1> INFO: Event errors: 0
[22:48:11.179] <TB1> INFO: start marker: 0
[22:48:11.179] <TB1> INFO: stop marker: 0
[22:48:11.179] <TB1> INFO: overflow: 0
[22:48:11.179] <TB1> INFO: invalid 5bit words: 0
[22:48:11.179] <TB1> INFO: invalid XOR eye diagram: 0
[22:48:11.179] <TB1> INFO: frame (failed synchr.): 0
[22:48:11.179] <TB1> INFO: idle data (no TBM trl): 0
[22:48:11.179] <TB1> INFO: no data (only TBM hdr): 0
[22:48:11.179] <TB1> INFO: TBM errors: 0
[22:48:11.179] <TB1> INFO: flawed TBM headers: 0
[22:48:11.179] <TB1> INFO: flawed TBM trailers: 0
[22:48:11.179] <TB1> INFO: event ID mismatches: 0
[22:48:11.179] <TB1> INFO: ROC errors: 0
[22:48:11.179] <TB1> INFO: missing ROC header(s): 0
[22:48:11.179] <TB1> INFO: misplaced readback start: 0
[22:48:11.179] <TB1> INFO: Pixel decoding errors: 0
[22:48:11.179] <TB1> INFO: pixel data incomplete: 0
[22:48:11.179] <TB1> INFO: pixel address: 0
[22:48:11.179] <TB1> INFO: pulse height fill bit: 0
[22:48:11.179] <TB1> INFO: buffer corruption: 0
[22:48:11.243] <TB1> INFO: ######################################################################
[22:48:11.243] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[22:48:11.243] <TB1> INFO: ######################################################################
[22:48:11.245] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[22:48:11.262] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[22:48:11.262] <TB1> INFO: run 1 of 1
[22:48:11.497] <TB1> INFO: Expecting 3120000 events.
[22:48:43.661] <TB1> INFO: 684355 events read in total (31572ms).











[22:49:14.552] <TB1> INFO: 1361680 events read in total (62463ms).











[22:49:45.434] <TB1> INFO: 2035925 events read in total (93345ms).











[22:50:16.614] <TB1> INFO: 2710955 events read in total (124525ms).











[22:50:35.409] <TB1> INFO: 3120000 events read in total (143320ms).
[22:50:35.542] <TB1> INFO: Test took 144281ms.
[22:51:01.331] <TB1> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 170 seconds
[22:51:01.331] <TB1> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0
[22:51:01.331] <TB1> INFO: separation cut (per ROC): 104 100 105 114 107 107 108 121 101 104 106 113 106 110 105 109
[22:51:01.332] <TB1> INFO: Decoding statistics:
[22:51:01.332] <TB1> INFO: General information:
[22:51:01.332] <TB1> INFO: 16bit words read: 0
[22:51:01.332] <TB1> INFO: valid events total: 0
[22:51:01.332] <TB1> INFO: empty events: 0
[22:51:01.332] <TB1> INFO: valid events with pixels: 0
[22:51:01.332] <TB1> INFO: valid pixel hits: 0
[22:51:01.332] <TB1> INFO: Event errors: 0
[22:51:01.332] <TB1> INFO: start marker: 0
[22:51:01.332] <TB1> INFO: stop marker: 0
[22:51:01.332] <TB1> INFO: overflow: 0
[22:51:01.332] <TB1> INFO: invalid 5bit words: 0
[22:51:01.332] <TB1> INFO: invalid XOR eye diagram: 0
[22:51:01.332] <TB1> INFO: frame (failed synchr.): 0
[22:51:01.332] <TB1> INFO: idle data (no TBM trl): 0
[22:51:01.332] <TB1> INFO: no data (only TBM hdr): 0
[22:51:01.332] <TB1> INFO: TBM errors: 0
[22:51:01.332] <TB1> INFO: flawed TBM headers: 0
[22:51:01.332] <TB1> INFO: flawed TBM trailers: 0
[22:51:01.332] <TB1> INFO: event ID mismatches: 0
[22:51:01.332] <TB1> INFO: ROC errors: 0
[22:51:01.332] <TB1> INFO: missing ROC header(s): 0
[22:51:01.332] <TB1> INFO: misplaced readback start: 0
[22:51:01.332] <TB1> INFO: Pixel decoding errors: 0
[22:51:01.332] <TB1> INFO: pixel data incomplete: 0
[22:51:01.332] <TB1> INFO: pixel address: 0
[22:51:01.332] <TB1> INFO: pulse height fill bit: 0
[22:51:01.332] <TB1> INFO: buffer corruption: 0
[22:51:01.370] <TB1> INFO: ######################################################################
[22:51:01.370] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[22:51:01.370] <TB1> INFO: ######################################################################
[22:51:01.370] <TB1> INFO: ----------------------------------------------------------------------
[22:51:01.370] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[22:51:01.370] <TB1> INFO: ----------------------------------------------------------------------
[22:51:01.370] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[22:51:01.384] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[22:51:01.384] <TB1> INFO: run 1 of 1
[22:51:01.640] <TB1> INFO: Expecting 36608000 events.
[22:51:26.447] <TB1> INFO: 694750 events read in total (24215ms).
[22:51:49.860] <TB1> INFO: 1372800 events read in total (47628ms).
[22:52:13.473] <TB1> INFO: 2054050 events read in total (71241ms).
[22:52:37.024] <TB1> INFO: 2734000 events read in total (94792ms).
[22:53:00.347] <TB1> INFO: 3413450 events read in total (118115ms).
[22:53:23.809] <TB1> INFO: 4093100 events read in total (141577ms).
[22:53:47.398] <TB1> INFO: 4771000 events read in total (165166ms).
[22:54:10.729] <TB1> INFO: 5449450 events read in total (188497ms).
[22:54:34.191] <TB1> INFO: 6124600 events read in total (211959ms).
[22:54:57.457] <TB1> INFO: 6800500 events read in total (235225ms).
[22:55:20.981] <TB1> INFO: 7475750 events read in total (258749ms).
[22:55:44.414] <TB1> INFO: 8149600 events read in total (282182ms).
[22:56:07.913] <TB1> INFO: 8825600 events read in total (305681ms).
[22:56:31.229] <TB1> INFO: 9501900 events read in total (328997ms).
[22:56:54.518] <TB1> INFO: 10177500 events read in total (352286ms).
[22:57:17.838] <TB1> INFO: 10851800 events read in total (375606ms).
[22:57:41.445] <TB1> INFO: 11526450 events read in total (399213ms).
[22:58:04.776] <TB1> INFO: 12201500 events read in total (422544ms).
[22:58:28.430] <TB1> INFO: 12874850 events read in total (446198ms).
[22:58:52.201] <TB1> INFO: 13549750 events read in total (469969ms).
[22:59:15.519] <TB1> INFO: 14223050 events read in total (493287ms).
[22:59:38.882] <TB1> INFO: 14895750 events read in total (516650ms).
[23:00:02.251] <TB1> INFO: 15566750 events read in total (540019ms).
[23:00:25.494] <TB1> INFO: 16238850 events read in total (563262ms).
[23:00:48.825] <TB1> INFO: 16909950 events read in total (586593ms).
[23:01:12.261] <TB1> INFO: 17579500 events read in total (610029ms).
[23:01:35.705] <TB1> INFO: 18248250 events read in total (633473ms).
[23:01:59.078] <TB1> INFO: 18916200 events read in total (656846ms).
[23:02:22.291] <TB1> INFO: 19582950 events read in total (680059ms).
[23:02:45.475] <TB1> INFO: 20249450 events read in total (703243ms).
[23:03:08.697] <TB1> INFO: 20915850 events read in total (726465ms).
[23:03:32.019] <TB1> INFO: 21582550 events read in total (749787ms).
[23:03:55.550] <TB1> INFO: 22247950 events read in total (773318ms).
[23:04:18.945] <TB1> INFO: 22914200 events read in total (796713ms).
[23:04:42.191] <TB1> INFO: 23580700 events read in total (819959ms).
[23:05:05.642] <TB1> INFO: 24246850 events read in total (843410ms).
[23:05:28.819] <TB1> INFO: 24913250 events read in total (866587ms).
[23:05:51.850] <TB1> INFO: 25580750 events read in total (889618ms).
[23:06:14.927] <TB1> INFO: 26247100 events read in total (912695ms).
[23:06:38.191] <TB1> INFO: 26913100 events read in total (935959ms).
[23:07:01.414] <TB1> INFO: 27578850 events read in total (959182ms).
[23:07:24.750] <TB1> INFO: 28244700 events read in total (982518ms).
[23:07:47.938] <TB1> INFO: 28910450 events read in total (1005706ms).
[23:08:11.038] <TB1> INFO: 29574400 events read in total (1028806ms).
[23:08:34.503] <TB1> INFO: 30238500 events read in total (1052271ms).
[23:08:57.941] <TB1> INFO: 30903200 events read in total (1075709ms).
[23:09:21.585] <TB1> INFO: 31571100 events read in total (1099353ms).
[23:09:44.866] <TB1> INFO: 32235700 events read in total (1122634ms).
[23:10:08.087] <TB1> INFO: 32901300 events read in total (1145855ms).
[23:10:31.863] <TB1> INFO: 33569000 events read in total (1169631ms).
[23:10:55.108] <TB1> INFO: 34236400 events read in total (1192876ms).
[23:11:18.443] <TB1> INFO: 34902100 events read in total (1216211ms).
[23:11:41.422] <TB1> INFO: 35568700 events read in total (1239190ms).
[23:12:04.002] <TB1> INFO: 36241800 events read in total (1262770ms).
[23:12:17.998] <TB1> INFO: 36608000 events read in total (1275766ms).
[23:12:18.074] <TB1> INFO: Test took 1276690ms.
[23:12:18.588] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[23:12:20.286] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[23:12:21.974] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[23:12:23.758] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[23:12:25.913] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[23:12:27.902] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[23:12:29.783] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[23:12:31.799] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[23:12:33.612] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[23:12:35.023] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[23:12:36.507] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[23:12:37.914] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[23:12:39.631] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[23:12:41.469] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[23:12:43.081] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[23:12:44.533] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[23:12:46.225] <TB1> INFO: PixTestScurves::scurves() done
[23:12:46.225] <TB1> INFO: Vcal mean: 118.44 117.73 125.28 130.47 116.52 123.81 134.80 131.02 116.27 126.13 117.04 114.43 118.58 120.78 119.11 129.33
[23:12:46.225] <TB1> INFO: Vcal RMS: 5.65 6.69 8.38 6.96 5.67 6.13 8.77 6.39 5.46 7.68 5.76 5.17 5.71 5.97 6.26 7.36
[23:12:46.225] <TB1> INFO: PixTestScurves::fullTest() done, duration: 1304 seconds
[23:12:46.225] <TB1> INFO: Decoding statistics:
[23:12:46.225] <TB1> INFO: General information:
[23:12:46.225] <TB1> INFO: 16bit words read: 0
[23:12:46.225] <TB1> INFO: valid events total: 0
[23:12:46.225] <TB1> INFO: empty events: 0
[23:12:46.225] <TB1> INFO: valid events with pixels: 0
[23:12:46.225] <TB1> INFO: valid pixel hits: 0
[23:12:46.225] <TB1> INFO: Event errors: 0
[23:12:46.225] <TB1> INFO: start marker: 0
[23:12:46.225] <TB1> INFO: stop marker: 0
[23:12:46.225] <TB1> INFO: overflow: 0
[23:12:46.225] <TB1> INFO: invalid 5bit words: 0
[23:12:46.225] <TB1> INFO: invalid XOR eye diagram: 0
[23:12:46.225] <TB1> INFO: frame (failed synchr.): 0
[23:12:46.225] <TB1> INFO: idle data (no TBM trl): 0
[23:12:46.225] <TB1> INFO: no data (only TBM hdr): 0
[23:12:46.225] <TB1> INFO: TBM errors: 0
[23:12:46.226] <TB1> INFO: flawed TBM headers: 0
[23:12:46.226] <TB1> INFO: flawed TBM trailers: 0
[23:12:46.226] <TB1> INFO: event ID mismatches: 0
[23:12:46.226] <TB1> INFO: ROC errors: 0
[23:12:46.226] <TB1> INFO: missing ROC header(s): 0
[23:12:46.226] <TB1> INFO: misplaced readback start: 0
[23:12:46.226] <TB1> INFO: Pixel decoding errors: 0
[23:12:46.226] <TB1> INFO: pixel data incomplete: 0
[23:12:46.226] <TB1> INFO: pixel address: 0
[23:12:46.226] <TB1> INFO: pulse height fill bit: 0
[23:12:46.226] <TB1> INFO: buffer corruption: 0
[23:12:46.294] <TB1> INFO: ######################################################################
[23:12:46.294] <TB1> INFO: PixTestTrim::doTest()
[23:12:46.294] <TB1> INFO: ######################################################################
[23:12:46.296] <TB1> INFO: ----------------------------------------------------------------------
[23:12:46.296] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[23:12:46.296] <TB1> INFO: ----------------------------------------------------------------------
[23:12:46.342] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[23:12:46.342] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[23:12:46.355] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[23:12:46.355] <TB1> INFO: run 1 of 1
[23:12:46.592] <TB1> INFO: Expecting 5025280 events.
[23:13:17.906] <TB1> INFO: 829712 events read in total (30708ms).
[23:13:48.799] <TB1> INFO: 1657792 events read in total (61601ms).
[23:14:19.389] <TB1> INFO: 2483408 events read in total (92191ms).
[23:14:49.964] <TB1> INFO: 3305784 events read in total (122766ms).
[23:15:20.665] <TB1> INFO: 4124264 events read in total (153468ms).
[23:15:51.600] <TB1> INFO: 4942016 events read in total (184402ms).
[23:15:55.239] <TB1> INFO: 5025280 events read in total (188041ms).
[23:15:55.366] <TB1> INFO: Test took 189011ms.
[23:16:09.800] <TB1> INFO: ROC 0 VthrComp = 112
[23:16:09.801] <TB1> INFO: ROC 1 VthrComp = 109
[23:16:09.801] <TB1> INFO: ROC 2 VthrComp = 117
[23:16:09.804] <TB1> INFO: ROC 3 VthrComp = 134
[23:16:09.804] <TB1> INFO: ROC 4 VthrComp = 115
[23:16:09.804] <TB1> INFO: ROC 5 VthrComp = 109
[23:16:09.804] <TB1> INFO: ROC 6 VthrComp = 127
[23:16:09.805] <TB1> INFO: ROC 7 VthrComp = 130
[23:16:09.805] <TB1> INFO: ROC 8 VthrComp = 113
[23:16:09.805] <TB1> INFO: ROC 9 VthrComp = 117
[23:16:09.805] <TB1> INFO: ROC 10 VthrComp = 117
[23:16:09.805] <TB1> INFO: ROC 11 VthrComp = 118
[23:16:09.805] <TB1> INFO: ROC 12 VthrComp = 113
[23:16:09.806] <TB1> INFO: ROC 13 VthrComp = 122
[23:16:09.806] <TB1> INFO: ROC 14 VthrComp = 110
[23:16:09.807] <TB1> INFO: ROC 15 VthrComp = 127
[23:16:10.054] <TB1> INFO: Expecting 41600 events.
[23:16:13.603] <TB1> INFO: 41600 events read in total (2957ms).
[23:16:13.604] <TB1> INFO: Test took 3796ms.
[23:16:13.613] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[23:16:13.613] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[23:16:13.624] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[23:16:13.624] <TB1> INFO: run 1 of 1
[23:16:13.902] <TB1> INFO: Expecting 5025280 events.
[23:16:40.835] <TB1> INFO: 591992 events read in total (26341ms).
[23:17:07.369] <TB1> INFO: 1183912 events read in total (52875ms).
[23:17:33.280] <TB1> INFO: 1775752 events read in total (78786ms).
[23:17:59.607] <TB1> INFO: 2366624 events read in total (105113ms).
[23:18:25.830] <TB1> INFO: 2954720 events read in total (131337ms).
[23:18:51.760] <TB1> INFO: 3541592 events read in total (157267ms).
[23:19:17.415] <TB1> INFO: 4127664 events read in total (182921ms).
[23:19:44.206] <TB1> INFO: 4712936 events read in total (209712ms).
[23:19:58.078] <TB1> INFO: 5025280 events read in total (223584ms).
[23:19:58.159] <TB1> INFO: Test took 224535ms.
[23:20:24.115] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 61.9647 for pixel 27/8 mean/min/max = 47.6886/32.8645/62.5127
[23:20:24.115] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 64.9387 for pixel 32/72 mean/min/max = 49.854/34.4548/65.2532
[23:20:24.115] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 64.1258 for pixel 6/51 mean/min/max = 47.6118/31.0818/64.1418
[23:20:24.116] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 60.3262 for pixel 51/12 mean/min/max = 45.9931/31.5525/60.4336
[23:20:24.116] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 62.085 for pixel 5/2 mean/min/max = 47.0175/31.8725/62.1626
[23:20:24.117] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 70.8787 for pixel 0/24 mean/min/max = 53.3558/35.294/71.4175
[23:20:24.117] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 66.1919 for pixel 2/76 mean/min/max = 48.3711/30.3777/66.3644
[23:20:24.117] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 61.9822 for pixel 0/4 mean/min/max = 47.9794/33.899/62.0599
[23:20:24.118] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 60.2547 for pixel 10/70 mean/min/max = 46.8988/33.4413/60.3563
[23:20:24.118] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 67.0828 for pixel 2/0 mean/min/max = 49.7835/32.3403/67.2266
[23:20:24.119] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 61.2154 for pixel 51/69 mean/min/max = 47.2899/33.3501/61.2296
[23:20:24.119] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 59.1669 for pixel 1/1 mean/min/max = 46.0238/32.6581/59.3896
[23:20:24.119] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 60.117 for pixel 41/1 mean/min/max = 46.5263/32.8814/60.1712
[23:20:24.120] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 59.5567 for pixel 1/19 mean/min/max = 46.537/33.3936/59.6804
[23:20:24.120] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 67.7257 for pixel 12/5 mean/min/max = 51.3715/35.0066/67.7363
[23:20:24.120] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 63.8229 for pixel 6/74 mean/min/max = 47.272/30.7012/63.8429
[23:20:24.121] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:20:24.210] <TB1> INFO: Expecting 411648 events.
[23:20:33.738] <TB1> INFO: 411648 events read in total (8936ms).
[23:20:33.746] <TB1> INFO: Expecting 411648 events.
[23:20:43.078] <TB1> INFO: 411648 events read in total (8929ms).
[23:20:43.088] <TB1> INFO: Expecting 411648 events.
[23:20:52.398] <TB1> INFO: 411648 events read in total (8907ms).
[23:20:52.410] <TB1> INFO: Expecting 411648 events.
[23:21:01.809] <TB1> INFO: 411648 events read in total (8995ms).
[23:21:01.824] <TB1> INFO: Expecting 411648 events.
[23:21:11.159] <TB1> INFO: 411648 events read in total (8931ms).
[23:21:11.178] <TB1> INFO: Expecting 411648 events.
[23:21:20.507] <TB1> INFO: 411648 events read in total (8926ms).
[23:21:20.533] <TB1> INFO: Expecting 411648 events.
[23:21:29.771] <TB1> INFO: 411648 events read in total (8835ms).
[23:21:29.797] <TB1> INFO: Expecting 411648 events.
[23:21:39.156] <TB1> INFO: 411648 events read in total (8955ms).
[23:21:39.189] <TB1> INFO: Expecting 411648 events.
[23:21:48.476] <TB1> INFO: 411648 events read in total (8884ms).
[23:21:48.505] <TB1> INFO: Expecting 411648 events.
[23:21:57.990] <TB1> INFO: 411648 events read in total (9082ms).
[23:21:58.021] <TB1> INFO: Expecting 411648 events.
[23:22:07.301] <TB1> INFO: 411648 events read in total (8877ms).
[23:22:07.334] <TB1> INFO: Expecting 411648 events.
[23:22:16.771] <TB1> INFO: 411648 events read in total (9034ms).
[23:22:16.822] <TB1> INFO: Expecting 411648 events.
[23:22:26.069] <TB1> INFO: 411648 events read in total (8844ms).
[23:22:26.130] <TB1> INFO: Expecting 411648 events.
[23:22:35.413] <TB1> INFO: 411648 events read in total (8880ms).
[23:22:35.469] <TB1> INFO: Expecting 411648 events.
[23:22:44.856] <TB1> INFO: 411648 events read in total (8984ms).
[23:22:44.918] <TB1> INFO: Expecting 411648 events.
[23:22:54.089] <TB1> INFO: 411648 events read in total (8768ms).
[23:22:54.190] <TB1> INFO: Test took 150069ms.
[23:22:54.858] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[23:22:54.873] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[23:22:54.873] <TB1> INFO: run 1 of 1
[23:22:55.121] <TB1> INFO: Expecting 5025280 events.
[23:23:22.212] <TB1> INFO: 591832 events read in total (26499ms).
[23:23:48.807] <TB1> INFO: 1182056 events read in total (53094ms).
[23:24:15.791] <TB1> INFO: 1770384 events read in total (80078ms).
[23:24:42.608] <TB1> INFO: 2358784 events read in total (106895ms).
[23:25:09.308] <TB1> INFO: 2950424 events read in total (133595ms).
[23:25:36.381] <TB1> INFO: 3545040 events read in total (160668ms).
[23:26:02.714] <TB1> INFO: 4135184 events read in total (187001ms).
[23:26:29.635] <TB1> INFO: 4725368 events read in total (213923ms).
[23:26:43.566] <TB1> INFO: 5025280 events read in total (227853ms).
[23:26:43.716] <TB1> INFO: Test took 228844ms.
[23:27:05.022] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 5.081890 .. 144.555471
[23:27:05.309] <TB1> INFO: Expecting 208000 events.
[23:27:14.981] <TB1> INFO: 208000 events read in total (9080ms).
[23:27:14.984] <TB1> INFO: Test took 9960ms.
[23:27:15.032] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 5 .. 154 (-1/-1) hits flags = 528 (plus default)
[23:27:15.045] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[23:27:15.045] <TB1> INFO: run 1 of 1
[23:27:15.324] <TB1> INFO: Expecting 4992000 events.
[23:27:42.168] <TB1> INFO: 580072 events read in total (26253ms).
[23:28:08.155] <TB1> INFO: 1160704 events read in total (52242ms).
[23:28:34.276] <TB1> INFO: 1740888 events read in total (78361ms).
[23:29:00.918] <TB1> INFO: 2321176 events read in total (105003ms).
[23:29:27.117] <TB1> INFO: 2901088 events read in total (131203ms).
[23:29:53.766] <TB1> INFO: 3480616 events read in total (157851ms).
[23:30:20.505] <TB1> INFO: 4060200 events read in total (184590ms).
[23:30:47.014] <TB1> INFO: 4639184 events read in total (211099ms).
[23:31:02.876] <TB1> INFO: 4992000 events read in total (226961ms).
[23:31:03.019] <TB1> INFO: Test took 227974ms.
[23:31:28.497] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 26.300401 .. 47.562309
[23:31:28.734] <TB1> INFO: Expecting 208000 events.
[23:31:38.791] <TB1> INFO: 208000 events read in total (9465ms).
[23:31:38.792] <TB1> INFO: Test took 10294ms.
[23:31:38.843] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 57 (-1/-1) hits flags = 528 (plus default)
[23:31:38.856] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[23:31:38.856] <TB1> INFO: run 1 of 1
[23:31:39.134] <TB1> INFO: Expecting 1397760 events.
[23:32:08.707] <TB1> INFO: 659208 events read in total (28979ms).
[23:32:37.129] <TB1> INFO: 1315944 events read in total (57401ms).
[23:32:41.090] <TB1> INFO: 1397760 events read in total (61362ms).
[23:32:41.133] <TB1> INFO: Test took 62277ms.
[23:32:54.141] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 28.850771 .. 52.788919
[23:32:54.378] <TB1> INFO: Expecting 208000 events.
[23:33:04.366] <TB1> INFO: 208000 events read in total (9396ms).
[23:33:04.367] <TB1> INFO: Test took 10225ms.
[23:33:04.448] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 18 .. 62 (-1/-1) hits flags = 528 (plus default)
[23:33:04.463] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[23:33:04.463] <TB1> INFO: run 1 of 1
[23:33:04.741] <TB1> INFO: Expecting 1497600 events.
[23:33:33.249] <TB1> INFO: 634496 events read in total (27916ms).
[23:34:00.875] <TB1> INFO: 1267384 events read in total (55542ms).
[23:34:11.201] <TB1> INFO: 1497600 events read in total (65868ms).
[23:34:11.238] <TB1> INFO: Test took 66776ms.
[23:34:24.419] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 27.845693 .. 52.816872
[23:34:24.712] <TB1> INFO: Expecting 208000 events.
[23:34:34.904] <TB1> INFO: 208000 events read in total (9600ms).
[23:34:34.905] <TB1> INFO: Test took 10484ms.
[23:34:34.955] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 17 .. 62 (-1/-1) hits flags = 528 (plus default)
[23:34:34.967] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[23:34:34.967] <TB1> INFO: run 1 of 1
[23:34:35.246] <TB1> INFO: Expecting 1530880 events.
[23:35:03.305] <TB1> INFO: 636600 events read in total (27468ms).
[23:35:30.886] <TB1> INFO: 1272848 events read in total (55049ms).
[23:35:42.205] <TB1> INFO: 1530880 events read in total (66368ms).
[23:35:42.244] <TB1> INFO: Test took 67276ms.
[23:35:59.003] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[23:35:59.004] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[23:35:59.016] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[23:35:59.016] <TB1> INFO: run 1 of 1
[23:35:59.285] <TB1> INFO: Expecting 1364480 events.
[23:36:28.685] <TB1> INFO: 667864 events read in total (28808ms).
[23:36:57.541] <TB1> INFO: 1335920 events read in total (57664ms).
[23:36:59.154] <TB1> INFO: 1364480 events read in total (59277ms).
[23:36:59.186] <TB1> INFO: Test took 60170ms.
[23:37:11.732] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C0.dat
[23:37:11.732] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C1.dat
[23:37:11.732] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C2.dat
[23:37:11.732] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C3.dat
[23:37:11.732] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C4.dat
[23:37:11.732] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C5.dat
[23:37:11.732] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C6.dat
[23:37:11.732] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C7.dat
[23:37:11.732] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C8.dat
[23:37:11.732] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C9.dat
[23:37:11.732] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C10.dat
[23:37:11.732] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C11.dat
[23:37:11.732] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C12.dat
[23:37:11.732] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C13.dat
[23:37:11.733] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C14.dat
[23:37:11.733] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C15.dat
[23:37:11.733] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C0.dat
[23:37:11.740] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C1.dat
[23:37:11.747] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C2.dat
[23:37:11.755] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C3.dat
[23:37:11.763] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C4.dat
[23:37:11.770] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C5.dat
[23:37:11.778] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C6.dat
[23:37:11.786] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C7.dat
[23:37:11.793] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C8.dat
[23:37:11.801] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C9.dat
[23:37:11.809] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C10.dat
[23:37:11.816] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C11.dat
[23:37:11.824] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C12.dat
[23:37:11.832] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C13.dat
[23:37:11.839] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C14.dat
[23:37:11.847] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C15.dat
[23:37:11.855] <TB1> INFO: PixTestTrim::trimTest() done
[23:37:11.855] <TB1> INFO: vtrim: 130 130 122 124 122 127 107 122 111 131 115 117 111 126 151 122
[23:37:11.855] <TB1> INFO: vthrcomp: 112 109 117 134 115 109 127 130 113 117 117 118 113 122 110 127
[23:37:11.855] <TB1> INFO: vcal mean: 35.30 35.25 35.26 35.17 35.11 36.28 35.70 35.16 35.20 36.53 35.02 34.98 35.03 35.06 36.32 35.27
[23:37:11.855] <TB1> INFO: vcal RMS: 1.41 1.36 1.40 1.26 1.24 2.64 1.92 1.21 1.27 2.65 1.27 1.07 1.04 1.12 2.60 1.61
[23:37:11.855] <TB1> INFO: bits mean: 9.40 9.01 9.60 9.48 9.42 8.26 8.70 8.45 9.20 9.78 9.28 9.38 9.29 9.58 9.36 9.32
[23:37:11.855] <TB1> INFO: bits RMS: 2.68 2.41 2.67 2.83 2.79 2.93 3.31 2.85 2.73 2.64 2.66 2.70 2.72 2.52 2.50 2.94
[23:37:11.862] <TB1> INFO: ----------------------------------------------------------------------
[23:37:11.862] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[23:37:11.862] <TB1> INFO: ----------------------------------------------------------------------
[23:37:11.865] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[23:37:11.879] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[23:37:11.879] <TB1> INFO: run 1 of 1
[23:37:12.125] <TB1> INFO: Expecting 4160000 events.
[23:37:45.257] <TB1> INFO: 766720 events read in total (32539ms).
[23:38:17.815] <TB1> INFO: 1526000 events read in total (65097ms).
[23:38:50.391] <TB1> INFO: 2279220 events read in total (97673ms).
[23:39:23.348] <TB1> INFO: 3027745 events read in total (130630ms).
[23:39:55.543] <TB1> INFO: 3775260 events read in total (162825ms).
[23:40:12.288] <TB1> INFO: 4160000 events read in total (179570ms).
[23:40:12.403] <TB1> INFO: Test took 180524ms.
[23:40:37.699] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[23:40:37.712] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[23:40:37.712] <TB1> INFO: run 1 of 1
[23:40:37.981] <TB1> INFO: Expecting 5324800 events.
[23:41:09.510] <TB1> INFO: 682530 events read in total (30937ms).
[23:41:40.086] <TB1> INFO: 1361125 events read in total (61513ms).
[23:42:10.834] <TB1> INFO: 2038495 events read in total (92261ms).
[23:42:41.416] <TB1> INFO: 2712745 events read in total (122843ms).
[23:43:11.786] <TB1> INFO: 3384050 events read in total (153213ms).
[23:43:42.592] <TB1> INFO: 4054530 events read in total (184019ms).
[23:44:13.742] <TB1> INFO: 4724810 events read in total (215169ms).
[23:44:41.056] <TB1> INFO: 5324800 events read in total (242483ms).
[23:44:41.210] <TB1> INFO: Test took 243498ms.
[23:45:13.623] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 218 (-1/-1) hits flags = 528 (plus default)
[23:45:13.636] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[23:45:13.636] <TB1> INFO: run 1 of 1
[23:45:13.874] <TB1> INFO: Expecting 4555200 events.
[23:45:45.690] <TB1> INFO: 716795 events read in total (31224ms).
[23:46:16.990] <TB1> INFO: 1428325 events read in total (62524ms).
[23:46:48.184] <TB1> INFO: 2137150 events read in total (93718ms).
[23:47:20.279] <TB1> INFO: 2840425 events read in total (125813ms).
[23:47:51.153] <TB1> INFO: 3542540 events read in total (156687ms).
[23:48:22.483] <TB1> INFO: 4244075 events read in total (188017ms).
[23:48:36.464] <TB1> INFO: 4555200 events read in total (201998ms).
[23:48:36.576] <TB1> INFO: Test took 202940ms.
[23:49:04.843] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 217 (-1/-1) hits flags = 528 (plus default)
[23:49:04.857] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[23:49:04.857] <TB1> INFO: run 1 of 1
[23:49:05.100] <TB1> INFO: Expecting 4534400 events.
[23:49:37.275] <TB1> INFO: 718220 events read in total (31583ms).
[23:50:08.677] <TB1> INFO: 1430650 events read in total (62985ms).
[23:50:40.167] <TB1> INFO: 2140100 events read in total (94475ms).
[23:51:11.633] <TB1> INFO: 2844450 events read in total (125941ms).
[23:51:42.559] <TB1> INFO: 3547350 events read in total (156867ms).
[23:52:13.587] <TB1> INFO: 4250110 events read in total (187895ms).
[23:52:26.467] <TB1> INFO: 4534400 events read in total (200775ms).
[23:52:26.553] <TB1> INFO: Test took 201696ms.
[23:52:56.604] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 218 (-1/-1) hits flags = 528 (plus default)
[23:52:56.617] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[23:52:56.618] <TB1> INFO: run 1 of 1
[23:52:56.854] <TB1> INFO: Expecting 4555200 events.
[23:53:28.664] <TB1> INFO: 716900 events read in total (31219ms).
[23:54:00.135] <TB1> INFO: 1428190 events read in total (62690ms).
[23:54:31.357] <TB1> INFO: 2137155 events read in total (93912ms).
[23:55:02.185] <TB1> INFO: 2840475 events read in total (124740ms).
[23:55:33.793] <TB1> INFO: 3542965 events read in total (156348ms).
[23:56:05.594] <TB1> INFO: 4244700 events read in total (188150ms).
[23:56:19.827] <TB1> INFO: 4555200 events read in total (202382ms).
[23:56:19.956] <TB1> INFO: Test took 203338ms.
[23:56:45.615] <TB1> INFO: PixTestTrim::trimBitTest() done
[23:56:45.616] <TB1> INFO: PixTestTrim::doTest() done, duration: 2639 seconds
[23:56:45.616] <TB1> INFO: Decoding statistics:
[23:56:45.616] <TB1> INFO: General information:
[23:56:45.616] <TB1> INFO: 16bit words read: 0
[23:56:45.616] <TB1> INFO: valid events total: 0
[23:56:45.616] <TB1> INFO: empty events: 0
[23:56:45.616] <TB1> INFO: valid events with pixels: 0
[23:56:45.616] <TB1> INFO: valid pixel hits: 0
[23:56:45.616] <TB1> INFO: Event errors: 0
[23:56:45.616] <TB1> INFO: start marker: 0
[23:56:45.616] <TB1> INFO: stop marker: 0
[23:56:45.616] <TB1> INFO: overflow: 0
[23:56:45.616] <TB1> INFO: invalid 5bit words: 0
[23:56:45.616] <TB1> INFO: invalid XOR eye diagram: 0
[23:56:45.616] <TB1> INFO: frame (failed synchr.): 0
[23:56:45.616] <TB1> INFO: idle data (no TBM trl): 0
[23:56:45.616] <TB1> INFO: no data (only TBM hdr): 0
[23:56:45.616] <TB1> INFO: TBM errors: 0
[23:56:45.616] <TB1> INFO: flawed TBM headers: 0
[23:56:45.616] <TB1> INFO: flawed TBM trailers: 0
[23:56:45.616] <TB1> INFO: event ID mismatches: 0
[23:56:45.616] <TB1> INFO: ROC errors: 0
[23:56:45.616] <TB1> INFO: missing ROC header(s): 0
[23:56:45.616] <TB1> INFO: misplaced readback start: 0
[23:56:45.616] <TB1> INFO: Pixel decoding errors: 0
[23:56:45.616] <TB1> INFO: pixel data incomplete: 0
[23:56:45.616] <TB1> INFO: pixel address: 0
[23:56:45.616] <TB1> INFO: pulse height fill bit: 0
[23:56:45.616] <TB1> INFO: buffer corruption: 0
[23:56:46.227] <TB1> INFO: ######################################################################
[23:56:46.227] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[23:56:46.227] <TB1> INFO: ######################################################################
[23:56:46.465] <TB1> INFO: Expecting 41600 events.
[23:56:50.078] <TB1> INFO: 41600 events read in total (3022ms).
[23:56:50.079] <TB1> INFO: Test took 3851ms.
[23:56:50.522] <TB1> INFO: Expecting 41600 events.
[23:56:54.194] <TB1> INFO: 41600 events read in total (3080ms).
[23:56:54.195] <TB1> INFO: Test took 3913ms.
[23:56:54.485] <TB1> INFO: Expecting 41600 events.
[23:56:58.093] <TB1> INFO: 41600 events read in total (3016ms).
[23:56:58.094] <TB1> INFO: Test took 3874ms.
[23:56:58.399] <TB1> INFO: Expecting 41600 events.
[23:57:01.928] <TB1> INFO: 41600 events read in total (2937ms).
[23:57:01.929] <TB1> INFO: Test took 3809ms.
[23:57:02.236] <TB1> INFO: Expecting 41600 events.
[23:57:05.791] <TB1> INFO: 41600 events read in total (2963ms).
[23:57:05.792] <TB1> INFO: Test took 3839ms.
[23:57:06.082] <TB1> INFO: Expecting 41600 events.
[23:57:09.723] <TB1> INFO: 41600 events read in total (3049ms).
[23:57:09.723] <TB1> INFO: Test took 3906ms.
[23:57:10.013] <TB1> INFO: Expecting 41600 events.
[23:57:13.534] <TB1> INFO: 41600 events read in total (2929ms).
[23:57:13.535] <TB1> INFO: Test took 3787ms.
[23:57:13.824] <TB1> INFO: Expecting 41600 events.
[23:57:17.428] <TB1> INFO: 41600 events read in total (3012ms).
[23:57:17.430] <TB1> INFO: Test took 3871ms.
[23:57:17.760] <TB1> INFO: Expecting 41600 events.
[23:57:21.299] <TB1> INFO: 41600 events read in total (2947ms).
[23:57:21.300] <TB1> INFO: Test took 3841ms.
[23:57:21.590] <TB1> INFO: Expecting 41600 events.
[23:57:25.127] <TB1> INFO: 41600 events read in total (2946ms).
[23:57:25.127] <TB1> INFO: Test took 3802ms.
[23:57:25.434] <TB1> INFO: Expecting 41600 events.
[23:57:29.059] <TB1> INFO: 41600 events read in total (3034ms).
[23:57:29.060] <TB1> INFO: Test took 3909ms.
[23:57:29.365] <TB1> INFO: Expecting 41600 events.
[23:57:32.898] <TB1> INFO: 41600 events read in total (2941ms).
[23:57:32.899] <TB1> INFO: Test took 3815ms.
[23:57:33.204] <TB1> INFO: Expecting 41600 events.
[23:57:36.725] <TB1> INFO: 41600 events read in total (2929ms).
[23:57:36.726] <TB1> INFO: Test took 3801ms.
[23:57:37.015] <TB1> INFO: Expecting 41600 events.
[23:57:40.569] <TB1> INFO: 41600 events read in total (2962ms).
[23:57:40.570] <TB1> INFO: Test took 3820ms.
[23:57:40.860] <TB1> INFO: Expecting 41600 events.
[23:57:44.432] <TB1> INFO: 41600 events read in total (2981ms).
[23:57:44.433] <TB1> INFO: Test took 3839ms.
[23:57:44.723] <TB1> INFO: Expecting 41600 events.
[23:57:48.265] <TB1> INFO: 41600 events read in total (2951ms).
[23:57:48.266] <TB1> INFO: Test took 3809ms.
[23:57:48.555] <TB1> INFO: Expecting 41600 events.
[23:57:52.151] <TB1> INFO: 41600 events read in total (3004ms).
[23:57:52.152] <TB1> INFO: Test took 3862ms.
[23:57:52.441] <TB1> INFO: Expecting 41600 events.
[23:57:56.063] <TB1> INFO: 41600 events read in total (3030ms).
[23:57:56.064] <TB1> INFO: Test took 3888ms.
[23:57:56.368] <TB1> INFO: Expecting 41600 events.
[23:58:00.031] <TB1> INFO: 41600 events read in total (3072ms).
[23:58:00.032] <TB1> INFO: Test took 3943ms.
[23:58:00.322] <TB1> INFO: Expecting 41600 events.
[23:58:03.864] <TB1> INFO: 41600 events read in total (2950ms).
[23:58:03.865] <TB1> INFO: Test took 3808ms.
[23:58:04.154] <TB1> INFO: Expecting 41600 events.
[23:58:07.753] <TB1> INFO: 41600 events read in total (3007ms).
[23:58:07.754] <TB1> INFO: Test took 3865ms.
[23:58:08.046] <TB1> INFO: Expecting 41600 events.
[23:58:11.575] <TB1> INFO: 41600 events read in total (2937ms).
[23:58:11.576] <TB1> INFO: Test took 3794ms.
[23:58:11.869] <TB1> INFO: Expecting 41600 events.
[23:58:15.448] <TB1> INFO: 41600 events read in total (2988ms).
[23:58:15.448] <TB1> INFO: Test took 3844ms.
[23:58:15.738] <TB1> INFO: Expecting 41600 events.
[23:58:19.289] <TB1> INFO: 41600 events read in total (2960ms).
[23:58:19.290] <TB1> INFO: Test took 3817ms.
[23:58:19.582] <TB1> INFO: Expecting 41600 events.
[23:58:23.137] <TB1> INFO: 41600 events read in total (2963ms).
[23:58:23.138] <TB1> INFO: Test took 3821ms.
[23:58:23.428] <TB1> INFO: Expecting 41600 events.
[23:58:26.990] <TB1> INFO: 41600 events read in total (2971ms).
[23:58:26.991] <TB1> INFO: Test took 3829ms.
[23:58:27.280] <TB1> INFO: Expecting 41600 events.
[23:58:30.854] <TB1> INFO: 41600 events read in total (2982ms).
[23:58:30.855] <TB1> INFO: Test took 3840ms.
[23:58:31.160] <TB1> INFO: Expecting 41600 events.
[23:58:34.760] <TB1> INFO: 41600 events read in total (3009ms).
[23:58:34.761] <TB1> INFO: Test took 3879ms.
[23:58:35.051] <TB1> INFO: Expecting 41600 events.
[23:58:38.574] <TB1> INFO: 41600 events read in total (2932ms).
[23:58:38.575] <TB1> INFO: Test took 3789ms.
[23:58:38.865] <TB1> INFO: Expecting 2560 events.
[23:58:39.751] <TB1> INFO: 2560 events read in total (294ms).
[23:58:39.751] <TB1> INFO: Test took 1163ms.
[23:58:40.059] <TB1> INFO: Expecting 2560 events.
[23:58:40.953] <TB1> INFO: 2560 events read in total (302ms).
[23:58:40.954] <TB1> INFO: Test took 1202ms.
[23:58:41.260] <TB1> INFO: Expecting 2560 events.
[23:58:42.151] <TB1> INFO: 2560 events read in total (299ms).
[23:58:42.151] <TB1> INFO: Test took 1197ms.
[23:58:42.460] <TB1> INFO: Expecting 2560 events.
[23:58:43.350] <TB1> INFO: 2560 events read in total (298ms).
[23:58:43.351] <TB1> INFO: Test took 1199ms.
[23:58:43.658] <TB1> INFO: Expecting 2560 events.
[23:58:44.549] <TB1> INFO: 2560 events read in total (299ms).
[23:58:44.550] <TB1> INFO: Test took 1199ms.
[23:58:44.857] <TB1> INFO: Expecting 2560 events.
[23:58:45.746] <TB1> INFO: 2560 events read in total (297ms).
[23:58:45.746] <TB1> INFO: Test took 1196ms.
[23:58:46.055] <TB1> INFO: Expecting 2560 events.
[23:58:46.939] <TB1> INFO: 2560 events read in total (293ms).
[23:58:46.939] <TB1> INFO: Test took 1192ms.
[23:58:47.246] <TB1> INFO: Expecting 2560 events.
[23:58:48.126] <TB1> INFO: 2560 events read in total (288ms).
[23:58:48.127] <TB1> INFO: Test took 1187ms.
[23:58:48.434] <TB1> INFO: Expecting 2560 events.
[23:58:49.322] <TB1> INFO: 2560 events read in total (296ms).
[23:58:49.322] <TB1> INFO: Test took 1195ms.
[23:58:49.630] <TB1> INFO: Expecting 2560 events.
[23:58:50.517] <TB1> INFO: 2560 events read in total (296ms).
[23:58:50.517] <TB1> INFO: Test took 1194ms.
[23:58:50.824] <TB1> INFO: Expecting 2560 events.
[23:58:51.706] <TB1> INFO: 2560 events read in total (290ms).
[23:58:51.706] <TB1> INFO: Test took 1188ms.
[23:58:52.014] <TB1> INFO: Expecting 2560 events.
[23:58:52.899] <TB1> INFO: 2560 events read in total (293ms).
[23:58:52.900] <TB1> INFO: Test took 1193ms.
[23:58:53.205] <TB1> INFO: Expecting 2560 events.
[23:58:54.095] <TB1> INFO: 2560 events read in total (298ms).
[23:58:54.096] <TB1> INFO: Test took 1195ms.
[23:58:54.403] <TB1> INFO: Expecting 2560 events.
[23:58:55.294] <TB1> INFO: 2560 events read in total (299ms).
[23:58:55.294] <TB1> INFO: Test took 1198ms.
[23:58:55.603] <TB1> INFO: Expecting 2560 events.
[23:58:56.498] <TB1> INFO: 2560 events read in total (303ms).
[23:58:56.499] <TB1> INFO: Test took 1204ms.
[23:58:56.806] <TB1> INFO: Expecting 2560 events.
[23:58:57.691] <TB1> INFO: 2560 events read in total (293ms).
[23:58:57.692] <TB1> INFO: Test took 1193ms.
[23:58:57.696] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:58:57.001] <TB1> INFO: Expecting 655360 events.
[23:59:12.760] <TB1> INFO: 655360 events read in total (14168ms).
[23:59:12.774] <TB1> INFO: Expecting 655360 events.
[23:59:27.194] <TB1> INFO: 655360 events read in total (14017ms).
[23:59:27.212] <TB1> INFO: Expecting 655360 events.
[23:59:41.643] <TB1> INFO: 655360 events read in total (14028ms).
[23:59:41.664] <TB1> INFO: Expecting 655360 events.
[23:59:56.207] <TB1> INFO: 655360 events read in total (14140ms).
[23:59:56.239] <TB1> INFO: Expecting 655360 events.
[00:00:10.814] <TB1> INFO: 655360 events read in total (14172ms).
[00:00:10.843] <TB1> INFO: Expecting 655360 events.
[00:00:25.252] <TB1> INFO: 655360 events read in total (14006ms).
[00:00:25.286] <TB1> INFO: Expecting 655360 events.
[00:00:39.708] <TB1> INFO: 655360 events read in total (14019ms).
[00:00:39.750] <TB1> INFO: Expecting 655360 events.
[00:00:54.291] <TB1> INFO: 655360 events read in total (14138ms).
[00:00:54.335] <TB1> INFO: Expecting 655360 events.
[00:01:08.715] <TB1> INFO: 655360 events read in total (13977ms).
[00:01:08.779] <TB1> INFO: Expecting 655360 events.
[00:01:23.116] <TB1> INFO: 655360 events read in total (13934ms).
[00:01:23.166] <TB1> INFO: Expecting 655360 events.
[00:01:37.710] <TB1> INFO: 655360 events read in total (14141ms).
[00:01:37.780] <TB1> INFO: Expecting 655360 events.
[00:01:52.246] <TB1> INFO: 655360 events read in total (14062ms).
[00:01:52.352] <TB1> INFO: Expecting 655360 events.
[00:02:06.995] <TB1> INFO: 655360 events read in total (14240ms).
[00:02:07.077] <TB1> INFO: Expecting 655360 events.
[00:02:21.660] <TB1> INFO: 655360 events read in total (14180ms).
[00:02:21.776] <TB1> INFO: Expecting 655360 events.
[00:02:36.431] <TB1> INFO: 655360 events read in total (14252ms).
[00:02:36.524] <TB1> INFO: Expecting 655360 events.
[00:02:50.889] <TB1> INFO: 655360 events read in total (13961ms).
[00:02:50.987] <TB1> INFO: Test took 233291ms.
[00:02:51.083] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:02:51.339] <TB1> INFO: Expecting 655360 events.
[00:03:05.759] <TB1> INFO: 655360 events read in total (13828ms).
[00:03:05.770] <TB1> INFO: Expecting 655360 events.
[00:03:20.269] <TB1> INFO: 655360 events read in total (14096ms).
[00:03:20.290] <TB1> INFO: Expecting 655360 events.
[00:03:34.483] <TB1> INFO: 655360 events read in total (13790ms).
[00:03:34.509] <TB1> INFO: Expecting 655360 events.
[00:03:48.776] <TB1> INFO: 655360 events read in total (13864ms).
[00:03:48.800] <TB1> INFO: Expecting 655360 events.
[00:04:03.222] <TB1> INFO: 655360 events read in total (14019ms).
[00:04:03.252] <TB1> INFO: Expecting 655360 events.
[00:04:17.617] <TB1> INFO: 655360 events read in total (13962ms).
[00:04:17.651] <TB1> INFO: Expecting 655360 events.
[00:04:31.954] <TB1> INFO: 655360 events read in total (13900ms).
[00:04:31.993] <TB1> INFO: Expecting 655360 events.
[00:04:46.485] <TB1> INFO: 655360 events read in total (14089ms).
[00:04:46.532] <TB1> INFO: Expecting 655360 events.
[00:05:00.987] <TB1> INFO: 655360 events read in total (14052ms).
[00:05:01.034] <TB1> INFO: Expecting 655360 events.
[00:05:15.457] <TB1> INFO: 655360 events read in total (14019ms).
[00:05:15.510] <TB1> INFO: Expecting 655360 events.
[00:05:30.295] <TB1> INFO: 655360 events read in total (14382ms).
[00:05:30.362] <TB1> INFO: Expecting 655360 events.
[00:05:44.893] <TB1> INFO: 655360 events read in total (14127ms).
[00:05:44.997] <TB1> INFO: Expecting 655360 events.
[00:06:00.095] <TB1> INFO: 655360 events read in total (14695ms).
[00:06:00.209] <TB1> INFO: Expecting 655360 events.
[00:06:14.984] <TB1> INFO: 655360 events read in total (14371ms).
[00:06:15.083] <TB1> INFO: Expecting 655360 events.
[00:06:29.597] <TB1> INFO: 655360 events read in total (14111ms).
[00:06:29.710] <TB1> INFO: Expecting 655360 events.
[00:06:43.719] <TB1> INFO: 655360 events read in total (13606ms).
[00:06:43.815] <TB1> INFO: Test took 232732ms.
[00:06:44.071] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[00:06:44.081] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[00:06:44.092] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[00:06:44.102] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[00:06:44.112] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[00:06:44.123] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[00:06:44.133] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[00:06:44.143] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[00:06:44.154] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[00:06:44.164] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[00:06:44.174] <TB1> INFO: safety margin for low PH: adding 8, margin is now 28
[00:06:44.185] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[00:06:44.195] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[00:06:44.205] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[00:06:44.216] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[00:06:44.226] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[00:06:44.236] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[00:06:44.246] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[00:06:44.257] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[00:06:44.267] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[00:06:44.277] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[00:06:44.288] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[00:06:44.298] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[00:06:44.308] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[00:06:44.318] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[00:06:44.329] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[00:06:44.339] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[00:06:44.350] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[00:06:44.360] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[00:06:44.371] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[00:06:44.381] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[00:06:44.392] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[00:06:44.403] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[00:06:44.414] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[00:06:44.424] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[00:06:44.435] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[00:06:44.445] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[00:06:44.456] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[00:06:44.467] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[00:06:44.477] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[00:06:44.488] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[00:06:44.498] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[00:06:44.509] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[00:06:44.519] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[00:06:44.530] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[00:06:44.571] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C0.dat
[00:06:44.571] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C1.dat
[00:06:44.571] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C2.dat
[00:06:44.571] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C3.dat
[00:06:44.571] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C4.dat
[00:06:44.571] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C5.dat
[00:06:44.571] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C6.dat
[00:06:44.571] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C7.dat
[00:06:44.572] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C8.dat
[00:06:44.572] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C9.dat
[00:06:44.572] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C10.dat
[00:06:44.572] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C11.dat
[00:06:44.572] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C12.dat
[00:06:44.572] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C13.dat
[00:06:44.572] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C14.dat
[00:06:44.572] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C15.dat
[00:06:44.902] <TB1> INFO: Expecting 41600 events.
[00:06:48.009] <TB1> INFO: 41600 events read in total (2516ms).
[00:06:48.010] <TB1> INFO: Test took 3434ms.
[00:06:48.463] <TB1> INFO: Expecting 41600 events.
[00:06:51.425] <TB1> INFO: 41600 events read in total (2370ms).
[00:06:51.426] <TB1> INFO: Test took 3202ms.
[00:06:51.914] <TB1> INFO: Expecting 41600 events.
[00:06:55.043] <TB1> INFO: 41600 events read in total (2538ms).
[00:06:55.044] <TB1> INFO: Test took 3407ms.
[00:06:55.262] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:06:55.351] <TB1> INFO: Expecting 2560 events.
[00:06:56.234] <TB1> INFO: 2560 events read in total (291ms).
[00:06:56.235] <TB1> INFO: Test took 973ms.
[00:06:56.238] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:06:56.543] <TB1> INFO: Expecting 2560 events.
[00:06:57.427] <TB1> INFO: 2560 events read in total (292ms).
[00:06:57.427] <TB1> INFO: Test took 1189ms.
[00:06:57.429] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:06:57.736] <TB1> INFO: Expecting 2560 events.
[00:06:58.622] <TB1> INFO: 2560 events read in total (294ms).
[00:06:58.622] <TB1> INFO: Test took 1193ms.
[00:06:58.624] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:06:58.930] <TB1> INFO: Expecting 2560 events.
[00:06:59.813] <TB1> INFO: 2560 events read in total (292ms).
[00:06:59.814] <TB1> INFO: Test took 1190ms.
[00:06:59.817] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:00.122] <TB1> INFO: Expecting 2560 events.
[00:07:01.006] <TB1> INFO: 2560 events read in total (293ms).
[00:07:01.006] <TB1> INFO: Test took 1190ms.
[00:07:01.009] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:01.315] <TB1> INFO: Expecting 2560 events.
[00:07:02.200] <TB1> INFO: 2560 events read in total (294ms).
[00:07:02.201] <TB1> INFO: Test took 1192ms.
[00:07:02.202] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:02.509] <TB1> INFO: Expecting 2560 events.
[00:07:03.395] <TB1> INFO: 2560 events read in total (294ms).
[00:07:03.395] <TB1> INFO: Test took 1193ms.
[00:07:03.397] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:03.703] <TB1> INFO: Expecting 2560 events.
[00:07:04.594] <TB1> INFO: 2560 events read in total (299ms).
[00:07:04.594] <TB1> INFO: Test took 1197ms.
[00:07:04.598] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:04.902] <TB1> INFO: Expecting 2560 events.
[00:07:05.789] <TB1> INFO: 2560 events read in total (295ms).
[00:07:05.790] <TB1> INFO: Test took 1192ms.
[00:07:05.792] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:06.098] <TB1> INFO: Expecting 2560 events.
[00:07:06.981] <TB1> INFO: 2560 events read in total (291ms).
[00:07:06.981] <TB1> INFO: Test took 1189ms.
[00:07:06.985] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:07.289] <TB1> INFO: Expecting 2560 events.
[00:07:08.182] <TB1> INFO: 2560 events read in total (301ms).
[00:07:08.182] <TB1> INFO: Test took 1197ms.
[00:07:08.184] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:08.490] <TB1> INFO: Expecting 2560 events.
[00:07:09.381] <TB1> INFO: 2560 events read in total (299ms).
[00:07:09.381] <TB1> INFO: Test took 1197ms.
[00:07:09.384] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:09.690] <TB1> INFO: Expecting 2560 events.
[00:07:10.583] <TB1> INFO: 2560 events read in total (301ms).
[00:07:10.583] <TB1> INFO: Test took 1199ms.
[00:07:10.588] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:10.892] <TB1> INFO: Expecting 2560 events.
[00:07:11.779] <TB1> INFO: 2560 events read in total (295ms).
[00:07:11.779] <TB1> INFO: Test took 1191ms.
[00:07:11.782] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:12.087] <TB1> INFO: Expecting 2560 events.
[00:07:12.975] <TB1> INFO: 2560 events read in total (297ms).
[00:07:12.975] <TB1> INFO: Test took 1193ms.
[00:07:12.977] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:13.284] <TB1> INFO: Expecting 2560 events.
[00:07:14.174] <TB1> INFO: 2560 events read in total (299ms).
[00:07:14.175] <TB1> INFO: Test took 1198ms.
[00:07:14.178] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:14.483] <TB1> INFO: Expecting 2560 events.
[00:07:15.366] <TB1> INFO: 2560 events read in total (291ms).
[00:07:15.366] <TB1> INFO: Test took 1188ms.
[00:07:15.369] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:15.674] <TB1> INFO: Expecting 2560 events.
[00:07:16.555] <TB1> INFO: 2560 events read in total (289ms).
[00:07:16.555] <TB1> INFO: Test took 1186ms.
[00:07:16.557] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:16.863] <TB1> INFO: Expecting 2560 events.
[00:07:17.750] <TB1> INFO: 2560 events read in total (295ms).
[00:07:17.750] <TB1> INFO: Test took 1193ms.
[00:07:17.752] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:18.060] <TB1> INFO: Expecting 2560 events.
[00:07:18.940] <TB1> INFO: 2560 events read in total (289ms).
[00:07:18.941] <TB1> INFO: Test took 1189ms.
[00:07:18.945] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:19.248] <TB1> INFO: Expecting 2560 events.
[00:07:20.127] <TB1> INFO: 2560 events read in total (287ms).
[00:07:20.127] <TB1> INFO: Test took 1182ms.
[00:07:20.129] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:20.436] <TB1> INFO: Expecting 2560 events.
[00:07:21.321] <TB1> INFO: 2560 events read in total (293ms).
[00:07:21.321] <TB1> INFO: Test took 1192ms.
[00:07:21.324] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:21.629] <TB1> INFO: Expecting 2560 events.
[00:07:22.514] <TB1> INFO: 2560 events read in total (293ms).
[00:07:22.515] <TB1> INFO: Test took 1191ms.
[00:07:22.521] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:22.822] <TB1> INFO: Expecting 2560 events.
[00:07:23.707] <TB1> INFO: 2560 events read in total (294ms).
[00:07:23.707] <TB1> INFO: Test took 1186ms.
[00:07:23.712] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:24.016] <TB1> INFO: Expecting 2560 events.
[00:07:24.901] <TB1> INFO: 2560 events read in total (293ms).
[00:07:24.901] <TB1> INFO: Test took 1190ms.
[00:07:24.905] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:25.210] <TB1> INFO: Expecting 2560 events.
[00:07:26.095] <TB1> INFO: 2560 events read in total (293ms).
[00:07:26.096] <TB1> INFO: Test took 1191ms.
[00:07:26.099] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:26.404] <TB1> INFO: Expecting 2560 events.
[00:07:27.295] <TB1> INFO: 2560 events read in total (299ms).
[00:07:27.295] <TB1> INFO: Test took 1196ms.
[00:07:27.299] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:27.605] <TB1> INFO: Expecting 2560 events.
[00:07:28.492] <TB1> INFO: 2560 events read in total (296ms).
[00:07:28.492] <TB1> INFO: Test took 1193ms.
[00:07:28.497] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:28.800] <TB1> INFO: Expecting 2560 events.
[00:07:29.687] <TB1> INFO: 2560 events read in total (295ms).
[00:07:29.688] <TB1> INFO: Test took 1191ms.
[00:07:29.693] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:29.994] <TB1> INFO: Expecting 2560 events.
[00:07:30.883] <TB1> INFO: 2560 events read in total (297ms).
[00:07:30.883] <TB1> INFO: Test took 1191ms.
[00:07:30.886] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:31.191] <TB1> INFO: Expecting 2560 events.
[00:07:32.079] <TB1> INFO: 2560 events read in total (296ms).
[00:07:32.080] <TB1> INFO: Test took 1194ms.
[00:07:32.083] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:07:32.387] <TB1> INFO: Expecting 2560 events.
[00:07:33.271] <TB1> INFO: 2560 events read in total (293ms).
[00:07:33.271] <TB1> INFO: Test took 1188ms.
[00:07:33.736] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 647 seconds
[00:07:33.736] <TB1> INFO: PH scale (per ROC): 46 48 32 44 50 33 29 50 50 40 35 53 31 38 32 49
[00:07:33.736] <TB1> INFO: PH offset (per ROC): 107 110 80 98 122 100 84 118 134 93 101 125 93 106 113 108
[00:07:33.746] <TB1> INFO: Decoding statistics:
[00:07:33.746] <TB1> INFO: General information:
[00:07:33.746] <TB1> INFO: 16bit words read: 127858
[00:07:33.746] <TB1> INFO: valid events total: 20480
[00:07:33.746] <TB1> INFO: empty events: 17991
[00:07:33.746] <TB1> INFO: valid events with pixels: 2489
[00:07:33.746] <TB1> INFO: valid pixel hits: 2489
[00:07:33.746] <TB1> INFO: Event errors: 0
[00:07:33.746] <TB1> INFO: start marker: 0
[00:07:33.746] <TB1> INFO: stop marker: 0
[00:07:33.746] <TB1> INFO: overflow: 0
[00:07:33.746] <TB1> INFO: invalid 5bit words: 0
[00:07:33.746] <TB1> INFO: invalid XOR eye diagram: 0
[00:07:33.746] <TB1> INFO: frame (failed synchr.): 0
[00:07:33.746] <TB1> INFO: idle data (no TBM trl): 0
[00:07:33.746] <TB1> INFO: no data (only TBM hdr): 0
[00:07:33.746] <TB1> INFO: TBM errors: 0
[00:07:33.746] <TB1> INFO: flawed TBM headers: 0
[00:07:33.746] <TB1> INFO: flawed TBM trailers: 0
[00:07:33.746] <TB1> INFO: event ID mismatches: 0
[00:07:33.746] <TB1> INFO: ROC errors: 0
[00:07:33.746] <TB1> INFO: missing ROC header(s): 0
[00:07:33.746] <TB1> INFO: misplaced readback start: 0
[00:07:33.746] <TB1> INFO: Pixel decoding errors: 0
[00:07:33.746] <TB1> INFO: pixel data incomplete: 0
[00:07:33.746] <TB1> INFO: pixel address: 0
[00:07:33.746] <TB1> INFO: pulse height fill bit: 0
[00:07:33.746] <TB1> INFO: buffer corruption: 0
[00:07:33.916] <TB1> INFO: ######################################################################
[00:07:33.916] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[00:07:33.916] <TB1> INFO: ######################################################################
[00:07:33.931] <TB1> INFO: scanning low vcal = 10
[00:07:34.169] <TB1> INFO: Expecting 41600 events.
[00:07:37.766] <TB1> INFO: 41600 events read in total (3005ms).
[00:07:37.767] <TB1> INFO: Test took 3836ms.
[00:07:37.770] <TB1> INFO: scanning low vcal = 20
[00:07:38.065] <TB1> INFO: Expecting 41600 events.
[00:07:41.667] <TB1> INFO: 41600 events read in total (3010ms).
[00:07:41.668] <TB1> INFO: Test took 3897ms.
[00:07:41.671] <TB1> INFO: scanning low vcal = 30
[00:07:41.962] <TB1> INFO: Expecting 41600 events.
[00:07:45.621] <TB1> INFO: 41600 events read in total (3067ms).
[00:07:45.622] <TB1> INFO: Test took 3950ms.
[00:07:45.625] <TB1> INFO: scanning low vcal = 40
[00:07:45.949] <TB1> INFO: Expecting 41600 events.
[00:07:49.869] <TB1> INFO: 41600 events read in total (3329ms).
[00:07:49.870] <TB1> INFO: Test took 4245ms.
[00:07:49.874] <TB1> INFO: scanning low vcal = 50
[00:07:50.150] <TB1> INFO: Expecting 41600 events.
[00:07:54.106] <TB1> INFO: 41600 events read in total (3364ms).
[00:07:54.107] <TB1> INFO: Test took 4233ms.
[00:07:54.111] <TB1> INFO: scanning low vcal = 60
[00:07:54.387] <TB1> INFO: Expecting 41600 events.
[00:07:58.356] <TB1> INFO: 41600 events read in total (3378ms).
[00:07:58.357] <TB1> INFO: Test took 4246ms.
[00:07:58.362] <TB1> INFO: scanning low vcal = 70
[00:07:58.637] <TB1> INFO: Expecting 41600 events.
[00:08:02.621] <TB1> INFO: 41600 events read in total (3393ms).
[00:08:02.621] <TB1> INFO: Test took 4259ms.
[00:08:02.625] <TB1> INFO: scanning low vcal = 80
[00:08:02.901] <TB1> INFO: Expecting 41600 events.
[00:08:06.881] <TB1> INFO: 41600 events read in total (3388ms).
[00:08:06.882] <TB1> INFO: Test took 4257ms.
[00:08:06.885] <TB1> INFO: scanning low vcal = 90
[00:08:07.161] <TB1> INFO: Expecting 41600 events.
[00:08:11.119] <TB1> INFO: 41600 events read in total (3366ms).
[00:08:11.120] <TB1> INFO: Test took 4234ms.
[00:08:11.127] <TB1> INFO: scanning low vcal = 100
[00:08:11.400] <TB1> INFO: Expecting 41600 events.
[00:08:15.370] <TB1> INFO: 41600 events read in total (3378ms).
[00:08:15.370] <TB1> INFO: Test took 4243ms.
[00:08:15.374] <TB1> INFO: scanning low vcal = 110
[00:08:15.650] <TB1> INFO: Expecting 41600 events.
[00:08:19.630] <TB1> INFO: 41600 events read in total (3388ms).
[00:08:19.631] <TB1> INFO: Test took 4257ms.
[00:08:19.634] <TB1> INFO: scanning low vcal = 120
[00:08:19.911] <TB1> INFO: Expecting 41600 events.
[00:08:23.879] <TB1> INFO: 41600 events read in total (3376ms).
[00:08:23.880] <TB1> INFO: Test took 4246ms.
[00:08:23.883] <TB1> INFO: scanning low vcal = 130
[00:08:24.160] <TB1> INFO: Expecting 41600 events.
[00:08:28.115] <TB1> INFO: 41600 events read in total (3363ms).
[00:08:28.116] <TB1> INFO: Test took 4233ms.
[00:08:28.119] <TB1> INFO: scanning low vcal = 140
[00:08:28.396] <TB1> INFO: Expecting 41600 events.
[00:08:32.365] <TB1> INFO: 41600 events read in total (3377ms).
[00:08:32.366] <TB1> INFO: Test took 4247ms.
[00:08:32.369] <TB1> INFO: scanning low vcal = 150
[00:08:32.651] <TB1> INFO: Expecting 41600 events.
[00:08:36.629] <TB1> INFO: 41600 events read in total (3386ms).
[00:08:36.630] <TB1> INFO: Test took 4261ms.
[00:08:36.633] <TB1> INFO: scanning low vcal = 160
[00:08:36.910] <TB1> INFO: Expecting 41600 events.
[00:08:40.869] <TB1> INFO: 41600 events read in total (3368ms).
[00:08:40.870] <TB1> INFO: Test took 4237ms.
[00:08:40.873] <TB1> INFO: scanning low vcal = 170
[00:08:41.150] <TB1> INFO: Expecting 41600 events.
[00:08:45.125] <TB1> INFO: 41600 events read in total (3383ms).
[00:08:45.126] <TB1> INFO: Test took 4252ms.
[00:08:45.131] <TB1> INFO: scanning low vcal = 180
[00:08:45.406] <TB1> INFO: Expecting 41600 events.
[00:08:49.401] <TB1> INFO: 41600 events read in total (3404ms).
[00:08:49.401] <TB1> INFO: Test took 4270ms.
[00:08:49.404] <TB1> INFO: scanning low vcal = 190
[00:08:49.685] <TB1> INFO: Expecting 41600 events.
[00:08:53.675] <TB1> INFO: 41600 events read in total (3399ms).
[00:08:53.676] <TB1> INFO: Test took 4272ms.
[00:08:53.679] <TB1> INFO: scanning low vcal = 200
[00:08:53.956] <TB1> INFO: Expecting 41600 events.
[00:08:57.938] <TB1> INFO: 41600 events read in total (3390ms).
[00:08:57.939] <TB1> INFO: Test took 4260ms.
[00:08:57.943] <TB1> INFO: scanning low vcal = 210
[00:08:58.219] <TB1> INFO: Expecting 41600 events.
[00:09:02.169] <TB1> INFO: 41600 events read in total (3358ms).
[00:09:02.170] <TB1> INFO: Test took 4227ms.
[00:09:02.174] <TB1> INFO: scanning low vcal = 220
[00:09:02.450] <TB1> INFO: Expecting 41600 events.
[00:09:06.398] <TB1> INFO: 41600 events read in total (3357ms).
[00:09:06.399] <TB1> INFO: Test took 4225ms.
[00:09:06.402] <TB1> INFO: scanning low vcal = 230
[00:09:06.678] <TB1> INFO: Expecting 41600 events.
[00:09:10.649] <TB1> INFO: 41600 events read in total (3378ms).
[00:09:10.650] <TB1> INFO: Test took 4248ms.
[00:09:10.653] <TB1> INFO: scanning low vcal = 240
[00:09:10.929] <TB1> INFO: Expecting 41600 events.
[00:09:14.873] <TB1> INFO: 41600 events read in total (3352ms).
[00:09:14.873] <TB1> INFO: Test took 4219ms.
[00:09:14.876] <TB1> INFO: scanning low vcal = 250
[00:09:15.153] <TB1> INFO: Expecting 41600 events.
[00:09:19.117] <TB1> INFO: 41600 events read in total (3372ms).
[00:09:19.118] <TB1> INFO: Test took 4241ms.
[00:09:19.123] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[00:09:19.397] <TB1> INFO: Expecting 41600 events.
[00:09:23.365] <TB1> INFO: 41600 events read in total (3376ms).
[00:09:23.365] <TB1> INFO: Test took 4242ms.
[00:09:23.370] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[00:09:23.645] <TB1> INFO: Expecting 41600 events.
[00:09:27.619] <TB1> INFO: 41600 events read in total (3383ms).
[00:09:27.619] <TB1> INFO: Test took 4248ms.
[00:09:27.623] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[00:09:27.899] <TB1> INFO: Expecting 41600 events.
[00:09:31.885] <TB1> INFO: 41600 events read in total (3394ms).
[00:09:31.886] <TB1> INFO: Test took 4263ms.
[00:09:31.889] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[00:09:32.165] <TB1> INFO: Expecting 41600 events.
[00:09:36.174] <TB1> INFO: 41600 events read in total (3417ms).
[00:09:36.175] <TB1> INFO: Test took 4286ms.
[00:09:36.178] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[00:09:36.455] <TB1> INFO: Expecting 41600 events.
[00:09:40.426] <TB1> INFO: 41600 events read in total (3380ms).
[00:09:40.427] <TB1> INFO: Test took 4249ms.
[00:09:40.962] <TB1> INFO: PixTestGainPedestal::measure() done
[00:10:20.875] <TB1> INFO: PixTestGainPedestal::fit() done
[00:10:20.875] <TB1> INFO: non-linearity mean: 0.967 0.974 0.957 0.948 0.984 0.950 0.998 0.984 0.980 0.966 0.933 0.978 1.017 0.941 0.965 0.980
[00:10:20.875] <TB1> INFO: non-linearity RMS: 0.034 0.008 0.159 0.139 0.003 0.061 0.170 0.002 0.004 0.033 0.120 0.004 0.168 0.068 0.155 0.006
[00:10:20.875] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C0.dat
[00:10:20.888] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C1.dat
[00:10:20.902] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C2.dat
[00:10:20.915] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C3.dat
[00:10:20.928] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C4.dat
[00:10:20.941] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C5.dat
[00:10:20.954] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C6.dat
[00:10:20.967] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C7.dat
[00:10:20.980] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C8.dat
[00:10:20.993] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C9.dat
[00:10:21.006] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C10.dat
[00:10:21.019] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C11.dat
[00:10:21.032] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C12.dat
[00:10:21.045] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C13.dat
[00:10:21.058] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C14.dat
[00:10:21.071] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C15.dat
[00:10:21.084] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 167 seconds
[00:10:21.084] <TB1> INFO: Decoding statistics:
[00:10:21.084] <TB1> INFO: General information:
[00:10:21.084] <TB1> INFO: 16bit words read: 3273762
[00:10:21.084] <TB1> INFO: valid events total: 332800
[00:10:21.084] <TB1> INFO: empty events: 2174
[00:10:21.084] <TB1> INFO: valid events with pixels: 330626
[00:10:21.084] <TB1> INFO: valid pixel hits: 638481
[00:10:21.084] <TB1> INFO: Event errors: 0
[00:10:21.084] <TB1> INFO: start marker: 0
[00:10:21.084] <TB1> INFO: stop marker: 0
[00:10:21.084] <TB1> INFO: overflow: 0
[00:10:21.084] <TB1> INFO: invalid 5bit words: 0
[00:10:21.084] <TB1> INFO: invalid XOR eye diagram: 0
[00:10:21.084] <TB1> INFO: frame (failed synchr.): 0
[00:10:21.084] <TB1> INFO: idle data (no TBM trl): 0
[00:10:21.084] <TB1> INFO: no data (only TBM hdr): 0
[00:10:21.084] <TB1> INFO: TBM errors: 0
[00:10:21.084] <TB1> INFO: flawed TBM headers: 0
[00:10:21.084] <TB1> INFO: flawed TBM trailers: 0
[00:10:21.084] <TB1> INFO: event ID mismatches: 0
[00:10:21.084] <TB1> INFO: ROC errors: 0
[00:10:21.084] <TB1> INFO: missing ROC header(s): 0
[00:10:21.084] <TB1> INFO: misplaced readback start: 0
[00:10:21.084] <TB1> INFO: Pixel decoding errors: 0
[00:10:21.084] <TB1> INFO: pixel data incomplete: 0
[00:10:21.084] <TB1> INFO: pixel address: 0
[00:10:21.084] <TB1> INFO: pulse height fill bit: 0
[00:10:21.084] <TB1> INFO: buffer corruption: 0
[00:10:21.100] <TB1> INFO: Decoding statistics:
[00:10:21.100] <TB1> INFO: General information:
[00:10:21.100] <TB1> INFO: 16bit words read: 3403156
[00:10:21.100] <TB1> INFO: valid events total: 353536
[00:10:21.100] <TB1> INFO: empty events: 20421
[00:10:21.100] <TB1> INFO: valid events with pixels: 333115
[00:10:21.100] <TB1> INFO: valid pixel hits: 640970
[00:10:21.100] <TB1> INFO: Event errors: 0
[00:10:21.100] <TB1> INFO: start marker: 0
[00:10:21.100] <TB1> INFO: stop marker: 0
[00:10:21.100] <TB1> INFO: overflow: 0
[00:10:21.100] <TB1> INFO: invalid 5bit words: 0
[00:10:21.100] <TB1> INFO: invalid XOR eye diagram: 0
[00:10:21.100] <TB1> INFO: frame (failed synchr.): 0
[00:10:21.100] <TB1> INFO: idle data (no TBM trl): 0
[00:10:21.100] <TB1> INFO: no data (only TBM hdr): 0
[00:10:21.100] <TB1> INFO: TBM errors: 0
[00:10:21.100] <TB1> INFO: flawed TBM headers: 0
[00:10:21.100] <TB1> INFO: flawed TBM trailers: 0
[00:10:21.100] <TB1> INFO: event ID mismatches: 0
[00:10:21.100] <TB1> INFO: ROC errors: 0
[00:10:21.100] <TB1> INFO: missing ROC header(s): 0
[00:10:21.100] <TB1> INFO: misplaced readback start: 0
[00:10:21.100] <TB1> INFO: Pixel decoding errors: 0
[00:10:21.100] <TB1> INFO: pixel data incomplete: 0
[00:10:21.100] <TB1> INFO: pixel address: 0
[00:10:21.100] <TB1> INFO: pulse height fill bit: 0
[00:10:21.100] <TB1> INFO: buffer corruption: 0
[00:10:21.100] <TB1> INFO: enter test to run
[00:10:21.100] <TB1> INFO: test: trim80 no parameter change
[00:10:21.100] <TB1> INFO: running: trim80
[00:10:21.101] <TB1> INFO: ######################################################################
[00:10:21.101] <TB1> INFO: PixTestTrim80::doTest()
[00:10:21.101] <TB1> INFO: ######################################################################
[00:10:21.103] <TB1> INFO: ----------------------------------------------------------------------
[00:10:21.103] <TB1> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[00:10:21.103] <TB1> INFO: ----------------------------------------------------------------------
[00:10:21.164] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[00:10:21.164] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[00:10:21.178] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[00:10:21.178] <TB1> INFO: run 1 of 1
[00:10:21.456] <TB1> INFO: Expecting 5025280 events.
[00:10:49.609] <TB1> INFO: 684584 events read in total (27562ms).
[00:11:17.039] <TB1> INFO: 1364280 events read in total (54992ms).
[00:11:44.717] <TB1> INFO: 2041840 events read in total (82670ms).
[00:12:12.062] <TB1> INFO: 2718368 events read in total (110015ms).
[00:12:39.986] <TB1> INFO: 3395368 events read in total (137939ms).
[00:13:08.238] <TB1> INFO: 4071504 events read in total (166191ms).
[00:13:35.002] <TB1> INFO: 4747040 events read in total (193955ms).
[00:13:47.715] <TB1> INFO: 5025280 events read in total (205668ms).
[00:13:47.820] <TB1> INFO: Test took 206642ms.
[00:14:08.654] <TB1> INFO: ROC 0 VthrComp = 72
[00:14:08.654] <TB1> INFO: ROC 1 VthrComp = 71
[00:14:08.655] <TB1> INFO: ROC 2 VthrComp = 74
[00:14:08.655] <TB1> INFO: ROC 3 VthrComp = 81
[00:14:08.655] <TB1> INFO: ROC 4 VthrComp = 72
[00:14:08.655] <TB1> INFO: ROC 5 VthrComp = 73
[00:14:08.655] <TB1> INFO: ROC 6 VthrComp = 83
[00:14:08.655] <TB1> INFO: ROC 7 VthrComp = 81
[00:14:08.655] <TB1> INFO: ROC 8 VthrComp = 71
[00:14:08.656] <TB1> INFO: ROC 9 VthrComp = 77
[00:14:08.656] <TB1> INFO: ROC 10 VthrComp = 72
[00:14:08.656] <TB1> INFO: ROC 11 VthrComp = 71
[00:14:08.657] <TB1> INFO: ROC 12 VthrComp = 72
[00:14:08.657] <TB1> INFO: ROC 13 VthrComp = 75
[00:14:08.657] <TB1> INFO: ROC 14 VthrComp = 72
[00:14:08.657] <TB1> INFO: ROC 15 VthrComp = 81
[00:14:08.897] <TB1> INFO: Expecting 41600 events.
[00:14:12.411] <TB1> INFO: 41600 events read in total (2922ms).
[00:14:12.412] <TB1> INFO: Test took 3753ms.
[00:14:12.421] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[00:14:12.421] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[00:14:12.432] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[00:14:12.432] <TB1> INFO: run 1 of 1
[00:14:12.710] <TB1> INFO: Expecting 5025280 events.
[00:14:42.057] <TB1> INFO: 688448 events read in total (28755ms).
[00:15:09.659] <TB1> INFO: 1373928 events read in total (56357ms).
[00:15:37.406] <TB1> INFO: 2057464 events read in total (84104ms).
[00:16:05.221] <TB1> INFO: 2737080 events read in total (111919ms).
[00:16:32.976] <TB1> INFO: 3412432 events read in total (139674ms).
[00:17:00.146] <TB1> INFO: 4087064 events read in total (166844ms).
[00:17:27.984] <TB1> INFO: 4761904 events read in total (194682ms).
[00:17:38.876] <TB1> INFO: 5025280 events read in total (205574ms).
[00:17:38.949] <TB1> INFO: Test took 206518ms.
[00:18:01.460] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 108.797 for pixel 44/79 mean/min/max = 93.0522/77.2053/108.899
[00:18:01.460] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 109.097 for pixel 17/75 mean/min/max = 90.8287/72.4872/109.17
[00:18:01.461] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 116.895 for pixel 0/73 mean/min/max = 96.6718/76.0638/117.28
[00:18:01.461] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 109.825 for pixel 4/76 mean/min/max = 92.2779/74.4395/110.116
[00:18:01.462] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 110.177 for pixel 0/58 mean/min/max = 93.1955/75.8632/110.528
[00:18:01.462] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 113.069 for pixel 17/6 mean/min/max = 95.4042/77.7178/113.091
[00:18:01.463] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 116.585 for pixel 18/79 mean/min/max = 94.6279/72.6426/116.613
[00:18:01.463] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 109.467 for pixel 0/68 mean/min/max = 92.1983/74.8872/109.509
[00:18:01.464] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 105.728 for pixel 51/59 mean/min/max = 90.0734/74.289/105.858
[00:18:01.464] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 117.76 for pixel 0/45 mean/min/max = 97.0291/75.9053/118.153
[00:18:01.465] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 109.267 for pixel 0/78 mean/min/max = 93.3445/77.3997/109.289
[00:18:01.465] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 106.076 for pixel 2/52 mean/min/max = 90.3406/74.549/106.132
[00:18:01.466] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 108.374 for pixel 51/4 mean/min/max = 92.6559/76.8565/108.455
[00:18:01.466] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 109.312 for pixel 3/73 mean/min/max = 93.554/77.6604/109.448
[00:18:01.467] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 110.138 for pixel 18/10 mean/min/max = 93.1037/75.9611/110.246
[00:18:01.467] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 111.453 for pixel 1/70 mean/min/max = 92.6943/73.665/111.724
[00:18:01.468] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:18:01.557] <TB1> INFO: Expecting 411648 events.
[00:18:11.086] <TB1> INFO: 411648 events read in total (8937ms).
[00:18:11.096] <TB1> INFO: Expecting 411648 events.
[00:18:20.367] <TB1> INFO: 411648 events read in total (8867ms).
[00:18:20.383] <TB1> INFO: Expecting 411648 events.
[00:18:29.602] <TB1> INFO: 411648 events read in total (8816ms).
[00:18:29.620] <TB1> INFO: Expecting 411648 events.
[00:18:38.932] <TB1> INFO: 411648 events read in total (8909ms).
[00:18:38.949] <TB1> INFO: Expecting 411648 events.
[00:18:48.189] <TB1> INFO: 411648 events read in total (8837ms).
[00:18:48.208] <TB1> INFO: Expecting 411648 events.
[00:18:57.406] <TB1> INFO: 411648 events read in total (8795ms).
[00:18:57.437] <TB1> INFO: Expecting 411648 events.
[00:19:06.856] <TB1> INFO: 411648 events read in total (9015ms).
[00:19:06.890] <TB1> INFO: Expecting 411648 events.
[00:19:16.131] <TB1> INFO: 411648 events read in total (8838ms).
[00:19:16.166] <TB1> INFO: Expecting 411648 events.
[00:19:25.398] <TB1> INFO: 411648 events read in total (8829ms).
[00:19:25.442] <TB1> INFO: Expecting 411648 events.
[00:19:34.863] <TB1> INFO: 411648 events read in total (9018ms).
[00:19:34.927] <TB1> INFO: Expecting 411648 events.
[00:19:44.150] <TB1> INFO: 411648 events read in total (8820ms).
[00:19:44.211] <TB1> INFO: Expecting 411648 events.
[00:19:53.486] <TB1> INFO: 411648 events read in total (8872ms).
[00:19:53.557] <TB1> INFO: Expecting 411648 events.
[00:20:02.841] <TB1> INFO: 411648 events read in total (8881ms).
[00:20:02.919] <TB1> INFO: Expecting 411648 events.
[00:20:12.202] <TB1> INFO: 411648 events read in total (8880ms).
[00:20:12.257] <TB1> INFO: Expecting 411648 events.
[00:20:21.493] <TB1> INFO: 411648 events read in total (8833ms).
[00:20:21.574] <TB1> INFO: Expecting 411648 events.
[00:20:30.816] <TB1> INFO: 411648 events read in total (8839ms).
[00:20:30.894] <TB1> INFO: Test took 149427ms.
[00:20:32.568] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[00:20:32.587] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[00:20:32.587] <TB1> INFO: run 1 of 1
[00:20:32.826] <TB1> INFO: Expecting 5025280 events.
[00:21:00.685] <TB1> INFO: 670344 events read in total (27267ms).
[00:21:28.303] <TB1> INFO: 1338056 events read in total (54885ms).
[00:21:55.638] <TB1> INFO: 2004736 events read in total (82220ms).
[00:22:23.747] <TB1> INFO: 2668272 events read in total (110329ms).
[00:22:51.241] <TB1> INFO: 3327328 events read in total (137823ms).
[00:23:18.816] <TB1> INFO: 3984968 events read in total (165398ms).
[00:23:46.094] <TB1> INFO: 4641208 events read in total (192676ms).
[00:24:02.721] <TB1> INFO: 5025280 events read in total (209303ms).
[00:24:02.796] <TB1> INFO: Test took 210210ms.
[00:24:28.862] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 52.696992 .. 103.680128
[00:24:29.102] <TB1> INFO: Expecting 208000 events.
[00:24:38.868] <TB1> INFO: 208000 events read in total (9174ms).
[00:24:38.868] <TB1> INFO: Test took 10004ms.
[00:24:38.937] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 42 .. 113 (-1/-1) hits flags = 528 (plus default)
[00:24:38.951] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[00:24:38.951] <TB1> INFO: run 1 of 1
[00:24:39.229] <TB1> INFO: Expecting 2396160 events.
[00:25:07.951] <TB1> INFO: 684536 events read in total (28130ms).
[00:25:35.743] <TB1> INFO: 1365792 events read in total (55923ms).
[00:26:03.446] <TB1> INFO: 2041128 events read in total (83625ms).
[00:26:18.412] <TB1> INFO: 2396160 events read in total (98591ms).
[00:26:18.471] <TB1> INFO: Test took 99521ms.
[00:26:37.295] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 61.893566 .. 94.536571
[00:26:37.535] <TB1> INFO: Expecting 208000 events.
[00:26:47.469] <TB1> INFO: 208000 events read in total (9343ms).
[00:26:47.471] <TB1> INFO: Test took 10174ms.
[00:26:47.519] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 51 .. 104 (-1/-1) hits flags = 528 (plus default)
[00:26:47.537] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[00:26:47.538] <TB1> INFO: run 1 of 1
[00:26:47.816] <TB1> INFO: Expecting 1797120 events.
[00:27:17.667] <TB1> INFO: 684224 events read in total (29254ms).
[00:27:45.736] <TB1> INFO: 1368088 events read in total (57323ms).
[00:28:03.731] <TB1> INFO: 1797120 events read in total (75318ms).
[00:28:03.783] <TB1> INFO: Test took 76246ms.
[00:28:24.649] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 65.888969 .. 90.340988
[00:28:24.922] <TB1> INFO: Expecting 208000 events.
[00:28:34.564] <TB1> INFO: 208000 events read in total (9050ms).
[00:28:34.565] <TB1> INFO: Test took 9915ms.
[00:28:34.615] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 55 .. 100 (-1/-1) hits flags = 528 (plus default)
[00:28:34.628] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[00:28:34.628] <TB1> INFO: run 1 of 1
[00:28:34.906] <TB1> INFO: Expecting 1530880 events.
[00:29:03.709] <TB1> INFO: 687408 events read in total (28211ms).
[00:29:32.573] <TB1> INFO: 1374264 events read in total (57075ms).
[00:29:39.344] <TB1> INFO: 1530880 events read in total (63847ms).
[00:29:39.391] <TB1> INFO: Test took 64764ms.
[00:29:56.641] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 67.214560 .. 89.373977
[00:29:56.886] <TB1> INFO: Expecting 208000 events.
[00:30:07.016] <TB1> INFO: 208000 events read in total (9538ms).
[00:30:07.017] <TB1> INFO: Test took 10374ms.
[00:30:07.066] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 57 .. 99 (-1/-1) hits flags = 528 (plus default)
[00:30:07.078] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[00:30:07.078] <TB1> INFO: run 1 of 1
[00:30:07.357] <TB1> INFO: Expecting 1431040 events.
[00:30:36.613] <TB1> INFO: 686176 events read in total (28664ms).
[00:31:05.328] <TB1> INFO: 1371664 events read in total (57379ms).
[00:31:08.256] <TB1> INFO: 1431040 events read in total (60307ms).
[00:31:08.296] <TB1> INFO: Test took 61218ms.
[00:31:25.298] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[00:31:25.298] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[00:31:25.311] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[00:31:25.311] <TB1> INFO: run 1 of 1
[00:31:25.548] <TB1> INFO: Expecting 1364480 events.
[00:31:54.653] <TB1> INFO: 668808 events read in total (28514ms).
[00:32:23.114] <TB1> INFO: 1337136 events read in total (56975ms).
[00:32:24.711] <TB1> INFO: 1364480 events read in total (58572ms).
[00:32:24.738] <TB1> INFO: Test took 59428ms.
[00:32:42.505] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C0.dat
[00:32:42.505] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C1.dat
[00:32:42.505] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C2.dat
[00:32:42.505] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C3.dat
[00:32:42.505] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C4.dat
[00:32:42.505] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C5.dat
[00:32:42.505] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C6.dat
[00:32:42.505] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C7.dat
[00:32:42.505] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C8.dat
[00:32:42.506] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C9.dat
[00:32:42.506] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C10.dat
[00:32:42.506] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C11.dat
[00:32:42.506] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C12.dat
[00:32:42.506] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C13.dat
[00:32:42.506] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C14.dat
[00:32:42.506] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C15.dat
[00:32:42.506] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C0.dat
[00:32:42.513] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C1.dat
[00:32:42.519] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C2.dat
[00:32:42.525] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C3.dat
[00:32:42.531] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C4.dat
[00:32:42.537] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C5.dat
[00:32:42.544] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C6.dat
[00:32:42.550] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C7.dat
[00:32:42.556] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C8.dat
[00:32:42.562] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C9.dat
[00:32:42.569] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C10.dat
[00:32:42.575] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C11.dat
[00:32:42.581] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C12.dat
[00:32:42.587] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C13.dat
[00:32:42.594] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C14.dat
[00:32:42.600] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1059_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C15.dat
[00:32:42.606] <TB1> INFO: PixTestTrim80::trimTest() done
[00:32:42.607] <TB1> INFO: vtrim: 93 93 104 102 87 108 105 103 76 110 85 86 83 90 107 105
[00:32:42.607] <TB1> INFO: vthrcomp: 72 71 74 81 72 73 83 81 71 77 72 71 72 75 72 81
[00:32:42.607] <TB1> INFO: vcal mean: 79.99 79.97 80.01 79.97 80.04 80.02 80.02 79.99 80.01 80.00 80.01 80.01 80.02 80.03 80.02 79.96
[00:32:42.607] <TB1> INFO: vcal RMS: 0.74 0.83 0.83 0.78 0.72 0.80 0.87 0.75 0.75 0.85 0.73 0.75 0.72 0.70 0.77 0.81
[00:32:42.607] <TB1> INFO: bits mean: 9.30 10.68 9.12 9.82 9.37 9.79 9.61 10.12 9.92 9.35 9.26 10.34 9.39 9.23 10.06 9.95
[00:32:42.607] <TB1> INFO: bits RMS: 2.43 2.49 2.48 2.51 2.55 2.10 2.66 2.30 2.63 2.39 2.41 2.38 2.45 2.36 2.25 2.54
[00:32:42.614] <TB1> INFO: ----------------------------------------------------------------------
[00:32:42.614] <TB1> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[00:32:42.614] <TB1> INFO: ----------------------------------------------------------------------
[00:32:42.617] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[00:32:42.630] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[00:32:42.631] <TB1> INFO: run 1 of 1
[00:32:42.868] <TB1> INFO: Expecting 4160000 events.
[00:33:15.449] <TB1> INFO: 766845 events read in total (31989ms).
[00:33:48.425] <TB1> INFO: 1526585 events read in total (64965ms).
[00:34:21.286] <TB1> INFO: 2279445 events read in total (97826ms).
[00:34:53.659] <TB1> INFO: 3027895 events read in total (130199ms).
[00:35:25.276] <TB1> INFO: 3775405 events read in total (161816ms).
[00:35:41.930] <TB1> INFO: 4160000 events read in total (178470ms).
[00:35:42.025] <TB1> INFO: Test took 179394ms.
[00:36:08.217] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 222 (-1/-1) hits flags = 528 (plus default)
[00:36:08.230] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[00:36:08.231] <TB1> INFO: run 1 of 1
[00:36:08.467] <TB1> INFO: Expecting 4638400 events.
[00:36:40.467] <TB1> INFO: 712815 events read in total (31409ms).
[00:37:11.219] <TB1> INFO: 1419660 events read in total (62161ms).
[00:37:42.301] <TB1> INFO: 2124055 events read in total (93243ms).
[00:38:13.190] <TB1> INFO: 2823490 events read in total (124132ms).
[00:38:44.401] <TB1> INFO: 3521265 events read in total (155343ms).
[00:39:15.706] <TB1> INFO: 4218315 events read in total (186648ms).
[00:39:34.782] <TB1> INFO: 4638400 events read in total (205724ms).
[00:39:34.878] <TB1> INFO: Test took 206647ms.
[00:40:03.293] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 219 (-1/-1) hits flags = 528 (plus default)
[00:40:03.306] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[00:40:03.306] <TB1> INFO: run 1 of 1
[00:40:03.544] <TB1> INFO: Expecting 4576000 events.
[00:40:35.199] <TB1> INFO: 715930 events read in total (31063ms).
[00:41:07.185] <TB1> INFO: 1426420 events read in total (63049ms).
[00:41:38.708] <TB1> INFO: 2134575 events read in total (94572ms).
[00:42:10.088] <TB1> INFO: 2836970 events read in total (125952ms).
[00:42:41.735] <TB1> INFO: 3537760 events read in total (157599ms).
[00:43:13.754] <TB1> INFO: 4238610 events read in total (189618ms).
[00:43:29.028] <TB1> INFO: 4576000 events read in total (204892ms).
[00:43:29.113] <TB1> INFO: Test took 205806ms.
[00:43:55.061] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 218 (-1/-1) hits flags = 528 (plus default)
[00:43:55.074] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[00:43:55.074] <TB1> INFO: run 1 of 1
[00:43:55.314] <TB1> INFO: Expecting 4555200 events.
[00:44:27.456] <TB1> INFO: 716825 events read in total (31550ms).
[00:44:58.674] <TB1> INFO: 1428255 events read in total (62769ms).
[00:45:30.328] <TB1> INFO: 2137130 events read in total (94422ms).
[00:46:02.064] <TB1> INFO: 2840785 events read in total (126158ms).
[00:46:34.153] <TB1> INFO: 3543145 events read in total (158247ms).
[00:47:06.021] <TB1> INFO: 4244705 events read in total (190115ms).
[00:47:20.379] <TB1> INFO: 4555200 events read in total (204473ms).
[00:47:20.501] <TB1> INFO: Test took 205428ms.
[00:47:50.400] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 215 (-1/-1) hits flags = 528 (plus default)
[00:47:50.413] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[00:47:50.413] <TB1> INFO: run 1 of 1
[00:47:50.650] <TB1> INFO: Expecting 4492800 events.
[00:48:23.937] <TB1> INFO: 720350 events read in total (32696ms).
[00:48:56.726] <TB1> INFO: 1434880 events read in total (65485ms).
[00:49:28.404] <TB1> INFO: 2146805 events read in total (97163ms).
[00:49:58.668] <TB1> INFO: 2853355 events read in total (127427ms).
[00:50:28.588] <TB1> INFO: 3558840 events read in total (157347ms).
[00:50:58.590] <TB1> INFO: 4264145 events read in total (187349ms).
[00:51:08.529] <TB1> INFO: 4492800 events read in total (197288ms).
[00:51:08.773] <TB1> INFO: Test took 198359ms.
[00:51:32.438] <TB1> INFO: PixTestTrim80::trimBitTest() done
[00:51:32.439] <TB1> INFO: PixTestTrim80::doTest() done, duration: 2471 seconds
[00:51:33.046] <TB1> INFO: enter test to run
[00:51:33.046] <TB1> INFO: test: exit no parameter change
[00:51:33.221] <TB1> QUIET: Connection to board 154 closed.
[00:51:33.222] <TB1> INFO: pXar: this is the end, my friend