[17:01:09.491] <TB2> INFO: *** Welcome to pxar ***
[17:01:09.491] <TB2> INFO: *** Today: 2016/10/24
[17:01:09.498] <TB2> INFO: *** Version: c8ba-dirty
[17:01:09.498] <TB2> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters_C15.dat
[17:01:09.499] <TB2> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//tbmParameters_C1b.dat
[17:01:09.499] <TB2> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//defaultMaskFile.dat
[17:01:09.499] <TB2> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//trimParameters_C15.dat
[17:01:09.591] <TB2> INFO: clk: 4
[17:01:09.591] <TB2> INFO: ctr: 4
[17:01:09.591] <TB2> INFO: sda: 19
[17:01:09.591] <TB2> INFO: tin: 9
[17:01:09.591] <TB2> INFO: level: 15
[17:01:09.591] <TB2> INFO: triggerdelay: 0
[17:01:09.591] <TB2> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[17:01:09.592] <TB2> INFO: Log level: INFO
[17:01:09.602] <TB2> INFO: Found DTB DTB_WXC55Z
[17:01:09.613] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[17:01:09.615] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[17:01:09.617] <TB2> INFO: RPC call hashes of host and DTB match: 486171790
[17:01:11.155] <TB2> INFO: DUT info:
[17:01:11.155] <TB2> INFO: The DUT currently contains the following objects:
[17:01:11.155] <TB2> INFO: 4 TBM Cores tbm10c (4 ON)
[17:01:11.155] <TB2> INFO: TBM Core alpha (0): 7 registers set
[17:01:11.155] <TB2> INFO: TBM Core beta (1): 7 registers set
[17:01:11.155] <TB2> INFO: TBM Core alpha (2): 7 registers set
[17:01:11.155] <TB2> INFO: TBM Core beta (3): 7 registers set
[17:01:11.155] <TB2> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[17:01:11.155] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[17:01:11.155] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[17:01:11.155] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[17:01:11.155] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[17:01:11.155] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[17:01:11.155] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[17:01:11.155] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[17:01:11.155] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[17:01:11.155] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[17:01:11.155] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[17:01:11.155] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[17:01:11.155] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[17:01:11.155] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[17:01:11.155] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[17:01:11.155] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[17:01:11.155] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[17:01:11.556] <TB2> INFO: enter 'restricted' command line mode
[17:01:11.556] <TB2> INFO: enter test to run
[17:01:11.556] <TB2> INFO: test: pretest no parameter change
[17:01:11.556] <TB2> INFO: running: pretest
[17:01:12.097] <TB2> INFO: ######################################################################
[17:01:12.097] <TB2> INFO: PixTestPretest::doTest()
[17:01:12.097] <TB2> INFO: ######################################################################
[17:01:12.098] <TB2> INFO: ----------------------------------------------------------------------
[17:01:12.098] <TB2> INFO: PixTestPretest::programROC()
[17:01:12.098] <TB2> INFO: ----------------------------------------------------------------------
[17:01:30.111] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[17:01:30.111] <TB2> INFO: IA differences per ROC: 20.1 19.3 19.3 16.9 16.9 16.9 16.9 19.3 17.7 18.5 19.3 19.3 20.9 17.7 18.5 20.1
[17:01:30.148] <TB2> INFO: ----------------------------------------------------------------------
[17:01:30.148] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[17:01:30.148] <TB2> INFO: ----------------------------------------------------------------------
[17:01:51.395] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 389.1 mA = 24.3188 mA/ROC
[17:01:51.395] <TB2> INFO: i(loss) [mA/ROC]: 20.9 20.9 20.9 19.3 20.1 20.1 20.1 19.3 20.1 20.9 20.9 20.1 20.9 20.1 19.3 19.3
[17:01:51.425] <TB2> INFO: ----------------------------------------------------------------------
[17:01:51.425] <TB2> INFO: PixTestPretest::findTiming()
[17:01:51.425] <TB2> INFO: ----------------------------------------------------------------------
[17:01:51.425] <TB2> INFO: PixTestCmd::init()

[17:02:22.671] <TB2> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[17:02:22.672] <TB2> INFO: (success/tries = 100/100), width = 3
[17:02:24.167] <TB2> INFO: ----------------------------------------------------------------------
[17:02:24.167] <TB2> INFO: PixTestPretest::findWorkingPixel()
[17:02:24.167] <TB2> INFO: ----------------------------------------------------------------------
[17:02:24.259] <TB2> INFO: Expecting 231680 events.
[17:02:33.870] <TB2> INFO: 231680 events read in total (9020ms).
[17:02:33.877] <TB2> INFO: Test took 9708ms.
[17:02:34.121] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[17:02:34.150] <TB2> INFO: ----------------------------------------------------------------------
[17:02:34.150] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[17:02:34.150] <TB2> INFO: ----------------------------------------------------------------------
[17:02:34.243] <TB2> INFO: Expecting 231680 events.
[17:02:43.913] <TB2> INFO: 231680 events read in total (9078ms).
[17:02:43.922] <TB2> INFO: Test took 9769ms.
[17:02:44.184] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[17:02:44.184] <TB2> INFO: CalDel: 97 86 91 73 95 95 117 117 102 88 103 109 107 104 108 111
[17:02:44.184] <TB2> INFO: VthrComp: 51 51 51 51 51 53 51 51 51 57 51 51 51 51 51 51
[17:02:44.187] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters_C0.dat
[17:02:44.187] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters_C1.dat
[17:02:44.187] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters_C2.dat
[17:02:44.187] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters_C3.dat
[17:02:44.187] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters_C4.dat
[17:02:44.187] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters_C5.dat
[17:02:44.187] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters_C6.dat
[17:02:44.188] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters_C7.dat
[17:02:44.188] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters_C8.dat
[17:02:44.188] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters_C9.dat
[17:02:44.188] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters_C10.dat
[17:02:44.188] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters_C11.dat
[17:02:44.188] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters_C12.dat
[17:02:44.188] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters_C13.dat
[17:02:44.188] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters_C14.dat
[17:02:44.188] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters_C15.dat
[17:02:44.189] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//tbmParameters_C0a.dat
[17:02:44.189] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//tbmParameters_C0b.dat
[17:02:44.189] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//tbmParameters_C1a.dat
[17:02:44.189] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//tbmParameters_C1b.dat
[17:02:44.189] <TB2> INFO: PixTestPretest::doTest() done, duration: 92 seconds
[17:02:44.284] <TB2> INFO: enter test to run
[17:02:44.284] <TB2> INFO: test: FullTest no parameter change
[17:02:44.284] <TB2> INFO: running: fulltest
[17:02:44.284] <TB2> INFO: ######################################################################
[17:02:44.284] <TB2> INFO: PixTestFullTest::doTest()
[17:02:44.284] <TB2> INFO: ######################################################################
[17:02:44.285] <TB2> INFO: ######################################################################
[17:02:44.285] <TB2> INFO: PixTestAlive::doTest()
[17:02:44.285] <TB2> INFO: ######################################################################
[17:02:44.286] <TB2> INFO: ----------------------------------------------------------------------
[17:02:44.286] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:02:44.286] <TB2> INFO: ----------------------------------------------------------------------
[17:02:44.532] <TB2> INFO: Expecting 41600 events.
[17:02:48.146] <TB2> INFO: 41600 events read in total (3022ms).
[17:02:48.147] <TB2> INFO: Test took 3859ms.
[17:02:48.376] <TB2> INFO: PixTestAlive::aliveTest() done
[17:02:48.376] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[17:02:48.377] <TB2> INFO: ----------------------------------------------------------------------
[17:02:48.377] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:02:48.377] <TB2> INFO: ----------------------------------------------------------------------
[17:02:48.613] <TB2> INFO: Expecting 41600 events.
[17:02:51.532] <TB2> INFO: 41600 events read in total (2327ms).
[17:02:51.532] <TB2> INFO: Test took 3154ms.
[17:02:51.532] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[17:02:51.772] <TB2> INFO: PixTestAlive::maskTest() done
[17:02:51.772] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[17:02:51.773] <TB2> INFO: ----------------------------------------------------------------------
[17:02:51.773] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:02:51.773] <TB2> INFO: ----------------------------------------------------------------------
[17:02:52.007] <TB2> INFO: Expecting 41600 events.
[17:02:55.536] <TB2> INFO: 41600 events read in total (2937ms).
[17:02:55.537] <TB2> INFO: Test took 3763ms.
[17:02:55.764] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[17:02:55.764] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[17:02:55.764] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[17:02:55.764] <TB2> INFO: Decoding statistics:
[17:02:55.764] <TB2> INFO: General information:
[17:02:55.764] <TB2> INFO: 16bit words read: 0
[17:02:55.764] <TB2> INFO: valid events total: 0
[17:02:55.764] <TB2> INFO: empty events: 0
[17:02:55.764] <TB2> INFO: valid events with pixels: 0
[17:02:55.764] <TB2> INFO: valid pixel hits: 0
[17:02:55.764] <TB2> INFO: Event errors: 0
[17:02:55.764] <TB2> INFO: start marker: 0
[17:02:55.764] <TB2> INFO: stop marker: 0
[17:02:55.764] <TB2> INFO: overflow: 0
[17:02:55.764] <TB2> INFO: invalid 5bit words: 0
[17:02:55.764] <TB2> INFO: invalid XOR eye diagram: 0
[17:02:55.764] <TB2> INFO: frame (failed synchr.): 0
[17:02:55.764] <TB2> INFO: idle data (no TBM trl): 0
[17:02:55.764] <TB2> INFO: no data (only TBM hdr): 0
[17:02:55.764] <TB2> INFO: TBM errors: 0
[17:02:55.764] <TB2> INFO: flawed TBM headers: 0
[17:02:55.764] <TB2> INFO: flawed TBM trailers: 0
[17:02:55.764] <TB2> INFO: event ID mismatches: 0
[17:02:55.764] <TB2> INFO: ROC errors: 0
[17:02:55.764] <TB2> INFO: missing ROC header(s): 0
[17:02:55.764] <TB2> INFO: misplaced readback start: 0
[17:02:55.764] <TB2> INFO: Pixel decoding errors: 0
[17:02:55.764] <TB2> INFO: pixel data incomplete: 0
[17:02:55.764] <TB2> INFO: pixel address: 0
[17:02:55.764] <TB2> INFO: pulse height fill bit: 0
[17:02:55.764] <TB2> INFO: buffer corruption: 0
[17:02:55.771] <TB2> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C15.dat
[17:02:55.772] <TB2> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//phCalibrationFitErr_C15.dat

[17:02:55.772] <TB2> INFO: ######################################################################
[17:02:55.772] <TB2> INFO: PixTestReadback::doTest()
[17:02:55.772] <TB2> INFO: ######################################################################
[17:02:55.772] <TB2> INFO: ----------------------------------------------------------------------
[17:02:55.772] <TB2> INFO: PixTestReadback::CalibrateVd()
[17:02:55.772] <TB2> INFO: ----------------------------------------------------------------------
[17:03:05.742] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C0.dat
[17:03:05.742] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C1.dat
[17:03:05.742] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C2.dat
[17:03:05.742] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C3.dat
[17:03:05.742] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C4.dat
[17:03:05.742] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C5.dat
[17:03:05.742] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C6.dat
[17:03:05.743] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C7.dat
[17:03:05.743] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C8.dat
[17:03:05.743] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C9.dat
[17:03:05.743] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C10.dat
[17:03:05.743] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C11.dat
[17:03:05.743] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C12.dat
[17:03:05.743] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C13.dat
[17:03:05.743] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C14.dat
[17:03:05.743] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C15.dat
[17:03:05.770] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[17:03:05.770] <TB2> INFO: ----------------------------------------------------------------------
[17:03:05.770] <TB2> INFO: PixTestReadback::CalibrateVa()
[17:03:05.770] <TB2> INFO: ----------------------------------------------------------------------
[17:03:15.662] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C0.dat
[17:03:15.662] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C1.dat
[17:03:15.662] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C2.dat
[17:03:15.662] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C3.dat
[17:03:15.662] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C4.dat
[17:03:15.662] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C5.dat
[17:03:15.662] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C6.dat
[17:03:15.662] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C7.dat
[17:03:15.662] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C8.dat
[17:03:15.662] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C9.dat
[17:03:15.662] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C10.dat
[17:03:15.662] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C11.dat
[17:03:15.663] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C12.dat
[17:03:15.663] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C13.dat
[17:03:15.663] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C14.dat
[17:03:15.663] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C15.dat
[17:03:15.691] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[17:03:15.691] <TB2> INFO: ----------------------------------------------------------------------
[17:03:15.691] <TB2> INFO: PixTestReadback::readbackVbg()
[17:03:15.691] <TB2> INFO: ----------------------------------------------------------------------
[17:03:23.336] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[17:03:23.336] <TB2> INFO: ----------------------------------------------------------------------
[17:03:23.336] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[17:03:23.336] <TB2> INFO: ----------------------------------------------------------------------
[17:03:23.336] <TB2> INFO: Vbg will be calibrated using Vd calibration
[17:03:23.336] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 154.7calibrated Vbg = 1.1662 :::*/*/*/*/
[17:03:23.337] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 152.2calibrated Vbg = 1.16089 :::*/*/*/*/
[17:03:23.337] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 149.2calibrated Vbg = 1.15233 :::*/*/*/*/
[17:03:23.337] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 152.7calibrated Vbg = 1.15659 :::*/*/*/*/
[17:03:23.337] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 158.9calibrated Vbg = 1.1506 :::*/*/*/*/
[17:03:23.337] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 163.8calibrated Vbg = 1.16368 :::*/*/*/*/
[17:03:23.337] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 158.3calibrated Vbg = 1.16358 :::*/*/*/*/
[17:03:23.337] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 166.7calibrated Vbg = 1.16218 :::*/*/*/*/
[17:03:23.337] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 147.9calibrated Vbg = 1.15271 :::*/*/*/*/
[17:03:23.337] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 156.7calibrated Vbg = 1.15461 :::*/*/*/*/
[17:03:23.337] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 157.2calibrated Vbg = 1.15297 :::*/*/*/*/
[17:03:23.337] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 154.1calibrated Vbg = 1.14058 :::*/*/*/*/
[17:03:23.337] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 153.7calibrated Vbg = 1.15079 :::*/*/*/*/
[17:03:23.337] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 146calibrated Vbg = 1.15504 :::*/*/*/*/
[17:03:23.337] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 157.6calibrated Vbg = 1.16059 :::*/*/*/*/
[17:03:23.337] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 148.6calibrated Vbg = 1.16162 :::*/*/*/*/
[17:03:23.338] <TB2> INFO: ----------------------------------------------------------------------
[17:03:23.338] <TB2> INFO: PixTestReadback::CalibrateIa()
[17:03:23.338] <TB2> INFO: ----------------------------------------------------------------------
[17:06:03.674] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C0.dat
[17:06:03.674] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C1.dat
[17:06:03.674] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C2.dat
[17:06:03.674] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C3.dat
[17:06:03.675] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C4.dat
[17:06:03.675] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C5.dat
[17:06:03.675] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C6.dat
[17:06:03.675] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C7.dat
[17:06:03.675] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C8.dat
[17:06:03.675] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C9.dat
[17:06:03.675] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C10.dat
[17:06:03.675] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C11.dat
[17:06:03.675] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C12.dat
[17:06:03.675] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C13.dat
[17:06:03.675] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C14.dat
[17:06:03.675] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//readbackCal_C15.dat
[17:06:03.703] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[17:06:03.705] <TB2> INFO: PixTestReadback::doTest() done
[17:06:03.705] <TB2> INFO: Decoding statistics:
[17:06:03.705] <TB2> INFO: General information:
[17:06:03.705] <TB2> INFO: 16bit words read: 1536
[17:06:03.705] <TB2> INFO: valid events total: 256
[17:06:03.705] <TB2> INFO: empty events: 256
[17:06:03.705] <TB2> INFO: valid events with pixels: 0
[17:06:03.705] <TB2> INFO: valid pixel hits: 0
[17:06:03.705] <TB2> INFO: Event errors: 0
[17:06:03.705] <TB2> INFO: start marker: 0
[17:06:03.705] <TB2> INFO: stop marker: 0
[17:06:03.705] <TB2> INFO: overflow: 0
[17:06:03.705] <TB2> INFO: invalid 5bit words: 0
[17:06:03.705] <TB2> INFO: invalid XOR eye diagram: 0
[17:06:03.705] <TB2> INFO: frame (failed synchr.): 0
[17:06:03.705] <TB2> INFO: idle data (no TBM trl): 0
[17:06:03.705] <TB2> INFO: no data (only TBM hdr): 0
[17:06:03.705] <TB2> INFO: TBM errors: 0
[17:06:03.705] <TB2> INFO: flawed TBM headers: 0
[17:06:03.705] <TB2> INFO: flawed TBM trailers: 0
[17:06:03.705] <TB2> INFO: event ID mismatches: 0
[17:06:03.705] <TB2> INFO: ROC errors: 0
[17:06:03.705] <TB2> INFO: missing ROC header(s): 0
[17:06:03.705] <TB2> INFO: misplaced readback start: 0
[17:06:03.705] <TB2> INFO: Pixel decoding errors: 0
[17:06:03.705] <TB2> INFO: pixel data incomplete: 0
[17:06:03.705] <TB2> INFO: pixel address: 0
[17:06:03.705] <TB2> INFO: pulse height fill bit: 0
[17:06:03.705] <TB2> INFO: buffer corruption: 0
[17:06:03.741] <TB2> INFO: ######################################################################
[17:06:03.741] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[17:06:03.741] <TB2> INFO: ######################################################################
[17:06:03.744] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[17:06:03.758] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[17:06:03.759] <TB2> INFO: run 1 of 1
[17:06:03.996] <TB2> INFO: Expecting 3120000 events.
[17:06:35.075] <TB2> INFO: 664155 events read in total (30487ms).











[17:07:05.222] <TB2> INFO: 1325130 events read in total (60634ms).











[17:07:36.149] <TB2> INFO: 1985575 events read in total (91561ms).











[17:08:06.775] <TB2> INFO: 2646080 events read in total (122187ms).











[17:08:28.631] <TB2> INFO: 3120000 events read in total (144043ms).
[17:08:28.702] <TB2> INFO: Test took 144944ms.
[17:08:51.139] <TB2> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 167 seconds
[17:08:51.139] <TB2> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[17:08:51.139] <TB2> INFO: separation cut (per ROC): 106 108 110 106 97 111 100 106 109 114 107 113 110 100 104 108
[17:08:51.139] <TB2> INFO: Decoding statistics:
[17:08:51.139] <TB2> INFO: General information:
[17:08:51.139] <TB2> INFO: 16bit words read: 0
[17:08:51.139] <TB2> INFO: valid events total: 0
[17:08:51.139] <TB2> INFO: empty events: 0
[17:08:51.139] <TB2> INFO: valid events with pixels: 0
[17:08:51.139] <TB2> INFO: valid pixel hits: 0
[17:08:51.139] <TB2> INFO: Event errors: 0
[17:08:51.139] <TB2> INFO: start marker: 0
[17:08:51.139] <TB2> INFO: stop marker: 0
[17:08:51.139] <TB2> INFO: overflow: 0
[17:08:51.139] <TB2> INFO: invalid 5bit words: 0
[17:08:51.139] <TB2> INFO: invalid XOR eye diagram: 0
[17:08:51.139] <TB2> INFO: frame (failed synchr.): 0
[17:08:51.139] <TB2> INFO: idle data (no TBM trl): 0
[17:08:51.139] <TB2> INFO: no data (only TBM hdr): 0
[17:08:51.139] <TB2> INFO: TBM errors: 0
[17:08:51.139] <TB2> INFO: flawed TBM headers: 0
[17:08:51.139] <TB2> INFO: flawed TBM trailers: 0
[17:08:51.139] <TB2> INFO: event ID mismatches: 0
[17:08:51.139] <TB2> INFO: ROC errors: 0
[17:08:51.139] <TB2> INFO: missing ROC header(s): 0
[17:08:51.139] <TB2> INFO: misplaced readback start: 0
[17:08:51.139] <TB2> INFO: Pixel decoding errors: 0
[17:08:51.139] <TB2> INFO: pixel data incomplete: 0
[17:08:51.139] <TB2> INFO: pixel address: 0
[17:08:51.139] <TB2> INFO: pulse height fill bit: 0
[17:08:51.139] <TB2> INFO: buffer corruption: 0
[17:08:51.174] <TB2> INFO: ######################################################################
[17:08:51.174] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[17:08:51.174] <TB2> INFO: ######################################################################
[17:08:51.174] <TB2> INFO: ----------------------------------------------------------------------
[17:08:51.174] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[17:08:51.174] <TB2> INFO: ----------------------------------------------------------------------
[17:08:51.174] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[17:08:51.183] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[17:08:51.183] <TB2> INFO: run 1 of 1
[17:08:51.416] <TB2> INFO: Expecting 36608000 events.
[17:09:15.449] <TB2> INFO: 688300 events read in total (23441ms).
[17:09:38.851] <TB2> INFO: 1357950 events read in total (46843ms).
[17:10:02.341] <TB2> INFO: 2031900 events read in total (70333ms).
[17:10:25.402] <TB2> INFO: 2701950 events read in total (93394ms).
[17:10:48.694] <TB2> INFO: 3374850 events read in total (116686ms).
[17:11:11.930] <TB2> INFO: 4042000 events read in total (139922ms).
[17:11:34.912] <TB2> INFO: 4711750 events read in total (162904ms).
[17:11:57.944] <TB2> INFO: 5379250 events read in total (185936ms).
[17:12:21.329] <TB2> INFO: 6048000 events read in total (209321ms).
[17:12:44.227] <TB2> INFO: 6714050 events read in total (232219ms).
[17:13:07.044] <TB2> INFO: 7382150 events read in total (255036ms).
[17:13:30.072] <TB2> INFO: 8050800 events read in total (278064ms).
[17:13:53.095] <TB2> INFO: 8719350 events read in total (301087ms).
[17:14:16.308] <TB2> INFO: 9388350 events read in total (324300ms).
[17:14:39.168] <TB2> INFO: 10056250 events read in total (347160ms).
[17:15:02.479] <TB2> INFO: 10725800 events read in total (370471ms).
[17:15:25.648] <TB2> INFO: 11393900 events read in total (393640ms).
[17:15:48.738] <TB2> INFO: 12059950 events read in total (416730ms).
[17:16:11.974] <TB2> INFO: 12723200 events read in total (439966ms).
[17:16:35.142] <TB2> INFO: 13391650 events read in total (463134ms).
[17:16:58.038] <TB2> INFO: 14054850 events read in total (486030ms).
[17:17:21.323] <TB2> INFO: 14722200 events read in total (509315ms).
[17:17:44.209] <TB2> INFO: 15386800 events read in total (532201ms).
[17:18:07.473] <TB2> INFO: 16051400 events read in total (555465ms).
[17:18:30.648] <TB2> INFO: 16715600 events read in total (578640ms).
[17:18:54.023] <TB2> INFO: 17378850 events read in total (602015ms).
[17:19:17.363] <TB2> INFO: 18043850 events read in total (625355ms).
[17:19:40.434] <TB2> INFO: 18707600 events read in total (648426ms).
[17:20:03.018] <TB2> INFO: 19370550 events read in total (671010ms).
[17:20:26.365] <TB2> INFO: 20032950 events read in total (694357ms).
[17:20:49.717] <TB2> INFO: 20695150 events read in total (717709ms).
[17:21:12.948] <TB2> INFO: 21356300 events read in total (740940ms).
[17:21:36.266] <TB2> INFO: 22018500 events read in total (764258ms).
[17:21:59.105] <TB2> INFO: 22678250 events read in total (787097ms).
[17:22:22.265] <TB2> INFO: 23340600 events read in total (810257ms).
[17:22:44.754] <TB2> INFO: 23998850 events read in total (832746ms).
[17:23:07.923] <TB2> INFO: 24662300 events read in total (855915ms).
[17:23:30.661] <TB2> INFO: 25321150 events read in total (878653ms).
[17:23:53.730] <TB2> INFO: 25982550 events read in total (901722ms).
[17:24:16.813] <TB2> INFO: 26641250 events read in total (924805ms).
[17:24:39.756] <TB2> INFO: 27303450 events read in total (947748ms).
[17:25:02.842] <TB2> INFO: 27962750 events read in total (970834ms).
[17:25:25.533] <TB2> INFO: 28622750 events read in total (993525ms).
[17:25:48.362] <TB2> INFO: 29281050 events read in total (1016354ms).
[17:26:10.814] <TB2> INFO: 29939250 events read in total (1038806ms).
[17:26:34.130] <TB2> INFO: 30600050 events read in total (1062122ms).
[17:26:57.190] <TB2> INFO: 31257900 events read in total (1085182ms).
[17:27:20.178] <TB2> INFO: 31916100 events read in total (1108170ms).
[17:27:43.154] <TB2> INFO: 32573650 events read in total (1131146ms).
[17:28:06.262] <TB2> INFO: 33234600 events read in total (1154254ms).
[17:28:29.405] <TB2> INFO: 33894450 events read in total (1177397ms).
[17:28:52.303] <TB2> INFO: 34559050 events read in total (1200295ms).
[17:29:15.404] <TB2> INFO: 35219350 events read in total (1223396ms).
[17:29:38.315] <TB2> INFO: 35881550 events read in total (1246307ms).
[17:30:01.417] <TB2> INFO: 36551750 events read in total (1269409ms).
[17:30:03.837] <TB2> INFO: 36608000 events read in total (1271829ms).
[17:30:03.909] <TB2> INFO: Test took 1272725ms.
[17:30:04.451] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:30:06.557] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:30:08.559] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:30:10.618] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:30:12.296] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:30:14.090] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:30:16.514] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:30:18.986] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:30:21.485] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:30:23.852] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:30:25.309] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:30:26.733] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:30:28.211] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:30:29.766] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:30:31.611] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:30:33.084] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:30:34.598] <TB2> INFO: PixTestScurves::scurves() done
[17:30:34.598] <TB2> INFO: Vcal mean: 121.24 121.91 114.26 111.56 109.98 119.80 113.17 111.85 117.08 121.95 116.30 118.80 123.67 108.25 113.29 127.27
[17:30:34.598] <TB2> INFO: Vcal RMS: 5.84 5.92 5.41 4.94 5.15 6.00 5.97 5.42 5.66 6.51 6.05 6.36 6.25 5.09 5.46 6.41
[17:30:34.599] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1303 seconds
[17:30:34.599] <TB2> INFO: Decoding statistics:
[17:30:34.599] <TB2> INFO: General information:
[17:30:34.599] <TB2> INFO: 16bit words read: 0
[17:30:34.599] <TB2> INFO: valid events total: 0
[17:30:34.599] <TB2> INFO: empty events: 0
[17:30:34.599] <TB2> INFO: valid events with pixels: 0
[17:30:34.599] <TB2> INFO: valid pixel hits: 0
[17:30:34.599] <TB2> INFO: Event errors: 0
[17:30:34.599] <TB2> INFO: start marker: 0
[17:30:34.599] <TB2> INFO: stop marker: 0
[17:30:34.599] <TB2> INFO: overflow: 0
[17:30:34.599] <TB2> INFO: invalid 5bit words: 0
[17:30:34.599] <TB2> INFO: invalid XOR eye diagram: 0
[17:30:34.599] <TB2> INFO: frame (failed synchr.): 0
[17:30:34.599] <TB2> INFO: idle data (no TBM trl): 0
[17:30:34.599] <TB2> INFO: no data (only TBM hdr): 0
[17:30:34.599] <TB2> INFO: TBM errors: 0
[17:30:34.599] <TB2> INFO: flawed TBM headers: 0
[17:30:34.599] <TB2> INFO: flawed TBM trailers: 0
[17:30:34.599] <TB2> INFO: event ID mismatches: 0
[17:30:34.599] <TB2> INFO: ROC errors: 0
[17:30:34.599] <TB2> INFO: missing ROC header(s): 0
[17:30:34.599] <TB2> INFO: misplaced readback start: 0
[17:30:34.599] <TB2> INFO: Pixel decoding errors: 0
[17:30:34.599] <TB2> INFO: pixel data incomplete: 0
[17:30:34.599] <TB2> INFO: pixel address: 0
[17:30:34.599] <TB2> INFO: pulse height fill bit: 0
[17:30:34.599] <TB2> INFO: buffer corruption: 0
[17:30:34.663] <TB2> INFO: ######################################################################
[17:30:34.663] <TB2> INFO: PixTestTrim::doTest()
[17:30:34.663] <TB2> INFO: ######################################################################
[17:30:34.664] <TB2> INFO: ----------------------------------------------------------------------
[17:30:34.664] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[17:30:34.664] <TB2> INFO: ----------------------------------------------------------------------
[17:30:34.705] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[17:30:34.705] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[17:30:34.714] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[17:30:34.714] <TB2> INFO: run 1 of 1
[17:30:34.946] <TB2> INFO: Expecting 5025280 events.
[17:31:05.748] <TB2> INFO: 826080 events read in total (30208ms).
[17:31:36.558] <TB2> INFO: 1650232 events read in total (61019ms).
[17:32:07.069] <TB2> INFO: 2471608 events read in total (91530ms).
[17:32:37.512] <TB2> INFO: 3290256 events read in total (121972ms).
[17:33:07.986] <TB2> INFO: 4105704 events read in total (152447ms).
[17:33:38.150] <TB2> INFO: 4919912 events read in total (182610ms).
[17:33:42.520] <TB2> INFO: 5025280 events read in total (186980ms).
[17:33:42.580] <TB2> INFO: Test took 187866ms.
[17:33:58.244] <TB2> INFO: ROC 0 VthrComp = 130
[17:33:58.244] <TB2> INFO: ROC 1 VthrComp = 127
[17:33:58.244] <TB2> INFO: ROC 2 VthrComp = 127
[17:33:58.244] <TB2> INFO: ROC 3 VthrComp = 121
[17:33:58.244] <TB2> INFO: ROC 4 VthrComp = 108
[17:33:58.244] <TB2> INFO: ROC 5 VthrComp = 128
[17:33:58.244] <TB2> INFO: ROC 6 VthrComp = 109
[17:33:58.244] <TB2> INFO: ROC 7 VthrComp = 117
[17:33:58.245] <TB2> INFO: ROC 8 VthrComp = 121
[17:33:58.245] <TB2> INFO: ROC 9 VthrComp = 129
[17:33:58.245] <TB2> INFO: ROC 10 VthrComp = 117
[17:33:58.245] <TB2> INFO: ROC 11 VthrComp = 120
[17:33:58.245] <TB2> INFO: ROC 12 VthrComp = 128
[17:33:58.245] <TB2> INFO: ROC 13 VthrComp = 107
[17:33:58.245] <TB2> INFO: ROC 14 VthrComp = 112
[17:33:58.245] <TB2> INFO: ROC 15 VthrComp = 128
[17:33:58.538] <TB2> INFO: Expecting 41600 events.
[17:34:01.984] <TB2> INFO: 41600 events read in total (2854ms).
[17:34:01.985] <TB2> INFO: Test took 3738ms.
[17:34:01.997] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[17:34:01.997] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[17:34:02.008] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[17:34:02.008] <TB2> INFO: run 1 of 1
[17:34:02.302] <TB2> INFO: Expecting 5025280 events.
[17:34:29.105] <TB2> INFO: 591392 events read in total (26211ms).
[17:34:55.074] <TB2> INFO: 1181216 events read in total (52180ms).
[17:35:21.281] <TB2> INFO: 1770928 events read in total (78387ms).
[17:35:47.523] <TB2> INFO: 2359952 events read in total (104629ms).
[17:36:13.612] <TB2> INFO: 2946928 events read in total (130718ms).
[17:36:40.101] <TB2> INFO: 3532616 events read in total (157207ms).
[17:37:05.578] <TB2> INFO: 4117448 events read in total (182684ms).
[17:37:31.588] <TB2> INFO: 4701912 events read in total (208694ms).
[17:37:46.199] <TB2> INFO: 5025280 events read in total (223305ms).
[17:37:46.276] <TB2> INFO: Test took 224268ms.
[17:38:10.370] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 59.9867 for pixel 47/2 mean/min/max = 45.8441/31.5526/60.1357
[17:38:10.370] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 61.2468 for pixel 22/11 mean/min/max = 45.8348/30.4073/61.2623
[17:38:10.371] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 58.5353 for pixel 0/29 mean/min/max = 45.2673/31.4827/59.0519
[17:38:10.371] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 60.0464 for pixel 43/7 mean/min/max = 45.5096/30.9386/60.0806
[17:38:10.371] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 62.8632 for pixel 22/78 mean/min/max = 48.2883/33.6909/62.8858
[17:38:10.372] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 60.3938 for pixel 45/12 mean/min/max = 45.9219/31.3589/60.4848
[17:38:10.372] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 66.6321 for pixel 5/1 mean/min/max = 49.5526/32.4073/66.698
[17:38:10.372] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 60.4803 for pixel 6/38 mean/min/max = 45.801/30.9854/60.6166
[17:38:10.373] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 60.2193 for pixel 26/0 mean/min/max = 45.9825/31.5475/60.4176
[17:38:10.373] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 64.8309 for pixel 34/7 mean/min/max = 48.3175/31.6705/64.9645
[17:38:10.373] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 60.78 for pixel 10/79 mean/min/max = 45.9462/31.0864/60.806
[17:38:10.374] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 61.1724 for pixel 7/6 mean/min/max = 46.4452/31.5915/61.2989
[17:38:10.374] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 60.2761 for pixel 8/76 mean/min/max = 46.0867/31.3869/60.7866
[17:38:10.374] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 60.3667 for pixel 20/9 mean/min/max = 47.3944/34.3277/60.4611
[17:38:10.375] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 61.6489 for pixel 12/6 mean/min/max = 46.7701/31.8376/61.7026
[17:38:10.375] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 62.2007 for pixel 9/70 mean/min/max = 46.6991/31.1913/62.2069
[17:38:10.376] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:38:10.464] <TB2> INFO: Expecting 411648 events.
[17:38:19.899] <TB2> INFO: 411648 events read in total (8843ms).
[17:38:19.906] <TB2> INFO: Expecting 411648 events.
[17:38:29.136] <TB2> INFO: 411648 events read in total (8827ms).
[17:38:29.150] <TB2> INFO: Expecting 411648 events.
[17:38:38.335] <TB2> INFO: 411648 events read in total (8782ms).
[17:38:38.347] <TB2> INFO: Expecting 411648 events.
[17:38:47.526] <TB2> INFO: 411648 events read in total (8776ms).
[17:38:47.541] <TB2> INFO: Expecting 411648 events.
[17:38:56.727] <TB2> INFO: 411648 events read in total (8783ms).
[17:38:56.743] <TB2> INFO: Expecting 411648 events.
[17:39:05.877] <TB2> INFO: 411648 events read in total (8731ms).
[17:39:05.897] <TB2> INFO: Expecting 411648 events.
[17:39:15.080] <TB2> INFO: 411648 events read in total (8780ms).
[17:39:15.114] <TB2> INFO: Expecting 411648 events.
[17:39:24.210] <TB2> INFO: 411648 events read in total (8693ms).
[17:39:24.235] <TB2> INFO: Expecting 411648 events.
[17:39:33.412] <TB2> INFO: 411648 events read in total (8774ms).
[17:39:33.440] <TB2> INFO: Expecting 411648 events.
[17:39:42.666] <TB2> INFO: 411648 events read in total (8823ms).
[17:39:42.696] <TB2> INFO: Expecting 411648 events.
[17:39:51.890] <TB2> INFO: 411648 events read in total (8791ms).
[17:39:51.921] <TB2> INFO: Expecting 411648 events.
[17:40:01.120] <TB2> INFO: 411648 events read in total (8796ms).
[17:40:01.155] <TB2> INFO: Expecting 411648 events.
[17:40:10.344] <TB2> INFO: 411648 events read in total (8786ms).
[17:40:10.383] <TB2> INFO: Expecting 411648 events.
[17:40:19.637] <TB2> INFO: 411648 events read in total (8851ms).
[17:40:19.677] <TB2> INFO: Expecting 411648 events.
[17:40:28.845] <TB2> INFO: 411648 events read in total (8765ms).
[17:40:28.889] <TB2> INFO: Expecting 411648 events.
[17:40:38.173] <TB2> INFO: 411648 events read in total (8881ms).
[17:40:38.218] <TB2> INFO: Test took 147843ms.
[17:40:38.951] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[17:40:38.961] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[17:40:38.961] <TB2> INFO: run 1 of 1
[17:40:39.208] <TB2> INFO: Expecting 5025280 events.
[17:41:05.988] <TB2> INFO: 590264 events read in total (26188ms).
[17:41:32.320] <TB2> INFO: 1179616 events read in total (52520ms).
[17:41:58.475] <TB2> INFO: 1768120 events read in total (78676ms).
[17:42:24.949] <TB2> INFO: 2356920 events read in total (105149ms).
[17:42:51.295] <TB2> INFO: 2945184 events read in total (131495ms).
[17:43:17.478] <TB2> INFO: 3537248 events read in total (157678ms).
[17:43:43.764] <TB2> INFO: 4125800 events read in total (183964ms).
[17:44:09.915] <TB2> INFO: 4714432 events read in total (210115ms).
[17:44:24.041] <TB2> INFO: 5025280 events read in total (224241ms).
[17:44:24.142] <TB2> INFO: Test took 225180ms.
[17:44:44.520] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.515006 .. 147.960960
[17:44:44.814] <TB2> INFO: Expecting 208000 events.
[17:44:54.434] <TB2> INFO: 208000 events read in total (9029ms).
[17:44:54.435] <TB2> INFO: Test took 9914ms.
[17:44:54.481] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 157 (-1/-1) hits flags = 528 (plus default)
[17:44:54.489] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[17:44:54.489] <TB2> INFO: run 1 of 1
[17:44:54.767] <TB2> INFO: Expecting 5258240 events.
[17:45:20.839] <TB2> INFO: 585320 events read in total (25480ms).
[17:45:46.001] <TB2> INFO: 1170864 events read in total (51642ms).
[17:46:12.228] <TB2> INFO: 1755704 events read in total (76869ms).
[17:46:38.433] <TB2> INFO: 2340600 events read in total (103074ms).
[17:47:04.731] <TB2> INFO: 2925600 events read in total (129372ms).
[17:47:30.961] <TB2> INFO: 3510368 events read in total (155602ms).
[17:47:57.059] <TB2> INFO: 4093424 events read in total (181700ms).
[17:48:22.813] <TB2> INFO: 4676240 events read in total (207454ms).
[17:48:48.574] <TB2> INFO: 5258240 events read in total (233215ms).
[17:48:48.643] <TB2> INFO: Test took 234155ms.
[17:49:12.665] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 28.133357 .. 44.967887
[17:49:12.940] <TB2> INFO: Expecting 208000 events.
[17:49:22.810] <TB2> INFO: 208000 events read in total (9279ms).
[17:49:22.811] <TB2> INFO: Test took 10145ms.
[17:49:22.857] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 18 .. 54 (-1/-1) hits flags = 528 (plus default)
[17:49:22.866] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[17:49:22.866] <TB2> INFO: run 1 of 1
[17:49:23.144] <TB2> INFO: Expecting 1231360 events.
[17:49:51.823] <TB2> INFO: 658496 events read in total (28087ms).
[17:50:16.569] <TB2> INFO: 1231360 events read in total (52833ms).
[17:50:16.601] <TB2> INFO: Test took 53736ms.
[17:50:28.594] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 26.642985 .. 45.407477
[17:50:28.827] <TB2> INFO: Expecting 208000 events.
[17:50:39.110] <TB2> INFO: 208000 events read in total (9692ms).
[17:50:39.111] <TB2> INFO: Test took 10516ms.
[17:50:39.188] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 16 .. 55 (-1/-1) hits flags = 528 (plus default)
[17:50:39.200] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[17:50:39.200] <TB2> INFO: run 1 of 1
[17:50:39.489] <TB2> INFO: Expecting 1331200 events.
[17:51:08.165] <TB2> INFO: 663440 events read in total (28085ms).
[17:51:36.063] <TB2> INFO: 1324904 events read in total (55983ms).
[17:51:36.749] <TB2> INFO: 1331200 events read in total (56670ms).
[17:51:36.779] <TB2> INFO: Test took 57580ms.
[17:51:48.832] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 24.319455 .. 49.415877
[17:51:49.120] <TB2> INFO: Expecting 208000 events.
[17:51:59.056] <TB2> INFO: 208000 events read in total (9345ms).
[17:51:59.058] <TB2> INFO: Test took 10224ms.
[17:51:59.128] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 14 .. 59 (-1/-1) hits flags = 528 (plus default)
[17:51:59.137] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[17:51:59.137] <TB2> INFO: run 1 of 1
[17:51:59.415] <TB2> INFO: Expecting 1530880 events.
[17:52:27.539] <TB2> INFO: 655736 events read in total (27533ms).
[17:52:55.316] <TB2> INFO: 1311928 events read in total (55310ms).
[17:53:04.978] <TB2> INFO: 1530880 events read in total (64972ms).
[17:53:04.003] <TB2> INFO: Test took 65866ms.
[17:53:20.673] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[17:53:20.673] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[17:53:20.684] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[17:53:20.684] <TB2> INFO: run 1 of 1
[17:53:20.975] <TB2> INFO: Expecting 1364480 events.
[17:53:50.279] <TB2> INFO: 666960 events read in total (28713ms).
[17:54:18.145] <TB2> INFO: 1333352 events read in total (56579ms).
[17:54:19.816] <TB2> INFO: 1364480 events read in total (58250ms).
[17:54:19.846] <TB2> INFO: Test took 59162ms.
[17:54:31.099] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C0.dat
[17:54:31.099] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C1.dat
[17:54:31.099] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C2.dat
[17:54:31.099] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C3.dat
[17:54:31.099] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C4.dat
[17:54:31.099] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C5.dat
[17:54:31.099] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C6.dat
[17:54:31.099] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C7.dat
[17:54:31.099] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C8.dat
[17:54:31.099] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C9.dat
[17:54:31.100] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C10.dat
[17:54:31.100] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C11.dat
[17:54:31.100] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C12.dat
[17:54:31.100] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C13.dat
[17:54:31.100] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C14.dat
[17:54:31.100] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C15.dat
[17:54:31.100] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//trimParameters35_C0.dat
[17:54:31.106] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//trimParameters35_C1.dat
[17:54:31.111] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//trimParameters35_C2.dat
[17:54:31.117] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//trimParameters35_C3.dat
[17:54:31.122] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//trimParameters35_C4.dat
[17:54:31.128] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//trimParameters35_C5.dat
[17:54:31.133] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//trimParameters35_C6.dat
[17:54:31.139] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//trimParameters35_C7.dat
[17:54:31.147] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//trimParameters35_C8.dat
[17:54:31.154] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//trimParameters35_C9.dat
[17:54:31.162] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//trimParameters35_C10.dat
[17:54:31.169] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//trimParameters35_C11.dat
[17:54:31.175] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//trimParameters35_C12.dat
[17:54:31.180] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//trimParameters35_C13.dat
[17:54:31.185] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//trimParameters35_C14.dat
[17:54:31.191] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//trimParameters35_C15.dat
[17:54:31.196] <TB2> INFO: PixTestTrim::trimTest() done
[17:54:31.196] <TB2> INFO: vtrim: 146 180 140 152 131 142 149 130 154 153 119 140 130 130 124 130
[17:54:31.196] <TB2> INFO: vthrcomp: 130 127 127 121 108 128 109 117 121 129 117 120 128 107 112 128
[17:54:31.196] <TB2> INFO: vcal mean: 34.94 34.92 34.97 34.96 34.97 34.98 35.04 34.97 35.06 35.08 34.93 34.95 34.95 34.96 34.96 34.99
[17:54:31.196] <TB2> INFO: vcal RMS: 1.09 1.19 1.04 1.13 1.06 1.10 1.11 1.13 1.12 1.25 1.10 1.17 1.19 1.02 1.11 1.22
[17:54:31.196] <TB2> INFO: bits mean: 10.12 10.53 9.51 10.29 9.07 9.84 9.28 10.14 10.33 9.69 9.69 9.75 9.67 9.39 9.42 9.73
[17:54:31.196] <TB2> INFO: bits RMS: 2.46 2.38 2.77 2.46 2.50 2.62 2.45 2.51 2.40 2.45 2.72 2.57 2.64 2.34 2.72 2.62
[17:54:31.203] <TB2> INFO: ----------------------------------------------------------------------
[17:54:31.203] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[17:54:31.203] <TB2> INFO: ----------------------------------------------------------------------
[17:54:31.205] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[17:54:31.216] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[17:54:31.216] <TB2> INFO: run 1 of 1
[17:54:31.447] <TB2> INFO: Expecting 4160000 events.
[17:55:04.993] <TB2> INFO: 750915 events read in total (32954ms).
[17:55:37.126] <TB2> INFO: 1496325 events read in total (65087ms).
[17:56:09.113] <TB2> INFO: 2238805 events read in total (97074ms).
[17:56:41.142] <TB2> INFO: 2978000 events read in total (129103ms).
[17:57:13.108] <TB2> INFO: 3714925 events read in total (161069ms).
[17:57:32.438] <TB2> INFO: 4160000 events read in total (180399ms).
[17:57:32.487] <TB2> INFO: Test took 181271ms.
[17:57:56.457] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[17:57:56.469] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[17:57:56.469] <TB2> INFO: run 1 of 1
[17:57:56.765] <TB2> INFO: Expecting 4243200 events.
[17:58:29.221] <TB2> INFO: 723005 events read in total (31864ms).
[17:59:00.929] <TB2> INFO: 1441105 events read in total (63572ms).
[17:59:32.640] <TB2> INFO: 2156830 events read in total (95283ms).
[18:00:04.265] <TB2> INFO: 2869210 events read in total (126908ms).
[18:00:36.286] <TB2> INFO: 3579675 events read in total (158929ms).
[18:01:05.918] <TB2> INFO: 4243200 events read in total (188561ms).
[18:01:05.991] <TB2> INFO: Test took 189522ms.
[18:01:34.281] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 191 (-1/-1) hits flags = 528 (plus default)
[18:01:34.291] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[18:01:34.291] <TB2> INFO: run 1 of 1
[18:01:34.522] <TB2> INFO: Expecting 3993600 events.
[18:02:07.365] <TB2> INFO: 739340 events read in total (32252ms).
[18:02:39.422] <TB2> INFO: 1474050 events read in total (64309ms).
[18:03:11.457] <TB2> INFO: 2205105 events read in total (96344ms).
[18:03:43.151] <TB2> INFO: 2932665 events read in total (128038ms).
[18:04:14.900] <TB2> INFO: 3658150 events read in total (159787ms).
[18:04:29.597] <TB2> INFO: 3993600 events read in total (174484ms).
[18:04:29.644] <TB2> INFO: Test took 175353ms.
[18:04:54.895] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 189 (-1/-1) hits flags = 528 (plus default)
[18:04:54.903] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[18:04:54.903] <TB2> INFO: run 1 of 1
[18:04:55.137] <TB2> INFO: Expecting 3952000 events.
[18:05:27.467] <TB2> INFO: 742815 events read in total (31738ms).
[18:05:59.340] <TB2> INFO: 1480860 events read in total (63611ms).
[18:06:30.892] <TB2> INFO: 2215415 events read in total (95163ms).
[18:07:03.055] <TB2> INFO: 2945850 events read in total (127326ms).
[18:07:35.039] <TB2> INFO: 3674450 events read in total (159310ms).
[18:07:47.236] <TB2> INFO: 3952000 events read in total (171507ms).
[18:07:47.301] <TB2> INFO: Test took 172398ms.
[18:08:11.141] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 190 (-1/-1) hits flags = 528 (plus default)
[18:08:11.149] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[18:08:11.149] <TB2> INFO: run 1 of 1
[18:08:11.381] <TB2> INFO: Expecting 3972800 events.
[18:08:43.876] <TB2> INFO: 741430 events read in total (31903ms).
[18:09:15.932] <TB2> INFO: 1478090 events read in total (63959ms).
[18:09:48.120] <TB2> INFO: 2211270 events read in total (96147ms).
[18:10:20.300] <TB2> INFO: 2940565 events read in total (128327ms).
[18:10:51.930] <TB2> INFO: 3667955 events read in total (159957ms).
[18:11:05.657] <TB2> INFO: 3972800 events read in total (173684ms).
[18:11:05.705] <TB2> INFO: Test took 174555ms.
[18:11:28.949] <TB2> INFO: PixTestTrim::trimBitTest() done
[18:11:28.950] <TB2> INFO: PixTestTrim::doTest() done, duration: 2454 seconds
[18:11:28.950] <TB2> INFO: Decoding statistics:
[18:11:28.950] <TB2> INFO: General information:
[18:11:28.950] <TB2> INFO: 16bit words read: 0
[18:11:28.950] <TB2> INFO: valid events total: 0
[18:11:28.950] <TB2> INFO: empty events: 0
[18:11:28.950] <TB2> INFO: valid events with pixels: 0
[18:11:28.950] <TB2> INFO: valid pixel hits: 0
[18:11:28.950] <TB2> INFO: Event errors: 0
[18:11:28.950] <TB2> INFO: start marker: 0
[18:11:28.950] <TB2> INFO: stop marker: 0
[18:11:28.950] <TB2> INFO: overflow: 0
[18:11:28.950] <TB2> INFO: invalid 5bit words: 0
[18:11:28.950] <TB2> INFO: invalid XOR eye diagram: 0
[18:11:28.950] <TB2> INFO: frame (failed synchr.): 0
[18:11:28.950] <TB2> INFO: idle data (no TBM trl): 0
[18:11:28.950] <TB2> INFO: no data (only TBM hdr): 0
[18:11:28.950] <TB2> INFO: TBM errors: 0
[18:11:28.950] <TB2> INFO: flawed TBM headers: 0
[18:11:28.950] <TB2> INFO: flawed TBM trailers: 0
[18:11:28.950] <TB2> INFO: event ID mismatches: 0
[18:11:28.950] <TB2> INFO: ROC errors: 0
[18:11:28.950] <TB2> INFO: missing ROC header(s): 0
[18:11:28.950] <TB2> INFO: misplaced readback start: 0
[18:11:28.950] <TB2> INFO: Pixel decoding errors: 0
[18:11:28.950] <TB2> INFO: pixel data incomplete: 0
[18:11:28.950] <TB2> INFO: pixel address: 0
[18:11:28.950] <TB2> INFO: pulse height fill bit: 0
[18:11:28.950] <TB2> INFO: buffer corruption: 0
[18:11:29.571] <TB2> INFO: ######################################################################
[18:11:29.571] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[18:11:29.571] <TB2> INFO: ######################################################################
[18:11:29.804] <TB2> INFO: Expecting 41600 events.
[18:11:33.393] <TB2> INFO: 41600 events read in total (2998ms).
[18:11:33.393] <TB2> INFO: Test took 3821ms.
[18:11:33.890] <TB2> INFO: Expecting 41600 events.
[18:11:37.507] <TB2> INFO: 41600 events read in total (3025ms).
[18:11:37.508] <TB2> INFO: Test took 3909ms.
[18:11:37.799] <TB2> INFO: Expecting 41600 events.
[18:11:41.401] <TB2> INFO: 41600 events read in total (3011ms).
[18:11:41.402] <TB2> INFO: Test took 3868ms.
[18:11:41.690] <TB2> INFO: Expecting 41600 events.
[18:11:45.406] <TB2> INFO: 41600 events read in total (3124ms).
[18:11:45.407] <TB2> INFO: Test took 3982ms.
[18:11:45.694] <TB2> INFO: Expecting 41600 events.
[18:11:49.286] <TB2> INFO: 41600 events read in total (3000ms).
[18:11:49.287] <TB2> INFO: Test took 3857ms.
[18:11:49.575] <TB2> INFO: Expecting 41600 events.
[18:11:53.215] <TB2> INFO: 41600 events read in total (3049ms).
[18:11:53.216] <TB2> INFO: Test took 3906ms.
[18:11:53.504] <TB2> INFO: Expecting 41600 events.
[18:11:57.145] <TB2> INFO: 41600 events read in total (3049ms).
[18:11:57.145] <TB2> INFO: Test took 3906ms.
[18:11:57.464] <TB2> INFO: Expecting 41600 events.
[18:12:01.099] <TB2> INFO: 41600 events read in total (3043ms).
[18:12:01.100] <TB2> INFO: Test took 3928ms.
[18:12:01.388] <TB2> INFO: Expecting 41600 events.
[18:12:04.939] <TB2> INFO: 41600 events read in total (2960ms).
[18:12:04.940] <TB2> INFO: Test took 3817ms.
[18:12:05.259] <TB2> INFO: Expecting 41600 events.
[18:12:08.879] <TB2> INFO: 41600 events read in total (3028ms).
[18:12:08.880] <TB2> INFO: Test took 3914ms.
[18:12:09.168] <TB2> INFO: Expecting 41600 events.
[18:12:12.758] <TB2> INFO: 41600 events read in total (2999ms).
[18:12:12.759] <TB2> INFO: Test took 3856ms.
[18:12:13.046] <TB2> INFO: Expecting 41600 events.
[18:12:16.646] <TB2> INFO: 41600 events read in total (3008ms).
[18:12:16.646] <TB2> INFO: Test took 3864ms.
[18:12:16.956] <TB2> INFO: Expecting 41600 events.
[18:12:20.500] <TB2> INFO: 41600 events read in total (2952ms).
[18:12:20.501] <TB2> INFO: Test took 3831ms.
[18:12:20.817] <TB2> INFO: Expecting 41600 events.
[18:12:24.560] <TB2> INFO: 41600 events read in total (3151ms).
[18:12:24.561] <TB2> INFO: Test took 4037ms.
[18:12:24.881] <TB2> INFO: Expecting 41600 events.
[18:12:28.392] <TB2> INFO: 41600 events read in total (2920ms).
[18:12:28.393] <TB2> INFO: Test took 3808ms.
[18:12:28.681] <TB2> INFO: Expecting 41600 events.
[18:12:32.482] <TB2> INFO: 41600 events read in total (3209ms).
[18:12:32.482] <TB2> INFO: Test took 4066ms.
[18:12:32.789] <TB2> INFO: Expecting 41600 events.
[18:12:36.292] <TB2> INFO: 41600 events read in total (2912ms).
[18:12:36.293] <TB2> INFO: Test took 3787ms.
[18:12:36.582] <TB2> INFO: Expecting 41600 events.
[18:12:40.055] <TB2> INFO: 41600 events read in total (2882ms).
[18:12:40.055] <TB2> INFO: Test took 3739ms.
[18:12:40.343] <TB2> INFO: Expecting 41600 events.
[18:12:43.804] <TB2> INFO: 41600 events read in total (2869ms).
[18:12:43.804] <TB2> INFO: Test took 3725ms.
[18:12:44.092] <TB2> INFO: Expecting 41600 events.
[18:12:47.643] <TB2> INFO: 41600 events read in total (2959ms).
[18:12:47.643] <TB2> INFO: Test took 3816ms.
[18:12:47.961] <TB2> INFO: Expecting 41600 events.
[18:12:51.616] <TB2> INFO: 41600 events read in total (3063ms).
[18:12:51.617] <TB2> INFO: Test took 3950ms.
[18:12:51.912] <TB2> INFO: Expecting 41600 events.
[18:12:55.506] <TB2> INFO: 41600 events read in total (3003ms).
[18:12:55.507] <TB2> INFO: Test took 3866ms.
[18:12:55.831] <TB2> INFO: Expecting 41600 events.
[18:12:59.417] <TB2> INFO: 41600 events read in total (2994ms).
[18:12:59.418] <TB2> INFO: Test took 3884ms.
[18:12:59.706] <TB2> INFO: Expecting 41600 events.
[18:13:03.333] <TB2> INFO: 41600 events read in total (3035ms).
[18:13:03.334] <TB2> INFO: Test took 3892ms.
[18:13:03.626] <TB2> INFO: Expecting 41600 events.
[18:13:07.242] <TB2> INFO: 41600 events read in total (3025ms).
[18:13:07.242] <TB2> INFO: Test took 3881ms.
[18:13:07.531] <TB2> INFO: Expecting 41600 events.
[18:13:11.036] <TB2> INFO: 41600 events read in total (2914ms).
[18:13:11.037] <TB2> INFO: Test took 3771ms.
[18:13:11.325] <TB2> INFO: Expecting 41600 events.
[18:13:14.927] <TB2> INFO: 41600 events read in total (3011ms).
[18:13:14.927] <TB2> INFO: Test took 3867ms.
[18:13:15.216] <TB2> INFO: Expecting 41600 events.
[18:13:18.939] <TB2> INFO: 41600 events read in total (3132ms).
[18:13:18.939] <TB2> INFO: Test took 3988ms.
[18:13:19.259] <TB2> INFO: Expecting 41600 events.
[18:13:22.834] <TB2> INFO: 41600 events read in total (2983ms).
[18:13:22.835] <TB2> INFO: Test took 3869ms.
[18:13:23.124] <TB2> INFO: Expecting 41600 events.
[18:13:26.714] <TB2> INFO: 41600 events read in total (2999ms).
[18:13:26.715] <TB2> INFO: Test took 3855ms.
[18:13:26.004] <TB2> INFO: Expecting 2560 events.
[18:13:27.887] <TB2> INFO: 2560 events read in total (292ms).
[18:13:27.888] <TB2> INFO: Test took 1161ms.
[18:13:28.196] <TB2> INFO: Expecting 2560 events.
[18:13:29.079] <TB2> INFO: 2560 events read in total (292ms).
[18:13:29.079] <TB2> INFO: Test took 1191ms.
[18:13:29.387] <TB2> INFO: Expecting 2560 events.
[18:13:30.271] <TB2> INFO: 2560 events read in total (292ms).
[18:13:30.271] <TB2> INFO: Test took 1191ms.
[18:13:30.579] <TB2> INFO: Expecting 2560 events.
[18:13:31.463] <TB2> INFO: 2560 events read in total (293ms).
[18:13:31.463] <TB2> INFO: Test took 1192ms.
[18:13:31.771] <TB2> INFO: Expecting 2560 events.
[18:13:32.648] <TB2> INFO: 2560 events read in total (285ms).
[18:13:32.648] <TB2> INFO: Test took 1184ms.
[18:13:32.956] <TB2> INFO: Expecting 2560 events.
[18:13:33.836] <TB2> INFO: 2560 events read in total (288ms).
[18:13:33.836] <TB2> INFO: Test took 1187ms.
[18:13:34.144] <TB2> INFO: Expecting 2560 events.
[18:13:35.027] <TB2> INFO: 2560 events read in total (292ms).
[18:13:35.027] <TB2> INFO: Test took 1191ms.
[18:13:35.335] <TB2> INFO: Expecting 2560 events.
[18:13:36.218] <TB2> INFO: 2560 events read in total (291ms).
[18:13:36.218] <TB2> INFO: Test took 1190ms.
[18:13:36.526] <TB2> INFO: Expecting 2560 events.
[18:13:37.406] <TB2> INFO: 2560 events read in total (288ms).
[18:13:37.407] <TB2> INFO: Test took 1189ms.
[18:13:37.714] <TB2> INFO: Expecting 2560 events.
[18:13:38.594] <TB2> INFO: 2560 events read in total (288ms).
[18:13:38.594] <TB2> INFO: Test took 1187ms.
[18:13:38.902] <TB2> INFO: Expecting 2560 events.
[18:13:39.785] <TB2> INFO: 2560 events read in total (292ms).
[18:13:39.786] <TB2> INFO: Test took 1192ms.
[18:13:40.093] <TB2> INFO: Expecting 2560 events.
[18:13:40.973] <TB2> INFO: 2560 events read in total (288ms).
[18:13:40.973] <TB2> INFO: Test took 1187ms.
[18:13:41.281] <TB2> INFO: Expecting 2560 events.
[18:13:42.166] <TB2> INFO: 2560 events read in total (294ms).
[18:13:42.166] <TB2> INFO: Test took 1193ms.
[18:13:42.474] <TB2> INFO: Expecting 2560 events.
[18:13:43.358] <TB2> INFO: 2560 events read in total (293ms).
[18:13:43.358] <TB2> INFO: Test took 1192ms.
[18:13:43.666] <TB2> INFO: Expecting 2560 events.
[18:13:44.552] <TB2> INFO: 2560 events read in total (294ms).
[18:13:44.552] <TB2> INFO: Test took 1194ms.
[18:13:44.860] <TB2> INFO: Expecting 2560 events.
[18:13:45.750] <TB2> INFO: 2560 events read in total (296ms).
[18:13:45.750] <TB2> INFO: Test took 1197ms.
[18:13:45.753] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:13:46.059] <TB2> INFO: Expecting 655360 events.
[18:14:00.805] <TB2> INFO: 655360 events read in total (14155ms).
[18:14:00.816] <TB2> INFO: Expecting 655360 events.
[18:14:15.368] <TB2> INFO: 655360 events read in total (14150ms).
[18:14:15.389] <TB2> INFO: Expecting 655360 events.
[18:14:30.033] <TB2> INFO: 655360 events read in total (14241ms).
[18:14:30.060] <TB2> INFO: Expecting 655360 events.
[18:14:44.616] <TB2> INFO: 655360 events read in total (14153ms).
[18:14:44.640] <TB2> INFO: Expecting 655360 events.
[18:14:59.129] <TB2> INFO: 655360 events read in total (14086ms).
[18:14:59.168] <TB2> INFO: Expecting 655360 events.
[18:15:13.571] <TB2> INFO: 655360 events read in total (14000ms).
[18:15:13.602] <TB2> INFO: Expecting 655360 events.
[18:15:28.082] <TB2> INFO: 655360 events read in total (14077ms).
[18:15:28.117] <TB2> INFO: Expecting 655360 events.
[18:15:42.541] <TB2> INFO: 655360 events read in total (14022ms).
[18:15:42.603] <TB2> INFO: Expecting 655360 events.
[18:15:57.117] <TB2> INFO: 655360 events read in total (14111ms).
[18:15:57.179] <TB2> INFO: Expecting 655360 events.
[18:16:11.565] <TB2> INFO: 655360 events read in total (13983ms).
[18:16:11.638] <TB2> INFO: Expecting 655360 events.
[18:16:26.094] <TB2> INFO: 655360 events read in total (14054ms).
[18:16:26.148] <TB2> INFO: Expecting 655360 events.
[18:16:40.562] <TB2> INFO: 655360 events read in total (14011ms).
[18:16:40.618] <TB2> INFO: Expecting 655360 events.
[18:16:54.994] <TB2> INFO: 655360 events read in total (13973ms).
[18:16:55.059] <TB2> INFO: Expecting 655360 events.
[18:17:09.602] <TB2> INFO: 655360 events read in total (14140ms).
[18:17:09.668] <TB2> INFO: Expecting 655360 events.
[18:17:24.181] <TB2> INFO: 655360 events read in total (14110ms).
[18:17:24.258] <TB2> INFO: Expecting 655360 events.
[18:17:38.629] <TB2> INFO: 655360 events read in total (13968ms).
[18:17:38.704] <TB2> INFO: Test took 232951ms.
[18:17:38.782] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:17:39.047] <TB2> INFO: Expecting 655360 events.
[18:17:53.493] <TB2> INFO: 655360 events read in total (13854ms).
[18:17:53.503] <TB2> INFO: Expecting 655360 events.
[18:18:07.734] <TB2> INFO: 655360 events read in total (13828ms).
[18:18:07.749] <TB2> INFO: Expecting 655360 events.
[18:18:22.091] <TB2> INFO: 655360 events read in total (13939ms).
[18:18:22.118] <TB2> INFO: Expecting 655360 events.
[18:18:36.191] <TB2> INFO: 655360 events read in total (13671ms).
[18:18:36.213] <TB2> INFO: Expecting 655360 events.
[18:18:50.412] <TB2> INFO: 655360 events read in total (13796ms).
[18:18:50.451] <TB2> INFO: Expecting 655360 events.
[18:19:04.761] <TB2> INFO: 655360 events read in total (13907ms).
[18:19:04.793] <TB2> INFO: Expecting 655360 events.
[18:19:18.858] <TB2> INFO: 655360 events read in total (13662ms).
[18:19:18.891] <TB2> INFO: Expecting 655360 events.
[18:19:33.331] <TB2> INFO: 655360 events read in total (14037ms).
[18:19:33.390] <TB2> INFO: Expecting 655360 events.
[18:19:47.788] <TB2> INFO: 655360 events read in total (13995ms).
[18:19:47.831] <TB2> INFO: Expecting 655360 events.
[18:20:01.956] <TB2> INFO: 655360 events read in total (13722ms).
[18:20:01.007] <TB2> INFO: Expecting 655360 events.
[18:20:16.124] <TB2> INFO: 655360 events read in total (13714ms).
[18:20:16.201] <TB2> INFO: Expecting 655360 events.
[18:20:30.543] <TB2> INFO: 655360 events read in total (13939ms).
[18:20:30.627] <TB2> INFO: Expecting 655360 events.
[18:20:44.639] <TB2> INFO: 655360 events read in total (13609ms).
[18:20:44.700] <TB2> INFO: Expecting 655360 events.
[18:20:58.933] <TB2> INFO: 655360 events read in total (13830ms).
[18:20:58.000] <TB2> INFO: Expecting 655360 events.
[18:21:13.405] <TB2> INFO: 655360 events read in total (14002ms).
[18:21:13.474] <TB2> INFO: Expecting 655360 events.
[18:21:27.821] <TB2> INFO: 655360 events read in total (13944ms).
[18:21:27.895] <TB2> INFO: Test took 229113ms.
[18:21:28.141] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:21:28.148] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[18:21:28.154] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:21:28.161] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:21:28.168] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:21:28.175] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:21:28.181] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[18:21:28.188] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[18:21:28.195] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[18:21:28.202] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[18:21:28.209] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:21:28.216] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[18:21:28.223] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:21:28.230] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:21:28.237] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:21:28.244] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[18:21:28.250] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[18:21:28.257] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:21:28.264] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:21:28.271] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:21:28.278] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[18:21:28.285] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[18:21:28.292] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[18:21:28.299] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[18:21:28.306] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[18:21:28.312] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[18:21:28.319] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[18:21:28.326] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[18:21:28.333] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[18:21:28.340] <TB2> INFO: safety margin for low PH: adding 10, margin is now 30
[18:21:28.347] <TB2> INFO: safety margin for low PH: adding 11, margin is now 31
[18:21:28.353] <TB2> INFO: safety margin for low PH: adding 12, margin is now 32
[18:21:28.360] <TB2> INFO: safety margin for low PH: adding 13, margin is now 33
[18:21:28.367] <TB2> INFO: safety margin for low PH: adding 14, margin is now 34
[18:21:28.374] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:21:28.381] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:21:28.388] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[18:21:28.394] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[18:21:28.401] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[18:21:28.408] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[18:21:28.415] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[18:21:28.422] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:21:28.429] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[18:21:28.436] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[18:21:28.442] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[18:21:28.449] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[18:21:28.456] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[18:21:28.463] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[18:21:28.470] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[18:21:28.476] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[18:21:28.483] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:21:28.490] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[18:21:28.497] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[18:21:28.504] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[18:21:28.540] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C0.dat
[18:21:28.540] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C1.dat
[18:21:28.540] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C2.dat
[18:21:28.540] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C3.dat
[18:21:28.540] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C4.dat
[18:21:28.540] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C5.dat
[18:21:28.541] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C6.dat
[18:21:28.541] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C7.dat
[18:21:28.541] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C8.dat
[18:21:28.541] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C9.dat
[18:21:28.541] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C10.dat
[18:21:28.541] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C11.dat
[18:21:28.541] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C12.dat
[18:21:28.541] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C13.dat
[18:21:28.541] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C14.dat
[18:21:28.541] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//dacParameters35_C15.dat
[18:21:28.811] <TB2> INFO: Expecting 41600 events.
[18:21:31.971] <TB2> INFO: 41600 events read in total (2568ms).
[18:21:31.972] <TB2> INFO: Test took 3428ms.
[18:21:32.418] <TB2> INFO: Expecting 41600 events.
[18:21:35.486] <TB2> INFO: 41600 events read in total (2476ms).
[18:21:35.487] <TB2> INFO: Test took 3301ms.
[18:21:35.994] <TB2> INFO: Expecting 41600 events.
[18:21:39.168] <TB2> INFO: 41600 events read in total (2583ms).
[18:21:39.168] <TB2> INFO: Test took 3468ms.
[18:21:39.383] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:21:39.471] <TB2> INFO: Expecting 2560 events.
[18:21:40.355] <TB2> INFO: 2560 events read in total (292ms).
[18:21:40.355] <TB2> INFO: Test took 972ms.
[18:21:40.357] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:21:40.663] <TB2> INFO: Expecting 2560 events.
[18:21:41.547] <TB2> INFO: 2560 events read in total (292ms).
[18:21:41.547] <TB2> INFO: Test took 1190ms.
[18:21:41.549] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:21:41.855] <TB2> INFO: Expecting 2560 events.
[18:21:42.739] <TB2> INFO: 2560 events read in total (292ms).
[18:21:42.740] <TB2> INFO: Test took 1191ms.
[18:21:42.741] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:21:43.048] <TB2> INFO: Expecting 2560 events.
[18:21:43.935] <TB2> INFO: 2560 events read in total (295ms).
[18:21:43.936] <TB2> INFO: Test took 1195ms.
[18:21:43.938] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:21:44.244] <TB2> INFO: Expecting 2560 events.
[18:21:45.132] <TB2> INFO: 2560 events read in total (296ms).
[18:21:45.133] <TB2> INFO: Test took 1196ms.
[18:21:45.134] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:21:45.441] <TB2> INFO: Expecting 2560 events.
[18:21:46.325] <TB2> INFO: 2560 events read in total (292ms).
[18:21:46.325] <TB2> INFO: Test took 1191ms.
[18:21:46.327] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:21:46.634] <TB2> INFO: Expecting 2560 events.
[18:21:47.518] <TB2> INFO: 2560 events read in total (293ms).
[18:21:47.518] <TB2> INFO: Test took 1191ms.
[18:21:47.520] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:21:47.826] <TB2> INFO: Expecting 2560 events.
[18:21:48.710] <TB2> INFO: 2560 events read in total (293ms).
[18:21:48.711] <TB2> INFO: Test took 1191ms.
[18:21:48.713] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:21:49.019] <TB2> INFO: Expecting 2560 events.
[18:21:49.899] <TB2> INFO: 2560 events read in total (288ms).
[18:21:49.899] <TB2> INFO: Test took 1186ms.
[18:21:49.901] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:21:50.207] <TB2> INFO: Expecting 2560 events.
[18:21:51.088] <TB2> INFO: 2560 events read in total (289ms).
[18:21:51.088] <TB2> INFO: Test took 1187ms.
[18:21:51.090] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:21:51.396] <TB2> INFO: Expecting 2560 events.
[18:21:52.275] <TB2> INFO: 2560 events read in total (287ms).
[18:21:52.276] <TB2> INFO: Test took 1186ms.
[18:21:52.277] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:21:52.584] <TB2> INFO: Expecting 2560 events.
[18:21:53.467] <TB2> INFO: 2560 events read in total (292ms).
[18:21:53.467] <TB2> INFO: Test took 1190ms.
[18:21:53.469] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:21:53.776] <TB2> INFO: Expecting 2560 events.
[18:21:54.656] <TB2> INFO: 2560 events read in total (289ms).
[18:21:54.656] <TB2> INFO: Test took 1187ms.
[18:21:54.658] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:21:54.964] <TB2> INFO: Expecting 2560 events.
[18:21:55.847] <TB2> INFO: 2560 events read in total (291ms).
[18:21:55.847] <TB2> INFO: Test took 1189ms.
[18:21:55.850] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:21:56.155] <TB2> INFO: Expecting 2560 events.
[18:21:57.039] <TB2> INFO: 2560 events read in total (292ms).
[18:21:57.040] <TB2> INFO: Test took 1190ms.
[18:21:57.042] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:21:57.348] <TB2> INFO: Expecting 2560 events.
[18:21:58.230] <TB2> INFO: 2560 events read in total (291ms).
[18:21:58.231] <TB2> INFO: Test took 1189ms.
[18:21:58.232] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:21:58.539] <TB2> INFO: Expecting 2560 events.
[18:21:59.426] <TB2> INFO: 2560 events read in total (295ms).
[18:21:59.426] <TB2> INFO: Test took 1194ms.
[18:21:59.428] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:21:59.734] <TB2> INFO: Expecting 2560 events.
[18:22:00.618] <TB2> INFO: 2560 events read in total (292ms).
[18:22:00.618] <TB2> INFO: Test took 1190ms.
[18:22:00.620] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:22:00.926] <TB2> INFO: Expecting 2560 events.
[18:22:01.808] <TB2> INFO: 2560 events read in total (290ms).
[18:22:01.809] <TB2> INFO: Test took 1189ms.
[18:22:01.810] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:22:02.117] <TB2> INFO: Expecting 2560 events.
[18:22:02.996] <TB2> INFO: 2560 events read in total (289ms).
[18:22:02.997] <TB2> INFO: Test took 1187ms.
[18:22:02.999] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:22:03.305] <TB2> INFO: Expecting 2560 events.
[18:22:04.188] <TB2> INFO: 2560 events read in total (291ms).
[18:22:04.189] <TB2> INFO: Test took 1190ms.
[18:22:04.191] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:22:04.497] <TB2> INFO: Expecting 2560 events.
[18:22:05.376] <TB2> INFO: 2560 events read in total (287ms).
[18:22:05.376] <TB2> INFO: Test took 1185ms.
[18:22:05.378] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:22:05.684] <TB2> INFO: Expecting 2560 events.
[18:22:06.568] <TB2> INFO: 2560 events read in total (293ms).
[18:22:06.568] <TB2> INFO: Test took 1190ms.
[18:22:06.570] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:22:06.876] <TB2> INFO: Expecting 2560 events.
[18:22:07.757] <TB2> INFO: 2560 events read in total (289ms).
[18:22:07.757] <TB2> INFO: Test took 1187ms.
[18:22:07.759] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:22:08.065] <TB2> INFO: Expecting 2560 events.
[18:22:08.948] <TB2> INFO: 2560 events read in total (291ms).
[18:22:08.948] <TB2> INFO: Test took 1189ms.
[18:22:08.950] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:22:09.257] <TB2> INFO: Expecting 2560 events.
[18:22:10.139] <TB2> INFO: 2560 events read in total (291ms).
[18:22:10.140] <TB2> INFO: Test took 1190ms.
[18:22:10.142] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:22:10.448] <TB2> INFO: Expecting 2560 events.
[18:22:11.332] <TB2> INFO: 2560 events read in total (292ms).
[18:22:11.332] <TB2> INFO: Test took 1190ms.
[18:22:11.335] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:22:11.641] <TB2> INFO: Expecting 2560 events.
[18:22:12.525] <TB2> INFO: 2560 events read in total (292ms).
[18:22:12.525] <TB2> INFO: Test took 1191ms.
[18:22:12.527] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:22:12.834] <TB2> INFO: Expecting 2560 events.
[18:22:13.722] <TB2> INFO: 2560 events read in total (297ms).
[18:22:13.722] <TB2> INFO: Test took 1195ms.
[18:22:13.724] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:22:14.031] <TB2> INFO: Expecting 2560 events.
[18:22:14.915] <TB2> INFO: 2560 events read in total (293ms).
[18:22:14.915] <TB2> INFO: Test took 1191ms.
[18:22:14.917] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:22:15.223] <TB2> INFO: Expecting 2560 events.
[18:22:16.107] <TB2> INFO: 2560 events read in total (292ms).
[18:22:16.107] <TB2> INFO: Test took 1190ms.
[18:22:16.109] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:22:16.415] <TB2> INFO: Expecting 2560 events.
[18:22:17.303] <TB2> INFO: 2560 events read in total (296ms).
[18:22:17.303] <TB2> INFO: Test took 1194ms.
[18:22:17.764] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 648 seconds
[18:22:17.764] <TB2> INFO: PH scale (per ROC): 53 53 60 45 43 60 58 59 60 55 62 49 45 47 48 44
[18:22:17.764] <TB2> INFO: PH offset (per ROC): 113 125 134 92 97 135 127 127 134 126 141 112 111 112 141 93
[18:22:17.770] <TB2> INFO: Decoding statistics:
[18:22:17.770] <TB2> INFO: General information:
[18:22:17.770] <TB2> INFO: 16bit words read: 127876
[18:22:17.770] <TB2> INFO: valid events total: 20480
[18:22:17.770] <TB2> INFO: empty events: 17982
[18:22:17.770] <TB2> INFO: valid events with pixels: 2498
[18:22:17.770] <TB2> INFO: valid pixel hits: 2498
[18:22:17.770] <TB2> INFO: Event errors: 0
[18:22:17.770] <TB2> INFO: start marker: 0
[18:22:17.770] <TB2> INFO: stop marker: 0
[18:22:17.770] <TB2> INFO: overflow: 0
[18:22:17.770] <TB2> INFO: invalid 5bit words: 0
[18:22:17.770] <TB2> INFO: invalid XOR eye diagram: 0
[18:22:17.770] <TB2> INFO: frame (failed synchr.): 0
[18:22:17.770] <TB2> INFO: idle data (no TBM trl): 0
[18:22:17.770] <TB2> INFO: no data (only TBM hdr): 0
[18:22:17.770] <TB2> INFO: TBM errors: 0
[18:22:17.770] <TB2> INFO: flawed TBM headers: 0
[18:22:17.770] <TB2> INFO: flawed TBM trailers: 0
[18:22:17.770] <TB2> INFO: event ID mismatches: 0
[18:22:17.770] <TB2> INFO: ROC errors: 0
[18:22:17.770] <TB2> INFO: missing ROC header(s): 0
[18:22:17.771] <TB2> INFO: misplaced readback start: 0
[18:22:17.771] <TB2> INFO: Pixel decoding errors: 0
[18:22:17.771] <TB2> INFO: pixel data incomplete: 0
[18:22:17.771] <TB2> INFO: pixel address: 0
[18:22:17.771] <TB2> INFO: pulse height fill bit: 0
[18:22:17.771] <TB2> INFO: buffer corruption: 0
[18:22:18.099] <TB2> INFO: ######################################################################
[18:22:18.099] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[18:22:18.099] <TB2> INFO: ######################################################################
[18:22:18.109] <TB2> INFO: scanning low vcal = 10
[18:22:18.339] <TB2> INFO: Expecting 41600 events.
[18:22:21.903] <TB2> INFO: 41600 events read in total (2972ms).
[18:22:21.903] <TB2> INFO: Test took 3794ms.
[18:22:21.904] <TB2> INFO: scanning low vcal = 20
[18:22:22.204] <TB2> INFO: Expecting 41600 events.
[18:22:25.795] <TB2> INFO: 41600 events read in total (2999ms).
[18:22:25.795] <TB2> INFO: Test took 3891ms.
[18:22:25.797] <TB2> INFO: scanning low vcal = 30
[18:22:26.096] <TB2> INFO: Expecting 41600 events.
[18:22:29.778] <TB2> INFO: 41600 events read in total (3091ms).
[18:22:29.778] <TB2> INFO: Test took 3981ms.
[18:22:29.781] <TB2> INFO: scanning low vcal = 40
[18:22:30.058] <TB2> INFO: Expecting 41600 events.
[18:22:33.982] <TB2> INFO: 41600 events read in total (3332ms).
[18:22:33.983] <TB2> INFO: Test took 4202ms.
[18:22:33.986] <TB2> INFO: scanning low vcal = 50
[18:22:34.263] <TB2> INFO: Expecting 41600 events.
[18:22:38.274] <TB2> INFO: 41600 events read in total (3420ms).
[18:22:38.274] <TB2> INFO: Test took 4288ms.
[18:22:38.277] <TB2> INFO: scanning low vcal = 60
[18:22:38.554] <TB2> INFO: Expecting 41600 events.
[18:22:42.573] <TB2> INFO: 41600 events read in total (3428ms).
[18:22:42.574] <TB2> INFO: Test took 4297ms.
[18:22:42.576] <TB2> INFO: scanning low vcal = 70
[18:22:42.853] <TB2> INFO: Expecting 41600 events.
[18:22:46.876] <TB2> INFO: 41600 events read in total (3431ms).
[18:22:46.877] <TB2> INFO: Test took 4301ms.
[18:22:46.880] <TB2> INFO: scanning low vcal = 80
[18:22:47.156] <TB2> INFO: Expecting 41600 events.
[18:22:51.139] <TB2> INFO: 41600 events read in total (3391ms).
[18:22:51.139] <TB2> INFO: Test took 4259ms.
[18:22:51.142] <TB2> INFO: scanning low vcal = 90
[18:22:51.419] <TB2> INFO: Expecting 41600 events.
[18:22:55.408] <TB2> INFO: 41600 events read in total (3398ms).
[18:22:55.408] <TB2> INFO: Test took 4266ms.
[18:22:55.411] <TB2> INFO: scanning low vcal = 100
[18:22:55.688] <TB2> INFO: Expecting 41600 events.
[18:22:59.662] <TB2> INFO: 41600 events read in total (3383ms).
[18:22:59.663] <TB2> INFO: Test took 4252ms.
[18:22:59.665] <TB2> INFO: scanning low vcal = 110
[18:22:59.942] <TB2> INFO: Expecting 41600 events.
[18:23:03.990] <TB2> INFO: 41600 events read in total (3456ms).
[18:23:03.991] <TB2> INFO: Test took 4326ms.
[18:23:03.994] <TB2> INFO: scanning low vcal = 120
[18:23:04.270] <TB2> INFO: Expecting 41600 events.
[18:23:08.258] <TB2> INFO: 41600 events read in total (3396ms).
[18:23:08.259] <TB2> INFO: Test took 4265ms.
[18:23:08.262] <TB2> INFO: scanning low vcal = 130
[18:23:08.538] <TB2> INFO: Expecting 41600 events.
[18:23:12.514] <TB2> INFO: 41600 events read in total (3384ms).
[18:23:12.514] <TB2> INFO: Test took 4252ms.
[18:23:12.517] <TB2> INFO: scanning low vcal = 140
[18:23:12.794] <TB2> INFO: Expecting 41600 events.
[18:23:16.774] <TB2> INFO: 41600 events read in total (3389ms).
[18:23:16.775] <TB2> INFO: Test took 4258ms.
[18:23:16.777] <TB2> INFO: scanning low vcal = 150
[18:23:17.054] <TB2> INFO: Expecting 41600 events.
[18:23:21.024] <TB2> INFO: 41600 events read in total (3378ms).
[18:23:21.025] <TB2> INFO: Test took 4248ms.
[18:23:21.027] <TB2> INFO: scanning low vcal = 160
[18:23:21.304] <TB2> INFO: Expecting 41600 events.
[18:23:25.253] <TB2> INFO: 41600 events read in total (3358ms).
[18:23:25.254] <TB2> INFO: Test took 4227ms.
[18:23:25.256] <TB2> INFO: scanning low vcal = 170
[18:23:25.533] <TB2> INFO: Expecting 41600 events.
[18:23:29.508] <TB2> INFO: 41600 events read in total (3383ms).
[18:23:29.508] <TB2> INFO: Test took 4252ms.
[18:23:29.511] <TB2> INFO: scanning low vcal = 180
[18:23:29.788] <TB2> INFO: Expecting 41600 events.
[18:23:33.740] <TB2> INFO: 41600 events read in total (3361ms).
[18:23:33.740] <TB2> INFO: Test took 4229ms.
[18:23:33.743] <TB2> INFO: scanning low vcal = 190
[18:23:34.019] <TB2> INFO: Expecting 41600 events.
[18:23:38.017] <TB2> INFO: 41600 events read in total (3406ms).
[18:23:38.017] <TB2> INFO: Test took 4274ms.
[18:23:38.020] <TB2> INFO: scanning low vcal = 200
[18:23:38.296] <TB2> INFO: Expecting 41600 events.
[18:23:42.302] <TB2> INFO: 41600 events read in total (3414ms).
[18:23:42.303] <TB2> INFO: Test took 4283ms.
[18:23:42.305] <TB2> INFO: scanning low vcal = 210
[18:23:42.582] <TB2> INFO: Expecting 41600 events.
[18:23:46.593] <TB2> INFO: 41600 events read in total (3419ms).
[18:23:46.593] <TB2> INFO: Test took 4288ms.
[18:23:46.596] <TB2> INFO: scanning low vcal = 220
[18:23:46.873] <TB2> INFO: Expecting 41600 events.
[18:23:50.855] <TB2> INFO: 41600 events read in total (3390ms).
[18:23:50.855] <TB2> INFO: Test took 4259ms.
[18:23:50.858] <TB2> INFO: scanning low vcal = 230
[18:23:51.149] <TB2> INFO: Expecting 41600 events.
[18:23:55.095] <TB2> INFO: 41600 events read in total (3354ms).
[18:23:55.096] <TB2> INFO: Test took 4238ms.
[18:23:55.098] <TB2> INFO: scanning low vcal = 240
[18:23:55.375] <TB2> INFO: Expecting 41600 events.
[18:23:59.347] <TB2> INFO: 41600 events read in total (3380ms).
[18:23:59.348] <TB2> INFO: Test took 4249ms.
[18:23:59.351] <TB2> INFO: scanning low vcal = 250
[18:23:59.627] <TB2> INFO: Expecting 41600 events.
[18:24:03.577] <TB2> INFO: 41600 events read in total (3358ms).
[18:24:03.578] <TB2> INFO: Test took 4227ms.
[18:24:03.582] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[18:24:03.858] <TB2> INFO: Expecting 41600 events.
[18:24:07.854] <TB2> INFO: 41600 events read in total (3404ms).
[18:24:07.854] <TB2> INFO: Test took 4272ms.
[18:24:07.857] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[18:24:08.134] <TB2> INFO: Expecting 41600 events.
[18:24:12.102] <TB2> INFO: 41600 events read in total (3377ms).
[18:24:12.103] <TB2> INFO: Test took 4246ms.
[18:24:12.106] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[18:24:12.395] <TB2> INFO: Expecting 41600 events.
[18:24:16.360] <TB2> INFO: 41600 events read in total (3373ms).
[18:24:16.361] <TB2> INFO: Test took 4255ms.
[18:24:16.364] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[18:24:16.640] <TB2> INFO: Expecting 41600 events.
[18:24:20.602] <TB2> INFO: 41600 events read in total (3371ms).
[18:24:20.603] <TB2> INFO: Test took 4239ms.
[18:24:20.605] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[18:24:20.882] <TB2> INFO: Expecting 41600 events.
[18:24:24.873] <TB2> INFO: 41600 events read in total (3397ms).
[18:24:24.874] <TB2> INFO: Test took 4268ms.
[18:24:25.304] <TB2> INFO: PixTestGainPedestal::measure() done
[18:25:14.826] <TB2> INFO: PixTestGainPedestal::fit() done
[18:25:14.826] <TB2> INFO: non-linearity mean: 0.984 0.979 0.980 0.927 0.948 0.980 0.980 0.980 0.982 0.980 0.981 0.971 0.948 0.949 0.979 0.944
[18:25:14.826] <TB2> INFO: non-linearity RMS: 0.004 0.004 0.005 0.202 0.174 0.003 0.003 0.004 0.004 0.003 0.005 0.009 0.123 0.036 0.005 0.155
[18:25:14.826] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//phCalibrationFitErr35_C0.dat
[18:25:14.839] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//phCalibrationFitErr35_C1.dat
[18:25:14.853] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//phCalibrationFitErr35_C2.dat
[18:25:14.866] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//phCalibrationFitErr35_C3.dat
[18:25:14.879] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//phCalibrationFitErr35_C4.dat
[18:25:14.893] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//phCalibrationFitErr35_C5.dat
[18:25:14.906] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//phCalibrationFitErr35_C6.dat
[18:25:14.920] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//phCalibrationFitErr35_C7.dat
[18:25:14.933] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//phCalibrationFitErr35_C8.dat
[18:25:14.946] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//phCalibrationFitErr35_C9.dat
[18:25:14.960] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//phCalibrationFitErr35_C10.dat
[18:25:14.973] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//phCalibrationFitErr35_C11.dat
[18:25:14.986] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//phCalibrationFitErr35_C12.dat
[18:25:14.000] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//phCalibrationFitErr35_C13.dat
[18:25:15.013] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//phCalibrationFitErr35_C14.dat
[18:25:15.026] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1058_FullQualification_2016-10-24_16h52m_1477320769//000_Fulltest_m20//phCalibrationFitErr35_C15.dat
[18:25:15.040] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 176 seconds
[18:25:15.040] <TB2> INFO: Decoding statistics:
[18:25:15.040] <TB2> INFO: General information:
[18:25:15.040] <TB2> INFO: 16bit words read: 3327818
[18:25:15.040] <TB2> INFO: valid events total: 332800
[18:25:15.040] <TB2> INFO: empty events: 0
[18:25:15.040] <TB2> INFO: valid events with pixels: 332800
[18:25:15.040] <TB2> INFO: valid pixel hits: 665509
[18:25:15.040] <TB2> INFO: Event errors: 0
[18:25:15.040] <TB2> INFO: start marker: 0
[18:25:15.040] <TB2> INFO: stop marker: 0
[18:25:15.040] <TB2> INFO: overflow: 0
[18:25:15.040] <TB2> INFO: invalid 5bit words: 0
[18:25:15.040] <TB2> INFO: invalid XOR eye diagram: 0
[18:25:15.040] <TB2> INFO: frame (failed synchr.): 0
[18:25:15.040] <TB2> INFO: idle data (no TBM trl): 0
[18:25:15.040] <TB2> INFO: no data (only TBM hdr): 0
[18:25:15.040] <TB2> INFO: TBM errors: 0
[18:25:15.040] <TB2> INFO: flawed TBM headers: 0
[18:25:15.040] <TB2> INFO: flawed TBM trailers: 0
[18:25:15.040] <TB2> INFO: event ID mismatches: 0
[18:25:15.040] <TB2> INFO: ROC errors: 0
[18:25:15.040] <TB2> INFO: missing ROC header(s): 0
[18:25:15.040] <TB2> INFO: misplaced readback start: 0
[18:25:15.040] <TB2> INFO: Pixel decoding errors: 0
[18:25:15.040] <TB2> INFO: pixel data incomplete: 0
[18:25:15.040] <TB2> INFO: pixel address: 0
[18:25:15.040] <TB2> INFO: pulse height fill bit: 0
[18:25:15.040] <TB2> INFO: buffer corruption: 0
[18:25:15.054] <TB2> INFO: Decoding statistics:
[18:25:15.054] <TB2> INFO: General information:
[18:25:15.054] <TB2> INFO: 16bit words read: 3457230
[18:25:15.054] <TB2> INFO: valid events total: 353536
[18:25:15.054] <TB2> INFO: empty events: 18238
[18:25:15.054] <TB2> INFO: valid events with pixels: 335298
[18:25:15.054] <TB2> INFO: valid pixel hits: 668007
[18:25:15.054] <TB2> INFO: Event errors: 0
[18:25:15.054] <TB2> INFO: start marker: 0
[18:25:15.054] <TB2> INFO: stop marker: 0
[18:25:15.054] <TB2> INFO: overflow: 0
[18:25:15.054] <TB2> INFO: invalid 5bit words: 0
[18:25:15.054] <TB2> INFO: invalid XOR eye diagram: 0
[18:25:15.055] <TB2> INFO: frame (failed synchr.): 0
[18:25:15.055] <TB2> INFO: idle data (no TBM trl): 0
[18:25:15.055] <TB2> INFO: no data (only TBM hdr): 0
[18:25:15.055] <TB2> INFO: TBM errors: 0
[18:25:15.055] <TB2> INFO: flawed TBM headers: 0
[18:25:15.055] <TB2> INFO: flawed TBM trailers: 0
[18:25:15.055] <TB2> INFO: event ID mismatches: 0
[18:25:15.055] <TB2> INFO: ROC errors: 0
[18:25:15.055] <TB2> INFO: missing ROC header(s): 0
[18:25:15.055] <TB2> INFO: misplaced readback start: 0
[18:25:15.055] <TB2> INFO: Pixel decoding errors: 0
[18:25:15.055] <TB2> INFO: pixel data incomplete: 0
[18:25:15.055] <TB2> INFO: pixel address: 0
[18:25:15.055] <TB2> INFO: pulse height fill bit: 0
[18:25:15.055] <TB2> INFO: buffer corruption: 0
[18:25:15.055] <TB2> INFO: enter test to run
[18:25:15.055] <TB2> INFO: test: exit no parameter change
[18:25:15.093] <TB2> QUIET: Connection to board 156 closed.
[18:25:15.094] <TB2> INFO: pXar: this is the end, my friend