[14:04:03.853] <TB3> INFO: *** Welcome to pxar ***
[14:04:03.853] <TB3> INFO: *** Today: 2016/10/24
[14:04:03.860] <TB3> INFO: *** Version: c8ba-dirty
[14:04:03.860] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters_C15.dat
[14:04:03.861] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//tbmParameters_C1b.dat
[14:04:03.861] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//defaultMaskFile.dat
[14:04:03.861] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//trimParameters_C15.dat
[14:04:03.922] <TB3> INFO: clk: 4
[14:04:03.922] <TB3> INFO: ctr: 4
[14:04:03.922] <TB3> INFO: sda: 19
[14:04:03.922] <TB3> INFO: tin: 9
[14:04:03.922] <TB3> INFO: level: 15
[14:04:03.922] <TB3> INFO: triggerdelay: 0
[14:04:03.922] <TB3> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[14:04:03.923] <TB3> INFO: Log level: INFO
[14:04:03.931] <TB3> INFO: Found DTB DTB_WWVASW
[14:04:03.940] <TB3> QUIET: Connection to board DTB_WWVASW opened.
[14:04:03.942] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[14:04:03.944] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[14:04:05.454] <TB3> INFO: DUT info:
[14:04:05.454] <TB3> INFO: The DUT currently contains the following objects:
[14:04:05.454] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[14:04:05.454] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:04:05.454] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:04:05.454] <TB3> INFO: TBM Core alpha (2): 7 registers set
[14:04:05.454] <TB3> INFO: TBM Core beta (3): 7 registers set
[14:04:05.454] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[14:04:05.454] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[14:04:05.454] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[14:04:05.454] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[14:04:05.454] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[14:04:05.454] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[14:04:05.454] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[14:04:05.454] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[14:04:05.455] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[14:04:05.455] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[14:04:05.455] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[14:04:05.455] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[14:04:05.455] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[14:04:05.455] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[14:04:05.455] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[14:04:05.455] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[14:04:05.455] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[14:04:05.856] <TB3> INFO: enter 'restricted' command line mode
[14:04:05.856] <TB3> INFO: enter test to run
[14:04:05.856] <TB3> INFO: test: pretest no parameter change
[14:04:05.856] <TB3> INFO: running: pretest
[14:04:05.864] <TB3> INFO: ######################################################################
[14:04:05.864] <TB3> INFO: PixTestPretest::doTest()
[14:04:05.864] <TB3> INFO: ######################################################################
[14:04:05.865] <TB3> INFO: ----------------------------------------------------------------------
[14:04:05.865] <TB3> INFO: PixTestPretest::programROC()
[14:04:05.865] <TB3> INFO: ----------------------------------------------------------------------
[14:04:23.879] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[14:04:23.879] <TB3> INFO: IA differences per ROC: 16.1 19.3 20.1 16.9 18.5 18.5 18.5 19.3 16.9 20.9 17.7 20.1 16.9 18.5 17.7 16.1
[14:04:23.952] <TB3> INFO: ----------------------------------------------------------------------
[14:04:23.952] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[14:04:23.952] <TB3> INFO: ----------------------------------------------------------------------
[14:04:45.253] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 389.1 mA = 24.3188 mA/ROC
[14:04:45.253] <TB3> INFO: i(loss) [mA/ROC]: 20.9 20.1 19.3 19.3 19.3 20.1 19.3 20.9 19.3 19.3 20.9 19.3 20.1 20.9 19.3 19.3
[14:04:45.285] <TB3> INFO: ----------------------------------------------------------------------
[14:04:45.285] <TB3> INFO: PixTestPretest::findTiming()
[14:04:45.285] <TB3> INFO: ----------------------------------------------------------------------
[14:04:45.286] <TB3> INFO: PixTestCmd::init()

[14:05:17.813] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[14:05:17.813] <TB3> INFO: (success/tries = 100/100), width = 4
[14:05:19.310] <TB3> INFO: ----------------------------------------------------------------------
[14:05:19.310] <TB3> INFO: PixTestPretest::findWorkingPixel()
[14:05:19.310] <TB3> INFO: ----------------------------------------------------------------------
[14:05:19.405] <TB3> INFO: Expecting 231680 events.
[14:05:29.293] <TB3> INFO: 231680 events read in total (9296ms).
[14:05:29.302] <TB3> INFO: Test took 9987ms.
[14:05:29.553] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[14:05:29.589] <TB3> INFO: ----------------------------------------------------------------------
[14:05:29.589] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[14:05:29.589] <TB3> INFO: ----------------------------------------------------------------------
[14:05:29.684] <TB3> INFO: Expecting 231680 events.
[14:05:39.715] <TB3> INFO: 231680 events read in total (9439ms).
[14:05:39.724] <TB3> INFO: Test took 10130ms.
[14:05:39.989] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[14:05:39.989] <TB3> INFO: CalDel: 82 94 91 94 93 88 93 79 79 94 86 86 93 82 89 80
[14:05:39.989] <TB3> INFO: VthrComp: 52 54 51 51 51 51 51 51 54 52 54 52 51 56 51 51
[14:05:39.992] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters_C0.dat
[14:05:39.992] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters_C1.dat
[14:05:39.993] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters_C2.dat
[14:05:39.993] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters_C3.dat
[14:05:39.993] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters_C4.dat
[14:05:39.993] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters_C5.dat
[14:05:39.993] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters_C6.dat
[14:05:39.993] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters_C7.dat
[14:05:39.993] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters_C8.dat
[14:05:39.993] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters_C9.dat
[14:05:39.993] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters_C10.dat
[14:05:39.994] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters_C11.dat
[14:05:39.994] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters_C12.dat
[14:05:39.994] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters_C13.dat
[14:05:39.994] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters_C14.dat
[14:05:39.994] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters_C15.dat
[14:05:39.994] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//tbmParameters_C0a.dat
[14:05:39.994] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//tbmParameters_C0b.dat
[14:05:39.994] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//tbmParameters_C1a.dat
[14:05:39.994] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//tbmParameters_C1b.dat
[14:05:39.994] <TB3> INFO: PixTestPretest::doTest() done, duration: 94 seconds
[14:05:40.048] <TB3> INFO: enter test to run
[14:05:40.048] <TB3> INFO: test: FullTest no parameter change
[14:05:40.048] <TB3> INFO: running: fulltest
[14:05:40.048] <TB3> INFO: ######################################################################
[14:05:40.048] <TB3> INFO: PixTestFullTest::doTest()
[14:05:40.048] <TB3> INFO: ######################################################################
[14:05:40.049] <TB3> INFO: ######################################################################
[14:05:40.049] <TB3> INFO: PixTestAlive::doTest()
[14:05:40.049] <TB3> INFO: ######################################################################
[14:05:40.050] <TB3> INFO: ----------------------------------------------------------------------
[14:05:40.050] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:05:40.051] <TB3> INFO: ----------------------------------------------------------------------
[14:05:40.293] <TB3> INFO: Expecting 41600 events.
[14:05:43.849] <TB3> INFO: 41600 events read in total (2964ms).
[14:05:43.850] <TB3> INFO: Test took 3798ms.
[14:05:44.082] <TB3> INFO: PixTestAlive::aliveTest() done
[14:05:44.082] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0
[14:05:44.083] <TB3> INFO: ----------------------------------------------------------------------
[14:05:44.083] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:05:44.083] <TB3> INFO: ----------------------------------------------------------------------
[14:05:44.336] <TB3> INFO: Expecting 41600 events.
[14:05:47.338] <TB3> INFO: 41600 events read in total (2410ms).
[14:05:47.338] <TB3> INFO: Test took 3252ms.
[14:05:47.338] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[14:05:47.576] <TB3> INFO: PixTestAlive::maskTest() done
[14:05:47.576] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:05:47.578] <TB3> INFO: ----------------------------------------------------------------------
[14:05:47.578] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:05:47.578] <TB3> INFO: ----------------------------------------------------------------------
[14:05:47.820] <TB3> INFO: Expecting 41600 events.
[14:05:51.373] <TB3> INFO: 41600 events read in total (2961ms).
[14:05:51.374] <TB3> INFO: Test took 3794ms.
[14:05:51.611] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[14:05:51.612] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:05:51.612] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[14:05:51.612] <TB3> INFO: Decoding statistics:
[14:05:51.612] <TB3> INFO: General information:
[14:05:51.612] <TB3> INFO: 16bit words read: 0
[14:05:51.612] <TB3> INFO: valid events total: 0
[14:05:51.612] <TB3> INFO: empty events: 0
[14:05:51.612] <TB3> INFO: valid events with pixels: 0
[14:05:51.612] <TB3> INFO: valid pixel hits: 0
[14:05:51.612] <TB3> INFO: Event errors: 0
[14:05:51.612] <TB3> INFO: start marker: 0
[14:05:51.612] <TB3> INFO: stop marker: 0
[14:05:51.612] <TB3> INFO: overflow: 0
[14:05:51.612] <TB3> INFO: invalid 5bit words: 0
[14:05:51.612] <TB3> INFO: invalid XOR eye diagram: 0
[14:05:51.612] <TB3> INFO: frame (failed synchr.): 0
[14:05:51.612] <TB3> INFO: idle data (no TBM trl): 0
[14:05:51.612] <TB3> INFO: no data (only TBM hdr): 0
[14:05:51.612] <TB3> INFO: TBM errors: 0
[14:05:51.612] <TB3> INFO: flawed TBM headers: 0
[14:05:51.612] <TB3> INFO: flawed TBM trailers: 0
[14:05:51.612] <TB3> INFO: event ID mismatches: 0
[14:05:51.612] <TB3> INFO: ROC errors: 0
[14:05:51.612] <TB3> INFO: missing ROC header(s): 0
[14:05:51.612] <TB3> INFO: misplaced readback start: 0
[14:05:51.612] <TB3> INFO: Pixel decoding errors: 0
[14:05:51.612] <TB3> INFO: pixel data incomplete: 0
[14:05:51.612] <TB3> INFO: pixel address: 0
[14:05:51.612] <TB3> INFO: pulse height fill bit: 0
[14:05:51.612] <TB3> INFO: buffer corruption: 0
[14:05:51.620] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C15.dat
[14:05:51.620] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//phCalibrationFitErr_C15.dat

[14:05:51.620] <TB3> INFO: ######################################################################
[14:05:51.620] <TB3> INFO: PixTestReadback::doTest()
[14:05:51.620] <TB3> INFO: ######################################################################
[14:05:51.620] <TB3> INFO: ----------------------------------------------------------------------
[14:05:51.620] <TB3> INFO: PixTestReadback::CalibrateVd()
[14:05:51.620] <TB3> INFO: ----------------------------------------------------------------------
[14:06:01.602] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C0.dat
[14:06:01.602] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C1.dat
[14:06:01.603] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C2.dat
[14:06:01.603] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C3.dat
[14:06:01.603] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C4.dat
[14:06:01.603] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C5.dat
[14:06:01.603] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C6.dat
[14:06:01.603] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C7.dat
[14:06:01.603] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C8.dat
[14:06:01.603] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C9.dat
[14:06:01.603] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C10.dat
[14:06:01.603] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C11.dat
[14:06:01.603] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C12.dat
[14:06:01.603] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C13.dat
[14:06:01.603] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C14.dat
[14:06:01.603] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C15.dat
[14:06:01.633] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[14:06:01.633] <TB3> INFO: ----------------------------------------------------------------------
[14:06:01.633] <TB3> INFO: PixTestReadback::CalibrateVa()
[14:06:01.633] <TB3> INFO: ----------------------------------------------------------------------
[14:06:11.570] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C0.dat
[14:06:11.570] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C1.dat
[14:06:11.570] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C2.dat
[14:06:11.570] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C3.dat
[14:06:11.570] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C4.dat
[14:06:11.570] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C5.dat
[14:06:11.570] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C6.dat
[14:06:11.570] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C7.dat
[14:06:11.570] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C8.dat
[14:06:11.571] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C9.dat
[14:06:11.571] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C10.dat
[14:06:11.571] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C11.dat
[14:06:11.571] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C12.dat
[14:06:11.571] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C13.dat
[14:06:11.571] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C14.dat
[14:06:11.571] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C15.dat
[14:06:11.601] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[14:06:11.601] <TB3> INFO: ----------------------------------------------------------------------
[14:06:11.601] <TB3> INFO: PixTestReadback::readbackVbg()
[14:06:11.601] <TB3> INFO: ----------------------------------------------------------------------
[14:06:19.275] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[14:06:19.275] <TB3> INFO: ----------------------------------------------------------------------
[14:06:19.275] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[14:06:19.275] <TB3> INFO: ----------------------------------------------------------------------
[14:06:19.275] <TB3> INFO: Vbg will be calibrated using Vd calibration
[14:06:19.275] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 154.2calibrated Vbg = 1.2194 :::*/*/*/*/
[14:06:19.276] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 153.7calibrated Vbg = 1.21144 :::*/*/*/*/
[14:06:19.276] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 143calibrated Vbg = 1.20888 :::*/*/*/*/
[14:06:19.276] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 166.9calibrated Vbg = 1.20974 :::*/*/*/*/
[14:06:19.276] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 153.1calibrated Vbg = 1.20685 :::*/*/*/*/
[14:06:19.276] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 157.1calibrated Vbg = 1.21583 :::*/*/*/*/
[14:06:19.276] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 152.8calibrated Vbg = 1.21784 :::*/*/*/*/
[14:06:19.276] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 149.4calibrated Vbg = 1.21217 :::*/*/*/*/
[14:06:19.276] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 160.4calibrated Vbg = 1.21217 :::*/*/*/*/
[14:06:19.276] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 157.1calibrated Vbg = 1.20663 :::*/*/*/*/
[14:06:19.276] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 160.5calibrated Vbg = 1.203 :::*/*/*/*/
[14:06:19.276] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 155.7calibrated Vbg = 1.20257 :::*/*/*/*/
[14:06:19.276] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 157.4calibrated Vbg = 1.20897 :::*/*/*/*/
[14:06:19.276] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 157.8calibrated Vbg = 1.21019 :::*/*/*/*/
[14:06:19.276] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 153.2calibrated Vbg = 1.20778 :::*/*/*/*/
[14:06:19.276] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 150.3calibrated Vbg = 1.20898 :::*/*/*/*/
[14:06:19.279] <TB3> INFO: ----------------------------------------------------------------------
[14:06:19.279] <TB3> INFO: PixTestReadback::CalibrateIa()
[14:06:19.279] <TB3> INFO: ----------------------------------------------------------------------
[14:09:00.104] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C0.dat
[14:09:00.104] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C1.dat
[14:09:00.104] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C2.dat
[14:09:00.104] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C3.dat
[14:09:00.104] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C4.dat
[14:09:00.104] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C5.dat
[14:09:00.104] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C6.dat
[14:09:00.104] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C7.dat
[14:09:00.104] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C8.dat
[14:09:00.104] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C9.dat
[14:09:00.104] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C10.dat
[14:09:00.104] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C11.dat
[14:09:00.105] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C12.dat
[14:09:00.105] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C13.dat
[14:09:00.105] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C14.dat
[14:09:00.105] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//readbackCal_C15.dat
[14:09:00.131] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[14:09:00.133] <TB3> INFO: PixTestReadback::doTest() done
[14:09:00.133] <TB3> INFO: Decoding statistics:
[14:09:00.133] <TB3> INFO: General information:
[14:09:00.133] <TB3> INFO: 16bit words read: 1536
[14:09:00.133] <TB3> INFO: valid events total: 256
[14:09:00.133] <TB3> INFO: empty events: 256
[14:09:00.133] <TB3> INFO: valid events with pixels: 0
[14:09:00.133] <TB3> INFO: valid pixel hits: 0
[14:09:00.133] <TB3> INFO: Event errors: 0
[14:09:00.133] <TB3> INFO: start marker: 0
[14:09:00.133] <TB3> INFO: stop marker: 0
[14:09:00.133] <TB3> INFO: overflow: 0
[14:09:00.133] <TB3> INFO: invalid 5bit words: 0
[14:09:00.133] <TB3> INFO: invalid XOR eye diagram: 0
[14:09:00.133] <TB3> INFO: frame (failed synchr.): 0
[14:09:00.133] <TB3> INFO: idle data (no TBM trl): 0
[14:09:00.133] <TB3> INFO: no data (only TBM hdr): 0
[14:09:00.133] <TB3> INFO: TBM errors: 0
[14:09:00.133] <TB3> INFO: flawed TBM headers: 0
[14:09:00.133] <TB3> INFO: flawed TBM trailers: 0
[14:09:00.133] <TB3> INFO: event ID mismatches: 0
[14:09:00.133] <TB3> INFO: ROC errors: 0
[14:09:00.133] <TB3> INFO: missing ROC header(s): 0
[14:09:00.133] <TB3> INFO: misplaced readback start: 0
[14:09:00.133] <TB3> INFO: Pixel decoding errors: 0
[14:09:00.133] <TB3> INFO: pixel data incomplete: 0
[14:09:00.133] <TB3> INFO: pixel address: 0
[14:09:00.133] <TB3> INFO: pulse height fill bit: 0
[14:09:00.133] <TB3> INFO: buffer corruption: 0
[14:09:00.196] <TB3> INFO: ######################################################################
[14:09:00.196] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[14:09:00.196] <TB3> INFO: ######################################################################
[14:09:00.199] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[14:09:00.211] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:09:00.211] <TB3> INFO: run 1 of 1
[14:09:00.464] <TB3> INFO: Expecting 3120000 events.
[14:09:31.274] <TB3> INFO: 672185 events read in total (30219ms).











[14:10:01.177] <TB3> INFO: 1337830 events read in total (60121ms).











[14:10:30.992] <TB3> INFO: 1999360 events read in total (89936ms).
[14:11:01.094] <TB3> INFO: 2660255 events read in total (120038ms).











[14:11:22.605] <TB3> INFO: 3120000 events read in total (141549ms).
[14:11:22.669] <TB3> INFO: Test took 142459ms.
[14:11:46.847] <TB3> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 166 seconds
[14:11:46.847] <TB3> INFO: number of dead bumps (per ROC): 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0
[14:11:46.847] <TB3> INFO: separation cut (per ROC): 105 120 108 104 107 107 108 109 107 112 106 121 106 108 104 108
[14:11:46.847] <TB3> INFO: Decoding statistics:
[14:11:46.847] <TB3> INFO: General information:
[14:11:46.847] <TB3> INFO: 16bit words read: 0
[14:11:46.847] <TB3> INFO: valid events total: 0
[14:11:46.847] <TB3> INFO: empty events: 0
[14:11:46.847] <TB3> INFO: valid events with pixels: 0
[14:11:46.847] <TB3> INFO: valid pixel hits: 0
[14:11:46.847] <TB3> INFO: Event errors: 0
[14:11:46.847] <TB3> INFO: start marker: 0
[14:11:46.847] <TB3> INFO: stop marker: 0
[14:11:46.847] <TB3> INFO: overflow: 0
[14:11:46.847] <TB3> INFO: invalid 5bit words: 0
[14:11:46.847] <TB3> INFO: invalid XOR eye diagram: 0
[14:11:46.847] <TB3> INFO: frame (failed synchr.): 0
[14:11:46.847] <TB3> INFO: idle data (no TBM trl): 0
[14:11:46.847] <TB3> INFO: no data (only TBM hdr): 0
[14:11:46.847] <TB3> INFO: TBM errors: 0
[14:11:46.847] <TB3> INFO: flawed TBM headers: 0
[14:11:46.847] <TB3> INFO: flawed TBM trailers: 0
[14:11:46.847] <TB3> INFO: event ID mismatches: 0
[14:11:46.847] <TB3> INFO: ROC errors: 0
[14:11:46.847] <TB3> INFO: missing ROC header(s): 0
[14:11:46.847] <TB3> INFO: misplaced readback start: 0
[14:11:46.847] <TB3> INFO: Pixel decoding errors: 0
[14:11:46.847] <TB3> INFO: pixel data incomplete: 0
[14:11:46.847] <TB3> INFO: pixel address: 0
[14:11:46.847] <TB3> INFO: pulse height fill bit: 0
[14:11:46.847] <TB3> INFO: buffer corruption: 0
[14:11:46.883] <TB3> INFO: ######################################################################
[14:11:46.883] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[14:11:46.883] <TB3> INFO: ######################################################################
[14:11:46.884] <TB3> INFO: ----------------------------------------------------------------------
[14:11:46.884] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[14:11:46.884] <TB3> INFO: ----------------------------------------------------------------------
[14:11:46.884] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[14:11:46.896] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[14:11:46.896] <TB3> INFO: run 1 of 1
[14:11:47.198] <TB3> INFO: Expecting 36608000 events.
[14:12:10.992] <TB3> INFO: 713350 events read in total (23202ms).
[14:12:33.943] <TB3> INFO: 1405850 events read in total (46153ms).
[14:12:57.090] <TB3> INFO: 2103200 events read in total (69300ms).
[14:13:20.382] <TB3> INFO: 2798550 events read in total (92592ms).
[14:13:43.449] <TB3> INFO: 3496300 events read in total (115659ms).
[14:14:06.404] <TB3> INFO: 4187300 events read in total (138614ms).
[14:14:29.842] <TB3> INFO: 4884100 events read in total (162052ms).
[14:14:52.986] <TB3> INFO: 5576300 events read in total (185196ms).
[14:15:16.388] <TB3> INFO: 6271800 events read in total (208598ms).
[14:15:39.517] <TB3> INFO: 6964350 events read in total (231727ms).
[14:16:02.510] <TB3> INFO: 7656250 events read in total (254720ms).
[14:16:25.736] <TB3> INFO: 8347650 events read in total (277946ms).
[14:16:49.020] <TB3> INFO: 9039950 events read in total (301230ms).
[14:17:12.144] <TB3> INFO: 9729150 events read in total (324354ms).
[14:17:35.481] <TB3> INFO: 10420500 events read in total (347691ms).
[14:17:58.847] <TB3> INFO: 11110700 events read in total (371057ms).
[14:18:22.420] <TB3> INFO: 11800700 events read in total (394630ms).
[14:18:45.614] <TB3> INFO: 12490050 events read in total (417824ms).
[14:19:09.136] <TB3> INFO: 13180800 events read in total (441346ms).
[14:19:32.342] <TB3> INFO: 13870450 events read in total (464552ms).
[14:19:55.514] <TB3> INFO: 14559400 events read in total (487724ms).
[14:20:18.827] <TB3> INFO: 15246800 events read in total (511037ms).
[14:20:42.075] <TB3> INFO: 15933900 events read in total (534285ms).
[14:21:05.205] <TB3> INFO: 16621250 events read in total (557415ms).
[14:21:28.544] <TB3> INFO: 17309150 events read in total (580754ms).
[14:21:51.851] <TB3> INFO: 17995650 events read in total (604061ms).
[14:22:15.070] <TB3> INFO: 18682250 events read in total (627280ms).
[14:22:38.275] <TB3> INFO: 19369800 events read in total (650485ms).
[14:23:01.606] <TB3> INFO: 20055150 events read in total (673816ms).
[14:23:24.745] <TB3> INFO: 20739950 events read in total (696955ms).
[14:23:48.226] <TB3> INFO: 21422100 events read in total (720436ms).
[14:24:11.435] <TB3> INFO: 22105850 events read in total (743645ms).
[14:24:34.533] <TB3> INFO: 22787550 events read in total (766743ms).
[14:24:57.652] <TB3> INFO: 23470100 events read in total (789862ms).
[14:25:20.765] <TB3> INFO: 24151500 events read in total (812975ms).
[14:25:43.688] <TB3> INFO: 24836400 events read in total (835898ms).
[14:26:06.663] <TB3> INFO: 25518750 events read in total (858873ms).
[14:26:30.152] <TB3> INFO: 26203700 events read in total (882362ms).
[14:26:53.075] <TB3> INFO: 26885450 events read in total (905285ms).
[14:27:15.915] <TB3> INFO: 27568850 events read in total (928125ms).
[14:27:38.903] <TB3> INFO: 28248800 events read in total (951113ms).
[14:28:01.955] <TB3> INFO: 28933900 events read in total (974165ms).
[14:28:25.147] <TB3> INFO: 29613800 events read in total (997357ms).
[14:28:48.545] <TB3> INFO: 30294750 events read in total (1020755ms).
[14:29:11.321] <TB3> INFO: 30971500 events read in total (1043531ms).
[14:29:34.289] <TB3> INFO: 31653100 events read in total (1066499ms).
[14:29:57.073] <TB3> INFO: 32331900 events read in total (1089283ms).
[14:30:20.295] <TB3> INFO: 33016700 events read in total (1112505ms).
[14:30:43.179] <TB3> INFO: 33700700 events read in total (1135389ms).
[14:31:06.324] <TB3> INFO: 34386050 events read in total (1158534ms).
[14:31:29.374] <TB3> INFO: 35067650 events read in total (1181584ms).
[14:31:52.857] <TB3> INFO: 35753750 events read in total (1205067ms).
[14:32:15.811] <TB3> INFO: 36447650 events read in total (1228021ms).
[14:32:21.545] <TB3> INFO: 36608000 events read in total (1233755ms).
[14:32:21.636] <TB3> INFO: Test took 1234739ms.
[14:32:22.034] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:32:23.723] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:32:25.905] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:32:27.425] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:32:29.513] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:32:31.545] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:32:33.308] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:32:35.454] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:32:37.023] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:32:39.377] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:32:41.152] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:32:42.882] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:32:44.410] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:32:45.906] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:32:47.462] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:32:48.942] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:32:50.456] <TB3> INFO: PixTestScurves::scurves() done
[14:32:50.456] <TB3> INFO: Vcal mean: 127.83 136.00 118.49 129.73 124.57 127.00 132.64 123.07 135.45 133.58 132.07 134.69 126.00 132.23 120.58 135.55
[14:32:50.456] <TB3> INFO: Vcal RMS: 6.59 6.31 5.72 5.99 5.66 5.88 5.72 5.87 6.54 5.93 6.04 6.72 6.55 6.58 5.78 6.34
[14:32:50.456] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1263 seconds
[14:32:50.456] <TB3> INFO: Decoding statistics:
[14:32:50.456] <TB3> INFO: General information:
[14:32:50.456] <TB3> INFO: 16bit words read: 0
[14:32:50.456] <TB3> INFO: valid events total: 0
[14:32:50.456] <TB3> INFO: empty events: 0
[14:32:50.456] <TB3> INFO: valid events with pixels: 0
[14:32:50.456] <TB3> INFO: valid pixel hits: 0
[14:32:50.456] <TB3> INFO: Event errors: 0
[14:32:50.456] <TB3> INFO: start marker: 0
[14:32:50.456] <TB3> INFO: stop marker: 0
[14:32:50.456] <TB3> INFO: overflow: 0
[14:32:50.456] <TB3> INFO: invalid 5bit words: 0
[14:32:50.456] <TB3> INFO: invalid XOR eye diagram: 0
[14:32:50.456] <TB3> INFO: frame (failed synchr.): 0
[14:32:50.456] <TB3> INFO: idle data (no TBM trl): 0
[14:32:50.456] <TB3> INFO: no data (only TBM hdr): 0
[14:32:50.456] <TB3> INFO: TBM errors: 0
[14:32:50.456] <TB3> INFO: flawed TBM headers: 0
[14:32:50.456] <TB3> INFO: flawed TBM trailers: 0
[14:32:50.456] <TB3> INFO: event ID mismatches: 0
[14:32:50.456] <TB3> INFO: ROC errors: 0
[14:32:50.456] <TB3> INFO: missing ROC header(s): 0
[14:32:50.456] <TB3> INFO: misplaced readback start: 0
[14:32:50.456] <TB3> INFO: Pixel decoding errors: 0
[14:32:50.456] <TB3> INFO: pixel data incomplete: 0
[14:32:50.456] <TB3> INFO: pixel address: 0
[14:32:50.456] <TB3> INFO: pulse height fill bit: 0
[14:32:50.456] <TB3> INFO: buffer corruption: 0
[14:32:50.532] <TB3> INFO: ######################################################################
[14:32:50.532] <TB3> INFO: PixTestTrim::doTest()
[14:32:50.532] <TB3> INFO: ######################################################################
[14:32:50.533] <TB3> INFO: ----------------------------------------------------------------------
[14:32:50.533] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[14:32:50.533] <TB3> INFO: ----------------------------------------------------------------------
[14:32:50.575] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[14:32:50.575] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[14:32:50.588] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:32:50.588] <TB3> INFO: run 1 of 1
[14:32:50.827] <TB3> INFO: Expecting 5025280 events.
[14:33:22.142] <TB3> INFO: 839264 events read in total (30720ms).
[14:33:52.386] <TB3> INFO: 1675624 events read in total (60965ms).
[14:34:22.476] <TB3> INFO: 2509688 events read in total (91055ms).
[14:34:52.266] <TB3> INFO: 3340016 events read in total (120844ms).
[14:35:22.466] <TB3> INFO: 4167000 events read in total (151044ms).
[14:35:53.054] <TB3> INFO: 4992880 events read in total (181632ms).
[14:35:54.612] <TB3> INFO: 5025280 events read in total (183190ms).
[14:35:54.659] <TB3> INFO: Test took 184071ms.
[14:36:10.882] <TB3> INFO: ROC 0 VthrComp = 133
[14:36:10.882] <TB3> INFO: ROC 1 VthrComp = 134
[14:36:10.882] <TB3> INFO: ROC 2 VthrComp = 122
[14:36:10.883] <TB3> INFO: ROC 3 VthrComp = 120
[14:36:10.883] <TB3> INFO: ROC 4 VthrComp = 128
[14:36:10.883] <TB3> INFO: ROC 5 VthrComp = 131
[14:36:10.884] <TB3> INFO: ROC 6 VthrComp = 131
[14:36:10.885] <TB3> INFO: ROC 7 VthrComp = 130
[14:36:10.885] <TB3> INFO: ROC 8 VthrComp = 130
[14:36:10.885] <TB3> INFO: ROC 9 VthrComp = 133
[14:36:10.885] <TB3> INFO: ROC 10 VthrComp = 131
[14:36:10.886] <TB3> INFO: ROC 11 VthrComp = 132
[14:36:10.886] <TB3> INFO: ROC 12 VthrComp = 127
[14:36:10.886] <TB3> INFO: ROC 13 VthrComp = 132
[14:36:10.886] <TB3> INFO: ROC 14 VthrComp = 126
[14:36:10.886] <TB3> INFO: ROC 15 VthrComp = 131
[14:36:11.125] <TB3> INFO: Expecting 41600 events.
[14:36:14.839] <TB3> INFO: 41600 events read in total (3123ms).
[14:36:14.840] <TB3> INFO: Test took 3952ms.
[14:36:14.850] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[14:36:14.850] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[14:36:14.861] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:36:14.861] <TB3> INFO: run 1 of 1
[14:36:15.138] <TB3> INFO: Expecting 5025280 events.
[14:36:41.515] <TB3> INFO: 592952 events read in total (25785ms).
[14:37:07.381] <TB3> INFO: 1184376 events read in total (51651ms).
[14:37:32.862] <TB3> INFO: 1774920 events read in total (77132ms).
[14:37:58.451] <TB3> INFO: 2364856 events read in total (102721ms).
[14:38:24.425] <TB3> INFO: 2952976 events read in total (128695ms).
[14:38:49.939] <TB3> INFO: 3539840 events read in total (154209ms).
[14:39:15.827] <TB3> INFO: 4125896 events read in total (180097ms).
[14:39:41.283] <TB3> INFO: 4711808 events read in total (205553ms).
[14:39:55.037] <TB3> INFO: 5025280 events read in total (219307ms).
[14:39:55.114] <TB3> INFO: Test took 220253ms.
[14:40:24.133] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 60.7373 for pixel 2/18 mean/min/max = 46.5128/32.2678/60.7577
[14:40:24.134] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 66.2824 for pixel 26/4 mean/min/max = 50.4633/34.4434/66.4832
[14:40:24.134] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 59.8833 for pixel 12/4 mean/min/max = 45.9938/32.0214/59.9662
[14:40:24.135] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 66.0008 for pixel 16/9 mean/min/max = 49.1599/32.2668/66.0529
[14:40:24.135] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 59.6586 for pixel 0/1 mean/min/max = 45.9334/31.9233/59.9434
[14:40:24.135] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 60.0497 for pixel 6/77 mean/min/max = 46.1886/32.251/60.1262
[14:40:24.136] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 65.2338 for pixel 32/14 mean/min/max = 50.6028/35.6917/65.5138
[14:40:24.136] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 59.0879 for pixel 17/14 mean/min/max = 46.417/33.5668/59.2671
[14:40:24.136] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 68.7097 for pixel 15/0 mean/min/max = 51.4155/34.0598/68.7713
[14:40:24.137] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 61.5058 for pixel 7/3 mean/min/max = 47.2368/32.8783/61.5952
[14:40:24.137] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 63.4686 for pixel 13/2 mean/min/max = 48.1261/32.5653/63.687
[14:40:24.137] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 62.8195 for pixel 16/8 mean/min/max = 47.9812/32.955/63.0075
[14:40:24.138] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 58.6711 for pixel 46/69 mean/min/max = 44.9516/31.1012/58.802
[14:40:24.138] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 65.1122 for pixel 5/21 mean/min/max = 48.396/31.3602/65.4317
[14:40:24.138] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 58.4596 for pixel 5/9 mean/min/max = 44.8773/31.2743/58.4803
[14:40:24.139] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 62.2726 for pixel 0/1 mean/min/max = 47.9386/33.5853/62.2918
[14:40:24.139] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:40:24.228] <TB3> INFO: Expecting 411648 events.
[14:40:33.853] <TB3> INFO: 411648 events read in total (9031ms).
[14:40:33.862] <TB3> INFO: Expecting 411648 events.
[14:40:43.333] <TB3> INFO: 411648 events read in total (9068ms).
[14:40:43.345] <TB3> INFO: Expecting 411648 events.
[14:40:52.798] <TB3> INFO: 411648 events read in total (9050ms).
[14:40:52.815] <TB3> INFO: Expecting 411648 events.
[14:41:02.297] <TB3> INFO: 411648 events read in total (9079ms).
[14:41:02.314] <TB3> INFO: Expecting 411648 events.
[14:41:11.698] <TB3> INFO: 411648 events read in total (8981ms).
[14:41:11.718] <TB3> INFO: Expecting 411648 events.
[14:41:21.091] <TB3> INFO: 411648 events read in total (8970ms).
[14:41:21.112] <TB3> INFO: Expecting 411648 events.
[14:41:30.496] <TB3> INFO: 411648 events read in total (8981ms).
[14:41:30.520] <TB3> INFO: Expecting 411648 events.
[14:41:39.866] <TB3> INFO: 411648 events read in total (8943ms).
[14:41:39.895] <TB3> INFO: Expecting 411648 events.
[14:41:49.252] <TB3> INFO: 411648 events read in total (8953ms).
[14:41:49.282] <TB3> INFO: Expecting 411648 events.
[14:41:58.605] <TB3> INFO: 411648 events read in total (8920ms).
[14:41:58.649] <TB3> INFO: Expecting 411648 events.
[14:42:07.942] <TB3> INFO: 411648 events read in total (8890ms).
[14:42:07.977] <TB3> INFO: Expecting 411648 events.
[14:42:17.348] <TB3> INFO: 411648 events read in total (8968ms).
[14:42:17.387] <TB3> INFO: Expecting 411648 events.
[14:42:26.750] <TB3> INFO: 411648 events read in total (8960ms).
[14:42:26.794] <TB3> INFO: Expecting 411648 events.
[14:42:36.071] <TB3> INFO: 411648 events read in total (8873ms).
[14:42:36.117] <TB3> INFO: Expecting 411648 events.
[14:42:45.397] <TB3> INFO: 411648 events read in total (8877ms).
[14:42:45.444] <TB3> INFO: Expecting 411648 events.
[14:42:54.703] <TB3> INFO: 411648 events read in total (8856ms).
[14:42:54.753] <TB3> INFO: Test took 150614ms.
[14:42:55.449] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[14:42:55.461] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:42:55.461] <TB3> INFO: run 1 of 1
[14:42:55.698] <TB3> INFO: Expecting 5025280 events.
[14:43:22.213] <TB3> INFO: 588296 events read in total (25923ms).
[14:43:48.180] <TB3> INFO: 1175904 events read in total (51890ms).
[14:44:14.131] <TB3> INFO: 1763792 events read in total (77842ms).
[14:44:40.226] <TB3> INFO: 2351216 events read in total (103936ms).
[14:45:06.365] <TB3> INFO: 2938800 events read in total (130075ms).
[14:45:32.533] <TB3> INFO: 3527416 events read in total (156243ms).
[14:45:58.840] <TB3> INFO: 4115576 events read in total (182550ms).
[14:46:25.212] <TB3> INFO: 4703632 events read in total (208922ms).
[14:46:40.796] <TB3> INFO: 5025280 events read in total (224506ms).
[14:46:40.978] <TB3> INFO: Test took 225517ms.
[14:47:07.724] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 3.219798 .. 144.264533
[14:47:07.990] <TB3> INFO: Expecting 208000 events.
[14:47:17.727] <TB3> INFO: 208000 events read in total (9145ms).
[14:47:17.729] <TB3> INFO: Test took 10004ms.
[14:47:17.799] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 3 .. 154 (-1/-1) hits flags = 528 (plus default)
[14:47:17.811] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:47:17.811] <TB3> INFO: run 1 of 1
[14:47:18.089] <TB3> INFO: Expecting 5058560 events.
[14:47:44.049] <TB3> INFO: 582448 events read in total (25369ms).
[14:48:09.448] <TB3> INFO: 1164768 events read in total (50767ms).
[14:48:35.106] <TB3> INFO: 1747096 events read in total (76425ms).
[14:49:00.542] <TB3> INFO: 2329304 events read in total (101861ms).
[14:49:25.987] <TB3> INFO: 2911528 events read in total (127307ms).
[14:49:51.455] <TB3> INFO: 3493432 events read in total (152774ms).
[14:50:17.150] <TB3> INFO: 4075616 events read in total (178469ms).
[14:50:42.888] <TB3> INFO: 4657304 events read in total (204207ms).
[14:51:00.396] <TB3> INFO: 5058560 events read in total (221715ms).
[14:51:00.502] <TB3> INFO: Test took 222692ms.
[14:51:26.909] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 26.848682 .. 45.393779
[14:51:27.194] <TB3> INFO: Expecting 208000 events.
[14:51:37.590] <TB3> INFO: 208000 events read in total (9805ms).
[14:51:37.590] <TB3> INFO: Test took 10681ms.
[14:51:37.660] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 55 (-1/-1) hits flags = 528 (plus default)
[14:51:37.673] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:51:37.673] <TB3> INFO: run 1 of 1
[14:51:37.951] <TB3> INFO: Expecting 1331200 events.
[14:52:06.138] <TB3> INFO: 666440 events read in total (27595ms).
[14:52:34.004] <TB3> INFO: 1329344 events read in total (55461ms).
[14:52:34.503] <TB3> INFO: 1331200 events read in total (55960ms).
[14:52:34.538] <TB3> INFO: Test took 56866ms.
[14:52:47.179] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 27.990371 .. 49.566000
[14:52:47.417] <TB3> INFO: Expecting 208000 events.
[14:52:57.679] <TB3> INFO: 208000 events read in total (9670ms).
[14:52:57.679] <TB3> INFO: Test took 10498ms.
[14:52:57.728] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 17 .. 59 (-1/-1) hits flags = 528 (plus default)
[14:52:57.741] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:52:57.741] <TB3> INFO: run 1 of 1
[14:52:58.019] <TB3> INFO: Expecting 1431040 events.
[14:53:26.060] <TB3> INFO: 646632 events read in total (27450ms).
[14:53:53.670] <TB3> INFO: 1292024 events read in total (55060ms).
[14:53:59.876] <TB3> INFO: 1431040 events read in total (61266ms).
[14:53:59.915] <TB3> INFO: Test took 62175ms.
[14:54:14.763] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 26.285904 .. 52.227795
[14:54:15.088] <TB3> INFO: Expecting 208000 events.
[14:54:24.780] <TB3> INFO: 208000 events read in total (9100ms).
[14:54:24.781] <TB3> INFO: Test took 10016ms.
[14:54:24.832] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 16 .. 62 (-1/-1) hits flags = 528 (plus default)
[14:54:24.845] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:54:24.845] <TB3> INFO: run 1 of 1
[14:54:25.123] <TB3> INFO: Expecting 1564160 events.
[14:54:52.845] <TB3> INFO: 639992 events read in total (27131ms).
[14:55:19.787] <TB3> INFO: 1280312 events read in total (54073ms).
[14:55:32.413] <TB3> INFO: 1564160 events read in total (66699ms).
[14:55:32.451] <TB3> INFO: Test took 67607ms.
[14:55:48.847] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[14:55:48.847] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[14:55:48.859] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:55:48.859] <TB3> INFO: run 1 of 1
[14:55:49.113] <TB3> INFO: Expecting 1364480 events.
[14:56:18.232] <TB3> INFO: 669120 events read in total (28527ms).
[14:56:46.578] <TB3> INFO: 1337024 events read in total (56873ms).
[14:56:48.146] <TB3> INFO: 1364480 events read in total (58442ms).
[14:56:48.175] <TB3> INFO: Test took 59316ms.
[14:57:03.801] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C0.dat
[14:57:03.801] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C1.dat
[14:57:03.802] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C2.dat
[14:57:03.802] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C3.dat
[14:57:03.802] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C4.dat
[14:57:03.802] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C5.dat
[14:57:03.802] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C6.dat
[14:57:03.802] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C7.dat
[14:57:03.802] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C8.dat
[14:57:03.802] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C9.dat
[14:57:03.802] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C10.dat
[14:57:03.802] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C11.dat
[14:57:03.802] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C12.dat
[14:57:03.802] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C13.dat
[14:57:03.803] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C14.dat
[14:57:03.803] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C15.dat
[14:57:03.803] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//trimParameters35_C0.dat
[14:57:03.809] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//trimParameters35_C1.dat
[14:57:03.814] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//trimParameters35_C2.dat
[14:57:03.820] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//trimParameters35_C3.dat
[14:57:03.826] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//trimParameters35_C4.dat
[14:57:03.832] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//trimParameters35_C5.dat
[14:57:03.838] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//trimParameters35_C6.dat
[14:57:03.844] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//trimParameters35_C7.dat
[14:57:03.850] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//trimParameters35_C8.dat
[14:57:03.856] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//trimParameters35_C9.dat
[14:57:03.861] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//trimParameters35_C10.dat
[14:57:03.866] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//trimParameters35_C11.dat
[14:57:03.872] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//trimParameters35_C12.dat
[14:57:03.877] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//trimParameters35_C13.dat
[14:57:03.882] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//trimParameters35_C14.dat
[14:57:03.887] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//trimParameters35_C15.dat
[14:57:03.893] <TB3> INFO: PixTestTrim::trimTest() done
[14:57:03.893] <TB3> INFO: vtrim: 138 156 128 149 106 132 154 148 162 125 148 132 126 130 120 125
[14:57:03.893] <TB3> INFO: vthrcomp: 133 134 122 120 128 131 131 130 130 133 131 132 127 132 126 131
[14:57:03.893] <TB3> INFO: vcal mean: 34.95 35.36 34.98 35.83 35.05 34.98 35.31 34.99 36.29 35.04 35.39 35.10 34.84 35.19 34.89 35.21
[14:57:03.893] <TB3> INFO: vcal RMS: 1.05 1.47 1.09 2.22 1.10 1.02 1.46 1.02 2.50 1.08 1.60 1.38 1.11 1.36 1.07 1.31
[14:57:03.893] <TB3> INFO: bits mean: 9.23 8.65 9.68 9.93 8.74 9.45 8.55 9.45 9.23 8.92 9.31 9.27 9.71 9.44 10.13 8.70
[14:57:03.893] <TB3> INFO: bits RMS: 2.73 2.57 2.53 2.58 3.07 2.66 2.40 2.46 2.59 2.77 2.70 2.58 2.75 2.70 2.56 2.76
[14:57:03.901] <TB3> INFO: ----------------------------------------------------------------------
[14:57:03.901] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[14:57:03.902] <TB3> INFO: ----------------------------------------------------------------------
[14:57:03.905] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[14:57:03.918] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:57:03.918] <TB3> INFO: run 1 of 1
[14:57:04.244] <TB3> INFO: Expecting 4160000 events.
[14:57:37.792] <TB3> INFO: 788750 events read in total (32957ms).
[14:58:10.515] <TB3> INFO: 1570340 events read in total (65680ms).
[14:58:43.581] <TB3> INFO: 2347065 events read in total (98746ms).
[14:59:15.924] <TB3> INFO: 3117740 events read in total (131089ms).
[14:59:48.175] <TB3> INFO: 3885615 events read in total (163340ms).
[14:59:59.840] <TB3> INFO: 4160000 events read in total (175005ms).
[14:59:59.936] <TB3> INFO: Test took 176019ms.
[15:00:29.815] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[15:00:29.829] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[15:00:29.829] <TB3> INFO: run 1 of 1
[15:00:30.072] <TB3> INFO: Expecting 5324800 events.
[15:01:01.811] <TB3> INFO: 695880 events read in total (31147ms).
[15:01:32.722] <TB3> INFO: 1387475 events read in total (62058ms).
[15:02:03.487] <TB3> INFO: 2076350 events read in total (92823ms).
[15:02:34.311] <TB3> INFO: 2764305 events read in total (123647ms).
[15:03:04.538] <TB3> INFO: 3448465 events read in total (153874ms).
[15:03:34.597] <TB3> INFO: 4132630 events read in total (183933ms).
[15:04:04.975] <TB3> INFO: 4815340 events read in total (214311ms).
[15:04:27.438] <TB3> INFO: 5324800 events read in total (236774ms).
[15:04:27.576] <TB3> INFO: Test took 237747ms.
[15:04:58.282] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 207 (-1/-1) hits flags = 528 (plus default)
[15:04:58.295] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[15:04:58.295] <TB3> INFO: run 1 of 1
[15:04:58.534] <TB3> INFO: Expecting 4326400 events.
[15:05:31.376] <TB3> INFO: 749000 events read in total (32251ms).
[15:06:03.608] <TB3> INFO: 1490970 events read in total (64483ms).
[15:06:35.814] <TB3> INFO: 2229920 events read in total (96689ms).
[15:07:07.867] <TB3> INFO: 2963840 events read in total (128742ms).
[15:07:39.209] <TB3> INFO: 3695715 events read in total (160084ms).
[15:08:06.911] <TB3> INFO: 4326400 events read in total (187786ms).
[15:08:07.035] <TB3> INFO: Test took 188741ms.
[15:08:36.541] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 208 (-1/-1) hits flags = 528 (plus default)
[15:08:36.553] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[15:08:36.553] <TB3> INFO: run 1 of 1
[15:08:36.791] <TB3> INFO: Expecting 4347200 events.
[15:09:09.263] <TB3> INFO: 747720 events read in total (31881ms).
[15:09:41.014] <TB3> INFO: 1488550 events read in total (63632ms).
[15:10:12.380] <TB3> INFO: 2226350 events read in total (94998ms).
[15:10:43.803] <TB3> INFO: 2959280 events read in total (126421ms).
[15:11:15.532] <TB3> INFO: 3690280 events read in total (158150ms).
[15:11:43.670] <TB3> INFO: 4347200 events read in total (186288ms).
[15:11:43.753] <TB3> INFO: Test took 187199ms.
[15:12:10.239] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[15:12:10.251] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[15:12:10.251] <TB3> INFO: run 1 of 1
[15:12:10.489] <TB3> INFO: Expecting 4305600 events.
[15:12:43.067] <TB3> INFO: 750905 events read in total (31987ms).
[15:13:14.887] <TB3> INFO: 1494490 events read in total (63807ms).
[15:13:46.880] <TB3> INFO: 2235015 events read in total (95801ms).
[15:14:18.935] <TB3> INFO: 2970185 events read in total (127855ms).
[15:14:50.699] <TB3> INFO: 3703365 events read in total (159619ms).
[15:15:17.111] <TB3> INFO: 4305600 events read in total (186031ms).
[15:15:17.220] <TB3> INFO: Test took 186969ms.
[15:15:45.581] <TB3> INFO: PixTestTrim::trimBitTest() done
[15:15:45.583] <TB3> INFO: PixTestTrim::doTest() done, duration: 2575 seconds
[15:15:45.583] <TB3> INFO: Decoding statistics:
[15:15:45.583] <TB3> INFO: General information:
[15:15:45.583] <TB3> INFO: 16bit words read: 0
[15:15:45.583] <TB3> INFO: valid events total: 0
[15:15:45.583] <TB3> INFO: empty events: 0
[15:15:45.583] <TB3> INFO: valid events with pixels: 0
[15:15:45.583] <TB3> INFO: valid pixel hits: 0
[15:15:45.583] <TB3> INFO: Event errors: 0
[15:15:45.583] <TB3> INFO: start marker: 0
[15:15:45.583] <TB3> INFO: stop marker: 0
[15:15:45.583] <TB3> INFO: overflow: 0
[15:15:45.583] <TB3> INFO: invalid 5bit words: 0
[15:15:45.583] <TB3> INFO: invalid XOR eye diagram: 0
[15:15:45.583] <TB3> INFO: frame (failed synchr.): 0
[15:15:45.583] <TB3> INFO: idle data (no TBM trl): 0
[15:15:45.583] <TB3> INFO: no data (only TBM hdr): 0
[15:15:45.583] <TB3> INFO: TBM errors: 0
[15:15:45.583] <TB3> INFO: flawed TBM headers: 0
[15:15:45.583] <TB3> INFO: flawed TBM trailers: 0
[15:15:45.583] <TB3> INFO: event ID mismatches: 0
[15:15:45.583] <TB3> INFO: ROC errors: 0
[15:15:45.583] <TB3> INFO: missing ROC header(s): 0
[15:15:45.583] <TB3> INFO: misplaced readback start: 0
[15:15:45.583] <TB3> INFO: Pixel decoding errors: 0
[15:15:45.583] <TB3> INFO: pixel data incomplete: 0
[15:15:45.583] <TB3> INFO: pixel address: 0
[15:15:45.583] <TB3> INFO: pulse height fill bit: 0
[15:15:45.583] <TB3> INFO: buffer corruption: 0
[15:15:46.281] <TB3> INFO: ######################################################################
[15:15:46.281] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[15:15:46.281] <TB3> INFO: ######################################################################
[15:15:46.518] <TB3> INFO: Expecting 41600 events.
[15:15:50.023] <TB3> INFO: 41600 events read in total (2913ms).
[15:15:50.024] <TB3> INFO: Test took 3741ms.
[15:15:50.464] <TB3> INFO: Expecting 41600 events.
[15:15:54.095] <TB3> INFO: 41600 events read in total (3039ms).
[15:15:54.096] <TB3> INFO: Test took 3867ms.
[15:15:54.386] <TB3> INFO: Expecting 41600 events.
[15:15:57.947] <TB3> INFO: 41600 events read in total (2970ms).
[15:15:57.948] <TB3> INFO: Test took 3827ms.
[15:15:58.240] <TB3> INFO: Expecting 41600 events.
[15:16:01.780] <TB3> INFO: 41600 events read in total (2948ms).
[15:16:01.781] <TB3> INFO: Test took 3806ms.
[15:16:02.071] <TB3> INFO: Expecting 41600 events.
[15:16:05.683] <TB3> INFO: 41600 events read in total (3020ms).
[15:16:05.684] <TB3> INFO: Test took 3879ms.
[15:16:05.976] <TB3> INFO: Expecting 41600 events.
[15:16:09.475] <TB3> INFO: 41600 events read in total (2907ms).
[15:16:09.476] <TB3> INFO: Test took 3765ms.
[15:16:09.784] <TB3> INFO: Expecting 41600 events.
[15:16:13.271] <TB3> INFO: 41600 events read in total (2895ms).
[15:16:13.272] <TB3> INFO: Test took 3772ms.
[15:16:13.578] <TB3> INFO: Expecting 41600 events.
[15:16:17.160] <TB3> INFO: 41600 events read in total (2990ms).
[15:16:17.161] <TB3> INFO: Test took 3862ms.
[15:16:17.452] <TB3> INFO: Expecting 41600 events.
[15:16:20.960] <TB3> INFO: 41600 events read in total (2916ms).
[15:16:20.961] <TB3> INFO: Test took 3774ms.
[15:16:21.250] <TB3> INFO: Expecting 41600 events.
[15:16:24.834] <TB3> INFO: 41600 events read in total (2992ms).
[15:16:24.835] <TB3> INFO: Test took 3849ms.
[15:16:25.124] <TB3> INFO: Expecting 41600 events.
[15:16:28.772] <TB3> INFO: 41600 events read in total (3056ms).
[15:16:28.773] <TB3> INFO: Test took 3914ms.
[15:16:29.065] <TB3> INFO: Expecting 41600 events.
[15:16:32.733] <TB3> INFO: 41600 events read in total (3077ms).
[15:16:32.734] <TB3> INFO: Test took 3934ms.
[15:16:33.023] <TB3> INFO: Expecting 41600 events.
[15:16:36.497] <TB3> INFO: 41600 events read in total (2883ms).
[15:16:36.499] <TB3> INFO: Test took 3741ms.
[15:16:36.790] <TB3> INFO: Expecting 41600 events.
[15:16:40.316] <TB3> INFO: 41600 events read in total (2934ms).
[15:16:40.317] <TB3> INFO: Test took 3792ms.
[15:16:40.609] <TB3> INFO: Expecting 41600 events.
[15:16:44.144] <TB3> INFO: 41600 events read in total (2943ms).
[15:16:44.146] <TB3> INFO: Test took 3802ms.
[15:16:44.498] <TB3> INFO: Expecting 41600 events.
[15:16:48.076] <TB3> INFO: 41600 events read in total (2987ms).
[15:16:48.078] <TB3> INFO: Test took 3905ms.
[15:16:48.367] <TB3> INFO: Expecting 41600 events.
[15:16:51.863] <TB3> INFO: 41600 events read in total (2904ms).
[15:16:51.864] <TB3> INFO: Test took 3762ms.
[15:16:52.157] <TB3> INFO: Expecting 41600 events.
[15:16:55.678] <TB3> INFO: 41600 events read in total (2930ms).
[15:16:55.679] <TB3> INFO: Test took 3788ms.
[15:16:55.969] <TB3> INFO: Expecting 41600 events.
[15:16:59.592] <TB3> INFO: 41600 events read in total (3031ms).
[15:16:59.593] <TB3> INFO: Test took 3889ms.
[15:16:59.883] <TB3> INFO: Expecting 41600 events.
[15:17:03.475] <TB3> INFO: 41600 events read in total (3000ms).
[15:17:03.476] <TB3> INFO: Test took 3859ms.
[15:17:03.773] <TB3> INFO: Expecting 41600 events.
[15:17:07.292] <TB3> INFO: 41600 events read in total (2927ms).
[15:17:07.293] <TB3> INFO: Test took 3793ms.
[15:17:07.582] <TB3> INFO: Expecting 41600 events.
[15:17:11.157] <TB3> INFO: 41600 events read in total (2983ms).
[15:17:11.158] <TB3> INFO: Test took 3841ms.
[15:17:11.448] <TB3> INFO: Expecting 41600 events.
[15:17:15.018] <TB3> INFO: 41600 events read in total (2978ms).
[15:17:15.020] <TB3> INFO: Test took 3838ms.
[15:17:15.309] <TB3> INFO: Expecting 41600 events.
[15:17:18.789] <TB3> INFO: 41600 events read in total (2889ms).
[15:17:18.790] <TB3> INFO: Test took 3746ms.
[15:17:19.081] <TB3> INFO: Expecting 41600 events.
[15:17:22.663] <TB3> INFO: 41600 events read in total (2990ms).
[15:17:22.663] <TB3> INFO: Test took 3848ms.
[15:17:22.953] <TB3> INFO: Expecting 41600 events.
[15:17:26.463] <TB3> INFO: 41600 events read in total (2918ms).
[15:17:26.464] <TB3> INFO: Test took 3776ms.
[15:17:26.754] <TB3> INFO: Expecting 41600 events.
[15:17:30.269] <TB3> INFO: 41600 events read in total (2923ms).
[15:17:30.270] <TB3> INFO: Test took 3781ms.
[15:17:30.562] <TB3> INFO: Expecting 41600 events.
[15:17:34.055] <TB3> INFO: 41600 events read in total (2901ms).
[15:17:34.056] <TB3> INFO: Test took 3760ms.
[15:17:34.345] <TB3> INFO: Expecting 41600 events.
[15:17:37.975] <TB3> INFO: 41600 events read in total (3038ms).
[15:17:37.976] <TB3> INFO: Test took 3896ms.
[15:17:38.271] <TB3> INFO: Expecting 41600 events.
[15:17:41.822] <TB3> INFO: 41600 events read in total (2959ms).
[15:17:41.823] <TB3> INFO: Test took 3818ms.
[15:17:42.113] <TB3> INFO: Expecting 2560 events.
[15:17:42.002] <TB3> INFO: 2560 events read in total (297ms).
[15:17:42.002] <TB3> INFO: Test took 1166ms.
[15:17:43.310] <TB3> INFO: Expecting 2560 events.
[15:17:44.197] <TB3> INFO: 2560 events read in total (295ms).
[15:17:44.197] <TB3> INFO: Test took 1194ms.
[15:17:44.504] <TB3> INFO: Expecting 2560 events.
[15:17:45.389] <TB3> INFO: 2560 events read in total (294ms).
[15:17:45.390] <TB3> INFO: Test took 1192ms.
[15:17:45.697] <TB3> INFO: Expecting 2560 events.
[15:17:46.590] <TB3> INFO: 2560 events read in total (301ms).
[15:17:46.591] <TB3> INFO: Test took 1200ms.
[15:17:46.897] <TB3> INFO: Expecting 2560 events.
[15:17:47.779] <TB3> INFO: 2560 events read in total (290ms).
[15:17:47.779] <TB3> INFO: Test took 1187ms.
[15:17:48.086] <TB3> INFO: Expecting 2560 events.
[15:17:48.975] <TB3> INFO: 2560 events read in total (297ms).
[15:17:48.976] <TB3> INFO: Test took 1196ms.
[15:17:49.285] <TB3> INFO: Expecting 2560 events.
[15:17:50.167] <TB3> INFO: 2560 events read in total (291ms).
[15:17:50.167] <TB3> INFO: Test took 1191ms.
[15:17:50.474] <TB3> INFO: Expecting 2560 events.
[15:17:51.354] <TB3> INFO: 2560 events read in total (288ms).
[15:17:51.354] <TB3> INFO: Test took 1186ms.
[15:17:51.662] <TB3> INFO: Expecting 2560 events.
[15:17:52.541] <TB3> INFO: 2560 events read in total (287ms).
[15:17:52.541] <TB3> INFO: Test took 1186ms.
[15:17:52.849] <TB3> INFO: Expecting 2560 events.
[15:17:53.731] <TB3> INFO: 2560 events read in total (290ms).
[15:17:53.732] <TB3> INFO: Test took 1190ms.
[15:17:54.040] <TB3> INFO: Expecting 2560 events.
[15:17:54.927] <TB3> INFO: 2560 events read in total (296ms).
[15:17:54.927] <TB3> INFO: Test took 1195ms.
[15:17:55.235] <TB3> INFO: Expecting 2560 events.
[15:17:56.127] <TB3> INFO: 2560 events read in total (300ms).
[15:17:56.127] <TB3> INFO: Test took 1200ms.
[15:17:56.436] <TB3> INFO: Expecting 2560 events.
[15:17:57.328] <TB3> INFO: 2560 events read in total (300ms).
[15:17:57.328] <TB3> INFO: Test took 1200ms.
[15:17:57.635] <TB3> INFO: Expecting 2560 events.
[15:17:58.527] <TB3> INFO: 2560 events read in total (301ms).
[15:17:58.527] <TB3> INFO: Test took 1198ms.
[15:17:58.834] <TB3> INFO: Expecting 2560 events.
[15:17:59.723] <TB3> INFO: 2560 events read in total (297ms).
[15:17:59.723] <TB3> INFO: Test took 1195ms.
[15:18:00.031] <TB3> INFO: Expecting 2560 events.
[15:18:00.916] <TB3> INFO: 2560 events read in total (293ms).
[15:18:00.917] <TB3> INFO: Test took 1193ms.
[15:18:00.920] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:18:01.224] <TB3> INFO: Expecting 655360 events.
[15:18:16.037] <TB3> INFO: 655360 events read in total (14221ms).
[15:18:16.057] <TB3> INFO: Expecting 655360 events.
[15:18:30.677] <TB3> INFO: 655360 events read in total (14217ms).
[15:18:30.696] <TB3> INFO: Expecting 655360 events.
[15:18:45.336] <TB3> INFO: 655360 events read in total (14236ms).
[15:18:45.361] <TB3> INFO: Expecting 655360 events.
[15:18:59.957] <TB3> INFO: 655360 events read in total (14193ms).
[15:18:59.986] <TB3> INFO: Expecting 655360 events.
[15:19:14.524] <TB3> INFO: 655360 events read in total (14135ms).
[15:19:14.557] <TB3> INFO: Expecting 655360 events.
[15:19:29.117] <TB3> INFO: 655360 events read in total (14157ms).
[15:19:29.156] <TB3> INFO: Expecting 655360 events.
[15:19:43.686] <TB3> INFO: 655360 events read in total (14127ms).
[15:19:43.727] <TB3> INFO: Expecting 655360 events.
[15:19:58.103] <TB3> INFO: 655360 events read in total (13973ms).
[15:19:58.192] <TB3> INFO: Expecting 655360 events.
[15:20:12.666] <TB3> INFO: 655360 events read in total (14071ms).
[15:20:12.733] <TB3> INFO: Expecting 655360 events.
[15:20:27.318] <TB3> INFO: 655360 events read in total (14182ms).
[15:20:27.429] <TB3> INFO: Expecting 655360 events.
[15:20:42.052] <TB3> INFO: 655360 events read in total (14220ms).
[15:20:42.137] <TB3> INFO: Expecting 655360 events.
[15:20:56.731] <TB3> INFO: 655360 events read in total (14191ms).
[15:20:56.845] <TB3> INFO: Expecting 655360 events.
[15:21:11.453] <TB3> INFO: 655360 events read in total (14205ms).
[15:21:11.548] <TB3> INFO: Expecting 655360 events.
[15:21:26.096] <TB3> INFO: 655360 events read in total (14145ms).
[15:21:26.224] <TB3> INFO: Expecting 655360 events.
[15:21:40.837] <TB3> INFO: 655360 events read in total (14210ms).
[15:21:40.994] <TB3> INFO: Expecting 655360 events.
[15:21:55.610] <TB3> INFO: 655360 events read in total (14213ms).
[15:21:55.743] <TB3> INFO: Test took 234823ms.
[15:21:55.853] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:21:56.110] <TB3> INFO: Expecting 655360 events.
[15:22:10.777] <TB3> INFO: 655360 events read in total (14076ms).
[15:22:10.793] <TB3> INFO: Expecting 655360 events.
[15:22:25.346] <TB3> INFO: 655360 events read in total (14150ms).
[15:22:25.366] <TB3> INFO: Expecting 655360 events.
[15:22:40.075] <TB3> INFO: 655360 events read in total (14306ms).
[15:22:40.104] <TB3> INFO: Expecting 655360 events.
[15:22:54.431] <TB3> INFO: 655360 events read in total (13924ms).
[15:22:54.459] <TB3> INFO: Expecting 655360 events.
[15:23:08.902] <TB3> INFO: 655360 events read in total (14040ms).
[15:23:08.946] <TB3> INFO: Expecting 655360 events.
[15:23:23.524] <TB3> INFO: 655360 events read in total (14175ms).
[15:23:23.561] <TB3> INFO: Expecting 655360 events.
[15:23:37.993] <TB3> INFO: 655360 events read in total (14029ms).
[15:23:38.039] <TB3> INFO: Expecting 655360 events.
[15:23:52.596] <TB3> INFO: 655360 events read in total (14154ms).
[15:23:52.649] <TB3> INFO: Expecting 655360 events.
[15:24:07.004] <TB3> INFO: 655360 events read in total (13952ms).
[15:24:07.067] <TB3> INFO: Expecting 655360 events.
[15:24:21.557] <TB3> INFO: 655360 events read in total (14087ms).
[15:24:21.625] <TB3> INFO: Expecting 655360 events.
[15:24:35.980] <TB3> INFO: 655360 events read in total (13952ms).
[15:24:36.081] <TB3> INFO: Expecting 655360 events.
[15:24:50.620] <TB3> INFO: 655360 events read in total (14136ms).
[15:24:50.745] <TB3> INFO: Expecting 655360 events.
[15:25:05.187] <TB3> INFO: 655360 events read in total (14039ms).
[15:25:05.268] <TB3> INFO: Expecting 655360 events.
[15:25:19.806] <TB3> INFO: 655360 events read in total (14135ms).
[15:25:19.899] <TB3> INFO: Expecting 655360 events.
[15:25:34.399] <TB3> INFO: 655360 events read in total (14097ms).
[15:25:34.523] <TB3> INFO: Expecting 655360 events.
[15:25:49.044] <TB3> INFO: 655360 events read in total (14117ms).
[15:25:49.248] <TB3> INFO: Test took 233395ms.
[15:25:49.451] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:25:49.457] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:25:49.462] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:25:49.468] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:25:49.473] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:25:49.479] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:25:49.484] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:25:49.490] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:25:49.495] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:25:49.501] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[15:25:49.506] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:25:49.512] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:25:49.517] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:25:49.524] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:25:49.529] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:25:49.535] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:25:49.541] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:25:49.546] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:25:49.552] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:25:49.557] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:25:49.563] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[15:25:49.568] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:25:49.574] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:25:49.580] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:25:49.585] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:25:49.620] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C0.dat
[15:25:49.620] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C1.dat
[15:25:49.620] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C2.dat
[15:25:49.620] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C3.dat
[15:25:49.621] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C4.dat
[15:25:49.621] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C5.dat
[15:25:49.621] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C6.dat
[15:25:49.621] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C7.dat
[15:25:49.621] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C8.dat
[15:25:49.621] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C9.dat
[15:25:49.621] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C10.dat
[15:25:49.621] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C11.dat
[15:25:49.621] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C12.dat
[15:25:49.621] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C13.dat
[15:25:49.621] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C14.dat
[15:25:49.622] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//dacParameters35_C15.dat
[15:25:49.886] <TB3> INFO: Expecting 41600 events.
[15:25:53.072] <TB3> INFO: 41600 events read in total (2594ms).
[15:25:53.072] <TB3> INFO: Test took 3448ms.
[15:25:53.531] <TB3> INFO: Expecting 41600 events.
[15:25:56.607] <TB3> INFO: 41600 events read in total (2484ms).
[15:25:56.609] <TB3> INFO: Test took 3322ms.
[15:25:57.071] <TB3> INFO: Expecting 41600 events.
[15:26:00.242] <TB3> INFO: 41600 events read in total (2579ms).
[15:26:00.243] <TB3> INFO: Test took 3420ms.
[15:26:00.462] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:00.552] <TB3> INFO: Expecting 2560 events.
[15:26:01.445] <TB3> INFO: 2560 events read in total (302ms).
[15:26:01.445] <TB3> INFO: Test took 983ms.
[15:26:01.447] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:01.753] <TB3> INFO: Expecting 2560 events.
[15:26:02.646] <TB3> INFO: 2560 events read in total (301ms).
[15:26:02.646] <TB3> INFO: Test took 1199ms.
[15:26:02.649] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:02.954] <TB3> INFO: Expecting 2560 events.
[15:26:03.844] <TB3> INFO: 2560 events read in total (298ms).
[15:26:03.844] <TB3> INFO: Test took 1195ms.
[15:26:03.846] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:04.152] <TB3> INFO: Expecting 2560 events.
[15:26:05.038] <TB3> INFO: 2560 events read in total (294ms).
[15:26:05.039] <TB3> INFO: Test took 1193ms.
[15:26:05.041] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:05.348] <TB3> INFO: Expecting 2560 events.
[15:26:06.236] <TB3> INFO: 2560 events read in total (296ms).
[15:26:06.236] <TB3> INFO: Test took 1195ms.
[15:26:06.240] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:06.544] <TB3> INFO: Expecting 2560 events.
[15:26:07.437] <TB3> INFO: 2560 events read in total (301ms).
[15:26:07.438] <TB3> INFO: Test took 1199ms.
[15:26:07.440] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:07.747] <TB3> INFO: Expecting 2560 events.
[15:26:08.634] <TB3> INFO: 2560 events read in total (296ms).
[15:26:08.634] <TB3> INFO: Test took 1194ms.
[15:26:08.636] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:08.943] <TB3> INFO: Expecting 2560 events.
[15:26:09.842] <TB3> INFO: 2560 events read in total (307ms).
[15:26:09.843] <TB3> INFO: Test took 1207ms.
[15:26:09.846] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:10.150] <TB3> INFO: Expecting 2560 events.
[15:26:11.039] <TB3> INFO: 2560 events read in total (297ms).
[15:26:11.040] <TB3> INFO: Test took 1194ms.
[15:26:11.043] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:11.348] <TB3> INFO: Expecting 2560 events.
[15:26:12.239] <TB3> INFO: 2560 events read in total (299ms).
[15:26:12.240] <TB3> INFO: Test took 1197ms.
[15:26:12.243] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:12.548] <TB3> INFO: Expecting 2560 events.
[15:26:13.429] <TB3> INFO: 2560 events read in total (290ms).
[15:26:13.429] <TB3> INFO: Test took 1186ms.
[15:26:13.433] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:13.736] <TB3> INFO: Expecting 2560 events.
[15:26:14.623] <TB3> INFO: 2560 events read in total (295ms).
[15:26:14.623] <TB3> INFO: Test took 1191ms.
[15:26:14.627] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:14.931] <TB3> INFO: Expecting 2560 events.
[15:26:15.820] <TB3> INFO: 2560 events read in total (298ms).
[15:26:15.821] <TB3> INFO: Test took 1194ms.
[15:26:15.824] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:16.129] <TB3> INFO: Expecting 2560 events.
[15:26:17.010] <TB3> INFO: 2560 events read in total (290ms).
[15:26:17.010] <TB3> INFO: Test took 1186ms.
[15:26:17.013] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:17.319] <TB3> INFO: Expecting 2560 events.
[15:26:18.198] <TB3> INFO: 2560 events read in total (287ms).
[15:26:18.198] <TB3> INFO: Test took 1185ms.
[15:26:18.201] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:18.507] <TB3> INFO: Expecting 2560 events.
[15:26:19.391] <TB3> INFO: 2560 events read in total (292ms).
[15:26:19.392] <TB3> INFO: Test took 1191ms.
[15:26:19.395] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:19.699] <TB3> INFO: Expecting 2560 events.
[15:26:20.588] <TB3> INFO: 2560 events read in total (298ms).
[15:26:20.589] <TB3> INFO: Test took 1194ms.
[15:26:20.592] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:20.896] <TB3> INFO: Expecting 2560 events.
[15:26:21.776] <TB3> INFO: 2560 events read in total (288ms).
[15:26:21.776] <TB3> INFO: Test took 1185ms.
[15:26:21.779] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:22.086] <TB3> INFO: Expecting 2560 events.
[15:26:22.975] <TB3> INFO: 2560 events read in total (297ms).
[15:26:22.975] <TB3> INFO: Test took 1196ms.
[15:26:22.979] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:23.283] <TB3> INFO: Expecting 2560 events.
[15:26:24.173] <TB3> INFO: 2560 events read in total (298ms).
[15:26:24.173] <TB3> INFO: Test took 1195ms.
[15:26:24.177] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:24.481] <TB3> INFO: Expecting 2560 events.
[15:26:25.376] <TB3> INFO: 2560 events read in total (303ms).
[15:26:25.376] <TB3> INFO: Test took 1200ms.
[15:26:25.379] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:25.683] <TB3> INFO: Expecting 2560 events.
[15:26:26.564] <TB3> INFO: 2560 events read in total (289ms).
[15:26:26.564] <TB3> INFO: Test took 1185ms.
[15:26:26.567] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:26.874] <TB3> INFO: Expecting 2560 events.
[15:26:27.761] <TB3> INFO: 2560 events read in total (296ms).
[15:26:27.762] <TB3> INFO: Test took 1195ms.
[15:26:27.764] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:28.069] <TB3> INFO: Expecting 2560 events.
[15:26:28.950] <TB3> INFO: 2560 events read in total (290ms).
[15:26:28.951] <TB3> INFO: Test took 1187ms.
[15:26:28.953] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:29.258] <TB3> INFO: Expecting 2560 events.
[15:26:30.146] <TB3> INFO: 2560 events read in total (296ms).
[15:26:30.146] <TB3> INFO: Test took 1193ms.
[15:26:30.149] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:30.454] <TB3> INFO: Expecting 2560 events.
[15:26:31.342] <TB3> INFO: 2560 events read in total (296ms).
[15:26:31.343] <TB3> INFO: Test took 1194ms.
[15:26:31.346] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:31.652] <TB3> INFO: Expecting 2560 events.
[15:26:32.537] <TB3> INFO: 2560 events read in total (294ms).
[15:26:32.538] <TB3> INFO: Test took 1192ms.
[15:26:32.541] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:32.846] <TB3> INFO: Expecting 2560 events.
[15:26:33.737] <TB3> INFO: 2560 events read in total (299ms).
[15:26:33.737] <TB3> INFO: Test took 1196ms.
[15:26:33.741] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:34.045] <TB3> INFO: Expecting 2560 events.
[15:26:34.935] <TB3> INFO: 2560 events read in total (298ms).
[15:26:34.935] <TB3> INFO: Test took 1194ms.
[15:26:34.939] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:35.243] <TB3> INFO: Expecting 2560 events.
[15:26:36.137] <TB3> INFO: 2560 events read in total (302ms).
[15:26:36.138] <TB3> INFO: Test took 1200ms.
[15:26:36.140] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:36.445] <TB3> INFO: Expecting 2560 events.
[15:26:37.343] <TB3> INFO: 2560 events read in total (306ms).
[15:26:37.344] <TB3> INFO: Test took 1204ms.
[15:26:37.348] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:37.652] <TB3> INFO: Expecting 2560 events.
[15:26:38.547] <TB3> INFO: 2560 events read in total (303ms).
[15:26:38.547] <TB3> INFO: Test took 1199ms.
[15:26:39.029] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 652 seconds
[15:26:39.029] <TB3> INFO: PH scale (per ROC): 52 47 38 46 48 36 50 35 37 49 30 35 46 40 43 38
[15:26:39.030] <TB3> INFO: PH offset (per ROC): 128 91 108 131 86 94 122 109 100 123 87 106 118 95 108 101
[15:26:39.039] <TB3> INFO: Decoding statistics:
[15:26:39.039] <TB3> INFO: General information:
[15:26:39.039] <TB3> INFO: 16bit words read: 127836
[15:26:39.039] <TB3> INFO: valid events total: 20480
[15:26:39.039] <TB3> INFO: empty events: 18002
[15:26:39.039] <TB3> INFO: valid events with pixels: 2478
[15:26:39.039] <TB3> INFO: valid pixel hits: 2478
[15:26:39.039] <TB3> INFO: Event errors: 0
[15:26:39.039] <TB3> INFO: start marker: 0
[15:26:39.039] <TB3> INFO: stop marker: 0
[15:26:39.039] <TB3> INFO: overflow: 0
[15:26:39.039] <TB3> INFO: invalid 5bit words: 0
[15:26:39.039] <TB3> INFO: invalid XOR eye diagram: 0
[15:26:39.039] <TB3> INFO: frame (failed synchr.): 0
[15:26:39.039] <TB3> INFO: idle data (no TBM trl): 0
[15:26:39.039] <TB3> INFO: no data (only TBM hdr): 0
[15:26:39.039] <TB3> INFO: TBM errors: 0
[15:26:39.039] <TB3> INFO: flawed TBM headers: 0
[15:26:39.039] <TB3> INFO: flawed TBM trailers: 0
[15:26:39.039] <TB3> INFO: event ID mismatches: 0
[15:26:39.039] <TB3> INFO: ROC errors: 0
[15:26:39.039] <TB3> INFO: missing ROC header(s): 0
[15:26:39.039] <TB3> INFO: misplaced readback start: 0
[15:26:39.039] <TB3> INFO: Pixel decoding errors: 0
[15:26:39.039] <TB3> INFO: pixel data incomplete: 0
[15:26:39.039] <TB3> INFO: pixel address: 0
[15:26:39.039] <TB3> INFO: pulse height fill bit: 0
[15:26:39.039] <TB3> INFO: buffer corruption: 0
[15:26:39.203] <TB3> INFO: ######################################################################
[15:26:39.203] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[15:26:39.203] <TB3> INFO: ######################################################################
[15:26:39.217] <TB3> INFO: scanning low vcal = 10
[15:26:39.457] <TB3> INFO: Expecting 41600 events.
[15:26:43.030] <TB3> INFO: 41600 events read in total (2981ms).
[15:26:43.030] <TB3> INFO: Test took 3813ms.
[15:26:43.032] <TB3> INFO: scanning low vcal = 20
[15:26:43.329] <TB3> INFO: Expecting 41600 events.
[15:26:46.941] <TB3> INFO: 41600 events read in total (3020ms).
[15:26:46.941] <TB3> INFO: Test took 3909ms.
[15:26:46.943] <TB3> INFO: scanning low vcal = 30
[15:26:47.241] <TB3> INFO: Expecting 41600 events.
[15:26:50.894] <TB3> INFO: 41600 events read in total (3061ms).
[15:26:50.895] <TB3> INFO: Test took 3952ms.
[15:26:50.898] <TB3> INFO: scanning low vcal = 40
[15:26:51.175] <TB3> INFO: Expecting 41600 events.
[15:26:55.161] <TB3> INFO: 41600 events read in total (3394ms).
[15:26:55.162] <TB3> INFO: Test took 4264ms.
[15:26:55.166] <TB3> INFO: scanning low vcal = 50
[15:26:55.443] <TB3> INFO: Expecting 41600 events.
[15:26:59.434] <TB3> INFO: 41600 events read in total (3400ms).
[15:26:59.435] <TB3> INFO: Test took 4269ms.
[15:26:59.438] <TB3> INFO: scanning low vcal = 60
[15:26:59.714] <TB3> INFO: Expecting 41600 events.
[15:27:03.722] <TB3> INFO: 41600 events read in total (3416ms).
[15:27:03.723] <TB3> INFO: Test took 4285ms.
[15:27:03.726] <TB3> INFO: scanning low vcal = 70
[15:27:04.003] <TB3> INFO: Expecting 41600 events.
[15:27:08.041] <TB3> INFO: 41600 events read in total (3446ms).
[15:27:08.041] <TB3> INFO: Test took 4315ms.
[15:27:08.044] <TB3> INFO: scanning low vcal = 80
[15:27:08.322] <TB3> INFO: Expecting 41600 events.
[15:27:12.383] <TB3> INFO: 41600 events read in total (3469ms).
[15:27:12.384] <TB3> INFO: Test took 4339ms.
[15:27:12.387] <TB3> INFO: scanning low vcal = 90
[15:27:12.664] <TB3> INFO: Expecting 41600 events.
[15:27:16.703] <TB3> INFO: 41600 events read in total (3447ms).
[15:27:16.704] <TB3> INFO: Test took 4317ms.
[15:27:16.708] <TB3> INFO: scanning low vcal = 100
[15:27:16.984] <TB3> INFO: Expecting 41600 events.
[15:27:21.008] <TB3> INFO: 41600 events read in total (3432ms).
[15:27:21.009] <TB3> INFO: Test took 4301ms.
[15:27:21.012] <TB3> INFO: scanning low vcal = 110
[15:27:21.289] <TB3> INFO: Expecting 41600 events.
[15:27:25.323] <TB3> INFO: 41600 events read in total (3442ms).
[15:27:25.323] <TB3> INFO: Test took 4311ms.
[15:27:25.327] <TB3> INFO: scanning low vcal = 120
[15:27:25.607] <TB3> INFO: Expecting 41600 events.
[15:27:29.625] <TB3> INFO: 41600 events read in total (3426ms).
[15:27:29.626] <TB3> INFO: Test took 4299ms.
[15:27:29.629] <TB3> INFO: scanning low vcal = 130
[15:27:29.906] <TB3> INFO: Expecting 41600 events.
[15:27:33.917] <TB3> INFO: 41600 events read in total (3419ms).
[15:27:33.918] <TB3> INFO: Test took 4289ms.
[15:27:33.921] <TB3> INFO: scanning low vcal = 140
[15:27:34.199] <TB3> INFO: Expecting 41600 events.
[15:27:38.261] <TB3> INFO: 41600 events read in total (3470ms).
[15:27:38.262] <TB3> INFO: Test took 4340ms.
[15:27:38.265] <TB3> INFO: scanning low vcal = 150
[15:27:38.543] <TB3> INFO: Expecting 41600 events.
[15:27:42.550] <TB3> INFO: 41600 events read in total (3415ms).
[15:27:42.550] <TB3> INFO: Test took 4285ms.
[15:27:42.553] <TB3> INFO: scanning low vcal = 160
[15:27:42.830] <TB3> INFO: Expecting 41600 events.
[15:27:46.773] <TB3> INFO: 41600 events read in total (3351ms).
[15:27:46.774] <TB3> INFO: Test took 4222ms.
[15:27:46.778] <TB3> INFO: scanning low vcal = 170
[15:27:47.054] <TB3> INFO: Expecting 41600 events.
[15:27:51.040] <TB3> INFO: 41600 events read in total (3394ms).
[15:27:51.041] <TB3> INFO: Test took 4263ms.
[15:27:51.047] <TB3> INFO: scanning low vcal = 180
[15:27:51.323] <TB3> INFO: Expecting 41600 events.
[15:27:55.288] <TB3> INFO: 41600 events read in total (3373ms).
[15:27:55.289] <TB3> INFO: Test took 4242ms.
[15:27:55.292] <TB3> INFO: scanning low vcal = 190
[15:27:55.569] <TB3> INFO: Expecting 41600 events.
[15:27:59.524] <TB3> INFO: 41600 events read in total (3364ms).
[15:27:59.530] <TB3> INFO: Test took 4238ms.
[15:27:59.533] <TB3> INFO: scanning low vcal = 200
[15:27:59.810] <TB3> INFO: Expecting 41600 events.
[15:28:03.779] <TB3> INFO: 41600 events read in total (3378ms).
[15:28:03.780] <TB3> INFO: Test took 4247ms.
[15:28:03.783] <TB3> INFO: scanning low vcal = 210
[15:28:04.061] <TB3> INFO: Expecting 41600 events.
[15:28:08.042] <TB3> INFO: 41600 events read in total (3390ms).
[15:28:08.043] <TB3> INFO: Test took 4260ms.
[15:28:08.046] <TB3> INFO: scanning low vcal = 220
[15:28:08.322] <TB3> INFO: Expecting 41600 events.
[15:28:12.300] <TB3> INFO: 41600 events read in total (3386ms).
[15:28:12.301] <TB3> INFO: Test took 4255ms.
[15:28:12.304] <TB3> INFO: scanning low vcal = 230
[15:28:12.581] <TB3> INFO: Expecting 41600 events.
[15:28:16.514] <TB3> INFO: 41600 events read in total (3341ms).
[15:28:16.515] <TB3> INFO: Test took 4211ms.
[15:28:16.519] <TB3> INFO: scanning low vcal = 240
[15:28:16.795] <TB3> INFO: Expecting 41600 events.
[15:28:20.798] <TB3> INFO: 41600 events read in total (3411ms).
[15:28:20.799] <TB3> INFO: Test took 4279ms.
[15:28:20.802] <TB3> INFO: scanning low vcal = 250
[15:28:21.079] <TB3> INFO: Expecting 41600 events.
[15:28:25.194] <TB3> INFO: 41600 events read in total (3523ms).
[15:28:25.195] <TB3> INFO: Test took 4392ms.
[15:28:25.199] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[15:28:25.475] <TB3> INFO: Expecting 41600 events.
[15:28:29.510] <TB3> INFO: 41600 events read in total (3443ms).
[15:28:29.511] <TB3> INFO: Test took 4311ms.
[15:28:29.514] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[15:28:29.791] <TB3> INFO: Expecting 41600 events.
[15:28:33.781] <TB3> INFO: 41600 events read in total (3399ms).
[15:28:33.782] <TB3> INFO: Test took 4268ms.
[15:28:33.785] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[15:28:34.061] <TB3> INFO: Expecting 41600 events.
[15:28:38.038] <TB3> INFO: 41600 events read in total (3385ms).
[15:28:38.039] <TB3> INFO: Test took 4254ms.
[15:28:38.043] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[15:28:38.319] <TB3> INFO: Expecting 41600 events.
[15:28:42.306] <TB3> INFO: 41600 events read in total (3395ms).
[15:28:42.307] <TB3> INFO: Test took 4264ms.
[15:28:42.310] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[15:28:42.602] <TB3> INFO: Expecting 41600 events.
[15:28:46.561] <TB3> INFO: 41600 events read in total (3367ms).
[15:28:46.562] <TB3> INFO: Test took 4252ms.
[15:28:47.265] <TB3> INFO: PixTestGainPedestal::measure() done
[15:29:19.976] <TB3> INFO: PixTestGainPedestal::fit() done
[15:29:19.976] <TB3> INFO: non-linearity mean: 0.977 0.949 0.938 0.979 0.952 0.956 0.979 0.931 0.960 0.980 0.913 0.914 0.964 0.951 0.947 0.936
[15:29:19.976] <TB3> INFO: non-linearity RMS: 0.007 0.058 0.097 0.005 0.058 0.165 0.004 0.149 0.145 0.004 0.138 0.129 0.027 0.053 0.074 0.151
[15:29:19.976] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//phCalibrationFitErr35_C0.dat
[15:29:19.990] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//phCalibrationFitErr35_C1.dat
[15:29:19.003] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//phCalibrationFitErr35_C2.dat
[15:29:20.016] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//phCalibrationFitErr35_C3.dat
[15:29:20.028] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//phCalibrationFitErr35_C4.dat
[15:29:20.041] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//phCalibrationFitErr35_C5.dat
[15:29:20.054] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//phCalibrationFitErr35_C6.dat
[15:29:20.067] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//phCalibrationFitErr35_C7.dat
[15:29:20.080] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//phCalibrationFitErr35_C8.dat
[15:29:20.093] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//phCalibrationFitErr35_C9.dat
[15:29:20.106] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//phCalibrationFitErr35_C10.dat
[15:29:20.119] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//phCalibrationFitErr35_C11.dat
[15:29:20.132] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//phCalibrationFitErr35_C12.dat
[15:29:20.145] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//phCalibrationFitErr35_C13.dat
[15:29:20.158] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//phCalibrationFitErr35_C14.dat
[15:29:20.171] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//003_Fulltest_p17//phCalibrationFitErr35_C15.dat
[15:29:20.184] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 160 seconds
[15:29:20.184] <TB3> INFO: Decoding statistics:
[15:29:20.184] <TB3> INFO: General information:
[15:29:20.184] <TB3> INFO: 16bit words read: 3285086
[15:29:20.184] <TB3> INFO: valid events total: 332800
[15:29:20.184] <TB3> INFO: empty events: 1918
[15:29:20.184] <TB3> INFO: valid events with pixels: 330882
[15:29:20.184] <TB3> INFO: valid pixel hits: 644143
[15:29:20.184] <TB3> INFO: Event errors: 0
[15:29:20.184] <TB3> INFO: start marker: 0
[15:29:20.184] <TB3> INFO: stop marker: 0
[15:29:20.184] <TB3> INFO: overflow: 0
[15:29:20.184] <TB3> INFO: invalid 5bit words: 0
[15:29:20.184] <TB3> INFO: invalid XOR eye diagram: 0
[15:29:20.184] <TB3> INFO: frame (failed synchr.): 0
[15:29:20.184] <TB3> INFO: idle data (no TBM trl): 0
[15:29:20.184] <TB3> INFO: no data (only TBM hdr): 0
[15:29:20.184] <TB3> INFO: TBM errors: 0
[15:29:20.184] <TB3> INFO: flawed TBM headers: 0
[15:29:20.184] <TB3> INFO: flawed TBM trailers: 0
[15:29:20.184] <TB3> INFO: event ID mismatches: 0
[15:29:20.184] <TB3> INFO: ROC errors: 0
[15:29:20.184] <TB3> INFO: missing ROC header(s): 0
[15:29:20.184] <TB3> INFO: misplaced readback start: 0
[15:29:20.184] <TB3> INFO: Pixel decoding errors: 0
[15:29:20.184] <TB3> INFO: pixel data incomplete: 0
[15:29:20.184] <TB3> INFO: pixel address: 0
[15:29:20.184] <TB3> INFO: pulse height fill bit: 0
[15:29:20.184] <TB3> INFO: buffer corruption: 0
[15:29:20.202] <TB3> INFO: Decoding statistics:
[15:29:20.202] <TB3> INFO: General information:
[15:29:20.202] <TB3> INFO: 16bit words read: 3414458
[15:29:20.202] <TB3> INFO: valid events total: 353536
[15:29:20.202] <TB3> INFO: empty events: 20176
[15:29:20.202] <TB3> INFO: valid events with pixels: 333360
[15:29:20.202] <TB3> INFO: valid pixel hits: 646621
[15:29:20.202] <TB3> INFO: Event errors: 0
[15:29:20.202] <TB3> INFO: start marker: 0
[15:29:20.202] <TB3> INFO: stop marker: 0
[15:29:20.202] <TB3> INFO: overflow: 0
[15:29:20.202] <TB3> INFO: invalid 5bit words: 0
[15:29:20.202] <TB3> INFO: invalid XOR eye diagram: 0
[15:29:20.202] <TB3> INFO: frame (failed synchr.): 0
[15:29:20.202] <TB3> INFO: idle data (no TBM trl): 0
[15:29:20.202] <TB3> INFO: no data (only TBM hdr): 0
[15:29:20.202] <TB3> INFO: TBM errors: 0
[15:29:20.202] <TB3> INFO: flawed TBM headers: 0
[15:29:20.202] <TB3> INFO: flawed TBM trailers: 0
[15:29:20.202] <TB3> INFO: event ID mismatches: 0
[15:29:20.202] <TB3> INFO: ROC errors: 0
[15:29:20.202] <TB3> INFO: missing ROC header(s): 0
[15:29:20.202] <TB3> INFO: misplaced readback start: 0
[15:29:20.202] <TB3> INFO: Pixel decoding errors: 0
[15:29:20.202] <TB3> INFO: pixel data incomplete: 0
[15:29:20.202] <TB3> INFO: pixel address: 0
[15:29:20.202] <TB3> INFO: pulse height fill bit: 0
[15:29:20.202] <TB3> INFO: buffer corruption: 0
[15:29:20.202] <TB3> INFO: enter test to run
[15:29:20.202] <TB3> INFO: test: exit no parameter change
[15:29:20.332] <TB3> QUIET: Connection to board 126 closed.
[15:29:20.333] <TB3> INFO: pXar: this is the end, my friend