[12:26:12.876] <TB3> INFO: *** Welcome to pxar ***
[12:26:12.876] <TB3> INFO: *** Today: 2016/10/24
[12:26:12.885] <TB3> INFO: *** Version: c8ba-dirty
[12:26:12.885] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters_C15.dat
[12:26:12.886] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//tbmParameters_C1b.dat
[12:26:12.886] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//defaultMaskFile.dat
[12:26:12.886] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//trimParameters_C15.dat
[12:26:12.952] <TB3> INFO: clk: 4
[12:26:12.952] <TB3> INFO: ctr: 4
[12:26:12.952] <TB3> INFO: sda: 19
[12:26:12.952] <TB3> INFO: tin: 9
[12:26:12.952] <TB3> INFO: level: 15
[12:26:12.952] <TB3> INFO: triggerdelay: 0
[12:26:12.952] <TB3> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[12:26:12.952] <TB3> INFO: Log level: INFO
[12:26:12.962] <TB3> INFO: Found DTB DTB_WWVASW
[12:26:12.970] <TB3> QUIET: Connection to board DTB_WWVASW opened.
[12:26:12.972] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[12:26:12.975] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[12:26:14.483] <TB3> INFO: DUT info:
[12:26:14.483] <TB3> INFO: The DUT currently contains the following objects:
[12:26:14.483] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[12:26:14.483] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:26:14.483] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:26:14.483] <TB3> INFO: TBM Core alpha (2): 7 registers set
[12:26:14.483] <TB3> INFO: TBM Core beta (3): 7 registers set
[12:26:14.483] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[12:26:14.483] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:26:14.483] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:26:14.483] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:26:14.483] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:26:14.483] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:26:14.483] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:26:14.483] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:26:14.483] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:26:14.483] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:26:14.484] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:26:14.484] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:26:14.484] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:26:14.484] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:26:14.484] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:26:14.484] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:26:14.484] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:26:14.885] <TB3> INFO: enter 'restricted' command line mode
[12:26:14.885] <TB3> INFO: enter test to run
[12:26:14.885] <TB3> INFO: test: pretest no parameter change
[12:26:14.885] <TB3> INFO: running: pretest
[12:26:14.891] <TB3> INFO: ######################################################################
[12:26:14.891] <TB3> INFO: PixTestPretest::doTest()
[12:26:14.891] <TB3> INFO: ######################################################################
[12:26:14.892] <TB3> INFO: ----------------------------------------------------------------------
[12:26:14.893] <TB3> INFO: PixTestPretest::programROC()
[12:26:14.893] <TB3> INFO: ----------------------------------------------------------------------
[12:26:32.907] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:26:32.907] <TB3> INFO: IA differences per ROC: 18.5 17.7 20.9 16.9 18.5 18.5 19.3 19.3 16.9 20.1 17.7 20.1 16.9 18.5 17.7 16.1
[12:26:32.972] <TB3> INFO: ----------------------------------------------------------------------
[12:26:32.972] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:26:32.972] <TB3> INFO: ----------------------------------------------------------------------
[12:26:54.276] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 403.6 mA = 25.225 mA/ROC
[12:26:54.276] <TB3> INFO: i(loss) [mA/ROC]: 22.6 21.7 20.1 20.9 21.7 21.7 21.7 20.1 20.1 20.1 20.9 20.1 20.1 21.7 20.9 21.7
[12:26:54.310] <TB3> INFO: ----------------------------------------------------------------------
[12:26:54.310] <TB3> INFO: PixTestPretest::findTiming()
[12:26:54.310] <TB3> INFO: ----------------------------------------------------------------------
[12:26:54.310] <TB3> INFO: PixTestCmd::init()

[12:27:26.422] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[12:27:26.422] <TB3> INFO: (success/tries = 100/100), width = 3
[12:27:27.926] <TB3> INFO: ----------------------------------------------------------------------
[12:27:27.926] <TB3> INFO: PixTestPretest::findWorkingPixel()
[12:27:27.926] <TB3> INFO: ----------------------------------------------------------------------
[12:27:28.020] <TB3> INFO: Expecting 231680 events.
[12:27:37.848] <TB3> INFO: 231680 events read in total (9236ms).
[12:27:37.858] <TB3> INFO: Test took 9929ms.
[12:27:38.105] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:27:38.143] <TB3> INFO: ----------------------------------------------------------------------
[12:27:38.143] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[12:27:38.143] <TB3> INFO: ----------------------------------------------------------------------
[12:27:38.239] <TB3> INFO: Expecting 231680 events.
[12:27:48.277] <TB3> INFO: 231680 events read in total (9443ms).
[12:27:48.286] <TB3> INFO: Test took 10136ms.
[12:27:48.535] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[12:27:48.535] <TB3> INFO: CalDel: 92 106 104 106 106 99 106 87 88 107 97 99 106 92 99 89
[12:27:48.535] <TB3> INFO: VthrComp: 51 55 51 51 51 51 52 51 53 51 52 51 51 56 51 51
[12:27:48.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters_C0.dat
[12:27:48.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters_C1.dat
[12:27:48.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters_C2.dat
[12:27:48.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters_C3.dat
[12:27:48.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters_C4.dat
[12:27:48.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters_C5.dat
[12:27:48.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters_C6.dat
[12:27:48.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters_C7.dat
[12:27:48.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters_C8.dat
[12:27:48.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters_C9.dat
[12:27:48.539] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters_C10.dat
[12:27:48.539] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters_C11.dat
[12:27:48.539] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters_C12.dat
[12:27:48.539] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters_C13.dat
[12:27:48.539] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters_C14.dat
[12:27:48.539] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters_C15.dat
[12:27:48.539] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//tbmParameters_C0a.dat
[12:27:48.539] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//tbmParameters_C0b.dat
[12:27:48.539] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//tbmParameters_C1a.dat
[12:27:48.539] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//tbmParameters_C1b.dat
[12:27:48.539] <TB3> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[12:27:48.593] <TB3> INFO: enter test to run
[12:27:48.593] <TB3> INFO: test: FullTest no parameter change
[12:27:48.593] <TB3> INFO: running: fulltest
[12:27:48.593] <TB3> INFO: ######################################################################
[12:27:48.593] <TB3> INFO: PixTestFullTest::doTest()
[12:27:48.593] <TB3> INFO: ######################################################################
[12:27:48.594] <TB3> INFO: ######################################################################
[12:27:48.594] <TB3> INFO: PixTestAlive::doTest()
[12:27:48.594] <TB3> INFO: ######################################################################
[12:27:48.595] <TB3> INFO: ----------------------------------------------------------------------
[12:27:48.595] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:27:48.595] <TB3> INFO: ----------------------------------------------------------------------
[12:27:48.840] <TB3> INFO: Expecting 41600 events.
[12:27:52.387] <TB3> INFO: 41600 events read in total (2956ms).
[12:27:52.388] <TB3> INFO: Test took 3791ms.
[12:27:52.621] <TB3> INFO: PixTestAlive::aliveTest() done
[12:27:52.621] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0
[12:27:52.623] <TB3> INFO: ----------------------------------------------------------------------
[12:27:52.623] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:27:52.623] <TB3> INFO: ----------------------------------------------------------------------
[12:27:52.866] <TB3> INFO: Expecting 41600 events.
[12:27:55.853] <TB3> INFO: 41600 events read in total (2395ms).
[12:27:55.854] <TB3> INFO: Test took 3229ms.
[12:27:55.854] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:27:56.100] <TB3> INFO: PixTestAlive::maskTest() done
[12:27:56.100] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:27:56.102] <TB3> INFO: ----------------------------------------------------------------------
[12:27:56.102] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:27:56.102] <TB3> INFO: ----------------------------------------------------------------------
[12:27:56.347] <TB3> INFO: Expecting 41600 events.
[12:27:59.893] <TB3> INFO: 41600 events read in total (2954ms).
[12:27:59.894] <TB3> INFO: Test took 3790ms.
[12:28:00.129] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[12:28:00.129] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:28:00.129] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[12:28:00.129] <TB3> INFO: Decoding statistics:
[12:28:00.129] <TB3> INFO: General information:
[12:28:00.129] <TB3> INFO: 16bit words read: 0
[12:28:00.129] <TB3> INFO: valid events total: 0
[12:28:00.129] <TB3> INFO: empty events: 0
[12:28:00.129] <TB3> INFO: valid events with pixels: 0
[12:28:00.129] <TB3> INFO: valid pixel hits: 0
[12:28:00.129] <TB3> INFO: Event errors: 0
[12:28:00.129] <TB3> INFO: start marker: 0
[12:28:00.129] <TB3> INFO: stop marker: 0
[12:28:00.129] <TB3> INFO: overflow: 0
[12:28:00.129] <TB3> INFO: invalid 5bit words: 0
[12:28:00.129] <TB3> INFO: invalid XOR eye diagram: 0
[12:28:00.129] <TB3> INFO: frame (failed synchr.): 0
[12:28:00.129] <TB3> INFO: idle data (no TBM trl): 0
[12:28:00.129] <TB3> INFO: no data (only TBM hdr): 0
[12:28:00.129] <TB3> INFO: TBM errors: 0
[12:28:00.129] <TB3> INFO: flawed TBM headers: 0
[12:28:00.129] <TB3> INFO: flawed TBM trailers: 0
[12:28:00.129] <TB3> INFO: event ID mismatches: 0
[12:28:00.130] <TB3> INFO: ROC errors: 0
[12:28:00.130] <TB3> INFO: missing ROC header(s): 0
[12:28:00.130] <TB3> INFO: misplaced readback start: 0
[12:28:00.130] <TB3> INFO: Pixel decoding errors: 0
[12:28:00.130] <TB3> INFO: pixel data incomplete: 0
[12:28:00.130] <TB3> INFO: pixel address: 0
[12:28:00.130] <TB3> INFO: pulse height fill bit: 0
[12:28:00.130] <TB3> INFO: buffer corruption: 0
[12:28:00.138] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C15.dat
[12:28:00.138] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[12:28:00.138] <TB3> INFO: ######################################################################
[12:28:00.138] <TB3> INFO: PixTestReadback::doTest()
[12:28:00.138] <TB3> INFO: ######################################################################
[12:28:00.138] <TB3> INFO: ----------------------------------------------------------------------
[12:28:00.138] <TB3> INFO: PixTestReadback::CalibrateVd()
[12:28:00.138] <TB3> INFO: ----------------------------------------------------------------------
[12:28:10.124] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C0.dat
[12:28:10.124] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C1.dat
[12:28:10.124] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C2.dat
[12:28:10.124] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C3.dat
[12:28:10.124] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C4.dat
[12:28:10.124] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C5.dat
[12:28:10.124] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C6.dat
[12:28:10.124] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C7.dat
[12:28:10.125] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C8.dat
[12:28:10.125] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C9.dat
[12:28:10.125] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C10.dat
[12:28:10.125] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C11.dat
[12:28:10.125] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C12.dat
[12:28:10.125] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C13.dat
[12:28:10.125] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C14.dat
[12:28:10.125] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C15.dat
[12:28:10.157] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:28:10.157] <TB3> INFO: ----------------------------------------------------------------------
[12:28:10.157] <TB3> INFO: PixTestReadback::CalibrateVa()
[12:28:10.157] <TB3> INFO: ----------------------------------------------------------------------
[12:28:20.101] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C0.dat
[12:28:20.102] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C1.dat
[12:28:20.102] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C2.dat
[12:28:20.102] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C3.dat
[12:28:20.102] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C4.dat
[12:28:20.102] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C5.dat
[12:28:20.102] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C6.dat
[12:28:20.102] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C7.dat
[12:28:20.102] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C8.dat
[12:28:20.102] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C9.dat
[12:28:20.102] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C10.dat
[12:28:20.102] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C11.dat
[12:28:20.102] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C12.dat
[12:28:20.102] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C13.dat
[12:28:20.102] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C14.dat
[12:28:20.102] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C15.dat
[12:28:20.135] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:28:20.136] <TB3> INFO: ----------------------------------------------------------------------
[12:28:20.136] <TB3> INFO: PixTestReadback::readbackVbg()
[12:28:20.136] <TB3> INFO: ----------------------------------------------------------------------
[12:28:27.818] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:28:27.818] <TB3> INFO: ----------------------------------------------------------------------
[12:28:27.818] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[12:28:27.818] <TB3> INFO: ----------------------------------------------------------------------
[12:28:27.818] <TB3> INFO: Vbg will be calibrated using Vd calibration
[12:28:27.818] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 153.3calibrated Vbg = 1.20227 :::*/*/*/*/
[12:28:27.818] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 152.7calibrated Vbg = 1.19696 :::*/*/*/*/
[12:28:27.818] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 143calibrated Vbg = 1.19966 :::*/*/*/*/
[12:28:27.818] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 167.4calibrated Vbg = 1.19773 :::*/*/*/*/
[12:28:27.818] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 152.3calibrated Vbg = 1.19212 :::*/*/*/*/
[12:28:27.818] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 157.1calibrated Vbg = 1.20169 :::*/*/*/*/
[12:28:27.819] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 151.2calibrated Vbg = 1.19765 :::*/*/*/*/
[12:28:27.819] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 147.6calibrated Vbg = 1.19585 :::*/*/*/*/
[12:28:27.819] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 160.6calibrated Vbg = 1.19886 :::*/*/*/*/
[12:28:27.819] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 156.6calibrated Vbg = 1.18878 :::*/*/*/*/
[12:28:27.819] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 159.9calibrated Vbg = 1.18911 :::*/*/*/*/
[12:28:27.819] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 154.4calibrated Vbg = 1.18978 :::*/*/*/*/
[12:28:27.819] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 155.9calibrated Vbg = 1.19286 :::*/*/*/*/
[12:28:27.819] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 156.5calibrated Vbg = 1.19784 :::*/*/*/*/
[12:28:27.819] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 152calibrated Vbg = 1.19597 :::*/*/*/*/
[12:28:27.819] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 148.5calibrated Vbg = 1.19294 :::*/*/*/*/
[12:28:27.822] <TB3> INFO: ----------------------------------------------------------------------
[12:28:27.822] <TB3> INFO: PixTestReadback::CalibrateIa()
[12:28:27.822] <TB3> INFO: ----------------------------------------------------------------------
[12:31:08.697] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C0.dat
[12:31:08.697] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C1.dat
[12:31:08.697] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C2.dat
[12:31:08.698] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C3.dat
[12:31:08.698] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C4.dat
[12:31:08.698] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C5.dat
[12:31:08.698] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C6.dat
[12:31:08.698] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C7.dat
[12:31:08.698] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C8.dat
[12:31:08.698] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C9.dat
[12:31:08.698] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C10.dat
[12:31:08.698] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C11.dat
[12:31:08.698] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C12.dat
[12:31:08.698] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C13.dat
[12:31:08.698] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C14.dat
[12:31:08.698] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//readbackCal_C15.dat
[12:31:08.728] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:31:08.730] <TB3> INFO: PixTestReadback::doTest() done
[12:31:08.730] <TB3> INFO: Decoding statistics:
[12:31:08.730] <TB3> INFO: General information:
[12:31:08.730] <TB3> INFO: 16bit words read: 1536
[12:31:08.730] <TB3> INFO: valid events total: 256
[12:31:08.730] <TB3> INFO: empty events: 256
[12:31:08.730] <TB3> INFO: valid events with pixels: 0
[12:31:08.730] <TB3> INFO: valid pixel hits: 0
[12:31:08.730] <TB3> INFO: Event errors: 0
[12:31:08.730] <TB3> INFO: start marker: 0
[12:31:08.730] <TB3> INFO: stop marker: 0
[12:31:08.730] <TB3> INFO: overflow: 0
[12:31:08.731] <TB3> INFO: invalid 5bit words: 0
[12:31:08.731] <TB3> INFO: invalid XOR eye diagram: 0
[12:31:08.731] <TB3> INFO: frame (failed synchr.): 0
[12:31:08.731] <TB3> INFO: idle data (no TBM trl): 0
[12:31:08.731] <TB3> INFO: no data (only TBM hdr): 0
[12:31:08.731] <TB3> INFO: TBM errors: 0
[12:31:08.731] <TB3> INFO: flawed TBM headers: 0
[12:31:08.731] <TB3> INFO: flawed TBM trailers: 0
[12:31:08.731] <TB3> INFO: event ID mismatches: 0
[12:31:08.731] <TB3> INFO: ROC errors: 0
[12:31:08.731] <TB3> INFO: missing ROC header(s): 0
[12:31:08.731] <TB3> INFO: misplaced readback start: 0
[12:31:08.731] <TB3> INFO: Pixel decoding errors: 0
[12:31:08.731] <TB3> INFO: pixel data incomplete: 0
[12:31:08.731] <TB3> INFO: pixel address: 0
[12:31:08.731] <TB3> INFO: pulse height fill bit: 0
[12:31:08.731] <TB3> INFO: buffer corruption: 0
[12:31:08.786] <TB3> INFO: ######################################################################
[12:31:08.786] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:31:08.786] <TB3> INFO: ######################################################################
[12:31:08.788] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[12:31:08.802] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:31:08.802] <TB3> INFO: run 1 of 1
[12:31:09.050] <TB3> INFO: Expecting 3120000 events.
[12:31:40.130] <TB3> INFO: 661885 events read in total (30488ms).











[12:32:10.246] <TB3> INFO: 1316700 events read in total (60604ms).











[12:32:40.560] <TB3> INFO: 1967425 events read in total (90918ms).











[12:33:10.509] <TB3> INFO: 2617365 events read in total (120867ms).











[12:33:33.999] <TB3> INFO: 3120000 events read in total (144357ms).
[12:33:34.063] <TB3> INFO: Test took 145262ms.
[12:33:59.840] <TB3> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 171 seconds
[12:33:59.840] <TB3> INFO: number of dead bumps (per ROC): 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0
[12:33:59.840] <TB3> INFO: separation cut (per ROC): 107 124 106 104 112 109 112 99 109 111 104 118 108 111 107 111
[12:33:59.840] <TB3> INFO: Decoding statistics:
[12:33:59.840] <TB3> INFO: General information:
[12:33:59.840] <TB3> INFO: 16bit words read: 0
[12:33:59.840] <TB3> INFO: valid events total: 0
[12:33:59.840] <TB3> INFO: empty events: 0
[12:33:59.840] <TB3> INFO: valid events with pixels: 0
[12:33:59.840] <TB3> INFO: valid pixel hits: 0
[12:33:59.840] <TB3> INFO: Event errors: 0
[12:33:59.841] <TB3> INFO: start marker: 0
[12:33:59.841] <TB3> INFO: stop marker: 0
[12:33:59.841] <TB3> INFO: overflow: 0
[12:33:59.841] <TB3> INFO: invalid 5bit words: 0
[12:33:59.841] <TB3> INFO: invalid XOR eye diagram: 0
[12:33:59.841] <TB3> INFO: frame (failed synchr.): 0
[12:33:59.841] <TB3> INFO: idle data (no TBM trl): 0
[12:33:59.841] <TB3> INFO: no data (only TBM hdr): 0
[12:33:59.841] <TB3> INFO: TBM errors: 0
[12:33:59.841] <TB3> INFO: flawed TBM headers: 0
[12:33:59.841] <TB3> INFO: flawed TBM trailers: 0
[12:33:59.841] <TB3> INFO: event ID mismatches: 0
[12:33:59.841] <TB3> INFO: ROC errors: 0
[12:33:59.841] <TB3> INFO: missing ROC header(s): 0
[12:33:59.841] <TB3> INFO: misplaced readback start: 0
[12:33:59.841] <TB3> INFO: Pixel decoding errors: 0
[12:33:59.841] <TB3> INFO: pixel data incomplete: 0
[12:33:59.841] <TB3> INFO: pixel address: 0
[12:33:59.841] <TB3> INFO: pulse height fill bit: 0
[12:33:59.841] <TB3> INFO: buffer corruption: 0
[12:33:59.878] <TB3> INFO: ######################################################################
[12:33:59.878] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:33:59.878] <TB3> INFO: ######################################################################
[12:33:59.878] <TB3> INFO: ----------------------------------------------------------------------
[12:33:59.878] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:33:59.878] <TB3> INFO: ----------------------------------------------------------------------
[12:33:59.878] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[12:33:59.892] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[12:33:59.892] <TB3> INFO: run 1 of 1
[12:34:00.142] <TB3> INFO: Expecting 36608000 events.
[12:34:24.244] <TB3> INFO: 693300 events read in total (23510ms).
[12:34:47.045] <TB3> INFO: 1367850 events read in total (46311ms).
[12:35:10.252] <TB3> INFO: 2046800 events read in total (69518ms).
[12:35:33.213] <TB3> INFO: 2721550 events read in total (92479ms).
[12:35:56.294] <TB3> INFO: 3399550 events read in total (115560ms).
[12:36:19.561] <TB3> INFO: 4073150 events read in total (138827ms).
[12:36:42.829] <TB3> INFO: 4750350 events read in total (162095ms).
[12:37:06.157] <TB3> INFO: 5425800 events read in total (185423ms).
[12:37:29.891] <TB3> INFO: 6101300 events read in total (209157ms).
[12:37:53.248] <TB3> INFO: 6775900 events read in total (232514ms).
[12:38:16.618] <TB3> INFO: 7450550 events read in total (255884ms).
[12:38:39.772] <TB3> INFO: 8123900 events read in total (279038ms).
[12:39:02.958] <TB3> INFO: 8798600 events read in total (302224ms).
[12:39:25.994] <TB3> INFO: 9471400 events read in total (325260ms).
[12:39:48.774] <TB3> INFO: 10143500 events read in total (348040ms).
[12:40:11.659] <TB3> INFO: 10818150 events read in total (370925ms).
[12:40:34.702] <TB3> INFO: 11489800 events read in total (393968ms).
[12:40:57.629] <TB3> INFO: 12163350 events read in total (416895ms).
[12:41:20.502] <TB3> INFO: 12833800 events read in total (439768ms).
[12:41:43.315] <TB3> INFO: 13507200 events read in total (462581ms).
[12:42:06.396] <TB3> INFO: 14177050 events read in total (485662ms).
[12:42:29.303] <TB3> INFO: 14850000 events read in total (508569ms).
[12:42:52.157] <TB3> INFO: 15517200 events read in total (531423ms).
[12:43:15.447] <TB3> INFO: 16188400 events read in total (554713ms).
[12:43:38.648] <TB3> INFO: 16857800 events read in total (577914ms).
[12:44:01.795] <TB3> INFO: 17528550 events read in total (601061ms).
[12:44:25.142] <TB3> INFO: 18196750 events read in total (624409ms).
[12:44:48.733] <TB3> INFO: 18867150 events read in total (647999ms).
[12:45:11.829] <TB3> INFO: 19536800 events read in total (671095ms).
[12:45:35.211] <TB3> INFO: 20205400 events read in total (694477ms).
[12:45:58.468] <TB3> INFO: 20872600 events read in total (717734ms).
[12:46:21.803] <TB3> INFO: 21539800 events read in total (741069ms).
[12:46:44.946] <TB3> INFO: 22206600 events read in total (764212ms).
[12:47:08.291] <TB3> INFO: 22870750 events read in total (787557ms).
[12:47:31.467] <TB3> INFO: 23537400 events read in total (810733ms).
[12:47:54.405] <TB3> INFO: 24202050 events read in total (833671ms).
[12:48:17.398] <TB3> INFO: 24870800 events read in total (856664ms).
[12:48:40.056] <TB3> INFO: 25536600 events read in total (879322ms).
[12:49:02.966] <TB3> INFO: 26204600 events read in total (902232ms).
[12:49:25.726] <TB3> INFO: 26870800 events read in total (924992ms).
[12:49:48.491] <TB3> INFO: 27537550 events read in total (947757ms).
[12:50:11.367] <TB3> INFO: 28201200 events read in total (970633ms).
[12:50:34.395] <TB3> INFO: 28869900 events read in total (993661ms).
[12:50:57.425] <TB3> INFO: 29533150 events read in total (1016691ms).
[12:51:20.153] <TB3> INFO: 30198300 events read in total (1039419ms).
[12:51:43.179] <TB3> INFO: 30859950 events read in total (1062445ms).
[12:52:06.004] <TB3> INFO: 31526200 events read in total (1085270ms).
[12:52:28.897] <TB3> INFO: 32190250 events read in total (1108163ms).
[12:52:51.885] <TB3> INFO: 32857800 events read in total (1131151ms).
[12:53:14.707] <TB3> INFO: 33526350 events read in total (1153973ms).
[12:53:37.649] <TB3> INFO: 34195100 events read in total (1176915ms).
[12:54:00.689] <TB3> INFO: 34863400 events read in total (1199955ms).
[12:54:23.575] <TB3> INFO: 35532250 events read in total (1222841ms).
[12:54:46.176] <TB3> INFO: 36205050 events read in total (1245442ms).
[12:55:00.188] <TB3> INFO: 36608000 events read in total (1259454ms).
[12:55:00.261] <TB3> INFO: Test took 1260368ms.
[12:55:00.775] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:55:02.759] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:55:04.787] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:55:06.975] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:55:09.159] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:55:11.294] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:55:12.884] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:55:14.996] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:55:17.185] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:55:19.473] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:55:21.927] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:55:24.419] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:55:26.878] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:55:29.414] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:55:31.815] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:55:34.363] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:55:36.201] <TB3> INFO: PixTestScurves::scurves() done
[12:55:36.201] <TB3> INFO: Vcal mean: 118.60 129.88 108.56 122.27 119.72 120.00 128.01 107.18 127.28 123.42 121.58 124.99 114.78 124.18 112.88 129.36
[12:55:36.202] <TB3> INFO: Vcal RMS: 6.03 6.49 5.20 5.88 5.45 5.70 5.68 4.76 6.60 6.11 6.01 6.98 5.90 6.46 4.89 6.38
[12:55:36.202] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1296 seconds
[12:55:36.202] <TB3> INFO: Decoding statistics:
[12:55:36.202] <TB3> INFO: General information:
[12:55:36.202] <TB3> INFO: 16bit words read: 0
[12:55:36.202] <TB3> INFO: valid events total: 0
[12:55:36.202] <TB3> INFO: empty events: 0
[12:55:36.202] <TB3> INFO: valid events with pixels: 0
[12:55:36.202] <TB3> INFO: valid pixel hits: 0
[12:55:36.202] <TB3> INFO: Event errors: 0
[12:55:36.202] <TB3> INFO: start marker: 0
[12:55:36.202] <TB3> INFO: stop marker: 0
[12:55:36.202] <TB3> INFO: overflow: 0
[12:55:36.202] <TB3> INFO: invalid 5bit words: 0
[12:55:36.202] <TB3> INFO: invalid XOR eye diagram: 0
[12:55:36.202] <TB3> INFO: frame (failed synchr.): 0
[12:55:36.202] <TB3> INFO: idle data (no TBM trl): 0
[12:55:36.202] <TB3> INFO: no data (only TBM hdr): 0
[12:55:36.202] <TB3> INFO: TBM errors: 0
[12:55:36.202] <TB3> INFO: flawed TBM headers: 0
[12:55:36.202] <TB3> INFO: flawed TBM trailers: 0
[12:55:36.202] <TB3> INFO: event ID mismatches: 0
[12:55:36.202] <TB3> INFO: ROC errors: 0
[12:55:36.202] <TB3> INFO: missing ROC header(s): 0
[12:55:36.202] <TB3> INFO: misplaced readback start: 0
[12:55:36.202] <TB3> INFO: Pixel decoding errors: 0
[12:55:36.202] <TB3> INFO: pixel data incomplete: 0
[12:55:36.202] <TB3> INFO: pixel address: 0
[12:55:36.202] <TB3> INFO: pulse height fill bit: 0
[12:55:36.202] <TB3> INFO: buffer corruption: 0
[12:55:36.275] <TB3> INFO: ######################################################################
[12:55:36.275] <TB3> INFO: PixTestTrim::doTest()
[12:55:36.275] <TB3> INFO: ######################################################################
[12:55:36.276] <TB3> INFO: ----------------------------------------------------------------------
[12:55:36.276] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[12:55:36.276] <TB3> INFO: ----------------------------------------------------------------------
[12:55:36.318] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:55:36.318] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:55:36.331] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:55:36.331] <TB3> INFO: run 1 of 1
[12:55:36.568] <TB3> INFO: Expecting 5025280 events.
[12:56:07.322] <TB3> INFO: 831952 events read in total (30153ms).
[12:56:37.809] <TB3> INFO: 1660976 events read in total (60640ms).
[12:57:07.717] <TB3> INFO: 2487128 events read in total (90549ms).
[12:57:37.733] <TB3> INFO: 3308688 events read in total (120564ms).
[12:58:07.997] <TB3> INFO: 4127464 events read in total (150828ms).
[12:58:38.155] <TB3> INFO: 4945312 events read in total (180986ms).
[12:58:41.556] <TB3> INFO: 5025280 events read in total (184387ms).
[12:58:41.605] <TB3> INFO: Test took 185275ms.
[12:58:57.239] <TB3> INFO: ROC 0 VthrComp = 131
[12:58:57.239] <TB3> INFO: ROC 1 VthrComp = 133
[12:58:57.239] <TB3> INFO: ROC 2 VthrComp = 117
[12:58:57.239] <TB3> INFO: ROC 3 VthrComp = 124
[12:58:57.239] <TB3> INFO: ROC 4 VthrComp = 133
[12:58:57.239] <TB3> INFO: ROC 5 VthrComp = 132
[12:58:57.240] <TB3> INFO: ROC 6 VthrComp = 135
[12:58:57.240] <TB3> INFO: ROC 7 VthrComp = 116
[12:58:57.240] <TB3> INFO: ROC 8 VthrComp = 130
[12:58:57.240] <TB3> INFO: ROC 9 VthrComp = 130
[12:58:57.240] <TB3> INFO: ROC 10 VthrComp = 124
[12:58:57.240] <TB3> INFO: ROC 11 VthrComp = 129
[12:58:57.240] <TB3> INFO: ROC 12 VthrComp = 121
[12:58:57.240] <TB3> INFO: ROC 13 VthrComp = 131
[12:58:57.241] <TB3> INFO: ROC 14 VthrComp = 126
[12:58:57.241] <TB3> INFO: ROC 15 VthrComp = 134
[12:58:57.480] <TB3> INFO: Expecting 41600 events.
[12:59:01.005] <TB3> INFO: 41600 events read in total (2934ms).
[12:59:01.006] <TB3> INFO: Test took 3763ms.
[12:59:01.015] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:59:01.015] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:59:01.026] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:59:01.027] <TB3> INFO: run 1 of 1
[12:59:01.304] <TB3> INFO: Expecting 5025280 events.
[12:59:27.906] <TB3> INFO: 591880 events read in total (26010ms).
[12:59:53.409] <TB3> INFO: 1182360 events read in total (51513ms).
[13:00:19.198] <TB3> INFO: 1772552 events read in total (77302ms).
[13:00:45.052] <TB3> INFO: 2362328 events read in total (103156ms).
[13:01:11.407] <TB3> INFO: 2950000 events read in total (129511ms).
[13:01:37.284] <TB3> INFO: 3535792 events read in total (155388ms).
[13:02:02.929] <TB3> INFO: 4121192 events read in total (181033ms).
[13:02:28.597] <TB3> INFO: 4706048 events read in total (206701ms).
[13:02:42.704] <TB3> INFO: 5025280 events read in total (220808ms).
[13:02:42.775] <TB3> INFO: Test took 221749ms.
[13:03:12.455] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 59.6438 for pixel 0/45 mean/min/max = 45.7579/31.8489/59.6668
[13:03:12.456] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 70.0248 for pixel 15/79 mean/min/max = 53.5944/37.0899/70.099
[13:03:12.456] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 58.7241 for pixel 6/22 mean/min/max = 45.199/31.4032/58.9947
[13:03:12.457] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 62.521 for pixel 1/10 mean/min/max = 46.5249/30.1656/62.8842
[13:03:12.457] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 58.7207 for pixel 9/14 mean/min/max = 46.3724/33.2594/59.4855
[13:03:12.458] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 59.2882 for pixel 19/2 mean/min/max = 45.9218/32.2849/59.5586
[13:03:12.458] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 65.8864 for pixel 44/5 mean/min/max = 51.2099/36.5109/65.909
[13:03:12.458] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 58.1558 for pixel 6/18 mean/min/max = 45.2963/32.2584/58.3342
[13:03:12.459] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 64.5422 for pixel 0/75 mean/min/max = 48.3575/31.8151/64.8998
[13:03:12.460] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 60.1161 for pixel 51/2 mean/min/max = 45.9398/31.7017/60.1778
[13:03:12.460] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 61.7785 for pixel 18/4 mean/min/max = 46.2916/30.7233/61.8599
[13:03:12.460] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 61.3137 for pixel 12/0 mean/min/max = 46.5928/31.6161/61.5694
[13:03:12.461] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 58.6812 for pixel 26/69 mean/min/max = 45.1783/31.5959/58.7607
[13:03:12.461] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 65.1693 for pixel 5/21 mean/min/max = 48.9112/32.5096/65.3127
[13:03:12.462] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 57.0558 for pixel 4/42 mean/min/max = 44.1685/30.8137/57.5233
[13:03:12.462] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 61.9526 for pixel 48/1 mean/min/max = 48.2559/34.4799/62.0319
[13:03:12.463] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:03:12.551] <TB3> INFO: Expecting 411648 events.
[13:03:21.815] <TB3> INFO: 411648 events read in total (8672ms).
[13:03:21.823] <TB3> INFO: Expecting 411648 events.
[13:03:31.104] <TB3> INFO: 411648 events read in total (8878ms).
[13:03:31.115] <TB3> INFO: Expecting 411648 events.
[13:03:40.380] <TB3> INFO: 411648 events read in total (8862ms).
[13:03:40.394] <TB3> INFO: Expecting 411648 events.
[13:03:49.713] <TB3> INFO: 411648 events read in total (8916ms).
[13:03:49.730] <TB3> INFO: Expecting 411648 events.
[13:03:59.052] <TB3> INFO: 411648 events read in total (8918ms).
[13:03:59.071] <TB3> INFO: Expecting 411648 events.
[13:04:08.417] <TB3> INFO: 411648 events read in total (8943ms).
[13:04:08.439] <TB3> INFO: Expecting 411648 events.
[13:04:17.796] <TB3> INFO: 411648 events read in total (8953ms).
[13:04:17.823] <TB3> INFO: Expecting 411648 events.
[13:04:27.094] <TB3> INFO: 411648 events read in total (8868ms).
[13:04:27.123] <TB3> INFO: Expecting 411648 events.
[13:04:36.288] <TB3> INFO: 411648 events read in total (8762ms).
[13:04:36.319] <TB3> INFO: Expecting 411648 events.
[13:04:45.581] <TB3> INFO: 411648 events read in total (8859ms).
[13:04:45.617] <TB3> INFO: Expecting 411648 events.
[13:04:54.938] <TB3> INFO: 411648 events read in total (8918ms).
[13:04:54.982] <TB3> INFO: Expecting 411648 events.
[13:05:04.320] <TB3> INFO: 411648 events read in total (8935ms).
[13:05:04.362] <TB3> INFO: Expecting 411648 events.
[13:05:13.687] <TB3> INFO: 411648 events read in total (8922ms).
[13:05:13.781] <TB3> INFO: Expecting 411648 events.
[13:05:23.142] <TB3> INFO: 411648 events read in total (8958ms).
[13:05:23.190] <TB3> INFO: Expecting 411648 events.
[13:05:32.415] <TB3> INFO: 411648 events read in total (8822ms).
[13:05:32.476] <TB3> INFO: Expecting 411648 events.
[13:05:42.028] <TB3> INFO: 411648 events read in total (9149ms).
[13:05:42.098] <TB3> INFO: Test took 149636ms.
[13:05:42.899] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[13:05:42.913] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:05:42.913] <TB3> INFO: run 1 of 1
[13:05:43.174] <TB3> INFO: Expecting 5025280 events.
[13:06:09.804] <TB3> INFO: 585808 events read in total (26039ms).
[13:06:36.299] <TB3> INFO: 1170832 events read in total (52534ms).
[13:07:02.364] <TB3> INFO: 1755728 events read in total (78599ms).
[13:07:28.291] <TB3> INFO: 2340568 events read in total (104526ms).
[13:07:54.517] <TB3> INFO: 2922848 events read in total (130752ms).
[13:08:20.839] <TB3> INFO: 3505928 events read in total (157074ms).
[13:08:47.303] <TB3> INFO: 4088856 events read in total (183538ms).
[13:09:13.566] <TB3> INFO: 4670696 events read in total (209801ms).
[13:09:30.152] <TB3> INFO: 5025280 events read in total (226387ms).
[13:09:30.300] <TB3> INFO: Test took 227387ms.
[13:09:55.080] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 1.500000 .. 146.929645
[13:09:55.317] <TB3> INFO: Expecting 208000 events.
[13:10:05.104] <TB3> INFO: 208000 events read in total (9195ms).
[13:10:05.105] <TB3> INFO: Test took 10024ms.
[13:10:05.156] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 156 (-1/-1) hits flags = 528 (plus default)
[13:10:05.169] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:10:05.169] <TB3> INFO: run 1 of 1
[13:10:05.446] <TB3> INFO: Expecting 5191680 events.
[13:10:31.733] <TB3> INFO: 583856 events read in total (25695ms).
[13:10:57.369] <TB3> INFO: 1167816 events read in total (51331ms).
[13:11:23.174] <TB3> INFO: 1751784 events read in total (77136ms).
[13:11:49.252] <TB3> INFO: 2335576 events read in total (103214ms).
[13:12:14.727] <TB3> INFO: 2919744 events read in total (128689ms).
[13:12:40.367] <TB3> INFO: 3503168 events read in total (154329ms).
[13:13:06.072] <TB3> INFO: 4087120 events read in total (180034ms).
[13:13:31.680] <TB3> INFO: 4670720 events read in total (205642ms).
[13:13:55.703] <TB3> INFO: 5191680 events read in total (229665ms).
[13:13:55.835] <TB3> INFO: Test took 230667ms.
[13:14:23.758] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 27.500000 .. 45.742337
[13:14:23.999] <TB3> INFO: Expecting 208000 events.
[13:14:34.007] <TB3> INFO: 208000 events read in total (9416ms).
[13:14:34.009] <TB3> INFO: Test took 10249ms.
[13:14:34.084] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 55 (-1/-1) hits flags = 528 (plus default)
[13:14:34.097] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:14:34.097] <TB3> INFO: run 1 of 1
[13:14:34.375] <TB3> INFO: Expecting 1297920 events.
[13:15:03.075] <TB3> INFO: 658648 events read in total (28108ms).
[13:15:31.185] <TB3> INFO: 1297920 events read in total (56218ms).
[13:15:31.220] <TB3> INFO: Test took 57124ms.
[13:15:43.669] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 23.801310 .. 47.000127
[13:15:43.908] <TB3> INFO: Expecting 208000 events.
[13:15:53.499] <TB3> INFO: 208000 events read in total (9000ms).
[13:15:53.500] <TB3> INFO: Test took 9829ms.
[13:15:53.548] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 13 .. 57 (-1/-1) hits flags = 528 (plus default)
[13:15:53.564] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:15:53.564] <TB3> INFO: run 1 of 1
[13:15:53.843] <TB3> INFO: Expecting 1497600 events.
[13:16:22.652] <TB3> INFO: 667240 events read in total (28217ms).
[13:16:51.318] <TB3> INFO: 1332928 events read in total (56883ms).
[13:16:58.678] <TB3> INFO: 1497600 events read in total (64243ms).
[13:16:58.711] <TB3> INFO: Test took 65146ms.
[13:17:11.496] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 23.707853 .. 48.478898
[13:17:11.738] <TB3> INFO: Expecting 208000 events.
[13:17:21.323] <TB3> INFO: 208000 events read in total (8993ms).
[13:17:21.324] <TB3> INFO: Test took 9827ms.
[13:17:21.392] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 13 .. 58 (-1/-1) hits flags = 528 (plus default)
[13:17:21.406] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:17:21.406] <TB3> INFO: run 1 of 1
[13:17:21.685] <TB3> INFO: Expecting 1530880 events.
[13:17:49.382] <TB3> INFO: 662520 events read in total (27106ms).
[13:18:17.143] <TB3> INFO: 1324312 events read in total (54867ms).
[13:18:26.070] <TB3> INFO: 1530880 events read in total (63794ms).
[13:18:26.112] <TB3> INFO: Test took 64707ms.
[13:18:40.476] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:18:40.476] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[13:18:40.489] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:18:40.489] <TB3> INFO: run 1 of 1
[13:18:40.725] <TB3> INFO: Expecting 1364480 events.
[13:19:08.984] <TB3> INFO: 667128 events read in total (27668ms).
[13:19:36.216] <TB3> INFO: 1333400 events read in total (54900ms).
[13:19:37.920] <TB3> INFO: 1364480 events read in total (56605ms).
[13:19:37.951] <TB3> INFO: Test took 57463ms.
[13:19:50.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C0.dat
[13:19:50.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C1.dat
[13:19:50.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C2.dat
[13:19:50.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C3.dat
[13:19:50.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C4.dat
[13:19:50.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C5.dat
[13:19:50.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C6.dat
[13:19:50.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C7.dat
[13:19:50.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C8.dat
[13:19:50.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C9.dat
[13:19:50.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C10.dat
[13:19:50.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C11.dat
[13:19:50.370] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C12.dat
[13:19:50.370] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C13.dat
[13:19:50.370] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C14.dat
[13:19:50.370] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C15.dat
[13:19:50.370] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//trimParameters35_C0.dat
[13:19:50.375] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//trimParameters35_C1.dat
[13:19:50.379] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//trimParameters35_C2.dat
[13:19:50.384] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//trimParameters35_C3.dat
[13:19:50.389] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//trimParameters35_C4.dat
[13:19:50.393] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//trimParameters35_C5.dat
[13:19:50.398] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//trimParameters35_C6.dat
[13:19:50.402] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//trimParameters35_C7.dat
[13:19:50.407] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//trimParameters35_C8.dat
[13:19:50.412] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//trimParameters35_C9.dat
[13:19:50.417] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//trimParameters35_C10.dat
[13:19:50.421] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//trimParameters35_C11.dat
[13:19:50.426] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//trimParameters35_C12.dat
[13:19:50.431] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//trimParameters35_C13.dat
[13:19:50.435] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//trimParameters35_C14.dat
[13:19:50.440] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//trimParameters35_C15.dat
[13:19:50.445] <TB3> INFO: PixTestTrim::trimTest() done
[13:19:50.445] <TB3> INFO: vtrim: 133 185 118 145 133 138 158 136 132 128 149 128 135 144 111 156
[13:19:50.445] <TB3> INFO: vthrcomp: 131 133 117 124 133 132 135 116 130 130 124 129 121 131 126 134
[13:19:50.445] <TB3> INFO: vcal mean: 34.98 35.05 34.94 34.99 35.08 34.95 35.01 34.88 35.04 34.91 35.00 34.94 34.97 34.99 34.95 34.99
[13:19:50.445] <TB3> INFO: vcal RMS: 1.05 1.18 1.00 1.38 0.99 1.01 1.09 1.00 1.14 1.02 1.24 1.27 1.05 1.17 1.04 1.08
[13:19:50.445] <TB3> INFO: bits mean: 9.03 7.81 9.40 9.90 9.02 9.32 7.64 9.67 8.45 9.45 9.80 9.52 9.72 9.40 9.71 8.97
[13:19:50.445] <TB3> INFO: bits RMS: 2.88 2.28 2.78 2.74 2.68 2.68 2.41 2.57 3.00 2.75 2.67 2.64 2.65 2.45 2.85 2.37
[13:19:50.452] <TB3> INFO: ----------------------------------------------------------------------
[13:19:50.452] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[13:19:50.452] <TB3> INFO: ----------------------------------------------------------------------
[13:19:50.455] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[13:19:50.466] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:19:50.466] <TB3> INFO: run 1 of 1
[13:19:50.719] <TB3> INFO: Expecting 4160000 events.
[13:20:23.453] <TB3> INFO: 761655 events read in total (32143ms).
[13:20:55.870] <TB3> INFO: 1517525 events read in total (64560ms).
[13:21:27.839] <TB3> INFO: 2268875 events read in total (96529ms).
[13:21:59.832] <TB3> INFO: 3015245 events read in total (128522ms).
[13:22:32.169] <TB3> INFO: 3760630 events read in total (160859ms).
[13:22:49.652] <TB3> INFO: 4160000 events read in total (178342ms).
[13:22:49.721] <TB3> INFO: Test took 179255ms.
[13:23:18.470] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 207 (-1/-1) hits flags = 528 (plus default)
[13:23:18.483] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:23:18.483] <TB3> INFO: run 1 of 1
[13:23:18.721] <TB3> INFO: Expecting 4326400 events.
[13:23:50.934] <TB3> INFO: 724655 events read in total (31621ms).
[13:24:22.474] <TB3> INFO: 1445180 events read in total (63161ms).
[13:24:53.856] <TB3> INFO: 2162340 events read in total (94543ms).
[13:25:25.147] <TB3> INFO: 2876125 events read in total (125834ms).
[13:25:56.524] <TB3> INFO: 3588670 events read in total (157211ms).
[13:26:28.006] <TB3> INFO: 4302730 events read in total (188693ms).
[13:26:29.413] <TB3> INFO: 4326400 events read in total (190100ms).
[13:26:29.493] <TB3> INFO: Test took 191010ms.
[13:26:58.121] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[13:26:58.134] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:26:58.134] <TB3> INFO: run 1 of 1
[13:26:58.370] <TB3> INFO: Expecting 4160000 events.
[13:27:30.562] <TB3> INFO: 735670 events read in total (31601ms).
[13:28:02.277] <TB3> INFO: 1466140 events read in total (63316ms).
[13:28:34.196] <TB3> INFO: 2193740 events read in total (95235ms).
[13:29:05.793] <TB3> INFO: 2916875 events read in total (126832ms).
[13:29:37.117] <TB3> INFO: 3638675 events read in total (158156ms).
[13:29:59.949] <TB3> INFO: 4160000 events read in total (180988ms).
[13:30:00.038] <TB3> INFO: Test took 181904ms.
[13:30:28.505] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 200 (-1/-1) hits flags = 528 (plus default)
[13:30:28.518] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:30:28.518] <TB3> INFO: run 1 of 1
[13:30:28.797] <TB3> INFO: Expecting 4180800 events.
[13:31:01.215] <TB3> INFO: 734220 events read in total (31827ms).
[13:31:32.889] <TB3> INFO: 1463420 events read in total (63501ms).
[13:32:04.331] <TB3> INFO: 2189775 events read in total (94943ms).
[13:32:35.845] <TB3> INFO: 2911790 events read in total (126457ms).
[13:33:07.563] <TB3> INFO: 3632380 events read in total (158175ms).
[13:33:31.289] <TB3> INFO: 4180800 events read in total (181901ms).
[13:33:31.373] <TB3> INFO: Test took 182856ms.
[13:33:57.556] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[13:33:57.569] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:33:57.569] <TB3> INFO: run 1 of 1
[13:33:57.807] <TB3> INFO: Expecting 4160000 events.
[13:34:30.284] <TB3> INFO: 735855 events read in total (31885ms).
[13:35:02.141] <TB3> INFO: 1466380 events read in total (63742ms).
[13:35:34.081] <TB3> INFO: 2193900 events read in total (95682ms).
[13:36:06.033] <TB3> INFO: 2917430 events read in total (127634ms).
[13:36:38.054] <TB3> INFO: 3639330 events read in total (159655ms).
[13:37:00.530] <TB3> INFO: 4160000 events read in total (182131ms).
[13:37:00.755] <TB3> INFO: Test took 183185ms.
[13:37:28.711] <TB3> INFO: PixTestTrim::trimBitTest() done
[13:37:28.712] <TB3> INFO: PixTestTrim::doTest() done, duration: 2512 seconds
[13:37:28.712] <TB3> INFO: Decoding statistics:
[13:37:28.712] <TB3> INFO: General information:
[13:37:28.712] <TB3> INFO: 16bit words read: 0
[13:37:28.712] <TB3> INFO: valid events total: 0
[13:37:28.712] <TB3> INFO: empty events: 0
[13:37:28.712] <TB3> INFO: valid events with pixels: 0
[13:37:28.712] <TB3> INFO: valid pixel hits: 0
[13:37:28.712] <TB3> INFO: Event errors: 0
[13:37:28.713] <TB3> INFO: start marker: 0
[13:37:28.713] <TB3> INFO: stop marker: 0
[13:37:28.713] <TB3> INFO: overflow: 0
[13:37:28.713] <TB3> INFO: invalid 5bit words: 0
[13:37:28.713] <TB3> INFO: invalid XOR eye diagram: 0
[13:37:28.713] <TB3> INFO: frame (failed synchr.): 0
[13:37:28.713] <TB3> INFO: idle data (no TBM trl): 0
[13:37:28.713] <TB3> INFO: no data (only TBM hdr): 0
[13:37:28.713] <TB3> INFO: TBM errors: 0
[13:37:28.713] <TB3> INFO: flawed TBM headers: 0
[13:37:28.713] <TB3> INFO: flawed TBM trailers: 0
[13:37:28.713] <TB3> INFO: event ID mismatches: 0
[13:37:28.713] <TB3> INFO: ROC errors: 0
[13:37:28.713] <TB3> INFO: missing ROC header(s): 0
[13:37:28.713] <TB3> INFO: misplaced readback start: 0
[13:37:28.713] <TB3> INFO: Pixel decoding errors: 0
[13:37:28.713] <TB3> INFO: pixel data incomplete: 0
[13:37:28.713] <TB3> INFO: pixel address: 0
[13:37:28.713] <TB3> INFO: pulse height fill bit: 0
[13:37:28.713] <TB3> INFO: buffer corruption: 0
[13:37:29.369] <TB3> INFO: ######################################################################
[13:37:29.369] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:37:29.369] <TB3> INFO: ######################################################################
[13:37:29.613] <TB3> INFO: Expecting 41600 events.
[13:37:33.083] <TB3> INFO: 41600 events read in total (2879ms).
[13:37:33.083] <TB3> INFO: Test took 3712ms.
[13:37:33.526] <TB3> INFO: Expecting 41600 events.
[13:37:37.097] <TB3> INFO: 41600 events read in total (2980ms).
[13:37:37.099] <TB3> INFO: Test took 3812ms.
[13:37:37.390] <TB3> INFO: Expecting 41600 events.
[13:37:41.009] <TB3> INFO: 41600 events read in total (3027ms).
[13:37:41.010] <TB3> INFO: Test took 3885ms.
[13:37:41.300] <TB3> INFO: Expecting 41600 events.
[13:37:44.827] <TB3> INFO: 41600 events read in total (2928ms).
[13:37:44.828] <TB3> INFO: Test took 3793ms.
[13:37:45.119] <TB3> INFO: Expecting 41600 events.
[13:37:48.681] <TB3> INFO: 41600 events read in total (2969ms).
[13:37:48.682] <TB3> INFO: Test took 3828ms.
[13:37:48.971] <TB3> INFO: Expecting 41600 events.
[13:37:52.448] <TB3> INFO: 41600 events read in total (2886ms).
[13:37:52.449] <TB3> INFO: Test took 3743ms.
[13:37:52.737] <TB3> INFO: Expecting 41600 events.
[13:37:56.306] <TB3> INFO: 41600 events read in total (2976ms).
[13:37:56.307] <TB3> INFO: Test took 3835ms.
[13:37:56.601] <TB3> INFO: Expecting 41600 events.
[13:38:00.106] <TB3> INFO: 41600 events read in total (2913ms).
[13:38:00.107] <TB3> INFO: Test took 3773ms.
[13:38:00.398] <TB3> INFO: Expecting 41600 events.
[13:38:03.903] <TB3> INFO: 41600 events read in total (2913ms).
[13:38:03.903] <TB3> INFO: Test took 3769ms.
[13:38:04.193] <TB3> INFO: Expecting 41600 events.
[13:38:07.788] <TB3> INFO: 41600 events read in total (3004ms).
[13:38:07.788] <TB3> INFO: Test took 3861ms.
[13:38:08.078] <TB3> INFO: Expecting 41600 events.
[13:38:11.549] <TB3> INFO: 41600 events read in total (2880ms).
[13:38:11.550] <TB3> INFO: Test took 3738ms.
[13:38:11.840] <TB3> INFO: Expecting 41600 events.
[13:38:15.448] <TB3> INFO: 41600 events read in total (3017ms).
[13:38:15.449] <TB3> INFO: Test took 3875ms.
[13:38:15.761] <TB3> INFO: Expecting 41600 events.
[13:38:19.384] <TB3> INFO: 41600 events read in total (3031ms).
[13:38:19.384] <TB3> INFO: Test took 3908ms.
[13:38:19.693] <TB3> INFO: Expecting 41600 events.
[13:38:23.273] <TB3> INFO: 41600 events read in total (2989ms).
[13:38:23.274] <TB3> INFO: Test took 3866ms.
[13:38:23.564] <TB3> INFO: Expecting 41600 events.
[13:38:27.118] <TB3> INFO: 41600 events read in total (2963ms).
[13:38:27.119] <TB3> INFO: Test took 3821ms.
[13:38:27.409] <TB3> INFO: Expecting 41600 events.
[13:38:30.943] <TB3> INFO: 41600 events read in total (2942ms).
[13:38:30.943] <TB3> INFO: Test took 3800ms.
[13:38:31.233] <TB3> INFO: Expecting 41600 events.
[13:38:34.864] <TB3> INFO: 41600 events read in total (3039ms).
[13:38:34.864] <TB3> INFO: Test took 3897ms.
[13:38:35.154] <TB3> INFO: Expecting 41600 events.
[13:38:38.816] <TB3> INFO: 41600 events read in total (3070ms).
[13:38:38.817] <TB3> INFO: Test took 3929ms.
[13:38:39.107] <TB3> INFO: Expecting 41600 events.
[13:38:42.619] <TB3> INFO: 41600 events read in total (2920ms).
[13:38:42.619] <TB3> INFO: Test took 3778ms.
[13:38:42.909] <TB3> INFO: Expecting 41600 events.
[13:38:46.446] <TB3> INFO: 41600 events read in total (2945ms).
[13:38:46.447] <TB3> INFO: Test took 3803ms.
[13:38:46.739] <TB3> INFO: Expecting 41600 events.
[13:38:50.284] <TB3> INFO: 41600 events read in total (2953ms).
[13:38:50.285] <TB3> INFO: Test took 3811ms.
[13:38:50.575] <TB3> INFO: Expecting 41600 events.
[13:38:54.111] <TB3> INFO: 41600 events read in total (2945ms).
[13:38:54.111] <TB3> INFO: Test took 3802ms.
[13:38:54.401] <TB3> INFO: Expecting 41600 events.
[13:38:57.987] <TB3> INFO: 41600 events read in total (2994ms).
[13:38:57.988] <TB3> INFO: Test took 3853ms.
[13:38:58.278] <TB3> INFO: Expecting 41600 events.
[13:39:01.803] <TB3> INFO: 41600 events read in total (2934ms).
[13:39:01.804] <TB3> INFO: Test took 3792ms.
[13:39:02.113] <TB3> INFO: Expecting 41600 events.
[13:39:05.622] <TB3> INFO: 41600 events read in total (2918ms).
[13:39:05.622] <TB3> INFO: Test took 3793ms.
[13:39:05.913] <TB3> INFO: Expecting 41600 events.
[13:39:09.472] <TB3> INFO: 41600 events read in total (2967ms).
[13:39:09.473] <TB3> INFO: Test took 3826ms.
[13:39:09.762] <TB3> INFO: Expecting 41600 events.
[13:39:13.314] <TB3> INFO: 41600 events read in total (2960ms).
[13:39:13.314] <TB3> INFO: Test took 3818ms.
[13:39:13.604] <TB3> INFO: Expecting 41600 events.
[13:39:17.105] <TB3> INFO: 41600 events read in total (2909ms).
[13:39:17.106] <TB3> INFO: Test took 3768ms.
[13:39:17.395] <TB3> INFO: Expecting 41600 events.
[13:39:20.981] <TB3> INFO: 41600 events read in total (2994ms).
[13:39:20.982] <TB3> INFO: Test took 3852ms.
[13:39:21.275] <TB3> INFO: Expecting 41600 events.
[13:39:24.812] <TB3> INFO: 41600 events read in total (2946ms).
[13:39:24.813] <TB3> INFO: Test took 3804ms.
[13:39:25.102] <TB3> INFO: Expecting 41600 events.
[13:39:28.709] <TB3> INFO: 41600 events read in total (3015ms).
[13:39:28.710] <TB3> INFO: Test took 3873ms.
[13:39:28.999] <TB3> INFO: Expecting 41600 events.
[13:39:32.576] <TB3> INFO: 41600 events read in total (2985ms).
[13:39:32.576] <TB3> INFO: Test took 3842ms.
[13:39:32.866] <TB3> INFO: Expecting 41600 events.
[13:39:36.401] <TB3> INFO: 41600 events read in total (2944ms).
[13:39:36.402] <TB3> INFO: Test took 3802ms.
[13:39:36.691] <TB3> INFO: Expecting 41600 events.
[13:39:40.314] <TB3> INFO: 41600 events read in total (3031ms).
[13:39:40.314] <TB3> INFO: Test took 3888ms.
[13:39:40.607] <TB3> INFO: Expecting 41600 events.
[13:39:44.173] <TB3> INFO: 41600 events read in total (2975ms).
[13:39:44.174] <TB3> INFO: Test took 3833ms.
[13:39:44.463] <TB3> INFO: Expecting 41600 events.
[13:39:47.971] <TB3> INFO: 41600 events read in total (2916ms).
[13:39:47.972] <TB3> INFO: Test took 3774ms.
[13:39:48.262] <TB3> INFO: Expecting 41600 events.
[13:39:51.765] <TB3> INFO: 41600 events read in total (2911ms).
[13:39:51.765] <TB3> INFO: Test took 3769ms.
[13:39:52.054] <TB3> INFO: Expecting 41600 events.
[13:39:55.633] <TB3> INFO: 41600 events read in total (2987ms).
[13:39:55.634] <TB3> INFO: Test took 3845ms.
[13:39:55.923] <TB3> INFO: Expecting 41600 events.
[13:39:59.476] <TB3> INFO: 41600 events read in total (2961ms).
[13:39:59.476] <TB3> INFO: Test took 3818ms.
[13:39:59.769] <TB3> INFO: Expecting 41600 events.
[13:40:03.351] <TB3> INFO: 41600 events read in total (2991ms).
[13:40:03.351] <TB3> INFO: Test took 3848ms.
[13:40:03.640] <TB3> INFO: Expecting 41600 events.
[13:40:07.174] <TB3> INFO: 41600 events read in total (2942ms).
[13:40:07.175] <TB3> INFO: Test took 3800ms.
[13:40:07.465] <TB3> INFO: Expecting 41600 events.
[13:40:10.947] <TB3> INFO: 41600 events read in total (2891ms).
[13:40:10.948] <TB3> INFO: Test took 3749ms.
[13:40:11.250] <TB3> INFO: Expecting 41600 events.
[13:40:14.780] <TB3> INFO: 41600 events read in total (2938ms).
[13:40:14.781] <TB3> INFO: Test took 3809ms.
[13:40:15.070] <TB3> INFO: Expecting 41600 events.
[13:40:18.676] <TB3> INFO: 41600 events read in total (3014ms).
[13:40:18.677] <TB3> INFO: Test took 3873ms.
[13:40:18.984] <TB3> INFO: Expecting 41600 events.
[13:40:22.599] <TB3> INFO: 41600 events read in total (3023ms).
[13:40:22.599] <TB3> INFO: Test took 3897ms.
[13:40:22.888] <TB3> INFO: Expecting 41600 events.
[13:40:26.421] <TB3> INFO: 41600 events read in total (2941ms).
[13:40:26.421] <TB3> INFO: Test took 3798ms.
[13:40:26.711] <TB3> INFO: Expecting 41600 events.
[13:40:30.320] <TB3> INFO: 41600 events read in total (3017ms).
[13:40:30.321] <TB3> INFO: Test took 3876ms.
[13:40:30.610] <TB3> INFO: Expecting 41600 events.
[13:40:34.220] <TB3> INFO: 41600 events read in total (3018ms).
[13:40:34.221] <TB3> INFO: Test took 3876ms.
[13:40:34.510] <TB3> INFO: Expecting 41600 events.
[13:40:38.008] <TB3> INFO: 41600 events read in total (2907ms).
[13:40:38.008] <TB3> INFO: Test took 3763ms.
[13:40:38.301] <TB3> INFO: Expecting 41600 events.
[13:40:41.906] <TB3> INFO: 41600 events read in total (3013ms).
[13:40:41.906] <TB3> INFO: Test took 3870ms.
[13:40:42.195] <TB3> INFO: Expecting 41600 events.
[13:40:45.772] <TB3> INFO: 41600 events read in total (2985ms).
[13:40:45.773] <TB3> INFO: Test took 3843ms.
[13:40:46.064] <TB3> INFO: Expecting 41600 events.
[13:40:49.578] <TB3> INFO: 41600 events read in total (2922ms).
[13:40:49.579] <TB3> INFO: Test took 3781ms.
[13:40:49.871] <TB3> INFO: Expecting 41600 events.
[13:40:53.550] <TB3> INFO: 41600 events read in total (3087ms).
[13:40:53.551] <TB3> INFO: Test took 3945ms.
[13:40:53.842] <TB3> INFO: Expecting 41600 events.
[13:40:57.376] <TB3> INFO: 41600 events read in total (2942ms).
[13:40:57.377] <TB3> INFO: Test took 3800ms.
[13:40:57.672] <TB3> INFO: Expecting 2560 events.
[13:40:58.563] <TB3> INFO: 2560 events read in total (300ms).
[13:40:58.563] <TB3> INFO: Test took 1169ms.
[13:40:58.871] <TB3> INFO: Expecting 2560 events.
[13:40:59.768] <TB3> INFO: 2560 events read in total (305ms).
[13:40:59.768] <TB3> INFO: Test took 1204ms.
[13:41:00.076] <TB3> INFO: Expecting 2560 events.
[13:41:00.964] <TB3> INFO: 2560 events read in total (297ms).
[13:41:00.964] <TB3> INFO: Test took 1195ms.
[13:41:01.273] <TB3> INFO: Expecting 2560 events.
[13:41:02.162] <TB3> INFO: 2560 events read in total (298ms).
[13:41:02.162] <TB3> INFO: Test took 1197ms.
[13:41:02.469] <TB3> INFO: Expecting 2560 events.
[13:41:03.348] <TB3> INFO: 2560 events read in total (287ms).
[13:41:03.349] <TB3> INFO: Test took 1186ms.
[13:41:03.657] <TB3> INFO: Expecting 2560 events.
[13:41:04.541] <TB3> INFO: 2560 events read in total (293ms).
[13:41:04.542] <TB3> INFO: Test took 1193ms.
[13:41:04.850] <TB3> INFO: Expecting 2560 events.
[13:41:05.732] <TB3> INFO: 2560 events read in total (291ms).
[13:41:05.735] <TB3> INFO: Test took 1193ms.
[13:41:06.040] <TB3> INFO: Expecting 2560 events.
[13:41:06.928] <TB3> INFO: 2560 events read in total (296ms).
[13:41:06.928] <TB3> INFO: Test took 1192ms.
[13:41:07.236] <TB3> INFO: Expecting 2560 events.
[13:41:08.116] <TB3> INFO: 2560 events read in total (288ms).
[13:41:08.116] <TB3> INFO: Test took 1188ms.
[13:41:08.431] <TB3> INFO: Expecting 2560 events.
[13:41:09.311] <TB3> INFO: 2560 events read in total (288ms).
[13:41:09.312] <TB3> INFO: Test took 1193ms.
[13:41:09.620] <TB3> INFO: Expecting 2560 events.
[13:41:10.502] <TB3> INFO: 2560 events read in total (290ms).
[13:41:10.502] <TB3> INFO: Test took 1190ms.
[13:41:10.811] <TB3> INFO: Expecting 2560 events.
[13:41:11.699] <TB3> INFO: 2560 events read in total (296ms).
[13:41:11.699] <TB3> INFO: Test took 1196ms.
[13:41:12.006] <TB3> INFO: Expecting 2560 events.
[13:41:12.890] <TB3> INFO: 2560 events read in total (292ms).
[13:41:12.890] <TB3> INFO: Test took 1190ms.
[13:41:13.199] <TB3> INFO: Expecting 2560 events.
[13:41:14.084] <TB3> INFO: 2560 events read in total (294ms).
[13:41:14.084] <TB3> INFO: Test took 1194ms.
[13:41:14.392] <TB3> INFO: Expecting 2560 events.
[13:41:15.280] <TB3> INFO: 2560 events read in total (296ms).
[13:41:15.281] <TB3> INFO: Test took 1197ms.
[13:41:15.588] <TB3> INFO: Expecting 2560 events.
[13:41:16.482] <TB3> INFO: 2560 events read in total (302ms).
[13:41:16.483] <TB3> INFO: Test took 1202ms.
[13:41:16.486] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:41:16.791] <TB3> INFO: Expecting 655360 events.
[13:41:31.632] <TB3> INFO: 655360 events read in total (14249ms).
[13:41:31.648] <TB3> INFO: Expecting 655360 events.
[13:41:46.224] <TB3> INFO: 655360 events read in total (14173ms).
[13:41:46.244] <TB3> INFO: Expecting 655360 events.
[13:42:00.972] <TB3> INFO: 655360 events read in total (14325ms).
[13:42:00.000] <TB3> INFO: Expecting 655360 events.
[13:42:15.546] <TB3> INFO: 655360 events read in total (14143ms).
[13:42:15.572] <TB3> INFO: Expecting 655360 events.
[13:42:30.257] <TB3> INFO: 655360 events read in total (14282ms).
[13:42:30.286] <TB3> INFO: Expecting 655360 events.
[13:42:45.078] <TB3> INFO: 655360 events read in total (14389ms).
[13:42:45.113] <TB3> INFO: Expecting 655360 events.
[13:42:59.920] <TB3> INFO: 655360 events read in total (14404ms).
[13:42:59.962] <TB3> INFO: Expecting 655360 events.
[13:43:14.425] <TB3> INFO: 655360 events read in total (14060ms).
[13:43:14.475] <TB3> INFO: Expecting 655360 events.
[13:43:29.052] <TB3> INFO: 655360 events read in total (14174ms).
[13:43:29.109] <TB3> INFO: Expecting 655360 events.
[13:43:43.620] <TB3> INFO: 655360 events read in total (14108ms).
[13:43:43.672] <TB3> INFO: Expecting 655360 events.
[13:43:57.937] <TB3> INFO: 655360 events read in total (13862ms).
[13:43:58.090] <TB3> INFO: Expecting 655360 events.
[13:44:12.714] <TB3> INFO: 655360 events read in total (14220ms).
[13:44:12.779] <TB3> INFO: Expecting 655360 events.
[13:44:27.596] <TB3> INFO: 655360 events read in total (14414ms).
[13:44:27.677] <TB3> INFO: Expecting 655360 events.
[13:44:42.419] <TB3> INFO: 655360 events read in total (14339ms).
[13:44:42.656] <TB3> INFO: Expecting 655360 events.
[13:44:57.558] <TB3> INFO: 655360 events read in total (14499ms).
[13:44:57.649] <TB3> INFO: Expecting 655360 events.
[13:45:12.263] <TB3> INFO: 655360 events read in total (14211ms).
[13:45:12.534] <TB3> INFO: Test took 236048ms.
[13:45:12.634] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:45:12.887] <TB3> INFO: Expecting 655360 events.
[13:45:27.590] <TB3> INFO: 655360 events read in total (14111ms).
[13:45:27.602] <TB3> INFO: Expecting 655360 events.
[13:45:42.186] <TB3> INFO: 655360 events read in total (14181ms).
[13:45:42.202] <TB3> INFO: Expecting 655360 events.
[13:45:56.640] <TB3> INFO: 655360 events read in total (14035ms).
[13:45:56.666] <TB3> INFO: Expecting 655360 events.
[13:46:11.034] <TB3> INFO: 655360 events read in total (13965ms).
[13:46:11.059] <TB3> INFO: Expecting 655360 events.
[13:46:25.555] <TB3> INFO: 655360 events read in total (14092ms).
[13:46:25.583] <TB3> INFO: Expecting 655360 events.
[13:46:40.277] <TB3> INFO: 655360 events read in total (14290ms).
[13:46:40.316] <TB3> INFO: Expecting 655360 events.
[13:46:54.694] <TB3> INFO: 655360 events read in total (13975ms).
[13:46:54.746] <TB3> INFO: Expecting 655360 events.
[13:47:09.213] <TB3> INFO: 655360 events read in total (14064ms).
[13:47:09.255] <TB3> INFO: Expecting 655360 events.
[13:47:23.400] <TB3> INFO: 655360 events read in total (13743ms).
[13:47:23.464] <TB3> INFO: Expecting 655360 events.
[13:47:37.605] <TB3> INFO: 655360 events read in total (13738ms).
[13:47:37.661] <TB3> INFO: Expecting 655360 events.
[13:47:52.216] <TB3> INFO: 655360 events read in total (14152ms).
[13:47:52.296] <TB3> INFO: Expecting 655360 events.
[13:48:07.234] <TB3> INFO: 655360 events read in total (14535ms).
[13:48:07.298] <TB3> INFO: Expecting 655360 events.
[13:48:22.036] <TB3> INFO: 655360 events read in total (14335ms).
[13:48:22.101] <TB3> INFO: Expecting 655360 events.
[13:48:36.770] <TB3> INFO: 655360 events read in total (14266ms).
[13:48:36.839] <TB3> INFO: Expecting 655360 events.
[13:48:51.876] <TB3> INFO: 655360 events read in total (14634ms).
[13:48:51.969] <TB3> INFO: Expecting 655360 events.
[13:49:06.862] <TB3> INFO: 655360 events read in total (14490ms).
[13:49:06.942] <TB3> INFO: Test took 234308ms.
[13:49:07.106] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:49:07.112] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:49:07.117] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:49:07.123] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:49:07.128] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:49:07.134] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:49:07.139] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:49:07.145] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:49:07.150] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:49:07.156] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:49:07.161] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:49:07.167] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:49:07.172] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:49:07.178] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:49:07.183] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:49:07.189] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:49:07.194] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:49:07.200] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:49:07.205] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:49:07.211] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:49:07.216] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:49:07.221] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[13:49:07.227] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[13:49:07.232] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:49:07.238] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:49:07.243] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:49:07.249] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:49:07.254] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[13:49:07.260] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[13:49:07.266] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[13:49:07.271] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[13:49:07.277] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[13:49:07.283] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[13:49:07.289] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:49:07.295] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:49:07.301] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:49:07.307] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:49:07.313] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:49:07.319] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:49:07.325] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:49:07.361] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C0.dat
[13:49:07.361] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C1.dat
[13:49:07.361] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C2.dat
[13:49:07.361] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C3.dat
[13:49:07.362] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C4.dat
[13:49:07.362] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C5.dat
[13:49:07.362] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C6.dat
[13:49:07.362] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C7.dat
[13:49:07.362] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C8.dat
[13:49:07.362] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C9.dat
[13:49:07.362] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C10.dat
[13:49:07.362] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C11.dat
[13:49:07.362] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C12.dat
[13:49:07.362] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C13.dat
[13:49:07.363] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C14.dat
[13:49:07.363] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//dacParameters35_C15.dat
[13:49:07.607] <TB3> INFO: Expecting 41600 events.
[13:49:10.756] <TB3> INFO: 41600 events read in total (2557ms).
[13:49:10.757] <TB3> INFO: Test took 3391ms.
[13:49:11.209] <TB3> INFO: Expecting 41600 events.
[13:49:14.238] <TB3> INFO: 41600 events read in total (2438ms).
[13:49:14.239] <TB3> INFO: Test took 3270ms.
[13:49:14.757] <TB3> INFO: Expecting 41600 events.
[13:49:17.919] <TB3> INFO: 41600 events read in total (2570ms).
[13:49:17.920] <TB3> INFO: Test took 3467ms.
[13:49:18.136] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:18.225] <TB3> INFO: Expecting 2560 events.
[13:49:19.114] <TB3> INFO: 2560 events read in total (298ms).
[13:49:19.114] <TB3> INFO: Test took 978ms.
[13:49:19.118] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:19.422] <TB3> INFO: Expecting 2560 events.
[13:49:20.319] <TB3> INFO: 2560 events read in total (305ms).
[13:49:20.319] <TB3> INFO: Test took 1201ms.
[13:49:20.323] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:20.628] <TB3> INFO: Expecting 2560 events.
[13:49:21.516] <TB3> INFO: 2560 events read in total (297ms).
[13:49:21.516] <TB3> INFO: Test took 1193ms.
[13:49:21.520] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:21.825] <TB3> INFO: Expecting 2560 events.
[13:49:22.712] <TB3> INFO: 2560 events read in total (295ms).
[13:49:22.713] <TB3> INFO: Test took 1193ms.
[13:49:22.715] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:23.020] <TB3> INFO: Expecting 2560 events.
[13:49:23.908] <TB3> INFO: 2560 events read in total (296ms).
[13:49:23.909] <TB3> INFO: Test took 1194ms.
[13:49:23.913] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:24.216] <TB3> INFO: Expecting 2560 events.
[13:49:25.106] <TB3> INFO: 2560 events read in total (298ms).
[13:49:25.106] <TB3> INFO: Test took 1194ms.
[13:49:25.108] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:25.415] <TB3> INFO: Expecting 2560 events.
[13:49:26.301] <TB3> INFO: 2560 events read in total (295ms).
[13:49:26.301] <TB3> INFO: Test took 1193ms.
[13:49:26.304] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:26.610] <TB3> INFO: Expecting 2560 events.
[13:49:27.506] <TB3> INFO: 2560 events read in total (304ms).
[13:49:27.507] <TB3> INFO: Test took 1203ms.
[13:49:27.510] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:27.815] <TB3> INFO: Expecting 2560 events.
[13:49:28.702] <TB3> INFO: 2560 events read in total (295ms).
[13:49:28.702] <TB3> INFO: Test took 1192ms.
[13:49:28.706] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:29.010] <TB3> INFO: Expecting 2560 events.
[13:49:29.895] <TB3> INFO: 2560 events read in total (293ms).
[13:49:29.896] <TB3> INFO: Test took 1190ms.
[13:49:29.899] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:30.204] <TB3> INFO: Expecting 2560 events.
[13:49:31.090] <TB3> INFO: 2560 events read in total (294ms).
[13:49:31.090] <TB3> INFO: Test took 1191ms.
[13:49:31.092] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:31.398] <TB3> INFO: Expecting 2560 events.
[13:49:32.284] <TB3> INFO: 2560 events read in total (294ms).
[13:49:32.284] <TB3> INFO: Test took 1192ms.
[13:49:32.287] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:32.592] <TB3> INFO: Expecting 2560 events.
[13:49:33.484] <TB3> INFO: 2560 events read in total (300ms).
[13:49:33.485] <TB3> INFO: Test took 1198ms.
[13:49:33.487] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:33.793] <TB3> INFO: Expecting 2560 events.
[13:49:34.679] <TB3> INFO: 2560 events read in total (294ms).
[13:49:34.679] <TB3> INFO: Test took 1192ms.
[13:49:34.682] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:34.988] <TB3> INFO: Expecting 2560 events.
[13:49:35.876] <TB3> INFO: 2560 events read in total (296ms).
[13:49:35.877] <TB3> INFO: Test took 1195ms.
[13:49:35.879] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:36.191] <TB3> INFO: Expecting 2560 events.
[13:49:37.076] <TB3> INFO: 2560 events read in total (293ms).
[13:49:37.077] <TB3> INFO: Test took 1198ms.
[13:49:37.079] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:37.385] <TB3> INFO: Expecting 2560 events.
[13:49:38.269] <TB3> INFO: 2560 events read in total (292ms).
[13:49:38.270] <TB3> INFO: Test took 1192ms.
[13:49:38.272] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:38.579] <TB3> INFO: Expecting 2560 events.
[13:49:39.461] <TB3> INFO: 2560 events read in total (290ms).
[13:49:39.461] <TB3> INFO: Test took 1189ms.
[13:49:39.464] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:39.769] <TB3> INFO: Expecting 2560 events.
[13:49:40.659] <TB3> INFO: 2560 events read in total (297ms).
[13:49:40.659] <TB3> INFO: Test took 1195ms.
[13:49:40.661] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:40.968] <TB3> INFO: Expecting 2560 events.
[13:49:41.853] <TB3> INFO: 2560 events read in total (293ms).
[13:49:41.853] <TB3> INFO: Test took 1192ms.
[13:49:41.856] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:42.165] <TB3> INFO: Expecting 2560 events.
[13:49:43.046] <TB3> INFO: 2560 events read in total (289ms).
[13:49:43.047] <TB3> INFO: Test took 1192ms.
[13:49:43.050] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:43.355] <TB3> INFO: Expecting 2560 events.
[13:49:44.243] <TB3> INFO: 2560 events read in total (296ms).
[13:49:44.243] <TB3> INFO: Test took 1193ms.
[13:49:44.245] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:44.551] <TB3> INFO: Expecting 2560 events.
[13:49:45.434] <TB3> INFO: 2560 events read in total (291ms).
[13:49:45.434] <TB3> INFO: Test took 1189ms.
[13:49:45.437] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:45.744] <TB3> INFO: Expecting 2560 events.
[13:49:46.624] <TB3> INFO: 2560 events read in total (288ms).
[13:49:46.624] <TB3> INFO: Test took 1187ms.
[13:49:46.626] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:46.933] <TB3> INFO: Expecting 2560 events.
[13:49:47.823] <TB3> INFO: 2560 events read in total (298ms).
[13:49:47.824] <TB3> INFO: Test took 1198ms.
[13:49:47.826] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:48.134] <TB3> INFO: Expecting 2560 events.
[13:49:49.018] <TB3> INFO: 2560 events read in total (293ms).
[13:49:49.018] <TB3> INFO: Test took 1193ms.
[13:49:49.021] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:49.326] <TB3> INFO: Expecting 2560 events.
[13:49:50.233] <TB3> INFO: 2560 events read in total (312ms).
[13:49:50.240] <TB3> INFO: Test took 1219ms.
[13:49:50.379] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:50.755] <TB3> INFO: Expecting 2560 events.
[13:49:53.356] <TB3> INFO: 2560 events read in total (1929ms).
[13:49:53.361] <TB3> INFO: Test took 2982ms.
[13:49:53.443] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:53.707] <TB3> INFO: Expecting 2560 events.
[13:49:54.605] <TB3> INFO: 2560 events read in total (302ms).
[13:49:54.605] <TB3> INFO: Test took 1162ms.
[13:49:54.608] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:55.055] <TB3> INFO: Expecting 2560 events.
[13:49:55.959] <TB3> INFO: 2560 events read in total (304ms).
[13:49:55.962] <TB3> INFO: Test took 1354ms.
[13:49:55.976] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:56.281] <TB3> INFO: Expecting 2560 events.
[13:49:58.088] <TB3> INFO: 2560 events read in total (1162ms).
[13:49:58.099] <TB3> INFO: Test took 2123ms.
[13:49:58.235] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:49:58.627] <TB3> INFO: Expecting 2560 events.
[13:49:59.519] <TB3> INFO: 2560 events read in total (293ms).
[13:49:59.519] <TB3> INFO: Test took 1284ms.
[13:50:01.584] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 752 seconds
[13:50:01.584] <TB3> INFO: PH scale (per ROC): 47 42 55 53 42 38 58 54 40 61 36 39 48 40 57 44
[13:50:01.584] <TB3> INFO: PH offset (per ROC): 143 106 127 139 100 102 128 127 109 126 94 112 140 106 127 110
[13:50:01.593] <TB3> INFO: Decoding statistics:
[13:50:01.593] <TB3> INFO: General information:
[13:50:01.593] <TB3> INFO: 16bit words read: 127890
[13:50:01.593] <TB3> INFO: valid events total: 20480
[13:50:01.593] <TB3> INFO: empty events: 17975
[13:50:01.593] <TB3> INFO: valid events with pixels: 2505
[13:50:01.593] <TB3> INFO: valid pixel hits: 2505
[13:50:01.593] <TB3> INFO: Event errors: 0
[13:50:01.593] <TB3> INFO: start marker: 0
[13:50:01.593] <TB3> INFO: stop marker: 0
[13:50:01.593] <TB3> INFO: overflow: 0
[13:50:01.593] <TB3> INFO: invalid 5bit words: 0
[13:50:01.593] <TB3> INFO: invalid XOR eye diagram: 0
[13:50:01.593] <TB3> INFO: frame (failed synchr.): 0
[13:50:01.593] <TB3> INFO: idle data (no TBM trl): 0
[13:50:01.593] <TB3> INFO: no data (only TBM hdr): 0
[13:50:01.593] <TB3> INFO: TBM errors: 0
[13:50:01.593] <TB3> INFO: flawed TBM headers: 0
[13:50:01.593] <TB3> INFO: flawed TBM trailers: 0
[13:50:01.594] <TB3> INFO: event ID mismatches: 0
[13:50:01.594] <TB3> INFO: ROC errors: 0
[13:50:01.594] <TB3> INFO: missing ROC header(s): 0
[13:50:01.594] <TB3> INFO: misplaced readback start: 0
[13:50:01.594] <TB3> INFO: Pixel decoding errors: 0
[13:50:01.594] <TB3> INFO: pixel data incomplete: 0
[13:50:01.594] <TB3> INFO: pixel address: 0
[13:50:01.594] <TB3> INFO: pulse height fill bit: 0
[13:50:01.594] <TB3> INFO: buffer corruption: 0
[13:50:01.939] <TB3> INFO: ######################################################################
[13:50:01.939] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:50:01.939] <TB3> INFO: ######################################################################
[13:50:01.954] <TB3> INFO: scanning low vcal = 10
[13:50:02.234] <TB3> INFO: Expecting 41600 events.
[13:50:15.311] <TB3> INFO: 41600 events read in total (12452ms).
[13:50:15.323] <TB3> INFO: Test took 13369ms.
[13:50:15.391] <TB3> INFO: scanning low vcal = 20
[13:50:15.983] <TB3> INFO: Expecting 41600 events.
[13:50:24.108] <TB3> INFO: 41600 events read in total (7505ms).
[13:50:24.108] <TB3> INFO: Test took 8713ms.
[13:50:24.110] <TB3> INFO: scanning low vcal = 30
[13:50:24.413] <TB3> INFO: Expecting 41600 events.
[13:50:34.725] <TB3> INFO: 41600 events read in total (9718ms).
[13:50:34.736] <TB3> INFO: Test took 10625ms.
[13:50:34.855] <TB3> INFO: scanning low vcal = 40
[13:50:35.647] <TB3> INFO: Expecting 41600 events.
[13:50:49.796] <TB3> INFO: 41600 events read in total (13485ms).
[13:50:49.798] <TB3> INFO: Test took 14939ms.
[13:50:49.801] <TB3> INFO: scanning low vcal = 50
[13:50:50.078] <TB3> INFO: Expecting 41600 events.
[13:50:54.093] <TB3> INFO: 41600 events read in total (3424ms).
[13:50:54.094] <TB3> INFO: Test took 4293ms.
[13:50:54.097] <TB3> INFO: scanning low vcal = 60
[13:50:54.373] <TB3> INFO: Expecting 41600 events.
[13:50:58.365] <TB3> INFO: 41600 events read in total (3400ms).
[13:50:58.365] <TB3> INFO: Test took 4268ms.
[13:50:58.369] <TB3> INFO: scanning low vcal = 70
[13:50:58.645] <TB3> INFO: Expecting 41600 events.
[13:51:02.669] <TB3> INFO: 41600 events read in total (3433ms).
[13:51:02.670] <TB3> INFO: Test took 4301ms.
[13:51:02.674] <TB3> INFO: scanning low vcal = 80
[13:51:02.950] <TB3> INFO: Expecting 41600 events.
[13:51:06.963] <TB3> INFO: 41600 events read in total (3421ms).
[13:51:06.963] <TB3> INFO: Test took 4289ms.
[13:51:06.966] <TB3> INFO: scanning low vcal = 90
[13:51:07.245] <TB3> INFO: Expecting 41600 events.
[13:51:11.236] <TB3> INFO: 41600 events read in total (3399ms).
[13:51:11.237] <TB3> INFO: Test took 4271ms.
[13:51:11.241] <TB3> INFO: scanning low vcal = 100
[13:51:11.517] <TB3> INFO: Expecting 41600 events.
[13:51:18.438] <TB3> INFO: 41600 events read in total (6330ms).
[13:51:18.462] <TB3> INFO: Test took 7221ms.
[13:51:18.477] <TB3> INFO: scanning low vcal = 110
[13:51:18.851] <TB3> INFO: Expecting 41600 events.
[13:51:25.616] <TB3> INFO: 41600 events read in total (6173ms).
[13:51:25.628] <TB3> INFO: Test took 7151ms.
[13:51:25.715] <TB3> INFO: scanning low vcal = 120
[13:51:26.350] <TB3> INFO: Expecting 41600 events.
[13:51:32.289] <TB3> INFO: 41600 events read in total (5336ms).
[13:51:32.300] <TB3> INFO: Test took 6584ms.
[13:51:32.427] <TB3> INFO: scanning low vcal = 130
[13:51:33.355] <TB3> INFO: Expecting 41600 events.
[13:51:46.113] <TB3> INFO: 41600 events read in total (12082ms).
[13:51:46.124] <TB3> INFO: Test took 13693ms.
[13:51:46.259] <TB3> INFO: scanning low vcal = 140
[13:51:47.107] <TB3> INFO: Expecting 41600 events.
[13:51:54.585] <TB3> INFO: 41600 events read in total (6798ms).
[13:51:54.586] <TB3> INFO: Test took 8315ms.
[13:51:54.589] <TB3> INFO: scanning low vcal = 150
[13:51:54.913] <TB3> INFO: Expecting 41600 events.
[13:52:09.872] <TB3> INFO: 41600 events read in total (14367ms).
[13:52:09.880] <TB3> INFO: Test took 15291ms.
[13:52:09.971] <TB3> INFO: scanning low vcal = 160
[13:52:10.471] <TB3> INFO: Expecting 41600 events.
[13:52:17.246] <TB3> INFO: 41600 events read in total (6167ms).
[13:52:17.247] <TB3> INFO: Test took 7266ms.
[13:52:17.250] <TB3> INFO: scanning low vcal = 170
[13:52:17.644] <TB3> INFO: Expecting 41600 events.
[13:52:21.630] <TB3> INFO: 41600 events read in total (3382ms).
[13:52:21.631] <TB3> INFO: Test took 4381ms.
[13:52:21.639] <TB3> INFO: scanning low vcal = 180
[13:52:21.949] <TB3> INFO: Expecting 41600 events.
[13:52:25.956] <TB3> INFO: 41600 events read in total (3415ms).
[13:52:25.957] <TB3> INFO: Test took 4318ms.
[13:52:25.960] <TB3> INFO: scanning low vcal = 190
[13:52:26.237] <TB3> INFO: Expecting 41600 events.
[13:52:30.283] <TB3> INFO: 41600 events read in total (3455ms).
[13:52:30.283] <TB3> INFO: Test took 4323ms.
[13:52:30.286] <TB3> INFO: scanning low vcal = 200
[13:52:30.563] <TB3> INFO: Expecting 41600 events.
[13:52:34.597] <TB3> INFO: 41600 events read in total (3442ms).
[13:52:34.597] <TB3> INFO: Test took 4310ms.
[13:52:34.602] <TB3> INFO: scanning low vcal = 210
[13:52:34.877] <TB3> INFO: Expecting 41600 events.
[13:52:38.953] <TB3> INFO: 41600 events read in total (3485ms).
[13:52:38.954] <TB3> INFO: Test took 4352ms.
[13:52:38.957] <TB3> INFO: scanning low vcal = 220
[13:52:39.269] <TB3> INFO: Expecting 41600 events.
[13:52:43.306] <TB3> INFO: 41600 events read in total (3446ms).
[13:52:43.307] <TB3> INFO: Test took 4349ms.
[13:52:43.311] <TB3> INFO: scanning low vcal = 230
[13:52:43.587] <TB3> INFO: Expecting 41600 events.
[13:52:47.652] <TB3> INFO: 41600 events read in total (3474ms).
[13:52:47.653] <TB3> INFO: Test took 4342ms.
[13:52:47.657] <TB3> INFO: scanning low vcal = 240
[13:52:47.934] <TB3> INFO: Expecting 41600 events.
[13:52:55.780] <TB3> INFO: 41600 events read in total (7255ms).
[13:52:55.781] <TB3> INFO: Test took 8124ms.
[13:52:55.784] <TB3> INFO: scanning low vcal = 250
[13:52:56.116] <TB3> INFO: Expecting 41600 events.
[13:53:01.442] <TB3> INFO: 41600 events read in total (4731ms).
[13:53:01.452] <TB3> INFO: Test took 5668ms.
[13:53:01.707] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[13:53:02.401] <TB3> INFO: Expecting 41600 events.
[13:53:09.149] <TB3> INFO: 41600 events read in total (6102ms).
[13:53:09.156] <TB3> INFO: Test took 7441ms.
[13:53:09.291] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[13:53:10.143] <TB3> INFO: Expecting 41600 events.
[13:53:14.741] <TB3> INFO: 41600 events read in total (3918ms).
[13:53:14.742] <TB3> INFO: Test took 5443ms.
[13:53:14.747] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[13:53:15.103] <TB3> INFO: Expecting 41600 events.
[13:53:19.254] <TB3> INFO: 41600 events read in total (3559ms).
[13:53:19.255] <TB3> INFO: Test took 4508ms.
[13:53:19.262] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[13:53:19.549] <TB3> INFO: Expecting 41600 events.
[13:53:23.753] <TB3> INFO: 41600 events read in total (3612ms).
[13:53:23.754] <TB3> INFO: Test took 4492ms.
[13:53:23.759] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:53:24.383] <TB3> INFO: Expecting 41600 events.
[13:53:28.584] <TB3> INFO: 41600 events read in total (3577ms).
[13:53:28.585] <TB3> INFO: Test took 4825ms.
[13:53:29.347] <TB3> INFO: PixTestGainPedestal::measure() done
[13:54:12.363] <TB3> INFO: PixTestGainPedestal::fit() done
[13:54:12.363] <TB3> INFO: non-linearity mean: 0.960 0.926 0.975 0.979 0.912 0.936 0.980 0.975 0.941 0.983 0.910 0.910 0.969 0.936 0.977 0.911
[13:54:12.363] <TB3> INFO: non-linearity RMS: 0.012 0.062 0.003 0.005 0.078 0.175 0.004 0.004 0.146 0.004 0.135 0.112 0.005 0.049 0.003 0.149
[13:54:12.363] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[13:54:12.377] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[13:54:12.391] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[13:54:12.404] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[13:54:12.418] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[13:54:12.431] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[13:54:12.445] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[13:54:12.459] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[13:54:12.472] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[13:54:12.485] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[13:54:12.503] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[13:54:12.517] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[13:54:12.530] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[13:54:12.543] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[13:54:12.557] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[13:54:12.571] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1055_FullQualification_2016-10-24_11h34m_1477301645//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[13:54:12.584] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 250 seconds
[13:54:12.584] <TB3> INFO: Decoding statistics:
[13:54:12.584] <TB3> INFO: General information:
[13:54:12.584] <TB3> INFO: 16bit words read: 3327794
[13:54:12.584] <TB3> INFO: valid events total: 332800
[13:54:12.584] <TB3> INFO: empty events: 0
[13:54:12.584] <TB3> INFO: valid events with pixels: 332800
[13:54:12.584] <TB3> INFO: valid pixel hits: 665497
[13:54:12.584] <TB3> INFO: Event errors: 0
[13:54:12.584] <TB3> INFO: start marker: 0
[13:54:12.584] <TB3> INFO: stop marker: 0
[13:54:12.584] <TB3> INFO: overflow: 0
[13:54:12.584] <TB3> INFO: invalid 5bit words: 0
[13:54:12.584] <TB3> INFO: invalid XOR eye diagram: 0
[13:54:12.584] <TB3> INFO: frame (failed synchr.): 0
[13:54:12.584] <TB3> INFO: idle data (no TBM trl): 0
[13:54:12.584] <TB3> INFO: no data (only TBM hdr): 0
[13:54:12.585] <TB3> INFO: TBM errors: 0
[13:54:12.585] <TB3> INFO: flawed TBM headers: 0
[13:54:12.585] <TB3> INFO: flawed TBM trailers: 0
[13:54:12.585] <TB3> INFO: event ID mismatches: 0
[13:54:12.585] <TB3> INFO: ROC errors: 0
[13:54:12.585] <TB3> INFO: missing ROC header(s): 0
[13:54:12.585] <TB3> INFO: misplaced readback start: 0
[13:54:12.585] <TB3> INFO: Pixel decoding errors: 0
[13:54:12.585] <TB3> INFO: pixel data incomplete: 0
[13:54:12.585] <TB3> INFO: pixel address: 0
[13:54:12.585] <TB3> INFO: pulse height fill bit: 0
[13:54:12.585] <TB3> INFO: buffer corruption: 0
[13:54:12.601] <TB3> INFO: Decoding statistics:
[13:54:12.601] <TB3> INFO: General information:
[13:54:12.601] <TB3> INFO: 16bit words read: 3457220
[13:54:12.601] <TB3> INFO: valid events total: 353536
[13:54:12.601] <TB3> INFO: empty events: 18231
[13:54:12.601] <TB3> INFO: valid events with pixels: 335305
[13:54:12.601] <TB3> INFO: valid pixel hits: 668002
[13:54:12.601] <TB3> INFO: Event errors: 0
[13:54:12.601] <TB3> INFO: start marker: 0
[13:54:12.601] <TB3> INFO: stop marker: 0
[13:54:12.601] <TB3> INFO: overflow: 0
[13:54:12.601] <TB3> INFO: invalid 5bit words: 0
[13:54:12.601] <TB3> INFO: invalid XOR eye diagram: 0
[13:54:12.601] <TB3> INFO: frame (failed synchr.): 0
[13:54:12.601] <TB3> INFO: idle data (no TBM trl): 0
[13:54:12.601] <TB3> INFO: no data (only TBM hdr): 0
[13:54:12.601] <TB3> INFO: TBM errors: 0
[13:54:12.601] <TB3> INFO: flawed TBM headers: 0
[13:54:12.601] <TB3> INFO: flawed TBM trailers: 0
[13:54:12.601] <TB3> INFO: event ID mismatches: 0
[13:54:12.601] <TB3> INFO: ROC errors: 0
[13:54:12.601] <TB3> INFO: missing ROC header(s): 0
[13:54:12.601] <TB3> INFO: misplaced readback start: 0
[13:54:12.601] <TB3> INFO: Pixel decoding errors: 0
[13:54:12.601] <TB3> INFO: pixel data incomplete: 0
[13:54:12.601] <TB3> INFO: pixel address: 0
[13:54:12.601] <TB3> INFO: pulse height fill bit: 0
[13:54:12.601] <TB3> INFO: buffer corruption: 0
[13:54:12.601] <TB3> INFO: enter test to run
[13:54:12.601] <TB3> INFO: test: exit no parameter change
[13:54:12.784] <TB3> QUIET: Connection to board 126 closed.
[13:54:12.785] <TB3> INFO: pXar: this is the end, my friend