[20:08:13.127] <TB2> INFO: *** Welcome to pxar ***
[20:08:13.127] <TB2> INFO: *** Today: 2016/11/04
[20:08:13.133] <TB2> INFO: *** Version: c8ba-dirty
[20:08:13.133] <TB2> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C15.dat
[20:08:13.134] <TB2> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[20:08:13.134] <TB2> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//defaultMaskFile.dat
[20:08:13.134] <TB2> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters_C15.dat
[20:08:13.199] <TB2> INFO: clk: 4
[20:08:13.199] <TB2> INFO: ctr: 4
[20:08:13.199] <TB2> INFO: sda: 19
[20:08:13.199] <TB2> INFO: tin: 9
[20:08:13.199] <TB2> INFO: level: 15
[20:08:13.199] <TB2> INFO: triggerdelay: 0
[20:08:13.199] <TB2> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[20:08:13.199] <TB2> INFO: Log level: INFO
[20:08:13.208] <TB2> INFO: Found DTB DTB_WWXUD2
[20:08:13.215] <TB2> QUIET: Connection to board DTB_WWXUD2 opened.
[20:08:13.217] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 149
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWXUD2
MAC address: 40D855118095
Hostname: pixelDTB149
Comment:
------------------------------------------------------
[20:08:13.219] <TB2> INFO: RPC call hashes of host and DTB match: 486171790
[20:08:14.768] <TB2> INFO: DUT info:
[20:08:14.768] <TB2> INFO: The DUT currently contains the following objects:
[20:08:14.768] <TB2> INFO: 4 TBM Cores tbm10c (4 ON)
[20:08:14.768] <TB2> INFO: TBM Core alpha (0): 7 registers set
[20:08:14.768] <TB2> INFO: TBM Core beta (1): 7 registers set
[20:08:14.768] <TB2> INFO: TBM Core alpha (2): 7 registers set
[20:08:14.769] <TB2> INFO: TBM Core beta (3): 7 registers set
[20:08:14.769] <TB2> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[20:08:14.769] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[20:08:14.769] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[20:08:14.769] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[20:08:14.769] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[20:08:14.769] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[20:08:14.769] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[20:08:14.769] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[20:08:14.769] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[20:08:14.769] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[20:08:14.769] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[20:08:14.769] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[20:08:14.769] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[20:08:14.769] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[20:08:14.769] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[20:08:14.769] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[20:08:14.769] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[20:08:15.170] <TB2> INFO: enter 'restricted' command line mode
[20:08:15.170] <TB2> INFO: enter test to run
[20:08:15.170] <TB2> INFO: test: pretest no parameter change
[20:08:15.170] <TB2> INFO: running: pretest
[20:08:15.176] <TB2> INFO: ######################################################################
[20:08:15.176] <TB2> INFO: PixTestPretest::doTest()
[20:08:15.176] <TB2> INFO: ######################################################################
[20:08:15.177] <TB2> INFO: ----------------------------------------------------------------------
[20:08:15.177] <TB2> INFO: PixTestPretest::programROC()
[20:08:15.177] <TB2> INFO: ----------------------------------------------------------------------
[20:08:33.191] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[20:08:33.191] <TB2> INFO: IA differences per ROC: 21.7 18.5 20.9 20.1 17.7 21.7 16.9 19.3 17.7 19.3 18.5 20.1 17.7 20.9 20.9 16.9
[20:08:33.252] <TB2> INFO: ----------------------------------------------------------------------
[20:08:33.252] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[20:08:33.252] <TB2> INFO: ----------------------------------------------------------------------
[20:08:54.550] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 379.4 mA = 23.7125 mA/ROC
[20:08:54.550] <TB2> INFO: i(loss) [mA/ROC]: 19.3 20.1 19.3 19.3 18.5 19.3 20.1 19.3 19.3 20.1 19.3 19.3 19.3 19.3 19.3 19.3
[20:08:54.578] <TB2> INFO: ----------------------------------------------------------------------
[20:08:54.578] <TB2> INFO: PixTestPretest::findTiming()
[20:08:54.578] <TB2> INFO: ----------------------------------------------------------------------
[20:08:54.579] <TB2> INFO: PixTestCmd::init()

[20:09:26.614] <TB2> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[20:09:26.614] <TB2> INFO: (success/tries = 100/100), width = 4
[20:09:28.121] <TB2> INFO: ----------------------------------------------------------------------
[20:09:28.121] <TB2> INFO: PixTestPretest::findWorkingPixel()
[20:09:28.121] <TB2> INFO: ----------------------------------------------------------------------
[20:09:28.214] <TB2> INFO: Expecting 231680 events.
[20:09:38.155] <TB2> INFO: 231680 events read in total (9349ms).
[20:09:38.163] <TB2> INFO: Test took 10038ms.
[20:09:38.415] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[20:09:38.451] <TB2> INFO: ----------------------------------------------------------------------
[20:09:38.451] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[20:09:38.451] <TB2> INFO: ----------------------------------------------------------------------
[20:09:38.546] <TB2> INFO: Expecting 231680 events.
[20:09:48.528] <TB2> INFO: 231680 events read in total (9390ms).
[20:09:48.537] <TB2> INFO: Test took 10082ms.
[20:09:48.805] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[20:09:48.805] <TB2> INFO: CalDel: 94 95 85 91 75 95 78 81 79 100 77 95 83 96 91 83
[20:09:48.805] <TB2> INFO: VthrComp: 51 51 53 51 56 56 52 51 52 51 51 51 52 51 52 55
[20:09:48.808] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C0.dat
[20:09:48.809] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C1.dat
[20:09:48.809] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C2.dat
[20:09:48.809] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C3.dat
[20:09:48.809] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C4.dat
[20:09:48.809] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C5.dat
[20:09:48.810] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C6.dat
[20:09:48.810] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C7.dat
[20:09:48.810] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C8.dat
[20:09:48.810] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C9.dat
[20:09:48.810] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C10.dat
[20:09:48.811] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C11.dat
[20:09:48.811] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C12.dat
[20:09:48.811] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C13.dat
[20:09:48.811] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C14.dat
[20:09:48.811] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C15.dat
[20:09:48.812] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//tbmParameters_C0a.dat
[20:09:48.812] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//tbmParameters_C0b.dat
[20:09:48.812] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//tbmParameters_C1a.dat
[20:09:48.812] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[20:09:48.812] <TB2> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[20:09:48.865] <TB2> INFO: enter test to run
[20:09:48.865] <TB2> INFO: test: fulltest no parameter change
[20:09:48.865] <TB2> INFO: running: fulltest
[20:09:48.865] <TB2> INFO: ######################################################################
[20:09:48.865] <TB2> INFO: PixTestFullTest::doTest()
[20:09:48.865] <TB2> INFO: ######################################################################
[20:09:48.866] <TB2> INFO: ######################################################################
[20:09:48.866] <TB2> INFO: PixTestAlive::doTest()
[20:09:48.866] <TB2> INFO: ######################################################################
[20:09:48.867] <TB2> INFO: ----------------------------------------------------------------------
[20:09:48.867] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:09:48.867] <TB2> INFO: ----------------------------------------------------------------------
[20:09:49.108] <TB2> INFO: Expecting 41600 events.
[20:09:52.610] <TB2> INFO: 41600 events read in total (2911ms).
[20:09:52.610] <TB2> INFO: Test took 3741ms.
[20:09:52.842] <TB2> INFO: PixTestAlive::aliveTest() done
[20:09:52.842] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:09:52.844] <TB2> INFO: ----------------------------------------------------------------------
[20:09:52.844] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:09:52.844] <TB2> INFO: ----------------------------------------------------------------------
[20:09:53.086] <TB2> INFO: Expecting 41600 events.
[20:09:56.072] <TB2> INFO: 41600 events read in total (2394ms).
[20:09:56.073] <TB2> INFO: Test took 3227ms.
[20:09:56.073] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[20:09:56.312] <TB2> INFO: PixTestAlive::maskTest() done
[20:09:56.312] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:09:56.313] <TB2> INFO: ----------------------------------------------------------------------
[20:09:56.313] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:09:56.314] <TB2> INFO: ----------------------------------------------------------------------
[20:09:56.564] <TB2> INFO: Expecting 41600 events.
[20:10:00.122] <TB2> INFO: 41600 events read in total (2967ms).
[20:10:00.122] <TB2> INFO: Test took 3806ms.

[20:10:00.356] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[20:10:00.356] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:10:00.356] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[20:10:00.356] <TB2> INFO: Decoding statistics:
[20:10:00.356] <TB2> INFO: General information:
[20:10:00.356] <TB2> INFO: 16bit words read: 0
[20:10:00.356] <TB2> INFO: valid events total: 0
[20:10:00.356] <TB2> INFO: empty events: 0
[20:10:00.356] <TB2> INFO: valid events with pixels: 0
[20:10:00.356] <TB2> INFO: valid pixel hits: 0
[20:10:00.356] <TB2> INFO: Event errors: 0
[20:10:00.356] <TB2> INFO: start marker: 0
[20:10:00.356] <TB2> INFO: stop marker: 0
[20:10:00.356] <TB2> INFO: overflow: 0
[20:10:00.356] <TB2> INFO: invalid 5bit words: 0
[20:10:00.356] <TB2> INFO: invalid XOR eye diagram: 0
[20:10:00.356] <TB2> INFO: frame (failed synchr.): 0
[20:10:00.356] <TB2> INFO: idle data (no TBM trl): 0
[20:10:00.356] <TB2> INFO: no data (only TBM hdr): 0
[20:10:00.356] <TB2> INFO: TBM errors: 0
[20:10:00.356] <TB2> INFO: flawed TBM headers: 0
[20:10:00.356] <TB2> INFO: flawed TBM trailers: 0
[20:10:00.356] <TB2> INFO: event ID mismatches: 0
[20:10:00.356] <TB2> INFO: ROC errors: 0
[20:10:00.357] <TB2> INFO: missing ROC header(s): 0
[20:10:00.357] <TB2> INFO: misplaced readback start: 0
[20:10:00.357] <TB2> INFO: Pixel decoding errors: 0
[20:10:00.357] <TB2> INFO: pixel data incomplete: 0
[20:10:00.357] <TB2> INFO: pixel address: 0
[20:10:00.357] <TB2> INFO: pulse height fill bit: 0
[20:10:00.357] <TB2> INFO: buffer corruption: 0
[20:10:00.365] <TB2> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C15.dat
[20:10:00.365] <TB2> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr_C15.dat

[20:10:00.365] <TB2> INFO: ######################################################################
[20:10:00.365] <TB2> INFO: PixTestReadback::doTest()
[20:10:00.365] <TB2> INFO: ######################################################################
[20:10:00.365] <TB2> INFO: ----------------------------------------------------------------------
[20:10:00.365] <TB2> INFO: PixTestReadback::CalibrateVd()
[20:10:00.365] <TB2> INFO: ----------------------------------------------------------------------
[20:10:10.352] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C0.dat
[20:10:10.353] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C1.dat
[20:10:10.353] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C2.dat
[20:10:10.353] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C3.dat
[20:10:10.353] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C4.dat
[20:10:10.353] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C5.dat
[20:10:10.353] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C6.dat
[20:10:10.353] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C7.dat
[20:10:10.353] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C8.dat
[20:10:10.353] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C9.dat
[20:10:10.353] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C10.dat
[20:10:10.353] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C11.dat
[20:10:10.353] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C12.dat
[20:10:10.354] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C13.dat
[20:10:10.354] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C14.dat
[20:10:10.354] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C15.dat
[20:10:10.385] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[20:10:10.385] <TB2> INFO: ----------------------------------------------------------------------
[20:10:10.385] <TB2> INFO: PixTestReadback::CalibrateVa()
[20:10:10.385] <TB2> INFO: ----------------------------------------------------------------------
[20:10:20.322] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C0.dat
[20:10:20.322] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C1.dat
[20:10:20.323] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C2.dat
[20:10:20.323] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C3.dat
[20:10:20.323] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C4.dat
[20:10:20.323] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C5.dat
[20:10:20.323] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C6.dat
[20:10:20.323] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C7.dat
[20:10:20.323] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C8.dat
[20:10:20.323] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C9.dat
[20:10:20.323] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C10.dat
[20:10:20.323] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C11.dat
[20:10:20.323] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C12.dat
[20:10:20.323] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C13.dat
[20:10:20.323] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C14.dat
[20:10:20.323] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C15.dat
[20:10:20.354] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[20:10:20.354] <TB2> INFO: ----------------------------------------------------------------------
[20:10:20.354] <TB2> INFO: PixTestReadback::readbackVbg()
[20:10:20.354] <TB2> INFO: ----------------------------------------------------------------------
[20:10:28.031] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[20:10:28.031] <TB2> INFO: ----------------------------------------------------------------------
[20:10:28.031] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[20:10:28.031] <TB2> INFO: ----------------------------------------------------------------------
[20:10:28.031] <TB2> INFO: Vbg will be calibrated using Vd calibration
[20:10:28.031] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 161.9calibrated Vbg = 1.20444 :::*/*/*/*/
[20:10:28.031] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 148.9calibrated Vbg = 1.1914 :::*/*/*/*/
[20:10:28.031] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 158.2calibrated Vbg = 1.18874 :::*/*/*/*/
[20:10:28.031] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 151.4calibrated Vbg = 1.18806 :::*/*/*/*/
[20:10:28.031] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 164.3calibrated Vbg = 1.19116 :::*/*/*/*/
[20:10:28.031] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 164.9calibrated Vbg = 1.194 :::*/*/*/*/
[20:10:28.031] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 158.3calibrated Vbg = 1.20047 :::*/*/*/*/
[20:10:28.031] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 160.6calibrated Vbg = 1.19801 :::*/*/*/*/
[20:10:28.031] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 166calibrated Vbg = 1.19649 :::*/*/*/*/
[20:10:28.031] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 159.2calibrated Vbg = 1.18856 :::*/*/*/*/
[20:10:28.031] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 158.3calibrated Vbg = 1.1921 :::*/*/*/*/
[20:10:28.031] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 151.7calibrated Vbg = 1.17781 :::*/*/*/*/
[20:10:28.031] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 150.6calibrated Vbg = 1.18908 :::*/*/*/*/
[20:10:28.031] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 159.1calibrated Vbg = 1.19371 :::*/*/*/*/
[20:10:28.031] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 149.7calibrated Vbg = 1.19337 :::*/*/*/*/
[20:10:28.031] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 159.5calibrated Vbg = 1.18931 :::*/*/*/*/
[20:10:28.034] <TB2> INFO: ----------------------------------------------------------------------
[20:10:28.034] <TB2> INFO: PixTestReadback::CalibrateIa()
[20:10:28.034] <TB2> INFO: ----------------------------------------------------------------------
[20:13:08.844] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C0.dat
[20:13:08.845] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C1.dat
[20:13:08.845] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C2.dat
[20:13:08.845] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C3.dat
[20:13:08.845] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C4.dat
[20:13:08.845] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C5.dat
[20:13:08.845] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C6.dat
[20:13:08.845] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C7.dat
[20:13:08.845] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C8.dat
[20:13:08.845] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C9.dat
[20:13:08.845] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C10.dat
[20:13:08.845] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C11.dat
[20:13:08.845] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C12.dat
[20:13:08.845] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C13.dat
[20:13:08.846] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C14.dat
[20:13:08.846] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C15.dat
[20:13:08.875] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[20:13:08.877] <TB2> INFO: PixTestReadback::doTest() done
[20:13:08.878] <TB2> INFO: Decoding statistics:
[20:13:08.878] <TB2> INFO: General information:
[20:13:08.878] <TB2> INFO: 16bit words read: 1536
[20:13:08.878] <TB2> INFO: valid events total: 256
[20:13:08.878] <TB2> INFO: empty events: 256
[20:13:08.878] <TB2> INFO: valid events with pixels: 0
[20:13:08.878] <TB2> INFO: valid pixel hits: 0
[20:13:08.878] <TB2> INFO: Event errors: 0
[20:13:08.878] <TB2> INFO: start marker: 0
[20:13:08.878] <TB2> INFO: stop marker: 0
[20:13:08.878] <TB2> INFO: overflow: 0
[20:13:08.878] <TB2> INFO: invalid 5bit words: 0
[20:13:08.878] <TB2> INFO: invalid XOR eye diagram: 0
[20:13:08.878] <TB2> INFO: frame (failed synchr.): 0
[20:13:08.878] <TB2> INFO: idle data (no TBM trl): 0
[20:13:08.878] <TB2> INFO: no data (only TBM hdr): 0
[20:13:08.878] <TB2> INFO: TBM errors: 0
[20:13:08.878] <TB2> INFO: flawed TBM headers: 0
[20:13:08.878] <TB2> INFO: flawed TBM trailers: 0
[20:13:08.878] <TB2> INFO: event ID mismatches: 0
[20:13:08.878] <TB2> INFO: ROC errors: 0
[20:13:08.878] <TB2> INFO: missing ROC header(s): 0
[20:13:08.878] <TB2> INFO: misplaced readback start: 0
[20:13:08.878] <TB2> INFO: Pixel decoding errors: 0
[20:13:08.878] <TB2> INFO: pixel data incomplete: 0
[20:13:08.878] <TB2> INFO: pixel address: 0
[20:13:08.878] <TB2> INFO: pulse height fill bit: 0
[20:13:08.878] <TB2> INFO: buffer corruption: 0
[20:13:08.928] <TB2> INFO: ######################################################################
[20:13:08.928] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[20:13:08.928] <TB2> INFO: ######################################################################
[20:13:08.931] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[20:13:09.068] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:13:09.068] <TB2> INFO: run 1 of 1
[20:13:09.304] <TB2> INFO: Expecting 3120000 events.
[20:13:40.627] <TB2> INFO: 675725 events read in total (30732ms).











[20:14:11.051] <TB2> INFO: 1348320 events read in total (61156ms).
[20:14:41.875] <TB2> INFO: 2017425 events read in total (91980ms).











[20:15:12.141] <TB2> INFO: 2685030 events read in total (122246ms).











[20:15:32.096] <TB2> INFO: 3120000 events read in total (142201ms).
[20:15:32.169] <TB2> INFO: Test took 143102ms.
[20:15:56.661] <TB2> INFO: PixTestBBMap::doTest() done with 1 decoding errors: , duration: 167 seconds
[20:15:56.661] <TB2> INFO: number of dead bumps (per ROC): 1 0 1 0 4 0 1 0 1 1 0 0 1 0 0 0
[20:15:56.661] <TB2> INFO: separation cut (per ROC): 103 104 109 106 104 117 106 104 105 101 110 109 103 95 107 106
[20:15:56.661] <TB2> INFO: Decoding statistics:
[20:15:56.661] <TB2> INFO: General information:
[20:15:56.661] <TB2> INFO: 16bit words read: 0
[20:15:56.661] <TB2> INFO: valid events total: 0
[20:15:56.661] <TB2> INFO: empty events: 0
[20:15:56.661] <TB2> INFO: valid events with pixels: 0
[20:15:56.661] <TB2> INFO: valid pixel hits: 0
[20:15:56.661] <TB2> INFO: Event errors: 0
[20:15:56.661] <TB2> INFO: start marker: 0
[20:15:56.661] <TB2> INFO: stop marker: 0
[20:15:56.661] <TB2> INFO: overflow: 0
[20:15:56.661] <TB2> INFO: invalid 5bit words: 0
[20:15:56.661] <TB2> INFO: invalid XOR eye diagram: 0
[20:15:56.661] <TB2> INFO: frame (failed synchr.): 0
[20:15:56.661] <TB2> INFO: idle data (no TBM trl): 0
[20:15:56.661] <TB2> INFO: no data (only TBM hdr): 0
[20:15:56.661] <TB2> INFO: TBM errors: 0
[20:15:56.661] <TB2> INFO: flawed TBM headers: 0
[20:15:56.661] <TB2> INFO: flawed TBM trailers: 0
[20:15:56.661] <TB2> INFO: event ID mismatches: 0
[20:15:56.661] <TB2> INFO: ROC errors: 0
[20:15:56.661] <TB2> INFO: missing ROC header(s): 0
[20:15:56.661] <TB2> INFO: misplaced readback start: 0
[20:15:56.661] <TB2> INFO: Pixel decoding errors: 0
[20:15:56.661] <TB2> INFO: pixel data incomplete: 0
[20:15:56.661] <TB2> INFO: pixel address: 0
[20:15:56.661] <TB2> INFO: pulse height fill bit: 0
[20:15:56.661] <TB2> INFO: buffer corruption: 0
[20:15:56.700] <TB2> INFO: ######################################################################
[20:15:56.700] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[20:15:56.700] <TB2> INFO: ######################################################################
[20:15:56.700] <TB2> INFO: ----------------------------------------------------------------------
[20:15:56.700] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[20:15:56.700] <TB2> INFO: ----------------------------------------------------------------------
[20:15:56.700] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[20:15:56.715] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[20:15:56.715] <TB2> INFO: run 1 of 1
[20:15:56.953] <TB2> INFO: Expecting 36608000 events.
[20:16:20.657] <TB2> INFO: 701750 events read in total (23113ms).
[20:16:43.480] <TB2> INFO: 1387800 events read in total (45936ms).
[20:17:06.596] <TB2> INFO: 2069500 events read in total (69053ms).
[20:17:29.190] <TB2> INFO: 2753500 events read in total (91646ms).
[20:17:52.089] <TB2> INFO: 3437850 events read in total (114545ms).
[20:18:15.205] <TB2> INFO: 4123650 events read in total (137661ms).
[20:18:38.568] <TB2> INFO: 4804250 events read in total (161024ms).
[20:19:01.536] <TB2> INFO: 5485350 events read in total (183992ms).
[20:19:24.216] <TB2> INFO: 6167000 events read in total (206672ms).
[20:19:47.238] <TB2> INFO: 6850800 events read in total (229694ms).
[20:20:10.134] <TB2> INFO: 7531450 events read in total (252590ms).
[20:20:33.128] <TB2> INFO: 8214750 events read in total (275584ms).
[20:20:56.038] <TB2> INFO: 8896150 events read in total (298494ms).
[20:21:18.994] <TB2> INFO: 9579350 events read in total (321450ms).
[20:21:41.944] <TB2> INFO: 10258800 events read in total (344400ms).
[20:22:05.165] <TB2> INFO: 10939100 events read in total (367621ms).
[20:22:28.335] <TB2> INFO: 11620500 events read in total (390791ms).
[20:22:51.215] <TB2> INFO: 12299600 events read in total (413671ms).
[20:23:14.190] <TB2> INFO: 12976950 events read in total (436646ms).
[20:23:37.295] <TB2> INFO: 13655950 events read in total (459751ms).
[20:24:00.255] <TB2> INFO: 14334800 events read in total (482711ms).
[20:24:23.286] <TB2> INFO: 15012550 events read in total (505742ms).
[20:24:46.537] <TB2> INFO: 15690000 events read in total (528993ms).
[20:25:09.526] <TB2> INFO: 16370400 events read in total (551982ms).
[20:25:32.461] <TB2> INFO: 17048800 events read in total (574917ms).
[20:25:55.564] <TB2> INFO: 17727450 events read in total (598020ms).
[20:26:18.909] <TB2> INFO: 18406350 events read in total (621365ms).
[20:26:42.282] <TB2> INFO: 19081100 events read in total (644738ms).
[20:27:05.254] <TB2> INFO: 19757250 events read in total (667710ms).
[20:27:28.592] <TB2> INFO: 20432700 events read in total (691048ms).
[20:27:51.947] <TB2> INFO: 21109850 events read in total (714403ms).
[20:28:14.618] <TB2> INFO: 21783500 events read in total (737074ms).
[20:28:37.683] <TB2> INFO: 22457750 events read in total (760140ms).
[20:29:00.677] <TB2> INFO: 23132350 events read in total (783133ms).
[20:29:23.741] <TB2> INFO: 23806250 events read in total (806197ms).
[20:29:47.048] <TB2> INFO: 24478950 events read in total (829504ms).
[20:30:09.791] <TB2> INFO: 25153000 events read in total (852247ms).
[20:30:32.541] <TB2> INFO: 25827050 events read in total (874997ms).
[20:30:55.377] <TB2> INFO: 26499250 events read in total (897833ms).
[20:31:18.178] <TB2> INFO: 27171300 events read in total (920634ms).
[20:31:41.245] <TB2> INFO: 27843100 events read in total (943701ms).
[20:32:04.406] <TB2> INFO: 28516150 events read in total (966862ms).
[20:32:27.281] <TB2> INFO: 29187650 events read in total (989737ms).
[20:32:50.133] <TB2> INFO: 29859800 events read in total (1012589ms).
[20:33:12.888] <TB2> INFO: 30530950 events read in total (1035344ms).
[20:33:35.869] <TB2> INFO: 31202300 events read in total (1058325ms).
[20:33:58.788] <TB2> INFO: 31873350 events read in total (1081244ms).
[20:34:21.939] <TB2> INFO: 32546100 events read in total (1104395ms).
[20:34:44.829] <TB2> INFO: 33218550 events read in total (1127285ms).
[20:35:08.066] <TB2> INFO: 33893500 events read in total (1150522ms).
[20:35:31.289] <TB2> INFO: 34565600 events read in total (1173745ms).
[20:35:54.531] <TB2> INFO: 35238600 events read in total (1196987ms).
[20:36:17.578] <TB2> INFO: 35915200 events read in total (1220034ms).
[20:36:41.445] <TB2> INFO: 36605700 events read in total (1243901ms).
[20:36:41.948] <TB2> INFO: 36608000 events read in total (1244404ms).
[20:36:42.020] <TB2> INFO: Test took 1245305ms.
[20:36:42.395] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:36:44.152] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:36:46.208] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:36:47.917] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:36:49.727] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:36:51.717] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:36:53.765] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:36:55.692] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:36:57.562] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:36:59.435] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:37:01.462] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:37:03.540] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:37:05.651] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:37:08.046] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:37:09.839] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:37:12.076] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:37:13.644] <TB2> INFO: PixTestScurves::scurves() done
[20:37:13.644] <TB2> INFO: Vcal mean: 118.49 119.88 130.86 123.46 120.57 140.21 127.67 120.43 128.11 123.79 129.13 124.60 123.00 118.23 129.37 125.48
[20:37:13.644] <TB2> INFO: Vcal RMS: 5.45 6.06 6.63 6.07 7.32 8.53 6.41 6.31 6.15 7.11 6.42 6.63 6.45 6.31 7.47 6.16
[20:37:13.644] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1276 seconds
[20:37:13.644] <TB2> INFO: Decoding statistics:
[20:37:13.644] <TB2> INFO: General information:
[20:37:13.644] <TB2> INFO: 16bit words read: 0
[20:37:13.644] <TB2> INFO: valid events total: 0
[20:37:13.644] <TB2> INFO: empty events: 0
[20:37:13.644] <TB2> INFO: valid events with pixels: 0
[20:37:13.644] <TB2> INFO: valid pixel hits: 0
[20:37:13.644] <TB2> INFO: Event errors: 0
[20:37:13.644] <TB2> INFO: start marker: 0
[20:37:13.644] <TB2> INFO: stop marker: 0
[20:37:13.644] <TB2> INFO: overflow: 0
[20:37:13.644] <TB2> INFO: invalid 5bit words: 0
[20:37:13.644] <TB2> INFO: invalid XOR eye diagram: 0
[20:37:13.644] <TB2> INFO: frame (failed synchr.): 0
[20:37:13.644] <TB2> INFO: idle data (no TBM trl): 0
[20:37:13.644] <TB2> INFO: no data (only TBM hdr): 0
[20:37:13.644] <TB2> INFO: TBM errors: 0
[20:37:13.644] <TB2> INFO: flawed TBM headers: 0
[20:37:13.644] <TB2> INFO: flawed TBM trailers: 0
[20:37:13.644] <TB2> INFO: event ID mismatches: 0
[20:37:13.644] <TB2> INFO: ROC errors: 0
[20:37:13.644] <TB2> INFO: missing ROC header(s): 0
[20:37:13.644] <TB2> INFO: misplaced readback start: 0
[20:37:13.644] <TB2> INFO: Pixel decoding errors: 0
[20:37:13.644] <TB2> INFO: pixel data incomplete: 0
[20:37:13.644] <TB2> INFO: pixel address: 0
[20:37:13.644] <TB2> INFO: pulse height fill bit: 0
[20:37:13.644] <TB2> INFO: buffer corruption: 0
[20:37:13.711] <TB2> INFO: ######################################################################
[20:37:13.711] <TB2> INFO: PixTestTrim::doTest()
[20:37:13.711] <TB2> INFO: ######################################################################
[20:37:13.712] <TB2> INFO: ----------------------------------------------------------------------
[20:37:13.712] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[20:37:13.712] <TB2> INFO: ----------------------------------------------------------------------
[20:37:13.757] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[20:37:13.757] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[20:37:13.770] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:37:13.770] <TB2> INFO: run 1 of 1
[20:37:14.007] <TB2> INFO: Expecting 5025280 events.
[20:37:45.270] <TB2> INFO: 835128 events read in total (30663ms).
[20:38:15.929] <TB2> INFO: 1666776 events read in total (61322ms).
[20:38:46.488] <TB2> INFO: 2496144 events read in total (91881ms).
[20:39:17.280] <TB2> INFO: 3322728 events read in total (122673ms).
[20:39:47.943] <TB2> INFO: 4146792 events read in total (153336ms).
[20:40:18.358] <TB2> INFO: 4970480 events read in total (183751ms).
[20:40:20.772] <TB2> INFO: 5025280 events read in total (186165ms).
[20:40:20.845] <TB2> INFO: Test took 187075ms.
[20:40:38.049] <TB2> INFO: ROC 0 VthrComp = 117
[20:40:38.049] <TB2> INFO: ROC 1 VthrComp = 113
[20:40:38.049] <TB2> INFO: ROC 2 VthrComp = 129
[20:40:38.049] <TB2> INFO: ROC 3 VthrComp = 121
[20:40:38.049] <TB2> INFO: ROC 4 VthrComp = 114
[20:40:38.050] <TB2> INFO: ROC 5 VthrComp = 130
[20:40:38.050] <TB2> INFO: ROC 6 VthrComp = 126
[20:40:38.050] <TB2> INFO: ROC 7 VthrComp = 111
[20:40:38.051] <TB2> INFO: ROC 8 VthrComp = 120
[20:40:38.051] <TB2> INFO: ROC 9 VthrComp = 109
[20:40:38.051] <TB2> INFO: ROC 10 VthrComp = 126
[20:40:38.051] <TB2> INFO: ROC 11 VthrComp = 120
[20:40:38.051] <TB2> INFO: ROC 12 VthrComp = 119
[20:40:38.052] <TB2> INFO: ROC 13 VthrComp = 107
[20:40:38.052] <TB2> INFO: ROC 14 VthrComp = 122
[20:40:38.052] <TB2> INFO: ROC 15 VthrComp = 122
[20:40:38.289] <TB2> INFO: Expecting 41600 events.
[20:40:41.999] <TB2> INFO: 41600 events read in total (3118ms).
[20:40:41.000] <TB2> INFO: Test took 3947ms.
[20:40:42.009] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[20:40:42.009] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[20:40:42.020] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:40:42.020] <TB2> INFO: run 1 of 1
[20:40:42.298] <TB2> INFO: Expecting 5025280 events.
[20:41:09.046] <TB2> INFO: 595488 events read in total (26156ms).
[20:41:35.487] <TB2> INFO: 1188920 events read in total (52597ms).
[20:42:01.196] <TB2> INFO: 1781800 events read in total (78306ms).
[20:42:27.564] <TB2> INFO: 2373824 events read in total (104674ms).
[20:42:53.742] <TB2> INFO: 2963064 events read in total (130852ms).
[20:43:19.574] <TB2> INFO: 3550984 events read in total (156684ms).
[20:43:45.259] <TB2> INFO: 4138368 events read in total (182369ms).
[20:44:10.967] <TB2> INFO: 4725048 events read in total (208077ms).
[20:44:24.386] <TB2> INFO: 5025280 events read in total (221496ms).
[20:44:24.463] <TB2> INFO: Test took 222443ms.
[20:44:52.268] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 59.8756 for pixel 4/21 mean/min/max = 46.2846/32.6126/59.9565
[20:44:52.268] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 64.1844 for pixel 2/16 mean/min/max = 48.8073/33.2564/64.3582
[20:44:52.268] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 63.0202 for pixel 5/4 mean/min/max = 47.1927/31.1568/63.2285
[20:44:52.269] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 61.085 for pixel 13/79 mean/min/max = 47.6562/33.9038/61.4087
[20:44:52.269] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 65.1418 for pixel 18/62 mean/min/max = 48.6426/32.1145/65.1706
[20:44:52.270] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 67.4788 for pixel 37/79 mean/min/max = 49.72/31.431/68.0089
[20:44:52.270] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 60.8362 for pixel 17/2 mean/min/max = 46.8169/32.3982/61.2356
[20:44:52.271] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 67.0918 for pixel 17/5 mean/min/max = 50.855/34.5793/67.1308
[20:44:52.271] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 64.4668 for pixel 7/16 mean/min/max = 48.7406/32.9271/64.554
[20:44:52.272] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 69.1729 for pixel 16/74 mean/min/max = 51.9169/34.5971/69.2367
[20:44:52.272] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 61.7655 for pixel 0/19 mean/min/max = 46.406/30.7764/62.0355
[20:44:52.273] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 62.629 for pixel 0/7 mean/min/max = 47.7693/32.7293/62.8094
[20:44:52.273] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 61.6016 for pixel 37/20 mean/min/max = 46.4959/31.321/61.6708
[20:44:52.274] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 64.9269 for pixel 10/22 mean/min/max = 49.9988/34.98/65.0177
[20:44:52.274] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 64.1883 for pixel 6/79 mean/min/max = 48.1532/32.0255/64.2808
[20:44:52.274] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 64.2711 for pixel 44/4 mean/min/max = 48.3484/32.4083/64.2885
[20:44:52.275] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:44:52.364] <TB2> INFO: Expecting 411648 events.
[20:45:01.904] <TB2> INFO: 411648 events read in total (8949ms).
[20:45:01.912] <TB2> INFO: Expecting 411648 events.
[20:45:11.255] <TB2> INFO: 411648 events read in total (8940ms).
[20:45:11.267] <TB2> INFO: Expecting 411648 events.
[20:45:20.544] <TB2> INFO: 411648 events read in total (8874ms).
[20:45:20.558] <TB2> INFO: Expecting 411648 events.
[20:45:29.868] <TB2> INFO: 411648 events read in total (8907ms).
[20:45:29.886] <TB2> INFO: Expecting 411648 events.
[20:45:39.248] <TB2> INFO: 411648 events read in total (8959ms).
[20:45:39.266] <TB2> INFO: Expecting 411648 events.
[20:45:48.655] <TB2> INFO: 411648 events read in total (8986ms).
[20:45:48.676] <TB2> INFO: Expecting 411648 events.
[20:45:57.002] <TB2> INFO: 411648 events read in total (8923ms).
[20:45:58.025] <TB2> INFO: Expecting 411648 events.
[20:46:07.450] <TB2> INFO: 411648 events read in total (9022ms).
[20:46:07.476] <TB2> INFO: Expecting 411648 events.
[20:46:16.815] <TB2> INFO: 411648 events read in total (8936ms).
[20:46:16.844] <TB2> INFO: Expecting 411648 events.
[20:46:26.220] <TB2> INFO: 411648 events read in total (8973ms).
[20:46:26.264] <TB2> INFO: Expecting 411648 events.
[20:46:35.512] <TB2> INFO: 411648 events read in total (8845ms).
[20:46:35.559] <TB2> INFO: Expecting 411648 events.
[20:46:44.861] <TB2> INFO: 411648 events read in total (8898ms).
[20:46:44.905] <TB2> INFO: Expecting 411648 events.
[20:46:54.441] <TB2> INFO: 411648 events read in total (9133ms).
[20:46:54.497] <TB2> INFO: Expecting 411648 events.
[20:47:03.858] <TB2> INFO: 411648 events read in total (8958ms).
[20:47:03.926] <TB2> INFO: Expecting 411648 events.
[20:47:13.102] <TB2> INFO: 411648 events read in total (8773ms).
[20:47:13.163] <TB2> INFO: Expecting 411648 events.
[20:47:22.523] <TB2> INFO: 411648 events read in total (8957ms).
[20:47:22.586] <TB2> INFO: Test took 150311ms.
[20:47:23.260] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[20:47:23.274] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:47:23.274] <TB2> INFO: run 1 of 1
[20:47:23.513] <TB2> INFO: Expecting 5025280 events.
[20:47:50.357] <TB2> INFO: 594176 events read in total (26252ms).
[20:48:16.427] <TB2> INFO: 1187904 events read in total (52322ms).
[20:48:42.981] <TB2> INFO: 1783088 events read in total (78877ms).
[20:49:09.360] <TB2> INFO: 2375816 events read in total (105255ms).
[20:49:36.089] <TB2> INFO: 2970952 events read in total (131984ms).
[20:50:02.987] <TB2> INFO: 3573856 events read in total (158883ms).
[20:50:29.602] <TB2> INFO: 4175096 events read in total (185497ms).
[20:50:55.851] <TB2> INFO: 4776384 events read in total (211746ms).
[20:51:07.326] <TB2> INFO: 5025280 events read in total (223221ms).
[20:51:07.541] <TB2> INFO: Test took 224268ms.
[20:51:32.614] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 2.148615 .. 147.283500
[20:51:32.867] <TB2> INFO: Expecting 208000 events.
[20:51:42.310] <TB2> INFO: 208000 events read in total (8851ms).
[20:51:42.311] <TB2> INFO: Test took 9695ms.
[20:51:42.382] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 2 .. 157 (-1/-1) hits flags = 528 (plus default)
[20:51:42.396] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:51:42.396] <TB2> INFO: run 1 of 1
[20:51:42.675] <TB2> INFO: Expecting 5191680 events.
[20:52:09.393] <TB2> INFO: 584280 events read in total (26126ms).
[20:52:35.294] <TB2> INFO: 1167800 events read in total (52028ms).
[20:53:01.402] <TB2> INFO: 1750912 events read in total (78136ms).
[20:53:27.667] <TB2> INFO: 2334864 events read in total (104400ms).
[20:53:53.962] <TB2> INFO: 2918144 events read in total (130696ms).
[20:54:20.248] <TB2> INFO: 3501728 events read in total (156981ms).
[20:54:46.134] <TB2> INFO: 4085320 events read in total (182867ms).
[20:55:11.931] <TB2> INFO: 4668352 events read in total (208664ms).
[20:55:35.493] <TB2> INFO: 5191680 events read in total (232226ms).
[20:55:35.609] <TB2> INFO: Test took 233214ms.
[20:56:03.008] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 26.261706 .. 52.763167
[20:56:03.308] <TB2> INFO: Expecting 208000 events.
[20:56:13.529] <TB2> INFO: 208000 events read in total (9629ms).
[20:56:13.529] <TB2> INFO: Test took 10514ms.
[20:56:13.576] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 62 (-1/-1) hits flags = 528 (plus default)
[20:56:13.589] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:56:13.589] <TB2> INFO: run 1 of 1
[20:56:13.871] <TB2> INFO: Expecting 1564160 events.
[20:56:42.192] <TB2> INFO: 647704 events read in total (27729ms).
[20:57:09.751] <TB2> INFO: 1293032 events read in total (55289ms).
[20:57:21.884] <TB2> INFO: 1564160 events read in total (67421ms).
[20:57:21.935] <TB2> INFO: Test took 68347ms.
[20:57:36.014] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 29.420675 .. 50.864574
[20:57:36.254] <TB2> INFO: Expecting 208000 events.
[20:57:45.893] <TB2> INFO: 208000 events read in total (9048ms).
[20:57:45.894] <TB2> INFO: Test took 9879ms.
[20:57:45.962] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 19 .. 60 (-1/-1) hits flags = 528 (plus default)
[20:57:45.976] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:57:45.976] <TB2> INFO: run 1 of 1
[20:57:46.254] <TB2> INFO: Expecting 1397760 events.
[20:58:14.673] <TB2> INFO: 638664 events read in total (27828ms).
[20:58:43.818] <TB2> INFO: 1275224 events read in total (56973ms).
[20:58:49.523] <TB2> INFO: 1397760 events read in total (62678ms).
[20:58:49.558] <TB2> INFO: Test took 63582ms.
[20:59:01.882] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 27.894522 .. 47.947193
[20:59:02.122] <TB2> INFO: Expecting 208000 events.
[20:59:12.089] <TB2> INFO: 208000 events read in total (9376ms).
[20:59:12.090] <TB2> INFO: Test took 10207ms.
[20:59:12.148] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 17 .. 57 (-1/-1) hits flags = 528 (plus default)
[20:59:12.162] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:59:12.162] <TB2> INFO: run 1 of 1
[20:59:12.440] <TB2> INFO: Expecting 1364480 events.
[20:59:40.913] <TB2> INFO: 654248 events read in total (27881ms).
[21:00:09.038] <TB2> INFO: 1307256 events read in total (56007ms).
[21:00:11.873] <TB2> INFO: 1364480 events read in total (58841ms).
[21:00:11.905] <TB2> INFO: Test took 59744ms.
[21:00:24.119] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[21:00:24.119] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[21:00:24.132] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:00:24.133] <TB2> INFO: run 1 of 1
[21:00:24.395] <TB2> INFO: Expecting 1364480 events.
[21:00:53.140] <TB2> INFO: 670656 events read in total (28153ms).
[21:01:21.386] <TB2> INFO: 1339648 events read in total (56400ms).
[21:01:22.819] <TB2> INFO: 1364480 events read in total (57833ms).
[21:01:22.849] <TB2> INFO: Test took 58717ms.
[21:01:34.742] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C0.dat
[21:01:34.742] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C1.dat
[21:01:34.742] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C2.dat
[21:01:34.743] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C3.dat
[21:01:34.743] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C4.dat
[21:01:34.743] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C5.dat
[21:01:34.743] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C6.dat
[21:01:34.743] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C7.dat
[21:01:34.743] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C8.dat
[21:01:34.743] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C9.dat
[21:01:34.744] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C10.dat
[21:01:34.744] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C11.dat
[21:01:34.744] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C12.dat
[21:01:34.744] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C13.dat
[21:01:34.744] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C14.dat
[21:01:34.744] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C15.dat
[21:01:34.745] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C0.dat
[21:01:34.751] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C1.dat
[21:01:34.756] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C2.dat
[21:01:34.760] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C3.dat
[21:01:34.765] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C4.dat
[21:01:34.769] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C5.dat
[21:01:34.774] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C6.dat
[21:01:34.779] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C7.dat
[21:01:34.783] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C8.dat
[21:01:34.788] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C9.dat
[21:01:34.793] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C10.dat
[21:01:34.797] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C11.dat
[21:01:34.802] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C12.dat
[21:01:34.806] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C13.dat
[21:01:34.811] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C14.dat
[21:01:34.816] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C15.dat
[21:01:34.820] <TB2> INFO: PixTestTrim::trimTest() done
[21:01:34.820] <TB2> INFO: vtrim: 118 145 135 108 147 137 114 147 136 145 109 117 167 123 117 139
[21:01:34.820] <TB2> INFO: vthrcomp: 117 113 129 121 114 130 126 111 120 109 126 120 119 107 122 122
[21:01:34.820] <TB2> INFO: vcal mean: 35.04 35.94 35.71 34.98 35.52 35.71 35.31 35.64 35.31 36.04 35.32 35.06 35.06 35.19 35.18 35.72
[21:01:34.820] <TB2> INFO: vcal RMS: 1.15 2.17 1.93 1.04 1.73 1.94 1.42 1.80 1.33 2.18 1.61 1.17 1.20 1.28 1.25 1.89
[21:01:34.820] <TB2> INFO: bits mean: 9.47 9.56 9.94 8.45 9.88 9.07 9.35 9.06 8.98 9.24 9.50 8.87 9.90 8.46 9.15 9.68
[21:01:34.820] <TB2> INFO: bits RMS: 2.72 2.64 2.69 2.80 2.42 2.92 2.78 2.48 2.76 2.40 2.89 2.81 2.64 2.55 2.75 2.66
[21:01:34.828] <TB2> INFO: ----------------------------------------------------------------------
[21:01:34.828] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[21:01:34.828] <TB2> INFO: ----------------------------------------------------------------------
[21:01:34.831] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[21:01:34.844] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:01:34.845] <TB2> INFO: run 1 of 1
[21:01:35.080] <TB2> INFO: Expecting 4160000 events.
[21:02:08.221] <TB2> INFO: 774025 events read in total (32549ms).
[21:02:40.661] <TB2> INFO: 1541970 events read in total (64989ms).
[21:03:13.246] <TB2> INFO: 2306175 events read in total (97574ms).
[21:03:45.557] <TB2> INFO: 3065970 events read in total (129885ms).
[21:04:17.901] <TB2> INFO: 3822325 events read in total (162229ms).
[21:04:33.419] <TB2> INFO: 4160000 events read in total (177747ms).
[21:04:33.503] <TB2> INFO: Test took 178658ms.
[21:05:00.814] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 242 (-1/-1) hits flags = 528 (plus default)
[21:05:00.827] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:05:00.827] <TB2> INFO: run 1 of 1
[21:05:01.063] <TB2> INFO: Expecting 5054400 events.
[21:05:32.798] <TB2> INFO: 699135 events read in total (31143ms).
[21:06:03.567] <TB2> INFO: 1394675 events read in total (61912ms).
[21:06:34.627] <TB2> INFO: 2088270 events read in total (92972ms).
[21:07:05.633] <TB2> INFO: 2780835 events read in total (123978ms).
[21:07:36.722] <TB2> INFO: 3471060 events read in total (155067ms).
[21:08:07.314] <TB2> INFO: 4159365 events read in total (185659ms).
[21:08:38.662] <TB2> INFO: 4847900 events read in total (217007ms).
[21:08:47.767] <TB2> INFO: 5054400 events read in total (226112ms).
[21:08:47.935] <TB2> INFO: Test took 227108ms.
[21:09:19.032] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 223 (-1/-1) hits flags = 528 (plus default)
[21:09:19.046] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:09:19.046] <TB2> INFO: run 1 of 1
[21:09:19.327] <TB2> INFO: Expecting 4659200 events.
[21:09:51.217] <TB2> INFO: 718165 events read in total (31299ms).
[21:10:22.430] <TB2> INFO: 1432775 events read in total (62511ms).
[21:10:53.786] <TB2> INFO: 2144550 events read in total (93868ms).
[21:11:25.089] <TB2> INFO: 2854815 events read in total (125170ms).
[21:11:56.998] <TB2> INFO: 3562255 events read in total (157079ms).
[21:12:27.943] <TB2> INFO: 4268350 events read in total (188024ms).
[21:12:45.254] <TB2> INFO: 4659200 events read in total (205335ms).
[21:12:45.433] <TB2> INFO: Test took 206387ms.
[21:13:11.231] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 222 (-1/-1) hits flags = 528 (plus default)
[21:13:11.248] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:13:11.248] <TB2> INFO: run 1 of 1
[21:13:11.485] <TB2> INFO: Expecting 4638400 events.
[21:13:43.208] <TB2> INFO: 719340 events read in total (31131ms).
[21:14:13.891] <TB2> INFO: 1435295 events read in total (61814ms).
[21:14:44.745] <TB2> INFO: 2148380 events read in total (92668ms).
[21:15:15.563] <TB2> INFO: 2859740 events read in total (123486ms).
[21:15:47.154] <TB2> INFO: 3568230 events read in total (155077ms).
[21:16:18.123] <TB2> INFO: 4275870 events read in total (186046ms).
[21:16:34.206] <TB2> INFO: 4638400 events read in total (202129ms).
[21:16:34.379] <TB2> INFO: Test took 203130ms.
[21:17:03.008] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 222 (-1/-1) hits flags = 528 (plus default)
[21:17:03.021] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:17:03.021] <TB2> INFO: run 1 of 1
[21:17:03.257] <TB2> INFO: Expecting 4638400 events.
[21:17:34.772] <TB2> INFO: 719665 events read in total (30924ms).
[21:18:05.893] <TB2> INFO: 1435925 events read in total (62045ms).
[21:18:36.821] <TB2> INFO: 2149440 events read in total (92973ms).
[21:19:08.692] <TB2> INFO: 2861060 events read in total (124844ms).
[21:19:39.814] <TB2> INFO: 3569805 events read in total (155966ms).
[21:20:11.053] <TB2> INFO: 4277615 events read in total (187205ms).
[21:20:26.789] <TB2> INFO: 4638400 events read in total (202941ms).
[21:20:26.875] <TB2> INFO: Test took 203853ms.
[21:20:53.928] <TB2> INFO: PixTestTrim::trimBitTest() done
[21:20:53.929] <TB2> INFO: PixTestTrim::doTest() done, duration: 2620 seconds
[21:20:53.929] <TB2> INFO: Decoding statistics:
[21:20:53.929] <TB2> INFO: General information:
[21:20:53.929] <TB2> INFO: 16bit words read: 0
[21:20:53.929] <TB2> INFO: valid events total: 0
[21:20:53.929] <TB2> INFO: empty events: 0
[21:20:53.929] <TB2> INFO: valid events with pixels: 0
[21:20:53.929] <TB2> INFO: valid pixel hits: 0
[21:20:53.929] <TB2> INFO: Event errors: 0
[21:20:53.929] <TB2> INFO: start marker: 0
[21:20:53.929] <TB2> INFO: stop marker: 0
[21:20:53.929] <TB2> INFO: overflow: 0
[21:20:53.929] <TB2> INFO: invalid 5bit words: 0
[21:20:53.929] <TB2> INFO: invalid XOR eye diagram: 0
[21:20:53.929] <TB2> INFO: frame (failed synchr.): 0
[21:20:53.929] <TB2> INFO: idle data (no TBM trl): 0
[21:20:53.929] <TB2> INFO: no data (only TBM hdr): 0
[21:20:53.929] <TB2> INFO: TBM errors: 0
[21:20:53.929] <TB2> INFO: flawed TBM headers: 0
[21:20:53.929] <TB2> INFO: flawed TBM trailers: 0
[21:20:53.929] <TB2> INFO: event ID mismatches: 0
[21:20:53.929] <TB2> INFO: ROC errors: 0
[21:20:53.929] <TB2> INFO: missing ROC header(s): 0
[21:20:53.929] <TB2> INFO: misplaced readback start: 0
[21:20:53.930] <TB2> INFO: Pixel decoding errors: 0
[21:20:53.930] <TB2> INFO: pixel data incomplete: 0
[21:20:53.930] <TB2> INFO: pixel address: 0
[21:20:53.930] <TB2> INFO: pulse height fill bit: 0
[21:20:53.930] <TB2> INFO: buffer corruption: 0
[21:20:54.695] <TB2> INFO: ######################################################################
[21:20:54.695] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[21:20:54.695] <TB2> INFO: ######################################################################
[21:20:54.935] <TB2> INFO: Expecting 41600 events.
[21:20:58.434] <TB2> INFO: 41600 events read in total (2907ms).
[21:20:58.435] <TB2> INFO: Test took 3739ms.
[21:20:58.885] <TB2> INFO: Expecting 41600 events.
[21:21:02.401] <TB2> INFO: 41600 events read in total (2924ms).
[21:21:02.402] <TB2> INFO: Test took 3764ms.
[21:21:02.692] <TB2> INFO: Expecting 41600 events.
[21:21:06.222] <TB2> INFO: 41600 events read in total (2938ms).
[21:21:06.223] <TB2> INFO: Test took 3797ms.
[21:21:06.512] <TB2> INFO: Expecting 41600 events.
[21:21:10.092] <TB2> INFO: 41600 events read in total (2989ms).
[21:21:10.092] <TB2> INFO: Test took 3845ms.
[21:21:10.399] <TB2> INFO: Expecting 41600 events.
[21:21:13.917] <TB2> INFO: 41600 events read in total (2926ms).
[21:21:13.918] <TB2> INFO: Test took 3799ms.
[21:21:14.209] <TB2> INFO: Expecting 41600 events.
[21:21:17.790] <TB2> INFO: 41600 events read in total (2989ms).
[21:21:17.791] <TB2> INFO: Test took 3849ms.
[21:21:18.079] <TB2> INFO: Expecting 41600 events.
[21:21:21.678] <TB2> INFO: 41600 events read in total (3007ms).
[21:21:21.678] <TB2> INFO: Test took 3863ms.
[21:21:21.967] <TB2> INFO: Expecting 41600 events.
[21:21:25.688] <TB2> INFO: 41600 events read in total (3129ms).
[21:21:25.689] <TB2> INFO: Test took 3986ms.
[21:21:25.978] <TB2> INFO: Expecting 41600 events.
[21:21:29.518] <TB2> INFO: 41600 events read in total (2948ms).
[21:21:29.518] <TB2> INFO: Test took 3805ms.
[21:21:29.807] <TB2> INFO: Expecting 41600 events.
[21:21:33.377] <TB2> INFO: 41600 events read in total (2978ms).
[21:21:33.378] <TB2> INFO: Test took 3836ms.
[21:21:33.667] <TB2> INFO: Expecting 41600 events.
[21:21:37.254] <TB2> INFO: 41600 events read in total (2995ms).
[21:21:37.255] <TB2> INFO: Test took 3853ms.
[21:21:37.544] <TB2> INFO: Expecting 41600 events.
[21:21:41.182] <TB2> INFO: 41600 events read in total (3046ms).
[21:21:41.183] <TB2> INFO: Test took 3904ms.
[21:21:41.472] <TB2> INFO: Expecting 41600 events.
[21:21:44.979] <TB2> INFO: 41600 events read in total (2915ms).
[21:21:44.979] <TB2> INFO: Test took 3772ms.
[21:21:45.284] <TB2> INFO: Expecting 41600 events.
[21:21:48.781] <TB2> INFO: 41600 events read in total (2905ms).
[21:21:48.782] <TB2> INFO: Test took 3777ms.
[21:21:49.071] <TB2> INFO: Expecting 41600 events.
[21:21:52.651] <TB2> INFO: 41600 events read in total (2989ms).
[21:21:52.651] <TB2> INFO: Test took 3845ms.
[21:21:52.940] <TB2> INFO: Expecting 41600 events.
[21:21:56.516] <TB2> INFO: 41600 events read in total (2984ms).
[21:21:56.517] <TB2> INFO: Test took 3842ms.
[21:21:56.809] <TB2> INFO: Expecting 41600 events.
[21:22:00.314] <TB2> INFO: 41600 events read in total (2914ms).
[21:22:00.315] <TB2> INFO: Test took 3771ms.
[21:22:00.610] <TB2> INFO: Expecting 41600 events.
[21:22:04.155] <TB2> INFO: 41600 events read in total (2952ms).
[21:22:04.156] <TB2> INFO: Test took 3814ms.
[21:22:04.446] <TB2> INFO: Expecting 41600 events.
[21:22:08.059] <TB2> INFO: 41600 events read in total (3022ms).
[21:22:08.060] <TB2> INFO: Test took 3879ms.
[21:22:08.349] <TB2> INFO: Expecting 41600 events.
[21:22:11.852] <TB2> INFO: 41600 events read in total (2911ms).
[21:22:11.853] <TB2> INFO: Test took 3769ms.
[21:22:12.143] <TB2> INFO: Expecting 41600 events.
[21:22:15.638] <TB2> INFO: 41600 events read in total (2904ms).
[21:22:15.639] <TB2> INFO: Test took 3761ms.
[21:22:15.929] <TB2> INFO: Expecting 41600 events.
[21:22:19.511] <TB2> INFO: 41600 events read in total (2990ms).
[21:22:19.512] <TB2> INFO: Test took 3848ms.
[21:22:19.802] <TB2> INFO: Expecting 41600 events.
[21:22:23.392] <TB2> INFO: 41600 events read in total (2998ms).
[21:22:23.393] <TB2> INFO: Test took 3856ms.
[21:22:23.682] <TB2> INFO: Expecting 41600 events.
[21:22:27.211] <TB2> INFO: 41600 events read in total (2937ms).
[21:22:27.212] <TB2> INFO: Test took 3795ms.
[21:22:27.516] <TB2> INFO: Expecting 41600 events.
[21:22:31.085] <TB2> INFO: 41600 events read in total (2977ms).
[21:22:31.086] <TB2> INFO: Test took 3850ms.
[21:22:31.378] <TB2> INFO: Expecting 41600 events.
[21:22:34.929] <TB2> INFO: 41600 events read in total (2960ms).
[21:22:34.930] <TB2> INFO: Test took 3817ms.
[21:22:35.218] <TB2> INFO: Expecting 41600 events.
[21:22:38.751] <TB2> INFO: 41600 events read in total (2941ms).
[21:22:38.752] <TB2> INFO: Test took 3798ms.
[21:22:39.042] <TB2> INFO: Expecting 41600 events.
[21:22:42.566] <TB2> INFO: 41600 events read in total (2932ms).
[21:22:42.567] <TB2> INFO: Test took 3790ms.
[21:22:42.856] <TB2> INFO: Expecting 41600 events.
[21:22:46.379] <TB2> INFO: 41600 events read in total (2932ms).
[21:22:46.380] <TB2> INFO: Test took 3789ms.
[21:22:46.674] <TB2> INFO: Expecting 41600 events.
[21:22:50.224] <TB2> INFO: 41600 events read in total (2958ms).
[21:22:50.225] <TB2> INFO: Test took 3816ms.
[21:22:50.514] <TB2> INFO: Expecting 41600 events.
[21:22:54.030] <TB2> INFO: 41600 events read in total (2925ms).
[21:22:54.031] <TB2> INFO: Test took 3782ms.
[21:22:54.339] <TB2> INFO: Expecting 41600 events.
[21:22:57.881] <TB2> INFO: 41600 events read in total (2950ms).
[21:22:57.882] <TB2> INFO: Test took 3826ms.
[21:22:58.171] <TB2> INFO: Expecting 41600 events.
[21:23:01.682] <TB2> INFO: 41600 events read in total (2920ms).
[21:23:01.683] <TB2> INFO: Test took 3777ms.
[21:23:01.974] <TB2> INFO: Expecting 41600 events.
[21:23:05.536] <TB2> INFO: 41600 events read in total (2970ms).
[21:23:05.537] <TB2> INFO: Test took 3828ms.
[21:23:05.826] <TB2> INFO: Expecting 41600 events.
[21:23:09.360] <TB2> INFO: 41600 events read in total (2942ms).
[21:23:09.361] <TB2> INFO: Test took 3800ms.
[21:23:09.653] <TB2> INFO: Expecting 41600 events.
[21:23:13.141] <TB2> INFO: 41600 events read in total (2897ms).
[21:23:13.142] <TB2> INFO: Test took 3754ms.
[21:23:13.432] <TB2> INFO: Expecting 41600 events.
[21:23:16.956] <TB2> INFO: 41600 events read in total (2933ms).
[21:23:16.956] <TB2> INFO: Test took 3789ms.
[21:23:17.246] <TB2> INFO: Expecting 41600 events.
[21:23:20.807] <TB2> INFO: 41600 events read in total (2970ms).
[21:23:20.807] <TB2> INFO: Test took 3827ms.
[21:23:21.099] <TB2> INFO: Expecting 41600 events.
[21:23:24.678] <TB2> INFO: 41600 events read in total (2987ms).
[21:23:24.679] <TB2> INFO: Test took 3846ms.
[21:23:24.984] <TB2> INFO: Expecting 41600 events.
[21:23:28.488] <TB2> INFO: 41600 events read in total (2912ms).
[21:23:28.489] <TB2> INFO: Test took 3781ms.
[21:23:28.778] <TB2> INFO: Expecting 41600 events.
[21:23:32.368] <TB2> INFO: 41600 events read in total (2998ms).
[21:23:32.369] <TB2> INFO: Test took 3856ms.
[21:23:32.658] <TB2> INFO: Expecting 41600 events.
[21:23:36.398] <TB2> INFO: 41600 events read in total (3148ms).
[21:23:36.399] <TB2> INFO: Test took 4006ms.
[21:23:36.689] <TB2> INFO: Expecting 41600 events.
[21:23:40.232] <TB2> INFO: 41600 events read in total (2951ms).
[21:23:40.232] <TB2> INFO: Test took 3809ms.
[21:23:40.546] <TB2> INFO: Expecting 41600 events.
[21:23:44.145] <TB2> INFO: 41600 events read in total (3008ms).
[21:23:44.145] <TB2> INFO: Test took 3888ms.
[21:23:44.435] <TB2> INFO: Expecting 41600 events.
[21:23:47.961] <TB2> INFO: 41600 events read in total (2935ms).
[21:23:47.962] <TB2> INFO: Test took 3792ms.
[21:23:48.253] <TB2> INFO: Expecting 41600 events.
[21:23:51.902] <TB2> INFO: 41600 events read in total (3057ms).
[21:23:51.902] <TB2> INFO: Test took 3915ms.
[21:23:52.192] <TB2> INFO: Expecting 41600 events.
[21:23:55.719] <TB2> INFO: 41600 events read in total (2935ms).
[21:23:55.720] <TB2> INFO: Test took 3793ms.
[21:23:56.009] <TB2> INFO: Expecting 41600 events.
[21:23:59.496] <TB2> INFO: 41600 events read in total (2895ms).
[21:23:59.497] <TB2> INFO: Test took 3753ms.
[21:23:59.787] <TB2> INFO: Expecting 41600 events.
[21:24:03.343] <TB2> INFO: 41600 events read in total (2964ms).
[21:24:03.344] <TB2> INFO: Test took 3823ms.
[21:24:03.633] <TB2> INFO: Expecting 41600 events.
[21:24:07.177] <TB2> INFO: 41600 events read in total (2952ms).
[21:24:07.178] <TB2> INFO: Test took 3810ms.
[21:24:07.467] <TB2> INFO: Expecting 41600 events.
[21:24:11.098] <TB2> INFO: 41600 events read in total (3039ms).
[21:24:11.100] <TB2> INFO: Test took 3898ms.
[21:24:11.390] <TB2> INFO: Expecting 41600 events.
[21:24:14.963] <TB2> INFO: 41600 events read in total (2981ms).
[21:24:14.963] <TB2> INFO: Test took 3839ms.
[21:24:15.252] <TB2> INFO: Expecting 41600 events.
[21:24:18.802] <TB2> INFO: 41600 events read in total (2958ms).
[21:24:18.802] <TB2> INFO: Test took 3815ms.
[21:24:19.095] <TB2> INFO: Expecting 41600 events.
[21:24:22.697] <TB2> INFO: 41600 events read in total (3011ms).
[21:24:22.698] <TB2> INFO: Test took 3869ms.
[21:24:22.989] <TB2> INFO: Expecting 2560 events.
[21:24:23.873] <TB2> INFO: 2560 events read in total (293ms).
[21:24:23.873] <TB2> INFO: Test took 1161ms.
[21:24:24.182] <TB2> INFO: Expecting 2560 events.
[21:24:25.068] <TB2> INFO: 2560 events read in total (294ms).
[21:24:25.068] <TB2> INFO: Test took 1194ms.
[21:24:25.376] <TB2> INFO: Expecting 2560 events.
[21:24:26.265] <TB2> INFO: 2560 events read in total (298ms).
[21:24:26.265] <TB2> INFO: Test took 1196ms.
[21:24:26.572] <TB2> INFO: Expecting 2560 events.
[21:24:27.461] <TB2> INFO: 2560 events read in total (297ms).
[21:24:27.461] <TB2> INFO: Test took 1196ms.
[21:24:27.771] <TB2> INFO: Expecting 2560 events.
[21:24:28.658] <TB2> INFO: 2560 events read in total (295ms).
[21:24:28.658] <TB2> INFO: Test took 1196ms.
[21:24:28.966] <TB2> INFO: Expecting 2560 events.
[21:24:29.852] <TB2> INFO: 2560 events read in total (295ms).
[21:24:29.852] <TB2> INFO: Test took 1194ms.
[21:24:30.160] <TB2> INFO: Expecting 2560 events.
[21:24:31.041] <TB2> INFO: 2560 events read in total (289ms).
[21:24:31.041] <TB2> INFO: Test took 1188ms.
[21:24:31.349] <TB2> INFO: Expecting 2560 events.
[21:24:32.238] <TB2> INFO: 2560 events read in total (298ms).
[21:24:32.238] <TB2> INFO: Test took 1196ms.
[21:24:32.546] <TB2> INFO: Expecting 2560 events.
[21:24:33.435] <TB2> INFO: 2560 events read in total (297ms).
[21:24:33.436] <TB2> INFO: Test took 1197ms.
[21:24:33.743] <TB2> INFO: Expecting 2560 events.
[21:24:34.637] <TB2> INFO: 2560 events read in total (302ms).
[21:24:34.638] <TB2> INFO: Test took 1201ms.
[21:24:34.945] <TB2> INFO: Expecting 2560 events.
[21:24:35.836] <TB2> INFO: 2560 events read in total (300ms).
[21:24:35.837] <TB2> INFO: Test took 1198ms.
[21:24:36.143] <TB2> INFO: Expecting 2560 events.
[21:24:37.026] <TB2> INFO: 2560 events read in total (291ms).
[21:24:37.027] <TB2> INFO: Test took 1189ms.
[21:24:37.333] <TB2> INFO: Expecting 2560 events.
[21:24:38.219] <TB2> INFO: 2560 events read in total (294ms).
[21:24:38.219] <TB2> INFO: Test took 1191ms.
[21:24:38.527] <TB2> INFO: Expecting 2560 events.
[21:24:39.411] <TB2> INFO: 2560 events read in total (292ms).
[21:24:39.412] <TB2> INFO: Test took 1192ms.
[21:24:39.720] <TB2> INFO: Expecting 2560 events.
[21:24:40.606] <TB2> INFO: 2560 events read in total (295ms).
[21:24:40.606] <TB2> INFO: Test took 1194ms.
[21:24:40.914] <TB2> INFO: Expecting 2560 events.
[21:24:41.798] <TB2> INFO: 2560 events read in total (293ms).
[21:24:41.798] <TB2> INFO: Test took 1192ms.
[21:24:41.801] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:24:42.107] <TB2> INFO: Expecting 655360 events.
[21:24:57.043] <TB2> INFO: 655360 events read in total (14344ms).
[21:24:57.058] <TB2> INFO: Expecting 655360 events.
[21:25:11.417] <TB2> INFO: 655360 events read in total (13956ms).
[21:25:11.438] <TB2> INFO: Expecting 655360 events.
[21:25:25.708] <TB2> INFO: 655360 events read in total (13867ms).
[21:25:25.730] <TB2> INFO: Expecting 655360 events.
[21:25:40.519] <TB2> INFO: 655360 events read in total (14386ms).
[21:25:40.546] <TB2> INFO: Expecting 655360 events.
[21:25:54.878] <TB2> INFO: 655360 events read in total (13930ms).
[21:25:54.910] <TB2> INFO: Expecting 655360 events.
[21:26:09.746] <TB2> INFO: 655360 events read in total (14433ms).
[21:26:09.778] <TB2> INFO: Expecting 655360 events.
[21:26:24.108] <TB2> INFO: 655360 events read in total (13927ms).
[21:26:24.147] <TB2> INFO: Expecting 655360 events.
[21:26:38.919] <TB2> INFO: 655360 events read in total (14369ms).
[21:26:38.959] <TB2> INFO: Expecting 655360 events.
[21:26:53.182] <TB2> INFO: 655360 events read in total (13820ms).
[21:26:53.234] <TB2> INFO: Expecting 655360 events.
[21:27:07.984] <TB2> INFO: 655360 events read in total (14347ms).
[21:27:08.034] <TB2> INFO: Expecting 655360 events.
[21:27:22.349] <TB2> INFO: 655360 events read in total (13912ms).
[21:27:22.506] <TB2> INFO: Expecting 655360 events.
[21:27:37.230] <TB2> INFO: 655360 events read in total (14321ms).
[21:27:37.382] <TB2> INFO: Expecting 655360 events.
[21:27:52.055] <TB2> INFO: 655360 events read in total (14271ms).
[21:27:52.173] <TB2> INFO: Expecting 655360 events.
[21:28:06.745] <TB2> INFO: 655360 events read in total (14169ms).
[21:28:06.832] <TB2> INFO: Expecting 655360 events.
[21:28:21.486] <TB2> INFO: 655360 events read in total (14251ms).
[21:28:21.638] <TB2> INFO: Expecting 655360 events.
[21:28:35.690] <TB2> INFO: 655360 events read in total (13649ms).
[21:28:35.873] <TB2> INFO: Test took 234073ms.
[21:28:35.983] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:28:36.236] <TB2> INFO: Expecting 655360 events.
[21:28:50.788] <TB2> INFO: 655360 events read in total (13960ms).
[21:28:50.803] <TB2> INFO: Expecting 655360 events.
[21:29:05.198] <TB2> INFO: 655360 events read in total (13992ms).
[21:29:05.219] <TB2> INFO: Expecting 655360 events.
[21:29:19.617] <TB2> INFO: 655360 events read in total (13995ms).
[21:29:19.637] <TB2> INFO: Expecting 655360 events.
[21:29:34.065] <TB2> INFO: 655360 events read in total (14025ms).
[21:29:34.095] <TB2> INFO: Expecting 655360 events.
[21:29:48.857] <TB2> INFO: 655360 events read in total (14358ms).
[21:29:48.888] <TB2> INFO: Expecting 655360 events.
[21:30:03.694] <TB2> INFO: 655360 events read in total (14403ms).
[21:30:03.731] <TB2> INFO: Expecting 655360 events.
[21:30:18.437] <TB2> INFO: 655360 events read in total (14303ms).
[21:30:18.481] <TB2> INFO: Expecting 655360 events.
[21:30:33.465] <TB2> INFO: 655360 events read in total (14581ms).
[21:30:33.521] <TB2> INFO: Expecting 655360 events.
[21:30:48.178] <TB2> INFO: 655360 events read in total (14254ms).
[21:30:48.237] <TB2> INFO: Expecting 655360 events.
[21:31:02.905] <TB2> INFO: 655360 events read in total (14265ms).
[21:31:02.957] <TB2> INFO: Expecting 655360 events.
[21:31:17.646] <TB2> INFO: 655360 events read in total (14285ms).
[21:31:17.752] <TB2> INFO: Expecting 655360 events.
[21:31:32.569] <TB2> INFO: 655360 events read in total (14414ms).
[21:31:32.675] <TB2> INFO: Expecting 655360 events.
[21:31:47.194] <TB2> INFO: 655360 events read in total (14116ms).
[21:31:47.274] <TB2> INFO: Expecting 655360 events.
[21:32:02.042] <TB2> INFO: 655360 events read in total (14365ms).
[21:32:02.125] <TB2> INFO: Expecting 655360 events.
[21:32:16.152] <TB2> INFO: 655360 events read in total (13623ms).
[21:32:16.266] <TB2> INFO: Expecting 655360 events.
[21:32:30.513] <TB2> INFO: 655360 events read in total (13844ms).
[21:32:30.655] <TB2> INFO: Test took 234672ms.
[21:32:30.894] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[21:32:30.900] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[21:32:30.906] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[21:32:30.911] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[21:32:30.917] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[21:32:30.923] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[21:32:30.928] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[21:32:30.934] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[21:32:30.942] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[21:32:30.950] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[21:32:30.958] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[21:32:30.966] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[21:32:30.974] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[21:32:30.982] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[21:32:30.990] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[21:32:30.997] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[21:32:31.006] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[21:32:31.013] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[21:32:31.021] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[21:32:31.029] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[21:32:31.037] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[21:32:31.045] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[21:32:31.053] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[21:32:31.061] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[21:32:31.069] <TB2> INFO: safety margin for low PH: adding 10, margin is now 30
[21:32:31.077] <TB2> INFO: safety margin for low PH: adding 11, margin is now 31
[21:32:31.085] <TB2> INFO: safety margin for low PH: adding 12, margin is now 32
[21:32:31.093] <TB2> INFO: safety margin for low PH: adding 13, margin is now 33
[21:32:31.101] <TB2> INFO: safety margin for low PH: adding 14, margin is now 34
[21:32:31.109] <TB2> INFO: safety margin for low PH: adding 15, margin is now 35
[21:32:31.117] <TB2> INFO: safety margin for low PH: adding 16, margin is now 36
[21:32:31.125] <TB2> INFO: safety margin for low PH: adding 17, margin is now 37
[21:32:31.133] <TB2> INFO: safety margin for low PH: adding 18, margin is now 38
[21:32:31.141] <TB2> INFO: safety margin for low PH: adding 19, margin is now 39
[21:32:31.149] <TB2> INFO: safety margin for low PH: adding 20, margin is now 40
[21:32:31.158] <TB2> INFO: safety margin for low PH: adding 21, margin is now 41
[21:32:31.166] <TB2> INFO: safety margin for low PH: adding 22, margin is now 42
[21:32:31.174] <TB2> INFO: safety margin for low PH: adding 23, margin is now 43
[21:32:31.182] <TB2> INFO: safety margin for low PH: adding 24, margin is now 44
[21:32:31.191] <TB2> INFO: safety margin for low PH: adding 25, margin is now 45
[21:32:31.199] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[21:32:31.207] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[21:32:31.215] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[21:32:31.224] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[21:32:31.232] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[21:32:31.238] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[21:32:31.245] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[21:32:31.251] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[21:32:31.258] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[21:32:31.264] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[21:32:31.270] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[21:32:31.277] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[21:32:31.284] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[21:32:31.291] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[21:32:31.296] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[21:32:31.304] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[21:32:31.310] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[21:32:31.317] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[21:32:31.324] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[21:32:31.330] <TB2> INFO: safety margin for low PH: adding 10, margin is now 30
[21:32:31.338] <TB2> INFO: safety margin for low PH: adding 11, margin is now 31
[21:32:31.346] <TB2> INFO: safety margin for low PH: adding 12, margin is now 32
[21:32:31.354] <TB2> INFO: safety margin for low PH: adding 13, margin is now 33
[21:32:31.360] <TB2> INFO: safety margin for low PH: adding 14, margin is now 34
[21:32:31.366] <TB2> INFO: safety margin for low PH: adding 15, margin is now 35
[21:32:31.373] <TB2> INFO: safety margin for low PH: adding 16, margin is now 36
[21:32:31.379] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[21:32:31.387] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[21:32:31.395] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[21:32:31.401] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[21:32:31.408] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[21:32:31.414] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[21:32:31.420] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[21:32:31.427] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[21:32:31.433] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[21:32:31.440] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[21:32:31.446] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[21:32:31.453] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[21:32:31.462] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[21:32:31.470] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[21:32:31.479] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[21:32:31.489] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[21:32:31.498] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[21:32:31.507] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[21:32:31.515] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[21:32:31.524] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[21:32:31.533] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[21:32:31.572] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C0.dat
[21:32:31.572] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C1.dat
[21:32:31.572] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C2.dat
[21:32:31.572] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C3.dat
[21:32:31.573] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C4.dat
[21:32:31.573] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C5.dat
[21:32:31.573] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C6.dat
[21:32:31.573] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C7.dat
[21:32:31.573] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C8.dat
[21:32:31.573] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C9.dat
[21:32:31.573] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C10.dat
[21:32:31.573] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C11.dat
[21:32:31.573] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C12.dat
[21:32:31.574] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C13.dat
[21:32:31.574] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C14.dat
[21:32:31.574] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C15.dat
[21:32:31.814] <TB2> INFO: Expecting 41600 events.
[21:32:34.998] <TB2> INFO: 41600 events read in total (2592ms).
[21:32:34.000] <TB2> INFO: Test took 3423ms.
[21:32:35.453] <TB2> INFO: Expecting 41600 events.
[21:32:38.471] <TB2> INFO: 41600 events read in total (2426ms).
[21:32:38.473] <TB2> INFO: Test took 3260ms.
[21:32:38.939] <TB2> INFO: Expecting 41600 events.
[21:32:42.098] <TB2> INFO: 41600 events read in total (2569ms).
[21:32:42.099] <TB2> INFO: Test took 3415ms.
[21:32:42.320] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:32:42.409] <TB2> INFO: Expecting 2560 events.
[21:32:43.296] <TB2> INFO: 2560 events read in total (296ms).
[21:32:43.297] <TB2> INFO: Test took 977ms.
[21:32:43.298] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:32:43.605] <TB2> INFO: Expecting 2560 events.
[21:32:44.488] <TB2> INFO: 2560 events read in total (292ms).
[21:32:44.488] <TB2> INFO: Test took 1190ms.
[21:32:44.491] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:32:44.797] <TB2> INFO: Expecting 2560 events.
[21:32:45.679] <TB2> INFO: 2560 events read in total (290ms).
[21:32:45.679] <TB2> INFO: Test took 1188ms.
[21:32:45.681] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:32:45.988] <TB2> INFO: Expecting 2560 events.
[21:32:46.873] <TB2> INFO: 2560 events read in total (293ms).
[21:32:46.874] <TB2> INFO: Test took 1193ms.
[21:32:46.876] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:32:47.181] <TB2> INFO: Expecting 2560 events.
[21:32:48.066] <TB2> INFO: 2560 events read in total (293ms).
[21:32:48.066] <TB2> INFO: Test took 1190ms.
[21:32:48.068] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:32:48.375] <TB2> INFO: Expecting 2560 events.
[21:32:49.258] <TB2> INFO: 2560 events read in total (292ms).
[21:32:49.259] <TB2> INFO: Test took 1191ms.
[21:32:49.260] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:32:49.570] <TB2> INFO: Expecting 2560 events.
[21:32:50.458] <TB2> INFO: 2560 events read in total (296ms).
[21:32:50.459] <TB2> INFO: Test took 1199ms.
[21:32:50.461] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:32:50.766] <TB2> INFO: Expecting 2560 events.
[21:32:51.651] <TB2> INFO: 2560 events read in total (294ms).
[21:32:51.651] <TB2> INFO: Test took 1190ms.
[21:32:51.653] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:32:51.959] <TB2> INFO: Expecting 2560 events.
[21:32:52.837] <TB2> INFO: 2560 events read in total (286ms).
[21:32:52.838] <TB2> INFO: Test took 1185ms.
[21:32:52.840] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:32:53.146] <TB2> INFO: Expecting 2560 events.
[21:32:54.028] <TB2> INFO: 2560 events read in total (290ms).
[21:32:54.029] <TB2> INFO: Test took 1189ms.
[21:32:54.031] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:32:54.337] <TB2> INFO: Expecting 2560 events.
[21:32:55.218] <TB2> INFO: 2560 events read in total (290ms).
[21:32:55.218] <TB2> INFO: Test took 1187ms.
[21:32:55.221] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:32:55.526] <TB2> INFO: Expecting 2560 events.
[21:32:56.414] <TB2> INFO: 2560 events read in total (296ms).
[21:32:56.414] <TB2> INFO: Test took 1194ms.
[21:32:56.416] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:32:56.721] <TB2> INFO: Expecting 2560 events.
[21:32:57.604] <TB2> INFO: 2560 events read in total (291ms).
[21:32:57.604] <TB2> INFO: Test took 1188ms.
[21:32:57.607] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:32:57.914] <TB2> INFO: Expecting 2560 events.
[21:32:58.794] <TB2> INFO: 2560 events read in total (288ms).
[21:32:58.795] <TB2> INFO: Test took 1188ms.
[21:32:58.797] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:32:59.102] <TB2> INFO: Expecting 2560 events.
[21:32:59.993] <TB2> INFO: 2560 events read in total (300ms).
[21:32:59.993] <TB2> INFO: Test took 1196ms.
[21:32:59.995] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:00.301] <TB2> INFO: Expecting 2560 events.
[21:33:01.181] <TB2> INFO: 2560 events read in total (288ms).
[21:33:01.181] <TB2> INFO: Test took 1186ms.
[21:33:01.183] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:01.490] <TB2> INFO: Expecting 2560 events.
[21:33:02.375] <TB2> INFO: 2560 events read in total (294ms).
[21:33:02.375] <TB2> INFO: Test took 1192ms.
[21:33:02.378] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:02.684] <TB2> INFO: Expecting 2560 events.
[21:33:03.569] <TB2> INFO: 2560 events read in total (293ms).
[21:33:03.569] <TB2> INFO: Test took 1191ms.
[21:33:03.573] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:03.876] <TB2> INFO: Expecting 2560 events.
[21:33:04.760] <TB2> INFO: 2560 events read in total (293ms).
[21:33:04.760] <TB2> INFO: Test took 1187ms.
[21:33:04.762] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:05.069] <TB2> INFO: Expecting 2560 events.
[21:33:05.952] <TB2> INFO: 2560 events read in total (291ms).
[21:33:05.952] <TB2> INFO: Test took 1190ms.
[21:33:05.956] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:06.260] <TB2> INFO: Expecting 2560 events.
[21:33:07.141] <TB2> INFO: 2560 events read in total (289ms).
[21:33:07.142] <TB2> INFO: Test took 1187ms.
[21:33:07.145] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:07.449] <TB2> INFO: Expecting 2560 events.
[21:33:08.333] <TB2> INFO: 2560 events read in total (292ms).
[21:33:08.334] <TB2> INFO: Test took 1189ms.
[21:33:08.335] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:08.642] <TB2> INFO: Expecting 2560 events.
[21:33:09.521] <TB2> INFO: 2560 events read in total (287ms).
[21:33:09.521] <TB2> INFO: Test took 1186ms.
[21:33:09.523] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:09.830] <TB2> INFO: Expecting 2560 events.
[21:33:10.715] <TB2> INFO: 2560 events read in total (293ms).
[21:33:10.715] <TB2> INFO: Test took 1192ms.
[21:33:10.718] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:11.023] <TB2> INFO: Expecting 2560 events.
[21:33:11.915] <TB2> INFO: 2560 events read in total (300ms).
[21:33:11.915] <TB2> INFO: Test took 1197ms.
[21:33:11.917] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:12.223] <TB2> INFO: Expecting 2560 events.
[21:33:13.108] <TB2> INFO: 2560 events read in total (293ms).
[21:33:13.108] <TB2> INFO: Test took 1191ms.
[21:33:13.110] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:13.416] <TB2> INFO: Expecting 2560 events.
[21:33:14.303] <TB2> INFO: 2560 events read in total (296ms).
[21:33:14.303] <TB2> INFO: Test took 1194ms.
[21:33:14.306] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:14.612] <TB2> INFO: Expecting 2560 events.
[21:33:15.500] <TB2> INFO: 2560 events read in total (297ms).
[21:33:15.500] <TB2> INFO: Test took 1195ms.
[21:33:15.503] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:15.808] <TB2> INFO: Expecting 2560 events.
[21:33:16.692] <TB2> INFO: 2560 events read in total (293ms).
[21:33:16.693] <TB2> INFO: Test took 1190ms.
[21:33:16.696] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:16.000] <TB2> INFO: Expecting 2560 events.
[21:33:17.885] <TB2> INFO: 2560 events read in total (293ms).
[21:33:17.885] <TB2> INFO: Test took 1189ms.
[21:33:17.887] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:18.193] <TB2> INFO: Expecting 2560 events.
[21:33:19.076] <TB2> INFO: 2560 events read in total (291ms).
[21:33:19.077] <TB2> INFO: Test took 1190ms.
[21:33:19.080] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:19.385] <TB2> INFO: Expecting 2560 events.
[21:33:20.270] <TB2> INFO: 2560 events read in total (294ms).
[21:33:20.270] <TB2> INFO: Test took 1190ms.
[21:33:20.736] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 746 seconds
[21:33:20.736] <TB2> INFO: PH scale (per ROC): 31 30 33 29 34 31 27 28 39 25 43 35 31 27 31 36
[21:33:20.737] <TB2> INFO: PH offset (per ROC): 95 141 112 85 79 118 100 112 110 126 106 113 113 104 112 93
[21:33:20.747] <TB2> INFO: Decoding statistics:
[21:33:20.748] <TB2> INFO: General information:
[21:33:20.748] <TB2> INFO: 16bit words read: 127880
[21:33:20.748] <TB2> INFO: valid events total: 20480
[21:33:20.748] <TB2> INFO: empty events: 17980
[21:33:20.748] <TB2> INFO: valid events with pixels: 2500
[21:33:20.748] <TB2> INFO: valid pixel hits: 2500
[21:33:20.748] <TB2> INFO: Event errors: 0
[21:33:20.748] <TB2> INFO: start marker: 0
[21:33:20.748] <TB2> INFO: stop marker: 0
[21:33:20.748] <TB2> INFO: overflow: 0
[21:33:20.748] <TB2> INFO: invalid 5bit words: 0
[21:33:20.748] <TB2> INFO: invalid XOR eye diagram: 0
[21:33:20.748] <TB2> INFO: frame (failed synchr.): 0
[21:33:20.748] <TB2> INFO: idle data (no TBM trl): 0
[21:33:20.748] <TB2> INFO: no data (only TBM hdr): 0
[21:33:20.748] <TB2> INFO: TBM errors: 0
[21:33:20.748] <TB2> INFO: flawed TBM headers: 0
[21:33:20.748] <TB2> INFO: flawed TBM trailers: 0
[21:33:20.748] <TB2> INFO: event ID mismatches: 0
[21:33:20.748] <TB2> INFO: ROC errors: 0
[21:33:20.748] <TB2> INFO: missing ROC header(s): 0
[21:33:20.748] <TB2> INFO: misplaced readback start: 0
[21:33:20.748] <TB2> INFO: Pixel decoding errors: 0
[21:33:20.748] <TB2> INFO: pixel data incomplete: 0
[21:33:20.748] <TB2> INFO: pixel address: 0
[21:33:20.748] <TB2> INFO: pulse height fill bit: 0
[21:33:20.748] <TB2> INFO: buffer corruption: 0
[21:33:20.934] <TB2> INFO: ######################################################################
[21:33:20.934] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[21:33:20.934] <TB2> INFO: ######################################################################
[21:33:20.950] <TB2> INFO: scanning low vcal = 10
[21:33:21.250] <TB2> INFO: Expecting 41600 events.
[21:33:24.862] <TB2> INFO: 41600 events read in total (3021ms).
[21:33:24.862] <TB2> INFO: Test took 3912ms.
[21:33:24.866] <TB2> INFO: scanning low vcal = 20
[21:33:25.162] <TB2> INFO: Expecting 41600 events.
[21:33:28.740] <TB2> INFO: 41600 events read in total (2986ms).
[21:33:28.741] <TB2> INFO: Test took 3875ms.
[21:33:28.742] <TB2> INFO: scanning low vcal = 30
[21:33:29.038] <TB2> INFO: Expecting 41600 events.
[21:33:32.694] <TB2> INFO: 41600 events read in total (3064ms).
[21:33:32.695] <TB2> INFO: Test took 3953ms.
[21:33:32.698] <TB2> INFO: scanning low vcal = 40
[21:33:32.975] <TB2> INFO: Expecting 41600 events.
[21:33:36.918] <TB2> INFO: 41600 events read in total (3352ms).
[21:33:36.919] <TB2> INFO: Test took 4221ms.
[21:33:36.922] <TB2> INFO: scanning low vcal = 50
[21:33:37.206] <TB2> INFO: Expecting 41600 events.
[21:33:41.172] <TB2> INFO: 41600 events read in total (3375ms).
[21:33:41.173] <TB2> INFO: Test took 4250ms.
[21:33:41.176] <TB2> INFO: scanning low vcal = 60
[21:33:41.453] <TB2> INFO: Expecting 41600 events.
[21:33:45.421] <TB2> INFO: 41600 events read in total (3376ms).
[21:33:45.422] <TB2> INFO: Test took 4246ms.
[21:33:45.425] <TB2> INFO: scanning low vcal = 70
[21:33:45.702] <TB2> INFO: Expecting 41600 events.
[21:33:49.653] <TB2> INFO: 41600 events read in total (3359ms).
[21:33:49.653] <TB2> INFO: Test took 4227ms.
[21:33:49.656] <TB2> INFO: scanning low vcal = 80
[21:33:49.936] <TB2> INFO: Expecting 41600 events.
[21:33:53.892] <TB2> INFO: 41600 events read in total (3365ms).
[21:33:53.893] <TB2> INFO: Test took 4236ms.
[21:33:53.895] <TB2> INFO: scanning low vcal = 90
[21:33:54.172] <TB2> INFO: Expecting 41600 events.
[21:33:58.135] <TB2> INFO: 41600 events read in total (3370ms).
[21:33:58.136] <TB2> INFO: Test took 4240ms.
[21:33:58.140] <TB2> INFO: scanning low vcal = 100
[21:33:58.416] <TB2> INFO: Expecting 41600 events.
[21:34:02.394] <TB2> INFO: 41600 events read in total (3387ms).
[21:34:02.395] <TB2> INFO: Test took 4255ms.
[21:34:02.400] <TB2> INFO: scanning low vcal = 110
[21:34:02.674] <TB2> INFO: Expecting 41600 events.
[21:34:06.670] <TB2> INFO: 41600 events read in total (3404ms).
[21:34:06.670] <TB2> INFO: Test took 4270ms.
[21:34:06.673] <TB2> INFO: scanning low vcal = 120
[21:34:06.952] <TB2> INFO: Expecting 41600 events.
[21:34:10.918] <TB2> INFO: 41600 events read in total (3374ms).
[21:34:10.919] <TB2> INFO: Test took 4245ms.
[21:34:10.922] <TB2> INFO: scanning low vcal = 130
[21:34:11.198] <TB2> INFO: Expecting 41600 events.
[21:34:15.195] <TB2> INFO: 41600 events read in total (3405ms).
[21:34:15.196] <TB2> INFO: Test took 4274ms.
[21:34:15.199] <TB2> INFO: scanning low vcal = 140
[21:34:15.476] <TB2> INFO: Expecting 41600 events.
[21:34:19.441] <TB2> INFO: 41600 events read in total (3373ms).
[21:34:19.442] <TB2> INFO: Test took 4243ms.
[21:34:19.445] <TB2> INFO: scanning low vcal = 150
[21:34:19.722] <TB2> INFO: Expecting 41600 events.
[21:34:23.685] <TB2> INFO: 41600 events read in total (3372ms).
[21:34:23.686] <TB2> INFO: Test took 4241ms.
[21:34:23.689] <TB2> INFO: scanning low vcal = 160
[21:34:23.966] <TB2> INFO: Expecting 41600 events.
[21:34:27.951] <TB2> INFO: 41600 events read in total (3394ms).
[21:34:27.952] <TB2> INFO: Test took 4262ms.
[21:34:27.955] <TB2> INFO: scanning low vcal = 170
[21:34:28.232] <TB2> INFO: Expecting 41600 events.
[21:34:32.258] <TB2> INFO: 41600 events read in total (3435ms).
[21:34:32.259] <TB2> INFO: Test took 4304ms.
[21:34:32.264] <TB2> INFO: scanning low vcal = 180
[21:34:32.557] <TB2> INFO: Expecting 41600 events.
[21:34:36.594] <TB2> INFO: 41600 events read in total (3445ms).
[21:34:36.595] <TB2> INFO: Test took 4330ms.
[21:34:36.598] <TB2> INFO: scanning low vcal = 190
[21:34:36.875] <TB2> INFO: Expecting 41600 events.
[21:34:40.922] <TB2> INFO: 41600 events read in total (3455ms).
[21:34:40.923] <TB2> INFO: Test took 4325ms.
[21:34:40.926] <TB2> INFO: scanning low vcal = 200
[21:34:41.203] <TB2> INFO: Expecting 41600 events.
[21:34:45.149] <TB2> INFO: 41600 events read in total (3354ms).
[21:34:45.150] <TB2> INFO: Test took 4224ms.
[21:34:45.153] <TB2> INFO: scanning low vcal = 210
[21:34:45.430] <TB2> INFO: Expecting 41600 events.
[21:34:49.412] <TB2> INFO: 41600 events read in total (3391ms).
[21:34:49.413] <TB2> INFO: Test took 4260ms.
[21:34:49.417] <TB2> INFO: scanning low vcal = 220
[21:34:49.697] <TB2> INFO: Expecting 41600 events.
[21:34:53.654] <TB2> INFO: 41600 events read in total (3365ms).
[21:34:53.654] <TB2> INFO: Test took 4236ms.
[21:34:53.657] <TB2> INFO: scanning low vcal = 230
[21:34:53.934] <TB2> INFO: Expecting 41600 events.
[21:34:57.906] <TB2> INFO: 41600 events read in total (3381ms).
[21:34:57.906] <TB2> INFO: Test took 4249ms.
[21:34:57.909] <TB2> INFO: scanning low vcal = 240
[21:34:58.186] <TB2> INFO: Expecting 41600 events.
[21:35:02.162] <TB2> INFO: 41600 events read in total (3384ms).
[21:35:02.162] <TB2> INFO: Test took 4253ms.
[21:35:02.165] <TB2> INFO: scanning low vcal = 250
[21:35:02.442] <TB2> INFO: Expecting 41600 events.
[21:35:06.423] <TB2> INFO: 41600 events read in total (3389ms).
[21:35:06.424] <TB2> INFO: Test took 4259ms.
[21:35:06.428] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[21:35:06.704] <TB2> INFO: Expecting 41600 events.
[21:35:10.705] <TB2> INFO: 41600 events read in total (3410ms).
[21:35:10.706] <TB2> INFO: Test took 4278ms.
[21:35:10.709] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[21:35:10.985] <TB2> INFO: Expecting 41600 events.
[21:35:14.921] <TB2> INFO: 41600 events read in total (3344ms).
[21:35:14.922] <TB2> INFO: Test took 4213ms.
[21:35:14.925] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[21:35:15.202] <TB2> INFO: Expecting 41600 events.
[21:35:19.166] <TB2> INFO: 41600 events read in total (3373ms).
[21:35:19.167] <TB2> INFO: Test took 4241ms.
[21:35:19.170] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[21:35:19.446] <TB2> INFO: Expecting 41600 events.
[21:35:23.399] <TB2> INFO: 41600 events read in total (3361ms).
[21:35:23.400] <TB2> INFO: Test took 4230ms.
[21:35:23.403] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[21:35:23.680] <TB2> INFO: Expecting 41600 events.
[21:35:27.651] <TB2> INFO: 41600 events read in total (3379ms).
[21:35:27.653] <TB2> INFO: Test took 4250ms.
[21:35:28.066] <TB2> INFO: PixTestGainPedestal::measure() done
[21:36:06.297] <TB2> INFO: PixTestGainPedestal::fit() done
[21:36:06.297] <TB2> INFO: non-linearity mean: 0.957 0.968 0.960 1.038 0.928 0.958 0.945 0.940 0.951 0.948 0.972 0.934 0.934 0.930 0.925 0.951
[21:36:06.297] <TB2> INFO: non-linearity RMS: 0.166 0.007 0.028 0.147 0.091 0.020 0.157 0.064 0.053 0.044 0.020 0.118 0.073 0.108 0.092 0.047
[21:36:06.297] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C0.dat
[21:36:06.310] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C1.dat
[21:36:06.323] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C2.dat
[21:36:06.336] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C3.dat
[21:36:06.350] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C4.dat
[21:36:06.363] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C5.dat
[21:36:06.380] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C6.dat
[21:36:06.394] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C7.dat
[21:36:06.407] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C8.dat
[21:36:06.425] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C9.dat
[21:36:06.444] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C10.dat
[21:36:06.462] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C11.dat
[21:36:06.476] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C12.dat
[21:36:06.496] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C13.dat
[21:36:06.516] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C14.dat
[21:36:06.535] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C15.dat
[21:36:06.554] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 165 seconds
[21:36:06.554] <TB2> INFO: Decoding statistics:
[21:36:06.554] <TB2> INFO: General information:
[21:36:06.554] <TB2> INFO: 16bit words read: 3279778
[21:36:06.554] <TB2> INFO: valid events total: 332800
[21:36:06.554] <TB2> INFO: empty events: 463
[21:36:06.554] <TB2> INFO: valid events with pixels: 332337
[21:36:06.554] <TB2> INFO: valid pixel hits: 641475
[21:36:06.554] <TB2> INFO: Event errors: 0
[21:36:06.554] <TB2> INFO: start marker: 0
[21:36:06.554] <TB2> INFO: stop marker: 0
[21:36:06.554] <TB2> INFO: overflow: 0
[21:36:06.554] <TB2> INFO: invalid 5bit words: 0
[21:36:06.554] <TB2> INFO: invalid XOR eye diagram: 0
[21:36:06.554] <TB2> INFO: frame (failed synchr.): 0
[21:36:06.554] <TB2> INFO: idle data (no TBM trl): 0
[21:36:06.554] <TB2> INFO: no data (only TBM hdr): 0
[21:36:06.554] <TB2> INFO: TBM errors: 0
[21:36:06.554] <TB2> INFO: flawed TBM headers: 0
[21:36:06.554] <TB2> INFO: flawed TBM trailers: 0
[21:36:06.554] <TB2> INFO: event ID mismatches: 0
[21:36:06.554] <TB2> INFO: ROC errors: 0
[21:36:06.554] <TB2> INFO: missing ROC header(s): 0
[21:36:06.554] <TB2> INFO: misplaced readback start: 0
[21:36:06.554] <TB2> INFO: Pixel decoding errors: 14
[21:36:06.554] <TB2> INFO: pixel data incomplete: 0
[21:36:06.554] <TB2> INFO: pixel address: 0
[21:36:06.554] <TB2> INFO: pulse height fill bit: 0
[21:36:06.554] <TB2> INFO: buffer corruption: 14
[21:36:06.583] <TB2> INFO: Decoding statistics:
[21:36:06.583] <TB2> INFO: General information:
[21:36:06.583] <TB2> INFO: 16bit words read: 3409194
[21:36:06.583] <TB2> INFO: valid events total: 353536
[21:36:06.583] <TB2> INFO: empty events: 18699
[21:36:06.583] <TB2> INFO: valid events with pixels: 334837
[21:36:06.583] <TB2> INFO: valid pixel hits: 643975
[21:36:06.583] <TB2> INFO: Event errors: 0
[21:36:06.583] <TB2> INFO: start marker: 0
[21:36:06.583] <TB2> INFO: stop marker: 0
[21:36:06.583] <TB2> INFO: overflow: 0
[21:36:06.583] <TB2> INFO: invalid 5bit words: 0
[21:36:06.583] <TB2> INFO: invalid XOR eye diagram: 0
[21:36:06.583] <TB2> INFO: frame (failed synchr.): 0
[21:36:06.583] <TB2> INFO: idle data (no TBM trl): 0
[21:36:06.583] <TB2> INFO: no data (only TBM hdr): 0
[21:36:06.583] <TB2> INFO: TBM errors: 0
[21:36:06.583] <TB2> INFO: flawed TBM headers: 0
[21:36:06.583] <TB2> INFO: flawed TBM trailers: 0
[21:36:06.583] <TB2> INFO: event ID mismatches: 0
[21:36:06.583] <TB2> INFO: ROC errors: 0
[21:36:06.583] <TB2> INFO: missing ROC header(s): 0
[21:36:06.583] <TB2> INFO: misplaced readback start: 0
[21:36:06.583] <TB2> INFO: Pixel decoding errors: 14
[21:36:06.583] <TB2> INFO: pixel data incomplete: 0
[21:36:06.583] <TB2> INFO: pixel address: 0
[21:36:06.583] <TB2> INFO: pulse height fill bit: 0
[21:36:06.584] <TB2> INFO: buffer corruption: 14
[21:36:06.584] <TB2> INFO: enter test to run
[21:36:06.584] <TB2> INFO: test: trim80 no parameter change
[21:36:06.584] <TB2> INFO: running: trim80
[21:36:06.585] <TB2> INFO: ######################################################################
[21:36:06.585] <TB2> INFO: PixTestTrim80::doTest()
[21:36:06.585] <TB2> INFO: ######################################################################
[21:36:06.586] <TB2> INFO: ----------------------------------------------------------------------
[21:36:06.586] <TB2> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[21:36:06.586] <TB2> INFO: ----------------------------------------------------------------------
[21:36:06.651] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[21:36:06.651] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[21:36:06.665] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:36:06.665] <TB2> INFO: run 1 of 1
[21:36:06.905] <TB2> INFO: Expecting 5025280 events.
[21:36:35.194] <TB2> INFO: 691872 events read in total (27698ms).
[21:37:02.845] <TB2> INFO: 1383120 events read in total (55349ms).
[21:37:30.201] <TB2> INFO: 2072592 events read in total (82705ms).
[21:37:57.481] <TB2> INFO: 2760024 events read in total (109985ms).
[21:38:25.151] <TB2> INFO: 3447488 events read in total (137655ms).
[21:38:53.147] <TB2> INFO: 4134512 events read in total (165651ms).
[21:39:21.144] <TB2> INFO: 4821936 events read in total (193648ms).
[21:39:29.515] <TB2> INFO: 5025280 events read in total (202019ms).
[21:39:29.627] <TB2> INFO: Test took 202961ms.
[21:39:50.576] <TB2> INFO: ROC 0 VthrComp = 73
[21:39:50.576] <TB2> INFO: ROC 1 VthrComp = 72
[21:39:50.576] <TB2> INFO: ROC 2 VthrComp = 80
[21:39:50.576] <TB2> INFO: ROC 3 VthrComp = 75
[21:39:50.576] <TB2> INFO: ROC 4 VthrComp = 73
[21:39:50.576] <TB2> INFO: ROC 5 VthrComp = 86
[21:39:50.576] <TB2> INFO: ROC 6 VthrComp = 79
[21:39:50.576] <TB2> INFO: ROC 7 VthrComp = 72
[21:39:50.576] <TB2> INFO: ROC 8 VthrComp = 76
[21:39:50.576] <TB2> INFO: ROC 9 VthrComp = 73
[21:39:50.577] <TB2> INFO: ROC 10 VthrComp = 78
[21:39:50.577] <TB2> INFO: ROC 11 VthrComp = 75
[21:39:50.577] <TB2> INFO: ROC 12 VthrComp = 74
[21:39:50.577] <TB2> INFO: ROC 13 VthrComp = 70
[21:39:50.577] <TB2> INFO: ROC 14 VthrComp = 77
[21:39:50.577] <TB2> INFO: ROC 15 VthrComp = 79
[21:39:50.816] <TB2> INFO: Expecting 41600 events.
[21:39:54.280] <TB2> INFO: 41600 events read in total (2873ms).
[21:39:54.281] <TB2> INFO: Test took 3702ms.
[21:39:54.292] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[21:39:54.292] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[21:39:54.305] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:39:54.305] <TB2> INFO: run 1 of 1
[21:39:54.583] <TB2> INFO: Expecting 5025280 events.
[21:40:22.896] <TB2> INFO: 687888 events read in total (27721ms).
[21:40:50.336] <TB2> INFO: 1372912 events read in total (55161ms).
[21:41:17.462] <TB2> INFO: 2057008 events read in total (82287ms).
[21:41:45.205] <TB2> INFO: 2738248 events read in total (110030ms).
[21:42:12.528] <TB2> INFO: 3414792 events read in total (137353ms).
[21:42:40.147] <TB2> INFO: 4090224 events read in total (164972ms).
[21:43:07.841] <TB2> INFO: 4764168 events read in total (192666ms).
[21:43:18.285] <TB2> INFO: 5025280 events read in total (203110ms).
[21:43:18.352] <TB2> INFO: Test took 204047ms.
[21:43:39.283] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 108.245 for pixel 0/33 mean/min/max = 92.5154/76.7626/108.268
[21:43:39.284] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 111.193 for pixel 0/43 mean/min/max = 94.3337/76.9829/111.684
[21:43:39.284] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 111.898 for pixel 0/36 mean/min/max = 93.3637/74.7992/111.928
[21:43:39.285] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 110.606 for pixel 10/79 mean/min/max = 93.9611/77.2111/110.711
[21:43:39.285] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 118.518 for pixel 0/17 mean/min/max = 97.3812/75.937/118.825
[21:43:39.286] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 115.97 for pixel 25/79 mean/min/max = 94.3581/72.5651/116.151
[21:43:39.286] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 110.606 for pixel 0/77 mean/min/max = 93.9921/77.3412/110.643
[21:43:39.287] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 111.099 for pixel 19/79 mean/min/max = 94.1433/77.0049/111.282
[21:43:39.287] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 111.637 for pixel 51/20 mean/min/max = 95.533/79.2676/111.798
[21:43:39.288] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 112.457 for pixel 51/35 mean/min/max = 94.1286/75.6788/112.578
[21:43:39.288] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 112.335 for pixel 51/32 mean/min/max = 94.909/77.4038/112.414
[21:43:39.289] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 111.422 for pixel 33/79 mean/min/max = 94.602/77.6259/111.578
[21:43:39.289] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 110.621 for pixel 0/78 mean/min/max = 93.7682/76.6942/110.842
[21:43:39.290] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 106.851 for pixel 0/24 mean/min/max = 90.0211/72.9842/107.058
[21:43:39.290] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 114.655 for pixel 19/76 mean/min/max = 96.2025/77.3569/115.048
[21:43:39.291] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 112.436 for pixel 0/79 mean/min/max = 95.2118/77.9851/112.439
[21:43:39.291] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:43:39.380] <TB2> INFO: Expecting 411648 events.
[21:43:48.872] <TB2> INFO: 411648 events read in total (8901ms).
[21:43:48.879] <TB2> INFO: Expecting 411648 events.
[21:43:58.211] <TB2> INFO: 411648 events read in total (8928ms).
[21:43:58.224] <TB2> INFO: Expecting 411648 events.
[21:44:07.555] <TB2> INFO: 411648 events read in total (8928ms).
[21:44:07.569] <TB2> INFO: Expecting 411648 events.
[21:44:16.801] <TB2> INFO: 411648 events read in total (8830ms).
[21:44:16.824] <TB2> INFO: Expecting 411648 events.
[21:44:26.286] <TB2> INFO: 411648 events read in total (9059ms).
[21:44:26.306] <TB2> INFO: Expecting 411648 events.
[21:44:35.547] <TB2> INFO: 411648 events read in total (8838ms).
[21:44:35.571] <TB2> INFO: Expecting 411648 events.
[21:44:44.875] <TB2> INFO: 411648 events read in total (8901ms).
[21:44:44.901] <TB2> INFO: Expecting 411648 events.
[21:44:54.180] <TB2> INFO: 411648 events read in total (8876ms).
[21:44:54.221] <TB2> INFO: Expecting 411648 events.
[21:45:03.466] <TB2> INFO: 411648 events read in total (8842ms).
[21:45:03.503] <TB2> INFO: Expecting 411648 events.
[21:45:12.783] <TB2> INFO: 411648 events read in total (8878ms).
[21:45:12.827] <TB2> INFO: Expecting 411648 events.
[21:45:22.085] <TB2> INFO: 411648 events read in total (8854ms).
[21:45:22.144] <TB2> INFO: Expecting 411648 events.
[21:45:31.361] <TB2> INFO: 411648 events read in total (8813ms).
[21:45:31.435] <TB2> INFO: Expecting 411648 events.
[21:45:40.718] <TB2> INFO: 411648 events read in total (8880ms).
[21:45:40.769] <TB2> INFO: Expecting 411648 events.
[21:45:50.024] <TB2> INFO: 411648 events read in total (8852ms).
[21:45:50.082] <TB2> INFO: Expecting 411648 events.
[21:45:59.248] <TB2> INFO: 411648 events read in total (8763ms).
[21:45:59.330] <TB2> INFO: Expecting 411648 events.
[21:46:08.614] <TB2> INFO: 411648 events read in total (8881ms).
[21:46:08.678] <TB2> INFO: Test took 149387ms.
[21:46:10.274] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[21:46:10.288] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:46:10.288] <TB2> INFO: run 1 of 1
[21:46:10.530] <TB2> INFO: Expecting 5025280 events.
[21:46:37.653] <TB2> INFO: 653240 events read in total (26532ms).
[21:47:05.629] <TB2> INFO: 1320432 events read in total (54508ms).
[21:47:32.586] <TB2> INFO: 1986640 events read in total (81465ms).
[21:47:59.633] <TB2> INFO: 2646544 events read in total (108512ms).
[21:48:26.729] <TB2> INFO: 3305048 events read in total (135608ms).
[21:48:53.379] <TB2> INFO: 3961176 events read in total (162258ms).
[21:49:20.140] <TB2> INFO: 4615304 events read in total (189019ms).
[21:49:36.929] <TB2> INFO: 5025280 events read in total (205808ms).
[21:49:37.006] <TB2> INFO: Test took 206717ms.
[21:49:57.987] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 50.302189 .. 105.656159
[21:49:58.227] <TB2> INFO: Expecting 208000 events.
[21:50:08.056] <TB2> INFO: 208000 events read in total (9237ms).
[21:50:08.057] <TB2> INFO: Test took 10068ms.
[21:50:08.122] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 40 .. 115 (-1/-1) hits flags = 528 (plus default)
[21:50:08.136] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:50:08.136] <TB2> INFO: run 1 of 1
[21:50:08.414] <TB2> INFO: Expecting 2529280 events.
[21:50:36.547] <TB2> INFO: 675032 events read in total (27541ms).
[21:51:03.768] <TB2> INFO: 1356296 events read in total (54763ms).
[21:51:31.342] <TB2> INFO: 2034088 events read in total (82336ms).
[21:51:51.427] <TB2> INFO: 2529280 events read in total (102421ms).
[21:51:51.489] <TB2> INFO: Test took 103352ms.
[21:52:12.873] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 60.294610 .. 94.659098
[21:52:13.111] <TB2> INFO: Expecting 208000 events.
[21:52:22.758] <TB2> INFO: 208000 events read in total (9055ms).
[21:52:22.759] <TB2> INFO: Test took 9885ms.
[21:52:22.807] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 50 .. 104 (-1/-1) hits flags = 528 (plus default)
[21:52:22.821] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:52:22.821] <TB2> INFO: run 1 of 1
[21:52:23.098] <TB2> INFO: Expecting 1830400 events.
[21:52:51.103] <TB2> INFO: 680200 events read in total (27413ms).
[21:53:19.359] <TB2> INFO: 1366032 events read in total (55669ms).
[21:53:38.011] <TB2> INFO: 1830400 events read in total (74321ms).
[21:53:38.060] <TB2> INFO: Test took 75240ms.
[21:53:55.252] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 64.300933 .. 97.629548
[21:53:55.492] <TB2> INFO: Expecting 208000 events.
[21:54:05.106] <TB2> INFO: 208000 events read in total (9023ms).
[21:54:05.107] <TB2> INFO: Test took 9854ms.
[21:54:05.155] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 54 .. 107 (-1/-1) hits flags = 528 (plus default)
[21:54:05.169] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:54:05.169] <TB2> INFO: run 1 of 1
[21:54:05.447] <TB2> INFO: Expecting 1797120 events.
[21:54:33.511] <TB2> INFO: 658672 events read in total (27472ms).
[21:55:01.637] <TB2> INFO: 1323248 events read in total (55598ms).
[21:55:21.220] <TB2> INFO: 1797120 events read in total (75181ms).
[21:55:21.273] <TB2> INFO: Test took 76104ms.
[21:55:38.907] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 65.376729 .. 102.460148
[21:55:39.152] <TB2> INFO: Expecting 208000 events.
[21:55:49.140] <TB2> INFO: 208000 events read in total (9396ms).
[21:55:49.141] <TB2> INFO: Test took 10229ms.
[21:55:49.211] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 55 .. 112 (-1/-1) hits flags = 528 (plus default)
[21:55:49.224] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:55:49.224] <TB2> INFO: run 1 of 1
[21:55:49.502] <TB2> INFO: Expecting 1930240 events.
[21:56:17.039] <TB2> INFO: 640584 events read in total (26946ms).
[21:56:44.212] <TB2> INFO: 1288728 events read in total (54119ms).
[21:57:11.200] <TB2> INFO: 1930240 events read in total (81107ms).
[21:57:11.243] <TB2> INFO: Test took 82019ms.
[21:57:29.791] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[21:57:29.791] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[21:57:29.805] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:57:29.805] <TB2> INFO: run 1 of 1
[21:57:30.042] <TB2> INFO: Expecting 1364480 events.
[21:57:58.037] <TB2> INFO: 663416 events read in total (27403ms).
[21:58:25.804] <TB2> INFO: 1331256 events read in total (55171ms).
[21:58:27.618] <TB2> INFO: 1364480 events read in total (56984ms).
[21:58:27.645] <TB2> INFO: Test took 57840ms.
[21:58:44.120] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C0.dat
[21:58:44.120] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C1.dat
[21:58:44.121] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C2.dat
[21:58:44.121] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C3.dat
[21:58:44.121] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C4.dat
[21:58:44.121] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C5.dat
[21:58:44.121] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C6.dat
[21:58:44.121] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C7.dat
[21:58:44.121] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C8.dat
[21:58:44.121] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C9.dat
[21:58:44.121] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C10.dat
[21:58:44.121] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C11.dat
[21:58:44.121] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C12.dat
[21:58:44.121] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C13.dat
[21:58:44.121] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C14.dat
[21:58:44.121] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C15.dat
[21:58:44.121] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C0.dat
[21:58:44.127] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C1.dat
[21:58:44.131] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C2.dat
[21:58:44.136] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C3.dat
[21:58:44.141] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C4.dat
[21:58:44.146] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C5.dat
[21:58:44.150] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C6.dat
[21:58:44.157] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C7.dat
[21:58:44.164] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C8.dat
[21:58:44.170] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C9.dat
[21:58:44.177] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C10.dat
[21:58:44.182] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C11.dat
[21:58:44.187] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C12.dat
[21:58:44.191] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C13.dat
[21:58:44.196] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C14.dat
[21:58:44.201] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1049_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C15.dat
[21:58:44.206] <TB2> INFO: PixTestTrim80::trimTest() done
[21:58:44.206] <TB2> INFO: vtrim: 94 110 108 93 121 122 91 102 99 109 99 96 110 81 106 101
[21:58:44.206] <TB2> INFO: vthrcomp: 73 72 80 75 73 86 79 72 76 73 78 75 74 70 77 79
[21:58:44.206] <TB2> INFO: vcal mean: 80.00 80.01 80.00 79.97 80.02 79.96 80.00 80.02 80.05 79.98 79.98 79.82 80.08 79.97 79.98 80.04
[21:58:44.206] <TB2> INFO: vcal RMS: 0.72 0.74 0.79 0.75 0.95 0.90 0.76 0.77 0.77 0.87 0.81 0.76 0.74 0.81 0.87 0.76
[21:58:44.206] <TB2> INFO: bits mean: 9.63 9.34 9.78 9.49 9.28 10.07 8.92 9.30 8.41 9.85 9.37 9.14 8.64 10.22 9.15 8.90
[21:58:44.206] <TB2> INFO: bits RMS: 2.29 2.32 2.40 2.24 2.30 2.50 2.48 2.38 2.41 2.28 2.21 2.33 2.68 2.66 2.37 2.38
[21:58:44.213] <TB2> INFO: ----------------------------------------------------------------------
[21:58:44.213] <TB2> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[21:58:44.213] <TB2> INFO: ----------------------------------------------------------------------
[21:58:44.215] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[21:58:44.229] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:58:44.229] <TB2> INFO: run 1 of 1
[21:58:44.464] <TB2> INFO: Expecting 4160000 events.
[21:59:17.382] <TB2> INFO: 774125 events read in total (32326ms).
[21:59:49.403] <TB2> INFO: 1542245 events read in total (64347ms).
[22:00:21.560] <TB2> INFO: 2306295 events read in total (96505ms).
[22:00:53.694] <TB2> INFO: 3065785 events read in total (128638ms).
[22:01:25.926] <TB2> INFO: 3821990 events read in total (160870ms).
[22:01:40.619] <TB2> INFO: 4160000 events read in total (175563ms).
[22:01:40.707] <TB2> INFO: Test took 176478ms.
[22:02:06.005] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 218 (-1/-1) hits flags = 528 (plus default)
[22:02:06.020] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[22:02:06.020] <TB2> INFO: run 1 of 1
[22:02:06.273] <TB2> INFO: Expecting 4555200 events.
[22:02:38.170] <TB2> INFO: 723490 events read in total (31306ms).
[22:03:08.859] <TB2> INFO: 1443280 events read in total (61995ms).
[22:03:40.008] <TB2> INFO: 2160285 events read in total (93144ms).
[22:04:11.289] <TB2> INFO: 2875310 events read in total (124425ms).
[22:04:42.430] <TB2> INFO: 3587480 events read in total (155566ms).
[22:05:13.495] <TB2> INFO: 4298960 events read in total (186631ms).
[22:05:24.674] <TB2> INFO: 4555200 events read in total (197810ms).
[22:05:24.756] <TB2> INFO: Test took 198735ms.
[22:05:53.773] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 221 (-1/-1) hits flags = 528 (plus default)
[22:05:53.786] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[22:05:53.786] <TB2> INFO: run 1 of 1
[22:05:54.033] <TB2> INFO: Expecting 4617600 events.
[22:06:26.437] <TB2> INFO: 720345 events read in total (31812ms).
[22:06:57.301] <TB2> INFO: 1437240 events read in total (62676ms).
[22:07:28.311] <TB2> INFO: 2151290 events read in total (93686ms).
[22:07:59.840] <TB2> INFO: 2863630 events read in total (125215ms).
[22:08:30.830] <TB2> INFO: 3573045 events read in total (156205ms).
[22:09:01.976] <TB2> INFO: 4281765 events read in total (187351ms).
[22:09:16.663] <TB2> INFO: 4617600 events read in total (202038ms).
[22:09:16.746] <TB2> INFO: Test took 202959ms.
[22:09:47.954] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 224 (-1/-1) hits flags = 528 (plus default)
[22:09:47.968] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[22:09:47.968] <TB2> INFO: run 1 of 1
[22:09:48.294] <TB2> INFO: Expecting 4680000 events.
[22:10:19.779] <TB2> INFO: 717525 events read in total (30894ms).
[22:10:50.832] <TB2> INFO: 1431290 events read in total (61947ms).
[22:11:21.984] <TB2> INFO: 2142210 events read in total (93099ms).
[22:11:53.033] <TB2> INFO: 2851710 events read in total (124148ms).
[22:12:24.516] <TB2> INFO: 3558350 events read in total (155631ms).
[22:12:56.773] <TB2> INFO: 4263795 events read in total (187888ms).
[22:13:15.549] <TB2> INFO: 4680000 events read in total (206664ms).
[22:13:15.665] <TB2> INFO: Test took 207697ms.
[22:13:41.711] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 223 (-1/-1) hits flags = 528 (plus default)
[22:13:41.724] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[22:13:41.724] <TB2> INFO: run 1 of 1
[22:13:41.960] <TB2> INFO: Expecting 4659200 events.
[22:14:13.641] <TB2> INFO: 718630 events read in total (31090ms).
[22:14:43.497] <TB2> INFO: 1433610 events read in total (60946ms).
[22:15:13.278] <TB2> INFO: 2145845 events read in total (90727ms).
[22:15:43.071] <TB2> INFO: 2856280 events read in total (120520ms).
[22:16:13.550] <TB2> INFO: 3564095 events read in total (150999ms).
[22:16:43.181] <TB2> INFO: 4270770 events read in total (180630ms).
[22:16:59.628] <TB2> INFO: 4659200 events read in total (197077ms).
[22:17:00.282] <TB2> INFO: Test took 198558ms.
[22:17:25.198] <TB2> INFO: PixTestTrim80::trimBitTest() done
[22:17:25.199] <TB2> INFO: PixTestTrim80::doTest() done, duration: 2478 seconds
[22:17:25.814] <TB2> INFO: enter test to run
[22:17:25.814] <TB2> INFO: test: exit no parameter change
[22:17:26.028] <TB2> QUIET: Connection to board 149 closed.
[22:17:26.029] <TB2> INFO: pXar: this is the end, my friend