[22:43:05.102] <TB0> INFO: *** Welcome to pxar ***
[22:43:05.102] <TB0> INFO: *** Today: 2016/11/07
[22:43:05.108] <TB0> INFO: *** Version: c8ba-dirty
[22:43:05.108] <TB0> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C15.dat
[22:43:05.108] <TB0> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[22:43:05.108] <TB0> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//defaultMaskFile.dat
[22:43:05.108] <TB0> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters_C15.dat
[22:43:05.167] <TB0> INFO: clk: 4
[22:43:05.167] <TB0> INFO: ctr: 4
[22:43:05.167] <TB0> INFO: sda: 19
[22:43:05.167] <TB0> INFO: tin: 9
[22:43:05.167] <TB0> INFO: level: 15
[22:43:05.167] <TB0> INFO: triggerdelay: 0
[22:43:05.167] <TB0> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[22:43:05.167] <TB0> INFO: Log level: INFO
[22:43:05.175] <TB0> INFO: Found DTB DTB_WRQ4OZ
[22:43:05.186] <TB0> QUIET: Connection to board DTB_WRQ4OZ opened.
[22:43:05.188] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 71
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WRQ4OZ
MAC address: 40D855118047
Hostname: pixelDTB071
Comment:
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[22:43:05.189] <TB0> INFO: RPC call hashes of host and DTB match: 486171790
[22:43:06.675] <TB0> INFO: DUT info:
[22:43:06.675] <TB0> INFO: The DUT currently contains the following objects:
[22:43:06.675] <TB0> INFO: 4 TBM Cores tbm10c (4 ON)
[22:43:06.675] <TB0> INFO: TBM Core alpha (0): 7 registers set
[22:43:06.675] <TB0> INFO: TBM Core beta (1): 7 registers set
[22:43:06.675] <TB0> INFO: TBM Core alpha (2): 7 registers set
[22:43:06.675] <TB0> INFO: TBM Core beta (3): 7 registers set
[22:43:06.675] <TB0> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[22:43:06.675] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:06.675] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:06.675] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:06.675] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:06.675] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:06.675] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:06.675] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:06.675] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:06.675] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:06.675] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:06.675] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:06.675] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:06.675] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:06.675] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:06.675] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:06.675] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:07.076] <TB0> INFO: enter 'restricted' command line mode
[22:43:07.076] <TB0> INFO: enter test to run
[22:43:07.076] <TB0> INFO: test: pretest no parameter change
[22:43:07.076] <TB0> INFO: running: pretest
[22:43:07.080] <TB0> INFO: ######################################################################
[22:43:07.080] <TB0> INFO: PixTestPretest::doTest()
[22:43:07.080] <TB0> INFO: ######################################################################
[22:43:07.081] <TB0> INFO: ----------------------------------------------------------------------
[22:43:07.081] <TB0> INFO: PixTestPretest::programROC()
[22:43:07.081] <TB0> INFO: ----------------------------------------------------------------------
[22:43:25.095] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[22:43:25.095] <TB0> INFO: IA differences per ROC: 17.7 19.3 17.7 19.3 20.1 19.3 20.9 17.7 20.9 19.3 20.1 18.5 19.3 16.9 20.9 18.5
[22:43:25.156] <TB0> INFO: ----------------------------------------------------------------------
[22:43:25.156] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[22:43:25.156] <TB0> INFO: ----------------------------------------------------------------------
[22:43:32.440] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 384.3 mA = 24.0187 mA/ROC
[22:43:32.440] <TB0> INFO: i(loss) [mA/ROC]: 19.3 19.3 20.1 18.5 19.3 18.5 19.3 18.5 18.5 19.3 18.5 19.3 18.5 19.3 19.3 18.5
[22:43:32.469] <TB0> INFO: ----------------------------------------------------------------------
[22:43:32.469] <TB0> INFO: PixTestPretest::findTiming()
[22:43:32.469] <TB0> INFO: ----------------------------------------------------------------------
[22:43:32.469] <TB0> INFO: PixTestCmd::init()

[22:44:04.860] <TB0> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[22:44:04.860] <TB0> INFO: (success/tries = 100/100), width = 4
[22:44:06.364] <TB0> INFO: ----------------------------------------------------------------------
[22:44:06.365] <TB0> INFO: PixTestPretest::findWorkingPixel()
[22:44:06.365] <TB0> INFO: ----------------------------------------------------------------------
[22:44:06.459] <TB0> INFO: Expecting 231680 events.
[22:44:16.554] <TB0> INFO: 231680 events read in total (9503ms).
[22:44:16.561] <TB0> INFO: Test took 10192ms.
[22:44:16.809] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[22:44:16.844] <TB0> INFO: ----------------------------------------------------------------------
[22:44:16.844] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[22:44:16.844] <TB0> INFO: ----------------------------------------------------------------------
[22:44:16.939] <TB0> INFO: Expecting 231680 events.
[22:44:26.896] <TB0> INFO: 231680 events read in total (9365ms).
[22:44:26.906] <TB0> INFO: Test took 10056ms.
[22:44:27.173] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[22:44:27.173] <TB0> INFO: CalDel: 83 95 83 81 95 95 104 89 89 91 104 98 102 85 91 85
[22:44:27.173] <TB0> INFO: VthrComp: 51 51 51 53 52 51 51 55 53 51 51 51 51 51 51 51
[22:44:27.177] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C0.dat
[22:44:27.177] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C1.dat
[22:44:27.177] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C2.dat
[22:44:27.178] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C3.dat
[22:44:27.178] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C4.dat
[22:44:27.178] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C5.dat
[22:44:27.178] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C6.dat
[22:44:27.178] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C7.dat
[22:44:27.178] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C8.dat
[22:44:27.178] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C9.dat
[22:44:27.179] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C10.dat
[22:44:27.179] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C11.dat
[22:44:27.179] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C12.dat
[22:44:27.179] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C13.dat
[22:44:27.179] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C14.dat
[22:44:27.179] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C15.dat
[22:44:27.180] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//tbmParameters_C0a.dat
[22:44:27.180] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//tbmParameters_C0b.dat
[22:44:27.180] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//tbmParameters_C1a.dat
[22:44:27.180] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[22:44:27.180] <TB0> INFO: PixTestPretest::doTest() done, duration: 80 seconds
[22:44:27.235] <TB0> INFO: enter test to run
[22:44:27.235] <TB0> INFO: test: fulltest no parameter change
[22:44:27.235] <TB0> INFO: running: fulltest
[22:44:27.235] <TB0> INFO: ######################################################################
[22:44:27.235] <TB0> INFO: PixTestFullTest::doTest()
[22:44:27.235] <TB0> INFO: ######################################################################
[22:44:27.236] <TB0> INFO: ######################################################################
[22:44:27.236] <TB0> INFO: PixTestAlive::doTest()
[22:44:27.236] <TB0> INFO: ######################################################################
[22:44:27.238] <TB0> INFO: ----------------------------------------------------------------------
[22:44:27.238] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[22:44:27.238] <TB0> INFO: ----------------------------------------------------------------------
[22:44:27.481] <TB0> INFO: Expecting 41600 events.
[22:44:30.960] <TB0> INFO: 41600 events read in total (2887ms).
[22:44:30.961] <TB0> INFO: Test took 3720ms.
[22:44:31.195] <TB0> INFO: PixTestAlive::aliveTest() done
[22:44:31.195] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[22:44:31.197] <TB0> INFO: ----------------------------------------------------------------------
[22:44:31.197] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[22:44:31.197] <TB0> INFO: ----------------------------------------------------------------------
[22:44:31.484] <TB0> INFO: Expecting 41600 events.
[22:44:34.445] <TB0> INFO: 41600 events read in total (2369ms).
[22:44:34.445] <TB0> INFO: Test took 3244ms.
[22:44:34.446] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[22:44:34.688] <TB0> INFO: PixTestAlive::maskTest() done
[22:44:34.688] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[22:44:34.689] <TB0> INFO: ----------------------------------------------------------------------
[22:44:34.689] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[22:44:34.689] <TB0> INFO: ----------------------------------------------------------------------
[22:44:34.934] <TB0> INFO: Expecting 41600 events.
[22:44:38.414] <TB0> INFO: 41600 events read in total (2888ms).
[22:44:38.415] <TB0> INFO: Test took 3722ms.
[22:44:38.642] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[22:44:38.642] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[22:44:38.642] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[22:44:38.642] <TB0> INFO: Decoding statistics:
[22:44:38.642] <TB0> INFO: General information:
[22:44:38.642] <TB0> INFO: 16bit words read: 0
[22:44:38.642] <TB0> INFO: valid events total: 0
[22:44:38.642] <TB0> INFO: empty events: 0
[22:44:38.642] <TB0> INFO: valid events with pixels: 0
[22:44:38.642] <TB0> INFO: valid pixel hits: 0
[22:44:38.642] <TB0> INFO: Event errors: 0
[22:44:38.642] <TB0> INFO: start marker: 0
[22:44:38.642] <TB0> INFO: stop marker: 0
[22:44:38.642] <TB0> INFO: overflow: 0
[22:44:38.642] <TB0> INFO: invalid 5bit words: 0
[22:44:38.642] <TB0> INFO: invalid XOR eye diagram: 0
[22:44:38.642] <TB0> INFO: frame (failed synchr.): 0
[22:44:38.642] <TB0> INFO: idle data (no TBM trl): 0
[22:44:38.642] <TB0> INFO: no data (only TBM hdr): 0
[22:44:38.642] <TB0> INFO: TBM errors: 0
[22:44:38.642] <TB0> INFO: flawed TBM headers: 0
[22:44:38.642] <TB0> INFO: flawed TBM trailers: 0
[22:44:38.642] <TB0> INFO: event ID mismatches: 0
[22:44:38.642] <TB0> INFO: ROC errors: 0
[22:44:38.642] <TB0> INFO: missing ROC header(s): 0
[22:44:38.642] <TB0> INFO: misplaced readback start: 0
[22:44:38.642] <TB0> INFO: Pixel decoding errors: 0
[22:44:38.642] <TB0> INFO: pixel data incomplete: 0
[22:44:38.642] <TB0> INFO: pixel address: 0
[22:44:38.642] <TB0> INFO: pulse height fill bit: 0
[22:44:38.642] <TB0> INFO: buffer corruption: 0
[22:44:38.648] <TB0> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C15.dat
[22:44:38.648] <TB0> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr_C15.dat

[22:44:38.648] <TB0> INFO: ######################################################################
[22:44:38.648] <TB0> INFO: PixTestReadback::doTest()
[22:44:38.648] <TB0> INFO: ######################################################################
[22:44:38.648] <TB0> INFO: ----------------------------------------------------------------------
[22:44:38.648] <TB0> INFO: PixTestReadback::CalibrateVd()
[22:44:38.648] <TB0> INFO: ----------------------------------------------------------------------
[22:44:48.618] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C0.dat
[22:44:48.618] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C1.dat
[22:44:48.618] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C2.dat
[22:44:48.618] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C3.dat
[22:44:48.618] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C4.dat
[22:44:48.619] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C5.dat
[22:44:48.619] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C6.dat
[22:44:48.619] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C7.dat
[22:44:48.619] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C8.dat
[22:44:48.619] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C9.dat
[22:44:48.619] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C10.dat
[22:44:48.619] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C11.dat
[22:44:48.619] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C12.dat
[22:44:48.619] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C13.dat
[22:44:48.619] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C14.dat
[22:44:48.619] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C15.dat
[22:44:48.648] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[22:44:48.648] <TB0> INFO: ----------------------------------------------------------------------
[22:44:48.648] <TB0> INFO: PixTestReadback::CalibrateVa()
[22:44:48.648] <TB0> INFO: ----------------------------------------------------------------------
[22:44:58.570] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C0.dat
[22:44:58.570] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C1.dat
[22:44:58.570] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C2.dat
[22:44:58.570] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C3.dat
[22:44:58.570] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C4.dat
[22:44:58.570] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C5.dat
[22:44:58.570] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C6.dat
[22:44:58.570] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C7.dat
[22:44:58.570] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C8.dat
[22:44:58.570] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C9.dat
[22:44:58.570] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C10.dat
[22:44:58.571] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C11.dat
[22:44:58.571] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C12.dat
[22:44:58.571] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C13.dat
[22:44:58.571] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C14.dat
[22:44:58.571] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C15.dat
[22:44:58.601] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[22:44:58.601] <TB0> INFO: ----------------------------------------------------------------------
[22:44:58.601] <TB0> INFO: PixTestReadback::readbackVbg()
[22:44:58.601] <TB0> INFO: ----------------------------------------------------------------------
[22:45:06.262] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[22:45:06.262] <TB0> INFO: ----------------------------------------------------------------------
[22:45:06.262] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[22:45:06.262] <TB0> INFO: ----------------------------------------------------------------------
[22:45:06.263] <TB0> INFO: Vbg will be calibrated using Vd calibration
[22:45:06.263] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 161.4calibrated Vbg = 1.19072 :::*/*/*/*/
[22:45:06.263] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 158.1calibrated Vbg = 1.18436 :::*/*/*/*/
[22:45:06.263] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 153.1calibrated Vbg = 1.17968 :::*/*/*/*/
[22:45:06.263] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 165.4calibrated Vbg = 1.17738 :::*/*/*/*/
[22:45:06.263] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 166.1calibrated Vbg = 1.17557 :::*/*/*/*/
[22:45:06.263] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 152.4calibrated Vbg = 1.18272 :::*/*/*/*/
[22:45:06.263] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 151.9calibrated Vbg = 1.1876 :::*/*/*/*/
[22:45:06.263] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 159.8calibrated Vbg = 1.18352 :::*/*/*/*/
[22:45:06.263] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 159.1calibrated Vbg = 1.18028 :::*/*/*/*/
[22:45:06.263] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 156.5calibrated Vbg = 1.17931 :::*/*/*/*/
[22:45:06.263] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150.1calibrated Vbg = 1.17204 :::*/*/*/*/
[22:45:06.263] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 149.6calibrated Vbg = 1.17621 :::*/*/*/*/
[22:45:06.263] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 141.3calibrated Vbg = 1.17499 :::*/*/*/*/
[22:45:06.263] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 164.1calibrated Vbg = 1.17403 :::*/*/*/*/
[22:45:06.263] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 147.5calibrated Vbg = 1.18317 :::*/*/*/*/
[22:45:06.263] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 161.1calibrated Vbg = 1.17348 :::*/*/*/*/
[22:45:06.265] <TB0> INFO: ----------------------------------------------------------------------
[22:45:06.266] <TB0> INFO: PixTestReadback::CalibrateIa()
[22:45:06.266] <TB0> INFO: ----------------------------------------------------------------------
[22:47:47.096] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C0.dat
[22:47:47.096] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C1.dat
[22:47:47.096] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C2.dat
[22:47:47.096] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C3.dat
[22:47:47.096] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C4.dat
[22:47:47.096] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C5.dat
[22:47:47.096] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C6.dat
[22:47:47.096] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C7.dat
[22:47:47.096] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C8.dat
[22:47:47.097] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C9.dat
[22:47:47.097] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C10.dat
[22:47:47.097] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C11.dat
[22:47:47.097] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C12.dat
[22:47:47.097] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C13.dat
[22:47:47.097] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C14.dat
[22:47:47.097] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C15.dat
[22:47:47.127] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[22:47:47.129] <TB0> INFO: PixTestReadback::doTest() done
[22:47:47.130] <TB0> INFO: Decoding statistics:
[22:47:47.130] <TB0> INFO: General information:
[22:47:47.130] <TB0> INFO: 16bit words read: 1536
[22:47:47.130] <TB0> INFO: valid events total: 256
[22:47:47.130] <TB0> INFO: empty events: 256
[22:47:47.130] <TB0> INFO: valid events with pixels: 0
[22:47:47.130] <TB0> INFO: valid pixel hits: 0
[22:47:47.130] <TB0> INFO: Event errors: 0
[22:47:47.130] <TB0> INFO: start marker: 0
[22:47:47.130] <TB0> INFO: stop marker: 0
[22:47:47.130] <TB0> INFO: overflow: 0
[22:47:47.130] <TB0> INFO: invalid 5bit words: 0
[22:47:47.130] <TB0> INFO: invalid XOR eye diagram: 0
[22:47:47.130] <TB0> INFO: frame (failed synchr.): 0
[22:47:47.130] <TB0> INFO: idle data (no TBM trl): 0
[22:47:47.130] <TB0> INFO: no data (only TBM hdr): 0
[22:47:47.130] <TB0> INFO: TBM errors: 0
[22:47:47.130] <TB0> INFO: flawed TBM headers: 0
[22:47:47.130] <TB0> INFO: flawed TBM trailers: 0
[22:47:47.130] <TB0> INFO: event ID mismatches: 0
[22:47:47.130] <TB0> INFO: ROC errors: 0
[22:47:47.130] <TB0> INFO: missing ROC header(s): 0
[22:47:47.130] <TB0> INFO: misplaced readback start: 0
[22:47:47.130] <TB0> INFO: Pixel decoding errors: 0
[22:47:47.130] <TB0> INFO: pixel data incomplete: 0
[22:47:47.130] <TB0> INFO: pixel address: 0
[22:47:47.130] <TB0> INFO: pulse height fill bit: 0
[22:47:47.130] <TB0> INFO: buffer corruption: 0
[22:47:47.179] <TB0> INFO: ######################################################################
[22:47:47.179] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[22:47:47.179] <TB0> INFO: ######################################################################
[22:47:47.182] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[22:47:47.197] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[22:47:47.197] <TB0> INFO: run 1 of 1
[22:47:47.434] <TB0> INFO: Expecting 3120000 events.
[22:48:19.481] <TB0> INFO: 677070 events read in total (31455ms).
[22:48:49.626] <TB0> INFO: 1347850 events read in total (61600ms).












[22:49:20.010] <TB0> INFO: 2016610 events read in total (91984ms).





















[22:49:50.194] <TB0> INFO: 2686325 events read in total (122168ms).





















[22:50:09.920] <TB0> INFO: 3120000 events read in total (141894ms).
[22:50:09.993] <TB0> INFO: Test took 142796ms.
[22:50:34.253] <TB0> INFO: PixTestBBMap::doTest() done with 1 decoding errors: , duration: 167 seconds
[22:50:34.253] <TB0> INFO: number of dead bumps (per ROC): 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0
[22:50:34.253] <TB0> INFO: separation cut (per ROC): 101 103 107 106 105 105 122 106 114 105 107 109 103 105 104 116
[22:50:34.254] <TB0> INFO: Decoding statistics:
[22:50:34.254] <TB0> INFO: General information:
[22:50:34.254] <TB0> INFO: 16bit words read: 0
[22:50:34.254] <TB0> INFO: valid events total: 0
[22:50:34.254] <TB0> INFO: empty events: 0
[22:50:34.254] <TB0> INFO: valid events with pixels: 0
[22:50:34.254] <TB0> INFO: valid pixel hits: 0
[22:50:34.254] <TB0> INFO: Event errors: 0
[22:50:34.254] <TB0> INFO: start marker: 0
[22:50:34.254] <TB0> INFO: stop marker: 0
[22:50:34.254] <TB0> INFO: overflow: 0
[22:50:34.254] <TB0> INFO: invalid 5bit words: 0
[22:50:34.254] <TB0> INFO: invalid XOR eye diagram: 0
[22:50:34.254] <TB0> INFO: frame (failed synchr.): 0
[22:50:34.254] <TB0> INFO: idle data (no TBM trl): 0
[22:50:34.254] <TB0> INFO: no data (only TBM hdr): 0
[22:50:34.254] <TB0> INFO: TBM errors: 0
[22:50:34.254] <TB0> INFO: flawed TBM headers: 0
[22:50:34.254] <TB0> INFO: flawed TBM trailers: 0
[22:50:34.254] <TB0> INFO: event ID mismatches: 0
[22:50:34.254] <TB0> INFO: ROC errors: 0
[22:50:34.254] <TB0> INFO: missing ROC header(s): 0
[22:50:34.254] <TB0> INFO: misplaced readback start: 0
[22:50:34.254] <TB0> INFO: Pixel decoding errors: 0
[22:50:34.254] <TB0> INFO: pixel data incomplete: 0
[22:50:34.254] <TB0> INFO: pixel address: 0
[22:50:34.254] <TB0> INFO: pulse height fill bit: 0
[22:50:34.254] <TB0> INFO: buffer corruption: 0
[22:50:34.304] <TB0> INFO: ######################################################################
[22:50:34.304] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[22:50:34.304] <TB0> INFO: ######################################################################
[22:50:34.305] <TB0> INFO: ----------------------------------------------------------------------
[22:50:34.305] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[22:50:34.305] <TB0> INFO: ----------------------------------------------------------------------
[22:50:34.305] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[22:50:34.318] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[22:50:34.318] <TB0> INFO: run 1 of 1
[22:50:34.558] <TB0> INFO: Expecting 36608000 events.
[22:50:59.109] <TB0> INFO: 703850 events read in total (23960ms).
[22:51:22.320] <TB0> INFO: 1394450 events read in total (47171ms).
[22:51:45.496] <TB0> INFO: 2083600 events read in total (70347ms).
[22:52:09.048] <TB0> INFO: 2773800 events read in total (93899ms).
[22:52:32.413] <TB0> INFO: 3463300 events read in total (117264ms).
[22:52:55.841] <TB0> INFO: 4151500 events read in total (140692ms).
[22:53:19.013] <TB0> INFO: 4837600 events read in total (163864ms).
[22:53:42.471] <TB0> INFO: 5525550 events read in total (187322ms).
[22:54:05.444] <TB0> INFO: 6212250 events read in total (210295ms).
[22:54:28.698] <TB0> INFO: 6900400 events read in total (233549ms).
[22:54:51.958] <TB0> INFO: 7584300 events read in total (256809ms).
[22:55:15.157] <TB0> INFO: 8271000 events read in total (280008ms).
[22:55:38.450] <TB0> INFO: 8956400 events read in total (303301ms).
[22:56:01.546] <TB0> INFO: 9643700 events read in total (326397ms).
[22:56:24.766] <TB0> INFO: 10328750 events read in total (349617ms).
[22:56:47.806] <TB0> INFO: 11015250 events read in total (372657ms).
[22:57:11.396] <TB0> INFO: 11700100 events read in total (396247ms).
[22:57:34.561] <TB0> INFO: 12383500 events read in total (419412ms).
[22:57:57.842] <TB0> INFO: 13067800 events read in total (442693ms).
[22:58:21.227] <TB0> INFO: 13752950 events read in total (466078ms).
[22:58:44.695] <TB0> INFO: 14437850 events read in total (489546ms).
[22:59:07.956] <TB0> INFO: 15120650 events read in total (512807ms).
[22:59:31.384] <TB0> INFO: 15803150 events read in total (536235ms).
[22:59:54.703] <TB0> INFO: 16484950 events read in total (559554ms).
[23:00:18.069] <TB0> INFO: 17167350 events read in total (582920ms).
[23:00:41.108] <TB0> INFO: 17850250 events read in total (605959ms).
[23:01:04.703] <TB0> INFO: 18531750 events read in total (629554ms).
[23:01:28.286] <TB0> INFO: 19211750 events read in total (653137ms).
[23:01:51.367] <TB0> INFO: 19891850 events read in total (676218ms).
[23:02:14.543] <TB0> INFO: 20568550 events read in total (699394ms).
[23:02:38.009] <TB0> INFO: 21248250 events read in total (722860ms).
[23:03:01.380] <TB0> INFO: 21924600 events read in total (746231ms).
[23:03:24.886] <TB0> INFO: 22604100 events read in total (769738ms).
[23:03:48.239] <TB0> INFO: 23278050 events read in total (793090ms).
[23:04:11.889] <TB0> INFO: 23955000 events read in total (816740ms).
[23:04:35.234] <TB0> INFO: 24631250 events read in total (840085ms).
[23:04:58.983] <TB0> INFO: 25312750 events read in total (863834ms).
[23:05:22.457] <TB0> INFO: 25988800 events read in total (887308ms).
[23:05:45.605] <TB0> INFO: 26668700 events read in total (910456ms).
[23:06:08.000] <TB0> INFO: 27343150 events read in total (933851ms).
[23:06:32.352] <TB0> INFO: 28022250 events read in total (957203ms).
[23:06:55.671] <TB0> INFO: 28698250 events read in total (980522ms).
[23:07:19.511] <TB0> INFO: 29375900 events read in total (1004362ms).
[23:07:42.862] <TB0> INFO: 30051650 events read in total (1027713ms).
[23:08:06.068] <TB0> INFO: 30728850 events read in total (1050919ms).
[23:08:29.542] <TB0> INFO: 31405850 events read in total (1074393ms).
[23:08:52.753] <TB0> INFO: 32084400 events read in total (1097604ms).
[23:09:16.112] <TB0> INFO: 32762150 events read in total (1120963ms).
[23:09:39.358] <TB0> INFO: 33441150 events read in total (1144209ms).
[23:10:02.761] <TB0> INFO: 34119750 events read in total (1167612ms).
[23:10:25.920] <TB0> INFO: 34797400 events read in total (1190771ms).
[23:10:49.094] <TB0> INFO: 35476700 events read in total (1213945ms).
[23:11:12.282] <TB0> INFO: 36161350 events read in total (1237133ms).
[23:11:27.426] <TB0> INFO: 36608000 events read in total (1252277ms).
[23:11:27.500] <TB0> INFO: Test took 1253182ms.
[23:11:27.905] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[23:11:29.683] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[23:11:31.609] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[23:11:33.650] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[23:11:35.622] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[23:11:37.678] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[23:11:39.247] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[23:11:41.049] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[23:11:42.847] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[23:11:44.385] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[23:11:45.863] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[23:11:47.558] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[23:11:49.527] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[23:11:51.593] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[23:11:53.609] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[23:11:55.694] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[23:11:57.732] <TB0> INFO: PixTestScurves::scurves() done
[23:11:57.732] <TB0> INFO: Vcal mean: 121.28 121.62 129.62 122.73 130.90 116.68 133.35 129.51 130.82 121.64 126.71 123.38 124.19 124.40 125.96 128.49
[23:11:57.732] <TB0> INFO: Vcal RMS: 5.72 6.21 6.29 6.17 6.92 5.37 6.21 6.76 6.64 6.19 7.04 6.88 6.08 5.96 6.23 5.48
[23:11:57.732] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1283 seconds
[23:11:57.732] <TB0> INFO: Decoding statistics:
[23:11:57.732] <TB0> INFO: General information:
[23:11:57.732] <TB0> INFO: 16bit words read: 0
[23:11:57.732] <TB0> INFO: valid events total: 0
[23:11:57.732] <TB0> INFO: empty events: 0
[23:11:57.732] <TB0> INFO: valid events with pixels: 0
[23:11:57.732] <TB0> INFO: valid pixel hits: 0
[23:11:57.732] <TB0> INFO: Event errors: 0
[23:11:57.732] <TB0> INFO: start marker: 0
[23:11:57.732] <TB0> INFO: stop marker: 0
[23:11:57.732] <TB0> INFO: overflow: 0
[23:11:57.732] <TB0> INFO: invalid 5bit words: 0
[23:11:57.732] <TB0> INFO: invalid XOR eye diagram: 0
[23:11:57.733] <TB0> INFO: frame (failed synchr.): 0
[23:11:57.733] <TB0> INFO: idle data (no TBM trl): 0
[23:11:57.733] <TB0> INFO: no data (only TBM hdr): 0
[23:11:57.733] <TB0> INFO: TBM errors: 0
[23:11:57.733] <TB0> INFO: flawed TBM headers: 0
[23:11:57.733] <TB0> INFO: flawed TBM trailers: 0
[23:11:57.733] <TB0> INFO: event ID mismatches: 0
[23:11:57.733] <TB0> INFO: ROC errors: 0
[23:11:57.733] <TB0> INFO: missing ROC header(s): 0
[23:11:57.733] <TB0> INFO: misplaced readback start: 0
[23:11:57.733] <TB0> INFO: Pixel decoding errors: 0
[23:11:57.733] <TB0> INFO: pixel data incomplete: 0
[23:11:57.733] <TB0> INFO: pixel address: 0
[23:11:57.733] <TB0> INFO: pulse height fill bit: 0
[23:11:57.733] <TB0> INFO: buffer corruption: 0
[23:11:57.815] <TB0> INFO: ######################################################################
[23:11:57.815] <TB0> INFO: PixTestTrim::doTest()
[23:11:57.815] <TB0> INFO: ######################################################################
[23:11:57.816] <TB0> INFO: ----------------------------------------------------------------------
[23:11:57.816] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[23:11:57.816] <TB0> INFO: ----------------------------------------------------------------------
[23:11:57.876] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[23:11:57.876] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[23:11:57.890] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[23:11:57.890] <TB0> INFO: run 1 of 1
[23:11:58.171] <TB0> INFO: Expecting 5025280 events.
[23:12:29.818] <TB0> INFO: 833448 events read in total (31034ms).
[23:12:59.765] <TB0> INFO: 1664424 events read in total (60981ms).
[23:13:30.173] <TB0> INFO: 2492184 events read in total (91389ms).
[23:14:00.522] <TB0> INFO: 3316832 events read in total (121738ms).
[23:14:30.719] <TB0> INFO: 4139072 events read in total (151935ms).
[23:15:00.744] <TB0> INFO: 4962024 events read in total (181960ms).
[23:15:03.544] <TB0> INFO: 5025280 events read in total (184760ms).
[23:15:03.690] <TB0> INFO: Test took 185800ms.
[23:15:21.879] <TB0> INFO: ROC 0 VthrComp = 116
[23:15:21.879] <TB0> INFO: ROC 1 VthrComp = 116
[23:15:21.879] <TB0> INFO: ROC 2 VthrComp = 127
[23:15:21.879] <TB0> INFO: ROC 3 VthrComp = 120
[23:15:21.879] <TB0> INFO: ROC 4 VthrComp = 125
[23:15:21.879] <TB0> INFO: ROC 5 VthrComp = 115
[23:15:21.880] <TB0> INFO: ROC 6 VthrComp = 131
[23:15:21.880] <TB0> INFO: ROC 7 VthrComp = 126
[23:15:21.880] <TB0> INFO: ROC 8 VthrComp = 126
[23:15:21.880] <TB0> INFO: ROC 9 VthrComp = 116
[23:15:21.880] <TB0> INFO: ROC 10 VthrComp = 117
[23:15:21.880] <TB0> INFO: ROC 11 VthrComp = 116
[23:15:21.880] <TB0> INFO: ROC 12 VthrComp = 121
[23:15:21.880] <TB0> INFO: ROC 13 VthrComp = 121
[23:15:21.880] <TB0> INFO: ROC 14 VthrComp = 122
[23:15:21.880] <TB0> INFO: ROC 15 VthrComp = 129
[23:15:22.123] <TB0> INFO: Expecting 41600 events.
[23:15:25.646] <TB0> INFO: 41600 events read in total (2931ms).
[23:15:25.647] <TB0> INFO: Test took 3765ms.
[23:15:25.657] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[23:15:25.657] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[23:15:25.668] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[23:15:25.668] <TB0> INFO: run 1 of 1
[23:15:25.946] <TB0> INFO: Expecting 5025280 events.
[23:15:52.801] <TB0> INFO: 590512 events read in total (26263ms).
[23:16:18.622] <TB0> INFO: 1181048 events read in total (52084ms).
[23:16:44.421] <TB0> INFO: 1771648 events read in total (77883ms).
[23:17:10.389] <TB0> INFO: 2361968 events read in total (103851ms).
[23:17:36.066] <TB0> INFO: 2950544 events read in total (129528ms).
[23:18:01.907] <TB0> INFO: 3538224 events read in total (155369ms).
[23:18:27.661] <TB0> INFO: 4124568 events read in total (181123ms).
[23:18:53.256] <TB0> INFO: 4711592 events read in total (206718ms).
[23:19:07.013] <TB0> INFO: 5025280 events read in total (220475ms).
[23:19:07.126] <TB0> INFO: Test took 221459ms.
[23:19:35.232] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 61.0667 for pixel 51/19 mean/min/max = 46.8695/32.4187/61.3202
[23:19:35.233] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 62.9969 for pixel 8/1 mean/min/max = 47.6811/32.1936/63.1687
[23:19:35.233] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 62.2443 for pixel 20/12 mean/min/max = 46.7989/31.3184/62.2795
[23:19:35.233] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 64.0711 for pixel 9/41 mean/min/max = 48.3581/32.3237/64.3924
[23:19:35.234] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 61.8595 for pixel 12/1 mean/min/max = 46.7589/31.5279/61.9899
[23:19:35.234] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 59.3562 for pixel 23/9 mean/min/max = 46.1896/32.944/59.4352
[23:19:35.234] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 60.3036 for pixel 21/22 mean/min/max = 45.8279/31.3471/60.3086
[23:19:35.234] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 62.9088 for pixel 10/59 mean/min/max = 46.8845/30.7106/63.0583
[23:19:35.235] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 62.9997 for pixel 9/71 mean/min/max = 46.872/30.2755/63.4685
[23:19:35.235] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 62.1469 for pixel 7/7 mean/min/max = 47.2918/32.3234/62.2601
[23:19:35.235] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 64.7684 for pixel 0/32 mean/min/max = 48.7417/32.6612/64.8222
[23:19:35.236] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 62.2498 for pixel 6/2 mean/min/max = 47.806/33.1477/62.4643
[23:19:35.236] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 61.068 for pixel 50/12 mean/min/max = 46.9531/32.7951/61.1111
[23:19:35.236] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 61.3837 for pixel 9/8 mean/min/max = 46.9911/32.5563/61.4258
[23:19:35.237] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 62.2468 for pixel 12/13 mean/min/max = 47.5259/32.5077/62.5441
[23:19:35.237] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 60.4367 for pixel 26/0 mean/min/max = 46.2005/31.8631/60.538
[23:19:35.238] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:19:35.327] <TB0> INFO: Expecting 411648 events.
[23:19:44.711] <TB0> INFO: 411648 events read in total (8793ms).
[23:19:44.718] <TB0> INFO: Expecting 411648 events.
[23:19:53.913] <TB0> INFO: 411648 events read in total (8792ms).
[23:19:53.923] <TB0> INFO: Expecting 411648 events.
[23:20:03.129] <TB0> INFO: 411648 events read in total (8802ms).
[23:20:03.142] <TB0> INFO: Expecting 411648 events.
[23:20:12.265] <TB0> INFO: 411648 events read in total (8720ms).
[23:20:12.285] <TB0> INFO: Expecting 411648 events.
[23:20:21.315] <TB0> INFO: 411648 events read in total (8627ms).
[23:20:21.333] <TB0> INFO: Expecting 411648 events.
[23:20:30.658] <TB0> INFO: 411648 events read in total (8922ms).
[23:20:30.680] <TB0> INFO: Expecting 411648 events.
[23:20:40.103] <TB0> INFO: 411648 events read in total (9020ms).
[23:20:40.133] <TB0> INFO: Expecting 411648 events.
[23:20:49.464] <TB0> INFO: 411648 events read in total (8928ms).
[23:20:49.499] <TB0> INFO: Expecting 411648 events.
[23:20:58.924] <TB0> INFO: 411648 events read in total (9022ms).
[23:20:58.955] <TB0> INFO: Expecting 411648 events.
[23:21:08.286] <TB0> INFO: 411648 events read in total (8928ms).
[23:21:08.318] <TB0> INFO: Expecting 411648 events.
[23:21:17.654] <TB0> INFO: 411648 events read in total (8933ms).
[23:21:17.688] <TB0> INFO: Expecting 411648 events.
[23:21:27.118] <TB0> INFO: 411648 events read in total (9027ms).
[23:21:27.165] <TB0> INFO: Expecting 411648 events.
[23:21:36.509] <TB0> INFO: 411648 events read in total (8941ms).
[23:21:36.559] <TB0> INFO: Expecting 411648 events.
[23:21:45.886] <TB0> INFO: 411648 events read in total (8924ms).
[23:21:45.929] <TB0> INFO: Expecting 411648 events.
[23:21:55.220] <TB0> INFO: 411648 events read in total (8889ms).
[23:21:55.314] <TB0> INFO: Expecting 411648 events.
[23:22:04.676] <TB0> INFO: 411648 events read in total (8958ms).
[23:22:04.728] <TB0> INFO: Test took 149490ms.
[23:22:05.443] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[23:22:05.457] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[23:22:05.457] <TB0> INFO: run 1 of 1
[23:22:05.694] <TB0> INFO: Expecting 5025280 events.
[23:22:32.508] <TB0> INFO: 593824 events read in total (26223ms).
[23:22:58.668] <TB0> INFO: 1188520 events read in total (52383ms).
[23:23:25.077] <TB0> INFO: 1782400 events read in total (78792ms).
[23:23:51.235] <TB0> INFO: 2375064 events read in total (104950ms).
[23:24:17.299] <TB0> INFO: 2970880 events read in total (131015ms).
[23:24:43.935] <TB0> INFO: 3565976 events read in total (157650ms).
[23:25:10.630] <TB0> INFO: 4164112 events read in total (184345ms).
[23:25:37.239] <TB0> INFO: 4762072 events read in total (210954ms).
[23:25:49.287] <TB0> INFO: 5025280 events read in total (223002ms).
[23:25:49.424] <TB0> INFO: Test took 223968ms.
[23:26:13.514] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 3.077246 .. 146.425649
[23:26:13.841] <TB0> INFO: Expecting 208000 events.
[23:26:23.647] <TB0> INFO: 208000 events read in total (9214ms).
[23:26:23.648] <TB0> INFO: Test took 10131ms.
[23:26:23.699] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 3 .. 156 (-1/-1) hits flags = 528 (plus default)
[23:26:23.712] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[23:26:23.712] <TB0> INFO: run 1 of 1
[23:26:23.990] <TB0> INFO: Expecting 5125120 events.
[23:26:50.111] <TB0> INFO: 582784 events read in total (25529ms).
[23:27:16.501] <TB0> INFO: 1164752 events read in total (51919ms).
[23:27:42.355] <TB0> INFO: 1747216 events read in total (77774ms).
[23:28:08.126] <TB0> INFO: 2329656 events read in total (103546ms).
[23:28:33.950] <TB0> INFO: 2911872 events read in total (129368ms).
[23:28:59.763] <TB0> INFO: 3493880 events read in total (155181ms).
[23:29:25.817] <TB0> INFO: 4075960 events read in total (181235ms).
[23:29:52.078] <TB0> INFO: 4657456 events read in total (207496ms).
[23:30:12.952] <TB0> INFO: 5125120 events read in total (228370ms).
[23:30:13.113] <TB0> INFO: Test took 229401ms.
[23:30:41.284] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 27.511655 .. 46.328024
[23:30:41.615] <TB0> INFO: Expecting 208000 events.
[23:30:51.542] <TB0> INFO: 208000 events read in total (9335ms).
[23:30:51.543] <TB0> INFO: Test took 10257ms.
[23:30:51.591] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 56 (-1/-1) hits flags = 528 (plus default)
[23:30:51.603] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[23:30:51.603] <TB0> INFO: run 1 of 1
[23:30:51.881] <TB0> INFO: Expecting 1331200 events.
[23:31:20.003] <TB0> INFO: 662024 events read in total (28530ms).
[23:31:48.861] <TB0> INFO: 1323152 events read in total (56388ms).
[23:31:49.636] <TB0> INFO: 1331200 events read in total (57164ms).
[23:31:49.672] <TB0> INFO: Test took 58069ms.
[23:32:04.777] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 28.837661 .. 48.484750
[23:32:05.056] <TB0> INFO: Expecting 208000 events.
[23:32:15.160] <TB0> INFO: 208000 events read in total (9512ms).
[23:32:15.160] <TB0> INFO: Test took 10381ms.
[23:32:15.208] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 18 .. 58 (-1/-1) hits flags = 528 (plus default)
[23:32:15.221] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[23:32:15.221] <TB0> INFO: run 1 of 1
[23:32:15.499] <TB0> INFO: Expecting 1364480 events.
[23:32:44.199] <TB0> INFO: 647760 events read in total (28108ms).
[23:33:11.523] <TB0> INFO: 1294528 events read in total (55433ms).
[23:33:14.809] <TB0> INFO: 1364480 events read in total (58718ms).
[23:33:14.851] <TB0> INFO: Test took 59631ms.
[23:33:27.918] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 26.477918 .. 48.664443
[23:33:28.195] <TB0> INFO: Expecting 208000 events.
[23:33:38.037] <TB0> INFO: 208000 events read in total (9251ms).
[23:33:38.038] <TB0> INFO: Test took 10119ms.
[23:33:38.106] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 16 .. 58 (-1/-1) hits flags = 528 (plus default)
[23:33:38.120] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[23:33:38.120] <TB0> INFO: run 1 of 1
[23:33:38.398] <TB0> INFO: Expecting 1431040 events.
[23:34:06.623] <TB0> INFO: 654240 events read in total (27634ms).
[23:34:33.791] <TB0> INFO: 1307336 events read in total (54803ms).
[23:34:39.288] <TB0> INFO: 1431040 events read in total (60299ms).
[23:34:39.330] <TB0> INFO: Test took 61211ms.
[23:34:51.648] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[23:34:51.648] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[23:34:51.661] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[23:34:51.661] <TB0> INFO: run 1 of 1
[23:34:51.901] <TB0> INFO: Expecting 1364480 events.
[23:35:20.618] <TB0> INFO: 670256 events read in total (28126ms).
[23:35:48.708] <TB0> INFO: 1339360 events read in total (56216ms).
[23:35:50.158] <TB0> INFO: 1364480 events read in total (57666ms).
[23:35:50.188] <TB0> INFO: Test took 58527ms.
[23:36:03.592] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C0.dat
[23:36:03.592] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C1.dat
[23:36:03.592] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C2.dat
[23:36:03.592] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C3.dat
[23:36:03.592] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C4.dat
[23:36:03.592] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C5.dat
[23:36:03.592] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C6.dat
[23:36:03.593] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C7.dat
[23:36:03.593] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C8.dat
[23:36:03.593] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C9.dat
[23:36:03.593] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C10.dat
[23:36:03.593] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C11.dat
[23:36:03.593] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C12.dat
[23:36:03.593] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C13.dat
[23:36:03.593] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C14.dat
[23:36:03.593] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C15.dat
[23:36:03.593] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C0.dat
[23:36:03.600] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C1.dat
[23:36:03.605] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C2.dat
[23:36:03.609] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C3.dat
[23:36:03.615] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C4.dat
[23:36:03.620] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C5.dat
[23:36:03.624] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C6.dat
[23:36:03.629] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C7.dat
[23:36:03.634] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C8.dat
[23:36:03.638] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C9.dat
[23:36:03.643] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C10.dat
[23:36:03.648] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C11.dat
[23:36:03.652] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C12.dat
[23:36:03.657] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C13.dat
[23:36:03.662] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C14.dat
[23:36:03.666] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C15.dat
[23:36:03.671] <TB0> INFO: PixTestTrim::trimTest() done
[23:36:03.671] <TB0> INFO: vtrim: 116 139 139 144 118 126 125 135 145 122 125 125 121 117 137 136
[23:36:03.671] <TB0> INFO: vthrcomp: 116 116 127 120 125 115 131 126 126 116 117 116 121 121 122 129
[23:36:03.671] <TB0> INFO: vcal mean: 35.07 35.20 35.43 35.48 35.44 35.05 35.00 35.62 35.47 35.08 35.35 35.13 35.16 35.15 35.33 35.00
[23:36:03.671] <TB0> INFO: vcal RMS: 1.10 1.36 1.62 1.62 1.68 1.04 1.13 1.92 1.75 1.12 1.39 1.20 1.20 1.27 1.29 1.11
[23:36:03.671] <TB0> INFO: bits mean: 9.29 9.42 9.98 9.49 10.01 9.53 9.74 10.12 10.34 9.29 8.68 9.11 9.22 9.27 9.44 9.65
[23:36:03.671] <TB0> INFO: bits RMS: 2.75 2.72 2.63 2.64 2.60 2.59 2.69 2.64 2.53 2.74 2.87 2.69 2.74 2.76 2.66 2.67
[23:36:03.678] <TB0> INFO: ----------------------------------------------------------------------
[23:36:03.678] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[23:36:03.678] <TB0> INFO: ----------------------------------------------------------------------
[23:36:03.681] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[23:36:03.694] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[23:36:03.694] <TB0> INFO: run 1 of 1
[23:36:03.931] <TB0> INFO: Expecting 4160000 events.
[23:36:37.558] <TB0> INFO: 785205 events read in total (33036ms).
[23:37:10.607] <TB0> INFO: 1563445 events read in total (66085ms).
[23:37:43.204] <TB0> INFO: 2335905 events read in total (98683ms).
[23:38:15.731] <TB0> INFO: 3102830 events read in total (131209ms).
[23:38:48.398] <TB0> INFO: 3869640 events read in total (163876ms).
[23:39:01.097] <TB0> INFO: 4160000 events read in total (176575ms).
[23:39:01.153] <TB0> INFO: Test took 177459ms.
[23:39:27.737] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 214 (-1/-1) hits flags = 528 (plus default)
[23:39:27.750] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[23:39:27.750] <TB0> INFO: run 1 of 1
[23:39:27.002] <TB0> INFO: Expecting 4472000 events.
[23:40:00.412] <TB0> INFO: 735330 events read in total (31818ms).
[23:40:31.694] <TB0> INFO: 1465830 events read in total (63100ms).
[23:41:03.697] <TB0> INFO: 2193500 events read in total (95103ms).
[23:41:35.228] <TB0> INFO: 2916405 events read in total (126634ms).
[23:42:06.757] <TB0> INFO: 3639000 events read in total (158163ms).
[23:42:38.165] <TB0> INFO: 4360905 events read in total (189571ms).
[23:42:43.186] <TB0> INFO: 4472000 events read in total (194592ms).
[23:42:43.254] <TB0> INFO: Test took 195505ms.
[23:43:12.182] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[23:43:12.195] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[23:43:12.195] <TB0> INFO: run 1 of 1
[23:43:12.431] <TB0> INFO: Expecting 4264000 events.
[23:43:45.349] <TB0> INFO: 749380 events read in total (32327ms).
[23:44:17.015] <TB0> INFO: 1493545 events read in total (63993ms).
[23:44:48.535] <TB0> INFO: 2234485 events read in total (95513ms).
[23:45:20.482] <TB0> INFO: 2970490 events read in total (127460ms).
[23:45:52.024] <TB0> INFO: 3705660 events read in total (159002ms).
[23:46:16.402] <TB0> INFO: 4264000 events read in total (183380ms).
[23:46:16.481] <TB0> INFO: Test took 184286ms.
[23:46:42.582] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 202 (-1/-1) hits flags = 528 (plus default)
[23:46:42.596] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[23:46:42.596] <TB0> INFO: run 1 of 1
[23:46:42.872] <TB0> INFO: Expecting 4222400 events.
[23:47:15.695] <TB0> INFO: 752750 events read in total (32231ms).
[23:47:47.286] <TB0> INFO: 1499975 events read in total (63822ms).
[23:48:19.187] <TB0> INFO: 2243605 events read in total (95723ms).
[23:48:50.411] <TB0> INFO: 2982160 events read in total (126947ms).
[23:49:22.077] <TB0> INFO: 3720410 events read in total (158613ms).
[23:49:43.832] <TB0> INFO: 4222400 events read in total (180368ms).
[23:49:43.912] <TB0> INFO: Test took 181316ms.
[23:50:07.908] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[23:50:07.921] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[23:50:07.921] <TB0> INFO: run 1 of 1
[23:50:08.158] <TB0> INFO: Expecting 4243200 events.
[23:50:40.461] <TB0> INFO: 751000 events read in total (31711ms).
[23:51:12.062] <TB0> INFO: 1496895 events read in total (63312ms).
[23:51:43.844] <TB0> INFO: 2239235 events read in total (95094ms).
[23:52:15.270] <TB0> INFO: 2976965 events read in total (126520ms).
[23:52:46.176] <TB0> INFO: 3713985 events read in total (157426ms).
[23:53:08.932] <TB0> INFO: 4243200 events read in total (180182ms).
[23:53:08.995] <TB0> INFO: Test took 181074ms.
[23:53:34.521] <TB0> INFO: PixTestTrim::trimBitTest() done
[23:53:34.523] <TB0> INFO: PixTestTrim::doTest() done, duration: 2496 seconds
[23:53:34.523] <TB0> INFO: Decoding statistics:
[23:53:34.523] <TB0> INFO: General information:
[23:53:34.523] <TB0> INFO: 16bit words read: 0
[23:53:34.523] <TB0> INFO: valid events total: 0
[23:53:34.523] <TB0> INFO: empty events: 0
[23:53:34.523] <TB0> INFO: valid events with pixels: 0
[23:53:34.523] <TB0> INFO: valid pixel hits: 0
[23:53:34.523] <TB0> INFO: Event errors: 0
[23:53:34.523] <TB0> INFO: start marker: 0
[23:53:34.523] <TB0> INFO: stop marker: 0
[23:53:34.523] <TB0> INFO: overflow: 0
[23:53:34.523] <TB0> INFO: invalid 5bit words: 0
[23:53:34.523] <TB0> INFO: invalid XOR eye diagram: 0
[23:53:34.523] <TB0> INFO: frame (failed synchr.): 0
[23:53:34.523] <TB0> INFO: idle data (no TBM trl): 0
[23:53:34.523] <TB0> INFO: no data (only TBM hdr): 0
[23:53:34.523] <TB0> INFO: TBM errors: 0
[23:53:34.523] <TB0> INFO: flawed TBM headers: 0
[23:53:34.523] <TB0> INFO: flawed TBM trailers: 0
[23:53:34.523] <TB0> INFO: event ID mismatches: 0
[23:53:34.523] <TB0> INFO: ROC errors: 0
[23:53:34.523] <TB0> INFO: missing ROC header(s): 0
[23:53:34.523] <TB0> INFO: misplaced readback start: 0
[23:53:34.523] <TB0> INFO: Pixel decoding errors: 0
[23:53:34.523] <TB0> INFO: pixel data incomplete: 0
[23:53:34.523] <TB0> INFO: pixel address: 0
[23:53:34.523] <TB0> INFO: pulse height fill bit: 0
[23:53:34.523] <TB0> INFO: buffer corruption: 0
[23:53:35.122] <TB0> INFO: ######################################################################
[23:53:35.122] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[23:53:35.122] <TB0> INFO: ######################################################################
[23:53:35.359] <TB0> INFO: Expecting 41600 events.
[23:53:38.877] <TB0> INFO: 41600 events read in total (2926ms).
[23:53:38.878] <TB0> INFO: Test took 3754ms.
[23:53:39.366] <TB0> INFO: Expecting 41600 events.
[23:53:42.823] <TB0> INFO: 41600 events read in total (2866ms).
[23:53:42.825] <TB0> INFO: Test took 3744ms.
[23:53:43.114] <TB0> INFO: Expecting 41600 events.
[23:53:46.672] <TB0> INFO: 41600 events read in total (2966ms).
[23:53:46.673] <TB0> INFO: Test took 3824ms.
[23:53:46.965] <TB0> INFO: Expecting 41600 events.
[23:53:50.525] <TB0> INFO: 41600 events read in total (2968ms).
[23:53:50.526] <TB0> INFO: Test took 3829ms.
[23:53:50.815] <TB0> INFO: Expecting 41600 events.
[23:53:54.362] <TB0> INFO: 41600 events read in total (2955ms).
[23:53:54.363] <TB0> INFO: Test took 3812ms.
[23:53:54.656] <TB0> INFO: Expecting 41600 events.
[23:53:58.141] <TB0> INFO: 41600 events read in total (2894ms).
[23:53:58.142] <TB0> INFO: Test took 3751ms.
[23:53:58.431] <TB0> INFO: Expecting 41600 events.
[23:54:01.999] <TB0> INFO: 41600 events read in total (2976ms).
[23:54:01.000] <TB0> INFO: Test took 3834ms.
[23:54:02.314] <TB0> INFO: Expecting 41600 events.
[23:54:05.791] <TB0> INFO: 41600 events read in total (2885ms).
[23:54:05.793] <TB0> INFO: Test took 3768ms.
[23:54:06.084] <TB0> INFO: Expecting 41600 events.
[23:54:09.569] <TB0> INFO: 41600 events read in total (2893ms).
[23:54:09.570] <TB0> INFO: Test took 3750ms.
[23:54:09.859] <TB0> INFO: Expecting 41600 events.
[23:54:13.442] <TB0> INFO: 41600 events read in total (2992ms).
[23:54:13.443] <TB0> INFO: Test took 3849ms.
[23:54:13.733] <TB0> INFO: Expecting 41600 events.
[23:54:17.301] <TB0> INFO: 41600 events read in total (2976ms).
[23:54:17.303] <TB0> INFO: Test took 3835ms.
[23:54:17.594] <TB0> INFO: Expecting 41600 events.
[23:54:21.305] <TB0> INFO: 41600 events read in total (3119ms).
[23:54:21.306] <TB0> INFO: Test took 3976ms.
[23:54:21.626] <TB0> INFO: Expecting 41600 events.
[23:54:25.224] <TB0> INFO: 41600 events read in total (3006ms).
[23:54:25.226] <TB0> INFO: Test took 3895ms.
[23:54:25.520] <TB0> INFO: Expecting 41600 events.
[23:54:29.095] <TB0> INFO: 41600 events read in total (2984ms).
[23:54:29.096] <TB0> INFO: Test took 3841ms.
[23:54:29.385] <TB0> INFO: Expecting 41600 events.
[23:54:32.917] <TB0> INFO: 41600 events read in total (2940ms).
[23:54:32.918] <TB0> INFO: Test took 3797ms.
[23:54:33.208] <TB0> INFO: Expecting 41600 events.
[23:54:36.825] <TB0> INFO: 41600 events read in total (3025ms).
[23:54:36.827] <TB0> INFO: Test took 3883ms.
[23:54:37.132] <TB0> INFO: Expecting 41600 events.
[23:54:40.698] <TB0> INFO: 41600 events read in total (2974ms).
[23:54:40.699] <TB0> INFO: Test took 3845ms.
[23:54:40.988] <TB0> INFO: Expecting 41600 events.
[23:54:44.516] <TB0> INFO: 41600 events read in total (2936ms).
[23:54:44.517] <TB0> INFO: Test took 3794ms.
[23:54:44.807] <TB0> INFO: Expecting 41600 events.
[23:54:48.475] <TB0> INFO: 41600 events read in total (3076ms).
[23:54:48.476] <TB0> INFO: Test took 3933ms.
[23:54:48.765] <TB0> INFO: Expecting 41600 events.
[23:54:52.341] <TB0> INFO: 41600 events read in total (2984ms).
[23:54:52.341] <TB0> INFO: Test took 3840ms.
[23:54:52.631] <TB0> INFO: Expecting 41600 events.
[23:54:56.208] <TB0> INFO: 41600 events read in total (2986ms).
[23:54:56.209] <TB0> INFO: Test took 3843ms.
[23:54:56.499] <TB0> INFO: Expecting 41600 events.
[23:54:59.999] <TB0> INFO: 41600 events read in total (2908ms).
[23:54:59.000] <TB0> INFO: Test took 3766ms.
[23:55:00.290] <TB0> INFO: Expecting 41600 events.
[23:55:03.796] <TB0> INFO: 41600 events read in total (2915ms).
[23:55:03.798] <TB0> INFO: Test took 3773ms.
[23:55:04.089] <TB0> INFO: Expecting 41600 events.
[23:55:07.562] <TB0> INFO: 41600 events read in total (2882ms).
[23:55:07.564] <TB0> INFO: Test took 3740ms.
[23:55:07.857] <TB0> INFO: Expecting 41600 events.
[23:55:11.491] <TB0> INFO: 41600 events read in total (3043ms).
[23:55:11.492] <TB0> INFO: Test took 3904ms.
[23:55:11.787] <TB0> INFO: Expecting 41600 events.
[23:55:15.358] <TB0> INFO: 41600 events read in total (2980ms).
[23:55:15.359] <TB0> INFO: Test took 3838ms.
[23:55:15.651] <TB0> INFO: Expecting 41600 events.
[23:55:19.149] <TB0> INFO: 41600 events read in total (2906ms).
[23:55:19.150] <TB0> INFO: Test took 3763ms.
[23:55:19.447] <TB0> INFO: Expecting 41600 events.
[23:55:23.007] <TB0> INFO: 41600 events read in total (2969ms).
[23:55:23.008] <TB0> INFO: Test took 3833ms.
[23:55:23.310] <TB0> INFO: Expecting 41600 events.
[23:55:26.908] <TB0> INFO: 41600 events read in total (3006ms).
[23:55:26.909] <TB0> INFO: Test took 3864ms.
[23:55:27.202] <TB0> INFO: Expecting 2560 events.
[23:55:28.085] <TB0> INFO: 2560 events read in total (291ms).
[23:55:28.086] <TB0> INFO: Test took 1160ms.
[23:55:28.393] <TB0> INFO: Expecting 2560 events.
[23:55:29.278] <TB0> INFO: 2560 events read in total (293ms).
[23:55:29.279] <TB0> INFO: Test took 1193ms.
[23:55:29.586] <TB0> INFO: Expecting 2560 events.
[23:55:30.474] <TB0> INFO: 2560 events read in total (297ms).
[23:55:30.474] <TB0> INFO: Test took 1194ms.
[23:55:30.782] <TB0> INFO: Expecting 2560 events.
[23:55:31.670] <TB0> INFO: 2560 events read in total (297ms).
[23:55:31.670] <TB0> INFO: Test took 1195ms.
[23:55:31.977] <TB0> INFO: Expecting 2560 events.
[23:55:32.856] <TB0> INFO: 2560 events read in total (287ms).
[23:55:32.856] <TB0> INFO: Test took 1185ms.
[23:55:33.167] <TB0> INFO: Expecting 2560 events.
[23:55:34.048] <TB0> INFO: 2560 events read in total (289ms).
[23:55:34.048] <TB0> INFO: Test took 1191ms.
[23:55:34.356] <TB0> INFO: Expecting 2560 events.
[23:55:35.245] <TB0> INFO: 2560 events read in total (297ms).
[23:55:35.245] <TB0> INFO: Test took 1197ms.
[23:55:35.553] <TB0> INFO: Expecting 2560 events.
[23:55:36.437] <TB0> INFO: 2560 events read in total (292ms).
[23:55:36.437] <TB0> INFO: Test took 1191ms.
[23:55:36.745] <TB0> INFO: Expecting 2560 events.
[23:55:37.628] <TB0> INFO: 2560 events read in total (291ms).
[23:55:37.629] <TB0> INFO: Test took 1192ms.
[23:55:37.937] <TB0> INFO: Expecting 2560 events.
[23:55:38.827] <TB0> INFO: 2560 events read in total (299ms).
[23:55:38.827] <TB0> INFO: Test took 1198ms.
[23:55:39.135] <TB0> INFO: Expecting 2560 events.
[23:55:40.025] <TB0> INFO: 2560 events read in total (298ms).
[23:55:40.026] <TB0> INFO: Test took 1198ms.
[23:55:40.335] <TB0> INFO: Expecting 2560 events.
[23:55:41.218] <TB0> INFO: 2560 events read in total (291ms).
[23:55:41.219] <TB0> INFO: Test took 1193ms.
[23:55:41.525] <TB0> INFO: Expecting 2560 events.
[23:55:42.424] <TB0> INFO: 2560 events read in total (307ms).
[23:55:42.424] <TB0> INFO: Test took 1204ms.
[23:55:42.731] <TB0> INFO: Expecting 2560 events.
[23:55:43.623] <TB0> INFO: 2560 events read in total (300ms).
[23:55:43.623] <TB0> INFO: Test took 1198ms.
[23:55:43.932] <TB0> INFO: Expecting 2560 events.
[23:55:44.821] <TB0> INFO: 2560 events read in total (297ms).
[23:55:44.821] <TB0> INFO: Test took 1198ms.
[23:55:45.127] <TB0> INFO: Expecting 2560 events.
[23:55:46.020] <TB0> INFO: 2560 events read in total (301ms).
[23:55:46.020] <TB0> INFO: Test took 1198ms.
[23:55:46.023] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:55:46.330] <TB0> INFO: Expecting 655360 events.
[23:56:00.983] <TB0> INFO: 655360 events read in total (14061ms).
[23:56:00.995] <TB0> INFO: Expecting 655360 events.
[23:56:15.539] <TB0> INFO: 655360 events read in total (14141ms).
[23:56:15.555] <TB0> INFO: Expecting 655360 events.
[23:56:29.875] <TB0> INFO: 655360 events read in total (13917ms).
[23:56:29.896] <TB0> INFO: Expecting 655360 events.
[23:56:44.250] <TB0> INFO: 655360 events read in total (13951ms).
[23:56:44.275] <TB0> INFO: Expecting 655360 events.
[23:56:59.221] <TB0> INFO: 655360 events read in total (14543ms).
[23:56:59.252] <TB0> INFO: Expecting 655360 events.
[23:57:13.868] <TB0> INFO: 655360 events read in total (14212ms).
[23:57:13.902] <TB0> INFO: Expecting 655360 events.
[23:57:28.545] <TB0> INFO: 655360 events read in total (14240ms).
[23:57:28.587] <TB0> INFO: Expecting 655360 events.
[23:57:43.321] <TB0> INFO: 655360 events read in total (14331ms).
[23:57:43.366] <TB0> INFO: Expecting 655360 events.
[23:57:58.017] <TB0> INFO: 655360 events read in total (14248ms).
[23:57:58.112] <TB0> INFO: Expecting 655360 events.
[23:58:12.684] <TB0> INFO: 655360 events read in total (14169ms).
[23:58:12.739] <TB0> INFO: Expecting 655360 events.
[23:58:27.431] <TB0> INFO: 655360 events read in total (14289ms).
[23:58:27.571] <TB0> INFO: Expecting 655360 events.
[23:58:42.264] <TB0> INFO: 655360 events read in total (14290ms).
[23:58:42.328] <TB0> INFO: Expecting 655360 events.
[23:58:57.344] <TB0> INFO: 655360 events read in total (14613ms).
[23:58:57.503] <TB0> INFO: Expecting 655360 events.
[23:59:12.058] <TB0> INFO: 655360 events read in total (14152ms).
[23:59:12.132] <TB0> INFO: Expecting 655360 events.
[23:59:26.652] <TB0> INFO: 655360 events read in total (14116ms).
[23:59:26.742] <TB0> INFO: Expecting 655360 events.
[23:59:41.218] <TB0> INFO: 655360 events read in total (14073ms).
[23:59:41.301] <TB0> INFO: Test took 235278ms.
[23:59:41.391] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:59:41.653] <TB0> INFO: Expecting 655360 events.
[23:59:56.340] <TB0> INFO: 655360 events read in total (14096ms).
[23:59:56.354] <TB0> INFO: Expecting 655360 events.
[00:00:10.357] <TB0> INFO: 655360 events read in total (13600ms).
[00:00:10.371] <TB0> INFO: Expecting 655360 events.
[00:00:24.766] <TB0> INFO: 655360 events read in total (13992ms).
[00:00:24.788] <TB0> INFO: Expecting 655360 events.
[00:00:39.196] <TB0> INFO: 655360 events read in total (14005ms).
[00:00:39.223] <TB0> INFO: Expecting 655360 events.
[00:00:53.683] <TB0> INFO: 655360 events read in total (14057ms).
[00:00:53.712] <TB0> INFO: Expecting 655360 events.
[00:01:08.096] <TB0> INFO: 655360 events read in total (13981ms).
[00:01:08.132] <TB0> INFO: Expecting 655360 events.
[00:01:22.503] <TB0> INFO: 655360 events read in total (13968ms).
[00:01:22.541] <TB0> INFO: Expecting 655360 events.
[00:01:36.959] <TB0> INFO: 655360 events read in total (14015ms).
[00:01:37.006] <TB0> INFO: Expecting 655360 events.
[00:01:51.351] <TB0> INFO: 655360 events read in total (13942ms).
[00:01:51.430] <TB0> INFO: Expecting 655360 events.
[00:02:05.511] <TB0> INFO: 655360 events read in total (13679ms).
[00:02:05.564] <TB0> INFO: Expecting 655360 events.
[00:02:19.757] <TB0> INFO: 655360 events read in total (13789ms).
[00:02:19.895] <TB0> INFO: Expecting 655360 events.
[00:02:34.149] <TB0> INFO: 655360 events read in total (13851ms).
[00:02:34.219] <TB0> INFO: Expecting 655360 events.
[00:02:48.522] <TB0> INFO: 655360 events read in total (13900ms).
[00:02:48.639] <TB0> INFO: Expecting 655360 events.
[00:03:03.140] <TB0> INFO: 655360 events read in total (14098ms).
[00:03:03.217] <TB0> INFO: Expecting 655360 events.
[00:03:17.669] <TB0> INFO: 655360 events read in total (14048ms).
[00:03:17.794] <TB0> INFO: Expecting 655360 events.
[00:03:31.922] <TB0> INFO: 655360 events read in total (13725ms).
[00:03:32.010] <TB0> INFO: Test took 230619ms.
[00:03:32.174] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[00:03:32.180] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[00:03:32.185] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[00:03:32.191] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[00:03:32.197] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[00:03:32.203] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[00:03:32.209] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[00:03:32.214] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[00:03:32.220] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[00:03:32.226] <TB0> INFO: safety margin for low PH: adding 8, margin is now 28
[00:03:32.232] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[00:03:32.238] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[00:03:32.243] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[00:03:32.249] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[00:03:32.255] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[00:03:32.261] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[00:03:32.266] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[00:03:32.272] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[00:03:32.278] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[00:03:32.284] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[00:03:32.290] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[00:03:32.295] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[00:03:32.301] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[00:03:32.307] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[00:03:32.313] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[00:03:32.319] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[00:03:32.325] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[00:03:32.330] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[00:03:32.336] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[00:03:32.342] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[00:03:32.348] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[00:03:32.354] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[00:03:32.360] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[00:03:32.366] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[00:03:32.372] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[00:03:32.378] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[00:03:32.384] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[00:03:32.390] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[00:03:32.395] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[00:03:32.401] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[00:03:32.407] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[00:03:32.414] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[00:03:32.421] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[00:03:32.428] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[00:03:32.435] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[00:03:32.471] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C0.dat
[00:03:32.471] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C1.dat
[00:03:32.471] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C2.dat
[00:03:32.471] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C3.dat
[00:03:32.471] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C4.dat
[00:03:32.471] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C5.dat
[00:03:32.471] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C6.dat
[00:03:32.471] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C7.dat
[00:03:32.472] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C8.dat
[00:03:32.472] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C9.dat
[00:03:32.472] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C10.dat
[00:03:32.472] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C11.dat
[00:03:32.472] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C12.dat
[00:03:32.472] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C13.dat
[00:03:32.472] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C14.dat
[00:03:32.472] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C15.dat
[00:03:32.714] <TB0> INFO: Expecting 41600 events.
[00:03:35.887] <TB0> INFO: 41600 events read in total (2581ms).
[00:03:35.888] <TB0> INFO: Test took 3413ms.
[00:03:36.347] <TB0> INFO: Expecting 41600 events.
[00:03:39.431] <TB0> INFO: 41600 events read in total (2492ms).
[00:03:39.432] <TB0> INFO: Test took 3327ms.
[00:03:39.886] <TB0> INFO: Expecting 41600 events.
[00:03:43.005] <TB0> INFO: 41600 events read in total (2528ms).
[00:03:43.006] <TB0> INFO: Test took 3361ms.
[00:03:43.224] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:03:43.313] <TB0> INFO: Expecting 2560 events.
[00:03:44.197] <TB0> INFO: 2560 events read in total (292ms).
[00:03:44.197] <TB0> INFO: Test took 973ms.
[00:03:44.200] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:03:44.506] <TB0> INFO: Expecting 2560 events.
[00:03:45.399] <TB0> INFO: 2560 events read in total (302ms).
[00:03:45.399] <TB0> INFO: Test took 1199ms.
[00:03:45.402] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:03:45.707] <TB0> INFO: Expecting 2560 events.
[00:03:46.600] <TB0> INFO: 2560 events read in total (301ms).
[00:03:46.600] <TB0> INFO: Test took 1198ms.
[00:03:46.604] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:03:46.907] <TB0> INFO: Expecting 2560 events.
[00:03:47.798] <TB0> INFO: 2560 events read in total (299ms).
[00:03:47.799] <TB0> INFO: Test took 1195ms.
[00:03:47.801] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:03:48.107] <TB0> INFO: Expecting 2560 events.
[00:03:48.995] <TB0> INFO: 2560 events read in total (297ms).
[00:03:48.996] <TB0> INFO: Test took 1195ms.
[00:03:48.999] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:03:49.303] <TB0> INFO: Expecting 2560 events.
[00:03:50.199] <TB0> INFO: 2560 events read in total (304ms).
[00:03:50.200] <TB0> INFO: Test took 1201ms.
[00:03:50.203] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:03:50.508] <TB0> INFO: Expecting 2560 events.
[00:03:51.401] <TB0> INFO: 2560 events read in total (301ms).
[00:03:51.401] <TB0> INFO: Test took 1198ms.
[00:03:51.405] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:03:51.708] <TB0> INFO: Expecting 2560 events.
[00:03:52.597] <TB0> INFO: 2560 events read in total (297ms).
[00:03:52.598] <TB0> INFO: Test took 1193ms.
[00:03:52.601] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:03:52.907] <TB0> INFO: Expecting 2560 events.
[00:03:53.792] <TB0> INFO: 2560 events read in total (294ms).
[00:03:53.793] <TB0> INFO: Test took 1192ms.
[00:03:53.796] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:03:54.100] <TB0> INFO: Expecting 2560 events.
[00:03:54.987] <TB0> INFO: 2560 events read in total (296ms).
[00:03:54.987] <TB0> INFO: Test took 1191ms.
[00:03:54.991] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:03:55.294] <TB0> INFO: Expecting 2560 events.
[00:03:56.175] <TB0> INFO: 2560 events read in total (289ms).
[00:03:56.176] <TB0> INFO: Test took 1185ms.
[00:03:56.178] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:03:56.484] <TB0> INFO: Expecting 2560 events.
[00:03:57.367] <TB0> INFO: 2560 events read in total (291ms).
[00:03:57.367] <TB0> INFO: Test took 1189ms.
[00:03:57.370] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:03:57.675] <TB0> INFO: Expecting 2560 events.
[00:03:58.554] <TB0> INFO: 2560 events read in total (287ms).
[00:03:58.554] <TB0> INFO: Test took 1185ms.
[00:03:58.557] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:03:58.863] <TB0> INFO: Expecting 2560 events.
[00:03:59.743] <TB0> INFO: 2560 events read in total (288ms).
[00:03:59.744] <TB0> INFO: Test took 1188ms.
[00:03:59.746] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:00.051] <TB0> INFO: Expecting 2560 events.
[00:04:00.934] <TB0> INFO: 2560 events read in total (291ms).
[00:04:00.934] <TB0> INFO: Test took 1188ms.
[00:04:00.936] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:01.243] <TB0> INFO: Expecting 2560 events.
[00:04:02.123] <TB0> INFO: 2560 events read in total (289ms).
[00:04:02.124] <TB0> INFO: Test took 1188ms.
[00:04:02.130] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:02.432] <TB0> INFO: Expecting 2560 events.
[00:04:03.313] <TB0> INFO: 2560 events read in total (289ms).
[00:04:03.314] <TB0> INFO: Test took 1184ms.
[00:04:03.317] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:03.622] <TB0> INFO: Expecting 2560 events.
[00:04:04.516] <TB0> INFO: 2560 events read in total (303ms).
[00:04:04.516] <TB0> INFO: Test took 1200ms.
[00:04:04.519] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:04.824] <TB0> INFO: Expecting 2560 events.
[00:04:05.714] <TB0> INFO: 2560 events read in total (298ms).
[00:04:05.715] <TB0> INFO: Test took 1196ms.
[00:04:05.719] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:06.023] <TB0> INFO: Expecting 2560 events.
[00:04:06.904] <TB0> INFO: 2560 events read in total (289ms).
[00:04:06.904] <TB0> INFO: Test took 1186ms.
[00:04:06.909] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:07.213] <TB0> INFO: Expecting 2560 events.
[00:04:08.095] <TB0> INFO: 2560 events read in total (290ms).
[00:04:08.096] <TB0> INFO: Test took 1188ms.
[00:04:08.099] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:08.405] <TB0> INFO: Expecting 2560 events.
[00:04:09.288] <TB0> INFO: 2560 events read in total (291ms).
[00:04:09.288] <TB0> INFO: Test took 1189ms.
[00:04:09.291] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:09.596] <TB0> INFO: Expecting 2560 events.
[00:04:10.479] <TB0> INFO: 2560 events read in total (291ms).
[00:04:10.479] <TB0> INFO: Test took 1188ms.
[00:04:10.481] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:10.788] <TB0> INFO: Expecting 2560 events.
[00:04:11.673] <TB0> INFO: 2560 events read in total (294ms).
[00:04:11.673] <TB0> INFO: Test took 1192ms.
[00:04:11.676] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:11.981] <TB0> INFO: Expecting 2560 events.
[00:04:12.870] <TB0> INFO: 2560 events read in total (297ms).
[00:04:12.871] <TB0> INFO: Test took 1195ms.
[00:04:12.874] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:13.178] <TB0> INFO: Expecting 2560 events.
[00:04:14.065] <TB0> INFO: 2560 events read in total (295ms).
[00:04:14.065] <TB0> INFO: Test took 1191ms.
[00:04:14.071] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:14.373] <TB0> INFO: Expecting 2560 events.
[00:04:15.257] <TB0> INFO: 2560 events read in total (293ms).
[00:04:15.257] <TB0> INFO: Test took 1187ms.
[00:04:15.261] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:15.566] <TB0> INFO: Expecting 2560 events.
[00:04:16.457] <TB0> INFO: 2560 events read in total (299ms).
[00:04:16.458] <TB0> INFO: Test took 1197ms.
[00:04:16.461] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:16.765] <TB0> INFO: Expecting 2560 events.
[00:04:17.662] <TB0> INFO: 2560 events read in total (305ms).
[00:04:17.662] <TB0> INFO: Test took 1201ms.
[00:04:17.667] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:17.970] <TB0> INFO: Expecting 2560 events.
[00:04:18.860] <TB0> INFO: 2560 events read in total (298ms).
[00:04:18.860] <TB0> INFO: Test took 1194ms.
[00:04:18.862] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:19.167] <TB0> INFO: Expecting 2560 events.
[00:04:20.059] <TB0> INFO: 2560 events read in total (300ms).
[00:04:20.060] <TB0> INFO: Test took 1198ms.
[00:04:20.064] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:20.368] <TB0> INFO: Expecting 2560 events.
[00:04:21.257] <TB0> INFO: 2560 events read in total (298ms).
[00:04:21.257] <TB0> INFO: Test took 1193ms.
[00:04:21.735] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 646 seconds
[00:04:21.735] <TB0> INFO: PH scale (per ROC): 38 38 41 32 33 37 50 37 33 34 39 48 27 39 36 48
[00:04:21.735] <TB0> INFO: PH offset (per ROC): 107 113 102 110 94 107 130 80 96 101 106 123 93 96 98 118
[00:04:21.745] <TB0> INFO: Decoding statistics:
[00:04:21.745] <TB0> INFO: General information:
[00:04:21.745] <TB0> INFO: 16bit words read: 127882
[00:04:21.745] <TB0> INFO: valid events total: 20480
[00:04:21.745] <TB0> INFO: empty events: 17979
[00:04:21.745] <TB0> INFO: valid events with pixels: 2501
[00:04:21.745] <TB0> INFO: valid pixel hits: 2501
[00:04:21.745] <TB0> INFO: Event errors: 0
[00:04:21.745] <TB0> INFO: start marker: 0
[00:04:21.745] <TB0> INFO: stop marker: 0
[00:04:21.745] <TB0> INFO: overflow: 0
[00:04:21.745] <TB0> INFO: invalid 5bit words: 0
[00:04:21.745] <TB0> INFO: invalid XOR eye diagram: 0
[00:04:21.745] <TB0> INFO: frame (failed synchr.): 0
[00:04:21.745] <TB0> INFO: idle data (no TBM trl): 0
[00:04:21.745] <TB0> INFO: no data (only TBM hdr): 0
[00:04:21.745] <TB0> INFO: TBM errors: 0
[00:04:21.745] <TB0> INFO: flawed TBM headers: 0
[00:04:21.745] <TB0> INFO: flawed TBM trailers: 0
[00:04:21.745] <TB0> INFO: event ID mismatches: 0
[00:04:21.745] <TB0> INFO: ROC errors: 0
[00:04:21.745] <TB0> INFO: missing ROC header(s): 0
[00:04:21.745] <TB0> INFO: misplaced readback start: 0
[00:04:21.745] <TB0> INFO: Pixel decoding errors: 0
[00:04:21.745] <TB0> INFO: pixel data incomplete: 0
[00:04:21.745] <TB0> INFO: pixel address: 0
[00:04:21.745] <TB0> INFO: pulse height fill bit: 0
[00:04:21.745] <TB0> INFO: buffer corruption: 0
[00:04:21.911] <TB0> INFO: ######################################################################
[00:04:21.911] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[00:04:21.911] <TB0> INFO: ######################################################################
[00:04:21.926] <TB0> INFO: scanning low vcal = 10
[00:04:22.164] <TB0> INFO: Expecting 41600 events.
[00:04:25.774] <TB0> INFO: 41600 events read in total (3019ms).
[00:04:25.774] <TB0> INFO: Test took 3848ms.
[00:04:25.776] <TB0> INFO: scanning low vcal = 20
[00:04:26.069] <TB0> INFO: Expecting 41600 events.
[00:04:29.642] <TB0> INFO: 41600 events read in total (2982ms).
[00:04:29.643] <TB0> INFO: Test took 3867ms.
[00:04:29.645] <TB0> INFO: scanning low vcal = 30
[00:04:29.937] <TB0> INFO: Expecting 41600 events.
[00:04:33.592] <TB0> INFO: 41600 events read in total (3064ms).
[00:04:33.593] <TB0> INFO: Test took 3948ms.
[00:04:33.596] <TB0> INFO: scanning low vcal = 40
[00:04:33.873] <TB0> INFO: Expecting 41600 events.
[00:04:37.831] <TB0> INFO: 41600 events read in total (3366ms).
[00:04:37.832] <TB0> INFO: Test took 4236ms.
[00:04:37.835] <TB0> INFO: scanning low vcal = 50
[00:04:38.112] <TB0> INFO: Expecting 41600 events.
[00:04:42.088] <TB0> INFO: 41600 events read in total (3384ms).
[00:04:42.089] <TB0> INFO: Test took 4254ms.
[00:04:42.092] <TB0> INFO: scanning low vcal = 60
[00:04:42.369] <TB0> INFO: Expecting 41600 events.
[00:04:46.350] <TB0> INFO: 41600 events read in total (3389ms).
[00:04:46.351] <TB0> INFO: Test took 4258ms.
[00:04:46.356] <TB0> INFO: scanning low vcal = 70
[00:04:46.632] <TB0> INFO: Expecting 41600 events.
[00:04:50.690] <TB0> INFO: 41600 events read in total (3466ms).
[00:04:50.691] <TB0> INFO: Test took 4334ms.
[00:04:50.694] <TB0> INFO: scanning low vcal = 80
[00:04:50.971] <TB0> INFO: Expecting 41600 events.
[00:04:54.954] <TB0> INFO: 41600 events read in total (3391ms).
[00:04:54.955] <TB0> INFO: Test took 4261ms.
[00:04:54.958] <TB0> INFO: scanning low vcal = 90
[00:04:55.235] <TB0> INFO: Expecting 41600 events.
[00:04:59.243] <TB0> INFO: 41600 events read in total (3417ms).
[00:04:59.244] <TB0> INFO: Test took 4286ms.
[00:04:59.248] <TB0> INFO: scanning low vcal = 100
[00:04:59.524] <TB0> INFO: Expecting 41600 events.
[00:05:03.567] <TB0> INFO: 41600 events read in total (3452ms).
[00:05:03.568] <TB0> INFO: Test took 4320ms.
[00:05:03.571] <TB0> INFO: scanning low vcal = 110
[00:05:03.848] <TB0> INFO: Expecting 41600 events.
[00:05:07.856] <TB0> INFO: 41600 events read in total (3416ms).
[00:05:07.857] <TB0> INFO: Test took 4286ms.
[00:05:07.860] <TB0> INFO: scanning low vcal = 120
[00:05:08.141] <TB0> INFO: Expecting 41600 events.
[00:05:12.103] <TB0> INFO: 41600 events read in total (3371ms).
[00:05:12.104] <TB0> INFO: Test took 4244ms.
[00:05:12.108] <TB0> INFO: scanning low vcal = 130
[00:05:12.384] <TB0> INFO: Expecting 41600 events.
[00:05:16.393] <TB0> INFO: 41600 events read in total (3417ms).
[00:05:16.394] <TB0> INFO: Test took 4286ms.
[00:05:16.397] <TB0> INFO: scanning low vcal = 140
[00:05:16.674] <TB0> INFO: Expecting 41600 events.
[00:05:20.734] <TB0> INFO: 41600 events read in total (3468ms).
[00:05:20.735] <TB0> INFO: Test took 4338ms.
[00:05:20.739] <TB0> INFO: scanning low vcal = 150
[00:05:21.015] <TB0> INFO: Expecting 41600 events.
[00:05:25.004] <TB0> INFO: 41600 events read in total (3397ms).
[00:05:25.005] <TB0> INFO: Test took 4266ms.
[00:05:25.008] <TB0> INFO: scanning low vcal = 160
[00:05:25.284] <TB0> INFO: Expecting 41600 events.
[00:05:29.252] <TB0> INFO: 41600 events read in total (3376ms).
[00:05:29.253] <TB0> INFO: Test took 4243ms.
[00:05:29.256] <TB0> INFO: scanning low vcal = 170
[00:05:29.532] <TB0> INFO: Expecting 41600 events.
[00:05:33.549] <TB0> INFO: 41600 events read in total (3425ms).
[00:05:33.549] <TB0> INFO: Test took 4293ms.
[00:05:33.554] <TB0> INFO: scanning low vcal = 180
[00:05:33.830] <TB0> INFO: Expecting 41600 events.
[00:05:37.839] <TB0> INFO: 41600 events read in total (3418ms).
[00:05:37.840] <TB0> INFO: Test took 4286ms.
[00:05:37.843] <TB0> INFO: scanning low vcal = 190
[00:05:38.120] <TB0> INFO: Expecting 41600 events.
[00:05:42.087] <TB0> INFO: 41600 events read in total (3375ms).
[00:05:42.088] <TB0> INFO: Test took 4245ms.
[00:05:42.091] <TB0> INFO: scanning low vcal = 200
[00:05:42.367] <TB0> INFO: Expecting 41600 events.
[00:05:46.360] <TB0> INFO: 41600 events read in total (3401ms).
[00:05:46.361] <TB0> INFO: Test took 4270ms.
[00:05:46.364] <TB0> INFO: scanning low vcal = 210
[00:05:46.641] <TB0> INFO: Expecting 41600 events.
[00:05:50.631] <TB0> INFO: 41600 events read in total (3398ms).
[00:05:50.632] <TB0> INFO: Test took 4267ms.
[00:05:50.636] <TB0> INFO: scanning low vcal = 220
[00:05:50.913] <TB0> INFO: Expecting 41600 events.
[00:05:54.941] <TB0> INFO: 41600 events read in total (3436ms).
[00:05:54.942] <TB0> INFO: Test took 4305ms.
[00:05:54.945] <TB0> INFO: scanning low vcal = 230
[00:05:55.228] <TB0> INFO: Expecting 41600 events.
[00:05:59.292] <TB0> INFO: 41600 events read in total (3471ms).
[00:05:59.293] <TB0> INFO: Test took 4347ms.
[00:05:59.296] <TB0> INFO: scanning low vcal = 240
[00:05:59.586] <TB0> INFO: Expecting 41600 events.
[00:06:03.621] <TB0> INFO: 41600 events read in total (3443ms).
[00:06:03.622] <TB0> INFO: Test took 4326ms.
[00:06:03.625] <TB0> INFO: scanning low vcal = 250
[00:06:03.902] <TB0> INFO: Expecting 41600 events.
[00:06:07.877] <TB0> INFO: 41600 events read in total (3383ms).
[00:06:07.878] <TB0> INFO: Test took 4253ms.
[00:06:07.882] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[00:06:08.158] <TB0> INFO: Expecting 41600 events.
[00:06:12.129] <TB0> INFO: 41600 events read in total (3379ms).
[00:06:12.131] <TB0> INFO: Test took 4248ms.
[00:06:12.135] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[00:06:12.411] <TB0> INFO: Expecting 41600 events.
[00:06:16.428] <TB0> INFO: 41600 events read in total (3425ms).
[00:06:16.429] <TB0> INFO: Test took 4294ms.
[00:06:16.432] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[00:06:16.710] <TB0> INFO: Expecting 41600 events.
[00:06:20.730] <TB0> INFO: 41600 events read in total (3428ms).
[00:06:20.731] <TB0> INFO: Test took 4299ms.
[00:06:20.734] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[00:06:21.011] <TB0> INFO: Expecting 41600 events.
[00:06:24.986] <TB0> INFO: 41600 events read in total (3383ms).
[00:06:24.987] <TB0> INFO: Test took 4252ms.
[00:06:24.990] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[00:06:25.267] <TB0> INFO: Expecting 41600 events.
[00:06:29.283] <TB0> INFO: 41600 events read in total (3424ms).
[00:06:29.285] <TB0> INFO: Test took 4295ms.
[00:06:29.772] <TB0> INFO: PixTestGainPedestal::measure() done
[00:07:04.111] <TB0> INFO: PixTestGainPedestal::fit() done
[00:07:04.111] <TB0> INFO: non-linearity mean: 0.954 0.934 0.935 0.960 0.984 0.942 0.980 0.940 0.935 0.961 0.942 0.981 1.038 0.932 0.948 0.984
[00:07:04.111] <TB0> INFO: non-linearity RMS: 0.039 0.132 0.082 0.128 0.174 0.104 0.004 0.080 0.143 0.163 0.096 0.004 0.118 0.101 0.155 0.004
[00:07:04.111] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C0.dat
[00:07:04.128] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C1.dat
[00:07:04.141] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C2.dat
[00:07:04.153] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C3.dat
[00:07:04.166] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C4.dat
[00:07:04.179] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C5.dat
[00:07:04.192] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C6.dat
[00:07:04.205] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C7.dat
[00:07:04.218] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C8.dat
[00:07:04.231] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C9.dat
[00:07:04.243] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C10.dat
[00:07:04.256] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C11.dat
[00:07:04.269] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C12.dat
[00:07:04.282] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C13.dat
[00:07:04.295] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C14.dat
[00:07:04.308] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C15.dat
[00:07:04.321] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 162 seconds
[00:07:04.321] <TB0> INFO: Decoding statistics:
[00:07:04.321] <TB0> INFO: General information:
[00:07:04.321] <TB0> INFO: 16bit words read: 3260432
[00:07:04.321] <TB0> INFO: valid events total: 332800
[00:07:04.321] <TB0> INFO: empty events: 5072
[00:07:04.321] <TB0> INFO: valid events with pixels: 327728
[00:07:04.321] <TB0> INFO: valid pixel hits: 631816
[00:07:04.321] <TB0> INFO: Event errors: 0
[00:07:04.321] <TB0> INFO: start marker: 0
[00:07:04.321] <TB0> INFO: stop marker: 0
[00:07:04.321] <TB0> INFO: overflow: 0
[00:07:04.321] <TB0> INFO: invalid 5bit words: 0
[00:07:04.321] <TB0> INFO: invalid XOR eye diagram: 0
[00:07:04.321] <TB0> INFO: frame (failed synchr.): 0
[00:07:04.321] <TB0> INFO: idle data (no TBM trl): 0
[00:07:04.321] <TB0> INFO: no data (only TBM hdr): 0
[00:07:04.321] <TB0> INFO: TBM errors: 0
[00:07:04.321] <TB0> INFO: flawed TBM headers: 0
[00:07:04.321] <TB0> INFO: flawed TBM trailers: 0
[00:07:04.321] <TB0> INFO: event ID mismatches: 0
[00:07:04.321] <TB0> INFO: ROC errors: 0
[00:07:04.321] <TB0> INFO: missing ROC header(s): 0
[00:07:04.321] <TB0> INFO: misplaced readback start: 0
[00:07:04.321] <TB0> INFO: Pixel decoding errors: 0
[00:07:04.322] <TB0> INFO: pixel data incomplete: 0
[00:07:04.322] <TB0> INFO: pixel address: 0
[00:07:04.322] <TB0> INFO: pulse height fill bit: 0
[00:07:04.322] <TB0> INFO: buffer corruption: 0
[00:07:04.338] <TB0> INFO: Decoding statistics:
[00:07:04.338] <TB0> INFO: General information:
[00:07:04.338] <TB0> INFO: 16bit words read: 3389850
[00:07:04.338] <TB0> INFO: valid events total: 353536
[00:07:04.339] <TB0> INFO: empty events: 23307
[00:07:04.339] <TB0> INFO: valid events with pixels: 330229
[00:07:04.339] <TB0> INFO: valid pixel hits: 634317
[00:07:04.339] <TB0> INFO: Event errors: 0
[00:07:04.339] <TB0> INFO: start marker: 0
[00:07:04.339] <TB0> INFO: stop marker: 0
[00:07:04.339] <TB0> INFO: overflow: 0
[00:07:04.339] <TB0> INFO: invalid 5bit words: 0
[00:07:04.339] <TB0> INFO: invalid XOR eye diagram: 0
[00:07:04.339] <TB0> INFO: frame (failed synchr.): 0
[00:07:04.339] <TB0> INFO: idle data (no TBM trl): 0
[00:07:04.339] <TB0> INFO: no data (only TBM hdr): 0
[00:07:04.339] <TB0> INFO: TBM errors: 0
[00:07:04.339] <TB0> INFO: flawed TBM headers: 0
[00:07:04.339] <TB0> INFO: flawed TBM trailers: 0
[00:07:04.339] <TB0> INFO: event ID mismatches: 0
[00:07:04.339] <TB0> INFO: ROC errors: 0
[00:07:04.339] <TB0> INFO: missing ROC header(s): 0
[00:07:04.339] <TB0> INFO: misplaced readback start: 0
[00:07:04.339] <TB0> INFO: Pixel decoding errors: 0
[00:07:04.339] <TB0> INFO: pixel data incomplete: 0
[00:07:04.339] <TB0> INFO: pixel address: 0
[00:07:04.339] <TB0> INFO: pulse height fill bit: 0
[00:07:04.339] <TB0> INFO: buffer corruption: 0
[00:07:04.339] <TB0> INFO: enter test to run
[00:07:04.339] <TB0> INFO: test: trim80 no parameter change
[00:07:04.339] <TB0> INFO: running: trim80
[00:07:04.342] <TB0> INFO: ######################################################################
[00:07:04.342] <TB0> INFO: PixTestTrim80::doTest()
[00:07:04.342] <TB0> INFO: ######################################################################
[00:07:04.343] <TB0> INFO: ----------------------------------------------------------------------
[00:07:04.343] <TB0> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[00:07:04.343] <TB0> INFO: ----------------------------------------------------------------------
[00:07:04.384] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[00:07:04.384] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[00:07:04.398] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[00:07:04.398] <TB0> INFO: run 1 of 1
[00:07:04.635] <TB0> INFO: Expecting 5025280 events.
[00:07:34.244] <TB0> INFO: 690792 events read in total (29017ms).
[00:08:01.728] <TB0> INFO: 1379608 events read in total (56501ms).
[00:08:29.638] <TB0> INFO: 2066368 events read in total (84411ms).
[00:08:57.480] <TB0> INFO: 2751640 events read in total (112253ms).
[00:09:24.395] <TB0> INFO: 3436584 events read in total (139168ms).
[00:09:51.888] <TB0> INFO: 4120496 events read in total (166661ms).
[00:10:19.292] <TB0> INFO: 4805384 events read in total (194065ms).
[00:10:28.382] <TB0> INFO: 5025280 events read in total (203155ms).
[00:10:28.480] <TB0> INFO: Test took 204082ms.
[00:10:52.832] <TB0> INFO: ROC 0 VthrComp = 73
[00:10:52.833] <TB0> INFO: ROC 1 VthrComp = 73
[00:10:52.833] <TB0> INFO: ROC 2 VthrComp = 78
[00:10:52.834] <TB0> INFO: ROC 3 VthrComp = 75
[00:10:52.834] <TB0> INFO: ROC 4 VthrComp = 79
[00:10:52.834] <TB0> INFO: ROC 5 VthrComp = 72
[00:10:52.834] <TB0> INFO: ROC 6 VthrComp = 81
[00:10:52.834] <TB0> INFO: ROC 7 VthrComp = 80
[00:10:52.834] <TB0> INFO: ROC 8 VthrComp = 80
[00:10:52.834] <TB0> INFO: ROC 9 VthrComp = 73
[00:10:52.834] <TB0> INFO: ROC 10 VthrComp = 75
[00:10:52.835] <TB0> INFO: ROC 11 VthrComp = 73
[00:10:52.835] <TB0> INFO: ROC 12 VthrComp = 75
[00:10:52.835] <TB0> INFO: ROC 13 VthrComp = 75
[00:10:52.835] <TB0> INFO: ROC 14 VthrComp = 76
[00:10:52.835] <TB0> INFO: ROC 15 VthrComp = 79
[00:10:53.119] <TB0> INFO: Expecting 41600 events.
[00:10:56.646] <TB0> INFO: 41600 events read in total (2935ms).
[00:10:56.647] <TB0> INFO: Test took 3809ms.
[00:10:56.656] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[00:10:56.656] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[00:10:56.668] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[00:10:56.668] <TB0> INFO: run 1 of 1
[00:10:56.947] <TB0> INFO: Expecting 5025280 events.
[00:11:24.877] <TB0> INFO: 687920 events read in total (27338ms).
[00:11:52.128] <TB0> INFO: 1372528 events read in total (54589ms).
[00:12:20.083] <TB0> INFO: 2055416 events read in total (82544ms).
[00:12:48.204] <TB0> INFO: 2735592 events read in total (110665ms).
[00:13:16.118] <TB0> INFO: 3413800 events read in total (138579ms).
[00:13:43.477] <TB0> INFO: 4090584 events read in total (165938ms).
[00:14:11.027] <TB0> INFO: 4769152 events read in total (193488ms).
[00:14:21.486] <TB0> INFO: 5025280 events read in total (203947ms).
[00:14:21.545] <TB0> INFO: Test took 204877ms.
[00:14:43.196] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 109.045 for pixel 51/3 mean/min/max = 93.7147/78.0794/109.35
[00:14:43.197] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 111.701 for pixel 0/2 mean/min/max = 94.5866/77.16/112.013
[00:14:43.197] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 110.984 for pixel 29/72 mean/min/max = 94.784/78.4126/111.155
[00:14:43.198] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 112.075 for pixel 11/41 mean/min/max = 95.0438/77.8657/112.222
[00:14:43.198] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 111.815 for pixel 0/25 mean/min/max = 94.5576/76.7692/112.346
[00:14:43.199] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 106.708 for pixel 13/0 mean/min/max = 91.7303/76.5368/106.924
[00:14:43.199] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 107.906 for pixel 33/79 mean/min/max = 91.6678/75.0084/108.327
[00:14:43.199] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 110.426 for pixel 6/41 mean/min/max = 93.0366/75.5118/110.561
[00:14:43.200] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 111.657 for pixel 0/57 mean/min/max = 93.3533/75.0027/111.704
[00:14:43.200] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 109.29 for pixel 51/4 mean/min/max = 92.954/76.4705/109.437
[00:14:43.201] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 112.624 for pixel 3/72 mean/min/max = 95.2152/77.2413/113.189
[00:14:43.201] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 112.682 for pixel 0/17 mean/min/max = 94.5928/76.3502/112.835
[00:14:43.202] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 110.124 for pixel 5/79 mean/min/max = 93.5389/76.7148/110.363
[00:14:43.202] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 109.571 for pixel 0/53 mean/min/max = 93.6347/77.525/109.744
[00:14:43.203] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 111.697 for pixel 0/1 mean/min/max = 94.8792/77.9492/111.809
[00:14:43.203] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 109.661 for pixel 51/77 mean/min/max = 93.8071/77.6156/109.999
[00:14:43.204] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:14:43.293] <TB0> INFO: Expecting 411648 events.
[00:14:52.771] <TB0> INFO: 411648 events read in total (8886ms).
[00:14:52.781] <TB0> INFO: Expecting 411648 events.
[00:15:02.053] <TB0> INFO: 411648 events read in total (8869ms).
[00:15:02.065] <TB0> INFO: Expecting 411648 events.
[00:15:11.278] <TB0> INFO: 411648 events read in total (8810ms).
[00:15:11.291] <TB0> INFO: Expecting 411648 events.
[00:15:20.524] <TB0> INFO: 411648 events read in total (8830ms).
[00:15:20.543] <TB0> INFO: Expecting 411648 events.
[00:15:29.789] <TB0> INFO: 411648 events read in total (8843ms).
[00:15:29.811] <TB0> INFO: Expecting 411648 events.
[00:15:38.990] <TB0> INFO: 411648 events read in total (8776ms).
[00:15:39.018] <TB0> INFO: Expecting 411648 events.
[00:15:48.314] <TB0> INFO: 411648 events read in total (8893ms).
[00:15:48.341] <TB0> INFO: Expecting 411648 events.
[00:15:57.599] <TB0> INFO: 411648 events read in total (8856ms).
[00:15:57.627] <TB0> INFO: Expecting 411648 events.
[00:16:06.876] <TB0> INFO: 411648 events read in total (8846ms).
[00:16:06.911] <TB0> INFO: Expecting 411648 events.
[00:16:16.214] <TB0> INFO: 411648 events read in total (8899ms).
[00:16:16.283] <TB0> INFO: Expecting 411648 events.
[00:16:25.508] <TB0> INFO: 411648 events read in total (8822ms).
[00:16:25.546] <TB0> INFO: Expecting 411648 events.
[00:16:34.842] <TB0> INFO: 411648 events read in total (8893ms).
[00:16:34.890] <TB0> INFO: Expecting 411648 events.
[00:16:44.114] <TB0> INFO: 411648 events read in total (8821ms).
[00:16:44.169] <TB0> INFO: Expecting 411648 events.
[00:16:53.336] <TB0> INFO: 411648 events read in total (8764ms).
[00:16:53.396] <TB0> INFO: Expecting 411648 events.
[00:17:02.543] <TB0> INFO: 411648 events read in total (8744ms).
[00:17:02.594] <TB0> INFO: Expecting 411648 events.
[00:17:12.034] <TB0> INFO: 411648 events read in total (9037ms).
[00:17:12.097] <TB0> INFO: Test took 148893ms.
[00:17:13.510] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[00:17:13.523] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[00:17:13.523] <TB0> INFO: run 1 of 1
[00:17:13.771] <TB0> INFO: Expecting 5025280 events.
[00:17:41.220] <TB0> INFO: 668400 events read in total (26857ms).
[00:18:07.700] <TB0> INFO: 1334776 events read in total (53337ms).
[00:18:35.055] <TB0> INFO: 2000240 events read in total (80692ms).
[00:19:02.529] <TB0> INFO: 2663688 events read in total (108166ms).
[00:19:29.906] <TB0> INFO: 3324808 events read in total (135543ms).
[00:19:56.807] <TB0> INFO: 3983984 events read in total (162444ms).
[00:20:24.029] <TB0> INFO: 4641744 events read in total (189666ms).
[00:20:40.127] <TB0> INFO: 5025280 events read in total (205764ms).
[00:20:40.195] <TB0> INFO: Test took 206672ms.
[00:21:05.158] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 52.441661 .. 97.383843
[00:21:05.400] <TB0> INFO: Expecting 208000 events.
[00:21:15.400] <TB0> INFO: 208000 events read in total (9408ms).
[00:21:15.401] <TB0> INFO: Test took 10242ms.
[00:21:15.452] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 42 .. 107 (-1/-1) hits flags = 528 (plus default)
[00:21:15.466] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[00:21:15.466] <TB0> INFO: run 1 of 1
[00:21:15.744] <TB0> INFO: Expecting 2196480 events.
[00:21:44.154] <TB0> INFO: 702424 events read in total (27819ms).
[00:22:13.322] <TB0> INFO: 1401800 events read in total (56988ms).
[00:22:41.649] <TB0> INFO: 2099264 events read in total (85314ms).
[00:22:46.009] <TB0> INFO: 2196480 events read in total (89674ms).
[00:22:46.052] <TB0> INFO: Test took 90587ms.
[00:23:03.556] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 62.856113 .. 88.767896
[00:23:03.795] <TB0> INFO: Expecting 208000 events.
[00:23:13.633] <TB0> INFO: 208000 events read in total (9246ms).
[00:23:13.634] <TB0> INFO: Test took 10076ms.
[00:23:13.682] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 52 .. 98 (-1/-1) hits flags = 528 (plus default)
[00:23:13.696] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[00:23:13.696] <TB0> INFO: run 1 of 1
[00:23:13.977] <TB0> INFO: Expecting 1564160 events.
[00:23:43.624] <TB0> INFO: 707360 events read in total (29055ms).
[00:24:12.529] <TB0> INFO: 1412376 events read in total (57960ms).
[00:24:18.924] <TB0> INFO: 1564160 events read in total (64356ms).
[00:24:18.962] <TB0> INFO: Test took 65266ms.
[00:24:37.077] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 68.155046 .. 84.052709
[00:24:37.315] <TB0> INFO: Expecting 208000 events.
[00:24:47.058] <TB0> INFO: 208000 events read in total (9151ms).
[00:24:47.059] <TB0> INFO: Test took 9980ms.
[00:24:47.107] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 58 .. 94 (-1/-1) hits flags = 528 (plus default)
[00:24:47.120] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[00:24:47.120] <TB0> INFO: run 1 of 1
[00:24:47.441] <TB0> INFO: Expecting 1231360 events.
[00:25:16.710] <TB0> INFO: 708488 events read in total (28677ms).
[00:25:38.077] <TB0> INFO: 1231360 events read in total (50044ms).
[00:25:38.111] <TB0> INFO: Test took 50991ms.
[00:25:53.514] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 70.674198 .. 83.646553
[00:25:53.751] <TB0> INFO: Expecting 208000 events.
[00:26:03.520] <TB0> INFO: 208000 events read in total (9177ms).
[00:26:03.521] <TB0> INFO: Test took 10006ms.
[00:26:03.569] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 60 .. 93 (-1/-1) hits flags = 528 (plus default)
[00:26:03.582] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[00:26:03.582] <TB0> INFO: run 1 of 1
[00:26:03.860] <TB0> INFO: Expecting 1131520 events.
[00:26:32.681] <TB0> INFO: 708008 events read in total (28229ms).
[00:26:49.885] <TB0> INFO: 1131520 events read in total (45434ms).
[00:26:49.922] <TB0> INFO: Test took 46341ms.
[00:27:06.912] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[00:27:06.912] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[00:27:06.925] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[00:27:06.925] <TB0> INFO: run 1 of 1
[00:27:07.165] <TB0> INFO: Expecting 1364480 events.
[00:27:35.543] <TB0> INFO: 668176 events read in total (27787ms).
[00:28:03.390] <TB0> INFO: 1336632 events read in total (55634ms).
[00:28:04.970] <TB0> INFO: 1364480 events read in total (57214ms).
[00:28:04.998] <TB0> INFO: Test took 58072ms.
[00:28:25.102] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C0.dat
[00:28:25.102] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C1.dat
[00:28:25.102] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C2.dat
[00:28:25.103] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C3.dat
[00:28:25.103] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C4.dat
[00:28:25.103] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C5.dat
[00:28:25.103] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C6.dat
[00:28:25.103] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C7.dat
[00:28:25.103] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C8.dat
[00:28:25.103] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C9.dat
[00:28:25.103] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C10.dat
[00:28:25.103] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C11.dat
[00:28:25.103] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C12.dat
[00:28:25.103] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C13.dat
[00:28:25.103] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C14.dat
[00:28:25.104] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C15.dat
[00:28:25.104] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C0.dat
[00:28:25.110] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C1.dat
[00:28:25.115] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C2.dat
[00:28:25.119] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C3.dat
[00:28:25.124] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C4.dat
[00:28:25.129] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C5.dat
[00:28:25.134] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C6.dat
[00:28:25.138] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C7.dat
[00:28:25.143] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C8.dat
[00:28:25.148] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C9.dat
[00:28:25.153] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C10.dat
[00:28:25.158] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C11.dat
[00:28:25.163] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C12.dat
[00:28:25.168] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C13.dat
[00:28:25.173] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C14.dat
[00:28:25.177] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1048_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C15.dat
[00:28:25.182] <TB0> INFO: PixTestTrim80::trimTest() done
[00:28:25.182] <TB0> INFO: vtrim: 91 107 109 113 100 97 98 106 107 89 115 107 101 97 108 99
[00:28:25.182] <TB0> INFO: vthrcomp: 73 73 78 75 79 72 81 80 80 73 75 73 75 75 76 79
[00:28:25.182] <TB0> INFO: vcal mean: 79.96 79.93 79.98 79.91 79.97 79.95 79.94 79.97 79.98 79.96 79.95 79.94 79.96 79.95 79.96 79.96
[00:28:25.182] <TB0> INFO: vcal RMS: 0.72 0.75 0.81 0.79 0.81 0.72 0.76 0.84 0.81 0.72 0.78 0.76 0.72 0.76 0.72 0.71
[00:28:25.182] <TB0> INFO: bits mean: 9.07 9.19 9.22 9.36 9.52 10.00 10.07 9.67 9.58 9.38 9.57 9.61 9.69 9.49 9.16 8.92
[00:28:25.182] <TB0> INFO: bits RMS: 2.36 2.39 2.25 2.25 2.30 2.24 2.35 2.46 2.55 2.45 2.20 2.28 2.23 2.23 2.28 2.44
[00:28:25.190] <TB0> INFO: ----------------------------------------------------------------------
[00:28:25.190] <TB0> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[00:28:25.190] <TB0> INFO: ----------------------------------------------------------------------
[00:28:25.194] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[00:28:25.206] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[00:28:25.206] <TB0> INFO: run 1 of 1
[00:28:25.445] <TB0> INFO: Expecting 4160000 events.
[00:28:58.963] <TB0> INFO: 785155 events read in total (32926ms).
[00:29:31.381] <TB0> INFO: 1562870 events read in total (65344ms).
[00:30:04.417] <TB0> INFO: 2335525 events read in total (98381ms).
[00:30:37.074] <TB0> INFO: 3102810 events read in total (131037ms).
[00:31:09.574] <TB0> INFO: 3869095 events read in total (163537ms).
[00:31:21.934] <TB0> INFO: 4160000 events read in total (175897ms).
[00:31:22.059] <TB0> INFO: Test took 176852ms.
[00:31:48.406] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 207 (-1/-1) hits flags = 528 (plus default)
[00:31:48.420] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[00:31:48.420] <TB0> INFO: run 1 of 1
[00:31:48.656] <TB0> INFO: Expecting 4326400 events.
[00:32:20.803] <TB0> INFO: 744465 events read in total (31556ms).
[00:32:52.512] <TB0> INFO: 1483625 events read in total (63265ms).
[00:33:24.013] <TB0> INFO: 2220150 events read in total (94766ms).
[00:33:55.859] <TB0> INFO: 2951740 events read in total (126612ms).
[00:34:28.042] <TB0> INFO: 3682410 events read in total (158795ms).
[00:34:55.901] <TB0> INFO: 4326400 events read in total (186654ms).
[00:34:56.015] <TB0> INFO: Test took 187595ms.
[00:35:23.717] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[00:35:23.731] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[00:35:23.731] <TB0> INFO: run 1 of 1
[00:35:24.014] <TB0> INFO: Expecting 4264000 events.
[00:35:56.054] <TB0> INFO: 749270 events read in total (31448ms).
[00:36:27.820] <TB0> INFO: 1493410 events read in total (63214ms).
[00:36:59.784] <TB0> INFO: 2234310 events read in total (95178ms).
[00:37:31.763] <TB0> INFO: 2970180 events read in total (127157ms).
[00:38:03.057] <TB0> INFO: 3705215 events read in total (158451ms).
[00:38:27.789] <TB0> INFO: 4264000 events read in total (183183ms).
[00:38:27.869] <TB0> INFO: Test took 184138ms.
[00:38:53.087] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 201 (-1/-1) hits flags = 528 (plus default)
[00:38:53.100] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[00:38:53.100] <TB0> INFO: run 1 of 1
[00:38:53.336] <TB0> INFO: Expecting 4201600 events.
[00:39:26.295] <TB0> INFO: 754030 events read in total (32367ms).
[00:39:58.374] <TB0> INFO: 1502580 events read in total (64446ms).
[00:40:30.271] <TB0> INFO: 2247455 events read in total (96344ms).
[00:41:02.110] <TB0> INFO: 2987615 events read in total (128182ms).
[00:41:34.384] <TB0> INFO: 3727565 events read in total (160456ms).
[00:41:54.877] <TB0> INFO: 4201600 events read in total (180949ms).
[00:41:54.958] <TB0> INFO: Test took 181858ms.
[00:42:21.609] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[00:42:21.622] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[00:42:21.622] <TB0> INFO: run 1 of 1
[00:42:21.875] <TB0> INFO: Expecting 4264000 events.
[00:42:54.302] <TB0> INFO: 749710 events read in total (31835ms).
[00:43:26.136] <TB0> INFO: 1494225 events read in total (63669ms).
[00:43:58.796] <TB0> INFO: 2235180 events read in total (96329ms).
[00:44:31.223] <TB0> INFO: 2971230 events read in total (128756ms).
[00:45:02.902] <TB0> INFO: 3706590 events read in total (160435ms).
[00:45:27.821] <TB0> INFO: 4264000 events read in total (185354ms).
[00:45:27.903] <TB0> INFO: Test took 186281ms.
[00:45:54.478] <TB0> INFO: PixTestTrim80::trimBitTest() done
[00:45:54.480] <TB0> INFO: PixTestTrim80::doTest() done, duration: 2330 seconds
[00:45:55.256] <TB0> INFO: enter test to run
[00:45:55.256] <TB0> INFO: test: exit no parameter change
[00:45:55.456] <TB0> QUIET: Connection to board 71 closed.
[00:45:55.460] <TB0> INFO: pXar: this is the end, my friend