[11:32:42.294] <TB0> INFO: *** Welcome to pxar ***
[11:32:42.294] <TB0> INFO: *** Today: 2016/10/22
[11:32:42.299] <TB0> INFO: *** Version: c8ba-dirty
[11:32:42.299] <TB0> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters_C15.dat
[11:32:42.300] <TB0> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//tbmParameters_C1b.dat
[11:32:42.300] <TB0> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//defaultMaskFile.dat
[11:32:42.300] <TB0> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//trimParameters_C15.dat
[11:32:42.359] <TB0> INFO: clk: 4
[11:32:42.359] <TB0> INFO: ctr: 4
[11:32:42.359] <TB0> INFO: sda: 19
[11:32:42.359] <TB0> INFO: tin: 9
[11:32:42.359] <TB0> INFO: level: 15
[11:32:42.359] <TB0> INFO: triggerdelay: 0
[11:32:42.359] <TB0> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[11:32:42.359] <TB0> INFO: Log level: INFO
[11:32:42.368] <TB0> INFO: Found DTB DTB_WRQ4OZ
[11:32:42.378] <TB0> QUIET: Connection to board DTB_WRQ4OZ opened.
[11:32:42.380] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 71
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WRQ4OZ
MAC address: 40D855118047
Hostname: pixelDTB071
Comment:
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[11:32:42.381] <TB0> INFO: RPC call hashes of host and DTB match: 486171790
[11:32:43.870] <TB0> INFO: DUT info:
[11:32:43.870] <TB0> INFO: The DUT currently contains the following objects:
[11:32:43.870] <TB0> INFO: 4 TBM Cores tbm10c (4 ON)
[11:32:43.870] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:32:43.870] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:32:43.870] <TB0> INFO: TBM Core alpha (2): 7 registers set
[11:32:43.870] <TB0> INFO: TBM Core beta (3): 7 registers set
[11:32:43.870] <TB0> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[11:32:43.870] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:32:43.870] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:32:43.870] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:32:43.870] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:32:43.870] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:32:43.870] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:32:43.870] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:32:43.870] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:32:43.870] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:32:43.870] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:32:43.870] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:32:43.870] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:32:43.870] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:32:43.870] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:32:43.870] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:32:43.870] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:32:44.271] <TB0> INFO: enter 'restricted' command line mode
[11:32:44.271] <TB0> INFO: enter test to run
[11:32:44.271] <TB0> INFO: test: pretest no parameter change
[11:32:44.271] <TB0> INFO: running: pretest
[11:32:44.276] <TB0> INFO: ######################################################################
[11:32:44.276] <TB0> INFO: PixTestPretest::doTest()
[11:32:44.276] <TB0> INFO: ######################################################################
[11:32:44.277] <TB0> INFO: ----------------------------------------------------------------------
[11:32:44.277] <TB0> INFO: PixTestPretest::programROC()
[11:32:44.277] <TB0> INFO: ----------------------------------------------------------------------
[11:33:02.291] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:33:02.291] <TB0> INFO: IA differences per ROC: 20.9 20.1 22.5 20.1 20.1 20.1 22.5 18.5 21.7 20.9 20.9 17.7 20.1 19.3 19.3 18.5
[11:33:02.346] <TB0> INFO: ----------------------------------------------------------------------
[11:33:02.346] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:33:02.346] <TB0> INFO: ----------------------------------------------------------------------
[11:33:08.323] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 393.1 mA = 24.5688 mA/ROC
[11:33:08.323] <TB0> INFO: i(loss) [mA/ROC]: 19.3 19.3 20.1 19.3 19.3 19.3 19.3 18.5 19.3 19.3 18.5 19.3 19.3 19.3 19.3 19.3
[11:33:08.352] <TB0> INFO: ----------------------------------------------------------------------
[11:33:08.352] <TB0> INFO: PixTestPretest::findTiming()
[11:33:08.352] <TB0> INFO: ----------------------------------------------------------------------
[11:33:08.352] <TB0> INFO: PixTestCmd::init()

[11:33:40.759] <TB0> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[11:33:40.759] <TB0> INFO: (success/tries = 100/100), width = 3
[11:33:42.275] <TB0> INFO: ----------------------------------------------------------------------
[11:33:42.275] <TB0> INFO: PixTestPretest::findWorkingPixel()
[11:33:42.275] <TB0> INFO: ----------------------------------------------------------------------
[11:33:42.371] <TB0> INFO: Expecting 231680 events.
[11:33:52.459] <TB0> INFO: 231680 events read in total (9497ms).
[11:33:52.467] <TB0> INFO: Test took 10187ms.
[11:33:52.719] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:33:52.754] <TB0> INFO: ----------------------------------------------------------------------
[11:33:52.754] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[11:33:52.754] <TB0> INFO: ----------------------------------------------------------------------
[11:33:52.849] <TB0> INFO: Expecting 231680 events.
[11:34:02.799] <TB0> INFO: 231680 events read in total (9358ms).
[11:34:02.808] <TB0> INFO: Test took 10048ms.
[11:34:03.075] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[11:34:03.075] <TB0> INFO: CalDel: 93 97 117 97 112 111 94 95 98 97 104 101 82 109 96 108
[11:34:03.076] <TB0> INFO: VthrComp: 52 53 52 51 51 51 51 51 52 51 51 57 51 51 51 51
[11:34:03.079] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters_C0.dat
[11:34:03.079] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters_C1.dat
[11:34:03.079] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters_C2.dat
[11:34:03.079] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters_C3.dat
[11:34:03.080] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters_C4.dat
[11:34:03.080] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters_C5.dat
[11:34:03.080] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters_C6.dat
[11:34:03.080] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters_C7.dat
[11:34:03.080] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters_C8.dat
[11:34:03.080] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters_C9.dat
[11:34:03.080] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters_C10.dat
[11:34:03.081] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters_C11.dat
[11:34:03.081] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters_C12.dat
[11:34:03.081] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters_C13.dat
[11:34:03.081] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters_C14.dat
[11:34:03.081] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters_C15.dat
[11:34:03.081] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//tbmParameters_C0a.dat
[11:34:03.081] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//tbmParameters_C0b.dat
[11:34:03.081] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//tbmParameters_C1a.dat
[11:34:03.082] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//tbmParameters_C1b.dat
[11:34:03.082] <TB0> INFO: PixTestPretest::doTest() done, duration: 78 seconds
[11:34:03.136] <TB0> INFO: enter test to run
[11:34:03.136] <TB0> INFO: test: FullTest no parameter change
[11:34:03.136] <TB0> INFO: running: fulltest
[11:34:03.136] <TB0> INFO: ######################################################################
[11:34:03.136] <TB0> INFO: PixTestFullTest::doTest()
[11:34:03.136] <TB0> INFO: ######################################################################
[11:34:03.137] <TB0> INFO: ######################################################################
[11:34:03.137] <TB0> INFO: PixTestAlive::doTest()
[11:34:03.137] <TB0> INFO: ######################################################################
[11:34:03.138] <TB0> INFO: ----------------------------------------------------------------------
[11:34:03.138] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:34:03.138] <TB0> INFO: ----------------------------------------------------------------------
[11:34:03.422] <TB0> INFO: Expecting 41600 events.
[11:34:06.960] <TB0> INFO: 41600 events read in total (2946ms).
[11:34:06.960] <TB0> INFO: Test took 3820ms.
[11:34:07.193] <TB0> INFO: PixTestAlive::aliveTest() done
[11:34:07.193] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:34:07.194] <TB0> INFO: ----------------------------------------------------------------------
[11:34:07.194] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:34:07.194] <TB0> INFO: ----------------------------------------------------------------------
[11:34:07.437] <TB0> INFO: Expecting 41600 events.
[11:34:10.433] <TB0> INFO: 41600 events read in total (2404ms).
[11:34:10.434] <TB0> INFO: Test took 3238ms.
[11:34:10.434] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:34:10.676] <TB0> INFO: PixTestAlive::maskTest() done
[11:34:10.676] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:34:10.678] <TB0> INFO: ----------------------------------------------------------------------
[11:34:10.678] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:34:10.678] <TB0> INFO: ----------------------------------------------------------------------
[11:34:10.919] <TB0> INFO: Expecting 41600 events.
[11:34:14.590] <TB0> INFO: 41600 events read in total (3079ms).
[11:34:14.591] <TB0> INFO: Test took 3911ms.
[11:34:14.830] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[11:34:14.830] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:34:14.830] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[11:34:14.830] <TB0> INFO: Decoding statistics:
[11:34:14.830] <TB0> INFO: General information:
[11:34:14.830] <TB0> INFO: 16bit words read: 0
[11:34:14.830] <TB0> INFO: valid events total: 0
[11:34:14.830] <TB0> INFO: empty events: 0
[11:34:14.830] <TB0> INFO: valid events with pixels: 0
[11:34:14.830] <TB0> INFO: valid pixel hits: 0
[11:34:14.830] <TB0> INFO: Event errors: 0
[11:34:14.830] <TB0> INFO: start marker: 0
[11:34:14.830] <TB0> INFO: stop marker: 0
[11:34:14.830] <TB0> INFO: overflow: 0
[11:34:14.830] <TB0> INFO: invalid 5bit words: 0
[11:34:14.830] <TB0> INFO: invalid XOR eye diagram: 0
[11:34:14.831] <TB0> INFO: frame (failed synchr.): 0
[11:34:14.831] <TB0> INFO: idle data (no TBM trl): 0
[11:34:14.831] <TB0> INFO: no data (only TBM hdr): 0
[11:34:14.831] <TB0> INFO: TBM errors: 0
[11:34:14.831] <TB0> INFO: flawed TBM headers: 0
[11:34:14.831] <TB0> INFO: flawed TBM trailers: 0
[11:34:14.831] <TB0> INFO: event ID mismatches: 0
[11:34:14.831] <TB0> INFO: ROC errors: 0
[11:34:14.831] <TB0> INFO: missing ROC header(s): 0
[11:34:14.831] <TB0> INFO: misplaced readback start: 0
[11:34:14.831] <TB0> INFO: Pixel decoding errors: 0
[11:34:14.831] <TB0> INFO: pixel data incomplete: 0
[11:34:14.831] <TB0> INFO: pixel address: 0
[11:34:14.831] <TB0> INFO: pulse height fill bit: 0
[11:34:14.831] <TB0> INFO: buffer corruption: 0
[11:34:14.839] <TB0> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C15.dat
[11:34:14.840] <TB0> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[11:34:14.840] <TB0> INFO: ######################################################################
[11:34:14.840] <TB0> INFO: PixTestReadback::doTest()
[11:34:14.840] <TB0> INFO: ######################################################################
[11:34:14.840] <TB0> INFO: ----------------------------------------------------------------------
[11:34:14.840] <TB0> INFO: PixTestReadback::CalibrateVd()
[11:34:14.840] <TB0> INFO: ----------------------------------------------------------------------
[11:34:24.810] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C0.dat
[11:34:24.810] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C1.dat
[11:34:24.810] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C2.dat
[11:34:24.810] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C3.dat
[11:34:24.811] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C4.dat
[11:34:24.811] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C5.dat
[11:34:24.811] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C6.dat
[11:34:24.811] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C7.dat
[11:34:24.811] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C8.dat
[11:34:24.811] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C9.dat
[11:34:24.811] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C10.dat
[11:34:24.811] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C11.dat
[11:34:24.811] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C12.dat
[11:34:24.811] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C13.dat
[11:34:24.811] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C14.dat
[11:34:24.811] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C15.dat
[11:34:24.843] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:34:24.843] <TB0> INFO: ----------------------------------------------------------------------
[11:34:24.843] <TB0> INFO: PixTestReadback::CalibrateVa()
[11:34:24.843] <TB0> INFO: ----------------------------------------------------------------------
[11:34:34.762] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C0.dat
[11:34:34.762] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C1.dat
[11:34:34.762] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C2.dat
[11:34:34.762] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C3.dat
[11:34:34.762] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C4.dat
[11:34:34.763] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C5.dat
[11:34:34.763] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C6.dat
[11:34:34.763] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C7.dat
[11:34:34.763] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C8.dat
[11:34:34.763] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C9.dat
[11:34:34.763] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C10.dat
[11:34:34.763] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C11.dat
[11:34:34.763] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C12.dat
[11:34:34.763] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C13.dat
[11:34:34.763] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C14.dat
[11:34:34.763] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C15.dat
[11:34:34.791] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:34:34.791] <TB0> INFO: ----------------------------------------------------------------------
[11:34:34.791] <TB0> INFO: PixTestReadback::readbackVbg()
[11:34:34.791] <TB0> INFO: ----------------------------------------------------------------------
[11:34:42.459] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:34:42.459] <TB0> INFO: ----------------------------------------------------------------------
[11:34:42.459] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[11:34:42.459] <TB0> INFO: ----------------------------------------------------------------------
[11:34:42.459] <TB0> INFO: Vbg will be calibrated using Vd calibration
[11:34:42.459] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 160.3calibrated Vbg = 1.1708 :::*/*/*/*/
[11:34:42.459] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 155.9calibrated Vbg = 1.17303 :::*/*/*/*/
[11:34:42.459] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 159.3calibrated Vbg = 1.17155 :::*/*/*/*/
[11:34:42.459] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 157.9calibrated Vbg = 1.17106 :::*/*/*/*/
[11:34:42.459] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 151.8calibrated Vbg = 1.17001 :::*/*/*/*/
[11:34:42.459] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 154.9calibrated Vbg = 1.17493 :::*/*/*/*/
[11:34:42.459] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 147.1calibrated Vbg = 1.18008 :::*/*/*/*/
[11:34:42.459] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 156.9calibrated Vbg = 1.17207 :::*/*/*/*/
[11:34:42.459] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 156.8calibrated Vbg = 1.16826 :::*/*/*/*/
[11:34:42.459] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 153.5calibrated Vbg = 1.16068 :::*/*/*/*/
[11:34:42.459] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150.4calibrated Vbg = 1.15836 :::*/*/*/*/
[11:34:42.459] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 159.3calibrated Vbg = 1.15454 :::*/*/*/*/
[11:34:42.459] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 154.1calibrated Vbg = 1.16012 :::*/*/*/*/
[11:34:42.459] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 153.8calibrated Vbg = 1.17243 :::*/*/*/*/
[11:34:42.459] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 152.9calibrated Vbg = 1.16879 :::*/*/*/*/
[11:34:42.459] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 163.5calibrated Vbg = 1.17053 :::*/*/*/*/
[11:34:42.462] <TB0> INFO: ----------------------------------------------------------------------
[11:34:42.462] <TB0> INFO: PixTestReadback::CalibrateIa()
[11:34:42.462] <TB0> INFO: ----------------------------------------------------------------------
[11:37:23.285] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C0.dat
[11:37:23.285] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C1.dat
[11:37:23.285] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C2.dat
[11:37:23.285] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C3.dat
[11:37:23.285] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C4.dat
[11:37:23.285] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C5.dat
[11:37:23.285] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C6.dat
[11:37:23.286] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C7.dat
[11:37:23.286] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C8.dat
[11:37:23.286] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C9.dat
[11:37:23.286] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C10.dat
[11:37:23.286] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C11.dat
[11:37:23.286] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C12.dat
[11:37:23.286] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C13.dat
[11:37:23.286] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C14.dat
[11:37:23.286] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//readbackCal_C15.dat
[11:37:23.318] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:37:23.320] <TB0> INFO: PixTestReadback::doTest() done
[11:37:23.321] <TB0> INFO: Decoding statistics:
[11:37:23.321] <TB0> INFO: General information:
[11:37:23.321] <TB0> INFO: 16bit words read: 1536
[11:37:23.321] <TB0> INFO: valid events total: 256
[11:37:23.321] <TB0> INFO: empty events: 256
[11:37:23.321] <TB0> INFO: valid events with pixels: 0
[11:37:23.321] <TB0> INFO: valid pixel hits: 0
[11:37:23.321] <TB0> INFO: Event errors: 0
[11:37:23.321] <TB0> INFO: start marker: 0
[11:37:23.321] <TB0> INFO: stop marker: 0
[11:37:23.321] <TB0> INFO: overflow: 0
[11:37:23.321] <TB0> INFO: invalid 5bit words: 0
[11:37:23.321] <TB0> INFO: invalid XOR eye diagram: 0
[11:37:23.321] <TB0> INFO: frame (failed synchr.): 0
[11:37:23.321] <TB0> INFO: idle data (no TBM trl): 0
[11:37:23.321] <TB0> INFO: no data (only TBM hdr): 0
[11:37:23.321] <TB0> INFO: TBM errors: 0
[11:37:23.321] <TB0> INFO: flawed TBM headers: 0
[11:37:23.321] <TB0> INFO: flawed TBM trailers: 0
[11:37:23.321] <TB0> INFO: event ID mismatches: 0
[11:37:23.321] <TB0> INFO: ROC errors: 0
[11:37:23.321] <TB0> INFO: missing ROC header(s): 0
[11:37:23.321] <TB0> INFO: misplaced readback start: 0
[11:37:23.321] <TB0> INFO: Pixel decoding errors: 0
[11:37:23.321] <TB0> INFO: pixel data incomplete: 0
[11:37:23.321] <TB0> INFO: pixel address: 0
[11:37:23.321] <TB0> INFO: pulse height fill bit: 0
[11:37:23.321] <TB0> INFO: buffer corruption: 0
[11:37:23.372] <TB0> INFO: ######################################################################
[11:37:23.372] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:37:23.372] <TB0> INFO: ######################################################################
[11:37:23.376] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[11:37:23.389] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:37:23.389] <TB0> INFO: run 1 of 1
[11:37:23.627] <TB0> INFO: Expecting 3120000 events.
[11:37:55.896] <TB0> INFO: 655730 events read in total (31677ms).











[11:38:26.465] <TB0> INFO: 1309650 events read in total (62246ms).











[11:38:57.198] <TB0> INFO: 1960735 events read in total (92979ms).











[11:39:27.815] <TB0> INFO: 2609905 events read in total (123596ms).











[11:39:51.961] <TB0> INFO: 3120000 events read in total (147742ms).
[11:39:52.024] <TB0> INFO: Test took 148636ms.
[11:40:17.914] <TB0> INFO: PixTestBBMap::doTest() done with 1 decoding errors: , duration: 174 seconds
[11:40:17.914] <TB0> INFO: number of dead bumps (per ROC): 0 0 0 0 2 1 0 0 0 0 0 2 0 2 0 0
[11:40:17.914] <TB0> INFO: separation cut (per ROC): 112 114 101 99 107 106 105 104 111 110 109 123 94 94 106 102
[11:40:17.914] <TB0> INFO: Decoding statistics:
[11:40:17.914] <TB0> INFO: General information:
[11:40:17.914] <TB0> INFO: 16bit words read: 0
[11:40:17.915] <TB0> INFO: valid events total: 0
[11:40:17.915] <TB0> INFO: empty events: 0
[11:40:17.915] <TB0> INFO: valid events with pixels: 0
[11:40:17.915] <TB0> INFO: valid pixel hits: 0
[11:40:17.915] <TB0> INFO: Event errors: 0
[11:40:17.915] <TB0> INFO: start marker: 0
[11:40:17.915] <TB0> INFO: stop marker: 0
[11:40:17.915] <TB0> INFO: overflow: 0
[11:40:17.915] <TB0> INFO: invalid 5bit words: 0
[11:40:17.915] <TB0> INFO: invalid XOR eye diagram: 0
[11:40:17.915] <TB0> INFO: frame (failed synchr.): 0
[11:40:17.915] <TB0> INFO: idle data (no TBM trl): 0
[11:40:17.915] <TB0> INFO: no data (only TBM hdr): 0
[11:40:17.915] <TB0> INFO: TBM errors: 0
[11:40:17.915] <TB0> INFO: flawed TBM headers: 0
[11:40:17.915] <TB0> INFO: flawed TBM trailers: 0
[11:40:17.915] <TB0> INFO: event ID mismatches: 0
[11:40:17.915] <TB0> INFO: ROC errors: 0
[11:40:17.915] <TB0> INFO: missing ROC header(s): 0
[11:40:17.915] <TB0> INFO: misplaced readback start: 0
[11:40:17.915] <TB0> INFO: Pixel decoding errors: 0
[11:40:17.915] <TB0> INFO: pixel data incomplete: 0
[11:40:17.915] <TB0> INFO: pixel address: 0
[11:40:17.915] <TB0> INFO: pulse height fill bit: 0
[11:40:17.915] <TB0> INFO: buffer corruption: 0
[11:40:17.952] <TB0> INFO: ######################################################################
[11:40:17.952] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:40:17.952] <TB0> INFO: ######################################################################
[11:40:17.952] <TB0> INFO: ----------------------------------------------------------------------
[11:40:17.952] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:40:17.952] <TB0> INFO: ----------------------------------------------------------------------
[11:40:17.952] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[11:40:17.966] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[11:40:17.966] <TB0> INFO: run 1 of 1
[11:40:18.227] <TB0> INFO: Expecting 36608000 events.
[11:40:42.430] <TB0> INFO: 674750 events read in total (23611ms).
[11:41:05.820] <TB0> INFO: 1336850 events read in total (47001ms).
[11:41:29.315] <TB0> INFO: 1997750 events read in total (70496ms).
[11:41:52.747] <TB0> INFO: 2660950 events read in total (93928ms).
[11:42:15.835] <TB0> INFO: 3322600 events read in total (117016ms).
[11:42:39.182] <TB0> INFO: 3983300 events read in total (140363ms).
[11:43:02.507] <TB0> INFO: 4642050 events read in total (163688ms).
[11:43:25.950] <TB0> INFO: 5300200 events read in total (187131ms).
[11:43:49.145] <TB0> INFO: 5959000 events read in total (210326ms).
[11:44:12.278] <TB0> INFO: 6617900 events read in total (233459ms).
[11:44:35.528] <TB0> INFO: 7275900 events read in total (256709ms).
[11:44:58.909] <TB0> INFO: 7934200 events read in total (280090ms).
[11:45:22.161] <TB0> INFO: 8592900 events read in total (303342ms).
[11:45:45.521] <TB0> INFO: 9253550 events read in total (326702ms).
[11:46:09.448] <TB0> INFO: 9912950 events read in total (350629ms).
[11:46:32.674] <TB0> INFO: 10568900 events read in total (373855ms).
[11:46:56.015] <TB0> INFO: 11226600 events read in total (397196ms).
[11:47:19.495] <TB0> INFO: 11885850 events read in total (420676ms).
[11:47:42.919] <TB0> INFO: 12543650 events read in total (444100ms).
[11:48:06.204] <TB0> INFO: 13200000 events read in total (467385ms).
[11:48:29.500] <TB0> INFO: 13858300 events read in total (490681ms).
[11:48:53.123] <TB0> INFO: 14515950 events read in total (514304ms).
[11:49:16.710] <TB0> INFO: 15170600 events read in total (537891ms).
[11:49:40.483] <TB0> INFO: 15826600 events read in total (561664ms).
[11:50:04.063] <TB0> INFO: 16481150 events read in total (585244ms).
[11:50:27.632] <TB0> INFO: 17137900 events read in total (608813ms).
[11:50:51.193] <TB0> INFO: 17793000 events read in total (632374ms).
[11:51:14.817] <TB0> INFO: 18447850 events read in total (655998ms).
[11:51:38.308] <TB0> INFO: 19102300 events read in total (679489ms).
[11:52:01.970] <TB0> INFO: 19756050 events read in total (703152ms).
[11:52:25.185] <TB0> INFO: 20409900 events read in total (726366ms).
[11:52:48.500] <TB0> INFO: 21062850 events read in total (749681ms).
[11:53:11.856] <TB0> INFO: 21716750 events read in total (773037ms).
[11:53:35.129] <TB0> INFO: 22371050 events read in total (796310ms).
[11:53:58.561] <TB0> INFO: 23025750 events read in total (819742ms).
[11:54:22.190] <TB0> INFO: 23678200 events read in total (843371ms).
[11:54:45.632] <TB0> INFO: 24330150 events read in total (866813ms).
[11:55:09.334] <TB0> INFO: 24981500 events read in total (890515ms).
[11:55:32.673] <TB0> INFO: 25634000 events read in total (913854ms).
[11:55:55.726] <TB0> INFO: 26286500 events read in total (936907ms).
[11:56:18.824] <TB0> INFO: 26939550 events read in total (960005ms).
[11:56:41.892] <TB0> INFO: 27593450 events read in total (983073ms).
[11:57:05.305] <TB0> INFO: 28246550 events read in total (1006486ms).
[11:57:28.461] <TB0> INFO: 28899850 events read in total (1029642ms).
[11:57:51.973] <TB0> INFO: 29552600 events read in total (1053154ms).
[11:58:15.153] <TB0> INFO: 30203900 events read in total (1076334ms).
[11:58:38.408] <TB0> INFO: 30856700 events read in total (1099589ms).
[11:59:01.722] <TB0> INFO: 31510900 events read in total (1122903ms).
[11:59:25.097] <TB0> INFO: 32164400 events read in total (1146278ms).
[11:59:48.355] <TB0> INFO: 32819400 events read in total (1169536ms).
[12:00:11.616] <TB0> INFO: 33474850 events read in total (1192797ms).
[12:00:35.066] <TB0> INFO: 34131600 events read in total (1216247ms).
[12:00:58.185] <TB0> INFO: 34786200 events read in total (1239366ms).
[12:01:21.481] <TB0> INFO: 35442400 events read in total (1262662ms).
[12:01:44.891] <TB0> INFO: 36102150 events read in total (1286072ms).
[12:02:03.014] <TB0> INFO: 36608000 events read in total (1304195ms).
[12:02:03.105] <TB0> INFO: Test took 1305139ms.
[12:02:03.682] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:02:05.716] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:02:07.836] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:02:10.059] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:02:12.605] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:02:15.024] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:02:16.789] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:02:18.493] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:02:20.511] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:02:22.440] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:02:24.531] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:02:26.734] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:02:28.314] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:02:29.910] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:02:31.470] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:02:33.021] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:02:34.586] <TB0> INFO: PixTestScurves::scurves() done
[12:02:34.586] <TB0> INFO: Vcal mean: 122.69 125.64 118.95 109.34 117.27 115.98 114.45 111.52 121.95 114.21 112.15 124.94 106.18 109.79 109.62 114.96
[12:02:34.586] <TB0> INFO: Vcal RMS: 6.13 6.86 6.64 4.96 5.98 5.33 5.53 5.47 6.24 5.32 5.76 7.20 5.27 5.15 4.95 5.70
[12:02:34.586] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1336 seconds
[12:02:34.586] <TB0> INFO: Decoding statistics:
[12:02:34.586] <TB0> INFO: General information:
[12:02:34.586] <TB0> INFO: 16bit words read: 0
[12:02:34.586] <TB0> INFO: valid events total: 0
[12:02:34.586] <TB0> INFO: empty events: 0
[12:02:34.586] <TB0> INFO: valid events with pixels: 0
[12:02:34.586] <TB0> INFO: valid pixel hits: 0
[12:02:34.586] <TB0> INFO: Event errors: 0
[12:02:34.586] <TB0> INFO: start marker: 0
[12:02:34.586] <TB0> INFO: stop marker: 0
[12:02:34.586] <TB0> INFO: overflow: 0
[12:02:34.586] <TB0> INFO: invalid 5bit words: 0
[12:02:34.586] <TB0> INFO: invalid XOR eye diagram: 0
[12:02:34.586] <TB0> INFO: frame (failed synchr.): 0
[12:02:34.586] <TB0> INFO: idle data (no TBM trl): 0
[12:02:34.586] <TB0> INFO: no data (only TBM hdr): 0
[12:02:34.586] <TB0> INFO: TBM errors: 0
[12:02:34.586] <TB0> INFO: flawed TBM headers: 0
[12:02:34.586] <TB0> INFO: flawed TBM trailers: 0
[12:02:34.586] <TB0> INFO: event ID mismatches: 0
[12:02:34.586] <TB0> INFO: ROC errors: 0
[12:02:34.586] <TB0> INFO: missing ROC header(s): 0
[12:02:34.587] <TB0> INFO: misplaced readback start: 0
[12:02:34.587] <TB0> INFO: Pixel decoding errors: 0
[12:02:34.587] <TB0> INFO: pixel data incomplete: 0
[12:02:34.587] <TB0> INFO: pixel address: 0
[12:02:34.587] <TB0> INFO: pulse height fill bit: 0
[12:02:34.587] <TB0> INFO: buffer corruption: 0
[12:02:34.675] <TB0> INFO: ######################################################################
[12:02:34.675] <TB0> INFO: PixTestTrim::doTest()
[12:02:34.675] <TB0> INFO: ######################################################################
[12:02:34.676] <TB0> INFO: ----------------------------------------------------------------------
[12:02:34.676] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[12:02:34.676] <TB0> INFO: ----------------------------------------------------------------------
[12:02:34.716] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:02:34.716] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:02:34.729] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:02:34.729] <TB0> INFO: run 1 of 1
[12:02:34.965] <TB0> INFO: Expecting 5025280 events.
[12:03:06.219] <TB0> INFO: 819080 events read in total (30649ms).
[12:03:36.889] <TB0> INFO: 1635384 events read in total (61319ms).
[12:04:07.661] <TB0> INFO: 2448720 events read in total (92091ms).
[12:04:38.185] <TB0> INFO: 3260656 events read in total (122615ms).
[12:05:09.017] <TB0> INFO: 4068968 events read in total (153447ms).
[12:05:40.407] <TB0> INFO: 4874968 events read in total (184837ms).
[12:05:46.225] <TB0> INFO: 5025280 events read in total (190655ms).
[12:05:46.276] <TB0> INFO: Test took 191546ms.
[12:06:05.318] <TB0> INFO: ROC 0 VthrComp = 128
[12:06:05.318] <TB0> INFO: ROC 1 VthrComp = 129
[12:06:05.318] <TB0> INFO: ROC 2 VthrComp = 121
[12:06:05.318] <TB0> INFO: ROC 3 VthrComp = 107
[12:06:05.318] <TB0> INFO: ROC 4 VthrComp = 118
[12:06:05.318] <TB0> INFO: ROC 5 VthrComp = 116
[12:06:05.319] <TB0> INFO: ROC 6 VthrComp = 117
[12:06:05.319] <TB0> INFO: ROC 7 VthrComp = 109
[12:06:05.319] <TB0> INFO: ROC 8 VthrComp = 130
[12:06:05.319] <TB0> INFO: ROC 9 VthrComp = 120
[12:06:05.319] <TB0> INFO: ROC 10 VthrComp = 112
[12:06:05.319] <TB0> INFO: ROC 11 VthrComp = 125
[12:06:05.320] <TB0> INFO: ROC 12 VthrComp = 111
[12:06:05.320] <TB0> INFO: ROC 13 VthrComp = 109
[12:06:05.320] <TB0> INFO: ROC 14 VthrComp = 113
[12:06:05.320] <TB0> INFO: ROC 15 VthrComp = 113
[12:06:05.559] <TB0> INFO: Expecting 41600 events.
[12:06:09.096] <TB0> INFO: 41600 events read in total (2940ms).
[12:06:09.096] <TB0> INFO: Test took 3774ms.
[12:06:09.105] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:06:09.105] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:06:09.118] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:06:09.118] <TB0> INFO: run 1 of 1
[12:06:09.396] <TB0> INFO: Expecting 5025280 events.
[12:06:36.866] <TB0> INFO: 591624 events read in total (26878ms).
[12:07:03.347] <TB0> INFO: 1182168 events read in total (53359ms).
[12:07:29.968] <TB0> INFO: 1772848 events read in total (79980ms).
[12:07:56.168] <TB0> INFO: 2362776 events read in total (106180ms).
[12:08:22.548] <TB0> INFO: 2950960 events read in total (132560ms).
[12:08:49.116] <TB0> INFO: 3537736 events read in total (159128ms).
[12:09:15.769] <TB0> INFO: 4123280 events read in total (185781ms).
[12:09:42.022] <TB0> INFO: 4709904 events read in total (212034ms).
[12:09:57.359] <TB0> INFO: 5025280 events read in total (227371ms).
[12:09:57.458] <TB0> INFO: Test took 228339ms.
[12:10:22.529] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 61.5349 for pixel 8/17 mean/min/max = 46.6611/31.4392/61.883
[12:10:22.530] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 62.7337 for pixel 15/4 mean/min/max = 47.7696/32.7312/62.8081
[12:10:22.530] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 64.0497 for pixel 0/18 mean/min/max = 46.883/29.6574/64.1087
[12:10:22.531] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 63.8133 for pixel 35/2 mean/min/max = 48.8586/33.771/63.9462
[12:10:22.531] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 61.4738 for pixel 6/11 mean/min/max = 46.3245/31.1231/61.526
[12:10:22.532] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 61.2873 for pixel 0/5 mean/min/max = 46.6926/32.0978/61.2875
[12:10:22.532] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 60.524 for pixel 49/3 mean/min/max = 46.3484/31.8863/60.8105
[12:10:22.532] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 65.1711 for pixel 18/5 mean/min/max = 49.2312/32.8801/65.5824
[12:10:22.533] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 60.8524 for pixel 9/13 mean/min/max = 46.0914/31.3191/60.8637
[12:10:22.533] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 60.2033 for pixel 1/13 mean/min/max = 46.1609/31.8994/60.4225
[12:10:22.534] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 63.1493 for pixel 0/17 mean/min/max = 47.4925/31.833/63.1519
[12:10:22.534] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 66.0636 for pixel 18/3 mean/min/max = 47.7918/29.4711/66.1125
[12:10:22.534] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 60.2502 for pixel 12/22 mean/min/max = 46.676/33.0505/60.3015
[12:10:22.535] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 62.7611 for pixel 51/35 mean/min/max = 48.6828/34.494/62.8716
[12:10:22.535] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 60.1778 for pixel 5/2 mean/min/max = 46.1204/32.0533/60.1875
[12:10:22.536] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 63.1599 for pixel 8/3 mean/min/max = 47.7729/32.1743/63.3715
[12:10:22.536] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:10:22.625] <TB0> INFO: Expecting 411648 events.
[12:10:32.127] <TB0> INFO: 411648 events read in total (8910ms).
[12:10:32.135] <TB0> INFO: Expecting 411648 events.
[12:10:41.512] <TB0> INFO: 411648 events read in total (8974ms).
[12:10:41.522] <TB0> INFO: Expecting 411648 events.
[12:10:50.865] <TB0> INFO: 411648 events read in total (8940ms).
[12:10:50.878] <TB0> INFO: Expecting 411648 events.
[12:11:00.341] <TB0> INFO: 411648 events read in total (9060ms).
[12:11:00.357] <TB0> INFO: Expecting 411648 events.
[12:11:09.704] <TB0> INFO: 411648 events read in total (8944ms).
[12:11:09.723] <TB0> INFO: Expecting 411648 events.
[12:11:19.107] <TB0> INFO: 411648 events read in total (8982ms).
[12:11:19.128] <TB0> INFO: Expecting 411648 events.
[12:11:28.490] <TB0> INFO: 411648 events read in total (8959ms).
[12:11:28.520] <TB0> INFO: Expecting 411648 events.
[12:11:37.910] <TB0> INFO: 411648 events read in total (8987ms).
[12:11:37.937] <TB0> INFO: Expecting 411648 events.
[12:11:47.352] <TB0> INFO: 411648 events read in total (9012ms).
[12:11:47.391] <TB0> INFO: Expecting 411648 events.
[12:11:56.739] <TB0> INFO: 411648 events read in total (8945ms).
[12:11:57.072] <TB0> INFO: Expecting 411648 events.
[12:12:06.417] <TB0> INFO: 411648 events read in total (8942ms).
[12:12:06.471] <TB0> INFO: Expecting 411648 events.
[12:12:15.813] <TB0> INFO: 411648 events read in total (8939ms).
[12:12:15.860] <TB0> INFO: Expecting 411648 events.
[12:12:25.360] <TB0> INFO: 411648 events read in total (9097ms).
[12:12:25.433] <TB0> INFO: Expecting 411648 events.
[12:12:34.647] <TB0> INFO: 411648 events read in total (8811ms).
[12:12:34.706] <TB0> INFO: Expecting 411648 events.
[12:12:43.966] <TB0> INFO: 411648 events read in total (8857ms).
[12:12:44.065] <TB0> INFO: Expecting 411648 events.
[12:12:53.236] <TB0> INFO: 411648 events read in total (8768ms).
[12:12:53.299] <TB0> INFO: Test took 150763ms.
[12:12:54.019] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[12:12:54.033] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:12:54.033] <TB0> INFO: run 1 of 1
[12:12:54.274] <TB0> INFO: Expecting 5025280 events.
[12:13:21.680] <TB0> INFO: 587920 events read in total (26814ms).
[12:13:48.230] <TB0> INFO: 1176488 events read in total (53364ms).
[12:14:14.909] <TB0> INFO: 1762984 events read in total (80044ms).
[12:14:41.412] <TB0> INFO: 2348040 events read in total (106546ms).
[12:15:08.083] <TB0> INFO: 2934640 events read in total (133217ms).
[12:15:34.628] <TB0> INFO: 3521352 events read in total (159762ms).
[12:16:01.161] <TB0> INFO: 4105280 events read in total (186295ms).
[12:16:28.511] <TB0> INFO: 4688904 events read in total (213645ms).
[12:16:44.572] <TB0> INFO: 5025280 events read in total (229706ms).
[12:16:44.887] <TB0> INFO: Test took 230855ms.
[12:17:07.088] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 3.500000 .. 147.114157
[12:17:07.326] <TB0> INFO: Expecting 208000 events.
[12:17:17.389] <TB0> INFO: 208000 events read in total (9471ms).
[12:17:17.390] <TB0> INFO: Test took 10301ms.
[12:17:17.437] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 3 .. 157 (-1/-1) hits flags = 528 (plus default)
[12:17:17.450] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:17:17.450] <TB0> INFO: run 1 of 1
[12:17:17.728] <TB0> INFO: Expecting 5158400 events.
[12:17:44.978] <TB0> INFO: 581496 events read in total (26659ms).
[12:18:11.621] <TB0> INFO: 1162624 events read in total (53302ms).
[12:18:38.302] <TB0> INFO: 1743312 events read in total (79983ms).
[12:19:05.131] <TB0> INFO: 2324552 events read in total (106812ms).
[12:19:31.318] <TB0> INFO: 2905648 events read in total (132999ms).
[12:19:57.824] <TB0> INFO: 3486384 events read in total (159505ms).
[12:20:24.282] <TB0> INFO: 4066920 events read in total (185963ms).
[12:20:52.533] <TB0> INFO: 4647184 events read in total (214214ms).
[12:21:15.938] <TB0> INFO: 5158400 events read in total (237619ms).
[12:21:16.030] <TB0> INFO: Test took 238581ms.
[12:21:41.291] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 21.000259 .. 45.368293
[12:21:41.537] <TB0> INFO: Expecting 208000 events.
[12:21:51.625] <TB0> INFO: 208000 events read in total (9496ms).
[12:21:51.626] <TB0> INFO: Test took 10334ms.
[12:21:51.675] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 11 .. 55 (-1/-1) hits flags = 528 (plus default)
[12:21:51.688] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:21:51.688] <TB0> INFO: run 1 of 1
[12:21:51.966] <TB0> INFO: Expecting 1497600 events.
[12:22:21.983] <TB0> INFO: 681768 events read in total (29426ms).
[12:22:50.522] <TB0> INFO: 1362208 events read in total (57966ms).
[12:22:56.602] <TB0> INFO: 1497600 events read in total (64045ms).
[12:22:56.641] <TB0> INFO: Test took 64954ms.
[12:23:10.463] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 21.814886 .. 47.090359
[12:23:10.711] <TB0> INFO: Expecting 208000 events.
[12:23:20.745] <TB0> INFO: 208000 events read in total (9442ms).
[12:23:20.746] <TB0> INFO: Test took 10281ms.
[12:23:20.798] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 11 .. 57 (-1/-1) hits flags = 528 (plus default)
[12:23:20.812] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:23:20.812] <TB0> INFO: run 1 of 1
[12:23:21.090] <TB0> INFO: Expecting 1564160 events.
[12:23:50.898] <TB0> INFO: 674384 events read in total (29217ms).
[12:24:19.319] <TB0> INFO: 1347576 events read in total (57638ms).
[12:24:28.630] <TB0> INFO: 1564160 events read in total (66949ms).
[12:24:28.660] <TB0> INFO: Test took 67849ms.
[12:24:41.642] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 23.179421 .. 48.315797
[12:24:41.882] <TB0> INFO: Expecting 208000 events.
[12:24:51.794] <TB0> INFO: 208000 events read in total (9320ms).
[12:24:51.795] <TB0> INFO: Test took 10152ms.
[12:24:51.842] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 13 .. 58 (-1/-1) hits flags = 528 (plus default)
[12:24:51.856] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:24:51.856] <TB0> INFO: run 1 of 1
[12:24:52.180] <TB0> INFO: Expecting 1530880 events.
[12:25:21.724] <TB0> INFO: 663336 events read in total (28952ms).
[12:25:49.902] <TB0> INFO: 1326600 events read in total (57130ms).
[12:25:58.882] <TB0> INFO: 1530880 events read in total (66110ms).
[12:25:58.911] <TB0> INFO: Test took 67056ms.
[12:26:12.193] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:26:12.193] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[12:26:12.206] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:26:12.207] <TB0> INFO: run 1 of 1
[12:26:12.446] <TB0> INFO: Expecting 1364480 events.
[12:26:41.672] <TB0> INFO: 667360 events read in total (28634ms).
[12:27:10.820] <TB0> INFO: 1333960 events read in total (57783ms).
[12:27:12.527] <TB0> INFO: 1364480 events read in total (59489ms).
[12:27:12.553] <TB0> INFO: Test took 60346ms.
[12:27:26.915] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C0.dat
[12:27:26.915] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C1.dat
[12:27:26.915] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C2.dat
[12:27:26.915] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C3.dat
[12:27:26.916] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C4.dat
[12:27:26.916] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C5.dat
[12:27:26.916] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C6.dat
[12:27:26.916] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C7.dat
[12:27:26.916] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C8.dat
[12:27:26.916] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C9.dat
[12:27:26.916] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C10.dat
[12:27:26.916] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C11.dat
[12:27:26.916] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C12.dat
[12:27:26.917] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C13.dat
[12:27:26.917] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C14.dat
[12:27:26.917] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C15.dat
[12:27:26.917] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//trimParameters35_C0.dat
[12:27:26.924] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//trimParameters35_C1.dat
[12:27:26.931] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//trimParameters35_C2.dat
[12:27:26.937] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//trimParameters35_C3.dat
[12:27:26.943] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//trimParameters35_C4.dat
[12:27:26.949] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//trimParameters35_C5.dat
[12:27:26.956] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//trimParameters35_C6.dat
[12:27:26.961] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//trimParameters35_C7.dat
[12:27:26.968] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//trimParameters35_C8.dat
[12:27:26.974] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//trimParameters35_C9.dat
[12:27:26.980] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//trimParameters35_C10.dat
[12:27:26.986] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//trimParameters35_C11.dat
[12:27:26.992] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//trimParameters35_C12.dat
[12:27:26.997] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//trimParameters35_C13.dat
[12:27:27.004] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//trimParameters35_C14.dat
[12:27:27.011] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//trimParameters35_C15.dat
[12:27:27.017] <TB0> INFO: PixTestTrim::trimTest() done
[12:27:27.017] <TB0> INFO: vtrim: 129 136 139 123 124 114 123 153 144 131 119 145 129 128 128 126
[12:27:27.017] <TB0> INFO: vthrcomp: 128 129 121 107 118 116 117 109 130 120 112 125 111 109 113 113
[12:27:27.017] <TB0> INFO: vcal mean: 34.96 34.96 34.94 34.99 34.94 34.99 34.95 35.12 34.92 34.93 35.18 35.39 34.97 35.00 34.99 35.03
[12:27:27.017] <TB0> INFO: vcal RMS: 1.12 1.06 1.21 1.09 1.15 0.99 1.04 1.07 1.08 0.98 1.02 1.87 1.00 1.03 1.02 1.18
[12:27:27.017] <TB0> INFO: bits mean: 9.63 8.97 9.37 8.51 9.34 9.13 9.48 8.97 9.62 9.47 9.04 9.88 9.13 8.44 9.76 9.24
[12:27:27.017] <TB0> INFO: bits RMS: 2.66 2.66 2.93 2.68 2.84 2.81 2.67 2.56 2.66 2.67 2.77 2.76 2.63 2.63 2.55 2.68
[12:27:27.025] <TB0> INFO: ----------------------------------------------------------------------
[12:27:27.025] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[12:27:27.025] <TB0> INFO: ----------------------------------------------------------------------
[12:27:27.027] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[12:27:27.041] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:27:27.041] <TB0> INFO: run 1 of 1
[12:27:27.305] <TB0> INFO: Expecting 4160000 events.
[12:28:00.505] <TB0> INFO: 745825 events read in total (32609ms).
[12:28:32.673] <TB0> INFO: 1486110 events read in total (64777ms).
[12:29:04.914] <TB0> INFO: 2221805 events read in total (97018ms).
[12:29:37.799] <TB0> INFO: 2954140 events read in total (129903ms).
[12:30:09.956] <TB0> INFO: 3685975 events read in total (162060ms).
[12:30:30.769] <TB0> INFO: 4160000 events read in total (182873ms).
[12:30:30.939] <TB0> INFO: Test took 183898ms.
[12:30:54.619] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 211 (-1/-1) hits flags = 528 (plus default)
[12:30:54.632] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:30:54.633] <TB0> INFO: run 1 of 1
[12:30:54.870] <TB0> INFO: Expecting 4409600 events.
[12:31:26.948] <TB0> INFO: 708045 events read in total (31486ms).
[12:31:58.480] <TB0> INFO: 1411345 events read in total (63018ms).
[12:32:29.928] <TB0> INFO: 2111355 events read in total (94466ms).
[12:33:01.495] <TB0> INFO: 2808585 events read in total (126033ms).
[12:33:33.324] <TB0> INFO: 3503575 events read in total (157862ms).
[12:34:04.591] <TB0> INFO: 4199975 events read in total (189129ms).
[12:34:13.999] <TB0> INFO: 4409600 events read in total (198537ms).
[12:34:14.111] <TB0> INFO: Test took 199478ms.
[12:34:45.908] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 198 (-1/-1) hits flags = 528 (plus default)
[12:34:45.921] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:34:45.921] <TB0> INFO: run 1 of 1
[12:34:46.158] <TB0> INFO: Expecting 4139200 events.
[12:35:19.246] <TB0> INFO: 723985 events read in total (32497ms).
[12:35:51.221] <TB0> INFO: 1442510 events read in total (64472ms).
[12:36:23.339] <TB0> INFO: 2156500 events read in total (96590ms).
[12:36:54.848] <TB0> INFO: 2867270 events read in total (128099ms).
[12:37:26.740] <TB0> INFO: 3576995 events read in total (159991ms).
[12:37:52.257] <TB0> INFO: 4139200 events read in total (185508ms).
[12:37:52.367] <TB0> INFO: Test took 186446ms.
[12:38:20.376] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[12:38:20.390] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:38:20.390] <TB0> INFO: run 1 of 1
[12:38:20.632] <TB0> INFO: Expecting 4160000 events.
[12:38:53.534] <TB0> INFO: 722450 events read in total (32310ms).
[12:39:25.428] <TB0> INFO: 1439720 events read in total (64204ms).
[12:39:56.978] <TB0> INFO: 2152335 events read in total (95754ms).
[12:40:28.700] <TB0> INFO: 2861840 events read in total (127476ms).
[12:41:00.281] <TB0> INFO: 3570365 events read in total (159057ms).
[12:41:26.271] <TB0> INFO: 4160000 events read in total (185047ms).
[12:41:26.365] <TB0> INFO: Test took 185975ms.
[12:41:51.979] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[12:41:51.992] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:41:51.992] <TB0> INFO: run 1 of 1
[12:41:52.251] <TB0> INFO: Expecting 4160000 events.
[12:42:25.120] <TB0> INFO: 722350 events read in total (32278ms).
[12:42:56.934] <TB0> INFO: 1439365 events read in total (64091ms).
[12:43:28.729] <TB0> INFO: 2151795 events read in total (95886ms).
[12:44:00.603] <TB0> INFO: 2860980 events read in total (127760ms).
[12:44:32.655] <TB0> INFO: 3569425 events read in total (159812ms).
[12:44:58.954] <TB0> INFO: 4160000 events read in total (186111ms).
[12:44:59.170] <TB0> INFO: Test took 187178ms.
[12:45:25.517] <TB0> INFO: PixTestTrim::trimBitTest() done
[12:45:25.518] <TB0> INFO: PixTestTrim::doTest() done, duration: 2570 seconds
[12:45:25.518] <TB0> INFO: Decoding statistics:
[12:45:25.518] <TB0> INFO: General information:
[12:45:25.518] <TB0> INFO: 16bit words read: 0
[12:45:25.518] <TB0> INFO: valid events total: 0
[12:45:25.518] <TB0> INFO: empty events: 0
[12:45:25.518] <TB0> INFO: valid events with pixels: 0
[12:45:25.518] <TB0> INFO: valid pixel hits: 0
[12:45:25.518] <TB0> INFO: Event errors: 0
[12:45:25.518] <TB0> INFO: start marker: 0
[12:45:25.518] <TB0> INFO: stop marker: 0
[12:45:25.518] <TB0> INFO: overflow: 0
[12:45:25.518] <TB0> INFO: invalid 5bit words: 0
[12:45:25.518] <TB0> INFO: invalid XOR eye diagram: 0
[12:45:25.518] <TB0> INFO: frame (failed synchr.): 0
[12:45:25.518] <TB0> INFO: idle data (no TBM trl): 0
[12:45:25.518] <TB0> INFO: no data (only TBM hdr): 0
[12:45:25.519] <TB0> INFO: TBM errors: 0
[12:45:25.519] <TB0> INFO: flawed TBM headers: 0
[12:45:25.519] <TB0> INFO: flawed TBM trailers: 0
[12:45:25.519] <TB0> INFO: event ID mismatches: 0
[12:45:25.519] <TB0> INFO: ROC errors: 0
[12:45:25.519] <TB0> INFO: missing ROC header(s): 0
[12:45:25.519] <TB0> INFO: misplaced readback start: 0
[12:45:25.519] <TB0> INFO: Pixel decoding errors: 0
[12:45:25.519] <TB0> INFO: pixel data incomplete: 0
[12:45:25.519] <TB0> INFO: pixel address: 0
[12:45:25.519] <TB0> INFO: pulse height fill bit: 0
[12:45:25.519] <TB0> INFO: buffer corruption: 0
[12:45:26.139] <TB0> INFO: ######################################################################
[12:45:26.139] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:45:26.139] <TB0> INFO: ######################################################################
[12:45:26.376] <TB0> INFO: Expecting 41600 events.
[12:45:29.916] <TB0> INFO: 41600 events read in total (2948ms).
[12:45:29.917] <TB0> INFO: Test took 3777ms.
[12:45:30.360] <TB0> INFO: Expecting 41600 events.
[12:45:33.932] <TB0> INFO: 41600 events read in total (2980ms).
[12:45:33.933] <TB0> INFO: Test took 3812ms.
[12:45:34.222] <TB0> INFO: Expecting 41600 events.
[12:45:37.825] <TB0> INFO: 41600 events read in total (3012ms).
[12:45:37.825] <TB0> INFO: Test took 3868ms.
[12:45:38.114] <TB0> INFO: Expecting 41600 events.
[12:45:41.671] <TB0> INFO: 41600 events read in total (2965ms).
[12:45:41.672] <TB0> INFO: Test took 3822ms.
[12:45:41.960] <TB0> INFO: Expecting 41600 events.
[12:45:45.531] <TB0> INFO: 41600 events read in total (2979ms).
[12:45:45.531] <TB0> INFO: Test took 3835ms.
[12:45:45.824] <TB0> INFO: Expecting 41600 events.
[12:45:49.428] <TB0> INFO: 41600 events read in total (3013ms).
[12:45:49.429] <TB0> INFO: Test took 3871ms.
[12:45:49.719] <TB0> INFO: Expecting 41600 events.
[12:45:53.343] <TB0> INFO: 41600 events read in total (3032ms).
[12:45:53.344] <TB0> INFO: Test took 3891ms.
[12:45:53.636] <TB0> INFO: Expecting 41600 events.
[12:45:57.202] <TB0> INFO: 41600 events read in total (2975ms).
[12:45:57.203] <TB0> INFO: Test took 3832ms.
[12:45:57.493] <TB0> INFO: Expecting 41600 events.
[12:46:01.138] <TB0> INFO: 41600 events read in total (3054ms).
[12:46:01.139] <TB0> INFO: Test took 3912ms.
[12:46:01.430] <TB0> INFO: Expecting 41600 events.
[12:46:04.997] <TB0> INFO: 41600 events read in total (2976ms).
[12:46:04.998] <TB0> INFO: Test took 3835ms.
[12:46:05.288] <TB0> INFO: Expecting 41600 events.
[12:46:08.827] <TB0> INFO: 41600 events read in total (2947ms).
[12:46:08.828] <TB0> INFO: Test took 3805ms.
[12:46:09.120] <TB0> INFO: Expecting 41600 events.
[12:46:12.680] <TB0> INFO: 41600 events read in total (2969ms).
[12:46:12.681] <TB0> INFO: Test took 3826ms.
[12:46:12.971] <TB0> INFO: Expecting 41600 events.
[12:46:16.583] <TB0> INFO: 41600 events read in total (3021ms).
[12:46:16.583] <TB0> INFO: Test took 3878ms.
[12:46:16.875] <TB0> INFO: Expecting 41600 events.
[12:46:20.406] <TB0> INFO: 41600 events read in total (2939ms).
[12:46:20.407] <TB0> INFO: Test took 3798ms.
[12:46:20.697] <TB0> INFO: Expecting 41600 events.
[12:46:24.265] <TB0> INFO: 41600 events read in total (2976ms).
[12:46:24.265] <TB0> INFO: Test took 3834ms.
[12:46:24.571] <TB0> INFO: Expecting 41600 events.
[12:46:28.097] <TB0> INFO: 41600 events read in total (2935ms).
[12:46:28.098] <TB0> INFO: Test took 3808ms.
[12:46:28.388] <TB0> INFO: Expecting 41600 events.
[12:46:32.034] <TB0> INFO: 41600 events read in total (3054ms).
[12:46:32.035] <TB0> INFO: Test took 3913ms.
[12:46:32.330] <TB0> INFO: Expecting 41600 events.
[12:46:35.989] <TB0> INFO: 41600 events read in total (3067ms).
[12:46:35.990] <TB0> INFO: Test took 3928ms.
[12:46:36.278] <TB0> INFO: Expecting 41600 events.
[12:46:39.839] <TB0> INFO: 41600 events read in total (2969ms).
[12:46:39.840] <TB0> INFO: Test took 3827ms.
[12:46:40.133] <TB0> INFO: Expecting 41600 events.
[12:46:43.742] <TB0> INFO: 41600 events read in total (3017ms).
[12:46:43.743] <TB0> INFO: Test took 3876ms.
[12:46:44.035] <TB0> INFO: Expecting 41600 events.
[12:46:47.613] <TB0> INFO: 41600 events read in total (2986ms).
[12:46:47.614] <TB0> INFO: Test took 3844ms.
[12:46:47.907] <TB0> INFO: Expecting 41600 events.
[12:46:51.563] <TB0> INFO: 41600 events read in total (3065ms).
[12:46:51.564] <TB0> INFO: Test took 3923ms.
[12:46:51.854] <TB0> INFO: Expecting 41600 events.
[12:46:55.459] <TB0> INFO: 41600 events read in total (3013ms).
[12:46:55.460] <TB0> INFO: Test took 3871ms.
[12:46:55.766] <TB0> INFO: Expecting 41600 events.
[12:46:59.319] <TB0> INFO: 41600 events read in total (2961ms).
[12:46:59.320] <TB0> INFO: Test took 3836ms.
[12:46:59.610] <TB0> INFO: Expecting 41600 events.
[12:47:03.297] <TB0> INFO: 41600 events read in total (3095ms).
[12:47:03.297] <TB0> INFO: Test took 3953ms.
[12:47:03.587] <TB0> INFO: Expecting 41600 events.
[12:47:07.168] <TB0> INFO: 41600 events read in total (2989ms).
[12:47:07.169] <TB0> INFO: Test took 3848ms.
[12:47:07.459] <TB0> INFO: Expecting 41600 events.
[12:47:11.020] <TB0> INFO: 41600 events read in total (2969ms).
[12:47:11.021] <TB0> INFO: Test took 3827ms.
[12:47:11.311] <TB0> INFO: Expecting 41600 events.
[12:47:14.876] <TB0> INFO: 41600 events read in total (2973ms).
[12:47:14.877] <TB0> INFO: Test took 3831ms.
[12:47:15.169] <TB0> INFO: Expecting 41600 events.
[12:47:18.739] <TB0> INFO: 41600 events read in total (2978ms).
[12:47:18.740] <TB0> INFO: Test took 3837ms.
[12:47:19.031] <TB0> INFO: Expecting 2560 events.
[12:47:19.920] <TB0> INFO: 2560 events read in total (298ms).
[12:47:19.921] <TB0> INFO: Test took 1168ms.
[12:47:20.229] <TB0> INFO: Expecting 2560 events.
[12:47:21.123] <TB0> INFO: 2560 events read in total (303ms).
[12:47:21.123] <TB0> INFO: Test took 1202ms.
[12:47:21.430] <TB0> INFO: Expecting 2560 events.
[12:47:22.320] <TB0> INFO: 2560 events read in total (299ms).
[12:47:22.321] <TB0> INFO: Test took 1197ms.
[12:47:22.629] <TB0> INFO: Expecting 2560 events.
[12:47:23.517] <TB0> INFO: 2560 events read in total (296ms).
[12:47:23.518] <TB0> INFO: Test took 1197ms.
[12:47:23.826] <TB0> INFO: Expecting 2560 events.
[12:47:24.711] <TB0> INFO: 2560 events read in total (293ms).
[12:47:24.711] <TB0> INFO: Test took 1192ms.
[12:47:25.020] <TB0> INFO: Expecting 2560 events.
[12:47:25.905] <TB0> INFO: 2560 events read in total (293ms).
[12:47:25.905] <TB0> INFO: Test took 1193ms.
[12:47:26.214] <TB0> INFO: Expecting 2560 events.
[12:47:27.102] <TB0> INFO: 2560 events read in total (296ms).
[12:47:27.102] <TB0> INFO: Test took 1196ms.
[12:47:27.409] <TB0> INFO: Expecting 2560 events.
[12:47:28.301] <TB0> INFO: 2560 events read in total (300ms).
[12:47:28.301] <TB0> INFO: Test took 1198ms.
[12:47:28.608] <TB0> INFO: Expecting 2560 events.
[12:47:29.499] <TB0> INFO: 2560 events read in total (299ms).
[12:47:29.499] <TB0> INFO: Test took 1197ms.
[12:47:29.807] <TB0> INFO: Expecting 2560 events.
[12:47:30.692] <TB0> INFO: 2560 events read in total (293ms).
[12:47:30.692] <TB0> INFO: Test took 1193ms.
[12:47:30.000] <TB0> INFO: Expecting 2560 events.
[12:47:31.887] <TB0> INFO: 2560 events read in total (295ms).
[12:47:31.887] <TB0> INFO: Test took 1195ms.
[12:47:32.195] <TB0> INFO: Expecting 2560 events.
[12:47:33.075] <TB0> INFO: 2560 events read in total (288ms).
[12:47:33.075] <TB0> INFO: Test took 1188ms.
[12:47:33.383] <TB0> INFO: Expecting 2560 events.
[12:47:34.266] <TB0> INFO: 2560 events read in total (291ms).
[12:47:34.267] <TB0> INFO: Test took 1192ms.
[12:47:34.574] <TB0> INFO: Expecting 2560 events.
[12:47:35.456] <TB0> INFO: 2560 events read in total (290ms).
[12:47:35.456] <TB0> INFO: Test took 1189ms.
[12:47:35.765] <TB0> INFO: Expecting 2560 events.
[12:47:36.654] <TB0> INFO: 2560 events read in total (298ms).
[12:47:36.655] <TB0> INFO: Test took 1198ms.
[12:47:36.963] <TB0> INFO: Expecting 2560 events.
[12:47:37.852] <TB0> INFO: 2560 events read in total (297ms).
[12:47:37.852] <TB0> INFO: Test took 1197ms.
[12:47:37.855] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:47:38.161] <TB0> INFO: Expecting 655360 events.
[12:47:53.026] <TB0> INFO: 655360 events read in total (14273ms).
[12:47:53.045] <TB0> INFO: Expecting 655360 events.
[12:48:07.454] <TB0> INFO: 655360 events read in total (14006ms).
[12:48:07.482] <TB0> INFO: Expecting 655360 events.
[12:48:22.175] <TB0> INFO: 655360 events read in total (14290ms).
[12:48:22.207] <TB0> INFO: Expecting 655360 events.
[12:48:36.867] <TB0> INFO: 655360 events read in total (14257ms).
[12:48:36.905] <TB0> INFO: Expecting 655360 events.
[12:48:51.480] <TB0> INFO: 655360 events read in total (14171ms).
[12:48:51.515] <TB0> INFO: Expecting 655360 events.
[12:49:05.981] <TB0> INFO: 655360 events read in total (14063ms).
[12:49:06.027] <TB0> INFO: Expecting 655360 events.
[12:49:20.459] <TB0> INFO: 655360 events read in total (14029ms).
[12:49:20.508] <TB0> INFO: Expecting 655360 events.
[12:49:34.905] <TB0> INFO: 655360 events read in total (13994ms).
[12:49:34.958] <TB0> INFO: Expecting 655360 events.
[12:49:49.329] <TB0> INFO: 655360 events read in total (13968ms).
[12:49:49.415] <TB0> INFO: Expecting 655360 events.
[12:50:04.080] <TB0> INFO: 655360 events read in total (14262ms).
[12:50:04.181] <TB0> INFO: Expecting 655360 events.
[12:50:18.712] <TB0> INFO: 655360 events read in total (14128ms).
[12:50:18.834] <TB0> INFO: Expecting 655360 events.
[12:50:33.427] <TB0> INFO: 655360 events read in total (14190ms).
[12:50:33.551] <TB0> INFO: Expecting 655360 events.
[12:50:48.132] <TB0> INFO: 655360 events read in total (14178ms).
[12:50:48.215] <TB0> INFO: Expecting 655360 events.
[12:51:02.761] <TB0> INFO: 655360 events read in total (14143ms).
[12:51:02.923] <TB0> INFO: Expecting 655360 events.
[12:51:17.280] <TB0> INFO: 655360 events read in total (13954ms).
[12:51:17.372] <TB0> INFO: Expecting 655360 events.
[12:51:31.942] <TB0> INFO: 655360 events read in total (14167ms).
[12:51:32.041] <TB0> INFO: Test took 234186ms.
[12:51:32.138] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:51:32.392] <TB0> INFO: Expecting 655360 events.
[12:51:47.003] <TB0> INFO: 655360 events read in total (14019ms).
[12:51:47.018] <TB0> INFO: Expecting 655360 events.
[12:52:01.250] <TB0> INFO: 655360 events read in total (13828ms).
[12:52:01.270] <TB0> INFO: Expecting 655360 events.
[12:52:15.918] <TB0> INFO: 655360 events read in total (14245ms).
[12:52:15.942] <TB0> INFO: Expecting 655360 events.
[12:52:30.148] <TB0> INFO: 655360 events read in total (13803ms).
[12:52:30.175] <TB0> INFO: Expecting 655360 events.
[12:52:44.784] <TB0> INFO: 655360 events read in total (14205ms).
[12:52:44.816] <TB0> INFO: Expecting 655360 events.
[12:52:59.389] <TB0> INFO: 655360 events read in total (14170ms).
[12:52:59.427] <TB0> INFO: Expecting 655360 events.
[12:53:14.094] <TB0> INFO: 655360 events read in total (14264ms).
[12:53:14.133] <TB0> INFO: Expecting 655360 events.
[12:53:28.228] <TB0> INFO: 655360 events read in total (13691ms).
[12:53:28.279] <TB0> INFO: Expecting 655360 events.
[12:53:42.625] <TB0> INFO: 655360 events read in total (13943ms).
[12:53:42.687] <TB0> INFO: Expecting 655360 events.
[12:53:57.234] <TB0> INFO: 655360 events read in total (14144ms).
[12:53:57.391] <TB0> INFO: Expecting 655360 events.
[12:54:11.999] <TB0> INFO: 655360 events read in total (14205ms).
[12:54:12.073] <TB0> INFO: Expecting 655360 events.
[12:54:26.575] <TB0> INFO: 655360 events read in total (14098ms).
[12:54:26.651] <TB0> INFO: Expecting 655360 events.
[12:54:41.060] <TB0> INFO: 655360 events read in total (14006ms).
[12:54:41.145] <TB0> INFO: Expecting 655360 events.
[12:54:56.128] <TB0> INFO: 655360 events read in total (14580ms).
[12:54:56.220] <TB0> INFO: Expecting 655360 events.
[12:55:10.903] <TB0> INFO: 655360 events read in total (14280ms).
[12:55:11.144] <TB0> INFO: Expecting 655360 events.
[12:55:26.141] <TB0> INFO: 655360 events read in total (14593ms).
[12:55:26.240] <TB0> INFO: Test took 234103ms.
[12:55:26.411] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:55:26.417] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:55:26.423] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:55:26.428] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:55:26.435] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:55:26.442] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:55:26.448] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[12:55:26.454] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[12:55:26.461] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[12:55:26.467] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[12:55:26.474] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:55:26.480] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:55:26.489] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:55:26.497] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:55:26.505] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:55:26.513] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[12:55:26.522] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[12:55:26.530] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[12:55:26.538] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[12:55:26.546] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[12:55:26.552] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:55:26.558] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:55:26.564] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:55:26.571] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:55:26.578] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:55:26.585] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:55:26.592] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:55:26.599] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:55:26.608] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:55:26.613] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:55:26.620] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:55:26.627] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[12:55:26.633] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[12:55:26.641] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[12:55:26.648] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[12:55:26.656] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[12:55:26.662] <TB0> INFO: safety margin for low PH: adding 8, margin is now 28
[12:55:26.670] <TB0> INFO: safety margin for low PH: adding 9, margin is now 29
[12:55:26.676] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:55:26.682] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:55:26.688] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:55:26.694] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:55:26.728] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C0.dat
[12:55:26.728] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C1.dat
[12:55:26.728] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C2.dat
[12:55:26.728] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C3.dat
[12:55:26.729] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C4.dat
[12:55:26.729] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C5.dat
[12:55:26.729] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C6.dat
[12:55:26.729] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C7.dat
[12:55:26.729] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C8.dat
[12:55:26.729] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C9.dat
[12:55:26.729] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C10.dat
[12:55:26.729] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C11.dat
[12:55:26.729] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C12.dat
[12:55:26.729] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C13.dat
[12:55:26.730] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C14.dat
[12:55:26.730] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//dacParameters35_C15.dat
[12:55:26.975] <TB0> INFO: Expecting 41600 events.
[12:55:30.205] <TB0> INFO: 41600 events read in total (2638ms).
[12:55:30.206] <TB0> INFO: Test took 3473ms.
[12:55:30.662] <TB0> INFO: Expecting 41600 events.
[12:55:33.770] <TB0> INFO: 41600 events read in total (2516ms).
[12:55:33.771] <TB0> INFO: Test took 3350ms.
[12:55:34.223] <TB0> INFO: Expecting 41600 events.
[12:55:37.404] <TB0> INFO: 41600 events read in total (2589ms).
[12:55:37.405] <TB0> INFO: Test took 3422ms.
[12:55:37.623] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:37.712] <TB0> INFO: Expecting 2560 events.
[12:55:38.608] <TB0> INFO: 2560 events read in total (304ms).
[12:55:38.608] <TB0> INFO: Test took 985ms.
[12:55:38.611] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:38.916] <TB0> INFO: Expecting 2560 events.
[12:55:39.808] <TB0> INFO: 2560 events read in total (300ms).
[12:55:39.809] <TB0> INFO: Test took 1198ms.
[12:55:39.812] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:40.116] <TB0> INFO: Expecting 2560 events.
[12:55:40.003] <TB0> INFO: 2560 events read in total (295ms).
[12:55:41.003] <TB0> INFO: Test took 1191ms.
[12:55:41.005] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:41.312] <TB0> INFO: Expecting 2560 events.
[12:55:42.206] <TB0> INFO: 2560 events read in total (302ms).
[12:55:42.207] <TB0> INFO: Test took 1202ms.
[12:55:42.210] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:42.515] <TB0> INFO: Expecting 2560 events.
[12:55:43.408] <TB0> INFO: 2560 events read in total (301ms).
[12:55:43.409] <TB0> INFO: Test took 1199ms.
[12:55:43.412] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:43.717] <TB0> INFO: Expecting 2560 events.
[12:55:44.602] <TB0> INFO: 2560 events read in total (294ms).
[12:55:44.602] <TB0> INFO: Test took 1190ms.
[12:55:44.605] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:44.910] <TB0> INFO: Expecting 2560 events.
[12:55:45.808] <TB0> INFO: 2560 events read in total (306ms).
[12:55:45.808] <TB0> INFO: Test took 1203ms.
[12:55:45.810] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:46.116] <TB0> INFO: Expecting 2560 events.
[12:55:47.013] <TB0> INFO: 2560 events read in total (305ms).
[12:55:47.013] <TB0> INFO: Test took 1203ms.
[12:55:47.017] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:47.321] <TB0> INFO: Expecting 2560 events.
[12:55:48.209] <TB0> INFO: 2560 events read in total (297ms).
[12:55:48.210] <TB0> INFO: Test took 1194ms.
[12:55:48.213] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:48.517] <TB0> INFO: Expecting 2560 events.
[12:55:49.407] <TB0> INFO: 2560 events read in total (298ms).
[12:55:49.407] <TB0> INFO: Test took 1194ms.
[12:55:49.410] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:49.716] <TB0> INFO: Expecting 2560 events.
[12:55:50.606] <TB0> INFO: 2560 events read in total (298ms).
[12:55:50.606] <TB0> INFO: Test took 1196ms.
[12:55:50.609] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:50.916] <TB0> INFO: Expecting 2560 events.
[12:55:51.810] <TB0> INFO: 2560 events read in total (303ms).
[12:55:51.810] <TB0> INFO: Test took 1201ms.
[12:55:51.815] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:52.117] <TB0> INFO: Expecting 2560 events.
[12:55:53.003] <TB0> INFO: 2560 events read in total (295ms).
[12:55:53.004] <TB0> INFO: Test took 1190ms.
[12:55:53.006] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:53.313] <TB0> INFO: Expecting 2560 events.
[12:55:54.198] <TB0> INFO: 2560 events read in total (293ms).
[12:55:54.199] <TB0> INFO: Test took 1193ms.
[12:55:54.202] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:54.507] <TB0> INFO: Expecting 2560 events.
[12:55:55.400] <TB0> INFO: 2560 events read in total (301ms).
[12:55:55.401] <TB0> INFO: Test took 1199ms.
[12:55:55.404] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:55.709] <TB0> INFO: Expecting 2560 events.
[12:55:56.598] <TB0> INFO: 2560 events read in total (297ms).
[12:55:56.598] <TB0> INFO: Test took 1194ms.
[12:55:56.601] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:56.906] <TB0> INFO: Expecting 2560 events.
[12:55:57.795] <TB0> INFO: 2560 events read in total (297ms).
[12:55:57.795] <TB0> INFO: Test took 1194ms.
[12:55:57.798] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:58.105] <TB0> INFO: Expecting 2560 events.
[12:55:58.989] <TB0> INFO: 2560 events read in total (293ms).
[12:55:58.989] <TB0> INFO: Test took 1191ms.
[12:55:58.992] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:59.296] <TB0> INFO: Expecting 2560 events.
[12:56:00.188] <TB0> INFO: 2560 events read in total (300ms).
[12:56:00.188] <TB0> INFO: Test took 1196ms.
[12:56:00.192] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:56:00.496] <TB0> INFO: Expecting 2560 events.
[12:56:01.384] <TB0> INFO: 2560 events read in total (297ms).
[12:56:01.384] <TB0> INFO: Test took 1192ms.
[12:56:01.387] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:56:01.692] <TB0> INFO: Expecting 2560 events.
[12:56:02.583] <TB0> INFO: 2560 events read in total (299ms).
[12:56:02.584] <TB0> INFO: Test took 1198ms.
[12:56:02.587] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:56:02.891] <TB0> INFO: Expecting 2560 events.
[12:56:03.772] <TB0> INFO: 2560 events read in total (289ms).
[12:56:03.772] <TB0> INFO: Test took 1185ms.
[12:56:03.775] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:56:04.081] <TB0> INFO: Expecting 2560 events.
[12:56:04.972] <TB0> INFO: 2560 events read in total (300ms).
[12:56:04.972] <TB0> INFO: Test took 1197ms.
[12:56:04.977] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:56:05.280] <TB0> INFO: Expecting 2560 events.
[12:56:06.163] <TB0> INFO: 2560 events read in total (291ms).
[12:56:06.163] <TB0> INFO: Test took 1186ms.
[12:56:06.166] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:56:06.473] <TB0> INFO: Expecting 2560 events.
[12:56:07.359] <TB0> INFO: 2560 events read in total (295ms).
[12:56:07.359] <TB0> INFO: Test took 1193ms.
[12:56:07.363] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:56:07.668] <TB0> INFO: Expecting 2560 events.
[12:56:08.561] <TB0> INFO: 2560 events read in total (301ms).
[12:56:08.561] <TB0> INFO: Test took 1198ms.
[12:56:08.564] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:56:08.869] <TB0> INFO: Expecting 2560 events.
[12:56:09.764] <TB0> INFO: 2560 events read in total (303ms).
[12:56:09.764] <TB0> INFO: Test took 1200ms.
[12:56:09.768] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:56:10.073] <TB0> INFO: Expecting 2560 events.
[12:56:10.971] <TB0> INFO: 2560 events read in total (306ms).
[12:56:10.972] <TB0> INFO: Test took 1205ms.
[12:56:10.975] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:56:11.279] <TB0> INFO: Expecting 2560 events.
[12:56:12.170] <TB0> INFO: 2560 events read in total (300ms).
[12:56:12.171] <TB0> INFO: Test took 1197ms.
[12:56:12.173] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:56:12.479] <TB0> INFO: Expecting 2560 events.
[12:56:13.373] <TB0> INFO: 2560 events read in total (302ms).
[12:56:13.373] <TB0> INFO: Test took 1200ms.
[12:56:13.376] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:56:13.681] <TB0> INFO: Expecting 2560 events.
[12:56:14.572] <TB0> INFO: 2560 events read in total (299ms).
[12:56:14.572] <TB0> INFO: Test took 1196ms.
[12:56:14.575] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:56:14.880] <TB0> INFO: Expecting 2560 events.
[12:56:15.770] <TB0> INFO: 2560 events read in total (298ms).
[12:56:15.770] <TB0> INFO: Test took 1195ms.
[12:56:16.242] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 650 seconds
[12:56:16.242] <TB0> INFO: PH scale (per ROC): 47 46 38 42 57 48 47 57 56 62 55 44 48 48 63 61
[12:56:16.242] <TB0> INFO: PH offset (per ROC): 107 109 83 108 107 112 117 116 126 116 115 111 106 95 117 118
[12:56:16.253] <TB0> INFO: Decoding statistics:
[12:56:16.253] <TB0> INFO: General information:
[12:56:16.253] <TB0> INFO: 16bit words read: 127884
[12:56:16.253] <TB0> INFO: valid events total: 20480
[12:56:16.253] <TB0> INFO: empty events: 17978
[12:56:16.253] <TB0> INFO: valid events with pixels: 2502
[12:56:16.253] <TB0> INFO: valid pixel hits: 2502
[12:56:16.253] <TB0> INFO: Event errors: 0
[12:56:16.253] <TB0> INFO: start marker: 0
[12:56:16.253] <TB0> INFO: stop marker: 0
[12:56:16.253] <TB0> INFO: overflow: 0
[12:56:16.253] <TB0> INFO: invalid 5bit words: 0
[12:56:16.253] <TB0> INFO: invalid XOR eye diagram: 0
[12:56:16.253] <TB0> INFO: frame (failed synchr.): 0
[12:56:16.253] <TB0> INFO: idle data (no TBM trl): 0
[12:56:16.254] <TB0> INFO: no data (only TBM hdr): 0
[12:56:16.254] <TB0> INFO: TBM errors: 0
[12:56:16.254] <TB0> INFO: flawed TBM headers: 0
[12:56:16.254] <TB0> INFO: flawed TBM trailers: 0
[12:56:16.254] <TB0> INFO: event ID mismatches: 0
[12:56:16.254] <TB0> INFO: ROC errors: 0
[12:56:16.254] <TB0> INFO: missing ROC header(s): 0
[12:56:16.254] <TB0> INFO: misplaced readback start: 0
[12:56:16.254] <TB0> INFO: Pixel decoding errors: 0
[12:56:16.254] <TB0> INFO: pixel data incomplete: 0
[12:56:16.254] <TB0> INFO: pixel address: 0
[12:56:16.254] <TB0> INFO: pulse height fill bit: 0
[12:56:16.254] <TB0> INFO: buffer corruption: 0
[12:56:16.447] <TB0> INFO: ######################################################################
[12:56:16.447] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[12:56:16.447] <TB0> INFO: ######################################################################
[12:56:16.460] <TB0> INFO: scanning low vcal = 10
[12:56:16.696] <TB0> INFO: Expecting 41600 events.
[12:56:20.287] <TB0> INFO: 41600 events read in total (2999ms).
[12:56:20.287] <TB0> INFO: Test took 3827ms.
[12:56:20.289] <TB0> INFO: scanning low vcal = 20
[12:56:20.584] <TB0> INFO: Expecting 41600 events.
[12:56:24.190] <TB0> INFO: 41600 events read in total (3014ms).
[12:56:24.191] <TB0> INFO: Test took 3902ms.
[12:56:24.192] <TB0> INFO: scanning low vcal = 30
[12:56:24.486] <TB0> INFO: Expecting 41600 events.
[12:56:28.158] <TB0> INFO: 41600 events read in total (3081ms).
[12:56:28.159] <TB0> INFO: Test took 3967ms.
[12:56:28.162] <TB0> INFO: scanning low vcal = 40
[12:56:28.439] <TB0> INFO: Expecting 41600 events.
[12:56:32.432] <TB0> INFO: 41600 events read in total (3401ms).
[12:56:32.433] <TB0> INFO: Test took 4271ms.
[12:56:32.436] <TB0> INFO: scanning low vcal = 50
[12:56:32.714] <TB0> INFO: Expecting 41600 events.
[12:56:36.700] <TB0> INFO: 41600 events read in total (3395ms).
[12:56:36.701] <TB0> INFO: Test took 4264ms.
[12:56:36.704] <TB0> INFO: scanning low vcal = 60
[12:56:36.981] <TB0> INFO: Expecting 41600 events.
[12:56:40.926] <TB0> INFO: 41600 events read in total (3354ms).
[12:56:40.927] <TB0> INFO: Test took 4223ms.
[12:56:40.930] <TB0> INFO: scanning low vcal = 70
[12:56:41.206] <TB0> INFO: Expecting 41600 events.
[12:56:45.195] <TB0> INFO: 41600 events read in total (3397ms).
[12:56:45.196] <TB0> INFO: Test took 4266ms.
[12:56:45.200] <TB0> INFO: scanning low vcal = 80
[12:56:45.476] <TB0> INFO: Expecting 41600 events.
[12:56:49.431] <TB0> INFO: 41600 events read in total (3363ms).
[12:56:49.432] <TB0> INFO: Test took 4232ms.
[12:56:49.436] <TB0> INFO: scanning low vcal = 90
[12:56:49.712] <TB0> INFO: Expecting 41600 events.
[12:56:53.684] <TB0> INFO: 41600 events read in total (3381ms).
[12:56:53.685] <TB0> INFO: Test took 4249ms.
[12:56:53.689] <TB0> INFO: scanning low vcal = 100
[12:56:53.965] <TB0> INFO: Expecting 41600 events.
[12:56:57.921] <TB0> INFO: 41600 events read in total (3365ms).
[12:56:57.922] <TB0> INFO: Test took 4232ms.
[12:56:57.925] <TB0> INFO: scanning low vcal = 110
[12:56:58.202] <TB0> INFO: Expecting 41600 events.
[12:57:02.157] <TB0> INFO: 41600 events read in total (3365ms).
[12:57:02.158] <TB0> INFO: Test took 4233ms.
[12:57:02.162] <TB0> INFO: scanning low vcal = 120
[12:57:02.438] <TB0> INFO: Expecting 41600 events.
[12:57:06.381] <TB0> INFO: 41600 events read in total (3351ms).
[12:57:06.382] <TB0> INFO: Test took 4220ms.
[12:57:06.386] <TB0> INFO: scanning low vcal = 130
[12:57:06.662] <TB0> INFO: Expecting 41600 events.
[12:57:10.604] <TB0> INFO: 41600 events read in total (3350ms).
[12:57:10.605] <TB0> INFO: Test took 4219ms.
[12:57:10.608] <TB0> INFO: scanning low vcal = 140
[12:57:10.885] <TB0> INFO: Expecting 41600 events.
[12:57:14.945] <TB0> INFO: 41600 events read in total (3469ms).
[12:57:14.946] <TB0> INFO: Test took 4338ms.
[12:57:14.948] <TB0> INFO: scanning low vcal = 150
[12:57:15.225] <TB0> INFO: Expecting 41600 events.
[12:57:19.220] <TB0> INFO: 41600 events read in total (3403ms).
[12:57:19.221] <TB0> INFO: Test took 4272ms.
[12:57:19.224] <TB0> INFO: scanning low vcal = 160
[12:57:19.526] <TB0> INFO: Expecting 41600 events.
[12:57:23.582] <TB0> INFO: 41600 events read in total (3464ms).
[12:57:23.583] <TB0> INFO: Test took 4359ms.
[12:57:23.587] <TB0> INFO: scanning low vcal = 170
[12:57:23.863] <TB0> INFO: Expecting 41600 events.
[12:57:27.867] <TB0> INFO: 41600 events read in total (3412ms).
[12:57:27.868] <TB0> INFO: Test took 4281ms.
[12:57:27.874] <TB0> INFO: scanning low vcal = 180
[12:57:28.148] <TB0> INFO: Expecting 41600 events.
[12:57:32.174] <TB0> INFO: 41600 events read in total (3435ms).
[12:57:32.175] <TB0> INFO: Test took 4301ms.
[12:57:32.178] <TB0> INFO: scanning low vcal = 190
[12:57:32.475] <TB0> INFO: Expecting 41600 events.
[12:57:36.458] <TB0> INFO: 41600 events read in total (3391ms).
[12:57:36.459] <TB0> INFO: Test took 4281ms.
[12:57:36.462] <TB0> INFO: scanning low vcal = 200
[12:57:36.738] <TB0> INFO: Expecting 41600 events.
[12:57:40.718] <TB0> INFO: 41600 events read in total (3388ms).
[12:57:40.719] <TB0> INFO: Test took 4257ms.
[12:57:40.722] <TB0> INFO: scanning low vcal = 210
[12:57:40.999] <TB0> INFO: Expecting 41600 events.
[12:57:44.995] <TB0> INFO: 41600 events read in total (3405ms).
[12:57:44.996] <TB0> INFO: Test took 4274ms.
[12:57:44.999] <TB0> INFO: scanning low vcal = 220
[12:57:45.276] <TB0> INFO: Expecting 41600 events.
[12:57:49.234] <TB0> INFO: 41600 events read in total (3367ms).
[12:57:49.235] <TB0> INFO: Test took 4236ms.
[12:57:49.239] <TB0> INFO: scanning low vcal = 230
[12:57:49.515] <TB0> INFO: Expecting 41600 events.
[12:57:53.571] <TB0> INFO: 41600 events read in total (3465ms).
[12:57:53.572] <TB0> INFO: Test took 4333ms.
[12:57:53.575] <TB0> INFO: scanning low vcal = 240
[12:57:53.851] <TB0> INFO: Expecting 41600 events.
[12:57:57.884] <TB0> INFO: 41600 events read in total (3441ms).
[12:57:57.884] <TB0> INFO: Test took 4309ms.
[12:57:57.887] <TB0> INFO: scanning low vcal = 250
[12:57:58.203] <TB0> INFO: Expecting 41600 events.
[12:58:02.271] <TB0> INFO: 41600 events read in total (3476ms).
[12:58:02.271] <TB0> INFO: Test took 4385ms.
[12:58:02.276] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[12:58:02.591] <TB0> INFO: Expecting 41600 events.
[12:58:06.669] <TB0> INFO: 41600 events read in total (3487ms).
[12:58:06.670] <TB0> INFO: Test took 4394ms.
[12:58:06.673] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[12:58:06.949] <TB0> INFO: Expecting 41600 events.
[12:58:10.956] <TB0> INFO: 41600 events read in total (3415ms).
[12:58:10.957] <TB0> INFO: Test took 4284ms.
[12:58:10.960] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[12:58:11.237] <TB0> INFO: Expecting 41600 events.
[12:58:15.272] <TB0> INFO: 41600 events read in total (3444ms).
[12:58:15.272] <TB0> INFO: Test took 4312ms.
[12:58:15.276] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[12:58:15.552] <TB0> INFO: Expecting 41600 events.
[12:58:19.550] <TB0> INFO: 41600 events read in total (3406ms).
[12:58:19.551] <TB0> INFO: Test took 4275ms.
[12:58:19.554] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:58:19.831] <TB0> INFO: Expecting 41600 events.
[12:58:23.828] <TB0> INFO: 41600 events read in total (3405ms).
[12:58:23.829] <TB0> INFO: Test took 4274ms.
[12:58:24.236] <TB0> INFO: PixTestGainPedestal::measure() done
[12:58:57.206] <TB0> INFO: PixTestGainPedestal::fit() done
[12:58:57.206] <TB0> INFO: non-linearity mean: 0.924 0.930 0.997 0.912 0.976 0.969 0.939 0.982 0.973 0.981 0.982 0.943 0.947 0.939 0.986 0.984
[12:58:57.206] <TB0> INFO: non-linearity RMS: 0.100 0.105 0.198 0.117 0.008 0.025 0.068 0.004 0.006 0.004 0.004 0.117 0.051 0.103 0.002 0.004
[12:58:57.206] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[12:58:57.219] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[12:58:57.233] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[12:58:57.247] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[12:58:57.260] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[12:58:57.274] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[12:58:57.287] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[12:58:57.300] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[12:58:57.314] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[12:58:57.327] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[12:58:57.340] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[12:58:57.354] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[12:58:57.367] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[12:58:57.380] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[12:58:57.394] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[12:58:57.407] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1044_FullQualification_2016-10-22_10h41m_1477125660//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[12:58:57.421] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 160 seconds
[12:58:57.421] <TB0> INFO: Decoding statistics:
[12:58:57.421] <TB0> INFO: General information:
[12:58:57.421] <TB0> INFO: 16bit words read: 3327578
[12:58:57.421] <TB0> INFO: valid events total: 332800
[12:58:57.421] <TB0> INFO: empty events: 1
[12:58:57.421] <TB0> INFO: valid events with pixels: 332799
[12:58:57.421] <TB0> INFO: valid pixel hits: 665389
[12:58:57.421] <TB0> INFO: Event errors: 0
[12:58:57.421] <TB0> INFO: start marker: 0
[12:58:57.421] <TB0> INFO: stop marker: 0
[12:58:57.421] <TB0> INFO: overflow: 0
[12:58:57.421] <TB0> INFO: invalid 5bit words: 0
[12:58:57.421] <TB0> INFO: invalid XOR eye diagram: 0
[12:58:57.421] <TB0> INFO: frame (failed synchr.): 0
[12:58:57.421] <TB0> INFO: idle data (no TBM trl): 0
[12:58:57.421] <TB0> INFO: no data (only TBM hdr): 0
[12:58:57.421] <TB0> INFO: TBM errors: 0
[12:58:57.421] <TB0> INFO: flawed TBM headers: 0
[12:58:57.421] <TB0> INFO: flawed TBM trailers: 0
[12:58:57.421] <TB0> INFO: event ID mismatches: 0
[12:58:57.421] <TB0> INFO: ROC errors: 0
[12:58:57.421] <TB0> INFO: missing ROC header(s): 0
[12:58:57.421] <TB0> INFO: misplaced readback start: 0
[12:58:57.421] <TB0> INFO: Pixel decoding errors: 0
[12:58:57.421] <TB0> INFO: pixel data incomplete: 0
[12:58:57.421] <TB0> INFO: pixel address: 0
[12:58:57.421] <TB0> INFO: pulse height fill bit: 0
[12:58:57.421] <TB0> INFO: buffer corruption: 0
[12:58:57.438] <TB0> INFO: Decoding statistics:
[12:58:57.438] <TB0> INFO: General information:
[12:58:57.438] <TB0> INFO: 16bit words read: 3456998
[12:58:57.438] <TB0> INFO: valid events total: 353536
[12:58:57.438] <TB0> INFO: empty events: 18235
[12:58:57.438] <TB0> INFO: valid events with pixels: 335301
[12:58:57.438] <TB0> INFO: valid pixel hits: 667891
[12:58:57.438] <TB0> INFO: Event errors: 0
[12:58:57.438] <TB0> INFO: start marker: 0
[12:58:57.438] <TB0> INFO: stop marker: 0
[12:58:57.438] <TB0> INFO: overflow: 0
[12:58:57.438] <TB0> INFO: invalid 5bit words: 0
[12:58:57.438] <TB0> INFO: invalid XOR eye diagram: 0
[12:58:57.438] <TB0> INFO: frame (failed synchr.): 0
[12:58:57.438] <TB0> INFO: idle data (no TBM trl): 0
[12:58:57.438] <TB0> INFO: no data (only TBM hdr): 0
[12:58:57.438] <TB0> INFO: TBM errors: 0
[12:58:57.438] <TB0> INFO: flawed TBM headers: 0
[12:58:57.439] <TB0> INFO: flawed TBM trailers: 0
[12:58:57.439] <TB0> INFO: event ID mismatches: 0
[12:58:57.439] <TB0> INFO: ROC errors: 0
[12:58:57.439] <TB0> INFO: missing ROC header(s): 0
[12:58:57.439] <TB0> INFO: misplaced readback start: 0
[12:58:57.439] <TB0> INFO: Pixel decoding errors: 0
[12:58:57.439] <TB0> INFO: pixel data incomplete: 0
[12:58:57.439] <TB0> INFO: pixel address: 0
[12:58:57.439] <TB0> INFO: pulse height fill bit: 0
[12:58:57.439] <TB0> INFO: buffer corruption: 0
[12:58:57.439] <TB0> INFO: enter test to run
[12:58:57.439] <TB0> INFO: test: exit no parameter change
[12:58:57.559] <TB0> QUIET: Connection to board 71 closed.
[12:58:57.561] <TB0> INFO: pXar: this is the end, my friend