[20:58:05.009] <TB2> INFO: *** Welcome to pxar ***
[20:58:05.009] <TB2> INFO: *** Today: 2016/10/21
[20:58:05.016] <TB2> INFO: *** Version: c8ba-dirty
[20:58:05.016] <TB2> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters_C15.dat
[20:58:05.017] <TB2> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//tbmParameters_C1b.dat
[20:58:05.017] <TB2> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//defaultMaskFile.dat
[20:58:05.017] <TB2> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//trimParameters_C15.dat
[20:58:05.083] <TB2> INFO: clk: 4
[20:58:05.083] <TB2> INFO: ctr: 4
[20:58:05.083] <TB2> INFO: sda: 19
[20:58:05.083] <TB2> INFO: tin: 9
[20:58:05.083] <TB2> INFO: level: 15
[20:58:05.083] <TB2> INFO: triggerdelay: 0
[20:58:05.083] <TB2> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[20:58:05.083] <TB2> INFO: Log level: INFO
[20:58:05.092] <TB2> INFO: Found DTB DTB_WWXUD2
[20:58:05.099] <TB2> QUIET: Connection to board DTB_WWXUD2 opened.
[20:58:05.101] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 149
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWXUD2
MAC address: 40D855118095
Hostname: pixelDTB149
Comment:
------------------------------------------------------
[20:58:05.103] <TB2> INFO: RPC call hashes of host and DTB match: 486171790
[20:58:06.596] <TB2> INFO: DUT info:
[20:58:06.596] <TB2> INFO: The DUT currently contains the following objects:
[20:58:06.596] <TB2> INFO: 4 TBM Cores tbm10c (4 ON)
[20:58:06.596] <TB2> INFO: TBM Core alpha (0): 7 registers set
[20:58:06.596] <TB2> INFO: TBM Core beta (1): 7 registers set
[20:58:06.596] <TB2> INFO: TBM Core alpha (2): 7 registers set
[20:58:06.596] <TB2> INFO: TBM Core beta (3): 7 registers set
[20:58:06.596] <TB2> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[20:58:06.596] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[20:58:06.596] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[20:58:06.596] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[20:58:06.596] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[20:58:06.596] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[20:58:06.596] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[20:58:06.596] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[20:58:06.596] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[20:58:06.596] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[20:58:06.596] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[20:58:06.597] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[20:58:06.597] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[20:58:06.597] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[20:58:06.597] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[20:58:06.597] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[20:58:06.597] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[20:58:06.998] <TB2> INFO: enter 'restricted' command line mode
[20:58:06.998] <TB2> INFO: enter test to run
[20:58:06.998] <TB2> INFO: test: pretest no parameter change
[20:58:06.998] <TB2> INFO: running: pretest
[20:58:06.004] <TB2> INFO: ######################################################################
[20:58:06.004] <TB2> INFO: PixTestPretest::doTest()
[20:58:06.004] <TB2> INFO: ######################################################################
[20:58:06.005] <TB2> INFO: ----------------------------------------------------------------------
[20:58:06.005] <TB2> INFO: PixTestPretest::programROC()
[20:58:06.005] <TB2> INFO: ----------------------------------------------------------------------
[20:58:25.019] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[20:58:25.020] <TB2> INFO: IA differences per ROC: 19.3 17.7 19.3 18.5 17.7 20.1 18.5 19.3 20.1 22.5 19.3 19.3 18.5 19.3 20.1 19.3
[20:58:25.086] <TB2> INFO: ----------------------------------------------------------------------
[20:58:25.086] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[20:58:25.086] <TB2> INFO: ----------------------------------------------------------------------
[20:58:46.389] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 379.4 mA = 23.7125 mA/ROC
[20:58:46.389] <TB2> INFO: i(loss) [mA/ROC]: 20.1 19.3 20.1 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3
[20:58:46.423] <TB2> INFO: ----------------------------------------------------------------------
[20:58:46.423] <TB2> INFO: PixTestPretest::findTiming()
[20:58:46.424] <TB2> INFO: ----------------------------------------------------------------------
[20:58:46.424] <TB2> INFO: PixTestCmd::init()

[20:59:18.891] <TB2> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[20:59:18.891] <TB2> INFO: (success/tries = 100/100), width = 3
[20:59:20.392] <TB2> INFO: ----------------------------------------------------------------------
[20:59:20.392] <TB2> INFO: PixTestPretest::findWorkingPixel()
[20:59:20.392] <TB2> INFO: ----------------------------------------------------------------------
[20:59:20.487] <TB2> INFO: Expecting 231680 events.
[20:59:30.220] <TB2> INFO: 231680 events read in total (9141ms).
[20:59:30.228] <TB2> INFO: Test took 9831ms.
[20:59:30.465] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[20:59:30.500] <TB2> INFO: ----------------------------------------------------------------------
[20:59:30.500] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[20:59:30.500] <TB2> INFO: ----------------------------------------------------------------------
[20:59:30.594] <TB2> INFO: Expecting 231680 events.
[20:59:40.455] <TB2> INFO: 231680 events read in total (9269ms).
[20:59:40.466] <TB2> INFO: Test took 9961ms.
[20:59:40.717] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[20:59:40.717] <TB2> INFO: CalDel: 104 92 92 85 110 112 97 86 90 99 94 105 86 105 101 100
[20:59:40.717] <TB2> INFO: VthrComp: 51 58 55 51 56 52 51 51 51 51 51 51 51 51 54 51
[20:59:40.719] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters_C0.dat
[20:59:40.719] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters_C1.dat
[20:59:40.720] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters_C2.dat
[20:59:40.720] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters_C3.dat
[20:59:40.720] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters_C4.dat
[20:59:40.720] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters_C5.dat
[20:59:40.720] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters_C6.dat
[20:59:40.720] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters_C7.dat
[20:59:40.720] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters_C8.dat
[20:59:40.720] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters_C9.dat
[20:59:40.720] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters_C10.dat
[20:59:40.720] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters_C11.dat
[20:59:40.720] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters_C12.dat
[20:59:40.721] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters_C13.dat
[20:59:40.721] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters_C14.dat
[20:59:40.721] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters_C15.dat
[20:59:40.721] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//tbmParameters_C0a.dat
[20:59:40.721] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//tbmParameters_C0b.dat
[20:59:40.721] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//tbmParameters_C1a.dat
[20:59:40.721] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//tbmParameters_C1b.dat
[20:59:40.721] <TB2> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[20:59:40.773] <TB2> INFO: enter test to run
[20:59:40.773] <TB2> INFO: test: FullTest no parameter change
[20:59:40.773] <TB2> INFO: running: fulltest
[20:59:40.773] <TB2> INFO: ######################################################################
[20:59:40.773] <TB2> INFO: PixTestFullTest::doTest()
[20:59:40.773] <TB2> INFO: ######################################################################
[20:59:40.774] <TB2> INFO: ######################################################################
[20:59:40.774] <TB2> INFO: PixTestAlive::doTest()
[20:59:40.774] <TB2> INFO: ######################################################################
[20:59:40.775] <TB2> INFO: ----------------------------------------------------------------------
[20:59:40.775] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:59:40.775] <TB2> INFO: ----------------------------------------------------------------------
[20:59:41.013] <TB2> INFO: Expecting 41600 events.
[20:59:44.556] <TB2> INFO: 41600 events read in total (2951ms).
[20:59:44.556] <TB2> INFO: Test took 3779ms.
[20:59:44.788] <TB2> INFO: PixTestAlive::aliveTest() done
[20:59:44.788] <TB2> INFO: number of dead pixels (per ROC): 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:59:44.790] <TB2> INFO: ----------------------------------------------------------------------
[20:59:44.790] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:59:44.790] <TB2> INFO: ----------------------------------------------------------------------
[20:59:45.036] <TB2> INFO: Expecting 41600 events.
[20:59:48.009] <TB2> INFO: 41600 events read in total (2381ms).
[20:59:48.010] <TB2> INFO: Test took 3219ms.
[20:59:48.010] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[20:59:48.250] <TB2> INFO: PixTestAlive::maskTest() done
[20:59:48.250] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:59:48.253] <TB2> INFO: ----------------------------------------------------------------------
[20:59:48.253] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:59:48.253] <TB2> INFO: ----------------------------------------------------------------------
[20:59:48.495] <TB2> INFO: Expecting 41600 events.
[20:59:52.021] <TB2> INFO: 41600 events read in total (2934ms).
[20:59:52.021] <TB2> INFO: Test took 3766ms.
[20:59:52.258] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[20:59:52.258] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:59:52.258] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[20:59:52.258] <TB2> INFO: Decoding statistics:
[20:59:52.258] <TB2> INFO: General information:
[20:59:52.258] <TB2> INFO: 16bit words read: 0
[20:59:52.258] <TB2> INFO: valid events total: 0
[20:59:52.258] <TB2> INFO: empty events: 0
[20:59:52.258] <TB2> INFO: valid events with pixels: 0
[20:59:52.258] <TB2> INFO: valid pixel hits: 0
[20:59:52.258] <TB2> INFO: Event errors: 0
[20:59:52.259] <TB2> INFO: start marker: 0
[20:59:52.259] <TB2> INFO: stop marker: 0
[20:59:52.259] <TB2> INFO: overflow: 0
[20:59:52.259] <TB2> INFO: invalid 5bit words: 0
[20:59:52.259] <TB2> INFO: invalid XOR eye diagram: 0
[20:59:52.259] <TB2> INFO: frame (failed synchr.): 0
[20:59:52.259] <TB2> INFO: idle data (no TBM trl): 0
[20:59:52.259] <TB2> INFO: no data (only TBM hdr): 0
[20:59:52.259] <TB2> INFO: TBM errors: 0
[20:59:52.259] <TB2> INFO: flawed TBM headers: 0
[20:59:52.259] <TB2> INFO: flawed TBM trailers: 0
[20:59:52.259] <TB2> INFO: event ID mismatches: 0
[20:59:52.259] <TB2> INFO: ROC errors: 0
[20:59:52.259] <TB2> INFO: missing ROC header(s): 0
[20:59:52.259] <TB2> INFO: misplaced readback start: 0
[20:59:52.259] <TB2> INFO: Pixel decoding errors: 0
[20:59:52.259] <TB2> INFO: pixel data incomplete: 0
[20:59:52.259] <TB2> INFO: pixel address: 0
[20:59:52.259] <TB2> INFO: pulse height fill bit: 0
[20:59:52.259] <TB2> INFO: buffer corruption: 0
[20:59:52.264] <TB2> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C15.dat
[20:59:52.265] <TB2> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//phCalibrationFitErr_C15.dat

[20:59:52.265] <TB2> INFO: ######################################################################
[20:59:52.265] <TB2> INFO: PixTestReadback::doTest()
[20:59:52.265] <TB2> INFO: ######################################################################
[20:59:52.265] <TB2> INFO: ----------------------------------------------------------------------
[20:59:52.265] <TB2> INFO: PixTestReadback::CalibrateVd()
[20:59:52.265] <TB2> INFO: ----------------------------------------------------------------------
[21:00:02.232] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C0.dat
[21:00:02.232] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C1.dat
[21:00:02.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C2.dat
[21:00:02.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C3.dat
[21:00:02.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C4.dat
[21:00:02.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C5.dat
[21:00:02.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C6.dat
[21:00:02.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C7.dat
[21:00:02.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C8.dat
[21:00:02.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C9.dat
[21:00:02.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C10.dat
[21:00:02.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C11.dat
[21:00:02.233] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C12.dat
[21:00:02.234] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C13.dat
[21:00:02.234] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C14.dat
[21:00:02.234] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C15.dat
[21:00:02.264] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[21:00:02.264] <TB2> INFO: ----------------------------------------------------------------------
[21:00:02.264] <TB2> INFO: PixTestReadback::CalibrateVa()
[21:00:02.264] <TB2> INFO: ----------------------------------------------------------------------
[21:00:12.205] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C0.dat
[21:00:12.206] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C1.dat
[21:00:12.206] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C2.dat
[21:00:12.206] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C3.dat
[21:00:12.206] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C4.dat
[21:00:12.206] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C5.dat
[21:00:12.206] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C6.dat
[21:00:12.206] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C7.dat
[21:00:12.206] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C8.dat
[21:00:12.206] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C9.dat
[21:00:12.206] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C10.dat
[21:00:12.206] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C11.dat
[21:00:12.206] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C12.dat
[21:00:12.206] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C13.dat
[21:00:12.206] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C14.dat
[21:00:12.207] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C15.dat
[21:00:12.237] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[21:00:12.237] <TB2> INFO: ----------------------------------------------------------------------
[21:00:12.237] <TB2> INFO: PixTestReadback::readbackVbg()
[21:00:12.237] <TB2> INFO: ----------------------------------------------------------------------
[21:00:19.910] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[21:00:19.910] <TB2> INFO: ----------------------------------------------------------------------
[21:00:19.910] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[21:00:19.910] <TB2> INFO: ----------------------------------------------------------------------
[21:00:19.910] <TB2> INFO: Vbg will be calibrated using Vd calibration
[21:00:19.910] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 154.7calibrated Vbg = 1.1996 :::*/*/*/*/
[21:00:19.910] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 162.5calibrated Vbg = 1.19513 :::*/*/*/*/
[21:00:19.910] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 159.7calibrated Vbg = 1.19863 :::*/*/*/*/
[21:00:19.910] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 153.4calibrated Vbg = 1.18796 :::*/*/*/*/
[21:00:19.910] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 163calibrated Vbg = 1.19826 :::*/*/*/*/
[21:00:19.910] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 149.2calibrated Vbg = 1.20083 :::*/*/*/*/
[21:00:19.910] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 154.9calibrated Vbg = 1.19913 :::*/*/*/*/
[21:00:19.910] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 163.5calibrated Vbg = 1.20244 :::*/*/*/*/
[21:00:19.911] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 160.9calibrated Vbg = 1.19694 :::*/*/*/*/
[21:00:19.911] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 150.2calibrated Vbg = 1.20099 :::*/*/*/*/
[21:00:19.911] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 147.3calibrated Vbg = 1.18662 :::*/*/*/*/
[21:00:19.911] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 155.2calibrated Vbg = 1.18449 :::*/*/*/*/
[21:00:19.911] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 155.6calibrated Vbg = 1.18999 :::*/*/*/*/
[21:00:19.911] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 145.5calibrated Vbg = 1.19553 :::*/*/*/*/
[21:00:19.911] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 151.9calibrated Vbg = 1.19407 :::*/*/*/*/
[21:00:19.911] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 154.7calibrated Vbg = 1.19528 :::*/*/*/*/
[21:00:19.913] <TB2> INFO: ----------------------------------------------------------------------
[21:00:19.914] <TB2> INFO: PixTestReadback::CalibrateIa()
[21:00:19.914] <TB2> INFO: ----------------------------------------------------------------------
[21:03:00.766] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C0.dat
[21:03:00.766] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C1.dat
[21:03:00.766] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C2.dat
[21:03:00.766] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C3.dat
[21:03:00.766] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C4.dat
[21:03:00.766] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C5.dat
[21:03:00.766] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C6.dat
[21:03:00.766] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C7.dat
[21:03:00.766] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C8.dat
[21:03:00.766] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C9.dat
[21:03:00.766] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C10.dat
[21:03:00.766] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C11.dat
[21:03:00.766] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C12.dat
[21:03:00.766] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C13.dat
[21:03:00.766] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C14.dat
[21:03:00.766] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//readbackCal_C15.dat
[21:03:00.793] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[21:03:00.794] <TB2> INFO: PixTestReadback::doTest() done
[21:03:00.795] <TB2> INFO: Decoding statistics:
[21:03:00.795] <TB2> INFO: General information:
[21:03:00.795] <TB2> INFO: 16bit words read: 1536
[21:03:00.795] <TB2> INFO: valid events total: 256
[21:03:00.795] <TB2> INFO: empty events: 256
[21:03:00.795] <TB2> INFO: valid events with pixels: 0
[21:03:00.795] <TB2> INFO: valid pixel hits: 0
[21:03:00.795] <TB2> INFO: Event errors: 0
[21:03:00.795] <TB2> INFO: start marker: 0
[21:03:00.795] <TB2> INFO: stop marker: 0
[21:03:00.795] <TB2> INFO: overflow: 0
[21:03:00.795] <TB2> INFO: invalid 5bit words: 0
[21:03:00.795] <TB2> INFO: invalid XOR eye diagram: 0
[21:03:00.795] <TB2> INFO: frame (failed synchr.): 0
[21:03:00.795] <TB2> INFO: idle data (no TBM trl): 0
[21:03:00.795] <TB2> INFO: no data (only TBM hdr): 0
[21:03:00.795] <TB2> INFO: TBM errors: 0
[21:03:00.795] <TB2> INFO: flawed TBM headers: 0
[21:03:00.795] <TB2> INFO: flawed TBM trailers: 0
[21:03:00.795] <TB2> INFO: event ID mismatches: 0
[21:03:00.795] <TB2> INFO: ROC errors: 0
[21:03:00.795] <TB2> INFO: missing ROC header(s): 0
[21:03:00.795] <TB2> INFO: misplaced readback start: 0
[21:03:00.795] <TB2> INFO: Pixel decoding errors: 0
[21:03:00.795] <TB2> INFO: pixel data incomplete: 0
[21:03:00.795] <TB2> INFO: pixel address: 0
[21:03:00.795] <TB2> INFO: pulse height fill bit: 0
[21:03:00.795] <TB2> INFO: buffer corruption: 0
[21:03:00.851] <TB2> INFO: ######################################################################
[21:03:00.851] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[21:03:00.851] <TB2> INFO: ######################################################################
[21:03:00.854] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[21:03:00.867] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:03:00.867] <TB2> INFO: run 1 of 1
[21:03:01.106] <TB2> INFO: Expecting 3120000 events.
[21:03:32.489] <TB2> INFO: 671340 events read in total (30791ms).




















[21:04:02.677] <TB2> INFO: 1336485 events read in total (60979ms).











[21:04:33.119] <TB2> INFO: 2000660 events read in total (91421ms).











[21:05:03.191] <TB2> INFO: 2667810 events read in total (121493ms).











[21:05:24.082] <TB2> INFO: 3120000 events read in total (142384ms).
[21:05:24.146] <TB2> INFO: Test took 143281ms.
[21:05:50.245] <TB2> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 169 seconds
[21:05:50.245] <TB2> INFO: number of dead bumps (per ROC): 1 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0
[21:05:50.245] <TB2> INFO: separation cut (per ROC): 105 110 105 104 104 95 93 112 110 126 112 108 104 104 106 104
[21:05:50.245] <TB2> INFO: Decoding statistics:
[21:05:50.245] <TB2> INFO: General information:
[21:05:50.245] <TB2> INFO: 16bit words read: 0
[21:05:50.245] <TB2> INFO: valid events total: 0
[21:05:50.245] <TB2> INFO: empty events: 0
[21:05:50.245] <TB2> INFO: valid events with pixels: 0
[21:05:50.245] <TB2> INFO: valid pixel hits: 0
[21:05:50.245] <TB2> INFO: Event errors: 0
[21:05:50.245] <TB2> INFO: start marker: 0
[21:05:50.245] <TB2> INFO: stop marker: 0
[21:05:50.245] <TB2> INFO: overflow: 0
[21:05:50.245] <TB2> INFO: invalid 5bit words: 0
[21:05:50.246] <TB2> INFO: invalid XOR eye diagram: 0
[21:05:50.246] <TB2> INFO: frame (failed synchr.): 0
[21:05:50.246] <TB2> INFO: idle data (no TBM trl): 0
[21:05:50.246] <TB2> INFO: no data (only TBM hdr): 0
[21:05:50.246] <TB2> INFO: TBM errors: 0
[21:05:50.246] <TB2> INFO: flawed TBM headers: 0
[21:05:50.246] <TB2> INFO: flawed TBM trailers: 0
[21:05:50.246] <TB2> INFO: event ID mismatches: 0
[21:05:50.246] <TB2> INFO: ROC errors: 0
[21:05:50.246] <TB2> INFO: missing ROC header(s): 0
[21:05:50.246] <TB2> INFO: misplaced readback start: 0
[21:05:50.246] <TB2> INFO: Pixel decoding errors: 0
[21:05:50.246] <TB2> INFO: pixel data incomplete: 0
[21:05:50.246] <TB2> INFO: pixel address: 0
[21:05:50.246] <TB2> INFO: pulse height fill bit: 0
[21:05:50.246] <TB2> INFO: buffer corruption: 0
[21:05:50.285] <TB2> INFO: ######################################################################
[21:05:50.285] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[21:05:50.285] <TB2> INFO: ######################################################################
[21:05:50.286] <TB2> INFO: ----------------------------------------------------------------------
[21:05:50.286] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[21:05:50.286] <TB2> INFO: ----------------------------------------------------------------------
[21:05:50.286] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[21:05:50.299] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[21:05:50.299] <TB2> INFO: run 1 of 1
[21:05:50.558] <TB2> INFO: Expecting 36608000 events.
[21:06:14.366] <TB2> INFO: 700900 events read in total (23210ms).
[21:06:37.479] <TB2> INFO: 1380750 events read in total (46323ms).
[21:07:00.358] <TB2> INFO: 2064550 events read in total (69202ms).
[21:07:23.682] <TB2> INFO: 2743450 events read in total (92526ms).
[21:07:46.555] <TB2> INFO: 3425550 events read in total (115399ms).
[21:08:09.515] <TB2> INFO: 4103250 events read in total (138359ms).
[21:08:32.435] <TB2> INFO: 4784450 events read in total (161279ms).
[21:08:55.067] <TB2> INFO: 5462450 events read in total (183911ms).
[21:09:18.269] <TB2> INFO: 6144900 events read in total (207113ms).
[21:09:41.474] <TB2> INFO: 6826600 events read in total (230318ms).
[21:10:04.351] <TB2> INFO: 7505050 events read in total (253195ms).
[21:10:27.381] <TB2> INFO: 8182850 events read in total (276225ms).
[21:10:50.082] <TB2> INFO: 8860050 events read in total (298926ms).
[21:11:12.991] <TB2> INFO: 9537500 events read in total (321835ms).
[21:11:35.893] <TB2> INFO: 10215050 events read in total (344737ms).
[21:11:58.477] <TB2> INFO: 10893500 events read in total (367321ms).
[21:12:21.070] <TB2> INFO: 11570800 events read in total (389914ms).
[21:12:43.921] <TB2> INFO: 12247200 events read in total (412765ms).
[21:13:06.769] <TB2> INFO: 12922150 events read in total (435613ms).
[21:13:29.492] <TB2> INFO: 13596950 events read in total (458336ms).
[21:13:52.146] <TB2> INFO: 14270150 events read in total (480990ms).
[21:14:15.124] <TB2> INFO: 14945600 events read in total (503968ms).
[21:14:38.223] <TB2> INFO: 15619500 events read in total (527068ms).
[21:15:01.229] <TB2> INFO: 16295750 events read in total (550073ms).
[21:15:24.082] <TB2> INFO: 16969100 events read in total (572926ms).
[21:15:46.770] <TB2> INFO: 17644700 events read in total (595614ms).
[21:16:09.453] <TB2> INFO: 18317550 events read in total (618297ms).
[21:16:32.095] <TB2> INFO: 18989150 events read in total (640939ms).
[21:16:54.675] <TB2> INFO: 19656650 events read in total (663519ms).
[21:17:17.469] <TB2> INFO: 20327300 events read in total (686313ms).
[21:17:40.099] <TB2> INFO: 20996450 events read in total (708943ms).
[21:18:02.773] <TB2> INFO: 21666550 events read in total (731617ms).
[21:18:25.381] <TB2> INFO: 22337650 events read in total (754225ms).
[21:18:48.052] <TB2> INFO: 23008350 events read in total (776896ms).
[21:19:10.856] <TB2> INFO: 23678350 events read in total (799700ms).
[21:19:33.527] <TB2> INFO: 24348000 events read in total (822371ms).
[21:19:56.213] <TB2> INFO: 25017000 events read in total (845057ms).
[21:20:18.769] <TB2> INFO: 25686400 events read in total (867613ms).
[21:20:41.413] <TB2> INFO: 26355650 events read in total (890257ms).
[21:21:04.127] <TB2> INFO: 27025050 events read in total (912971ms).
[21:21:26.852] <TB2> INFO: 27697050 events read in total (935696ms).
[21:21:49.556] <TB2> INFO: 28364850 events read in total (958400ms).
[21:22:12.363] <TB2> INFO: 29035350 events read in total (981207ms).
[21:22:35.124] <TB2> INFO: 29702100 events read in total (1003968ms).
[21:22:57.843] <TB2> INFO: 30368750 events read in total (1026687ms).
[21:23:20.501] <TB2> INFO: 31035000 events read in total (1049345ms).
[21:23:43.127] <TB2> INFO: 31702750 events read in total (1071971ms).
[21:24:05.928] <TB2> INFO: 32366800 events read in total (1094772ms).
[21:24:28.482] <TB2> INFO: 33033350 events read in total (1117326ms).
[21:24:50.975] <TB2> INFO: 33699800 events read in total (1139819ms).
[21:25:13.440] <TB2> INFO: 34368800 events read in total (1162284ms).
[21:25:35.976] <TB2> INFO: 35036850 events read in total (1184820ms).
[21:25:58.787] <TB2> INFO: 35706650 events read in total (1207631ms).
[21:26:22.167] <TB2> INFO: 36384550 events read in total (1231011ms).
[21:26:30.432] <TB2> INFO: 36608000 events read in total (1239276ms).
[21:26:30.493] <TB2> INFO: Test took 1240194ms.
[21:26:30.971] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:26:32.862] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:26:35.172] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:26:36.945] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:26:38.410] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:26:39.863] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:26:41.287] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:26:42.714] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:26:44.113] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:26:45.551] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:26:46.936] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:26:48.647] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:26:50.300] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:26:51.925] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:26:53.581] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:26:55.517] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:26:57.370] <TB2> INFO: PixTestScurves::scurves() done
[21:26:57.370] <TB2> INFO: Vcal mean: 122.00 134.50 133.56 119.72 136.41 123.75 113.05 121.12 124.70 130.02 119.49 130.74 125.30 120.78 132.64 122.68
[21:26:57.370] <TB2> INFO: Vcal RMS: 5.69 6.02 6.90 5.75 8.14 7.87 5.21 6.46 5.95 6.47 6.44 6.06 5.62 6.06 6.45 5.99
[21:26:57.371] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1267 seconds
[21:26:57.371] <TB2> INFO: Decoding statistics:
[21:26:57.371] <TB2> INFO: General information:
[21:26:57.371] <TB2> INFO: 16bit words read: 0
[21:26:57.371] <TB2> INFO: valid events total: 0
[21:26:57.371] <TB2> INFO: empty events: 0
[21:26:57.371] <TB2> INFO: valid events with pixels: 0
[21:26:57.371] <TB2> INFO: valid pixel hits: 0
[21:26:57.371] <TB2> INFO: Event errors: 0
[21:26:57.371] <TB2> INFO: start marker: 0
[21:26:57.371] <TB2> INFO: stop marker: 0
[21:26:57.371] <TB2> INFO: overflow: 0
[21:26:57.371] <TB2> INFO: invalid 5bit words: 0
[21:26:57.371] <TB2> INFO: invalid XOR eye diagram: 0
[21:26:57.371] <TB2> INFO: frame (failed synchr.): 0
[21:26:57.371] <TB2> INFO: idle data (no TBM trl): 0
[21:26:57.371] <TB2> INFO: no data (only TBM hdr): 0
[21:26:57.371] <TB2> INFO: TBM errors: 0
[21:26:57.371] <TB2> INFO: flawed TBM headers: 0
[21:26:57.371] <TB2> INFO: flawed TBM trailers: 0
[21:26:57.371] <TB2> INFO: event ID mismatches: 0
[21:26:57.371] <TB2> INFO: ROC errors: 0
[21:26:57.371] <TB2> INFO: missing ROC header(s): 0
[21:26:57.371] <TB2> INFO: misplaced readback start: 0
[21:26:57.371] <TB2> INFO: Pixel decoding errors: 0
[21:26:57.371] <TB2> INFO: pixel data incomplete: 0
[21:26:57.371] <TB2> INFO: pixel address: 0
[21:26:57.371] <TB2> INFO: pulse height fill bit: 0
[21:26:57.371] <TB2> INFO: buffer corruption: 0
[21:26:57.457] <TB2> INFO: ######################################################################
[21:26:57.457] <TB2> INFO: PixTestTrim::doTest()
[21:26:57.457] <TB2> INFO: ######################################################################
[21:26:57.458] <TB2> INFO: ----------------------------------------------------------------------
[21:26:57.458] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[21:26:57.458] <TB2> INFO: ----------------------------------------------------------------------
[21:26:57.515] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[21:26:57.515] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[21:26:57.529] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:26:57.529] <TB2> INFO: run 1 of 1
[21:26:57.813] <TB2> INFO: Expecting 5025280 events.
[21:27:28.719] <TB2> INFO: 832312 events read in total (30311ms).
[21:27:59.287] <TB2> INFO: 1662632 events read in total (60879ms).
[21:28:29.781] <TB2> INFO: 2490056 events read in total (91373ms).
[21:29:00.593] <TB2> INFO: 3313704 events read in total (122185ms).
[21:29:31.125] <TB2> INFO: 4134704 events read in total (152718ms).
[21:30:01.361] <TB2> INFO: 4954136 events read in total (182953ms).
[21:30:04.283] <TB2> INFO: 5025280 events read in total (185875ms).
[21:30:04.334] <TB2> INFO: Test took 186806ms.
[21:30:21.763] <TB2> INFO: ROC 0 VthrComp = 123
[21:30:21.763] <TB2> INFO: ROC 1 VthrComp = 130
[21:30:21.763] <TB2> INFO: ROC 2 VthrComp = 128
[21:30:21.763] <TB2> INFO: ROC 3 VthrComp = 119
[21:30:21.763] <TB2> INFO: ROC 4 VthrComp = 123
[21:30:21.763] <TB2> INFO: ROC 5 VthrComp = 112
[21:30:21.763] <TB2> INFO: ROC 6 VthrComp = 107
[21:30:21.764] <TB2> INFO: ROC 7 VthrComp = 122
[21:30:21.764] <TB2> INFO: ROC 8 VthrComp = 121
[21:30:21.764] <TB2> INFO: ROC 9 VthrComp = 130
[21:30:21.764] <TB2> INFO: ROC 10 VthrComp = 121
[21:30:21.764] <TB2> INFO: ROC 11 VthrComp = 122
[21:30:21.764] <TB2> INFO: ROC 12 VthrComp = 117
[21:30:21.764] <TB2> INFO: ROC 13 VthrComp = 118
[21:30:21.764] <TB2> INFO: ROC 14 VthrComp = 130
[21:30:21.764] <TB2> INFO: ROC 15 VthrComp = 120
[21:30:22.028] <TB2> INFO: Expecting 41600 events.
[21:30:25.480] <TB2> INFO: 41600 events read in total (2860ms).
[21:30:25.481] <TB2> INFO: Test took 3715ms.
[21:30:25.490] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[21:30:25.490] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[21:30:25.501] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:30:25.502] <TB2> INFO: run 1 of 1
[21:30:25.780] <TB2> INFO: Expecting 5025280 events.
[21:30:52.050] <TB2> INFO: 593152 events read in total (25679ms).
[21:31:18.154] <TB2> INFO: 1184376 events read in total (51783ms).
[21:31:43.801] <TB2> INFO: 1776064 events read in total (77430ms).
[21:32:09.483] <TB2> INFO: 2366952 events read in total (103112ms).
[21:32:35.111] <TB2> INFO: 2955616 events read in total (128740ms).
[21:33:00.813] <TB2> INFO: 3542840 events read in total (154442ms).
[21:33:26.641] <TB2> INFO: 4129824 events read in total (180270ms).
[21:33:52.314] <TB2> INFO: 4716960 events read in total (205943ms).
[21:34:05.831] <TB2> INFO: 5025280 events read in total (219460ms).
[21:34:05.900] <TB2> INFO: Test took 220399ms.
[21:34:33.076] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 61.643 for pixel 15/8 mean/min/max = 46.5477/31.377/61.7184
[21:34:33.076] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 66.7736 for pixel 4/12 mean/min/max = 49.4251/32.0433/66.8068
[21:34:33.077] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 66.4935 for pixel 16/5 mean/min/max = 48.6158/30.5222/66.7094
[21:34:33.077] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 60.0427 for pixel 12/10 mean/min/max = 46.2346/32.2307/60.2385
[21:34:33.078] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 72.0412 for pixel 18/6 mean/min/max = 50.8204/29.0041/72.6367
[21:34:33.078] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 67.3258 for pixel 6/7 mean/min/max = 49.9815/32.6099/67.353
[21:34:33.079] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 63.4693 for pixel 3/13 mean/min/max = 49.4447/35.3036/63.5858
[21:34:33.079] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 61.0287 for pixel 4/6 mean/min/max = 46.6215/32.0555/61.1876
[21:34:33.080] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 62.5138 for pixel 0/42 mean/min/max = 47.8965/33.0076/62.7853
[21:34:33.080] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 61.7356 for pixel 51/1 mean/min/max = 46.5685/31.3462/61.7908
[21:34:33.081] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 60.8328 for pixel 6/2 mean/min/max = 46.8322/32.7239/60.9405
[21:34:33.081] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 62.4579 for pixel 0/6 mean/min/max = 47.8457/33.1406/62.5508
[21:34:33.081] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 61.198 for pixel 33/0 mean/min/max = 47.1363/32.5818/61.6908
[21:34:33.082] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 59.5738 for pixel 0/0 mean/min/max = 45.6722/31.768/59.5763
[21:34:33.082] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 63.2664 for pixel 2/15 mean/min/max = 47.3449/31.1308/63.5591
[21:34:33.083] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 60.9209 for pixel 10/65 mean/min/max = 47.0526/33.1299/60.9754
[21:34:33.083] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:33.171] <TB2> INFO: Expecting 411648 events.
[21:34:42.706] <TB2> INFO: 411648 events read in total (8943ms).
[21:34:42.713] <TB2> INFO: Expecting 411648 events.
[21:34:52.211] <TB2> INFO: 411648 events read in total (9095ms).
[21:34:52.224] <TB2> INFO: Expecting 411648 events.
[21:35:01.657] <TB2> INFO: 411648 events read in total (9029ms).
[21:35:01.670] <TB2> INFO: Expecting 411648 events.
[21:35:11.181] <TB2> INFO: 411648 events read in total (9109ms).
[21:35:11.197] <TB2> INFO: Expecting 411648 events.
[21:35:20.753] <TB2> INFO: 411648 events read in total (9153ms).
[21:35:20.777] <TB2> INFO: Expecting 411648 events.
[21:35:30.213] <TB2> INFO: 411648 events read in total (9033ms).
[21:35:30.235] <TB2> INFO: Expecting 411648 events.
[21:35:39.729] <TB2> INFO: 411648 events read in total (9091ms).
[21:35:39.753] <TB2> INFO: Expecting 411648 events.
[21:35:49.164] <TB2> INFO: 411648 events read in total (9008ms).
[21:35:49.191] <TB2> INFO: Expecting 411648 events.
[21:35:58.660] <TB2> INFO: 411648 events read in total (9066ms).
[21:35:58.692] <TB2> INFO: Expecting 411648 events.
[21:36:08.082] <TB2> INFO: 411648 events read in total (8987ms).
[21:36:08.114] <TB2> INFO: Expecting 411648 events.
[21:36:17.578] <TB2> INFO: 411648 events read in total (9060ms).
[21:36:17.613] <TB2> INFO: Expecting 411648 events.
[21:36:27.059] <TB2> INFO: 411648 events read in total (9043ms).
[21:36:27.095] <TB2> INFO: Expecting 411648 events.
[21:36:36.475] <TB2> INFO: 411648 events read in total (8977ms).
[21:36:36.514] <TB2> INFO: Expecting 411648 events.
[21:36:45.790] <TB2> INFO: 411648 events read in total (8873ms).
[21:36:45.844] <TB2> INFO: Expecting 411648 events.
[21:36:54.003] <TB2> INFO: 411648 events read in total (8756ms).
[21:36:55.048] <TB2> INFO: Expecting 411648 events.
[21:37:04.301] <TB2> INFO: 411648 events read in total (8850ms).
[21:37:04.347] <TB2> INFO: Test took 151264ms.
[21:37:04.986] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[21:37:04.999] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:37:04.999] <TB2> INFO: run 1 of 1
[21:37:05.236] <TB2> INFO: Expecting 5025280 events.
[21:37:31.611] <TB2> INFO: 590856 events read in total (25784ms).
[21:37:57.437] <TB2> INFO: 1180840 events read in total (51612ms).
[21:38:23.201] <TB2> INFO: 1770328 events read in total (77374ms).
[21:38:49.197] <TB2> INFO: 2356776 events read in total (103370ms).
[21:39:15.176] <TB2> INFO: 2945096 events read in total (129350ms).
[21:39:40.868] <TB2> INFO: 3532936 events read in total (155041ms).
[21:40:06.744] <TB2> INFO: 4122376 events read in total (180917ms).
[21:40:33.183] <TB2> INFO: 4713840 events read in total (207356ms).
[21:40:47.092] <TB2> INFO: 5025280 events read in total (221265ms).
[21:40:47.260] <TB2> INFO: Test took 222261ms.
[21:41:09.184] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.227873 .. 147.437477
[21:41:09.425] <TB2> INFO: Expecting 208000 events.
[21:41:19.051] <TB2> INFO: 208000 events read in total (9033ms).
[21:41:19.052] <TB2> INFO: Test took 9866ms.
[21:41:19.123] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 157 (-1/-1) hits flags = 528 (plus default)
[21:41:19.137] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:41:19.137] <TB2> INFO: run 1 of 1
[21:41:19.415] <TB2> INFO: Expecting 5258240 events.
[21:41:45.851] <TB2> INFO: 586032 events read in total (25844ms).
[21:42:11.600] <TB2> INFO: 1171680 events read in total (51594ms).
[21:42:37.574] <TB2> INFO: 1757224 events read in total (77567ms).
[21:43:03.718] <TB2> INFO: 2342784 events read in total (103711ms).
[21:43:29.998] <TB2> INFO: 2928216 events read in total (129991ms).
[21:43:56.127] <TB2> INFO: 3513496 events read in total (156120ms).
[21:44:22.609] <TB2> INFO: 4098464 events read in total (182602ms).
[21:44:48.850] <TB2> INFO: 4683360 events read in total (208843ms).
[21:45:14.907] <TB2> INFO: 5258240 events read in total (234900ms).
[21:45:15.015] <TB2> INFO: Test took 235879ms.
[21:45:42.268] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 26.951172 .. 49.510329
[21:45:42.601] <TB2> INFO: Expecting 208000 events.
[21:45:52.326] <TB2> INFO: 208000 events read in total (9134ms).
[21:45:52.327] <TB2> INFO: Test took 10056ms.
[21:45:52.375] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 59 (-1/-1) hits flags = 528 (plus default)
[21:45:52.389] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:45:52.389] <TB2> INFO: run 1 of 1
[21:45:52.668] <TB2> INFO: Expecting 1464320 events.
[21:46:20.415] <TB2> INFO: 652808 events read in total (27156ms).
[21:46:47.886] <TB2> INFO: 1305488 events read in total (54627ms).
[21:46:54.890] <TB2> INFO: 1464320 events read in total (61631ms).
[21:46:54.929] <TB2> INFO: Test took 62541ms.
[21:47:09.159] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 27.969442 .. 51.875002
[21:47:09.400] <TB2> INFO: Expecting 208000 events.
[21:47:19.260] <TB2> INFO: 208000 events read in total (9268ms).
[21:47:19.261] <TB2> INFO: Test took 10101ms.
[21:47:19.309] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 17 .. 61 (-1/-1) hits flags = 528 (plus default)
[21:47:19.323] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:47:19.323] <TB2> INFO: run 1 of 1
[21:47:19.601] <TB2> INFO: Expecting 1497600 events.
[21:47:47.621] <TB2> INFO: 641264 events read in total (27428ms).
[21:48:14.643] <TB2> INFO: 1282232 events read in total (54450ms).
[21:48:24.474] <TB2> INFO: 1497600 events read in total (64281ms).
[21:48:24.516] <TB2> INFO: Test took 65193ms.
[21:48:38.674] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 25.734885 .. 54.036795
[21:48:38.943] <TB2> INFO: Expecting 208000 events.
[21:48:48.443] <TB2> INFO: 208000 events read in total (8908ms).
[21:48:48.444] <TB2> INFO: Test took 9769ms.
[21:48:48.492] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 64 (-1/-1) hits flags = 528 (plus default)
[21:48:48.506] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:48:48.506] <TB2> INFO: run 1 of 1
[21:48:48.784] <TB2> INFO: Expecting 1664000 events.
[21:49:16.866] <TB2> INFO: 639000 events read in total (27491ms).
[21:49:43.643] <TB2> INFO: 1277688 events read in total (54268ms).
[21:50:00.241] <TB2> INFO: 1664000 events read in total (70866ms).
[21:50:00.277] <TB2> INFO: Test took 71772ms.
[21:50:14.080] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[21:50:14.080] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[21:50:14.094] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:50:14.094] <TB2> INFO: run 1 of 1
[21:50:14.333] <TB2> INFO: Expecting 1364480 events.
[21:50:42.461] <TB2> INFO: 670696 events read in total (27537ms).
[21:51:10.348] <TB2> INFO: 1339856 events read in total (55424ms).
[21:51:11.817] <TB2> INFO: 1364480 events read in total (56894ms).
[21:51:11.847] <TB2> INFO: Test took 57753ms.
[21:51:26.263] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C0.dat
[21:51:26.263] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C1.dat
[21:51:26.263] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C2.dat
[21:51:26.263] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C3.dat
[21:51:26.263] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C4.dat
[21:51:26.264] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C5.dat
[21:51:26.264] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C6.dat
[21:51:26.264] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C7.dat
[21:51:26.264] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C8.dat
[21:51:26.264] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C9.dat
[21:51:26.265] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C10.dat
[21:51:26.265] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C11.dat
[21:51:26.265] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C12.dat
[21:51:26.265] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C13.dat
[21:51:26.265] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C14.dat
[21:51:26.265] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C15.dat
[21:51:26.266] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//trimParameters35_C0.dat
[21:51:26.274] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//trimParameters35_C1.dat
[21:51:26.279] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//trimParameters35_C2.dat
[21:51:26.284] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//trimParameters35_C3.dat
[21:51:26.289] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//trimParameters35_C4.dat
[21:51:26.294] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//trimParameters35_C5.dat
[21:51:26.298] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//trimParameters35_C6.dat
[21:51:26.303] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//trimParameters35_C7.dat
[21:51:26.308] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//trimParameters35_C8.dat
[21:51:26.312] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//trimParameters35_C9.dat
[21:51:26.317] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//trimParameters35_C10.dat
[21:51:26.322] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//trimParameters35_C11.dat
[21:51:26.326] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//trimParameters35_C12.dat
[21:51:26.331] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//trimParameters35_C13.dat
[21:51:26.336] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//trimParameters35_C14.dat
[21:51:26.340] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//trimParameters35_C15.dat
[21:51:26.345] <TB2> INFO: PixTestTrim::trimTest() done
[21:51:26.345] <TB2> INFO: vtrim: 134 151 143 128 167 121 134 125 128 122 122 120 121 106 128 126
[21:51:26.345] <TB2> INFO: vthrcomp: 123 130 128 119 123 112 107 122 121 130 121 122 117 118 130 120
[21:51:26.345] <TB2> INFO: vcal mean: 35.12 36.38 35.70 35.13 36.62 35.84 35.32 35.01 35.18 35.19 35.17 35.72 35.39 35.04 35.45 35.14
[21:51:26.345] <TB2> INFO: vcal RMS: 1.13 2.38 2.02 1.10 2.86 1.98 1.35 1.01 1.17 1.22 1.07 1.76 1.46 1.02 1.65 1.17
[21:51:26.345] <TB2> INFO: bits mean: 9.55 10.01 10.25 9.55 10.28 8.75 8.72 9.04 8.86 9.63 9.25 9.21 9.52 9.07 9.73 9.28
[21:51:26.345] <TB2> INFO: bits RMS: 2.78 2.54 2.45 2.65 2.60 2.88 2.49 2.85 2.77 2.74 2.72 2.85 2.68 2.99 2.76 2.63
[21:51:26.353] <TB2> INFO: ----------------------------------------------------------------------
[21:51:26.353] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[21:51:26.353] <TB2> INFO: ----------------------------------------------------------------------
[21:51:26.355] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[21:51:26.368] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:51:26.368] <TB2> INFO: run 1 of 1
[21:51:26.605] <TB2> INFO: Expecting 4160000 events.
[21:51:59.846] <TB2> INFO: 774760 events read in total (32649ms).
[21:52:32.257] <TB2> INFO: 1540410 events read in total (65060ms).
[21:53:04.804] <TB2> INFO: 2299855 events read in total (97607ms).
[21:53:36.903] <TB2> INFO: 3055685 events read in total (129706ms).
[21:54:09.423] <TB2> INFO: 3808175 events read in total (162226ms).
[21:54:25.136] <TB2> INFO: 4160000 events read in total (177939ms).
[21:54:25.206] <TB2> INFO: Test took 178839ms.
[21:54:49.149] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[21:54:49.164] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:54:49.164] <TB2> INFO: run 1 of 1
[21:54:49.410] <TB2> INFO: Expecting 5324800 events.
[21:55:20.557] <TB2> INFO: 686920 events read in total (30555ms).
[21:55:51.395] <TB2> INFO: 1370370 events read in total (61393ms).
[21:56:21.601] <TB2> INFO: 2051545 events read in total (91599ms).
[21:56:52.016] <TB2> INFO: 2730815 events read in total (122014ms).
[21:57:22.538] <TB2> INFO: 3406905 events read in total (152536ms).
[21:57:53.299] <TB2> INFO: 4082950 events read in total (183297ms).
[21:58:23.598] <TB2> INFO: 4757090 events read in total (213596ms).
[21:58:49.536] <TB2> INFO: 5324800 events read in total (239534ms).
[21:58:49.750] <TB2> INFO: Test took 240586ms.
[21:59:23.064] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 230 (-1/-1) hits flags = 528 (plus default)
[21:59:23.078] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:59:23.078] <TB2> INFO: run 1 of 1
[21:59:23.317] <TB2> INFO: Expecting 4804800 events.
[21:59:54.744] <TB2> INFO: 708980 events read in total (30835ms).
[22:00:25.711] <TB2> INFO: 1414355 events read in total (61802ms).
[22:00:56.619] <TB2> INFO: 2116090 events read in total (92710ms).
[22:01:26.958] <TB2> INFO: 2814270 events read in total (123049ms).
[22:01:57.794] <TB2> INFO: 3511360 events read in total (153885ms).
[22:02:28.424] <TB2> INFO: 4206765 events read in total (184515ms).
[22:02:54.497] <TB2> INFO: 4804800 events read in total (210588ms).
[22:02:54.631] <TB2> INFO: Test took 211553ms.
[22:03:25.964] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 230 (-1/-1) hits flags = 528 (plus default)
[22:03:25.978] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[22:03:25.978] <TB2> INFO: run 1 of 1
[22:03:26.216] <TB2> INFO: Expecting 4804800 events.
[22:03:57.850] <TB2> INFO: 709300 events read in total (31042ms).
[22:04:28.685] <TB2> INFO: 1414680 events read in total (61877ms).
[22:04:59.719] <TB2> INFO: 2116830 events read in total (92911ms).
[22:05:30.568] <TB2> INFO: 2815175 events read in total (123760ms).
[22:06:01.122] <TB2> INFO: 3512355 events read in total (154315ms).
[22:06:31.837] <TB2> INFO: 4208230 events read in total (185029ms).
[22:06:58.414] <TB2> INFO: 4804800 events read in total (211606ms).
[22:06:58.502] <TB2> INFO: Test took 212524ms.
[22:07:27.158] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 229 (-1/-1) hits flags = 528 (plus default)
[22:07:27.176] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[22:07:27.176] <TB2> INFO: run 1 of 1
[22:07:27.503] <TB2> INFO: Expecting 4784000 events.
[22:07:59.093] <TB2> INFO: 710575 events read in total (30999ms).
[22:08:29.747] <TB2> INFO: 1416650 events read in total (61653ms).
[22:09:00.505] <TB2> INFO: 2119875 events read in total (92411ms).
[22:09:31.035] <TB2> INFO: 2819150 events read in total (122941ms).
[22:10:01.781] <TB2> INFO: 3517190 events read in total (153687ms).
[22:10:32.492] <TB2> INFO: 4213625 events read in total (184398ms).
[22:10:57.989] <TB2> INFO: 4784000 events read in total (209895ms).
[22:10:58.164] <TB2> INFO: Test took 210987ms.
[22:11:24.146] <TB2> INFO: PixTestTrim::trimBitTest() done
[22:11:24.147] <TB2> INFO: PixTestTrim::doTest() done, duration: 2666 seconds
[22:11:24.147] <TB2> INFO: Decoding statistics:
[22:11:24.147] <TB2> INFO: General information:
[22:11:24.147] <TB2> INFO: 16bit words read: 0
[22:11:24.147] <TB2> INFO: valid events total: 0
[22:11:24.147] <TB2> INFO: empty events: 0
[22:11:24.147] <TB2> INFO: valid events with pixels: 0
[22:11:24.147] <TB2> INFO: valid pixel hits: 0
[22:11:24.147] <TB2> INFO: Event errors: 0
[22:11:24.147] <TB2> INFO: start marker: 0
[22:11:24.147] <TB2> INFO: stop marker: 0
[22:11:24.147] <TB2> INFO: overflow: 0
[22:11:24.147] <TB2> INFO: invalid 5bit words: 0
[22:11:24.147] <TB2> INFO: invalid XOR eye diagram: 0
[22:11:24.147] <TB2> INFO: frame (failed synchr.): 0
[22:11:24.147] <TB2> INFO: idle data (no TBM trl): 0
[22:11:24.148] <TB2> INFO: no data (only TBM hdr): 0
[22:11:24.148] <TB2> INFO: TBM errors: 0
[22:11:24.148] <TB2> INFO: flawed TBM headers: 0
[22:11:24.148] <TB2> INFO: flawed TBM trailers: 0
[22:11:24.148] <TB2> INFO: event ID mismatches: 0
[22:11:24.148] <TB2> INFO: ROC errors: 0
[22:11:24.148] <TB2> INFO: missing ROC header(s): 0
[22:11:24.148] <TB2> INFO: misplaced readback start: 0
[22:11:24.148] <TB2> INFO: Pixel decoding errors: 0
[22:11:24.148] <TB2> INFO: pixel data incomplete: 0
[22:11:24.148] <TB2> INFO: pixel address: 0
[22:11:24.148] <TB2> INFO: pulse height fill bit: 0
[22:11:24.148] <TB2> INFO: buffer corruption: 0
[22:11:24.744] <TB2> INFO: ######################################################################
[22:11:24.744] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[22:11:24.744] <TB2> INFO: ######################################################################
[22:11:24.983] <TB2> INFO: Expecting 41600 events.
[22:11:28.432] <TB2> INFO: 41600 events read in total (2858ms).
[22:11:28.433] <TB2> INFO: Test took 3687ms.
[22:11:28.872] <TB2> INFO: Expecting 41600 events.
[22:11:32.510] <TB2> INFO: 41600 events read in total (3047ms).
[22:11:32.511] <TB2> INFO: Test took 3876ms.
[22:11:32.800] <TB2> INFO: Expecting 41600 events.
[22:11:36.329] <TB2> INFO: 41600 events read in total (2937ms).
[22:11:36.330] <TB2> INFO: Test took 3795ms.
[22:11:36.619] <TB2> INFO: Expecting 41600 events.
[22:11:40.168] <TB2> INFO: 41600 events read in total (2957ms).
[22:11:40.169] <TB2> INFO: Test took 3815ms.
[22:11:40.458] <TB2> INFO: Expecting 41600 events.
[22:11:43.953] <TB2> INFO: 41600 events read in total (2903ms).
[22:11:43.954] <TB2> INFO: Test took 3761ms.
[22:11:44.243] <TB2> INFO: Expecting 41600 events.
[22:11:47.759] <TB2> INFO: 41600 events read in total (2924ms).
[22:11:47.760] <TB2> INFO: Test took 3782ms.
[22:11:48.051] <TB2> INFO: Expecting 41600 events.
[22:11:51.579] <TB2> INFO: 41600 events read in total (2936ms).
[22:11:51.580] <TB2> INFO: Test took 3793ms.
[22:11:51.869] <TB2> INFO: Expecting 41600 events.
[22:11:55.360] <TB2> INFO: 41600 events read in total (2900ms).
[22:11:55.361] <TB2> INFO: Test took 3757ms.
[22:11:55.650] <TB2> INFO: Expecting 41600 events.
[22:11:59.168] <TB2> INFO: 41600 events read in total (2926ms).
[22:11:59.169] <TB2> INFO: Test took 3783ms.
[22:11:59.458] <TB2> INFO: Expecting 41600 events.
[22:12:03.210] <TB2> INFO: 41600 events read in total (3161ms).
[22:12:03.211] <TB2> INFO: Test took 4018ms.
[22:12:03.500] <TB2> INFO: Expecting 41600 events.
[22:12:07.009] <TB2> INFO: 41600 events read in total (2918ms).
[22:12:07.010] <TB2> INFO: Test took 3775ms.
[22:12:07.299] <TB2> INFO: Expecting 41600 events.
[22:12:10.765] <TB2> INFO: 41600 events read in total (2874ms).
[22:12:10.766] <TB2> INFO: Test took 3732ms.
[22:12:11.056] <TB2> INFO: Expecting 41600 events.
[22:12:14.554] <TB2> INFO: 41600 events read in total (2907ms).
[22:12:14.555] <TB2> INFO: Test took 3765ms.
[22:12:14.845] <TB2> INFO: Expecting 41600 events.
[22:12:18.325] <TB2> INFO: 41600 events read in total (2888ms).
[22:12:18.326] <TB2> INFO: Test took 3747ms.
[22:12:18.615] <TB2> INFO: Expecting 41600 events.
[22:12:22.104] <TB2> INFO: 41600 events read in total (2897ms).
[22:12:22.105] <TB2> INFO: Test took 3754ms.
[22:12:22.395] <TB2> INFO: Expecting 41600 events.
[22:12:25.964] <TB2> INFO: 41600 events read in total (2978ms).
[22:12:25.965] <TB2> INFO: Test took 3836ms.
[22:12:26.254] <TB2> INFO: Expecting 41600 events.
[22:12:29.749] <TB2> INFO: 41600 events read in total (2903ms).
[22:12:29.750] <TB2> INFO: Test took 3761ms.
[22:12:30.039] <TB2> INFO: Expecting 41600 events.
[22:12:33.515] <TB2> INFO: 41600 events read in total (2884ms).
[22:12:33.516] <TB2> INFO: Test took 3742ms.
[22:12:33.806] <TB2> INFO: Expecting 41600 events.
[22:12:37.300] <TB2> INFO: 41600 events read in total (2903ms).
[22:12:37.301] <TB2> INFO: Test took 3760ms.
[22:12:37.608] <TB2> INFO: Expecting 41600 events.
[22:12:41.170] <TB2> INFO: 41600 events read in total (2971ms).
[22:12:41.171] <TB2> INFO: Test took 3846ms.
[22:12:41.464] <TB2> INFO: Expecting 41600 events.
[22:12:45.044] <TB2> INFO: 41600 events read in total (2988ms).
[22:12:45.045] <TB2> INFO: Test took 3847ms.
[22:12:45.357] <TB2> INFO: Expecting 41600 events.
[22:12:48.948] <TB2> INFO: 41600 events read in total (2999ms).
[22:12:48.949] <TB2> INFO: Test took 3879ms.
[22:12:49.239] <TB2> INFO: Expecting 41600 events.
[22:12:52.774] <TB2> INFO: 41600 events read in total (2943ms).
[22:12:52.775] <TB2> INFO: Test took 3802ms.
[22:12:53.065] <TB2> INFO: Expecting 41600 events.
[22:12:56.663] <TB2> INFO: 41600 events read in total (3006ms).
[22:12:56.664] <TB2> INFO: Test took 3864ms.
[22:12:56.953] <TB2> INFO: Expecting 41600 events.
[22:13:00.593] <TB2> INFO: 41600 events read in total (3048ms).
[22:13:00.594] <TB2> INFO: Test took 3906ms.
[22:13:00.884] <TB2> INFO: Expecting 41600 events.
[22:13:04.467] <TB2> INFO: 41600 events read in total (2991ms).
[22:13:04.468] <TB2> INFO: Test took 3850ms.
[22:13:04.759] <TB2> INFO: Expecting 41600 events.
[22:13:08.402] <TB2> INFO: 41600 events read in total (3052ms).
[22:13:08.403] <TB2> INFO: Test took 3910ms.
[22:13:08.694] <TB2> INFO: Expecting 2560 events.
[22:13:09.578] <TB2> INFO: 2560 events read in total (292ms).
[22:13:09.578] <TB2> INFO: Test took 1161ms.
[22:13:09.886] <TB2> INFO: Expecting 2560 events.
[22:13:10.778] <TB2> INFO: 2560 events read in total (300ms).
[22:13:10.778] <TB2> INFO: Test took 1200ms.
[22:13:11.087] <TB2> INFO: Expecting 2560 events.
[22:13:11.982] <TB2> INFO: 2560 events read in total (303ms).
[22:13:11.982] <TB2> INFO: Test took 1203ms.
[22:13:12.290] <TB2> INFO: Expecting 2560 events.
[22:13:13.181] <TB2> INFO: 2560 events read in total (299ms).
[22:13:13.182] <TB2> INFO: Test took 1199ms.
[22:13:13.489] <TB2> INFO: Expecting 2560 events.
[22:13:14.375] <TB2> INFO: 2560 events read in total (295ms).
[22:13:14.376] <TB2> INFO: Test took 1194ms.
[22:13:14.684] <TB2> INFO: Expecting 2560 events.
[22:13:15.564] <TB2> INFO: 2560 events read in total (288ms).
[22:13:15.565] <TB2> INFO: Test took 1189ms.
[22:13:15.872] <TB2> INFO: Expecting 2560 events.
[22:13:16.755] <TB2> INFO: 2560 events read in total (291ms).
[22:13:16.755] <TB2> INFO: Test took 1190ms.
[22:13:17.063] <TB2> INFO: Expecting 2560 events.
[22:13:17.947] <TB2> INFO: 2560 events read in total (292ms).
[22:13:17.948] <TB2> INFO: Test took 1192ms.
[22:13:18.254] <TB2> INFO: Expecting 2560 events.
[22:13:19.136] <TB2> INFO: 2560 events read in total (290ms).
[22:13:19.136] <TB2> INFO: Test took 1188ms.
[22:13:19.445] <TB2> INFO: Expecting 2560 events.
[22:13:20.331] <TB2> INFO: 2560 events read in total (294ms).
[22:13:20.332] <TB2> INFO: Test took 1195ms.
[22:13:20.640] <TB2> INFO: Expecting 2560 events.
[22:13:21.523] <TB2> INFO: 2560 events read in total (291ms).
[22:13:21.523] <TB2> INFO: Test took 1191ms.
[22:13:21.831] <TB2> INFO: Expecting 2560 events.
[22:13:22.712] <TB2> INFO: 2560 events read in total (289ms).
[22:13:22.712] <TB2> INFO: Test took 1188ms.
[22:13:23.021] <TB2> INFO: Expecting 2560 events.
[22:13:23.912] <TB2> INFO: 2560 events read in total (300ms).
[22:13:23.912] <TB2> INFO: Test took 1199ms.
[22:13:24.220] <TB2> INFO: Expecting 2560 events.
[22:13:25.106] <TB2> INFO: 2560 events read in total (294ms).
[22:13:25.107] <TB2> INFO: Test took 1194ms.
[22:13:25.414] <TB2> INFO: Expecting 2560 events.
[22:13:26.300] <TB2> INFO: 2560 events read in total (295ms).
[22:13:26.301] <TB2> INFO: Test took 1193ms.
[22:13:26.609] <TB2> INFO: Expecting 2560 events.
[22:13:27.506] <TB2> INFO: 2560 events read in total (306ms).
[22:13:27.507] <TB2> INFO: Test took 1206ms.
[22:13:27.511] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:13:27.816] <TB2> INFO: Expecting 655360 events.
[22:13:42.817] <TB2> INFO: 655360 events read in total (14409ms).
[22:13:42.831] <TB2> INFO: Expecting 655360 events.
[22:13:57.410] <TB2> INFO: 655360 events read in total (14175ms).
[22:13:57.426] <TB2> INFO: Expecting 655360 events.
[22:14:12.160] <TB2> INFO: 655360 events read in total (14330ms).
[22:14:12.180] <TB2> INFO: Expecting 655360 events.
[22:14:27.055] <TB2> INFO: 655360 events read in total (14472ms).
[22:14:27.080] <TB2> INFO: Expecting 655360 events.
[22:14:41.458] <TB2> INFO: 655360 events read in total (13975ms).
[22:14:41.487] <TB2> INFO: Expecting 655360 events.
[22:14:55.903] <TB2> INFO: 655360 events read in total (14013ms).
[22:14:55.937] <TB2> INFO: Expecting 655360 events.
[22:15:10.421] <TB2> INFO: 655360 events read in total (14081ms).
[22:15:10.598] <TB2> INFO: Expecting 655360 events.
[22:15:24.973] <TB2> INFO: 655360 events read in total (13971ms).
[22:15:25.018] <TB2> INFO: Expecting 655360 events.
[22:15:39.369] <TB2> INFO: 655360 events read in total (13948ms).
[22:15:39.544] <TB2> INFO: Expecting 655360 events.
[22:15:54.009] <TB2> INFO: 655360 events read in total (14062ms).
[22:15:54.063] <TB2> INFO: Expecting 655360 events.
[22:16:08.483] <TB2> INFO: 655360 events read in total (14017ms).
[22:16:08.636] <TB2> INFO: Expecting 655360 events.
[22:16:23.125] <TB2> INFO: 655360 events read in total (14086ms).
[22:16:23.199] <TB2> INFO: Expecting 655360 events.
[22:16:37.784] <TB2> INFO: 655360 events read in total (14182ms).
[22:16:37.863] <TB2> INFO: Expecting 655360 events.
[22:16:52.257] <TB2> INFO: 655360 events read in total (13991ms).
[22:16:52.401] <TB2> INFO: Expecting 655360 events.
[22:17:06.894] <TB2> INFO: 655360 events read in total (14090ms).
[22:17:07.012] <TB2> INFO: Expecting 655360 events.
[22:17:21.608] <TB2> INFO: 655360 events read in total (14193ms).
[22:17:21.746] <TB2> INFO: Test took 234235ms.
[22:17:21.847] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:17:22.103] <TB2> INFO: Expecting 655360 events.
[22:17:36.734] <TB2> INFO: 655360 events read in total (14040ms).
[22:17:36.746] <TB2> INFO: Expecting 655360 events.
[22:17:51.163] <TB2> INFO: 655360 events read in total (14014ms).
[22:17:51.179] <TB2> INFO: Expecting 655360 events.
[22:18:05.782] <TB2> INFO: 655360 events read in total (14200ms).
[22:18:05.802] <TB2> INFO: Expecting 655360 events.
[22:18:20.320] <TB2> INFO: 655360 events read in total (14115ms).
[22:18:20.344] <TB2> INFO: Expecting 655360 events.
[22:18:34.758] <TB2> INFO: 655360 events read in total (14011ms).
[22:18:34.786] <TB2> INFO: Expecting 655360 events.
[22:18:49.281] <TB2> INFO: 655360 events read in total (14091ms).
[22:18:49.314] <TB2> INFO: Expecting 655360 events.
[22:19:03.666] <TB2> INFO: 655360 events read in total (13948ms).
[22:19:03.709] <TB2> INFO: Expecting 655360 events.
[22:19:18.293] <TB2> INFO: 655360 events read in total (14181ms).
[22:19:18.334] <TB2> INFO: Expecting 655360 events.
[22:19:33.151] <TB2> INFO: 655360 events read in total (14414ms).
[22:19:33.209] <TB2> INFO: Expecting 655360 events.
[22:19:47.822] <TB2> INFO: 655360 events read in total (14209ms).
[22:19:47.877] <TB2> INFO: Expecting 655360 events.
[22:20:02.650] <TB2> INFO: 655360 events read in total (14370ms).
[22:20:02.718] <TB2> INFO: Expecting 655360 events.
[22:20:17.207] <TB2> INFO: 655360 events read in total (14086ms).
[22:20:17.280] <TB2> INFO: Expecting 655360 events.
[22:20:31.548] <TB2> INFO: 655360 events read in total (13865ms).
[22:20:31.673] <TB2> INFO: Expecting 655360 events.
[22:20:46.225] <TB2> INFO: 655360 events read in total (14149ms).
[22:20:46.354] <TB2> INFO: Expecting 655360 events.
[22:21:00.789] <TB2> INFO: 655360 events read in total (14032ms).
[22:21:00.879] <TB2> INFO: Expecting 655360 events.
[22:21:15.347] <TB2> INFO: 655360 events read in total (14064ms).
[22:21:15.441] <TB2> INFO: Test took 233594ms.
[22:21:15.606] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:21:15.612] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:21:15.619] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:21:15.625] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:21:15.631] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:21:15.637] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:21:15.643] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:21:15.649] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:21:15.656] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:21:15.662] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[22:21:15.668] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:21:15.674] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:21:15.680] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[22:21:15.687] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:21:15.692] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:21:15.699] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:21:15.705] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[22:21:15.711] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[22:21:15.717] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[22:21:15.723] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:21:15.730] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:21:15.736] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:21:15.742] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:21:15.750] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:21:15.756] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:21:15.764] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:21:15.771] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[22:21:15.778] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[22:21:15.817] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C0.dat
[22:21:15.817] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C1.dat
[22:21:15.817] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C2.dat
[22:21:15.817] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C3.dat
[22:21:15.818] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C4.dat
[22:21:15.818] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C5.dat
[22:21:15.818] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C6.dat
[22:21:15.818] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C7.dat
[22:21:15.818] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C8.dat
[22:21:15.818] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C9.dat
[22:21:15.819] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C10.dat
[22:21:15.819] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C11.dat
[22:21:15.819] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C12.dat
[22:21:15.819] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C13.dat
[22:21:15.819] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C14.dat
[22:21:15.819] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//dacParameters35_C15.dat
[22:21:16.066] <TB2> INFO: Expecting 41600 events.
[22:21:19.166] <TB2> INFO: 41600 events read in total (2509ms).
[22:21:19.167] <TB2> INFO: Test took 3343ms.
[22:21:19.620] <TB2> INFO: Expecting 41600 events.
[22:21:22.648] <TB2> INFO: 41600 events read in total (2436ms).
[22:21:22.649] <TB2> INFO: Test took 3271ms.
[22:21:23.100] <TB2> INFO: Expecting 41600 events.
[22:21:26.255] <TB2> INFO: 41600 events read in total (2564ms).
[22:21:26.256] <TB2> INFO: Test took 3395ms.
[22:21:26.471] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:26.560] <TB2> INFO: Expecting 2560 events.
[22:21:27.452] <TB2> INFO: 2560 events read in total (300ms).
[22:21:27.452] <TB2> INFO: Test took 981ms.
[22:21:27.454] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:27.760] <TB2> INFO: Expecting 2560 events.
[22:21:28.647] <TB2> INFO: 2560 events read in total (295ms).
[22:21:28.647] <TB2> INFO: Test took 1193ms.
[22:21:28.649] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:28.956] <TB2> INFO: Expecting 2560 events.
[22:21:29.842] <TB2> INFO: 2560 events read in total (294ms).
[22:21:29.842] <TB2> INFO: Test took 1193ms.
[22:21:29.844] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:30.150] <TB2> INFO: Expecting 2560 events.
[22:21:31.035] <TB2> INFO: 2560 events read in total (292ms).
[22:21:31.036] <TB2> INFO: Test took 1192ms.
[22:21:31.038] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:31.344] <TB2> INFO: Expecting 2560 events.
[22:21:32.230] <TB2> INFO: 2560 events read in total (294ms).
[22:21:32.230] <TB2> INFO: Test took 1192ms.
[22:21:32.233] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:32.539] <TB2> INFO: Expecting 2560 events.
[22:21:33.425] <TB2> INFO: 2560 events read in total (294ms).
[22:21:33.426] <TB2> INFO: Test took 1193ms.
[22:21:33.428] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:33.735] <TB2> INFO: Expecting 2560 events.
[22:21:34.624] <TB2> INFO: 2560 events read in total (297ms).
[22:21:34.625] <TB2> INFO: Test took 1197ms.
[22:21:34.627] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:34.934] <TB2> INFO: Expecting 2560 events.
[22:21:35.821] <TB2> INFO: 2560 events read in total (294ms).
[22:21:35.822] <TB2> INFO: Test took 1196ms.
[22:21:35.824] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:36.130] <TB2> INFO: Expecting 2560 events.
[22:21:37.018] <TB2> INFO: 2560 events read in total (296ms).
[22:21:37.018] <TB2> INFO: Test took 1194ms.
[22:21:37.020] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:37.328] <TB2> INFO: Expecting 2560 events.
[22:21:38.212] <TB2> INFO: 2560 events read in total (293ms).
[22:21:38.212] <TB2> INFO: Test took 1192ms.
[22:21:38.215] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:38.521] <TB2> INFO: Expecting 2560 events.
[22:21:39.404] <TB2> INFO: 2560 events read in total (291ms).
[22:21:39.404] <TB2> INFO: Test took 1190ms.
[22:21:39.406] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:39.714] <TB2> INFO: Expecting 2560 events.
[22:21:40.614] <TB2> INFO: 2560 events read in total (295ms).
[22:21:40.614] <TB2> INFO: Test took 1208ms.
[22:21:40.616] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:40.924] <TB2> INFO: Expecting 2560 events.
[22:21:41.813] <TB2> INFO: 2560 events read in total (297ms).
[22:21:41.813] <TB2> INFO: Test took 1197ms.
[22:21:41.816] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:42.122] <TB2> INFO: Expecting 2560 events.
[22:21:42.003] <TB2> INFO: 2560 events read in total (289ms).
[22:21:42.004] <TB2> INFO: Test took 1189ms.
[22:21:42.006] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:43.312] <TB2> INFO: Expecting 2560 events.
[22:21:44.197] <TB2> INFO: 2560 events read in total (294ms).
[22:21:44.197] <TB2> INFO: Test took 1192ms.
[22:21:44.199] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:44.507] <TB2> INFO: Expecting 2560 events.
[22:21:45.401] <TB2> INFO: 2560 events read in total (302ms).
[22:21:45.402] <TB2> INFO: Test took 1203ms.
[22:21:45.404] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:45.709] <TB2> INFO: Expecting 2560 events.
[22:21:46.598] <TB2> INFO: 2560 events read in total (297ms).
[22:21:46.599] <TB2> INFO: Test took 1195ms.
[22:21:46.602] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:46.907] <TB2> INFO: Expecting 2560 events.
[22:21:47.796] <TB2> INFO: 2560 events read in total (297ms).
[22:21:47.797] <TB2> INFO: Test took 1195ms.
[22:21:47.801] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:48.104] <TB2> INFO: Expecting 2560 events.
[22:21:48.994] <TB2> INFO: 2560 events read in total (298ms).
[22:21:48.995] <TB2> INFO: Test took 1194ms.
[22:21:48.000] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:49.302] <TB2> INFO: Expecting 2560 events.
[22:21:50.192] <TB2> INFO: 2560 events read in total (298ms).
[22:21:50.193] <TB2> INFO: Test took 1193ms.
[22:21:50.197] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:50.501] <TB2> INFO: Expecting 2560 events.
[22:21:51.389] <TB2> INFO: 2560 events read in total (296ms).
[22:21:51.389] <TB2> INFO: Test took 1192ms.
[22:21:51.392] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:51.697] <TB2> INFO: Expecting 2560 events.
[22:21:52.588] <TB2> INFO: 2560 events read in total (300ms).
[22:21:52.588] <TB2> INFO: Test took 1196ms.
[22:21:52.591] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:52.895] <TB2> INFO: Expecting 2560 events.
[22:21:53.776] <TB2> INFO: 2560 events read in total (289ms).
[22:21:53.777] <TB2> INFO: Test took 1186ms.
[22:21:53.781] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:54.084] <TB2> INFO: Expecting 2560 events.
[22:21:54.966] <TB2> INFO: 2560 events read in total (290ms).
[22:21:54.966] <TB2> INFO: Test took 1185ms.
[22:21:54.969] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:55.275] <TB2> INFO: Expecting 2560 events.
[22:21:56.162] <TB2> INFO: 2560 events read in total (295ms).
[22:21:56.162] <TB2> INFO: Test took 1193ms.
[22:21:56.164] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:56.471] <TB2> INFO: Expecting 2560 events.
[22:21:57.360] <TB2> INFO: 2560 events read in total (297ms).
[22:21:57.360] <TB2> INFO: Test took 1196ms.
[22:21:57.362] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:57.670] <TB2> INFO: Expecting 2560 events.
[22:21:58.553] <TB2> INFO: 2560 events read in total (292ms).
[22:21:58.553] <TB2> INFO: Test took 1191ms.
[22:21:58.556] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:21:58.862] <TB2> INFO: Expecting 2560 events.
[22:21:59.746] <TB2> INFO: 2560 events read in total (292ms).
[22:21:59.746] <TB2> INFO: Test took 1190ms.
[22:21:59.749] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:22:00.055] <TB2> INFO: Expecting 2560 events.
[22:22:00.942] <TB2> INFO: 2560 events read in total (295ms).
[22:22:00.942] <TB2> INFO: Test took 1193ms.
[22:22:00.945] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:22:01.250] <TB2> INFO: Expecting 2560 events.
[22:22:02.133] <TB2> INFO: 2560 events read in total (291ms).
[22:22:02.134] <TB2> INFO: Test took 1189ms.
[22:22:02.136] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:22:02.442] <TB2> INFO: Expecting 2560 events.
[22:22:03.333] <TB2> INFO: 2560 events read in total (299ms).
[22:22:03.333] <TB2> INFO: Test took 1197ms.
[22:22:03.337] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:22:03.645] <TB2> INFO: Expecting 2560 events.
[22:22:04.530] <TB2> INFO: 2560 events read in total (293ms).
[22:22:04.530] <TB2> INFO: Test took 1194ms.
[22:22:04.992] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 640 seconds
[22:22:04.992] <TB2> INFO: PH scale (per ROC): 36 37 36 41 38 33 46 35 59 47 30 37 44 47 34 35
[22:22:04.992] <TB2> INFO: PH offset (per ROC): 112 96 99 102 101 99 133 107 123 124 107 94 108 108 110 109
[22:22:04.000] <TB2> INFO: Decoding statistics:
[22:22:04.000] <TB2> INFO: General information:
[22:22:04.000] <TB2> INFO: 16bit words read: 127882
[22:22:04.000] <TB2> INFO: valid events total: 20480
[22:22:04.000] <TB2> INFO: empty events: 17979
[22:22:04.000] <TB2> INFO: valid events with pixels: 2501
[22:22:04.000] <TB2> INFO: valid pixel hits: 2501
[22:22:04.000] <TB2> INFO: Event errors: 0
[22:22:04.000] <TB2> INFO: start marker: 0
[22:22:04.001] <TB2> INFO: stop marker: 0
[22:22:04.001] <TB2> INFO: overflow: 0
[22:22:04.001] <TB2> INFO: invalid 5bit words: 0
[22:22:04.001] <TB2> INFO: invalid XOR eye diagram: 0
[22:22:04.001] <TB2> INFO: frame (failed synchr.): 0
[22:22:04.001] <TB2> INFO: idle data (no TBM trl): 0
[22:22:04.001] <TB2> INFO: no data (only TBM hdr): 0
[22:22:04.001] <TB2> INFO: TBM errors: 0
[22:22:04.001] <TB2> INFO: flawed TBM headers: 0
[22:22:04.001] <TB2> INFO: flawed TBM trailers: 0
[22:22:04.001] <TB2> INFO: event ID mismatches: 0
[22:22:04.001] <TB2> INFO: ROC errors: 0
[22:22:04.001] <TB2> INFO: missing ROC header(s): 0
[22:22:04.001] <TB2> INFO: misplaced readback start: 0
[22:22:04.001] <TB2> INFO: Pixel decoding errors: 0
[22:22:04.001] <TB2> INFO: pixel data incomplete: 0
[22:22:04.001] <TB2> INFO: pixel address: 0
[22:22:04.001] <TB2> INFO: pulse height fill bit: 0
[22:22:04.001] <TB2> INFO: buffer corruption: 0
[22:22:05.248] <TB2> INFO: ######################################################################
[22:22:05.248] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[22:22:05.248] <TB2> INFO: ######################################################################
[22:22:05.264] <TB2> INFO: scanning low vcal = 10
[22:22:05.589] <TB2> INFO: Expecting 41600 events.
[22:22:09.140] <TB2> INFO: 41600 events read in total (2960ms).
[22:22:09.140] <TB2> INFO: Test took 3876ms.
[22:22:09.143] <TB2> INFO: scanning low vcal = 20
[22:22:09.468] <TB2> INFO: Expecting 41600 events.
[22:22:13.039] <TB2> INFO: 41600 events read in total (2980ms).
[22:22:13.040] <TB2> INFO: Test took 3897ms.
[22:22:13.041] <TB2> INFO: scanning low vcal = 30
[22:22:13.339] <TB2> INFO: Expecting 41600 events.
[22:22:16.972] <TB2> INFO: 41600 events read in total (3041ms).
[22:22:16.973] <TB2> INFO: Test took 3931ms.
[22:22:16.976] <TB2> INFO: scanning low vcal = 40
[22:22:17.253] <TB2> INFO: Expecting 41600 events.
[22:22:21.194] <TB2> INFO: 41600 events read in total (3349ms).
[22:22:21.198] <TB2> INFO: Test took 4222ms.
[22:22:21.202] <TB2> INFO: scanning low vcal = 50
[22:22:21.489] <TB2> INFO: Expecting 41600 events.
[22:22:25.434] <TB2> INFO: 41600 events read in total (3353ms).
[22:22:25.435] <TB2> INFO: Test took 4233ms.
[22:22:25.438] <TB2> INFO: scanning low vcal = 60
[22:22:25.715] <TB2> INFO: Expecting 41600 events.
[22:22:29.689] <TB2> INFO: 41600 events read in total (3383ms).
[22:22:29.690] <TB2> INFO: Test took 4251ms.
[22:22:29.693] <TB2> INFO: scanning low vcal = 70
[22:22:29.970] <TB2> INFO: Expecting 41600 events.
[22:22:33.917] <TB2> INFO: 41600 events read in total (3356ms).
[22:22:33.918] <TB2> INFO: Test took 4224ms.
[22:22:33.921] <TB2> INFO: scanning low vcal = 80
[22:22:34.197] <TB2> INFO: Expecting 41600 events.
[22:22:38.232] <TB2> INFO: 41600 events read in total (3443ms).
[22:22:38.233] <TB2> INFO: Test took 4312ms.
[22:22:38.236] <TB2> INFO: scanning low vcal = 90
[22:22:38.513] <TB2> INFO: Expecting 41600 events.
[22:22:42.660] <TB2> INFO: 41600 events read in total (3555ms).
[22:22:42.660] <TB2> INFO: Test took 4424ms.
[22:22:42.664] <TB2> INFO: scanning low vcal = 100
[22:22:42.948] <TB2> INFO: Expecting 41600 events.
[22:22:46.987] <TB2> INFO: 41600 events read in total (3448ms).
[22:22:46.988] <TB2> INFO: Test took 4323ms.
[22:22:46.992] <TB2> INFO: scanning low vcal = 110
[22:22:47.268] <TB2> INFO: Expecting 41600 events.
[22:22:51.278] <TB2> INFO: 41600 events read in total (3418ms).
[22:22:51.278] <TB2> INFO: Test took 4286ms.
[22:22:51.281] <TB2> INFO: scanning low vcal = 120
[22:22:51.558] <TB2> INFO: Expecting 41600 events.
[22:22:55.597] <TB2> INFO: 41600 events read in total (3447ms).
[22:22:55.597] <TB2> INFO: Test took 4315ms.
[22:22:55.601] <TB2> INFO: scanning low vcal = 130
[22:22:55.877] <TB2> INFO: Expecting 41600 events.
[22:22:59.910] <TB2> INFO: 41600 events read in total (3441ms).
[22:22:59.911] <TB2> INFO: Test took 4310ms.
[22:22:59.914] <TB2> INFO: scanning low vcal = 140
[22:23:00.191] <TB2> INFO: Expecting 41600 events.
[22:23:04.243] <TB2> INFO: 41600 events read in total (3460ms).
[22:23:04.244] <TB2> INFO: Test took 4330ms.
[22:23:04.247] <TB2> INFO: scanning low vcal = 150
[22:23:04.544] <TB2> INFO: Expecting 41600 events.
[22:23:08.642] <TB2> INFO: 41600 events read in total (3507ms).
[22:23:08.643] <TB2> INFO: Test took 4396ms.
[22:23:08.647] <TB2> INFO: scanning low vcal = 160
[22:23:08.922] <TB2> INFO: Expecting 41600 events.
[22:23:13.024] <TB2> INFO: 41600 events read in total (3510ms).
[22:23:13.025] <TB2> INFO: Test took 4378ms.
[22:23:13.028] <TB2> INFO: scanning low vcal = 170
[22:23:13.305] <TB2> INFO: Expecting 41600 events.
[22:23:17.374] <TB2> INFO: 41600 events read in total (3477ms).
[22:23:17.375] <TB2> INFO: Test took 4347ms.
[22:23:17.380] <TB2> INFO: scanning low vcal = 180
[22:23:17.655] <TB2> INFO: Expecting 41600 events.
[22:23:21.675] <TB2> INFO: 41600 events read in total (3428ms).
[22:23:21.676] <TB2> INFO: Test took 4295ms.
[22:23:21.679] <TB2> INFO: scanning low vcal = 190
[22:23:21.983] <TB2> INFO: Expecting 41600 events.
[22:23:25.978] <TB2> INFO: 41600 events read in total (3403ms).
[22:23:25.979] <TB2> INFO: Test took 4300ms.
[22:23:25.982] <TB2> INFO: scanning low vcal = 200
[22:23:26.259] <TB2> INFO: Expecting 41600 events.
[22:23:30.309] <TB2> INFO: 41600 events read in total (3459ms).
[22:23:30.309] <TB2> INFO: Test took 4327ms.
[22:23:30.313] <TB2> INFO: scanning low vcal = 210
[22:23:30.589] <TB2> INFO: Expecting 41600 events.
[22:23:34.575] <TB2> INFO: 41600 events read in total (3394ms).
[22:23:34.576] <TB2> INFO: Test took 4263ms.
[22:23:34.579] <TB2> INFO: scanning low vcal = 220
[22:23:34.878] <TB2> INFO: Expecting 41600 events.
[22:23:38.889] <TB2> INFO: 41600 events read in total (3419ms).
[22:23:38.890] <TB2> INFO: Test took 4311ms.
[22:23:38.893] <TB2> INFO: scanning low vcal = 230
[22:23:39.170] <TB2> INFO: Expecting 41600 events.
[22:23:43.226] <TB2> INFO: 41600 events read in total (3465ms).
[22:23:43.227] <TB2> INFO: Test took 4334ms.
[22:23:43.230] <TB2> INFO: scanning low vcal = 240
[22:23:43.507] <TB2> INFO: Expecting 41600 events.
[22:23:47.488] <TB2> INFO: 41600 events read in total (3389ms).
[22:23:47.488] <TB2> INFO: Test took 4257ms.
[22:23:47.492] <TB2> INFO: scanning low vcal = 250
[22:23:47.768] <TB2> INFO: Expecting 41600 events.
[22:23:51.823] <TB2> INFO: 41600 events read in total (3463ms).
[22:23:51.824] <TB2> INFO: Test took 4332ms.
[22:23:51.828] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[22:23:52.120] <TB2> INFO: Expecting 41600 events.
[22:23:56.203] <TB2> INFO: 41600 events read in total (3491ms).
[22:23:56.203] <TB2> INFO: Test took 4375ms.
[22:23:56.207] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[22:23:56.484] <TB2> INFO: Expecting 41600 events.
[22:24:00.565] <TB2> INFO: 41600 events read in total (3490ms).
[22:24:00.566] <TB2> INFO: Test took 4359ms.
[22:24:00.569] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[22:24:00.846] <TB2> INFO: Expecting 41600 events.
[22:24:04.893] <TB2> INFO: 41600 events read in total (3455ms).
[22:24:04.894] <TB2> INFO: Test took 4324ms.
[22:24:04.897] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[22:24:05.174] <TB2> INFO: Expecting 41600 events.
[22:24:09.185] <TB2> INFO: 41600 events read in total (3419ms).
[22:24:09.186] <TB2> INFO: Test took 4288ms.
[22:24:09.189] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[22:24:09.466] <TB2> INFO: Expecting 41600 events.
[22:24:13.546] <TB2> INFO: 41600 events read in total (3488ms).
[22:24:13.547] <TB2> INFO: Test took 4358ms.
[22:24:13.998] <TB2> INFO: PixTestGainPedestal::measure() done
[22:24:50.633] <TB2> INFO: PixTestGainPedestal::fit() done
[22:24:50.633] <TB2> INFO: non-linearity mean: 0.933 0.941 0.935 0.939 0.933 0.952 0.980 0.951 0.986 0.983 0.944 0.937 0.968 0.955 0.938 0.933
[22:24:50.633] <TB2> INFO: non-linearity RMS: 0.106 0.088 0.082 0.117 0.101 0.145 0.006 0.170 0.004 0.003 0.167 0.111 0.034 0.044 0.102 0.132
[22:24:50.633] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//phCalibrationFitErr35_C0.dat
[22:24:50.655] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//phCalibrationFitErr35_C1.dat
[22:24:50.676] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//phCalibrationFitErr35_C2.dat
[22:24:50.698] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//phCalibrationFitErr35_C3.dat
[22:24:50.719] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//phCalibrationFitErr35_C4.dat
[22:24:50.741] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//phCalibrationFitErr35_C5.dat
[22:24:50.762] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//phCalibrationFitErr35_C6.dat
[22:24:50.784] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//phCalibrationFitErr35_C7.dat
[22:24:50.805] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//phCalibrationFitErr35_C8.dat
[22:24:50.826] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//phCalibrationFitErr35_C9.dat
[22:24:50.848] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//phCalibrationFitErr35_C10.dat
[22:24:50.870] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//phCalibrationFitErr35_C11.dat
[22:24:50.892] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//phCalibrationFitErr35_C12.dat
[22:24:50.913] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//phCalibrationFitErr35_C13.dat
[22:24:50.935] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//phCalibrationFitErr35_C14.dat
[22:24:50.956] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//003_Fulltest_p17//phCalibrationFitErr35_C15.dat
[22:24:50.978] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 165 seconds
[22:24:50.978] <TB2> INFO: Decoding statistics:
[22:24:50.978] <TB2> INFO: General information:
[22:24:50.978] <TB2> INFO: 16bit words read: 3259948
[22:24:50.978] <TB2> INFO: valid events total: 332800
[22:24:50.978] <TB2> INFO: empty events: 2370
[22:24:50.978] <TB2> INFO: valid events with pixels: 330430
[22:24:50.978] <TB2> INFO: valid pixel hits: 631574
[22:24:50.978] <TB2> INFO: Event errors: 0
[22:24:50.978] <TB2> INFO: start marker: 0
[22:24:50.978] <TB2> INFO: stop marker: 0
[22:24:50.978] <TB2> INFO: overflow: 0
[22:24:50.978] <TB2> INFO: invalid 5bit words: 0
[22:24:50.978] <TB2> INFO: invalid XOR eye diagram: 0
[22:24:50.978] <TB2> INFO: frame (failed synchr.): 0
[22:24:50.978] <TB2> INFO: idle data (no TBM trl): 0
[22:24:50.978] <TB2> INFO: no data (only TBM hdr): 0
[22:24:50.978] <TB2> INFO: TBM errors: 0
[22:24:50.978] <TB2> INFO: flawed TBM headers: 0
[22:24:50.978] <TB2> INFO: flawed TBM trailers: 0
[22:24:50.978] <TB2> INFO: event ID mismatches: 0
[22:24:50.978] <TB2> INFO: ROC errors: 0
[22:24:50.978] <TB2> INFO: missing ROC header(s): 0
[22:24:50.978] <TB2> INFO: misplaced readback start: 0
[22:24:50.978] <TB2> INFO: Pixel decoding errors: 0
[22:24:50.978] <TB2> INFO: pixel data incomplete: 0
[22:24:50.978] <TB2> INFO: pixel address: 0
[22:24:50.978] <TB2> INFO: pulse height fill bit: 0
[22:24:50.978] <TB2> INFO: buffer corruption: 0
[22:24:50.001] <TB2> INFO: Decoding statistics:
[22:24:50.001] <TB2> INFO: General information:
[22:24:50.001] <TB2> INFO: 16bit words read: 3389366
[22:24:50.001] <TB2> INFO: valid events total: 353536
[22:24:50.001] <TB2> INFO: empty events: 20605
[22:24:50.001] <TB2> INFO: valid events with pixels: 332931
[22:24:50.001] <TB2> INFO: valid pixel hits: 634075
[22:24:50.001] <TB2> INFO: Event errors: 0
[22:24:50.001] <TB2> INFO: start marker: 0
[22:24:50.001] <TB2> INFO: stop marker: 0
[22:24:50.001] <TB2> INFO: overflow: 0
[22:24:50.001] <TB2> INFO: invalid 5bit words: 0
[22:24:50.001] <TB2> INFO: invalid XOR eye diagram: 0
[22:24:50.001] <TB2> INFO: frame (failed synchr.): 0
[22:24:50.001] <TB2> INFO: idle data (no TBM trl): 0
[22:24:50.001] <TB2> INFO: no data (only TBM hdr): 0
[22:24:50.001] <TB2> INFO: TBM errors: 0
[22:24:50.001] <TB2> INFO: flawed TBM headers: 0
[22:24:50.001] <TB2> INFO: flawed TBM trailers: 0
[22:24:50.001] <TB2> INFO: event ID mismatches: 0
[22:24:50.001] <TB2> INFO: ROC errors: 0
[22:24:50.001] <TB2> INFO: missing ROC header(s): 0
[22:24:50.001] <TB2> INFO: misplaced readback start: 0
[22:24:50.001] <TB2> INFO: Pixel decoding errors: 0
[22:24:50.001] <TB2> INFO: pixel data incomplete: 0
[22:24:50.001] <TB2> INFO: pixel address: 0
[22:24:50.001] <TB2> INFO: pulse height fill bit: 0
[22:24:50.001] <TB2> INFO: buffer corruption: 0
[22:24:50.001] <TB2> INFO: enter test to run
[22:24:50.001] <TB2> INFO: test: exit no parameter change
[22:24:51.120] <TB2> QUIET: Connection to board 149 closed.
[22:24:51.121] <TB2> INFO: pXar: this is the end, my friend