[19:20:57.146] <TB2> INFO: *** Welcome to pxar ***
[19:20:57.146] <TB2> INFO: *** Today: 2016/10/21
[19:20:57.151] <TB2> INFO: *** Version: c8ba-dirty
[19:20:57.151] <TB2> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters_C15.dat
[19:20:57.152] <TB2> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//tbmParameters_C1b.dat
[19:20:57.152] <TB2> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//defaultMaskFile.dat
[19:20:57.152] <TB2> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//trimParameters_C15.dat
[19:20:57.250] <TB2> INFO: clk: 4
[19:20:57.250] <TB2> INFO: ctr: 4
[19:20:57.250] <TB2> INFO: sda: 19
[19:20:57.250] <TB2> INFO: tin: 9
[19:20:57.250] <TB2> INFO: level: 15
[19:20:57.250] <TB2> INFO: triggerdelay: 0
[19:20:57.250] <TB2> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[19:20:57.250] <TB2> INFO: Log level: INFO
[19:20:57.260] <TB2> INFO: Found DTB DTB_WWXUD2
[19:20:57.268] <TB2> QUIET: Connection to board DTB_WWXUD2 opened.
[19:20:57.270] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 149
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWXUD2
MAC address: 40D855118095
Hostname: pixelDTB149
Comment:
------------------------------------------------------
[19:20:57.271] <TB2> INFO: RPC call hashes of host and DTB match: 486171790
[19:20:58.765] <TB2> INFO: DUT info:
[19:20:58.765] <TB2> INFO: The DUT currently contains the following objects:
[19:20:58.765] <TB2> INFO: 4 TBM Cores tbm10c (4 ON)
[19:20:58.765] <TB2> INFO: TBM Core alpha (0): 7 registers set
[19:20:58.765] <TB2> INFO: TBM Core beta (1): 7 registers set
[19:20:58.765] <TB2> INFO: TBM Core alpha (2): 7 registers set
[19:20:58.765] <TB2> INFO: TBM Core beta (3): 7 registers set
[19:20:58.765] <TB2> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[19:20:58.765] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[19:20:58.765] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[19:20:58.765] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[19:20:58.765] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[19:20:58.765] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[19:20:58.765] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[19:20:58.765] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[19:20:58.765] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[19:20:58.765] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[19:20:58.766] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[19:20:58.766] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[19:20:58.766] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[19:20:58.766] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[19:20:58.766] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[19:20:58.766] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[19:20:58.766] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[19:20:59.167] <TB2> INFO: enter 'restricted' command line mode
[19:20:59.167] <TB2> INFO: enter test to run
[19:20:59.167] <TB2> INFO: test: pretest no parameter change
[19:20:59.167] <TB2> INFO: running: pretest
[19:20:59.172] <TB2> INFO: ######################################################################
[19:20:59.172] <TB2> INFO: PixTestPretest::doTest()
[19:20:59.172] <TB2> INFO: ######################################################################
[19:20:59.174] <TB2> INFO: ----------------------------------------------------------------------
[19:20:59.174] <TB2> INFO: PixTestPretest::programROC()
[19:20:59.174] <TB2> INFO: ----------------------------------------------------------------------
[19:21:17.188] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[19:21:17.189] <TB2> INFO: IA differences per ROC: 19.3 17.7 18.5 18.5 17.7 20.1 17.7 19.3 20.1 22.5 19.3 19.3 17.7 20.1 20.1 18.5
[19:21:17.257] <TB2> INFO: ----------------------------------------------------------------------
[19:21:17.257] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[19:21:17.257] <TB2> INFO: ----------------------------------------------------------------------
[19:21:38.562] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 381 mA = 23.8125 mA/ROC
[19:21:38.562] <TB2> INFO: i(loss) [mA/ROC]: 19.2 18.4 19.2 19.2 20.1 18.4 20.1 19.2 19.2 18.4 19.2 18.4 19.2 19.2 19.2 19.2
[19:21:38.597] <TB2> INFO: ----------------------------------------------------------------------
[19:21:38.598] <TB2> INFO: PixTestPretest::findTiming()
[19:21:38.598] <TB2> INFO: ----------------------------------------------------------------------
[19:21:38.598] <TB2> INFO: PixTestCmd::init()

[19:22:10.692] <TB2> INFO: TBM phases: 160MHz: 7, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[19:22:10.692] <TB2> INFO: (success/tries = 100/100), width = 3
[19:22:12.192] <TB2> INFO: ----------------------------------------------------------------------
[19:22:12.192] <TB2> INFO: PixTestPretest::findWorkingPixel()
[19:22:12.192] <TB2> INFO: ----------------------------------------------------------------------
[19:22:12.284] <TB2> INFO: Expecting 231680 events.
[19:22:22.067] <TB2> INFO: 231680 events read in total (9191ms).
[19:22:22.076] <TB2> INFO: Test took 9881ms.
[19:22:22.316] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[19:22:22.348] <TB2> INFO: ----------------------------------------------------------------------
[19:22:22.348] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[19:22:22.348] <TB2> INFO: ----------------------------------------------------------------------
[19:22:22.442] <TB2> INFO: Expecting 231680 events.
[19:22:32.286] <TB2> INFO: 231680 events read in total (9252ms).
[19:22:32.294] <TB2> INFO: Test took 9941ms.
[19:22:32.562] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[19:22:32.562] <TB2> INFO: CalDel: 114 102 102 98 120 127 111 96 101 110 106 115 96 115 112 111
[19:22:32.562] <TB2> INFO: VthrComp: 51 57 53 51 57 51 51 51 51 51 51 51 51 51 53 51
[19:22:32.565] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters_C0.dat
[19:22:32.565] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters_C1.dat
[19:22:32.565] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters_C2.dat
[19:22:32.566] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters_C3.dat
[19:22:32.566] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters_C4.dat
[19:22:32.566] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters_C5.dat
[19:22:32.566] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters_C6.dat
[19:22:32.566] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters_C7.dat
[19:22:32.566] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters_C8.dat
[19:22:32.567] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters_C9.dat
[19:22:32.567] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters_C10.dat
[19:22:32.567] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters_C11.dat
[19:22:32.567] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters_C12.dat
[19:22:32.567] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters_C13.dat
[19:22:32.567] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters_C14.dat
[19:22:32.567] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters_C15.dat
[19:22:32.568] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//tbmParameters_C0a.dat
[19:22:32.568] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//tbmParameters_C0b.dat
[19:22:32.568] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//tbmParameters_C1a.dat
[19:22:32.568] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//tbmParameters_C1b.dat
[19:22:32.568] <TB2> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[19:22:32.624] <TB2> INFO: enter test to run
[19:22:32.624] <TB2> INFO: test: FullTest no parameter change
[19:22:32.624] <TB2> INFO: running: fulltest
[19:22:32.625] <TB2> INFO: ######################################################################
[19:22:32.625] <TB2> INFO: PixTestFullTest::doTest()
[19:22:32.625] <TB2> INFO: ######################################################################
[19:22:32.626] <TB2> INFO: ######################################################################
[19:22:32.626] <TB2> INFO: PixTestAlive::doTest()
[19:22:32.626] <TB2> INFO: ######################################################################
[19:22:32.627] <TB2> INFO: ----------------------------------------------------------------------
[19:22:32.627] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[19:22:32.627] <TB2> INFO: ----------------------------------------------------------------------
[19:22:32.894] <TB2> INFO: Expecting 41600 events.
[19:22:36.591] <TB2> INFO: 41600 events read in total (3105ms).
[19:22:36.591] <TB2> INFO: Test took 3962ms.
[19:22:36.824] <TB2> INFO: PixTestAlive::aliveTest() done
[19:22:36.825] <TB2> INFO: number of dead pixels (per ROC): 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
[19:22:36.826] <TB2> INFO: ----------------------------------------------------------------------
[19:22:36.826] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[19:22:36.826] <TB2> INFO: ----------------------------------------------------------------------
[19:22:37.088] <TB2> INFO: Expecting 41600 events.
[19:22:40.063] <TB2> INFO: 41600 events read in total (2383ms).
[19:22:40.063] <TB2> INFO: Test took 3234ms.
[19:22:40.063] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[19:22:40.307] <TB2> INFO: PixTestAlive::maskTest() done
[19:22:40.307] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[19:22:40.309] <TB2> INFO: ----------------------------------------------------------------------
[19:22:40.309] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[19:22:40.309] <TB2> INFO: ----------------------------------------------------------------------
[19:22:40.552] <TB2> INFO: Expecting 41600 events.
[19:22:44.088] <TB2> INFO: 41600 events read in total (2944ms).
[19:22:44.088] <TB2> INFO: Test took 3777ms.
[19:22:44.329] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[19:22:44.329] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[19:22:44.329] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[19:22:44.329] <TB2> INFO: Decoding statistics:
[19:22:44.329] <TB2> INFO: General information:
[19:22:44.329] <TB2> INFO: 16bit words read: 0
[19:22:44.329] <TB2> INFO: valid events total: 0
[19:22:44.329] <TB2> INFO: empty events: 0
[19:22:44.329] <TB2> INFO: valid events with pixels: 0
[19:22:44.329] <TB2> INFO: valid pixel hits: 0
[19:22:44.329] <TB2> INFO: Event errors: 0
[19:22:44.329] <TB2> INFO: start marker: 0
[19:22:44.329] <TB2> INFO: stop marker: 0
[19:22:44.329] <TB2> INFO: overflow: 0
[19:22:44.329] <TB2> INFO: invalid 5bit words: 0
[19:22:44.329] <TB2> INFO: invalid XOR eye diagram: 0
[19:22:44.329] <TB2> INFO: frame (failed synchr.): 0
[19:22:44.329] <TB2> INFO: idle data (no TBM trl): 0
[19:22:44.329] <TB2> INFO: no data (only TBM hdr): 0
[19:22:44.329] <TB2> INFO: TBM errors: 0
[19:22:44.329] <TB2> INFO: flawed TBM headers: 0
[19:22:44.329] <TB2> INFO: flawed TBM trailers: 0
[19:22:44.329] <TB2> INFO: event ID mismatches: 0
[19:22:44.330] <TB2> INFO: ROC errors: 0
[19:22:44.330] <TB2> INFO: missing ROC header(s): 0
[19:22:44.330] <TB2> INFO: misplaced readback start: 0
[19:22:44.330] <TB2> INFO: Pixel decoding errors: 0
[19:22:44.330] <TB2> INFO: pixel data incomplete: 0
[19:22:44.330] <TB2> INFO: pixel address: 0
[19:22:44.330] <TB2> INFO: pulse height fill bit: 0
[19:22:44.330] <TB2> INFO: buffer corruption: 0
[19:22:44.337] <TB2> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C15.dat
[19:22:44.337] <TB2> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[19:22:44.337] <TB2> INFO: ######################################################################
[19:22:44.337] <TB2> INFO: PixTestReadback::doTest()
[19:22:44.337] <TB2> INFO: ######################################################################
[19:22:44.337] <TB2> INFO: ----------------------------------------------------------------------
[19:22:44.337] <TB2> INFO: PixTestReadback::CalibrateVd()
[19:22:44.337] <TB2> INFO: ----------------------------------------------------------------------
[19:22:54.311] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C0.dat
[19:22:54.311] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C1.dat
[19:22:54.311] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C2.dat
[19:22:54.311] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C3.dat
[19:22:54.311] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C4.dat
[19:22:54.312] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C5.dat
[19:22:54.312] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C6.dat
[19:22:54.312] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C7.dat
[19:22:54.312] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C8.dat
[19:22:54.312] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C9.dat
[19:22:54.312] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C10.dat
[19:22:54.312] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C11.dat
[19:22:54.312] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C12.dat
[19:22:54.312] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C13.dat
[19:22:54.312] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C14.dat
[19:22:54.312] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C15.dat
[19:22:54.344] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[19:22:54.344] <TB2> INFO: ----------------------------------------------------------------------
[19:22:54.344] <TB2> INFO: PixTestReadback::CalibrateVa()
[19:22:54.344] <TB2> INFO: ----------------------------------------------------------------------
[19:23:04.284] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C0.dat
[19:23:04.284] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C1.dat
[19:23:04.284] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C2.dat
[19:23:04.284] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C3.dat
[19:23:04.284] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C4.dat
[19:23:04.284] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C5.dat
[19:23:04.284] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C6.dat
[19:23:04.284] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C7.dat
[19:23:04.284] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C8.dat
[19:23:04.284] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C9.dat
[19:23:04.284] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C10.dat
[19:23:04.284] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C11.dat
[19:23:04.284] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C12.dat
[19:23:04.284] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C13.dat
[19:23:04.285] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C14.dat
[19:23:04.285] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C15.dat
[19:23:04.315] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[19:23:04.315] <TB2> INFO: ----------------------------------------------------------------------
[19:23:04.315] <TB2> INFO: PixTestReadback::readbackVbg()
[19:23:04.315] <TB2> INFO: ----------------------------------------------------------------------
[19:23:11.988] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[19:23:11.988] <TB2> INFO: ----------------------------------------------------------------------
[19:23:11.988] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[19:23:11.988] <TB2> INFO: ----------------------------------------------------------------------
[19:23:11.988] <TB2> INFO: Vbg will be calibrated using Vd calibration
[19:23:11.988] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 153.7calibrated Vbg = 1.17904 :::*/*/*/*/
[19:23:11.988] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 163.2calibrated Vbg = 1.18059 :::*/*/*/*/
[19:23:11.988] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 157.9calibrated Vbg = 1.17665 :::*/*/*/*/
[19:23:11.988] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 152.1calibrated Vbg = 1.17008 :::*/*/*/*/
[19:23:11.988] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 162.6calibrated Vbg = 1.18201 :::*/*/*/*/
[19:23:11.988] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 148.1calibrated Vbg = 1.18333 :::*/*/*/*/
[19:23:11.988] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 154.5calibrated Vbg = 1.18144 :::*/*/*/*/
[19:23:11.988] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 163.8calibrated Vbg = 1.18586 :::*/*/*/*/
[19:23:11.988] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 160.2calibrated Vbg = 1.18097 :::*/*/*/*/
[19:23:11.988] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 149.8calibrated Vbg = 1.18072 :::*/*/*/*/
[19:23:11.988] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 145.9calibrated Vbg = 1.16826 :::*/*/*/*/
[19:23:11.988] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 154.7calibrated Vbg = 1.16471 :::*/*/*/*/
[19:23:11.988] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 153.8calibrated Vbg = 1.17344 :::*/*/*/*/
[19:23:11.988] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 143.9calibrated Vbg = 1.17651 :::*/*/*/*/
[19:23:11.988] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 151.4calibrated Vbg = 1.17548 :::*/*/*/*/
[19:23:11.988] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 154.2calibrated Vbg = 1.17647 :::*/*/*/*/
[19:23:11.991] <TB2> INFO: ----------------------------------------------------------------------
[19:23:11.991] <TB2> INFO: PixTestReadback::CalibrateIa()
[19:23:11.991] <TB2> INFO: ----------------------------------------------------------------------
[19:25:52.802] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C0.dat
[19:25:52.802] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C1.dat
[19:25:52.803] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C2.dat
[19:25:52.803] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C3.dat
[19:25:52.803] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C4.dat
[19:25:52.803] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C5.dat
[19:25:52.803] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C6.dat
[19:25:52.803] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C7.dat
[19:25:52.803] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C8.dat
[19:25:52.803] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C9.dat
[19:25:52.803] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C10.dat
[19:25:52.803] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C11.dat
[19:25:52.803] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C12.dat
[19:25:52.803] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C13.dat
[19:25:52.803] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C14.dat
[19:25:52.803] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//readbackCal_C15.dat
[19:25:52.833] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[19:25:52.834] <TB2> INFO: PixTestReadback::doTest() done
[19:25:52.834] <TB2> INFO: Decoding statistics:
[19:25:52.834] <TB2> INFO: General information:
[19:25:52.834] <TB2> INFO: 16bit words read: 1536
[19:25:52.834] <TB2> INFO: valid events total: 256
[19:25:52.834] <TB2> INFO: empty events: 256
[19:25:52.834] <TB2> INFO: valid events with pixels: 0
[19:25:52.834] <TB2> INFO: valid pixel hits: 0
[19:25:52.834] <TB2> INFO: Event errors: 0
[19:25:52.834] <TB2> INFO: start marker: 0
[19:25:52.834] <TB2> INFO: stop marker: 0
[19:25:52.834] <TB2> INFO: overflow: 0
[19:25:52.834] <TB2> INFO: invalid 5bit words: 0
[19:25:52.834] <TB2> INFO: invalid XOR eye diagram: 0
[19:25:52.834] <TB2> INFO: frame (failed synchr.): 0
[19:25:52.834] <TB2> INFO: idle data (no TBM trl): 0
[19:25:52.834] <TB2> INFO: no data (only TBM hdr): 0
[19:25:52.834] <TB2> INFO: TBM errors: 0
[19:25:52.834] <TB2> INFO: flawed TBM headers: 0
[19:25:52.834] <TB2> INFO: flawed TBM trailers: 0
[19:25:52.834] <TB2> INFO: event ID mismatches: 0
[19:25:52.834] <TB2> INFO: ROC errors: 0
[19:25:52.834] <TB2> INFO: missing ROC header(s): 0
[19:25:52.834] <TB2> INFO: misplaced readback start: 0
[19:25:52.834] <TB2> INFO: Pixel decoding errors: 0
[19:25:52.834] <TB2> INFO: pixel data incomplete: 0
[19:25:52.834] <TB2> INFO: pixel address: 0
[19:25:52.834] <TB2> INFO: pulse height fill bit: 0
[19:25:52.834] <TB2> INFO: buffer corruption: 0
[19:25:52.889] <TB2> INFO: ######################################################################
[19:25:52.889] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[19:25:52.889] <TB2> INFO: ######################################################################
[19:25:52.892] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[19:25:52.906] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[19:25:52.906] <TB2> INFO: run 1 of 1
[19:25:53.145] <TB2> INFO: Expecting 3120000 events.
[19:26:24.067] <TB2> INFO: 664865 events read in total (30330ms).











[19:26:54.098] <TB2> INFO: 1323185 events read in total (60361ms).











[19:27:24.258] <TB2> INFO: 1979690 events read in total (90521ms).











[19:27:54.332] <TB2> INFO: 2635130 events read in total (120595ms).











[19:28:16.238] <TB2> INFO: 3120000 events read in total (142501ms).
[19:28:16.321] <TB2> INFO: Test took 143416ms.
[19:28:43.158] <TB2> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 170 seconds
[19:28:43.158] <TB2> INFO: number of dead bumps (per ROC): 1 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0
[19:28:43.158] <TB2> INFO: separation cut (per ROC): 100 109 105 101 106 90 93 108 107 121 106 106 106 104 103 104
[19:28:43.159] <TB2> INFO: Decoding statistics:
[19:28:43.159] <TB2> INFO: General information:
[19:28:43.159] <TB2> INFO: 16bit words read: 0
[19:28:43.159] <TB2> INFO: valid events total: 0
[19:28:43.159] <TB2> INFO: empty events: 0
[19:28:43.159] <TB2> INFO: valid events with pixels: 0
[19:28:43.159] <TB2> INFO: valid pixel hits: 0
[19:28:43.159] <TB2> INFO: Event errors: 0
[19:28:43.159] <TB2> INFO: start marker: 0
[19:28:43.159] <TB2> INFO: stop marker: 0
[19:28:43.159] <TB2> INFO: overflow: 0
[19:28:43.159] <TB2> INFO: invalid 5bit words: 0
[19:28:43.159] <TB2> INFO: invalid XOR eye diagram: 0
[19:28:43.159] <TB2> INFO: frame (failed synchr.): 0
[19:28:43.159] <TB2> INFO: idle data (no TBM trl): 0
[19:28:43.159] <TB2> INFO: no data (only TBM hdr): 0
[19:28:43.159] <TB2> INFO: TBM errors: 0
[19:28:43.159] <TB2> INFO: flawed TBM headers: 0
[19:28:43.159] <TB2> INFO: flawed TBM trailers: 0
[19:28:43.159] <TB2> INFO: event ID mismatches: 0
[19:28:43.159] <TB2> INFO: ROC errors: 0
[19:28:43.159] <TB2> INFO: missing ROC header(s): 0
[19:28:43.159] <TB2> INFO: misplaced readback start: 0
[19:28:43.159] <TB2> INFO: Pixel decoding errors: 0
[19:28:43.159] <TB2> INFO: pixel data incomplete: 0
[19:28:43.159] <TB2> INFO: pixel address: 0
[19:28:43.159] <TB2> INFO: pulse height fill bit: 0
[19:28:43.159] <TB2> INFO: buffer corruption: 0
[19:28:43.195] <TB2> INFO: ######################################################################
[19:28:43.195] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[19:28:43.195] <TB2> INFO: ######################################################################
[19:28:43.195] <TB2> INFO: ----------------------------------------------------------------------
[19:28:43.195] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[19:28:43.195] <TB2> INFO: ----------------------------------------------------------------------
[19:28:43.195] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[19:28:43.208] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[19:28:43.208] <TB2> INFO: run 1 of 1
[19:28:43.457] <TB2> INFO: Expecting 36608000 events.
[19:29:06.870] <TB2> INFO: 671800 events read in total (22822ms).
[19:29:29.489] <TB2> INFO: 1328700 events read in total (45441ms).
[19:29:51.900] <TB2> INFO: 1987950 events read in total (67853ms).
[19:30:14.208] <TB2> INFO: 2644950 events read in total (90160ms).
[19:30:37.009] <TB2> INFO: 3302550 events read in total (112961ms).
[19:30:59.586] <TB2> INFO: 3958250 events read in total (135538ms).
[19:31:21.966] <TB2> INFO: 4615400 events read in total (157918ms).
[19:31:44.473] <TB2> INFO: 5270550 events read in total (180425ms).
[19:32:06.904] <TB2> INFO: 5928800 events read in total (202856ms).
[19:32:29.441] <TB2> INFO: 6588350 events read in total (225393ms).
[19:32:52.170] <TB2> INFO: 7244850 events read in total (248122ms).
[19:33:14.634] <TB2> INFO: 7900200 events read in total (270586ms).
[19:33:37.186] <TB2> INFO: 8552500 events read in total (293138ms).
[19:33:59.733] <TB2> INFO: 9208100 events read in total (315685ms).
[19:34:22.088] <TB2> INFO: 9861650 events read in total (338040ms).
[19:34:44.485] <TB2> INFO: 10518800 events read in total (360437ms).
[19:35:07.134] <TB2> INFO: 11172600 events read in total (383086ms).
[19:35:29.596] <TB2> INFO: 11826900 events read in total (405548ms).
[19:35:52.312] <TB2> INFO: 12480500 events read in total (428264ms).
[19:36:14.736] <TB2> INFO: 13134350 events read in total (450688ms).
[19:36:37.188] <TB2> INFO: 13786650 events read in total (473140ms).
[19:36:59.509] <TB2> INFO: 14438450 events read in total (495461ms).
[19:37:21.968] <TB2> INFO: 15091900 events read in total (517920ms).
[19:37:44.582] <TB2> INFO: 15746200 events read in total (540534ms).
[19:38:07.126] <TB2> INFO: 16399650 events read in total (563078ms).
[19:38:29.680] <TB2> INFO: 17051100 events read in total (585632ms).
[19:38:52.363] <TB2> INFO: 17705100 events read in total (608315ms).
[19:39:14.992] <TB2> INFO: 18355500 events read in total (630944ms).
[19:39:37.990] <TB2> INFO: 19006750 events read in total (653942ms).
[19:40:00.643] <TB2> INFO: 19653400 events read in total (676595ms).
[19:40:23.384] <TB2> INFO: 20303700 events read in total (699336ms).
[19:40:45.917] <TB2> INFO: 20951950 events read in total (721869ms).
[19:41:08.576] <TB2> INFO: 21601300 events read in total (744528ms).
[19:41:31.286] <TB2> INFO: 22251800 events read in total (767238ms).
[19:41:53.930] <TB2> INFO: 22901650 events read in total (789882ms).
[19:42:16.514] <TB2> INFO: 23551400 events read in total (812466ms).
[19:42:38.947] <TB2> INFO: 24199850 events read in total (834899ms).
[19:43:01.694] <TB2> INFO: 24849850 events read in total (857646ms).
[19:43:24.276] <TB2> INFO: 25498800 events read in total (880228ms).
[19:43:46.707] <TB2> INFO: 26148950 events read in total (902659ms).
[19:44:09.139] <TB2> INFO: 26795550 events read in total (925091ms).
[19:44:31.897] <TB2> INFO: 27447050 events read in total (947849ms).
[19:44:54.405] <TB2> INFO: 28095250 events read in total (970357ms).
[19:45:17.144] <TB2> INFO: 28745600 events read in total (993096ms).
[19:45:39.699] <TB2> INFO: 29392250 events read in total (1015651ms).
[19:46:02.185] <TB2> INFO: 30040900 events read in total (1038137ms).
[19:46:24.773] <TB2> INFO: 30688700 events read in total (1060726ms).
[19:46:47.299] <TB2> INFO: 31334950 events read in total (1083251ms).
[19:47:10.062] <TB2> INFO: 31983150 events read in total (1106014ms).
[19:47:32.522] <TB2> INFO: 32628450 events read in total (1128474ms).
[19:47:55.030] <TB2> INFO: 33276400 events read in total (1150982ms).
[19:48:17.553] <TB2> INFO: 33922850 events read in total (1173505ms).
[19:48:40.080] <TB2> INFO: 34572650 events read in total (1196032ms).
[19:49:02.568] <TB2> INFO: 35220100 events read in total (1218520ms).
[19:49:25.160] <TB2> INFO: 35870100 events read in total (1241112ms).
[19:49:47.872] <TB2> INFO: 36528050 events read in total (1263824ms).
[19:49:50.977] <TB2> INFO: 36608000 events read in total (1266929ms).
[19:49:51.068] <TB2> INFO: Test took 1267859ms.
[19:49:51.667] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:49:54.097] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:49:56.544] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:49:58.614] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:50:00.149] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:50:01.591] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:50:03.082] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:50:04.539] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:50:05.001] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:50:07.491] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:50:08.921] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:50:10.397] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:50:12.130] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:50:14.181] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:50:16.090] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:50:18.226] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:50:20.361] <TB2> INFO: PixTestScurves::scurves() done
[19:50:20.361] <TB2> INFO: Vcal mean: 110.40 123.96 124.02 110.33 128.61 112.66 104.17 107.12 114.30 118.03 105.93 116.83 114.80 109.65 122.35 110.56
[19:50:20.361] <TB2> INFO: Vcal RMS: 4.89 6.29 7.00 5.00 8.30 6.67 5.20 5.54 5.34 6.13 5.75 5.54 5.14 5.05 6.52 4.95
[19:50:20.361] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1297 seconds
[19:50:20.361] <TB2> INFO: Decoding statistics:
[19:50:20.361] <TB2> INFO: General information:
[19:50:20.361] <TB2> INFO: 16bit words read: 0
[19:50:20.361] <TB2> INFO: valid events total: 0
[19:50:20.361] <TB2> INFO: empty events: 0
[19:50:20.361] <TB2> INFO: valid events with pixels: 0
[19:50:20.361] <TB2> INFO: valid pixel hits: 0
[19:50:20.361] <TB2> INFO: Event errors: 0
[19:50:20.361] <TB2> INFO: start marker: 0
[19:50:20.361] <TB2> INFO: stop marker: 0
[19:50:20.361] <TB2> INFO: overflow: 0
[19:50:20.361] <TB2> INFO: invalid 5bit words: 0
[19:50:20.361] <TB2> INFO: invalid XOR eye diagram: 0
[19:50:20.361] <TB2> INFO: frame (failed synchr.): 0
[19:50:20.361] <TB2> INFO: idle data (no TBM trl): 0
[19:50:20.361] <TB2> INFO: no data (only TBM hdr): 0
[19:50:20.361] <TB2> INFO: TBM errors: 0
[19:50:20.361] <TB2> INFO: flawed TBM headers: 0
[19:50:20.361] <TB2> INFO: flawed TBM trailers: 0
[19:50:20.361] <TB2> INFO: event ID mismatches: 0
[19:50:20.361] <TB2> INFO: ROC errors: 0
[19:50:20.361] <TB2> INFO: missing ROC header(s): 0
[19:50:20.361] <TB2> INFO: misplaced readback start: 0
[19:50:20.361] <TB2> INFO: Pixel decoding errors: 0
[19:50:20.361] <TB2> INFO: pixel data incomplete: 0
[19:50:20.361] <TB2> INFO: pixel address: 0
[19:50:20.362] <TB2> INFO: pulse height fill bit: 0
[19:50:20.362] <TB2> INFO: buffer corruption: 0
[19:50:20.439] <TB2> INFO: ######################################################################
[19:50:20.439] <TB2> INFO: PixTestTrim::doTest()
[19:50:20.439] <TB2> INFO: ######################################################################
[19:50:20.441] <TB2> INFO: ----------------------------------------------------------------------
[19:50:20.441] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[19:50:20.441] <TB2> INFO: ----------------------------------------------------------------------
[19:50:20.494] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[19:50:20.494] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[19:50:20.507] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:50:20.507] <TB2> INFO: run 1 of 1
[19:50:20.751] <TB2> INFO: Expecting 5025280 events.
[19:50:51.580] <TB2> INFO: 818600 events read in total (30222ms).
[19:51:21.907] <TB2> INFO: 1633304 events read in total (60549ms).
[19:51:52.303] <TB2> INFO: 2445632 events read in total (90945ms).
[19:52:22.491] <TB2> INFO: 3254408 events read in total (121133ms).
[19:52:52.465] <TB2> INFO: 4061224 events read in total (151107ms).
[19:53:22.721] <TB2> INFO: 4866680 events read in total (181363ms).
[19:53:28.911] <TB2> INFO: 5025280 events read in total (187553ms).
[19:53:28.970] <TB2> INFO: Test took 188462ms.
[19:53:47.558] <TB2> INFO: ROC 0 VthrComp = 113
[19:53:47.558] <TB2> INFO: ROC 1 VthrComp = 125
[19:53:47.558] <TB2> INFO: ROC 2 VthrComp = 120
[19:53:47.558] <TB2> INFO: ROC 3 VthrComp = 114
[19:53:47.558] <TB2> INFO: ROC 4 VthrComp = 126
[19:53:47.559] <TB2> INFO: ROC 5 VthrComp = 105
[19:53:47.559] <TB2> INFO: ROC 6 VthrComp = 107
[19:53:47.559] <TB2> INFO: ROC 7 VthrComp = 112
[19:53:47.559] <TB2> INFO: ROC 8 VthrComp = 116
[19:53:47.559] <TB2> INFO: ROC 9 VthrComp = 125
[19:53:47.559] <TB2> INFO: ROC 10 VthrComp = 110
[19:53:47.560] <TB2> INFO: ROC 11 VthrComp = 113
[19:53:47.560] <TB2> INFO: ROC 12 VthrComp = 113
[19:53:47.560] <TB2> INFO: ROC 13 VthrComp = 111
[19:53:47.560] <TB2> INFO: ROC 14 VthrComp = 123
[19:53:47.560] <TB2> INFO: ROC 15 VthrComp = 113
[19:53:47.892] <TB2> INFO: Expecting 41600 events.
[19:53:51.466] <TB2> INFO: 41600 events read in total (2983ms).
[19:53:51.467] <TB2> INFO: Test took 3906ms.
[19:53:51.478] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[19:53:51.478] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[19:53:51.491] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:53:51.491] <TB2> INFO: run 1 of 1
[19:53:51.769] <TB2> INFO: Expecting 5025280 events.
[19:54:18.218] <TB2> INFO: 592496 events read in total (25857ms).
[19:54:43.830] <TB2> INFO: 1183552 events read in total (51469ms).
[19:55:10.161] <TB2> INFO: 1774776 events read in total (77800ms).
[19:55:35.870] <TB2> INFO: 2365064 events read in total (103509ms).
[19:56:01.509] <TB2> INFO: 2952560 events read in total (129148ms).
[19:56:27.402] <TB2> INFO: 3538776 events read in total (155041ms).
[19:56:53.406] <TB2> INFO: 4124072 events read in total (181045ms).
[19:57:19.409] <TB2> INFO: 4709016 events read in total (207048ms).
[19:57:33.800] <TB2> INFO: 5025280 events read in total (221439ms).
[19:57:33.873] <TB2> INFO: Test took 222383ms.
[19:58:00.939] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 61.6055 for pixel 17/7 mean/min/max = 46.9182/32.0546/61.7817
[19:58:00.940] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 64.8506 for pixel 35/3 mean/min/max = 47.4942/30.0857/64.9027
[19:58:00.940] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 66.1381 for pixel 6/18 mean/min/max = 48.1781/30.1064/66.2498
[19:58:00.941] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 59.9044 for pixel 10/65 mean/min/max = 46.188/32.3804/59.9956
[19:58:00.941] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 70.9285 for pixel 2/30 mean/min/max = 50.0962/29.2579/70.9345
[19:58:00.942] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 67.545 for pixel 8/17 mean/min/max = 50.3858/33.2054/67.5662
[19:58:00.942] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 60.2597 for pixel 26/0 mean/min/max = 47.2069/33.9217/60.4921
[19:58:00.943] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 59.8749 for pixel 0/15 mean/min/max = 46.1039/32.1191/60.0888
[19:58:00.943] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 60.9325 for pixel 0/52 mean/min/max = 46.1805/31.3228/61.0382
[19:58:00.944] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 60.8059 for pixel 4/9 mean/min/max = 45.5533/30.2894/60.8173
[19:58:00.944] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 61.9492 for pixel 11/0 mean/min/max = 48.1152/34.2388/61.9916
[19:58:00.945] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 62.0658 for pixel 40/6 mean/min/max = 47.2023/32.305/62.0997
[19:58:00.945] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 60.4955 for pixel 14/2 mean/min/max = 46.4558/32.2687/60.6429
[19:58:00.946] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 60.8802 for pixel 0/10 mean/min/max = 47.47/33.9531/60.987
[19:58:00.946] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 62.6547 for pixel 16/4 mean/min/max = 46.6717/30.6059/62.7375
[19:58:00.946] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 59.5377 for pixel 9/43 mean/min/max = 46.122/32.5667/59.6774
[19:58:00.947] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:58:01.036] <TB2> INFO: Expecting 411648 events.
[19:58:10.718] <TB2> INFO: 411648 events read in total (9090ms).
[19:58:10.725] <TB2> INFO: Expecting 411648 events.
[19:58:20.101] <TB2> INFO: 411648 events read in total (8973ms).
[19:58:20.111] <TB2> INFO: Expecting 411648 events.
[19:58:29.450] <TB2> INFO: 411648 events read in total (8936ms).
[19:58:29.466] <TB2> INFO: Expecting 411648 events.
[19:58:38.829] <TB2> INFO: 411648 events read in total (8960ms).
[19:58:38.845] <TB2> INFO: Expecting 411648 events.
[19:58:48.290] <TB2> INFO: 411648 events read in total (9042ms).
[19:58:48.309] <TB2> INFO: Expecting 411648 events.
[19:58:57.666] <TB2> INFO: 411648 events read in total (8954ms).
[19:58:57.690] <TB2> INFO: Expecting 411648 events.
[19:59:07.134] <TB2> INFO: 411648 events read in total (9042ms).
[19:59:07.164] <TB2> INFO: Expecting 411648 events.
[19:59:16.497] <TB2> INFO: 411648 events read in total (8930ms).
[19:59:16.524] <TB2> INFO: Expecting 411648 events.
[19:59:25.811] <TB2> INFO: 411648 events read in total (8884ms).
[19:59:25.848] <TB2> INFO: Expecting 411648 events.
[19:59:35.194] <TB2> INFO: 411648 events read in total (8942ms).
[19:59:35.229] <TB2> INFO: Expecting 411648 events.
[19:59:44.620] <TB2> INFO: 411648 events read in total (8988ms).
[19:59:44.678] <TB2> INFO: Expecting 411648 events.
[19:59:54.013] <TB2> INFO: 411648 events read in total (8932ms).
[19:59:54.053] <TB2> INFO: Expecting 411648 events.
[20:00:03.433] <TB2> INFO: 411648 events read in total (8977ms).
[20:00:03.484] <TB2> INFO: Expecting 411648 events.
[20:00:12.859] <TB2> INFO: 411648 events read in total (8972ms).
[20:00:12.902] <TB2> INFO: Expecting 411648 events.
[20:00:22.097] <TB2> INFO: 411648 events read in total (8792ms).
[20:00:22.147] <TB2> INFO: Expecting 411648 events.
[20:00:31.355] <TB2> INFO: 411648 events read in total (8805ms).
[20:00:31.403] <TB2> INFO: Test took 150456ms.
[20:00:32.210] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[20:00:32.224] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:00:32.224] <TB2> INFO: run 1 of 1
[20:00:32.497] <TB2> INFO: Expecting 5025280 events.
[20:00:58.945] <TB2> INFO: 587776 events read in total (25856ms).
[20:01:24.824] <TB2> INFO: 1174544 events read in total (51735ms).
[20:01:50.793] <TB2> INFO: 1760848 events read in total (77704ms).
[20:02:16.798] <TB2> INFO: 2344712 events read in total (103709ms).
[20:02:42.963] <TB2> INFO: 2929600 events read in total (129874ms).
[20:03:08.856] <TB2> INFO: 3513168 events read in total (155767ms).
[20:03:34.827] <TB2> INFO: 4096744 events read in total (181738ms).
[20:04:00.673] <TB2> INFO: 4680504 events read in total (207584ms).
[20:04:16.522] <TB2> INFO: 5025280 events read in total (223433ms).
[20:04:16.811] <TB2> INFO: Test took 224587ms.
[20:04:37.165] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 1.500000 .. 144.912778
[20:04:37.402] <TB2> INFO: Expecting 208000 events.
[20:04:46.885] <TB2> INFO: 208000 events read in total (8892ms).
[20:04:46.887] <TB2> INFO: Test took 9721ms.
[20:04:46.942] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 154 (-1/-1) hits flags = 528 (plus default)
[20:04:46.955] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:04:46.956] <TB2> INFO: run 1 of 1
[20:04:47.233] <TB2> INFO: Expecting 5125120 events.
[20:05:13.765] <TB2> INFO: 584992 events read in total (25940ms).
[20:05:39.682] <TB2> INFO: 1169536 events read in total (51857ms).
[20:06:06.144] <TB2> INFO: 1754608 events read in total (78319ms).
[20:06:31.795] <TB2> INFO: 2339376 events read in total (103970ms).
[20:06:57.759] <TB2> INFO: 2923672 events read in total (129934ms).
[20:07:23.666] <TB2> INFO: 3508072 events read in total (155841ms).
[20:07:49.619] <TB2> INFO: 4092248 events read in total (181794ms).
[20:08:15.628] <TB2> INFO: 4675832 events read in total (207803ms).
[20:08:35.834] <TB2> INFO: 5125120 events read in total (228009ms).
[20:08:36.055] <TB2> INFO: Test took 229100ms.
[20:09:01.392] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 27.066787 .. 51.682641
[20:09:01.631] <TB2> INFO: Expecting 208000 events.
[20:09:11.724] <TB2> INFO: 208000 events read in total (9501ms).
[20:09:11.725] <TB2> INFO: Test took 10331ms.
[20:09:11.795] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 61 (-1/-1) hits flags = 528 (plus default)
[20:09:11.809] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:09:11.809] <TB2> INFO: run 1 of 1
[20:09:12.087] <TB2> INFO: Expecting 1497600 events.
[20:09:40.336] <TB2> INFO: 638552 events read in total (27657ms).
[20:10:08.340] <TB2> INFO: 1275024 events read in total (55661ms).
[20:10:18.342] <TB2> INFO: 1497600 events read in total (65663ms).
[20:10:18.383] <TB2> INFO: Test took 66575ms.
[20:10:32.048] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 25.695531 .. 48.731260
[20:10:32.287] <TB2> INFO: Expecting 208000 events.
[20:10:42.128] <TB2> INFO: 208000 events read in total (9249ms).
[20:10:42.129] <TB2> INFO: Test took 10079ms.
[20:10:42.176] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 15 .. 58 (-1/-1) hits flags = 528 (plus default)
[20:10:42.190] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:10:42.190] <TB2> INFO: run 1 of 1
[20:10:42.468] <TB2> INFO: Expecting 1464320 events.
[20:11:10.765] <TB2> INFO: 655888 events read in total (27706ms).
[20:11:38.731] <TB2> INFO: 1310848 events read in total (55672ms).
[20:11:45.536] <TB2> INFO: 1464320 events read in total (62477ms).
[20:11:45.567] <TB2> INFO: Test took 63378ms.
[20:11:58.297] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 23.657555 .. 46.085884
[20:11:58.594] <TB2> INFO: Expecting 208000 events.
[20:12:08.226] <TB2> INFO: 208000 events read in total (9040ms).
[20:12:08.227] <TB2> INFO: Test took 9929ms.
[20:12:08.276] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 13 .. 56 (-1/-1) hits flags = 528 (plus default)
[20:12:08.289] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:12:08.289] <TB2> INFO: run 1 of 1
[20:12:08.567] <TB2> INFO: Expecting 1464320 events.
[20:12:38.151] <TB2> INFO: 671008 events read in total (28992ms).
[20:13:05.885] <TB2> INFO: 1341384 events read in total (56727ms).
[20:13:11.627] <TB2> INFO: 1464320 events read in total (62468ms).
[20:13:11.663] <TB2> INFO: Test took 63375ms.
[20:13:29.055] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[20:13:29.055] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[20:13:29.068] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:13:29.068] <TB2> INFO: run 1 of 1
[20:13:29.310] <TB2> INFO: Expecting 1364480 events.
[20:13:57.698] <TB2> INFO: 667480 events read in total (27797ms).
[20:14:25.945] <TB2> INFO: 1334424 events read in total (56044ms).
[20:14:27.602] <TB2> INFO: 1364480 events read in total (57702ms).
[20:14:27.630] <TB2> INFO: Test took 58562ms.
[20:14:40.075] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C0.dat
[20:14:40.075] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C1.dat
[20:14:40.075] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C2.dat
[20:14:40.075] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C3.dat
[20:14:40.076] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C4.dat
[20:14:40.076] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C5.dat
[20:14:40.076] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C6.dat
[20:14:40.076] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C7.dat
[20:14:40.076] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C8.dat
[20:14:40.076] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C9.dat
[20:14:40.076] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C10.dat
[20:14:40.076] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C11.dat
[20:14:40.076] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C12.dat
[20:14:40.076] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C13.dat
[20:14:40.076] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C14.dat
[20:14:40.077] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C15.dat
[20:14:40.077] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//trimParameters35_C0.dat
[20:14:40.083] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//trimParameters35_C1.dat
[20:14:40.088] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//trimParameters35_C2.dat
[20:14:40.094] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//trimParameters35_C3.dat
[20:14:40.100] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//trimParameters35_C4.dat
[20:14:40.105] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//trimParameters35_C5.dat
[20:14:40.111] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//trimParameters35_C6.dat
[20:14:40.116] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//trimParameters35_C7.dat
[20:14:40.121] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//trimParameters35_C8.dat
[20:14:40.127] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//trimParameters35_C9.dat
[20:14:40.132] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//trimParameters35_C10.dat
[20:14:40.138] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//trimParameters35_C11.dat
[20:14:40.143] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//trimParameters35_C12.dat
[20:14:40.148] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//trimParameters35_C13.dat
[20:14:40.154] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//trimParameters35_C14.dat
[20:14:40.159] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//trimParameters35_C15.dat
[20:14:40.165] <TB2> INFO: PixTestTrim::trimTest() done
[20:14:40.165] <TB2> INFO: vtrim: 138 131 120 123 166 128 135 121 122 124 137 128 123 114 128 133
[20:14:40.165] <TB2> INFO: vthrcomp: 113 125 120 114 126 105 107 112 116 125 110 113 113 111 123 113
[20:14:40.165] <TB2> INFO: vcal mean: 34.92 35.11 34.97 34.93 35.20 35.16 34.96 34.98 34.91 34.96 34.95 35.09 34.98 34.97 35.01 34.93
[20:14:40.165] <TB2> INFO: vcal RMS: 1.04 1.33 1.44 0.98 1.56 1.43 1.01 0.94 1.11 1.11 0.98 1.25 1.08 0.97 1.27 1.00
[20:14:40.165] <TB2> INFO: bits mean: 9.35 9.48 9.33 9.10 9.44 8.77 8.95 9.01 9.32 9.97 9.16 9.64 9.54 8.43 9.79 9.69
[20:14:40.165] <TB2> INFO: bits RMS: 2.69 2.89 2.82 2.79 2.78 2.61 2.58 2.87 2.86 2.72 2.40 2.58 2.64 2.78 2.72 2.53
[20:14:40.174] <TB2> INFO: ----------------------------------------------------------------------
[20:14:40.174] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[20:14:40.174] <TB2> INFO: ----------------------------------------------------------------------
[20:14:40.177] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[20:14:40.198] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:14:40.198] <TB2> INFO: run 1 of 1
[20:14:40.437] <TB2> INFO: Expecting 4160000 events.
[20:15:12.926] <TB2> INFO: 740065 events read in total (31898ms).
[20:15:44.174] <TB2> INFO: 1473385 events read in total (63146ms).
[20:16:15.754] <TB2> INFO: 2202895 events read in total (94726ms).
[20:16:46.928] <TB2> INFO: 2928595 events read in total (125900ms).
[20:17:19.108] <TB2> INFO: 3653305 events read in total (158080ms).
[20:17:41.212] <TB2> INFO: 4160000 events read in total (180184ms).
[20:17:41.310] <TB2> INFO: Test took 181112ms.
[20:18:05.442] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 220 (-1/-1) hits flags = 528 (plus default)
[20:18:05.455] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:18:05.455] <TB2> INFO: run 1 of 1
[20:18:05.692] <TB2> INFO: Expecting 4596800 events.
[20:18:37.051] <TB2> INFO: 693475 events read in total (30768ms).
[20:19:07.358] <TB2> INFO: 1383105 events read in total (61075ms).
[20:19:37.685] <TB2> INFO: 2069755 events read in total (91402ms).
[20:20:07.781] <TB2> INFO: 2753455 events read in total (121498ms).
[20:20:38.544] <TB2> INFO: 3435910 events read in total (152261ms).
[20:21:08.263] <TB2> INFO: 4116655 events read in total (181980ms).
[20:21:29.436] <TB2> INFO: 4596800 events read in total (203153ms).
[20:21:29.520] <TB2> INFO: Test took 204065ms.
[20:21:59.092] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 212 (-1/-1) hits flags = 528 (plus default)
[20:21:59.106] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:21:59.106] <TB2> INFO: run 1 of 1
[20:21:59.345] <TB2> INFO: Expecting 4430400 events.
[20:22:30.891] <TB2> INFO: 701990 events read in total (30955ms).
[20:23:01.773] <TB2> INFO: 1399450 events read in total (61837ms).
[20:23:32.705] <TB2> INFO: 2093540 events read in total (92769ms).
[20:24:03.254] <TB2> INFO: 2784320 events read in total (123318ms).
[20:24:33.913] <TB2> INFO: 3474430 events read in total (153977ms).
[20:25:04.184] <TB2> INFO: 4162490 events read in total (184248ms).
[20:25:16.128] <TB2> INFO: 4430400 events read in total (196192ms).
[20:25:16.212] <TB2> INFO: Test took 197106ms.
[20:25:43.624] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 212 (-1/-1) hits flags = 528 (plus default)
[20:25:43.638] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:25:43.638] <TB2> INFO: run 1 of 1
[20:25:43.877] <TB2> INFO: Expecting 4430400 events.
[20:26:15.191] <TB2> INFO: 701980 events read in total (30723ms).
[20:26:45.628] <TB2> INFO: 1399770 events read in total (61160ms).
[20:27:16.228] <TB2> INFO: 2094235 events read in total (91760ms).
[20:27:47.928] <TB2> INFO: 2784850 events read in total (123460ms).
[20:28:18.051] <TB2> INFO: 3475320 events read in total (153583ms).
[20:28:48.349] <TB2> INFO: 4163740 events read in total (183881ms).
[20:29:00.326] <TB2> INFO: 4430400 events read in total (195858ms).
[20:29:00.587] <TB2> INFO: Test took 196948ms.
[20:29:37.982] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 214 (-1/-1) hits flags = 528 (plus default)
[20:29:37.995] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:29:37.995] <TB2> INFO: run 1 of 1
[20:29:38.235] <TB2> INFO: Expecting 4472000 events.
[20:30:09.373] <TB2> INFO: 699970 events read in total (30547ms).
[20:30:39.981] <TB2> INFO: 1396090 events read in total (61155ms).
[20:31:10.393] <TB2> INFO: 2088520 events read in total (91567ms).
[20:31:41.093] <TB2> INFO: 2777645 events read in total (122267ms).
[20:32:11.850] <TB2> INFO: 3466230 events read in total (153024ms).
[20:32:42.262] <TB2> INFO: 4152700 events read in total (183436ms).
[20:32:56.251] <TB2> INFO: 4472000 events read in total (197425ms).
[20:32:56.342] <TB2> INFO: Test took 198346ms.
[20:33:23.169] <TB2> INFO: PixTestTrim::trimBitTest() done
[20:33:23.170] <TB2> INFO: PixTestTrim::doTest() done, duration: 2582 seconds
[20:33:23.170] <TB2> INFO: Decoding statistics:
[20:33:23.170] <TB2> INFO: General information:
[20:33:23.170] <TB2> INFO: 16bit words read: 0
[20:33:23.170] <TB2> INFO: valid events total: 0
[20:33:23.171] <TB2> INFO: empty events: 0
[20:33:23.171] <TB2> INFO: valid events with pixels: 0
[20:33:23.171] <TB2> INFO: valid pixel hits: 0
[20:33:23.171] <TB2> INFO: Event errors: 0
[20:33:23.171] <TB2> INFO: start marker: 0
[20:33:23.171] <TB2> INFO: stop marker: 0
[20:33:23.171] <TB2> INFO: overflow: 0
[20:33:23.171] <TB2> INFO: invalid 5bit words: 0
[20:33:23.171] <TB2> INFO: invalid XOR eye diagram: 0
[20:33:23.171] <TB2> INFO: frame (failed synchr.): 0
[20:33:23.171] <TB2> INFO: idle data (no TBM trl): 0
[20:33:23.171] <TB2> INFO: no data (only TBM hdr): 0
[20:33:23.171] <TB2> INFO: TBM errors: 0
[20:33:23.171] <TB2> INFO: flawed TBM headers: 0
[20:33:23.171] <TB2> INFO: flawed TBM trailers: 0
[20:33:23.171] <TB2> INFO: event ID mismatches: 0
[20:33:23.171] <TB2> INFO: ROC errors: 0
[20:33:23.171] <TB2> INFO: missing ROC header(s): 0
[20:33:23.171] <TB2> INFO: misplaced readback start: 0
[20:33:23.171] <TB2> INFO: Pixel decoding errors: 0
[20:33:23.171] <TB2> INFO: pixel data incomplete: 0
[20:33:23.171] <TB2> INFO: pixel address: 0
[20:33:23.171] <TB2> INFO: pulse height fill bit: 0
[20:33:23.171] <TB2> INFO: buffer corruption: 0
[20:33:23.827] <TB2> INFO: ######################################################################
[20:33:23.827] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[20:33:23.827] <TB2> INFO: ######################################################################
[20:33:24.111] <TB2> INFO: Expecting 41600 events.
[20:33:27.644] <TB2> INFO: 41600 events read in total (2941ms).
[20:33:27.645] <TB2> INFO: Test took 3817ms.
[20:33:28.120] <TB2> INFO: Expecting 41600 events.
[20:33:31.757] <TB2> INFO: 41600 events read in total (3046ms).
[20:33:31.758] <TB2> INFO: Test took 3907ms.
[20:33:32.047] <TB2> INFO: Expecting 41600 events.
[20:33:35.587] <TB2> INFO: 41600 events read in total (2948ms).
[20:33:35.588] <TB2> INFO: Test took 3806ms.
[20:33:35.896] <TB2> INFO: Expecting 41600 events.
[20:33:39.510] <TB2> INFO: 41600 events read in total (3022ms).
[20:33:39.511] <TB2> INFO: Test took 3896ms.
[20:33:39.801] <TB2> INFO: Expecting 41600 events.
[20:33:43.462] <TB2> INFO: 41600 events read in total (3069ms).
[20:33:43.463] <TB2> INFO: Test took 3928ms.
[20:33:43.755] <TB2> INFO: Expecting 41600 events.
[20:33:47.345] <TB2> INFO: 41600 events read in total (2998ms).
[20:33:47.346] <TB2> INFO: Test took 3856ms.
[20:33:47.635] <TB2> INFO: Expecting 41600 events.
[20:33:51.137] <TB2> INFO: 41600 events read in total (2910ms).
[20:33:51.138] <TB2> INFO: Test took 3768ms.
[20:33:51.427] <TB2> INFO: Expecting 41600 events.
[20:33:54.932] <TB2> INFO: 41600 events read in total (2913ms).
[20:33:54.932] <TB2> INFO: Test took 3771ms.
[20:33:55.222] <TB2> INFO: Expecting 41600 events.
[20:33:58.729] <TB2> INFO: 41600 events read in total (2916ms).
[20:33:58.730] <TB2> INFO: Test took 3774ms.
[20:33:59.020] <TB2> INFO: Expecting 41600 events.
[20:34:02.520] <TB2> INFO: 41600 events read in total (2909ms).
[20:34:02.520] <TB2> INFO: Test took 3766ms.
[20:34:02.809] <TB2> INFO: Expecting 41600 events.
[20:34:06.404] <TB2> INFO: 41600 events read in total (3004ms).
[20:34:06.405] <TB2> INFO: Test took 3861ms.
[20:34:06.695] <TB2> INFO: Expecting 41600 events.
[20:34:10.268] <TB2> INFO: 41600 events read in total (2982ms).
[20:34:10.268] <TB2> INFO: Test took 3838ms.
[20:34:10.571] <TB2> INFO: Expecting 41600 events.
[20:34:14.080] <TB2> INFO: 41600 events read in total (2917ms).
[20:34:14.081] <TB2> INFO: Test took 3789ms.
[20:34:14.373] <TB2> INFO: Expecting 41600 events.
[20:34:17.914] <TB2> INFO: 41600 events read in total (2949ms).
[20:34:17.914] <TB2> INFO: Test took 3806ms.
[20:34:18.204] <TB2> INFO: Expecting 41600 events.
[20:34:21.696] <TB2> INFO: 41600 events read in total (2901ms).
[20:34:21.697] <TB2> INFO: Test took 3759ms.
[20:34:21.986] <TB2> INFO: Expecting 41600 events.
[20:34:25.619] <TB2> INFO: 41600 events read in total (3041ms).
[20:34:25.620] <TB2> INFO: Test took 3899ms.
[20:34:25.909] <TB2> INFO: Expecting 41600 events.
[20:34:29.489] <TB2> INFO: 41600 events read in total (2988ms).
[20:34:29.490] <TB2> INFO: Test took 3845ms.
[20:34:29.779] <TB2> INFO: Expecting 41600 events.
[20:34:33.364] <TB2> INFO: 41600 events read in total (2993ms).
[20:34:33.365] <TB2> INFO: Test took 3852ms.
[20:34:33.655] <TB2> INFO: Expecting 41600 events.
[20:34:37.151] <TB2> INFO: 41600 events read in total (2904ms).
[20:34:37.152] <TB2> INFO: Test took 3763ms.
[20:34:37.441] <TB2> INFO: Expecting 41600 events.
[20:34:40.964] <TB2> INFO: 41600 events read in total (2931ms).
[20:34:40.965] <TB2> INFO: Test took 3788ms.
[20:34:41.254] <TB2> INFO: Expecting 41600 events.
[20:34:44.771] <TB2> INFO: 41600 events read in total (2925ms).
[20:34:44.772] <TB2> INFO: Test took 3783ms.
[20:34:45.072] <TB2> INFO: Expecting 41600 events.
[20:34:48.683] <TB2> INFO: 41600 events read in total (3020ms).
[20:34:48.683] <TB2> INFO: Test took 3886ms.
[20:34:48.975] <TB2> INFO: Expecting 41600 events.
[20:34:52.492] <TB2> INFO: 41600 events read in total (2925ms).
[20:34:52.492] <TB2> INFO: Test took 3782ms.
[20:34:52.782] <TB2> INFO: Expecting 41600 events.
[20:34:56.396] <TB2> INFO: 41600 events read in total (3023ms).
[20:34:56.397] <TB2> INFO: Test took 3880ms.
[20:34:56.690] <TB2> INFO: Expecting 41600 events.
[20:35:00.230] <TB2> INFO: 41600 events read in total (2949ms).
[20:35:00.230] <TB2> INFO: Test took 3806ms.
[20:35:00.520] <TB2> INFO: Expecting 41600 events.
[20:35:04.045] <TB2> INFO: 41600 events read in total (2934ms).
[20:35:04.046] <TB2> INFO: Test took 3791ms.
[20:35:04.337] <TB2> INFO: Expecting 41600 events.
[20:35:07.914] <TB2> INFO: 41600 events read in total (2985ms).
[20:35:07.915] <TB2> INFO: Test took 3843ms.
[20:35:08.204] <TB2> INFO: Expecting 41600 events.
[20:35:11.698] <TB2> INFO: 41600 events read in total (2902ms).
[20:35:11.699] <TB2> INFO: Test took 3760ms.
[20:35:11.989] <TB2> INFO: Expecting 41600 events.
[20:35:15.556] <TB2> INFO: 41600 events read in total (2975ms).
[20:35:15.557] <TB2> INFO: Test took 3833ms.
[20:35:15.847] <TB2> INFO: Expecting 2560 events.
[20:35:16.737] <TB2> INFO: 2560 events read in total (299ms).
[20:35:16.737] <TB2> INFO: Test took 1167ms.
[20:35:17.045] <TB2> INFO: Expecting 2560 events.
[20:35:17.928] <TB2> INFO: 2560 events read in total (291ms).
[20:35:17.929] <TB2> INFO: Test took 1192ms.
[20:35:18.237] <TB2> INFO: Expecting 2560 events.
[20:35:19.123] <TB2> INFO: 2560 events read in total (294ms).
[20:35:19.123] <TB2> INFO: Test took 1194ms.
[20:35:19.430] <TB2> INFO: Expecting 2560 events.
[20:35:20.325] <TB2> INFO: 2560 events read in total (303ms).
[20:35:20.326] <TB2> INFO: Test took 1202ms.
[20:35:20.632] <TB2> INFO: Expecting 2560 events.
[20:35:21.518] <TB2> INFO: 2560 events read in total (294ms).
[20:35:21.519] <TB2> INFO: Test took 1193ms.
[20:35:21.827] <TB2> INFO: Expecting 2560 events.
[20:35:22.713] <TB2> INFO: 2560 events read in total (295ms).
[20:35:22.714] <TB2> INFO: Test took 1195ms.
[20:35:23.022] <TB2> INFO: Expecting 2560 events.
[20:35:23.908] <TB2> INFO: 2560 events read in total (294ms).
[20:35:23.908] <TB2> INFO: Test took 1194ms.
[20:35:24.216] <TB2> INFO: Expecting 2560 events.
[20:35:25.107] <TB2> INFO: 2560 events read in total (299ms).
[20:35:25.108] <TB2> INFO: Test took 1200ms.
[20:35:25.416] <TB2> INFO: Expecting 2560 events.
[20:35:26.295] <TB2> INFO: 2560 events read in total (288ms).
[20:35:26.295] <TB2> INFO: Test took 1187ms.
[20:35:26.603] <TB2> INFO: Expecting 2560 events.
[20:35:27.488] <TB2> INFO: 2560 events read in total (294ms).
[20:35:27.488] <TB2> INFO: Test took 1193ms.
[20:35:27.796] <TB2> INFO: Expecting 2560 events.
[20:35:28.685] <TB2> INFO: 2560 events read in total (297ms).
[20:35:28.685] <TB2> INFO: Test took 1196ms.
[20:35:28.993] <TB2> INFO: Expecting 2560 events.
[20:35:29.877] <TB2> INFO: 2560 events read in total (293ms).
[20:35:29.878] <TB2> INFO: Test took 1192ms.
[20:35:30.186] <TB2> INFO: Expecting 2560 events.
[20:35:31.078] <TB2> INFO: 2560 events read in total (301ms).
[20:35:31.079] <TB2> INFO: Test took 1201ms.
[20:35:31.387] <TB2> INFO: Expecting 2560 events.
[20:35:32.277] <TB2> INFO: 2560 events read in total (298ms).
[20:35:32.277] <TB2> INFO: Test took 1197ms.
[20:35:32.585] <TB2> INFO: Expecting 2560 events.
[20:35:33.477] <TB2> INFO: 2560 events read in total (300ms).
[20:35:33.478] <TB2> INFO: Test took 1201ms.
[20:35:33.785] <TB2> INFO: Expecting 2560 events.
[20:35:34.679] <TB2> INFO: 2560 events read in total (303ms).
[20:35:34.679] <TB2> INFO: Test took 1201ms.
[20:35:34.683] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:35:34.988] <TB2> INFO: Expecting 655360 events.
[20:35:49.741] <TB2> INFO: 655360 events read in total (14161ms).
[20:35:49.760] <TB2> INFO: Expecting 655360 events.
[20:36:04.294] <TB2> INFO: 655360 events read in total (14131ms).
[20:36:04.313] <TB2> INFO: Expecting 655360 events.
[20:36:18.788] <TB2> INFO: 655360 events read in total (14072ms).
[20:36:18.812] <TB2> INFO: Expecting 655360 events.
[20:36:33.439] <TB2> INFO: 655360 events read in total (14224ms).
[20:36:33.474] <TB2> INFO: Expecting 655360 events.
[20:36:48.340] <TB2> INFO: 655360 events read in total (14463ms).
[20:36:48.371] <TB2> INFO: Expecting 655360 events.
[20:37:03.250] <TB2> INFO: 655360 events read in total (14476ms).
[20:37:03.285] <TB2> INFO: Expecting 655360 events.
[20:37:18.050] <TB2> INFO: 655360 events read in total (14362ms).
[20:37:18.093] <TB2> INFO: Expecting 655360 events.
[20:37:32.826] <TB2> INFO: 655360 events read in total (14330ms).
[20:37:32.873] <TB2> INFO: Expecting 655360 events.
[20:37:47.700] <TB2> INFO: 655360 events read in total (14424ms).
[20:37:47.832] <TB2> INFO: Expecting 655360 events.
[20:38:02.558] <TB2> INFO: 655360 events read in total (14322ms).
[20:38:02.622] <TB2> INFO: Expecting 655360 events.
[20:38:17.235] <TB2> INFO: 655360 events read in total (14210ms).
[20:38:17.305] <TB2> INFO: Expecting 655360 events.
[20:38:31.933] <TB2> INFO: 655360 events read in total (14225ms).
[20:38:32.149] <TB2> INFO: Expecting 655360 events.
[20:38:46.850] <TB2> INFO: 655360 events read in total (14298ms).
[20:38:46.933] <TB2> INFO: Expecting 655360 events.
[20:39:01.719] <TB2> INFO: 655360 events read in total (14383ms).
[20:39:01.809] <TB2> INFO: Expecting 655360 events.
[20:39:16.469] <TB2> INFO: 655360 events read in total (14258ms).
[20:39:16.676] <TB2> INFO: Expecting 655360 events.
[20:39:31.335] <TB2> INFO: 655360 events read in total (14256ms).
[20:39:31.481] <TB2> INFO: Test took 236798ms.
[20:39:31.577] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:39:31.835] <TB2> INFO: Expecting 655360 events.
[20:39:46.743] <TB2> INFO: 655360 events read in total (14316ms).
[20:39:46.757] <TB2> INFO: Expecting 655360 events.
[20:40:01.018] <TB2> INFO: 655360 events read in total (13858ms).
[20:40:01.036] <TB2> INFO: Expecting 655360 events.
[20:40:15.592] <TB2> INFO: 655360 events read in total (14153ms).
[20:40:15.614] <TB2> INFO: Expecting 655360 events.
[20:40:30.252] <TB2> INFO: 655360 events read in total (14234ms).
[20:40:30.278] <TB2> INFO: Expecting 655360 events.
[20:40:44.697] <TB2> INFO: 655360 events read in total (14016ms).
[20:40:44.733] <TB2> INFO: Expecting 655360 events.
[20:40:59.228] <TB2> INFO: 655360 events read in total (14092ms).
[20:40:59.264] <TB2> INFO: Expecting 655360 events.
[20:41:13.500] <TB2> INFO: 655360 events read in total (13833ms).
[20:41:13.539] <TB2> INFO: Expecting 655360 events.
[20:41:28.057] <TB2> INFO: 655360 events read in total (14115ms).
[20:41:28.101] <TB2> INFO: Expecting 655360 events.
[20:41:42.542] <TB2> INFO: 655360 events read in total (14038ms).
[20:41:42.600] <TB2> INFO: Expecting 655360 events.
[20:41:57.641] <TB2> INFO: 655360 events read in total (14638ms).
[20:41:57.710] <TB2> INFO: Expecting 655360 events.
[20:42:12.543] <TB2> INFO: 655360 events read in total (14430ms).
[20:42:12.615] <TB2> INFO: Expecting 655360 events.
[20:42:27.383] <TB2> INFO: 655360 events read in total (14365ms).
[20:42:27.489] <TB2> INFO: Expecting 655360 events.
[20:42:42.343] <TB2> INFO: 655360 events read in total (14450ms).
[20:42:42.427] <TB2> INFO: Expecting 655360 events.
[20:42:57.326] <TB2> INFO: 655360 events read in total (14495ms).
[20:42:57.419] <TB2> INFO: Expecting 655360 events.
[20:43:12.165] <TB2> INFO: 655360 events read in total (14343ms).
[20:43:12.295] <TB2> INFO: Expecting 655360 events.
[20:43:27.027] <TB2> INFO: 655360 events read in total (14329ms).
[20:43:27.194] <TB2> INFO: Test took 235617ms.
[20:43:27.360] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:43:27.366] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:43:27.372] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[20:43:27.378] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:43:27.383] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:43:27.389] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[20:43:27.395] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:43:27.401] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:43:27.408] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:43:27.413] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:43:27.420] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[20:43:27.428] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[20:43:27.434] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[20:43:27.441] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[20:43:27.447] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[20:43:27.453] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[20:43:27.459] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[20:43:27.465] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[20:43:27.472] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[20:43:27.478] <TB2> INFO: safety margin for low PH: adding 10, margin is now 30
[20:43:27.485] <TB2> INFO: safety margin for low PH: adding 11, margin is now 31
[20:43:27.493] <TB2> INFO: safety margin for low PH: adding 12, margin is now 32
[20:43:27.499] <TB2> INFO: safety margin for low PH: adding 13, margin is now 33
[20:43:27.507] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:43:27.513] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:43:27.520] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:43:27.526] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:43:27.531] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:43:27.537] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[20:43:27.544] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[20:43:27.550] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[20:43:27.556] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[20:43:27.562] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[20:43:27.569] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:43:27.575] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:43:27.581] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:43:27.620] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C0.dat
[20:43:27.620] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C1.dat
[20:43:27.621] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C2.dat
[20:43:27.621] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C3.dat
[20:43:27.621] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C4.dat
[20:43:27.621] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C5.dat
[20:43:27.621] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C6.dat
[20:43:27.621] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C7.dat
[20:43:27.621] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C8.dat
[20:43:27.622] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C9.dat
[20:43:27.622] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C10.dat
[20:43:27.622] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C11.dat
[20:43:27.622] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C12.dat
[20:43:27.622] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C13.dat
[20:43:27.622] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C14.dat
[20:43:27.623] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//dacParameters35_C15.dat
[20:43:27.866] <TB2> INFO: Expecting 41600 events.
[20:43:31.046] <TB2> INFO: 41600 events read in total (2589ms).
[20:43:31.047] <TB2> INFO: Test took 3421ms.
[20:43:31.502] <TB2> INFO: Expecting 41600 events.
[20:43:34.572] <TB2> INFO: 41600 events read in total (2478ms).
[20:43:34.573] <TB2> INFO: Test took 3311ms.
[20:43:35.041] <TB2> INFO: Expecting 41600 events.
[20:43:38.268] <TB2> INFO: 41600 events read in total (2635ms).
[20:43:38.269] <TB2> INFO: Test took 3483ms.
[20:43:38.492] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:43:38.581] <TB2> INFO: Expecting 2560 events.
[20:43:39.473] <TB2> INFO: 2560 events read in total (300ms).
[20:43:39.473] <TB2> INFO: Test took 981ms.
[20:43:39.476] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:43:39.783] <TB2> INFO: Expecting 2560 events.
[20:43:40.681] <TB2> INFO: 2560 events read in total (307ms).
[20:43:40.681] <TB2> INFO: Test took 1205ms.
[20:43:40.684] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:43:40.988] <TB2> INFO: Expecting 2560 events.
[20:43:41.876] <TB2> INFO: 2560 events read in total (296ms).
[20:43:41.876] <TB2> INFO: Test took 1192ms.
[20:43:41.878] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:43:42.185] <TB2> INFO: Expecting 2560 events.
[20:43:43.074] <TB2> INFO: 2560 events read in total (297ms).
[20:43:43.075] <TB2> INFO: Test took 1197ms.
[20:43:43.077] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:43:43.384] <TB2> INFO: Expecting 2560 events.
[20:43:44.270] <TB2> INFO: 2560 events read in total (295ms).
[20:43:44.270] <TB2> INFO: Test took 1193ms.
[20:43:44.273] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:43:44.579] <TB2> INFO: Expecting 2560 events.
[20:43:45.471] <TB2> INFO: 2560 events read in total (301ms).
[20:43:45.471] <TB2> INFO: Test took 1198ms.
[20:43:45.473] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:43:45.780] <TB2> INFO: Expecting 2560 events.
[20:43:46.673] <TB2> INFO: 2560 events read in total (301ms).
[20:43:46.674] <TB2> INFO: Test took 1201ms.
[20:43:46.677] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:43:46.981] <TB2> INFO: Expecting 2560 events.
[20:43:47.872] <TB2> INFO: 2560 events read in total (299ms).
[20:43:47.872] <TB2> INFO: Test took 1195ms.
[20:43:47.875] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:43:48.180] <TB2> INFO: Expecting 2560 events.
[20:43:49.061] <TB2> INFO: 2560 events read in total (290ms).
[20:43:49.061] <TB2> INFO: Test took 1186ms.
[20:43:49.063] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:43:49.370] <TB2> INFO: Expecting 2560 events.
[20:43:50.259] <TB2> INFO: 2560 events read in total (298ms).
[20:43:50.259] <TB2> INFO: Test took 1196ms.
[20:43:50.262] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:43:50.567] <TB2> INFO: Expecting 2560 events.
[20:43:51.456] <TB2> INFO: 2560 events read in total (297ms).
[20:43:51.456] <TB2> INFO: Test took 1194ms.
[20:43:51.460] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:43:51.764] <TB2> INFO: Expecting 2560 events.
[20:43:52.648] <TB2> INFO: 2560 events read in total (292ms).
[20:43:52.648] <TB2> INFO: Test took 1189ms.
[20:43:52.652] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:43:52.956] <TB2> INFO: Expecting 2560 events.
[20:43:53.847] <TB2> INFO: 2560 events read in total (299ms).
[20:43:53.847] <TB2> INFO: Test took 1195ms.
[20:43:53.851] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:43:54.154] <TB2> INFO: Expecting 2560 events.
[20:43:55.046] <TB2> INFO: 2560 events read in total (300ms).
[20:43:55.046] <TB2> INFO: Test took 1195ms.
[20:43:55.049] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:43:55.355] <TB2> INFO: Expecting 2560 events.
[20:43:56.237] <TB2> INFO: 2560 events read in total (291ms).
[20:43:56.237] <TB2> INFO: Test took 1188ms.
[20:43:56.241] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:43:56.546] <TB2> INFO: Expecting 2560 events.
[20:43:57.430] <TB2> INFO: 2560 events read in total (293ms).
[20:43:57.430] <TB2> INFO: Test took 1189ms.
[20:43:57.433] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:43:57.739] <TB2> INFO: Expecting 2560 events.
[20:43:58.620] <TB2> INFO: 2560 events read in total (289ms).
[20:43:58.621] <TB2> INFO: Test took 1189ms.
[20:43:58.624] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:43:58.929] <TB2> INFO: Expecting 2560 events.
[20:43:59.816] <TB2> INFO: 2560 events read in total (295ms).
[20:43:59.817] <TB2> INFO: Test took 1193ms.
[20:43:59.822] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:44:00.125] <TB2> INFO: Expecting 2560 events.
[20:44:01.012] <TB2> INFO: 2560 events read in total (295ms).
[20:44:01.012] <TB2> INFO: Test took 1191ms.
[20:44:01.015] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:44:01.322] <TB2> INFO: Expecting 2560 events.
[20:44:02.204] <TB2> INFO: 2560 events read in total (290ms).
[20:44:02.204] <TB2> INFO: Test took 1189ms.
[20:44:02.208] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:44:02.513] <TB2> INFO: Expecting 2560 events.
[20:44:03.400] <TB2> INFO: 2560 events read in total (296ms).
[20:44:03.401] <TB2> INFO: Test took 1193ms.
[20:44:03.404] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:44:03.709] <TB2> INFO: Expecting 2560 events.
[20:44:04.588] <TB2> INFO: 2560 events read in total (287ms).
[20:44:04.588] <TB2> INFO: Test took 1185ms.
[20:44:04.591] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:44:04.896] <TB2> INFO: Expecting 2560 events.
[20:44:05.786] <TB2> INFO: 2560 events read in total (299ms).
[20:44:05.787] <TB2> INFO: Test took 1196ms.
[20:44:05.791] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:44:06.094] <TB2> INFO: Expecting 2560 events.
[20:44:06.986] <TB2> INFO: 2560 events read in total (300ms).
[20:44:06.986] <TB2> INFO: Test took 1196ms.
[20:44:06.988] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:44:07.296] <TB2> INFO: Expecting 2560 events.
[20:44:08.190] <TB2> INFO: 2560 events read in total (302ms).
[20:44:08.191] <TB2> INFO: Test took 1203ms.
[20:44:08.194] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:44:08.499] <TB2> INFO: Expecting 2560 events.
[20:44:09.395] <TB2> INFO: 2560 events read in total (304ms).
[20:44:09.395] <TB2> INFO: Test took 1202ms.
[20:44:09.399] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:44:09.702] <TB2> INFO: Expecting 2560 events.
[20:44:10.591] <TB2> INFO: 2560 events read in total (297ms).
[20:44:10.592] <TB2> INFO: Test took 1193ms.
[20:44:10.595] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:44:10.900] <TB2> INFO: Expecting 2560 events.
[20:44:11.784] <TB2> INFO: 2560 events read in total (292ms).
[20:44:11.784] <TB2> INFO: Test took 1189ms.
[20:44:11.788] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:44:12.094] <TB2> INFO: Expecting 2560 events.
[20:44:12.978] <TB2> INFO: 2560 events read in total (293ms).
[20:44:12.979] <TB2> INFO: Test took 1191ms.
[20:44:12.981] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:44:13.287] <TB2> INFO: Expecting 2560 events.
[20:44:14.172] <TB2> INFO: 2560 events read in total (293ms).
[20:44:14.173] <TB2> INFO: Test took 1192ms.
[20:44:14.177] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:44:14.481] <TB2> INFO: Expecting 2560 events.
[20:44:15.375] <TB2> INFO: 2560 events read in total (303ms).
[20:44:15.375] <TB2> INFO: Test took 1199ms.
[20:44:15.379] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:44:15.682] <TB2> INFO: Expecting 2560 events.
[20:44:16.574] <TB2> INFO: 2560 events read in total (300ms).
[20:44:16.575] <TB2> INFO: Test took 1196ms.
[20:44:17.050] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 653 seconds
[20:44:17.050] <TB2> INFO: PH scale (per ROC): 62 43 43 49 66 65 57 46 62 51 43 42 48 51 63 60
[20:44:17.050] <TB2> INFO: PH offset (per ROC): 127 102 106 109 119 121 137 112 132 129 110 101 114 114 122 128
[20:44:17.060] <TB2> INFO: Decoding statistics:
[20:44:17.060] <TB2> INFO: General information:
[20:44:17.060] <TB2> INFO: 16bit words read: 127880
[20:44:17.060] <TB2> INFO: valid events total: 20480
[20:44:17.060] <TB2> INFO: empty events: 17980
[20:44:17.060] <TB2> INFO: valid events with pixels: 2500
[20:44:17.060] <TB2> INFO: valid pixel hits: 2500
[20:44:17.060] <TB2> INFO: Event errors: 0
[20:44:17.060] <TB2> INFO: start marker: 0
[20:44:17.060] <TB2> INFO: stop marker: 0
[20:44:17.060] <TB2> INFO: overflow: 0
[20:44:17.060] <TB2> INFO: invalid 5bit words: 0
[20:44:17.060] <TB2> INFO: invalid XOR eye diagram: 0
[20:44:17.060] <TB2> INFO: frame (failed synchr.): 0
[20:44:17.060] <TB2> INFO: idle data (no TBM trl): 0
[20:44:17.060] <TB2> INFO: no data (only TBM hdr): 0
[20:44:17.060] <TB2> INFO: TBM errors: 0
[20:44:17.060] <TB2> INFO: flawed TBM headers: 0
[20:44:17.060] <TB2> INFO: flawed TBM trailers: 0
[20:44:17.060] <TB2> INFO: event ID mismatches: 0
[20:44:17.060] <TB2> INFO: ROC errors: 0
[20:44:17.060] <TB2> INFO: missing ROC header(s): 0
[20:44:17.060] <TB2> INFO: misplaced readback start: 0
[20:44:17.060] <TB2> INFO: Pixel decoding errors: 0
[20:44:17.060] <TB2> INFO: pixel data incomplete: 0
[20:44:17.060] <TB2> INFO: pixel address: 0
[20:44:17.060] <TB2> INFO: pulse height fill bit: 0
[20:44:17.060] <TB2> INFO: buffer corruption: 0
[20:44:17.269] <TB2> INFO: ######################################################################
[20:44:17.269] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[20:44:17.269] <TB2> INFO: ######################################################################
[20:44:17.283] <TB2> INFO: scanning low vcal = 10
[20:44:17.525] <TB2> INFO: Expecting 41600 events.
[20:44:21.148] <TB2> INFO: 41600 events read in total (3032ms).
[20:44:21.149] <TB2> INFO: Test took 3866ms.
[20:44:21.151] <TB2> INFO: scanning low vcal = 20
[20:44:21.443] <TB2> INFO: Expecting 41600 events.
[20:44:25.030] <TB2> INFO: 41600 events read in total (2995ms).
[20:44:25.030] <TB2> INFO: Test took 3878ms.
[20:44:25.032] <TB2> INFO: scanning low vcal = 30
[20:44:25.326] <TB2> INFO: Expecting 41600 events.
[20:44:28.983] <TB2> INFO: 41600 events read in total (3065ms).
[20:44:28.984] <TB2> INFO: Test took 3951ms.
[20:44:28.987] <TB2> INFO: scanning low vcal = 40
[20:44:29.264] <TB2> INFO: Expecting 41600 events.
[20:44:33.188] <TB2> INFO: 41600 events read in total (3333ms).
[20:44:33.188] <TB2> INFO: Test took 4200ms.
[20:44:33.192] <TB2> INFO: scanning low vcal = 50
[20:44:33.468] <TB2> INFO: Expecting 41600 events.
[20:44:37.564] <TB2> INFO: 41600 events read in total (3504ms).
[20:44:37.566] <TB2> INFO: Test took 4374ms.
[20:44:37.570] <TB2> INFO: scanning low vcal = 60
[20:44:37.895] <TB2> INFO: Expecting 41600 events.
[20:44:41.952] <TB2> INFO: 41600 events read in total (3464ms).
[20:44:41.953] <TB2> INFO: Test took 4383ms.
[20:44:41.956] <TB2> INFO: scanning low vcal = 70
[20:44:42.234] <TB2> INFO: Expecting 41600 events.
[20:44:46.230] <TB2> INFO: 41600 events read in total (3404ms).
[20:44:46.231] <TB2> INFO: Test took 4275ms.
[20:44:46.235] <TB2> INFO: scanning low vcal = 80
[20:44:46.511] <TB2> INFO: Expecting 41600 events.
[20:44:50.489] <TB2> INFO: 41600 events read in total (3387ms).
[20:44:50.490] <TB2> INFO: Test took 4255ms.
[20:44:50.494] <TB2> INFO: scanning low vcal = 90
[20:44:50.770] <TB2> INFO: Expecting 41600 events.
[20:44:54.725] <TB2> INFO: 41600 events read in total (3364ms).
[20:44:54.726] <TB2> INFO: Test took 4232ms.
[20:44:54.731] <TB2> INFO: scanning low vcal = 100
[20:44:54.005] <TB2> INFO: Expecting 41600 events.
[20:44:58.962] <TB2> INFO: 41600 events read in total (3365ms).
[20:44:58.963] <TB2> INFO: Test took 4232ms.
[20:44:58.966] <TB2> INFO: scanning low vcal = 110
[20:44:59.242] <TB2> INFO: Expecting 41600 events.
[20:45:03.199] <TB2> INFO: 41600 events read in total (3365ms).
[20:45:03.200] <TB2> INFO: Test took 4234ms.
[20:45:03.204] <TB2> INFO: scanning low vcal = 120
[20:45:03.479] <TB2> INFO: Expecting 41600 events.
[20:45:07.482] <TB2> INFO: 41600 events read in total (3411ms).
[20:45:07.483] <TB2> INFO: Test took 4279ms.
[20:45:07.486] <TB2> INFO: scanning low vcal = 130
[20:45:07.763] <TB2> INFO: Expecting 41600 events.
[20:45:11.751] <TB2> INFO: 41600 events read in total (3397ms).
[20:45:11.751] <TB2> INFO: Test took 4265ms.
[20:45:11.755] <TB2> INFO: scanning low vcal = 140
[20:45:12.031] <TB2> INFO: Expecting 41600 events.
[20:45:16.021] <TB2> INFO: 41600 events read in total (3398ms).
[20:45:16.022] <TB2> INFO: Test took 4267ms.
[20:45:16.025] <TB2> INFO: scanning low vcal = 150
[20:45:16.301] <TB2> INFO: Expecting 41600 events.
[20:45:20.292] <TB2> INFO: 41600 events read in total (3399ms).
[20:45:20.293] <TB2> INFO: Test took 4268ms.
[20:45:20.297] <TB2> INFO: scanning low vcal = 160
[20:45:20.573] <TB2> INFO: Expecting 41600 events.
[20:45:24.557] <TB2> INFO: 41600 events read in total (3393ms).
[20:45:24.558] <TB2> INFO: Test took 4261ms.
[20:45:24.561] <TB2> INFO: scanning low vcal = 170
[20:45:24.838] <TB2> INFO: Expecting 41600 events.
[20:45:28.909] <TB2> INFO: 41600 events read in total (3479ms).
[20:45:28.910] <TB2> INFO: Test took 4348ms.
[20:45:28.916] <TB2> INFO: scanning low vcal = 180
[20:45:29.234] <TB2> INFO: Expecting 41600 events.
[20:45:33.265] <TB2> INFO: 41600 events read in total (3439ms).
[20:45:33.266] <TB2> INFO: Test took 4350ms.
[20:45:33.269] <TB2> INFO: scanning low vcal = 190
[20:45:33.589] <TB2> INFO: Expecting 41600 events.
[20:45:37.566] <TB2> INFO: 41600 events read in total (3385ms).
[20:45:37.567] <TB2> INFO: Test took 4298ms.
[20:45:37.570] <TB2> INFO: scanning low vcal = 200
[20:45:37.847] <TB2> INFO: Expecting 41600 events.
[20:45:41.892] <TB2> INFO: 41600 events read in total (3453ms).
[20:45:41.892] <TB2> INFO: Test took 4322ms.
[20:45:41.895] <TB2> INFO: scanning low vcal = 210
[20:45:42.172] <TB2> INFO: Expecting 41600 events.
[20:45:46.277] <TB2> INFO: 41600 events read in total (3514ms).
[20:45:46.278] <TB2> INFO: Test took 4383ms.
[20:45:46.281] <TB2> INFO: scanning low vcal = 220
[20:45:46.599] <TB2> INFO: Expecting 41600 events.
[20:45:50.639] <TB2> INFO: 41600 events read in total (3448ms).
[20:45:50.639] <TB2> INFO: Test took 4357ms.
[20:45:50.642] <TB2> INFO: scanning low vcal = 230
[20:45:50.960] <TB2> INFO: Expecting 41600 events.
[20:45:54.977] <TB2> INFO: 41600 events read in total (3425ms).
[20:45:54.978] <TB2> INFO: Test took 4336ms.
[20:45:54.982] <TB2> INFO: scanning low vcal = 240
[20:45:55.265] <TB2> INFO: Expecting 41600 events.
[20:45:59.301] <TB2> INFO: 41600 events read in total (3444ms).
[20:45:59.301] <TB2> INFO: Test took 4319ms.
[20:45:59.305] <TB2> INFO: scanning low vcal = 250
[20:45:59.622] <TB2> INFO: Expecting 41600 events.
[20:46:03.599] <TB2> INFO: 41600 events read in total (3386ms).
[20:46:03.599] <TB2> INFO: Test took 4294ms.
[20:46:03.604] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[20:46:03.879] <TB2> INFO: Expecting 41600 events.
[20:46:07.937] <TB2> INFO: 41600 events read in total (3466ms).
[20:46:07.937] <TB2> INFO: Test took 4333ms.
[20:46:07.941] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[20:46:08.258] <TB2> INFO: Expecting 41600 events.
[20:46:12.289] <TB2> INFO: 41600 events read in total (3439ms).
[20:46:12.289] <TB2> INFO: Test took 4348ms.
[20:46:12.292] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[20:46:12.568] <TB2> INFO: Expecting 41600 events.
[20:46:16.619] <TB2> INFO: 41600 events read in total (3459ms).
[20:46:16.619] <TB2> INFO: Test took 4327ms.
[20:46:16.623] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[20:46:16.940] <TB2> INFO: Expecting 41600 events.
[20:46:20.973] <TB2> INFO: 41600 events read in total (3441ms).
[20:46:20.974] <TB2> INFO: Test took 4351ms.
[20:46:20.977] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[20:46:21.293] <TB2> INFO: Expecting 41600 events.
[20:46:25.337] <TB2> INFO: 41600 events read in total (3453ms).
[20:46:25.338] <TB2> INFO: Test took 4360ms.
[20:46:26.056] <TB2> INFO: PixTestGainPedestal::measure() done
[20:46:59.383] <TB2> INFO: PixTestGainPedestal::fit() done
[20:46:59.383] <TB2> INFO: non-linearity mean: 0.980 0.944 0.927 0.935 0.986 0.988 0.981 0.919 0.985 0.981 0.940 0.921 0.966 0.961 0.984 0.982
[20:46:59.383] <TB2> INFO: non-linearity RMS: 0.003 0.088 0.081 0.099 0.002 0.002 0.008 0.128 0.004 0.005 0.142 0.129 0.029 0.028 0.003 0.003
[20:46:59.383] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[20:46:59.397] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[20:46:59.411] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[20:46:59.424] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[20:46:59.437] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[20:46:59.449] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[20:46:59.462] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[20:46:59.475] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[20:46:59.488] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[20:46:59.501] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[20:46:59.515] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[20:46:59.527] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[20:46:59.540] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[20:46:59.553] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[20:46:59.566] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[20:46:59.580] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1042_FullQualification_2016-10-21_18h29m_1477067371//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[20:46:59.593] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 162 seconds
[20:46:59.593] <TB2> INFO: Decoding statistics:
[20:46:59.593] <TB2> INFO: General information:
[20:46:59.593] <TB2> INFO: 16bit words read: 3327520
[20:46:59.593] <TB2> INFO: valid events total: 332800
[20:46:59.593] <TB2> INFO: empty events: 0
[20:46:59.593] <TB2> INFO: valid events with pixels: 332800
[20:46:59.593] <TB2> INFO: valid pixel hits: 665360
[20:46:59.593] <TB2> INFO: Event errors: 0
[20:46:59.593] <TB2> INFO: start marker: 0
[20:46:59.593] <TB2> INFO: stop marker: 0
[20:46:59.593] <TB2> INFO: overflow: 0
[20:46:59.593] <TB2> INFO: invalid 5bit words: 0
[20:46:59.593] <TB2> INFO: invalid XOR eye diagram: 0
[20:46:59.593] <TB2> INFO: frame (failed synchr.): 0
[20:46:59.593] <TB2> INFO: idle data (no TBM trl): 0
[20:46:59.593] <TB2> INFO: no data (only TBM hdr): 0
[20:46:59.593] <TB2> INFO: TBM errors: 0
[20:46:59.593] <TB2> INFO: flawed TBM headers: 0
[20:46:59.593] <TB2> INFO: flawed TBM trailers: 0
[20:46:59.593] <TB2> INFO: event ID mismatches: 0
[20:46:59.593] <TB2> INFO: ROC errors: 0
[20:46:59.593] <TB2> INFO: missing ROC header(s): 0
[20:46:59.593] <TB2> INFO: misplaced readback start: 0
[20:46:59.593] <TB2> INFO: Pixel decoding errors: 0
[20:46:59.593] <TB2> INFO: pixel data incomplete: 0
[20:46:59.593] <TB2> INFO: pixel address: 0
[20:46:59.593] <TB2> INFO: pulse height fill bit: 0
[20:46:59.593] <TB2> INFO: buffer corruption: 0
[20:46:59.609] <TB2> INFO: Decoding statistics:
[20:46:59.609] <TB2> INFO: General information:
[20:46:59.609] <TB2> INFO: 16bit words read: 3456936
[20:46:59.609] <TB2> INFO: valid events total: 353536
[20:46:59.609] <TB2> INFO: empty events: 18236
[20:46:59.609] <TB2> INFO: valid events with pixels: 335300
[20:46:59.609] <TB2> INFO: valid pixel hits: 667860
[20:46:59.609] <TB2> INFO: Event errors: 0
[20:46:59.609] <TB2> INFO: start marker: 0
[20:46:59.609] <TB2> INFO: stop marker: 0
[20:46:59.609] <TB2> INFO: overflow: 0
[20:46:59.609] <TB2> INFO: invalid 5bit words: 0
[20:46:59.609] <TB2> INFO: invalid XOR eye diagram: 0
[20:46:59.609] <TB2> INFO: frame (failed synchr.): 0
[20:46:59.609] <TB2> INFO: idle data (no TBM trl): 0
[20:46:59.609] <TB2> INFO: no data (only TBM hdr): 0
[20:46:59.609] <TB2> INFO: TBM errors: 0
[20:46:59.609] <TB2> INFO: flawed TBM headers: 0
[20:46:59.609] <TB2> INFO: flawed TBM trailers: 0
[20:46:59.609] <TB2> INFO: event ID mismatches: 0
[20:46:59.609] <TB2> INFO: ROC errors: 0
[20:46:59.609] <TB2> INFO: missing ROC header(s): 0
[20:46:59.610] <TB2> INFO: misplaced readback start: 0
[20:46:59.610] <TB2> INFO: Pixel decoding errors: 0
[20:46:59.610] <TB2> INFO: pixel data incomplete: 0
[20:46:59.610] <TB2> INFO: pixel address: 0
[20:46:59.610] <TB2> INFO: pulse height fill bit: 0
[20:46:59.610] <TB2> INFO: buffer corruption: 0
[20:46:59.610] <TB2> INFO: enter test to run
[20:46:59.610] <TB2> INFO: test: exit no parameter change
[20:46:59.755] <TB2> QUIET: Connection to board 149 closed.
[20:46:59.756] <TB2> INFO: pXar: this is the end, my friend