[17:07:16.647] <TB0> INFO: *** Welcome to pxar ***
[17:07:16.647] <TB0> INFO: *** Today: 2016/11/03
[17:07:16.654] <TB0> INFO: *** Version: c8ba-dirty
[17:07:16.654] <TB0> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters_C15.dat
[17:07:16.655] <TB0> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[17:07:16.655] <TB0> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//defaultMaskFile.dat
[17:07:16.655] <TB0> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters_C15.dat
[17:07:16.707] <TB0> INFO: clk: 4
[17:07:16.707] <TB0> INFO: ctr: 4
[17:07:16.707] <TB0> INFO: sda: 19
[17:07:16.707] <TB0> INFO: tin: 9
[17:07:16.707] <TB0> INFO: level: 15
[17:07:16.707] <TB0> INFO: triggerdelay: 0
[17:07:16.707] <TB0> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[17:07:16.707] <TB0> INFO: Log level: INFO
[17:07:16.715] <TB0> INFO: Found DTB DTB_WS6AYH
[17:07:16.722] <TB0> QUIET: Connection to board DTB_WS6AYH opened.
[17:07:16.724] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 73
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WS6AYH
MAC address: 40D855118049
Hostname: pixelDTB073
Comment:
------------------------------------------------------
[17:07:16.726] <TB0> INFO: RPC call hashes of host and DTB match: 486171790
[17:07:18.210] <TB0> INFO: DUT info:
[17:07:18.210] <TB0> INFO: The DUT currently contains the following objects:
[17:07:18.210] <TB0> INFO: 4 TBM Cores tbm10c (4 ON)
[17:07:18.210] <TB0> INFO: TBM Core alpha (0): 7 registers set
[17:07:18.210] <TB0> INFO: TBM Core beta (1): 7 registers set
[17:07:18.210] <TB0> INFO: TBM Core alpha (2): 7 registers set
[17:07:18.210] <TB0> INFO: TBM Core beta (3): 7 registers set
[17:07:18.210] <TB0> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[17:07:18.210] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[17:07:18.210] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[17:07:18.210] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[17:07:18.210] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[17:07:18.210] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[17:07:18.210] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[17:07:18.210] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[17:07:18.210] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[17:07:18.210] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[17:07:18.210] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[17:07:18.210] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[17:07:18.210] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[17:07:18.210] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[17:07:18.210] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[17:07:18.210] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[17:07:18.210] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[17:07:18.611] <TB0> INFO: enter 'restricted' command line mode
[17:07:18.611] <TB0> INFO: enter test to run
[17:07:18.611] <TB0> INFO: test: pretest no parameter change
[17:07:18.611] <TB0> INFO: running: pretest
[17:07:19.145] <TB0> INFO: ######################################################################
[17:07:19.145] <TB0> INFO: PixTestPretest::doTest()
[17:07:19.145] <TB0> INFO: ######################################################################
[17:07:19.146] <TB0> INFO: ----------------------------------------------------------------------
[17:07:19.146] <TB0> INFO: PixTestPretest::programROC()
[17:07:19.146] <TB0> INFO: ----------------------------------------------------------------------
[17:07:37.160] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[17:07:37.160] <TB0> INFO: IA differences per ROC: 18.5 20.1 19.3 19.3 19.3 19.3 18.5 20.1 20.1 17.7 17.7 16.9 20.9 16.9 19.3 20.1
[17:07:37.195] <TB0> INFO: ----------------------------------------------------------------------
[17:07:37.195] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[17:07:37.195] <TB0> INFO: ----------------------------------------------------------------------
[17:07:42.563] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 381 mA = 23.8125 mA/ROC
[17:07:42.563] <TB0> INFO: i(loss) [mA/ROC]: 19.2 19.2 20.1 19.2 18.4 18.4 18.4 18.4 18.4 19.2 19.2 19.2 19.2 19.2 19.2 19.2
[17:07:42.590] <TB0> INFO: ----------------------------------------------------------------------
[17:07:42.590] <TB0> INFO: PixTestPretest::findTiming()
[17:07:42.590] <TB0> INFO: ----------------------------------------------------------------------
[17:07:42.590] <TB0> INFO: PixTestCmd::init()

[17:08:13.926] <TB0> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[17:08:13.926] <TB0> INFO: (success/tries = 100/100), width = 3
[17:08:15.427] <TB0> INFO: ----------------------------------------------------------------------
[17:08:15.427] <TB0> INFO: PixTestPretest::findWorkingPixel()
[17:08:15.427] <TB0> INFO: ----------------------------------------------------------------------
[17:08:15.519] <TB0> INFO: Expecting 231680 events.
[17:08:25.155] <TB0> INFO: 231680 events read in total (9045ms).
[17:08:25.164] <TB0> INFO: Test took 9735ms.
[17:08:25.410] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[17:08:25.440] <TB0> INFO: ----------------------------------------------------------------------
[17:08:25.440] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[17:08:25.440] <TB0> INFO: ----------------------------------------------------------------------
[17:08:25.533] <TB0> INFO: Expecting 231680 events.
[17:08:35.291] <TB0> INFO: 231680 events read in total (9167ms).
[17:08:35.298] <TB0> INFO: Test took 9854ms.
[17:08:35.555] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[17:08:35.555] <TB0> INFO: CalDel: 87 105 91 93 96 106 87 97 84 90 79 88 108 97 92 97
[17:08:35.555] <TB0> INFO: VthrComp: 51 51 51 52 51 51 51 51 52 51 51 51 51 51 51 53
[17:08:35.557] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters_C0.dat
[17:08:35.557] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters_C1.dat
[17:08:35.557] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters_C2.dat
[17:08:35.557] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters_C3.dat
[17:08:35.557] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters_C4.dat
[17:08:35.557] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters_C5.dat
[17:08:35.557] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters_C6.dat
[17:08:35.558] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters_C7.dat
[17:08:35.558] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters_C8.dat
[17:08:35.558] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters_C9.dat
[17:08:35.558] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters_C10.dat
[17:08:35.558] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters_C11.dat
[17:08:35.558] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters_C12.dat
[17:08:35.558] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters_C13.dat
[17:08:35.558] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters_C14.dat
[17:08:35.558] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters_C15.dat
[17:08:35.558] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//tbmParameters_C0a.dat
[17:08:35.558] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//tbmParameters_C0b.dat
[17:08:35.558] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//tbmParameters_C1a.dat
[17:08:35.558] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[17:08:35.558] <TB0> INFO: PixTestPretest::doTest() done, duration: 76 seconds
[17:08:35.654] <TB0> INFO: enter test to run
[17:08:35.654] <TB0> INFO: test: fulltest no parameter change
[17:08:35.654] <TB0> INFO: running: fulltest
[17:08:35.654] <TB0> INFO: ######################################################################
[17:08:35.654] <TB0> INFO: PixTestFullTest::doTest()
[17:08:35.654] <TB0> INFO: ######################################################################
[17:08:35.656] <TB0> INFO: ######################################################################
[17:08:35.656] <TB0> INFO: PixTestAlive::doTest()
[17:08:35.656] <TB0> INFO: ######################################################################
[17:08:35.657] <TB0> INFO: ----------------------------------------------------------------------
[17:08:35.657] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:08:35.657] <TB0> INFO: ----------------------------------------------------------------------
[17:08:35.929] <TB0> INFO: Expecting 41600 events.
[17:08:39.365] <TB0> INFO: 41600 events read in total (2844ms).
[17:08:39.365] <TB0> INFO: Test took 3707ms.
[17:08:39.591] <TB0> INFO: PixTestAlive::aliveTest() done
[17:08:39.591] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0
[17:08:39.592] <TB0> INFO: ----------------------------------------------------------------------
[17:08:39.592] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:08:39.592] <TB0> INFO: ----------------------------------------------------------------------
[17:08:39.868] <TB0> INFO: Expecting 41600 events.
[17:08:42.788] <TB0> INFO: 41600 events read in total (2328ms).
[17:08:42.788] <TB0> INFO: Test took 3195ms.
[17:08:42.789] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[17:08:43.029] <TB0> INFO: PixTestAlive::maskTest() done
[17:08:43.029] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[17:08:43.030] <TB0> INFO: ----------------------------------------------------------------------
[17:08:43.030] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:08:43.030] <TB0> INFO: ----------------------------------------------------------------------
[17:08:43.265] <TB0> INFO: Expecting 41600 events.
[17:08:46.704] <TB0> INFO: 41600 events read in total (2847ms).
[17:08:46.705] <TB0> INFO: Test took 3673ms.
[17:08:46.933] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[17:08:46.933] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[17:08:46.933] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[17:08:46.933] <TB0> INFO: Decoding statistics:
[17:08:46.933] <TB0> INFO: General information:
[17:08:46.934] <TB0> INFO: 16bit words read: 0
[17:08:46.934] <TB0> INFO: valid events total: 0
[17:08:46.934] <TB0> INFO: empty events: 0
[17:08:46.934] <TB0> INFO: valid events with pixels: 0
[17:08:46.934] <TB0> INFO: valid pixel hits: 0
[17:08:46.934] <TB0> INFO: Event errors: 0
[17:08:46.934] <TB0> INFO: start marker: 0
[17:08:46.934] <TB0> INFO: stop marker: 0
[17:08:46.934] <TB0> INFO: overflow: 0
[17:08:46.934] <TB0> INFO: invalid 5bit words: 0
[17:08:46.934] <TB0> INFO: invalid XOR eye diagram: 0
[17:08:46.934] <TB0> INFO: frame (failed synchr.): 0
[17:08:46.934] <TB0> INFO: idle data (no TBM trl): 0
[17:08:46.934] <TB0> INFO: no data (only TBM hdr): 0
[17:08:46.934] <TB0> INFO: TBM errors: 0
[17:08:46.934] <TB0> INFO: flawed TBM headers: 0
[17:08:46.934] <TB0> INFO: flawed TBM trailers: 0
[17:08:46.934] <TB0> INFO: event ID mismatches: 0
[17:08:46.934] <TB0> INFO: ROC errors: 0
[17:08:46.934] <TB0> INFO: missing ROC header(s): 0
[17:08:46.934] <TB0> INFO: misplaced readback start: 0
[17:08:46.934] <TB0> INFO: Pixel decoding errors: 0
[17:08:46.934] <TB0> INFO: pixel data incomplete: 0
[17:08:46.934] <TB0> INFO: pixel address: 0
[17:08:46.934] <TB0> INFO: pulse height fill bit: 0
[17:08:46.934] <TB0> INFO: buffer corruption: 0
[17:08:46.941] <TB0> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C15.dat
[17:08:46.941] <TB0> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//phCalibrationFitErr_C15.dat

[17:08:46.941] <TB0> INFO: ######################################################################
[17:08:46.941] <TB0> INFO: PixTestReadback::doTest()
[17:08:46.941] <TB0> INFO: ######################################################################
[17:08:46.941] <TB0> INFO: ----------------------------------------------------------------------
[17:08:46.941] <TB0> INFO: PixTestReadback::CalibrateVd()
[17:08:46.941] <TB0> INFO: ----------------------------------------------------------------------
[17:08:56.900] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C0.dat
[17:08:56.900] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C1.dat
[17:08:56.900] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C2.dat
[17:08:56.900] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C3.dat
[17:08:56.900] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C4.dat
[17:08:56.900] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C5.dat
[17:08:56.900] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C6.dat
[17:08:56.900] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C7.dat
[17:08:56.900] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C8.dat
[17:08:56.900] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C9.dat
[17:08:56.901] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C10.dat
[17:08:56.901] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C11.dat
[17:08:56.901] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C12.dat
[17:08:56.901] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C13.dat
[17:08:56.901] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C14.dat
[17:08:56.901] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C15.dat
[17:08:56.928] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[17:08:56.928] <TB0> INFO: ----------------------------------------------------------------------
[17:08:56.928] <TB0> INFO: PixTestReadback::CalibrateVa()
[17:08:56.928] <TB0> INFO: ----------------------------------------------------------------------
[17:09:06.818] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C0.dat
[17:09:06.818] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C1.dat
[17:09:06.818] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C2.dat
[17:09:06.818] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C3.dat
[17:09:06.818] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C4.dat
[17:09:06.818] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C5.dat
[17:09:06.819] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C6.dat
[17:09:06.819] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C7.dat
[17:09:06.819] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C8.dat
[17:09:06.819] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C9.dat
[17:09:06.819] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C10.dat
[17:09:06.819] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C11.dat
[17:09:06.819] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C12.dat
[17:09:06.819] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C13.dat
[17:09:06.819] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C14.dat
[17:09:06.819] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C15.dat
[17:09:06.846] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[17:09:06.846] <TB0> INFO: ----------------------------------------------------------------------
[17:09:06.846] <TB0> INFO: PixTestReadback::readbackVbg()
[17:09:06.846] <TB0> INFO: ----------------------------------------------------------------------
[17:09:14.512] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[17:09:14.512] <TB0> INFO: ----------------------------------------------------------------------
[17:09:14.512] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[17:09:14.512] <TB0> INFO: ----------------------------------------------------------------------
[17:09:14.512] <TB0> INFO: Vbg will be calibrated using Vd calibration
[17:09:14.512] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 153.1calibrated Vbg = 1.19981 :::*/*/*/*/
[17:09:14.512] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 151.8calibrated Vbg = 1.19603 :::*/*/*/*/
[17:09:14.512] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 156.1calibrated Vbg = 1.19278 :::*/*/*/*/
[17:09:14.512] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 156.9calibrated Vbg = 1.18945 :::*/*/*/*/
[17:09:14.512] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 150.1calibrated Vbg = 1.19747 :::*/*/*/*/
[17:09:14.512] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 155calibrated Vbg = 1.19955 :::*/*/*/*/
[17:09:14.512] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 159.7calibrated Vbg = 1.19379 :::*/*/*/*/
[17:09:14.512] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 154.6calibrated Vbg = 1.19562 :::*/*/*/*/
[17:09:14.512] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 146.2calibrated Vbg = 1.18729 :::*/*/*/*/
[17:09:14.512] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 146.7calibrated Vbg = 1.18687 :::*/*/*/*/
[17:09:14.512] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 157calibrated Vbg = 1.18612 :::*/*/*/*/
[17:09:14.512] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 157.9calibrated Vbg = 1.18054 :::*/*/*/*/
[17:09:14.512] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 158.4calibrated Vbg = 1.19651 :::*/*/*/*/
[17:09:14.512] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 168.2calibrated Vbg = 1.19212 :::*/*/*/*/
[17:09:14.512] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 159calibrated Vbg = 1.19164 :::*/*/*/*/
[17:09:14.512] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 148.6calibrated Vbg = 1.19767 :::*/*/*/*/
[17:09:14.514] <TB0> INFO: ----------------------------------------------------------------------
[17:09:14.514] <TB0> INFO: PixTestReadback::CalibrateIa()
[17:09:14.514] <TB0> INFO: ----------------------------------------------------------------------
[17:11:54.774] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C0.dat
[17:11:54.774] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C1.dat
[17:11:54.774] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C2.dat
[17:11:54.774] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C3.dat
[17:11:54.774] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C4.dat
[17:11:54.774] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C5.dat
[17:11:54.774] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C6.dat
[17:11:54.775] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C7.dat
[17:11:54.775] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C8.dat
[17:11:54.775] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C9.dat
[17:11:54.775] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C10.dat
[17:11:54.775] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C11.dat
[17:11:54.775] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C12.dat
[17:11:54.775] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C13.dat
[17:11:54.775] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C14.dat
[17:11:54.775] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//readbackCal_C15.dat
[17:11:54.803] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[17:11:54.804] <TB0> INFO: PixTestReadback::doTest() done
[17:11:54.804] <TB0> INFO: Decoding statistics:
[17:11:54.804] <TB0> INFO: General information:
[17:11:54.804] <TB0> INFO: 16bit words read: 1536
[17:11:54.804] <TB0> INFO: valid events total: 256
[17:11:54.804] <TB0> INFO: empty events: 256
[17:11:54.804] <TB0> INFO: valid events with pixels: 0
[17:11:54.804] <TB0> INFO: valid pixel hits: 0
[17:11:54.804] <TB0> INFO: Event errors: 0
[17:11:54.804] <TB0> INFO: start marker: 0
[17:11:54.804] <TB0> INFO: stop marker: 0
[17:11:54.804] <TB0> INFO: overflow: 0
[17:11:54.804] <TB0> INFO: invalid 5bit words: 0
[17:11:54.804] <TB0> INFO: invalid XOR eye diagram: 0
[17:11:54.804] <TB0> INFO: frame (failed synchr.): 0
[17:11:54.804] <TB0> INFO: idle data (no TBM trl): 0
[17:11:54.804] <TB0> INFO: no data (only TBM hdr): 0
[17:11:54.804] <TB0> INFO: TBM errors: 0
[17:11:54.804] <TB0> INFO: flawed TBM headers: 0
[17:11:54.804] <TB0> INFO: flawed TBM trailers: 0
[17:11:54.804] <TB0> INFO: event ID mismatches: 0
[17:11:54.804] <TB0> INFO: ROC errors: 0
[17:11:54.804] <TB0> INFO: missing ROC header(s): 0
[17:11:54.804] <TB0> INFO: misplaced readback start: 0
[17:11:54.804] <TB0> INFO: Pixel decoding errors: 0
[17:11:54.804] <TB0> INFO: pixel data incomplete: 0
[17:11:54.804] <TB0> INFO: pixel address: 0
[17:11:54.804] <TB0> INFO: pulse height fill bit: 0
[17:11:54.804] <TB0> INFO: buffer corruption: 0
[17:11:54.839] <TB0> INFO: ######################################################################
[17:11:54.839] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[17:11:54.839] <TB0> INFO: ######################################################################
[17:11:54.841] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[17:11:54.851] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[17:11:54.852] <TB0> INFO: run 1 of 1
[17:11:55.083] <TB0> INFO: Expecting 3120000 events.
[17:12:25.576] <TB0> INFO: 685770 events read in total (29902ms).











[17:12:55.359] <TB0> INFO: 1366130 events read in total (59685ms).











[17:13:25.634] <TB0> INFO: 2044285 events read in total (89960ms).
[17:13:55.651] <TB0> INFO: 2719910 events read in total (119977ms).











[17:14:13.779] <TB0> INFO: 3120000 events read in total (138105ms).
[17:14:13.832] <TB0> INFO: Test took 138981ms.
[17:14:36.648] <TB0> INFO: PixTestBBMap::doTest() done with 38 decoding errors: , duration: 161 seconds
[17:14:36.649] <TB0> INFO: number of dead bumps (per ROC): 0 0 1 0 1 1 0 0 0 0 0 0 0 2 1 0
[17:14:36.649] <TB0> INFO: separation cut (per ROC): 105 100 122 126 101 103 120 101 2192 115 103 109 103 102 105 105
[17:14:36.649] <TB0> INFO: Decoding statistics:
[17:14:36.649] <TB0> INFO: General information:
[17:14:36.649] <TB0> INFO: 16bit words read: 0
[17:14:36.649] <TB0> INFO: valid events total: 0
[17:14:36.649] <TB0> INFO: empty events: 0
[17:14:36.649] <TB0> INFO: valid events with pixels: 0
[17:14:36.649] <TB0> INFO: valid pixel hits: 0
[17:14:36.649] <TB0> INFO: Event errors: 0
[17:14:36.649] <TB0> INFO: start marker: 0
[17:14:36.649] <TB0> INFO: stop marker: 0
[17:14:36.649] <TB0> INFO: overflow: 0
[17:14:36.649] <TB0> INFO: invalid 5bit words: 0
[17:14:36.649] <TB0> INFO: invalid XOR eye diagram: 0
[17:14:36.649] <TB0> INFO: frame (failed synchr.): 0
[17:14:36.649] <TB0> INFO: idle data (no TBM trl): 0
[17:14:36.649] <TB0> INFO: no data (only TBM hdr): 0
[17:14:36.649] <TB0> INFO: TBM errors: 0
[17:14:36.649] <TB0> INFO: flawed TBM headers: 0
[17:14:36.649] <TB0> INFO: flawed TBM trailers: 0
[17:14:36.649] <TB0> INFO: event ID mismatches: 0
[17:14:36.649] <TB0> INFO: ROC errors: 0
[17:14:36.649] <TB0> INFO: missing ROC header(s): 0
[17:14:36.649] <TB0> INFO: misplaced readback start: 0
[17:14:36.649] <TB0> INFO: Pixel decoding errors: 0
[17:14:36.649] <TB0> INFO: pixel data incomplete: 0
[17:14:36.649] <TB0> INFO: pixel address: 0
[17:14:36.649] <TB0> INFO: pulse height fill bit: 0
[17:14:36.649] <TB0> INFO: buffer corruption: 0
[17:14:36.747] <TB0> INFO: ######################################################################
[17:14:36.747] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[17:14:36.747] <TB0> INFO: ######################################################################
[17:14:36.747] <TB0> INFO: ----------------------------------------------------------------------
[17:14:36.747] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[17:14:36.747] <TB0> INFO: ----------------------------------------------------------------------
[17:14:36.747] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[17:14:36.757] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[17:14:36.757] <TB0> INFO: run 1 of 1
[17:14:37.043] <TB0> INFO: Expecting 36608000 events.
[17:15:00.059] <TB0> INFO: 673800 events read in total (22424ms).
[17:15:22.012] <TB0> INFO: 1335950 events read in total (44377ms).
[17:15:44.168] <TB0> INFO: 1998200 events read in total (66533ms).
[17:16:06.343] <TB0> INFO: 2660750 events read in total (88708ms).
[17:16:28.771] <TB0> INFO: 3322100 events read in total (111136ms).
[17:16:50.982] <TB0> INFO: 3981250 events read in total (133347ms).
[17:17:13.048] <TB0> INFO: 4639400 events read in total (155413ms).
[17:17:35.143] <TB0> INFO: 5296950 events read in total (177508ms).
[17:17:57.299] <TB0> INFO: 5955100 events read in total (199664ms).
[17:18:19.681] <TB0> INFO: 6613100 events read in total (222046ms).
[17:18:41.927] <TB0> INFO: 7269000 events read in total (244292ms).
[17:19:04.265] <TB0> INFO: 7926550 events read in total (266630ms).
[17:19:26.324] <TB0> INFO: 8583100 events read in total (288689ms).
[17:19:48.587] <TB0> INFO: 9239650 events read in total (310952ms).
[17:20:10.728] <TB0> INFO: 9896000 events read in total (333093ms).
[17:20:32.868] <TB0> INFO: 10551700 events read in total (355233ms).
[17:20:54.000] <TB0> INFO: 11207950 events read in total (377365ms).
[17:21:16.840] <TB0> INFO: 11861700 events read in total (399205ms).
[17:21:38.748] <TB0> INFO: 12516050 events read in total (421113ms).
[17:22:00.706] <TB0> INFO: 13171950 events read in total (443071ms).
[17:22:22.608] <TB0> INFO: 13826900 events read in total (464973ms).
[17:22:44.562] <TB0> INFO: 14481550 events read in total (486927ms).
[17:23:06.584] <TB0> INFO: 15133900 events read in total (508949ms).
[17:23:28.582] <TB0> INFO: 15786100 events read in total (530947ms).
[17:23:50.709] <TB0> INFO: 16438750 events read in total (553074ms).
[17:24:12.863] <TB0> INFO: 17091700 events read in total (575228ms).
[17:24:35.059] <TB0> INFO: 17746000 events read in total (597424ms).
[17:24:57.004] <TB0> INFO: 18397000 events read in total (619369ms).
[17:25:19.256] <TB0> INFO: 19046800 events read in total (641621ms).
[17:25:41.484] <TB0> INFO: 19695300 events read in total (663849ms).
[17:26:03.559] <TB0> INFO: 20343750 events read in total (685924ms).
[17:26:25.620] <TB0> INFO: 20992450 events read in total (707985ms).
[17:26:47.709] <TB0> INFO: 21642750 events read in total (730074ms).
[17:27:10.126] <TB0> INFO: 22292050 events read in total (752491ms).
[17:27:32.143] <TB0> INFO: 22939600 events read in total (774508ms).
[17:27:54.240] <TB0> INFO: 23587950 events read in total (796605ms).
[17:28:16.253] <TB0> INFO: 24234150 events read in total (818618ms).
[17:28:38.180] <TB0> INFO: 24883350 events read in total (840545ms).
[17:29:00.261] <TB0> INFO: 25532650 events read in total (862626ms).
[17:29:22.353] <TB0> INFO: 26181500 events read in total (884718ms).
[17:29:44.649] <TB0> INFO: 26829950 events read in total (907014ms).
[17:30:06.539] <TB0> INFO: 27478350 events read in total (928904ms).
[17:30:28.391] <TB0> INFO: 28126000 events read in total (950756ms).
[17:30:50.373] <TB0> INFO: 28773950 events read in total (972738ms).
[17:31:12.331] <TB0> INFO: 29421450 events read in total (994696ms).
[17:31:34.175] <TB0> INFO: 30068350 events read in total (1016540ms).
[17:31:56.237] <TB0> INFO: 30715850 events read in total (1038602ms).
[17:32:18.166] <TB0> INFO: 31362100 events read in total (1060531ms).
[17:32:39.870] <TB0> INFO: 32009950 events read in total (1082235ms).
[17:33:01.769] <TB0> INFO: 32656500 events read in total (1104134ms).
[17:33:23.786] <TB0> INFO: 33305000 events read in total (1126151ms).
[17:33:45.594] <TB0> INFO: 33954650 events read in total (1147959ms).
[17:34:07.741] <TB0> INFO: 34604200 events read in total (1170106ms).
[17:34:29.588] <TB0> INFO: 35252800 events read in total (1191953ms).
[17:34:51.249] <TB0> INFO: 35902600 events read in total (1213614ms).
[17:35:13.148] <TB0> INFO: 36563800 events read in total (1235513ms).
[17:35:15.028] <TB0> INFO: 36608000 events read in total (1237393ms).
[17:35:15.081] <TB0> INFO: Test took 1238323ms.
[17:35:15.459] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[17:35:17.385] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[17:35:19.414] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[17:35:21.172] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[17:35:22.809] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[17:35:24.794] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[17:35:26.744] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[17:35:28.694] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[17:35:30.572] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[17:35:32.594] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[17:35:34.504] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[17:35:36.356] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[17:35:38.481] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[17:35:40.394] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[17:35:42.088] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[17:35:43.722] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[17:35:45.313] <TB0> INFO: PixTestScurves::scurves() done
[17:35:45.313] <TB0> INFO: Vcal mean: 110.49 101.52 124.27 138.37 105.81 111.02 117.01 122.51 121.20 121.28 118.91 113.36 115.42 116.63 121.06 120.24
[17:35:45.313] <TB0> INFO: Vcal RMS: 4.91 5.56 6.05 6.32 4.73 4.95 5.80 5.95 5.97 6.32 5.79 5.14 5.68 6.07 5.51 5.97
[17:35:45.313] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1268 seconds
[17:35:45.313] <TB0> INFO: Decoding statistics:
[17:35:45.313] <TB0> INFO: General information:
[17:35:45.313] <TB0> INFO: 16bit words read: 0
[17:35:45.313] <TB0> INFO: valid events total: 0
[17:35:45.313] <TB0> INFO: empty events: 0
[17:35:45.313] <TB0> INFO: valid events with pixels: 0
[17:35:45.313] <TB0> INFO: valid pixel hits: 0
[17:35:45.313] <TB0> INFO: Event errors: 0
[17:35:45.313] <TB0> INFO: start marker: 0
[17:35:45.313] <TB0> INFO: stop marker: 0
[17:35:45.313] <TB0> INFO: overflow: 0
[17:35:45.313] <TB0> INFO: invalid 5bit words: 0
[17:35:45.313] <TB0> INFO: invalid XOR eye diagram: 0
[17:35:45.313] <TB0> INFO: frame (failed synchr.): 0
[17:35:45.313] <TB0> INFO: idle data (no TBM trl): 0
[17:35:45.313] <TB0> INFO: no data (only TBM hdr): 0
[17:35:45.313] <TB0> INFO: TBM errors: 0
[17:35:45.313] <TB0> INFO: flawed TBM headers: 0
[17:35:45.313] <TB0> INFO: flawed TBM trailers: 0
[17:35:45.313] <TB0> INFO: event ID mismatches: 0
[17:35:45.313] <TB0> INFO: ROC errors: 0
[17:35:45.313] <TB0> INFO: missing ROC header(s): 0
[17:35:45.313] <TB0> INFO: misplaced readback start: 0
[17:35:45.313] <TB0> INFO: Pixel decoding errors: 0
[17:35:45.313] <TB0> INFO: pixel data incomplete: 0
[17:35:45.313] <TB0> INFO: pixel address: 0
[17:35:45.313] <TB0> INFO: pulse height fill bit: 0
[17:35:45.313] <TB0> INFO: buffer corruption: 0
[17:35:45.391] <TB0> INFO: ######################################################################
[17:35:45.392] <TB0> INFO: PixTestTrim::doTest()
[17:35:45.392] <TB0> INFO: ######################################################################
[17:35:45.393] <TB0> INFO: ----------------------------------------------------------------------
[17:35:45.393] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[17:35:45.393] <TB0> INFO: ----------------------------------------------------------------------
[17:35:45.433] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[17:35:45.433] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[17:35:45.444] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[17:35:45.444] <TB0> INFO: run 1 of 1
[17:35:45.677] <TB0> INFO: Expecting 5025280 events.
[17:36:16.188] <TB0> INFO: 823680 events read in total (29918ms).
[17:36:46.246] <TB0> INFO: 1643360 events read in total (59977ms).
[17:37:16.173] <TB0> INFO: 2459920 events read in total (89903ms).
[17:37:45.829] <TB0> INFO: 3274680 events read in total (119559ms).
[17:38:15.633] <TB0> INFO: 4087624 events read in total (149364ms).
[17:38:45.433] <TB0> INFO: 4898816 events read in total (179163ms).
[17:38:50.358] <TB0> INFO: 5025280 events read in total (184088ms).
[17:38:50.400] <TB0> INFO: Test took 184957ms.
[17:39:06.244] <TB0> INFO: ROC 0 VthrComp = 112
[17:39:06.244] <TB0> INFO: ROC 1 VthrComp = 103
[17:39:06.244] <TB0> INFO: ROC 2 VthrComp = 126
[17:39:06.245] <TB0> INFO: ROC 3 VthrComp = 132
[17:39:06.245] <TB0> INFO: ROC 4 VthrComp = 105
[17:39:06.245] <TB0> INFO: ROC 5 VthrComp = 111
[17:39:06.245] <TB0> INFO: ROC 6 VthrComp = 121
[17:39:06.245] <TB0> INFO: ROC 7 VthrComp = 114
[17:39:06.245] <TB0> INFO: ROC 8 VthrComp = 114
[17:39:06.245] <TB0> INFO: ROC 9 VthrComp = 123
[17:39:06.245] <TB0> INFO: ROC 10 VthrComp = 118
[17:39:06.245] <TB0> INFO: ROC 11 VthrComp = 113
[17:39:06.245] <TB0> INFO: ROC 12 VthrComp = 114
[17:39:06.246] <TB0> INFO: ROC 13 VthrComp = 108
[17:39:06.246] <TB0> INFO: ROC 14 VthrComp = 126
[17:39:06.246] <TB0> INFO: ROC 15 VthrComp = 123
[17:39:06.515] <TB0> INFO: Expecting 41600 events.
[17:39:09.952] <TB0> INFO: 41600 events read in total (2845ms).
[17:39:09.953] <TB0> INFO: Test took 3705ms.
[17:39:09.962] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[17:39:09.962] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[17:39:09.972] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[17:39:09.972] <TB0> INFO: run 1 of 1
[17:39:10.250] <TB0> INFO: Expecting 5025280 events.
[17:39:36.444] <TB0> INFO: 591408 events read in total (25603ms).
[17:40:01.530] <TB0> INFO: 1181280 events read in total (50689ms).
[17:40:26.775] <TB0> INFO: 1771312 events read in total (75934ms).
[17:40:52.158] <TB0> INFO: 2360272 events read in total (101317ms).
[17:41:17.403] <TB0> INFO: 2947928 events read in total (126562ms).
[17:41:42.382] <TB0> INFO: 3534600 events read in total (151541ms).
[17:42:07.557] <TB0> INFO: 4120496 events read in total (176716ms).
[17:42:32.578] <TB0> INFO: 4705760 events read in total (201737ms).
[17:42:46.444] <TB0> INFO: 5025280 events read in total (215603ms).
[17:42:46.523] <TB0> INFO: Test took 216551ms.
[17:43:13.757] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 59.8034 for pixel 3/3 mean/min/max = 46.457/33.0073/59.9068
[17:43:13.758] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 59.1145 for pixel 11/7 mean/min/max = 46.1974/33.2689/59.1259
[17:43:13.758] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 60.3619 for pixel 21/2 mean/min/max = 46.5946/32.6951/60.494
[17:43:13.758] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 64.803 for pixel 0/10 mean/min/max = 49.6559/33.7749/65.5369
[17:43:13.759] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 60.2613 for pixel 7/44 mean/min/max = 47.8972/35.5113/60.2832
[17:43:13.759] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 60.2848 for pixel 27/4 mean/min/max = 47.4245/34.5041/60.345
[17:43:13.759] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 58.0603 for pixel 12/6 mean/min/max = 45.6614/33.2108/58.1121
[17:43:13.760] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 62.2358 for pixel 51/13 mean/min/max = 47.8626/33.3631/62.3621
[17:43:13.760] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 65.6048 for pixel 16/1 mean/min/max = 50.2597/34.8938/65.6255
[17:43:13.761] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 60.2315 for pixel 0/14 mean/min/max = 45.9039/31.2767/60.531
[17:43:13.761] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 60.1777 for pixel 6/9 mean/min/max = 46.6057/32.9369/60.2745
[17:43:13.761] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 59.7748 for pixel 20/4 mean/min/max = 46.4902/33.1453/59.8351
[17:43:13.762] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 60.7103 for pixel 0/0 mean/min/max = 46.955/33.0923/60.8177
[17:43:13.762] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 65.4179 for pixel 15/71 mean/min/max = 50.456/35.2104/65.7016
[17:43:13.762] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 58.2161 for pixel 23/11 mean/min/max = 45.0988/31.875/58.3226
[17:43:13.763] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 61.1828 for pixel 1/51 mean/min/max = 46.4876/31.7736/61.2015
[17:43:13.763] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:43:13.852] <TB0> INFO: Expecting 411648 events.
[17:43:23.543] <TB0> INFO: 411648 events read in total (9100ms).
[17:43:23.550] <TB0> INFO: Expecting 411648 events.
[17:43:32.661] <TB0> INFO: 411648 events read in total (8708ms).
[17:43:32.671] <TB0> INFO: Expecting 411648 events.
[17:43:41.814] <TB0> INFO: 411648 events read in total (8740ms).
[17:43:41.830] <TB0> INFO: Expecting 411648 events.
[17:43:50.898] <TB0> INFO: 411648 events read in total (8665ms).
[17:43:50.916] <TB0> INFO: Expecting 411648 events.
[17:43:59.901] <TB0> INFO: 411648 events read in total (8582ms).
[17:43:59.923] <TB0> INFO: Expecting 411648 events.
[17:44:08.975] <TB0> INFO: 411648 events read in total (8649ms).
[17:44:08.995] <TB0> INFO: Expecting 411648 events.
[17:44:18.016] <TB0> INFO: 411648 events read in total (8618ms).
[17:44:18.037] <TB0> INFO: Expecting 411648 events.
[17:44:27.039] <TB0> INFO: 411648 events read in total (8599ms).
[17:44:27.068] <TB0> INFO: Expecting 411648 events.
[17:44:36.051] <TB0> INFO: 411648 events read in total (8580ms).
[17:44:36.078] <TB0> INFO: Expecting 411648 events.
[17:44:45.070] <TB0> INFO: 411648 events read in total (8589ms).
[17:44:45.098] <TB0> INFO: Expecting 411648 events.
[17:44:54.149] <TB0> INFO: 411648 events read in total (8648ms).
[17:44:54.181] <TB0> INFO: Expecting 411648 events.
[17:45:03.204] <TB0> INFO: 411648 events read in total (8621ms).
[17:45:03.249] <TB0> INFO: Expecting 411648 events.
[17:45:12.298] <TB0> INFO: 411648 events read in total (8646ms).
[17:45:12.346] <TB0> INFO: Expecting 411648 events.
[17:45:21.382] <TB0> INFO: 411648 events read in total (8633ms).
[17:45:21.423] <TB0> INFO: Expecting 411648 events.
[17:45:30.527] <TB0> INFO: 411648 events read in total (8701ms).
[17:45:30.580] <TB0> INFO: Expecting 411648 events.
[17:45:39.620] <TB0> INFO: 411648 events read in total (8638ms).
[17:45:39.666] <TB0> INFO: Test took 145903ms.
[17:45:40.354] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[17:45:40.364] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[17:45:40.364] <TB0> INFO: run 1 of 1
[17:45:40.597] <TB0> INFO: Expecting 5025280 events.
[17:46:06.335] <TB0> INFO: 587056 events read in total (25147ms).
[17:46:31.447] <TB0> INFO: 1173424 events read in total (50259ms).
[17:46:57.184] <TB0> INFO: 1759528 events read in total (75996ms).
[17:47:22.637] <TB0> INFO: 2345416 events read in total (101450ms).
[17:47:48.060] <TB0> INFO: 2931112 events read in total (126873ms).
[17:48:13.255] <TB0> INFO: 3520272 events read in total (152067ms).
[17:48:38.592] <TB0> INFO: 4111752 events read in total (177404ms).
[17:49:04.177] <TB0> INFO: 4701672 events read in total (202990ms).
[17:49:18.426] <TB0> INFO: 5025280 events read in total (217238ms).
[17:49:18.531] <TB0> INFO: Test took 218166ms.
[17:49:42.924] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 2.856399 .. 144.784374
[17:49:43.167] <TB0> INFO: Expecting 208000 events.
[17:49:52.545] <TB0> INFO: 208000 events read in total (8786ms).
[17:49:52.547] <TB0> INFO: Test took 9622ms.
[17:49:52.593] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 2 .. 154 (-1/-1) hits flags = 528 (plus default)
[17:49:52.602] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[17:49:52.602] <TB0> INFO: run 1 of 1
[17:49:52.880] <TB0> INFO: Expecting 5091840 events.
[17:50:18.979] <TB0> INFO: 585008 events read in total (25507ms).
[17:50:44.420] <TB0> INFO: 1169896 events read in total (50948ms).
[17:51:10.047] <TB0> INFO: 1754320 events read in total (76576ms).
[17:51:35.039] <TB0> INFO: 2338656 events read in total (101567ms).
[17:52:00.191] <TB0> INFO: 2922928 events read in total (126719ms).
[17:52:25.134] <TB0> INFO: 3506400 events read in total (151662ms).
[17:52:50.353] <TB0> INFO: 4089768 events read in total (176881ms).
[17:53:15.851] <TB0> INFO: 4672088 events read in total (202379ms).
[17:53:34.463] <TB0> INFO: 5091840 events read in total (220991ms).
[17:53:34.533] <TB0> INFO: Test took 221932ms.
[17:54:01.589] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 27.251382 .. 47.522793
[17:54:01.825] <TB0> INFO: Expecting 208000 events.
[17:54:11.864] <TB0> INFO: 208000 events read in total (9448ms).
[17:54:11.866] <TB0> INFO: Test took 10275ms.
[17:54:11.943] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 57 (-1/-1) hits flags = 528 (plus default)
[17:54:11.955] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[17:54:11.955] <TB0> INFO: run 1 of 1
[17:54:12.243] <TB0> INFO: Expecting 1364480 events.
[17:54:40.480] <TB0> INFO: 652952 events read in total (27646ms).
[17:55:08.151] <TB0> INFO: 1304528 events read in total (55318ms).
[17:55:11.128] <TB0> INFO: 1364480 events read in total (58294ms).
[17:55:11.156] <TB0> INFO: Test took 59202ms.
[17:55:23.150] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 26.594754 .. 49.099478
[17:55:23.396] <TB0> INFO: Expecting 208000 events.
[17:55:33.084] <TB0> INFO: 208000 events read in total (9096ms).
[17:55:33.085] <TB0> INFO: Test took 9933ms.
[17:55:33.153] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 16 .. 59 (-1/-1) hits flags = 528 (plus default)
[17:55:33.164] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[17:55:33.165] <TB0> INFO: run 1 of 1
[17:55:33.442] <TB0> INFO: Expecting 1464320 events.
[17:56:01.347] <TB0> INFO: 650576 events read in total (27313ms).
[17:56:28.772] <TB0> INFO: 1300376 events read in total (54738ms).
[17:56:35.915] <TB0> INFO: 1464320 events read in total (61881ms).
[17:56:35.943] <TB0> INFO: Test took 62779ms.
[17:56:48.758] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 26.012300 .. 46.786841
[17:56:49.044] <TB0> INFO: Expecting 208000 events.
[17:56:58.583] <TB0> INFO: 208000 events read in total (8947ms).
[17:56:58.584] <TB0> INFO: Test took 9825ms.
[17:56:58.648] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 16 .. 56 (-1/-1) hits flags = 528 (plus default)
[17:56:58.662] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[17:56:58.662] <TB0> INFO: run 1 of 1
[17:56:58.940] <TB0> INFO: Expecting 1364480 events.
[17:57:26.982] <TB0> INFO: 660768 events read in total (27451ms).
[17:57:53.908] <TB0> INFO: 1321136 events read in total (54377ms).
[17:57:56.184] <TB0> INFO: 1364480 events read in total (56654ms).
[17:57:56.215] <TB0> INFO: Test took 57553ms.
[17:58:08.799] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[17:58:08.799] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[17:58:08.810] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[17:58:08.810] <TB0> INFO: run 1 of 1
[17:58:09.045] <TB0> INFO: Expecting 1364480 events.
[17:58:37.340] <TB0> INFO: 668688 events read in total (27703ms).
[17:59:04.614] <TB0> INFO: 1336864 events read in total (54977ms).
[17:59:06.187] <TB0> INFO: 1364480 events read in total (56551ms).
[17:59:06.210] <TB0> INFO: Test took 57400ms.
[17:59:19.689] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C0.dat
[17:59:19.689] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C1.dat
[17:59:19.690] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C2.dat
[17:59:19.690] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C3.dat
[17:59:19.690] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C4.dat
[17:59:19.690] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C5.dat
[17:59:19.690] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C6.dat
[17:59:19.690] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C7.dat
[17:59:19.690] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C8.dat
[17:59:19.690] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C9.dat
[17:59:19.690] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C10.dat
[17:59:19.690] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C11.dat
[17:59:19.691] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C12.dat
[17:59:19.691] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C13.dat
[17:59:19.691] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C14.dat
[17:59:19.691] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C15.dat
[17:59:19.691] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters35_C0.dat
[17:59:19.698] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters35_C1.dat
[17:59:19.706] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters35_C2.dat
[17:59:19.713] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters35_C3.dat
[17:59:19.720] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters35_C4.dat
[17:59:19.728] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters35_C5.dat
[17:59:19.737] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters35_C6.dat
[17:59:19.746] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters35_C7.dat
[17:59:19.755] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters35_C8.dat
[17:59:19.764] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters35_C9.dat
[17:59:19.773] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters35_C10.dat
[17:59:19.779] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters35_C11.dat
[17:59:19.785] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters35_C12.dat
[17:59:19.791] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters35_C13.dat
[17:59:19.796] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters35_C14.dat
[17:59:19.802] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters35_C15.dat
[17:59:19.811] <TB0> INFO: PixTestTrim::trimTest() done
[17:59:19.811] <TB0> INFO: vtrim: 123 131 121 130 136 135 133 113 158 122 123 141 120 138 136 137
[17:59:19.811] <TB0> INFO: vthrcomp: 112 103 126 132 105 111 121 114 114 123 118 113 114 108 126 123
[17:59:19.811] <TB0> INFO: vcal mean: 34.96 34.98 35.03 35.67 35.01 34.99 34.99 35.44 35.59 35.03 35.33 35.03 35.01 35.35 35.01 35.15
[17:59:19.811] <TB0> INFO: vcal RMS: 0.98 0.99 1.05 1.91 1.07 1.05 0.96 1.61 1.68 1.07 1.52 1.07 1.11 1.49 1.17 1.32
[17:59:19.811] <TB0> INFO: bits mean: 9.37 9.96 9.23 8.69 9.45 9.32 9.65 9.32 9.31 9.87 9.70 9.98 9.06 8.63 10.35 9.90
[17:59:19.811] <TB0> INFO: bits RMS: 2.60 2.29 2.74 2.83 2.21 2.39 2.49 2.68 2.31 2.64 2.62 2.29 2.74 2.49 2.38 2.56
[17:59:19.819] <TB0> INFO: ----------------------------------------------------------------------
[17:59:19.819] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[17:59:19.819] <TB0> INFO: ----------------------------------------------------------------------
[17:59:19.822] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[17:59:19.832] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[17:59:19.832] <TB0> INFO: run 1 of 1
[17:59:20.068] <TB0> INFO: Expecting 4160000 events.
[17:59:51.699] <TB0> INFO: 743575 events read in total (31040ms).
[18:00:22.034] <TB0> INFO: 1479530 events read in total (61375ms).
[18:00:52.657] <TB0> INFO: 2210495 events read in total (91998ms).
[18:01:23.088] <TB0> INFO: 2936670 events read in total (122429ms).
[18:01:53.383] <TB0> INFO: 3661965 events read in total (152724ms).
[18:02:14.525] <TB0> INFO: 4160000 events read in total (173866ms).
[18:02:14.578] <TB0> INFO: Test took 174745ms.
[18:02:41.428] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 222 (-1/-1) hits flags = 528 (plus default)
[18:02:41.438] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[18:02:41.438] <TB0> INFO: run 1 of 1
[18:02:41.673] <TB0> INFO: Expecting 4638400 events.
[18:03:13.457] <TB0> INFO: 695990 events read in total (31192ms).
[18:03:43.225] <TB0> INFO: 1386065 events read in total (60960ms).
[18:04:13.146] <TB0> INFO: 2072610 events read in total (90881ms).
[18:04:42.315] <TB0> INFO: 2755735 events read in total (120050ms).
[18:05:11.759] <TB0> INFO: 3436780 events read in total (149494ms).
[18:05:41.462] <TB0> INFO: 4117280 events read in total (179197ms).
[18:06:04.231] <TB0> INFO: 4638400 events read in total (201966ms).
[18:06:04.297] <TB0> INFO: Test took 202858ms.
[18:06:35.362] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[18:06:35.373] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[18:06:35.373] <TB0> INFO: run 1 of 1
[18:06:35.604] <TB0> INFO: Expecting 4264000 events.
[18:07:06.838] <TB0> INFO: 715155 events read in total (30642ms).
[18:07:37.210] <TB0> INFO: 1423485 events read in total (61014ms).
[18:08:07.308] <TB0> INFO: 2127720 events read in total (91112ms).
[18:08:37.194] <TB0> INFO: 2826625 events read in total (120998ms).
[18:09:07.203] <TB0> INFO: 3525060 events read in total (151007ms).
[18:09:37.514] <TB0> INFO: 4224850 events read in total (181318ms).
[18:09:39.671] <TB0> INFO: 4264000 events read in total (183475ms).
[18:09:39.740] <TB0> INFO: Test took 184367ms.
[18:10:09.675] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[18:10:09.685] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[18:10:09.685] <TB0> INFO: run 1 of 1
[18:10:09.955] <TB0> INFO: Expecting 4243200 events.
[18:10:41.263] <TB0> INFO: 716550 events read in total (30717ms).
[18:11:11.875] <TB0> INFO: 1426230 events read in total (61329ms).
[18:11:41.970] <TB0> INFO: 2131745 events read in total (91424ms).
[18:12:12.121] <TB0> INFO: 2832095 events read in total (121575ms).
[18:12:42.307] <TB0> INFO: 3532095 events read in total (151761ms).
[18:13:12.493] <TB0> INFO: 4233990 events read in total (181947ms).
[18:13:13.294] <TB0> INFO: 4243200 events read in total (182748ms).
[18:13:13.349] <TB0> INFO: Test took 183663ms.
[18:13:42.504] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[18:13:42.515] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[18:13:42.515] <TB0> INFO: run 1 of 1
[18:13:42.753] <TB0> INFO: Expecting 4243200 events.
[18:14:13.797] <TB0> INFO: 716560 events read in total (30452ms).
[18:14:44.159] <TB0> INFO: 1426235 events read in total (60814ms).
[18:15:14.274] <TB0> INFO: 2132035 events read in total (90929ms).
[18:15:44.711] <TB0> INFO: 2832490 events read in total (121366ms).
[18:16:14.901] <TB0> INFO: 3532550 events read in total (151556ms).
[18:16:44.902] <TB0> INFO: 4234495 events read in total (181557ms).
[18:16:45.703] <TB0> INFO: 4243200 events read in total (182358ms).
[18:16:45.755] <TB0> INFO: Test took 183240ms.
[18:17:15.454] <TB0> INFO: PixTestTrim::trimBitTest() done
[18:17:15.455] <TB0> INFO: PixTestTrim::doTest() done, duration: 2490 seconds
[18:17:15.455] <TB0> INFO: Decoding statistics:
[18:17:15.455] <TB0> INFO: General information:
[18:17:15.455] <TB0> INFO: 16bit words read: 0
[18:17:15.455] <TB0> INFO: valid events total: 0
[18:17:15.455] <TB0> INFO: empty events: 0
[18:17:15.455] <TB0> INFO: valid events with pixels: 0
[18:17:15.455] <TB0> INFO: valid pixel hits: 0
[18:17:15.455] <TB0> INFO: Event errors: 0
[18:17:15.455] <TB0> INFO: start marker: 0
[18:17:15.455] <TB0> INFO: stop marker: 0
[18:17:15.455] <TB0> INFO: overflow: 0
[18:17:15.455] <TB0> INFO: invalid 5bit words: 0
[18:17:15.455] <TB0> INFO: invalid XOR eye diagram: 0
[18:17:15.455] <TB0> INFO: frame (failed synchr.): 0
[18:17:15.455] <TB0> INFO: idle data (no TBM trl): 0
[18:17:15.456] <TB0> INFO: no data (only TBM hdr): 0
[18:17:15.456] <TB0> INFO: TBM errors: 0
[18:17:15.456] <TB0> INFO: flawed TBM headers: 0
[18:17:15.456] <TB0> INFO: flawed TBM trailers: 0
[18:17:15.456] <TB0> INFO: event ID mismatches: 0
[18:17:15.456] <TB0> INFO: ROC errors: 0
[18:17:15.456] <TB0> INFO: missing ROC header(s): 0
[18:17:15.456] <TB0> INFO: misplaced readback start: 0
[18:17:15.456] <TB0> INFO: Pixel decoding errors: 0
[18:17:15.456] <TB0> INFO: pixel data incomplete: 0
[18:17:15.456] <TB0> INFO: pixel address: 0
[18:17:15.456] <TB0> INFO: pulse height fill bit: 0
[18:17:15.456] <TB0> INFO: buffer corruption: 0
[18:17:16.179] <TB0> INFO: ######################################################################
[18:17:16.179] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[18:17:16.179] <TB0> INFO: ######################################################################
[18:17:16.451] <TB0> INFO: Expecting 41600 events.
[18:17:20.022] <TB0> INFO: 41600 events read in total (2980ms).
[18:17:20.023] <TB0> INFO: Test took 3842ms.
[18:17:20.458] <TB0> INFO: Expecting 41600 events.
[18:17:23.912] <TB0> INFO: 41600 events read in total (2862ms).
[18:17:23.913] <TB0> INFO: Test took 3688ms.
[18:17:24.201] <TB0> INFO: Expecting 41600 events.
[18:17:27.728] <TB0> INFO: 41600 events read in total (2936ms).
[18:17:27.729] <TB0> INFO: Test took 3793ms.
[18:17:28.017] <TB0> INFO: Expecting 41600 events.
[18:17:31.552] <TB0> INFO: 41600 events read in total (2943ms).
[18:17:31.553] <TB0> INFO: Test took 3800ms.
[18:17:31.843] <TB0> INFO: Expecting 41600 events.
[18:17:35.317] <TB0> INFO: 41600 events read in total (2882ms).
[18:17:35.318] <TB0> INFO: Test took 3739ms.
[18:17:35.608] <TB0> INFO: Expecting 41600 events.
[18:17:39.158] <TB0> INFO: 41600 events read in total (2958ms).
[18:17:39.159] <TB0> INFO: Test took 3815ms.
[18:17:39.447] <TB0> INFO: Expecting 41600 events.
[18:17:42.970] <TB0> INFO: 41600 events read in total (2932ms).
[18:17:42.970] <TB0> INFO: Test took 3788ms.
[18:17:43.268] <TB0> INFO: Expecting 41600 events.
[18:17:46.824] <TB0> INFO: 41600 events read in total (2965ms).
[18:17:46.825] <TB0> INFO: Test took 3831ms.
[18:17:47.115] <TB0> INFO: Expecting 41600 events.
[18:17:50.566] <TB0> INFO: 41600 events read in total (2859ms).
[18:17:50.567] <TB0> INFO: Test took 3716ms.
[18:17:50.855] <TB0> INFO: Expecting 41600 events.
[18:17:54.413] <TB0> INFO: 41600 events read in total (2967ms).
[18:17:54.414] <TB0> INFO: Test took 3824ms.
[18:17:54.702] <TB0> INFO: Expecting 41600 events.
[18:17:58.281] <TB0> INFO: 41600 events read in total (2988ms).
[18:17:58.282] <TB0> INFO: Test took 3845ms.
[18:17:58.578] <TB0> INFO: Expecting 41600 events.
[18:18:02.184] <TB0> INFO: 41600 events read in total (3014ms).
[18:18:02.184] <TB0> INFO: Test took 3879ms.
[18:18:02.472] <TB0> INFO: Expecting 41600 events.
[18:18:06.008] <TB0> INFO: 41600 events read in total (2944ms).
[18:18:06.009] <TB0> INFO: Test took 3801ms.
[18:18:06.303] <TB0> INFO: Expecting 41600 events.
[18:18:09.887] <TB0> INFO: 41600 events read in total (2993ms).
[18:18:09.888] <TB0> INFO: Test took 3856ms.
[18:18:10.176] <TB0> INFO: Expecting 41600 events.
[18:18:13.773] <TB0> INFO: 41600 events read in total (3005ms).
[18:18:13.774] <TB0> INFO: Test took 3863ms.
[18:18:14.063] <TB0> INFO: Expecting 41600 events.
[18:18:17.671] <TB0> INFO: 41600 events read in total (3016ms).
[18:18:17.672] <TB0> INFO: Test took 3874ms.
[18:18:17.975] <TB0> INFO: Expecting 41600 events.
[18:18:21.530] <TB0> INFO: 41600 events read in total (2964ms).
[18:18:21.531] <TB0> INFO: Test took 3835ms.
[18:18:21.819] <TB0> INFO: Expecting 41600 events.
[18:18:25.369] <TB0> INFO: 41600 events read in total (2959ms).
[18:18:25.369] <TB0> INFO: Test took 3815ms.
[18:18:25.658] <TB0> INFO: Expecting 41600 events.
[18:18:29.167] <TB0> INFO: 41600 events read in total (2918ms).
[18:18:29.168] <TB0> INFO: Test took 3775ms.
[18:18:29.456] <TB0> INFO: Expecting 41600 events.
[18:18:33.047] <TB0> INFO: 41600 events read in total (3000ms).
[18:18:33.047] <TB0> INFO: Test took 3856ms.
[18:18:33.335] <TB0> INFO: Expecting 41600 events.
[18:18:36.808] <TB0> INFO: 41600 events read in total (2881ms).
[18:18:36.809] <TB0> INFO: Test took 3738ms.
[18:18:37.109] <TB0> INFO: Expecting 41600 events.
[18:18:40.602] <TB0> INFO: 41600 events read in total (2901ms).
[18:18:40.603] <TB0> INFO: Test took 3769ms.
[18:18:40.891] <TB0> INFO: Expecting 41600 events.
[18:18:44.360] <TB0> INFO: 41600 events read in total (2877ms).
[18:18:44.361] <TB0> INFO: Test took 3734ms.
[18:18:44.649] <TB0> INFO: Expecting 41600 events.
[18:18:48.149] <TB0> INFO: 41600 events read in total (2908ms).
[18:18:48.150] <TB0> INFO: Test took 3765ms.
[18:18:48.439] <TB0> INFO: Expecting 41600 events.
[18:18:51.936] <TB0> INFO: 41600 events read in total (2906ms).
[18:18:51.937] <TB0> INFO: Test took 3763ms.
[18:18:52.228] <TB0> INFO: Expecting 41600 events.
[18:18:55.805] <TB0> INFO: 41600 events read in total (2986ms).
[18:18:55.806] <TB0> INFO: Test took 3843ms.
[18:18:56.107] <TB0> INFO: Expecting 41600 events.
[18:18:59.648] <TB0> INFO: 41600 events read in total (2950ms).
[18:18:59.649] <TB0> INFO: Test took 3820ms.
[18:18:59.937] <TB0> INFO: Expecting 41600 events.
[18:19:03.460] <TB0> INFO: 41600 events read in total (2932ms).
[18:19:03.461] <TB0> INFO: Test took 3789ms.
[18:19:03.750] <TB0> INFO: Expecting 41600 events.
[18:19:07.326] <TB0> INFO: 41600 events read in total (2984ms).
[18:19:07.327] <TB0> INFO: Test took 3842ms.
[18:19:07.616] <TB0> INFO: Expecting 2560 events.
[18:19:08.500] <TB0> INFO: 2560 events read in total (293ms).
[18:19:08.500] <TB0> INFO: Test took 1161ms.
[18:19:08.807] <TB0> INFO: Expecting 2560 events.
[18:19:09.691] <TB0> INFO: 2560 events read in total (292ms).
[18:19:09.691] <TB0> INFO: Test took 1190ms.
[18:19:09.998] <TB0> INFO: Expecting 2560 events.
[18:19:10.882] <TB0> INFO: 2560 events read in total (292ms).
[18:19:10.883] <TB0> INFO: Test took 1191ms.
[18:19:11.191] <TB0> INFO: Expecting 2560 events.
[18:19:12.076] <TB0> INFO: 2560 events read in total (294ms).
[18:19:12.076] <TB0> INFO: Test took 1193ms.
[18:19:12.384] <TB0> INFO: Expecting 2560 events.
[18:19:13.265] <TB0> INFO: 2560 events read in total (289ms).
[18:19:13.265] <TB0> INFO: Test took 1188ms.
[18:19:13.573] <TB0> INFO: Expecting 2560 events.
[18:19:14.455] <TB0> INFO: 2560 events read in total (290ms).
[18:19:14.455] <TB0> INFO: Test took 1189ms.
[18:19:14.763] <TB0> INFO: Expecting 2560 events.
[18:19:15.641] <TB0> INFO: 2560 events read in total (286ms).
[18:19:15.641] <TB0> INFO: Test took 1185ms.
[18:19:15.950] <TB0> INFO: Expecting 2560 events.
[18:19:16.830] <TB0> INFO: 2560 events read in total (289ms).
[18:19:16.830] <TB0> INFO: Test took 1188ms.
[18:19:17.138] <TB0> INFO: Expecting 2560 events.
[18:19:18.016] <TB0> INFO: 2560 events read in total (286ms).
[18:19:18.017] <TB0> INFO: Test took 1186ms.
[18:19:18.324] <TB0> INFO: Expecting 2560 events.
[18:19:19.203] <TB0> INFO: 2560 events read in total (287ms).
[18:19:19.203] <TB0> INFO: Test took 1186ms.
[18:19:19.511] <TB0> INFO: Expecting 2560 events.
[18:19:20.393] <TB0> INFO: 2560 events read in total (290ms).
[18:19:20.393] <TB0> INFO: Test took 1189ms.
[18:19:20.700] <TB0> INFO: Expecting 2560 events.
[18:19:21.578] <TB0> INFO: 2560 events read in total (286ms).
[18:19:21.579] <TB0> INFO: Test took 1186ms.
[18:19:21.886] <TB0> INFO: Expecting 2560 events.
[18:19:22.772] <TB0> INFO: 2560 events read in total (294ms).
[18:19:22.772] <TB0> INFO: Test took 1193ms.
[18:19:23.080] <TB0> INFO: Expecting 2560 events.
[18:19:23.962] <TB0> INFO: 2560 events read in total (290ms).
[18:19:23.962] <TB0> INFO: Test took 1189ms.
[18:19:24.270] <TB0> INFO: Expecting 2560 events.
[18:19:25.155] <TB0> INFO: 2560 events read in total (293ms).
[18:19:25.156] <TB0> INFO: Test took 1194ms.
[18:19:25.464] <TB0> INFO: Expecting 2560 events.
[18:19:26.347] <TB0> INFO: 2560 events read in total (292ms).
[18:19:26.347] <TB0> INFO: Test took 1191ms.
[18:19:26.350] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:19:26.656] <TB0> INFO: Expecting 655360 events.
[18:19:41.064] <TB0> INFO: 655360 events read in total (13816ms).
[18:19:41.079] <TB0> INFO: Expecting 655360 events.
[18:19:55.253] <TB0> INFO: 655360 events read in total (13771ms).
[18:19:55.268] <TB0> INFO: Expecting 655360 events.
[18:20:09.500] <TB0> INFO: 655360 events read in total (13829ms).
[18:20:09.525] <TB0> INFO: Expecting 655360 events.
[18:20:23.684] <TB0> INFO: 655360 events read in total (13756ms).
[18:20:23.708] <TB0> INFO: Expecting 655360 events.
[18:20:37.850] <TB0> INFO: 655360 events read in total (13739ms).
[18:20:37.885] <TB0> INFO: Expecting 655360 events.
[18:20:52.058] <TB0> INFO: 655360 events read in total (13770ms).
[18:20:52.091] <TB0> INFO: Expecting 655360 events.
[18:21:06.185] <TB0> INFO: 655360 events read in total (13691ms).
[18:21:06.233] <TB0> INFO: Expecting 655360 events.
[18:21:20.365] <TB0> INFO: 655360 events read in total (13729ms).
[18:21:20.405] <TB0> INFO: Expecting 655360 events.
[18:21:34.446] <TB0> INFO: 655360 events read in total (13638ms).
[18:21:34.499] <TB0> INFO: Expecting 655360 events.
[18:21:48.619] <TB0> INFO: 655360 events read in total (13717ms).
[18:21:48.685] <TB0> INFO: Expecting 655360 events.
[18:22:02.752] <TB0> INFO: 655360 events read in total (13664ms).
[18:22:02.811] <TB0> INFO: Expecting 655360 events.
[18:22:16.879] <TB0> INFO: 655360 events read in total (13665ms).
[18:22:16.938] <TB0> INFO: Expecting 655360 events.
[18:22:31.149] <TB0> INFO: 655360 events read in total (13808ms).
[18:22:31.210] <TB0> INFO: Expecting 655360 events.
[18:22:45.312] <TB0> INFO: 655360 events read in total (13699ms).
[18:22:45.401] <TB0> INFO: Expecting 655360 events.
[18:22:59.496] <TB0> INFO: 655360 events read in total (13692ms).
[18:22:59.585] <TB0> INFO: Expecting 655360 events.
[18:23:13.615] <TB0> INFO: 655360 events read in total (13627ms).
[18:23:13.714] <TB0> INFO: Test took 227364ms.
[18:23:13.792] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:23:14.057] <TB0> INFO: Expecting 655360 events.
[18:23:28.209] <TB0> INFO: 655360 events read in total (13561ms).
[18:23:28.220] <TB0> INFO: Expecting 655360 events.
[18:23:42.282] <TB0> INFO: 655360 events read in total (13659ms).
[18:23:42.297] <TB0> INFO: Expecting 655360 events.
[18:23:56.237] <TB0> INFO: 655360 events read in total (13537ms).
[18:23:56.256] <TB0> INFO: Expecting 655360 events.
[18:24:10.028] <TB0> INFO: 655360 events read in total (13369ms).
[18:24:10.050] <TB0> INFO: Expecting 655360 events.
[18:24:24.051] <TB0> INFO: 655360 events read in total (13598ms).
[18:24:24.088] <TB0> INFO: Expecting 655360 events.
[18:24:38.169] <TB0> INFO: 655360 events read in total (13678ms).
[18:24:38.200] <TB0> INFO: Expecting 655360 events.
[18:24:52.116] <TB0> INFO: 655360 events read in total (13509ms).
[18:24:52.150] <TB0> INFO: Expecting 655360 events.
[18:25:06.050] <TB0> INFO: 655360 events read in total (13497ms).
[18:25:06.091] <TB0> INFO: Expecting 655360 events.
[18:25:19.992] <TB0> INFO: 655360 events read in total (13497ms).
[18:25:20.060] <TB0> INFO: Expecting 655360 events.
[18:25:34.148] <TB0> INFO: 655360 events read in total (13685ms).
[18:25:34.196] <TB0> INFO: Expecting 655360 events.
[18:25:48.085] <TB0> INFO: 655360 events read in total (13486ms).
[18:25:48.140] <TB0> INFO: Expecting 655360 events.
[18:26:02.191] <TB0> INFO: 655360 events read in total (13648ms).
[18:26:02.248] <TB0> INFO: Expecting 655360 events.
[18:26:16.227] <TB0> INFO: 655360 events read in total (13577ms).
[18:26:16.289] <TB0> INFO: Expecting 655360 events.
[18:26:30.154] <TB0> INFO: 655360 events read in total (13462ms).
[18:26:30.222] <TB0> INFO: Expecting 655360 events.
[18:26:44.066] <TB0> INFO: 655360 events read in total (13442ms).
[18:26:44.152] <TB0> INFO: Expecting 655360 events.
[18:26:58.180] <TB0> INFO: 655360 events read in total (13625ms).
[18:26:58.270] <TB0> INFO: Test took 224478ms.
[18:26:58.442] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:26:58.447] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[18:26:58.451] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:26:58.456] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:26:58.460] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:26:58.465] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:26:58.469] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:26:58.474] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:26:58.479] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[18:26:58.483] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[18:26:58.488] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:26:58.492] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:26:58.497] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[18:26:58.501] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[18:26:58.506] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[18:26:58.510] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:26:58.515] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:26:58.519] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:26:58.524] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:26:58.529] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:26:58.533] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:26:58.538] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[18:26:58.542] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[18:26:58.547] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[18:26:58.552] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:26:58.586] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C0.dat
[18:26:58.586] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C1.dat
[18:26:58.586] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C2.dat
[18:26:58.586] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C3.dat
[18:26:58.586] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C4.dat
[18:26:58.586] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C5.dat
[18:26:58.586] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C6.dat
[18:26:58.586] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C7.dat
[18:26:58.587] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C8.dat
[18:26:58.587] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C9.dat
[18:26:58.587] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C10.dat
[18:26:58.587] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C11.dat
[18:26:58.587] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C12.dat
[18:26:58.587] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C13.dat
[18:26:58.587] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C14.dat
[18:26:58.587] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters35_C15.dat
[18:26:58.837] <TB0> INFO: Expecting 41600 events.
[18:27:01.952] <TB0> INFO: 41600 events read in total (2523ms).
[18:27:01.953] <TB0> INFO: Test took 3363ms.
[18:27:02.397] <TB0> INFO: Expecting 41600 events.
[18:27:05.418] <TB0> INFO: 41600 events read in total (2429ms).
[18:27:05.419] <TB0> INFO: Test took 3253ms.
[18:27:05.883] <TB0> INFO: Expecting 41600 events.
[18:27:08.965] <TB0> INFO: 41600 events read in total (2490ms).
[18:27:08.965] <TB0> INFO: Test took 3335ms.
[18:27:09.179] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:09.267] <TB0> INFO: Expecting 2560 events.
[18:27:10.149] <TB0> INFO: 2560 events read in total (290ms).
[18:27:10.149] <TB0> INFO: Test took 970ms.
[18:27:10.151] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:10.457] <TB0> INFO: Expecting 2560 events.
[18:27:11.339] <TB0> INFO: 2560 events read in total (290ms).
[18:27:11.339] <TB0> INFO: Test took 1188ms.
[18:27:11.341] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:11.647] <TB0> INFO: Expecting 2560 events.
[18:27:12.532] <TB0> INFO: 2560 events read in total (293ms).
[18:27:12.532] <TB0> INFO: Test took 1191ms.
[18:27:12.534] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:12.840] <TB0> INFO: Expecting 2560 events.
[18:27:13.724] <TB0> INFO: 2560 events read in total (293ms).
[18:27:13.724] <TB0> INFO: Test took 1190ms.
[18:27:13.728] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:14.032] <TB0> INFO: Expecting 2560 events.
[18:27:14.914] <TB0> INFO: 2560 events read in total (291ms).
[18:27:14.914] <TB0> INFO: Test took 1186ms.
[18:27:14.916] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:15.223] <TB0> INFO: Expecting 2560 events.
[18:27:16.105] <TB0> INFO: 2560 events read in total (291ms).
[18:27:16.105] <TB0> INFO: Test took 1189ms.
[18:27:16.107] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:16.414] <TB0> INFO: Expecting 2560 events.
[18:27:17.303] <TB0> INFO: 2560 events read in total (298ms).
[18:27:17.304] <TB0> INFO: Test took 1197ms.
[18:27:17.305] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:17.611] <TB0> INFO: Expecting 2560 events.
[18:27:18.493] <TB0> INFO: 2560 events read in total (290ms).
[18:27:18.494] <TB0> INFO: Test took 1189ms.
[18:27:18.496] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:18.802] <TB0> INFO: Expecting 2560 events.
[18:27:19.680] <TB0> INFO: 2560 events read in total (286ms).
[18:27:19.680] <TB0> INFO: Test took 1184ms.
[18:27:19.682] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:19.989] <TB0> INFO: Expecting 2560 events.
[18:27:20.867] <TB0> INFO: 2560 events read in total (287ms).
[18:27:20.867] <TB0> INFO: Test took 1185ms.
[18:27:20.869] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:21.175] <TB0> INFO: Expecting 2560 events.
[18:27:22.052] <TB0> INFO: 2560 events read in total (285ms).
[18:27:22.053] <TB0> INFO: Test took 1184ms.
[18:27:22.054] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:22.361] <TB0> INFO: Expecting 2560 events.
[18:27:23.239] <TB0> INFO: 2560 events read in total (286ms).
[18:27:23.239] <TB0> INFO: Test took 1185ms.
[18:27:23.241] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:23.548] <TB0> INFO: Expecting 2560 events.
[18:27:24.426] <TB0> INFO: 2560 events read in total (287ms).
[18:27:24.426] <TB0> INFO: Test took 1185ms.
[18:27:24.427] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:24.734] <TB0> INFO: Expecting 2560 events.
[18:27:25.616] <TB0> INFO: 2560 events read in total (290ms).
[18:27:25.616] <TB0> INFO: Test took 1189ms.
[18:27:25.617] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:25.924] <TB0> INFO: Expecting 2560 events.
[18:27:26.802] <TB0> INFO: 2560 events read in total (286ms).
[18:27:26.802] <TB0> INFO: Test took 1185ms.
[18:27:26.804] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:27.110] <TB0> INFO: Expecting 2560 events.
[18:27:27.990] <TB0> INFO: 2560 events read in total (288ms).
[18:27:27.991] <TB0> INFO: Test took 1187ms.
[18:27:27.993] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:28.299] <TB0> INFO: Expecting 2560 events.
[18:27:29.179] <TB0> INFO: 2560 events read in total (288ms).
[18:27:29.179] <TB0> INFO: Test took 1186ms.
[18:27:29.181] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:29.487] <TB0> INFO: Expecting 2560 events.
[18:27:30.368] <TB0> INFO: 2560 events read in total (289ms).
[18:27:30.368] <TB0> INFO: Test took 1187ms.
[18:27:30.370] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:30.677] <TB0> INFO: Expecting 2560 events.
[18:27:31.556] <TB0> INFO: 2560 events read in total (287ms).
[18:27:31.557] <TB0> INFO: Test took 1187ms.
[18:27:31.559] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:31.865] <TB0> INFO: Expecting 2560 events.
[18:27:32.745] <TB0> INFO: 2560 events read in total (288ms).
[18:27:32.746] <TB0> INFO: Test took 1188ms.
[18:27:32.747] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:33.054] <TB0> INFO: Expecting 2560 events.
[18:27:33.935] <TB0> INFO: 2560 events read in total (289ms).
[18:27:33.935] <TB0> INFO: Test took 1188ms.
[18:27:33.937] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:34.244] <TB0> INFO: Expecting 2560 events.
[18:27:35.123] <TB0> INFO: 2560 events read in total (288ms).
[18:27:35.123] <TB0> INFO: Test took 1186ms.
[18:27:35.125] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:35.432] <TB0> INFO: Expecting 2560 events.
[18:27:36.311] <TB0> INFO: 2560 events read in total (288ms).
[18:27:36.311] <TB0> INFO: Test took 1187ms.
[18:27:36.313] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:36.620] <TB0> INFO: Expecting 2560 events.
[18:27:37.497] <TB0> INFO: 2560 events read in total (286ms).
[18:27:37.498] <TB0> INFO: Test took 1185ms.
[18:27:37.500] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:37.806] <TB0> INFO: Expecting 2560 events.
[18:27:38.688] <TB0> INFO: 2560 events read in total (290ms).
[18:27:38.688] <TB0> INFO: Test took 1190ms.
[18:27:38.690] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:38.997] <TB0> INFO: Expecting 2560 events.
[18:27:39.882] <TB0> INFO: 2560 events read in total (294ms).
[18:27:39.882] <TB0> INFO: Test took 1192ms.
[18:27:39.884] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:40.190] <TB0> INFO: Expecting 2560 events.
[18:27:41.073] <TB0> INFO: 2560 events read in total (291ms).
[18:27:41.073] <TB0> INFO: Test took 1190ms.
[18:27:41.075] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:41.382] <TB0> INFO: Expecting 2560 events.
[18:27:42.266] <TB0> INFO: 2560 events read in total (293ms).
[18:27:42.267] <TB0> INFO: Test took 1192ms.
[18:27:42.269] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:42.575] <TB0> INFO: Expecting 2560 events.
[18:27:43.458] <TB0> INFO: 2560 events read in total (291ms).
[18:27:43.458] <TB0> INFO: Test took 1189ms.
[18:27:43.460] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:43.767] <TB0> INFO: Expecting 2560 events.
[18:27:44.650] <TB0> INFO: 2560 events read in total (292ms).
[18:27:44.650] <TB0> INFO: Test took 1190ms.
[18:27:44.652] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:44.959] <TB0> INFO: Expecting 2560 events.
[18:27:45.842] <TB0> INFO: 2560 events read in total (292ms).
[18:27:45.843] <TB0> INFO: Test took 1191ms.
[18:27:45.845] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:27:46.151] <TB0> INFO: Expecting 2560 events.
[18:27:47.035] <TB0> INFO: 2560 events read in total (292ms).
[18:27:47.035] <TB0> INFO: Test took 1191ms.
[18:27:47.501] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 631 seconds
[18:27:47.501] <TB0> INFO: PH scale (per ROC): 43 57 40 28 37 34 37 34 33 42 47 35 46 45 38 42
[18:27:47.501] <TB0> INFO: PH offset (per ROC): 96 126 94 103 107 89 97 114 110 110 121 96 116 86 100 105
[18:27:47.506] <TB0> INFO: Decoding statistics:
[18:27:47.506] <TB0> INFO: General information:
[18:27:47.506] <TB0> INFO: 16bit words read: 127864
[18:27:47.506] <TB0> INFO: valid events total: 20480
[18:27:47.506] <TB0> INFO: empty events: 17988
[18:27:47.506] <TB0> INFO: valid events with pixels: 2492
[18:27:47.506] <TB0> INFO: valid pixel hits: 2492
[18:27:47.506] <TB0> INFO: Event errors: 0
[18:27:47.506] <TB0> INFO: start marker: 0
[18:27:47.506] <TB0> INFO: stop marker: 0
[18:27:47.506] <TB0> INFO: overflow: 0
[18:27:47.506] <TB0> INFO: invalid 5bit words: 0
[18:27:47.506] <TB0> INFO: invalid XOR eye diagram: 0
[18:27:47.506] <TB0> INFO: frame (failed synchr.): 0
[18:27:47.506] <TB0> INFO: idle data (no TBM trl): 0
[18:27:47.506] <TB0> INFO: no data (only TBM hdr): 0
[18:27:47.506] <TB0> INFO: TBM errors: 0
[18:27:47.506] <TB0> INFO: flawed TBM headers: 0
[18:27:47.506] <TB0> INFO: flawed TBM trailers: 0
[18:27:47.506] <TB0> INFO: event ID mismatches: 0
[18:27:47.506] <TB0> INFO: ROC errors: 0
[18:27:47.506] <TB0> INFO: missing ROC header(s): 0
[18:27:47.506] <TB0> INFO: misplaced readback start: 0
[18:27:47.506] <TB0> INFO: Pixel decoding errors: 0
[18:27:47.506] <TB0> INFO: pixel data incomplete: 0
[18:27:47.506] <TB0> INFO: pixel address: 0
[18:27:47.506] <TB0> INFO: pulse height fill bit: 0
[18:27:47.506] <TB0> INFO: buffer corruption: 0
[18:27:47.778] <TB0> INFO: ######################################################################
[18:27:47.778] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[18:27:47.778] <TB0> INFO: ######################################################################
[18:27:47.789] <TB0> INFO: scanning low vcal = 10
[18:27:48.021] <TB0> INFO: Expecting 41600 events.
[18:27:51.570] <TB0> INFO: 41600 events read in total (2958ms).
[18:27:51.571] <TB0> INFO: Test took 3782ms.
[18:27:51.572] <TB0> INFO: scanning low vcal = 20
[18:27:51.871] <TB0> INFO: Expecting 41600 events.
[18:27:55.439] <TB0> INFO: 41600 events read in total (2977ms).
[18:27:55.439] <TB0> INFO: Test took 3866ms.
[18:27:55.440] <TB0> INFO: scanning low vcal = 30
[18:27:55.740] <TB0> INFO: Expecting 41600 events.
[18:27:59.379] <TB0> INFO: 41600 events read in total (3048ms).
[18:27:59.380] <TB0> INFO: Test took 3939ms.
[18:27:59.382] <TB0> INFO: scanning low vcal = 40
[18:27:59.663] <TB0> INFO: Expecting 41600 events.
[18:28:03.594] <TB0> INFO: 41600 events read in total (3340ms).
[18:28:03.595] <TB0> INFO: Test took 4213ms.
[18:28:03.598] <TB0> INFO: scanning low vcal = 50
[18:28:03.875] <TB0> INFO: Expecting 41600 events.
[18:28:07.812] <TB0> INFO: 41600 events read in total (3346ms).
[18:28:07.812] <TB0> INFO: Test took 4214ms.
[18:28:07.815] <TB0> INFO: scanning low vcal = 60
[18:28:08.092] <TB0> INFO: Expecting 41600 events.
[18:28:12.057] <TB0> INFO: 41600 events read in total (3374ms).
[18:28:12.058] <TB0> INFO: Test took 4243ms.
[18:28:12.060] <TB0> INFO: scanning low vcal = 70
[18:28:12.337] <TB0> INFO: Expecting 41600 events.
[18:28:16.256] <TB0> INFO: 41600 events read in total (3328ms).
[18:28:16.257] <TB0> INFO: Test took 4196ms.
[18:28:16.259] <TB0> INFO: scanning low vcal = 80
[18:28:16.536] <TB0> INFO: Expecting 41600 events.
[18:28:20.450] <TB0> INFO: 41600 events read in total (3323ms).
[18:28:20.451] <TB0> INFO: Test took 4192ms.
[18:28:20.453] <TB0> INFO: scanning low vcal = 90
[18:28:20.730] <TB0> INFO: Expecting 41600 events.
[18:28:24.687] <TB0> INFO: 41600 events read in total (3365ms).
[18:28:24.687] <TB0> INFO: Test took 4233ms.
[18:28:24.690] <TB0> INFO: scanning low vcal = 100
[18:28:24.967] <TB0> INFO: Expecting 41600 events.
[18:28:28.917] <TB0> INFO: 41600 events read in total (3359ms).
[18:28:28.918] <TB0> INFO: Test took 4228ms.
[18:28:28.920] <TB0> INFO: scanning low vcal = 110
[18:28:29.197] <TB0> INFO: Expecting 41600 events.
[18:28:33.136] <TB0> INFO: 41600 events read in total (3347ms).
[18:28:33.137] <TB0> INFO: Test took 4217ms.
[18:28:33.140] <TB0> INFO: scanning low vcal = 120
[18:28:33.416] <TB0> INFO: Expecting 41600 events.
[18:28:37.343] <TB0> INFO: 41600 events read in total (3335ms).
[18:28:37.343] <TB0> INFO: Test took 4203ms.
[18:28:37.346] <TB0> INFO: scanning low vcal = 130
[18:28:37.623] <TB0> INFO: Expecting 41600 events.
[18:28:41.558] <TB0> INFO: 41600 events read in total (3344ms).
[18:28:41.559] <TB0> INFO: Test took 4213ms.
[18:28:41.562] <TB0> INFO: scanning low vcal = 140
[18:28:41.838] <TB0> INFO: Expecting 41600 events.
[18:28:45.795] <TB0> INFO: 41600 events read in total (3365ms).
[18:28:45.795] <TB0> INFO: Test took 4233ms.
[18:28:45.798] <TB0> INFO: scanning low vcal = 150
[18:28:46.075] <TB0> INFO: Expecting 41600 events.
[18:28:50.003] <TB0> INFO: 41600 events read in total (3337ms).
[18:28:50.004] <TB0> INFO: Test took 4206ms.
[18:28:50.006] <TB0> INFO: scanning low vcal = 160
[18:28:50.283] <TB0> INFO: Expecting 41600 events.
[18:28:54.213] <TB0> INFO: 41600 events read in total (3339ms).
[18:28:54.214] <TB0> INFO: Test took 4207ms.
[18:28:54.217] <TB0> INFO: scanning low vcal = 170
[18:28:54.493] <TB0> INFO: Expecting 41600 events.
[18:28:58.434] <TB0> INFO: 41600 events read in total (3349ms).
[18:28:58.434] <TB0> INFO: Test took 4217ms.
[18:28:58.437] <TB0> INFO: scanning low vcal = 180
[18:28:58.714] <TB0> INFO: Expecting 41600 events.
[18:29:02.627] <TB0> INFO: 41600 events read in total (3322ms).
[18:29:02.628] <TB0> INFO: Test took 4191ms.
[18:29:02.630] <TB0> INFO: scanning low vcal = 190
[18:29:02.907] <TB0> INFO: Expecting 41600 events.
[18:29:06.825] <TB0> INFO: 41600 events read in total (3327ms).
[18:29:06.826] <TB0> INFO: Test took 4196ms.
[18:29:06.829] <TB0> INFO: scanning low vcal = 200
[18:29:07.105] <TB0> INFO: Expecting 41600 events.
[18:29:11.056] <TB0> INFO: 41600 events read in total (3359ms).
[18:29:11.057] <TB0> INFO: Test took 4228ms.
[18:29:11.059] <TB0> INFO: scanning low vcal = 210
[18:29:11.336] <TB0> INFO: Expecting 41600 events.
[18:29:15.248] <TB0> INFO: 41600 events read in total (3321ms).
[18:29:15.248] <TB0> INFO: Test took 4189ms.
[18:29:15.251] <TB0> INFO: scanning low vcal = 220
[18:29:15.528] <TB0> INFO: Expecting 41600 events.
[18:29:19.468] <TB0> INFO: 41600 events read in total (3349ms).
[18:29:19.468] <TB0> INFO: Test took 4217ms.
[18:29:19.471] <TB0> INFO: scanning low vcal = 230
[18:29:19.748] <TB0> INFO: Expecting 41600 events.
[18:29:23.697] <TB0> INFO: 41600 events read in total (3358ms).
[18:29:23.697] <TB0> INFO: Test took 4226ms.
[18:29:23.700] <TB0> INFO: scanning low vcal = 240
[18:29:23.977] <TB0> INFO: Expecting 41600 events.
[18:29:27.933] <TB0> INFO: 41600 events read in total (3366ms).
[18:29:27.934] <TB0> INFO: Test took 4234ms.
[18:29:27.937] <TB0> INFO: scanning low vcal = 250
[18:29:28.214] <TB0> INFO: Expecting 41600 events.
[18:29:32.139] <TB0> INFO: 41600 events read in total (3334ms).
[18:29:32.140] <TB0> INFO: Test took 4203ms.
[18:29:32.143] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[18:29:32.419] <TB0> INFO: Expecting 41600 events.
[18:29:36.373] <TB0> INFO: 41600 events read in total (3362ms).
[18:29:36.374] <TB0> INFO: Test took 4230ms.
[18:29:36.377] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[18:29:36.654] <TB0> INFO: Expecting 41600 events.
[18:29:40.625] <TB0> INFO: 41600 events read in total (3380ms).
[18:29:40.625] <TB0> INFO: Test took 4248ms.
[18:29:40.628] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[18:29:40.905] <TB0> INFO: Expecting 41600 events.
[18:29:44.856] <TB0> INFO: 41600 events read in total (3360ms).
[18:29:44.857] <TB0> INFO: Test took 4228ms.
[18:29:44.859] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[18:29:45.136] <TB0> INFO: Expecting 41600 events.
[18:29:49.070] <TB0> INFO: 41600 events read in total (3343ms).
[18:29:49.071] <TB0> INFO: Test took 4212ms.
[18:29:49.074] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[18:29:49.351] <TB0> INFO: Expecting 41600 events.
[18:29:53.294] <TB0> INFO: 41600 events read in total (3353ms).
[18:29:53.295] <TB0> INFO: Test took 4221ms.
[18:29:53.779] <TB0> INFO: PixTestGainPedestal::measure() done
[18:30:30.274] <TB0> INFO: PixTestGainPedestal::fit() done
[18:30:30.274] <TB0> INFO: non-linearity mean: 0.921 0.984 0.942 0.966 0.922 0.902 0.923 0.949 0.951 0.938 0.983 0.952 0.976 0.975 0.941 0.938
[18:30:30.274] <TB0> INFO: non-linearity RMS: 0.108 0.003 0.083 0.199 0.099 0.163 0.141 0.095 0.034 0.075 0.004 0.188 0.007 0.007 0.136 0.089
[18:30:30.274] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//phCalibrationFitErr35_C0.dat
[18:30:30.296] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//phCalibrationFitErr35_C1.dat
[18:30:30.318] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//phCalibrationFitErr35_C2.dat
[18:30:30.340] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//phCalibrationFitErr35_C3.dat
[18:30:30.362] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//phCalibrationFitErr35_C4.dat
[18:30:30.384] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//phCalibrationFitErr35_C5.dat
[18:30:30.406] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//phCalibrationFitErr35_C6.dat
[18:30:30.427] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//phCalibrationFitErr35_C7.dat
[18:30:30.447] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//phCalibrationFitErr35_C8.dat
[18:30:30.466] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//phCalibrationFitErr35_C9.dat
[18:30:30.488] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//phCalibrationFitErr35_C10.dat
[18:30:30.510] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//phCalibrationFitErr35_C11.dat
[18:30:30.534] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//phCalibrationFitErr35_C12.dat
[18:30:30.556] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//phCalibrationFitErr35_C13.dat
[18:30:30.579] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//phCalibrationFitErr35_C14.dat
[18:30:30.602] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//phCalibrationFitErr35_C15.dat
[18:30:30.624] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 162 seconds
[18:30:30.624] <TB0> INFO: Decoding statistics:
[18:30:30.624] <TB0> INFO: General information:
[18:30:30.624] <TB0> INFO: 16bit words read: 3306922
[18:30:30.624] <TB0> INFO: valid events total: 332800
[18:30:30.625] <TB0> INFO: empty events: 972
[18:30:30.625] <TB0> INFO: valid events with pixels: 331828
[18:30:30.625] <TB0> INFO: valid pixel hits: 655061
[18:30:30.625] <TB0> INFO: Event errors: 0
[18:30:30.625] <TB0> INFO: start marker: 0
[18:30:30.625] <TB0> INFO: stop marker: 0
[18:30:30.625] <TB0> INFO: overflow: 0
[18:30:30.625] <TB0> INFO: invalid 5bit words: 0
[18:30:30.625] <TB0> INFO: invalid XOR eye diagram: 0
[18:30:30.625] <TB0> INFO: frame (failed synchr.): 0
[18:30:30.625] <TB0> INFO: idle data (no TBM trl): 0
[18:30:30.625] <TB0> INFO: no data (only TBM hdr): 0
[18:30:30.625] <TB0> INFO: TBM errors: 0
[18:30:30.625] <TB0> INFO: flawed TBM headers: 0
[18:30:30.625] <TB0> INFO: flawed TBM trailers: 0
[18:30:30.625] <TB0> INFO: event ID mismatches: 0
[18:30:30.625] <TB0> INFO: ROC errors: 0
[18:30:30.625] <TB0> INFO: missing ROC header(s): 0
[18:30:30.625] <TB0> INFO: misplaced readback start: 0
[18:30:30.625] <TB0> INFO: Pixel decoding errors: 0
[18:30:30.625] <TB0> INFO: pixel data incomplete: 0
[18:30:30.625] <TB0> INFO: pixel address: 0
[18:30:30.625] <TB0> INFO: pulse height fill bit: 0
[18:30:30.625] <TB0> INFO: buffer corruption: 0
[18:30:30.646] <TB0> INFO: Decoding statistics:
[18:30:30.646] <TB0> INFO: General information:
[18:30:30.646] <TB0> INFO: 16bit words read: 3436322
[18:30:30.646] <TB0> INFO: valid events total: 353536
[18:30:30.646] <TB0> INFO: empty events: 19216
[18:30:30.646] <TB0> INFO: valid events with pixels: 334320
[18:30:30.646] <TB0> INFO: valid pixel hits: 657553
[18:30:30.646] <TB0> INFO: Event errors: 0
[18:30:30.646] <TB0> INFO: start marker: 0
[18:30:30.646] <TB0> INFO: stop marker: 0
[18:30:30.646] <TB0> INFO: overflow: 0
[18:30:30.646] <TB0> INFO: invalid 5bit words: 0
[18:30:30.646] <TB0> INFO: invalid XOR eye diagram: 0
[18:30:30.646] <TB0> INFO: frame (failed synchr.): 0
[18:30:30.646] <TB0> INFO: idle data (no TBM trl): 0
[18:30:30.647] <TB0> INFO: no data (only TBM hdr): 0
[18:30:30.647] <TB0> INFO: TBM errors: 0
[18:30:30.647] <TB0> INFO: flawed TBM headers: 0
[18:30:30.647] <TB0> INFO: flawed TBM trailers: 0
[18:30:30.647] <TB0> INFO: event ID mismatches: 0
[18:30:30.647] <TB0> INFO: ROC errors: 0
[18:30:30.647] <TB0> INFO: missing ROC header(s): 0
[18:30:30.647] <TB0> INFO: misplaced readback start: 0
[18:30:30.647] <TB0> INFO: Pixel decoding errors: 0
[18:30:30.647] <TB0> INFO: pixel data incomplete: 0
[18:30:30.647] <TB0> INFO: pixel address: 0
[18:30:30.647] <TB0> INFO: pulse height fill bit: 0
[18:30:30.647] <TB0> INFO: buffer corruption: 0
[18:30:30.647] <TB0> INFO: enter test to run
[18:30:30.647] <TB0> INFO: test: Trim80 no parameter change
[18:30:30.647] <TB0> INFO: running: trim80
[18:30:30.668] <TB0> INFO: ######################################################################
[18:30:30.668] <TB0> INFO: PixTestTrim80::doTest()
[18:30:30.669] <TB0> INFO: ######################################################################
[18:30:30.670] <TB0> INFO: ----------------------------------------------------------------------
[18:30:30.670] <TB0> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[18:30:30.670] <TB0> INFO: ----------------------------------------------------------------------
[18:30:30.736] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[18:30:30.736] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[18:30:30.748] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:30:30.748] <TB0> INFO: run 1 of 1
[18:30:30.986] <TB0> INFO: Expecting 5025280 events.
[18:30:58.527] <TB0> INFO: 685672 events read in total (26950ms).
[18:31:25.394] <TB0> INFO: 1366928 events read in total (53817ms).
[18:31:52.419] <TB0> INFO: 2044936 events read in total (80842ms).
[18:32:19.603] <TB0> INFO: 2722736 events read in total (108026ms).
[18:32:47.089] <TB0> INFO: 3401240 events read in total (135512ms).
[18:33:14.791] <TB0> INFO: 4076896 events read in total (163214ms).
[18:33:42.081] <TB0> INFO: 4752120 events read in total (190504ms).
[18:33:53.077] <TB0> INFO: 5025280 events read in total (201500ms).
[18:33:53.197] <TB0> INFO: Test took 202449ms.
[18:34:16.569] <TB0> INFO: ROC 0 VthrComp = 68
[18:34:16.570] <TB0> INFO: ROC 1 VthrComp = 59
[18:34:16.570] <TB0> INFO: ROC 2 VthrComp = 76
[18:34:16.570] <TB0> INFO: ROC 3 VthrComp = 87
[18:34:16.570] <TB0> INFO: ROC 4 VthrComp = 63
[18:34:16.570] <TB0> INFO: ROC 5 VthrComp = 67
[18:34:16.570] <TB0> INFO: ROC 6 VthrComp = 72
[18:34:16.570] <TB0> INFO: ROC 7 VthrComp = 73
[18:34:16.570] <TB0> INFO: ROC 8 VthrComp = 73
[18:34:16.570] <TB0> INFO: ROC 9 VthrComp = 74
[18:34:16.570] <TB0> INFO: ROC 10 VthrComp = 73
[18:34:16.570] <TB0> INFO: ROC 11 VthrComp = 69
[18:34:16.570] <TB0> INFO: ROC 12 VthrComp = 71
[18:34:16.571] <TB0> INFO: ROC 13 VthrComp = 70
[18:34:16.571] <TB0> INFO: ROC 14 VthrComp = 75
[18:34:16.571] <TB0> INFO: ROC 15 VthrComp = 75
[18:34:16.842] <TB0> INFO: Expecting 41600 events.
[18:34:20.265] <TB0> INFO: 41600 events read in total (2833ms).
[18:34:20.266] <TB0> INFO: Test took 3693ms.
[18:34:20.275] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[18:34:20.275] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[18:34:20.284] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:34:20.284] <TB0> INFO: run 1 of 1
[18:34:20.562] <TB0> INFO: Expecting 5025280 events.
[18:34:48.390] <TB0> INFO: 685912 events read in total (27236ms).
[18:35:15.484] <TB0> INFO: 1367264 events read in total (54330ms).
[18:35:42.030] <TB0> INFO: 2046168 events read in total (80876ms).
[18:36:08.785] <TB0> INFO: 2722144 events read in total (107631ms).
[18:36:35.505] <TB0> INFO: 3393856 events read in total (134351ms).
[18:37:02.394] <TB0> INFO: 4064072 events read in total (161240ms).
[18:37:29.658] <TB0> INFO: 4734384 events read in total (188504ms).
[18:37:41.229] <TB0> INFO: 5025280 events read in total (200075ms).
[18:37:41.305] <TB0> INFO: Test took 201020ms.
[18:38:06.168] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 105.403 for pixel 0/55 mean/min/max = 89.4386/73.468/105.409
[18:38:06.169] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 107.091 for pixel 0/23 mean/min/max = 91.948/76.3835/107.513
[18:38:06.169] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 111.183 for pixel 4/75 mean/min/max = 94.4134/77.6176/111.209
[18:38:06.169] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 108.583 for pixel 0/75 mean/min/max = 91.1635/73.6049/108.722
[18:38:06.170] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 104.563 for pixel 51/22 mean/min/max = 90.0331/75.3909/104.675
[18:38:06.170] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 106.356 for pixel 0/57 mean/min/max = 90.5964/74.4747/106.718
[18:38:06.171] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 108.407 for pixel 0/60 mean/min/max = 92.5234/76.3261/108.721
[18:38:06.171] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 109.573 for pixel 51/71 mean/min/max = 93.41/76.9853/109.835
[18:38:06.172] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 112.535 for pixel 51/1 mean/min/max = 95.3616/78.1607/112.563
[18:38:06.172] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 109.793 for pixel 0/79 mean/min/max = 93.3893/76.9042/109.874
[18:38:06.172] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 108.357 for pixel 2/16 mean/min/max = 92.8056/77.2083/108.403
[18:38:06.173] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 106.307 for pixel 0/3 mean/min/max = 90.32/74.3207/106.319
[18:38:06.173] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 105.744 for pixel 1/3 mean/min/max = 89.8093/73.8645/105.754
[18:38:06.174] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 108.555 for pixel 17/75 mean/min/max = 90.5471/72.4862/108.608
[18:38:06.174] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 107.128 for pixel 17/0 mean/min/max = 92.2709/77.3611/107.181
[18:38:06.174] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 111 for pixel 2/7 mean/min/max = 94.4078/77.7652/111.05
[18:38:06.175] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:38:06.264] <TB0> INFO: Expecting 411648 events.
[18:38:15.823] <TB0> INFO: 411648 events read in total (8968ms).
[18:38:15.830] <TB0> INFO: Expecting 411648 events.
[18:38:25.342] <TB0> INFO: 411648 events read in total (9109ms).
[18:38:25.355] <TB0> INFO: Expecting 411648 events.
[18:38:34.520] <TB0> INFO: 411648 events read in total (8763ms).
[18:38:34.536] <TB0> INFO: Expecting 411648 events.
[18:38:43.739] <TB0> INFO: 411648 events read in total (8800ms).
[18:38:43.753] <TB0> INFO: Expecting 411648 events.
[18:38:52.966] <TB0> INFO: 411648 events read in total (8810ms).
[18:38:52.985] <TB0> INFO: Expecting 411648 events.
[18:39:02.130] <TB0> INFO: 411648 events read in total (8742ms).
[18:39:02.151] <TB0> INFO: Expecting 411648 events.
[18:39:11.296] <TB0> INFO: 411648 events read in total (8742ms).
[18:39:11.318] <TB0> INFO: Expecting 411648 events.
[18:39:20.485] <TB0> INFO: 411648 events read in total (8764ms).
[18:39:20.510] <TB0> INFO: Expecting 411648 events.
[18:39:29.655] <TB0> INFO: 411648 events read in total (8742ms).
[18:39:29.706] <TB0> INFO: Expecting 411648 events.
[18:39:38.910] <TB0> INFO: 411648 events read in total (8801ms).
[18:39:38.969] <TB0> INFO: Expecting 411648 events.
[18:39:48.200] <TB0> INFO: 411648 events read in total (8828ms).
[18:39:48.254] <TB0> INFO: Expecting 411648 events.
[18:39:57.416] <TB0> INFO: 411648 events read in total (8759ms).
[18:39:57.480] <TB0> INFO: Expecting 411648 events.
[18:40:06.639] <TB0> INFO: 411648 events read in total (8756ms).
[18:40:06.706] <TB0> INFO: Expecting 411648 events.
[18:40:15.833] <TB0> INFO: 411648 events read in total (8724ms).
[18:40:15.925] <TB0> INFO: Expecting 411648 events.
[18:40:25.152] <TB0> INFO: 411648 events read in total (8824ms).
[18:40:25.255] <TB0> INFO: Expecting 411648 events.
[18:40:34.434] <TB0> INFO: 411648 events read in total (8776ms).
[18:40:34.545] <TB0> INFO: Test took 148370ms.
[18:40:36.263] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[18:40:36.272] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:40:36.272] <TB0> INFO: run 1 of 1
[18:40:36.504] <TB0> INFO: Expecting 5025280 events.
[18:41:04.205] <TB0> INFO: 668688 events read in total (27110ms).
[18:41:30.709] <TB0> INFO: 1334504 events read in total (53614ms).
[18:41:57.351] <TB0> INFO: 1999352 events read in total (80256ms).
[18:42:24.028] <TB0> INFO: 2661864 events read in total (106933ms).
[18:42:50.585] <TB0> INFO: 3320328 events read in total (133490ms).
[18:43:17.158] <TB0> INFO: 3977368 events read in total (160063ms).
[18:43:43.966] <TB0> INFO: 4633544 events read in total (186871ms).
[18:44:00.208] <TB0> INFO: 5025280 events read in total (203113ms).
[18:44:00.292] <TB0> INFO: Test took 204020ms.
[18:44:23.626] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 52.852565 .. 124.088526
[18:44:23.862] <TB0> INFO: Expecting 208000 events.
[18:44:33.832] <TB0> INFO: 208000 events read in total (9378ms).
[18:44:33.833] <TB0> INFO: Test took 10207ms.
[18:44:33.896] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 42 .. 134 (-1/-1) hits flags = 528 (plus default)
[18:44:33.908] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:44:33.908] <TB0> INFO: run 1 of 1
[18:44:34.188] <TB0> INFO: Expecting 3095040 events.
[18:45:01.149] <TB0> INFO: 642440 events read in total (26370ms).
[18:45:27.737] <TB0> INFO: 1284064 events read in total (52958ms).
[18:45:53.843] <TB0> INFO: 1922280 events read in total (79064ms).
[18:46:20.664] <TB0> INFO: 2556104 events read in total (105885ms).
[18:46:43.393] <TB0> INFO: 3095040 events read in total (128614ms).
[18:46:43.437] <TB0> INFO: Test took 129529ms.
[18:47:05.952] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 61.314418 .. 107.743155
[18:47:06.194] <TB0> INFO: Expecting 208000 events.
[18:47:15.983] <TB0> INFO: 208000 events read in total (9197ms).
[18:47:15.983] <TB0> INFO: Test took 10030ms.
[18:47:16.034] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 51 .. 117 (-1/-1) hits flags = 528 (plus default)
[18:47:16.044] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:47:16.044] <TB0> INFO: run 1 of 1
[18:47:16.322] <TB0> INFO: Expecting 2229760 events.
[18:47:43.502] <TB0> INFO: 647968 events read in total (26588ms).
[18:48:09.818] <TB0> INFO: 1296016 events read in total (52905ms).
[18:48:36.787] <TB0> INFO: 1942888 events read in total (79873ms).
[18:48:48.920] <TB0> INFO: 2229760 events read in total (92006ms).
[18:48:48.953] <TB0> INFO: Test took 92908ms.
[18:49:09.560] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 67.200351 .. 100.221572
[18:49:09.814] <TB0> INFO: Expecting 208000 events.
[18:49:19.629] <TB0> INFO: 208000 events read in total (9224ms).
[18:49:19.629] <TB0> INFO: Test took 10068ms.
[18:49:19.693] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 57 .. 110 (-1/-1) hits flags = 528 (plus default)
[18:49:19.705] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:49:19.705] <TB0> INFO: run 1 of 1
[18:49:19.983] <TB0> INFO: Expecting 1797120 events.
[18:49:47.394] <TB0> INFO: 646912 events read in total (26820ms).
[18:50:14.035] <TB0> INFO: 1293608 events read in total (53462ms).
[18:50:34.955] <TB0> INFO: 1797120 events read in total (74381ms).
[18:50:34.995] <TB0> INFO: Test took 75289ms.
[18:50:57.238] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 67.412017 .. 91.805818
[18:50:57.479] <TB0> INFO: Expecting 208000 events.
[18:51:07.043] <TB0> INFO: 208000 events read in total (8972ms).
[18:51:07.043] <TB0> INFO: Test took 9803ms.
[18:51:07.092] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 57 .. 101 (-1/-1) hits flags = 528 (plus default)
[18:51:07.102] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:51:07.102] <TB0> INFO: run 1 of 1
[18:51:07.380] <TB0> INFO: Expecting 1497600 events.
[18:51:35.193] <TB0> INFO: 677832 events read in total (27222ms).
[18:52:03.295] <TB0> INFO: 1355040 events read in total (55324ms).
[18:52:09.593] <TB0> INFO: 1497600 events read in total (61623ms).
[18:52:09.615] <TB0> INFO: Test took 62514ms.
[18:52:27.774] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[18:52:27.774] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[18:52:27.784] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:52:27.785] <TB0> INFO: run 1 of 1
[18:52:28.041] <TB0> INFO: Expecting 1364480 events.
[18:52:56.196] <TB0> INFO: 668848 events read in total (27563ms).
[18:53:23.525] <TB0> INFO: 1337096 events read in total (54892ms).
[18:53:25.154] <TB0> INFO: 1364480 events read in total (56521ms).
[18:53:25.175] <TB0> INFO: Test took 57390ms.
[18:53:42.819] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters80_C0.dat
[18:53:42.819] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters80_C1.dat
[18:53:42.819] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters80_C2.dat
[18:53:42.819] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters80_C3.dat
[18:53:42.820] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters80_C4.dat
[18:53:42.820] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters80_C5.dat
[18:53:42.820] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters80_C6.dat
[18:53:42.820] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters80_C7.dat
[18:53:42.820] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters80_C8.dat
[18:53:42.820] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters80_C9.dat
[18:53:42.820] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters80_C10.dat
[18:53:42.820] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters80_C11.dat
[18:53:42.820] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters80_C12.dat
[18:53:42.821] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters80_C13.dat
[18:53:42.821] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters80_C14.dat
[18:53:42.821] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//dacParameters80_C15.dat
[18:53:42.821] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters80_C0.dat
[18:53:42.827] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters80_C1.dat
[18:53:42.832] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters80_C2.dat
[18:53:42.838] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters80_C3.dat
[18:53:42.844] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters80_C4.dat
[18:53:42.849] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters80_C5.dat
[18:53:42.856] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters80_C6.dat
[18:53:42.861] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters80_C7.dat
[18:53:42.867] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters80_C8.dat
[18:53:42.872] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters80_C9.dat
[18:53:42.878] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters80_C10.dat
[18:53:42.883] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters80_C11.dat
[18:53:42.889] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters80_C12.dat
[18:53:42.895] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters80_C13.dat
[18:53:42.901] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters80_C14.dat
[18:53:42.906] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_14h28m_1478179737//003_FulltestTrim80_p17//trimParameters80_C15.dat
[18:53:42.912] <TB0> INFO: PixTestTrim80::trimTest() done
[18:53:42.912] <TB0> INFO: vtrim: 85 97 103 102 90 88 100 95 117 95 97 92 93 94 102 118
[18:53:42.912] <TB0> INFO: vthrcomp: 68 59 76 87 63 67 72 73 73 74 73 69 71 70 75 75
[18:53:42.912] <TB0> INFO: vcal mean: 79.97 80.03 80.01 79.98 79.98 79.98 80.08 80.05 79.99 79.99 80.00 79.95 79.97 79.97 80.07 79.92
[18:53:42.912] <TB0> INFO: vcal RMS: 0.74 0.76 0.72 0.77 0.71 0.68 0.69 0.74 0.76 0.73 0.70 0.75 1.42 0.81 0.75 0.75
[18:53:42.912] <TB0> INFO: bits mean: 10.57 10.28 9.53 10.26 10.71 10.05 9.58 9.82 9.66 9.49 9.77 10.55 10.72 10.52 10.06 9.90
[18:53:42.912] <TB0> INFO: bits RMS: 2.43 2.11 2.18 2.49 2.11 2.50 2.38 2.16 2.05 2.34 2.21 2.29 2.29 2.46 2.03 2.04
[18:53:42.918] <TB0> INFO: ----------------------------------------------------------------------
[18:53:42.918] <TB0> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[18:53:42.918] <TB0> INFO: ----------------------------------------------------------------------
[18:53:42.920] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[18:53:42.929] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[18:53:42.929] <TB0> INFO: run 1 of 1
[18:53:43.163] <TB0> INFO: Expecting 4160000 events.
[18:54:15.093] <TB0> INFO: 743880 events read in total (31339ms).
[18:54:46.480] <TB0> INFO: 1480055 events read in total (62726ms).
[18:55:17.485] <TB0> INFO: 2210840 events read in total (93731ms).
[18:55:48.324] <TB0> INFO: 2936885 events read in total (124570ms).
[18:56:19.338] <TB0> INFO: 3661885 events read in total (155584ms).
[18:56:40.502] <TB0> INFO: 4160000 events read in total (176748ms).
[18:56:40.624] <TB0> INFO: Test took 177695ms.
[18:57:06.960] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 208 (-1/-1) hits flags = 528 (plus default)
[18:57:06.971] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[18:57:06.971] <TB0> INFO: run 1 of 1
[18:57:07.223] <TB0> INFO: Expecting 4347200 events.
[18:57:37.948] <TB0> INFO: 710270 events read in total (30134ms).
[18:58:07.576] <TB0> INFO: 1413760 events read in total (59762ms).
[18:58:37.479] <TB0> INFO: 2113660 events read in total (89665ms).
[18:59:07.552] <TB0> INFO: 2808435 events read in total (119738ms).
[18:59:37.474] <TB0> INFO: 3502585 events read in total (149660ms).
[19:00:07.595] <TB0> INFO: 4196580 events read in total (179781ms).
[19:00:14.580] <TB0> INFO: 4347200 events read in total (186766ms).
[19:00:14.683] <TB0> INFO: Test took 187712ms.
[19:00:41.872] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 228 (-1/-1) hits flags = 528 (plus default)
[19:00:41.882] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[19:00:41.882] <TB0> INFO: run 1 of 1
[19:00:42.114] <TB0> INFO: Expecting 4763200 events.
[19:01:12.699] <TB0> INFO: 690755 events read in total (29993ms).
[19:01:42.474] <TB0> INFO: 1375985 events read in total (59768ms).
[19:02:12.251] <TB0> INFO: 2057835 events read in total (89545ms).
[19:02:42.054] <TB0> INFO: 2736420 events read in total (119348ms).
[19:03:11.377] <TB0> INFO: 3413170 events read in total (148671ms).
[19:03:40.913] <TB0> INFO: 4088970 events read in total (178207ms).
[19:04:10.070] <TB0> INFO: 4763200 events read in total (207364ms).
[19:04:10.161] <TB0> INFO: Test took 208278ms.
[19:04:38.924] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 220 (-1/-1) hits flags = 528 (plus default)
[19:04:38.934] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[19:04:38.934] <TB0> INFO: run 1 of 1
[19:04:39.166] <TB0> INFO: Expecting 4596800 events.
[19:05:09.918] <TB0> INFO: 698055 events read in total (30161ms).
[19:05:39.745] <TB0> INFO: 1390065 events read in total (59988ms).
[19:06:09.888] <TB0> INFO: 2078605 events read in total (90131ms).
[19:06:39.953] <TB0> INFO: 2763930 events read in total (120196ms).
[19:07:09.213] <TB0> INFO: 3447060 events read in total (149456ms).
[19:07:38.823] <TB0> INFO: 4129305 events read in total (179066ms).
[19:07:59.060] <TB0> INFO: 4596800 events read in total (199303ms).
[19:07:59.163] <TB0> INFO: Test took 200229ms.
[19:08:30.039] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 205 (-1/-1) hits flags = 528 (plus default)
[19:08:30.051] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[19:08:30.051] <TB0> INFO: run 1 of 1
[19:08:30.290] <TB0> INFO: Expecting 4284800 events.
[19:09:01.117] <TB0> INFO: 714055 events read in total (30235ms).
[19:09:31.758] <TB0> INFO: 1421225 events read in total (60876ms).
[19:10:02.934] <TB0> INFO: 2124560 events read in total (92052ms).
[19:10:33.243] <TB0> INFO: 2822925 events read in total (122361ms).
[19:11:04.264] <TB0> INFO: 3521175 events read in total (153382ms).
[19:11:35.597] <TB0> INFO: 4220590 events read in total (184715ms).
[19:11:38.622] <TB0> INFO: 4284800 events read in total (187740ms).
[19:11:38.677] <TB0> INFO: Test took 188627ms.
[19:12:01.858] <TB0> INFO: PixTestTrim80::trimBitTest() done
[19:12:01.859] <TB0> INFO: PixTestTrim80::doTest() done, duration: 2491 seconds
[19:12:02.484] <TB0> INFO: enter test to run
[19:12:02.484] <TB0> INFO: test: exit no parameter change
[19:12:02.578] <TB0> QUIET: Connection to board 73 closed.
[19:12:02.581] <TB0> INFO: pXar: this is the end, my friend