[17:20:49.034] <TB2> INFO: *** Welcome to pxar ***
[17:20:49.034] <TB2> INFO: *** Today: 2016/10/26
[17:20:49.039] <TB2> INFO: *** Version: c8ba-dirty
[17:20:49.039] <TB2> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters_C15.dat
[17:20:49.040] <TB2> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//tbmParameters_C1b.dat
[17:20:49.040] <TB2> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//defaultMaskFile.dat
[17:20:49.040] <TB2> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//trimParameters_C15.dat
[17:20:49.096] <TB2> INFO: clk: 4
[17:20:49.096] <TB2> INFO: ctr: 4
[17:20:49.096] <TB2> INFO: sda: 19
[17:20:49.096] <TB2> INFO: tin: 9
[17:20:49.096] <TB2> INFO: level: 15
[17:20:49.096] <TB2> INFO: triggerdelay: 0
[17:20:49.096] <TB2> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[17:20:49.096] <TB2> INFO: Log level: INFO
[17:20:49.104] <TB2> INFO: Found DTB DTB_WXC55Z
[17:20:49.115] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[17:20:49.117] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[17:20:49.119] <TB2> INFO: RPC call hashes of host and DTB match: 486171790
[17:20:50.608] <TB2> INFO: DUT info:
[17:20:50.608] <TB2> INFO: The DUT currently contains the following objects:
[17:20:50.608] <TB2> INFO: 4 TBM Cores tbm10c (4 ON)
[17:20:50.608] <TB2> INFO: TBM Core alpha (0): 7 registers set
[17:20:50.608] <TB2> INFO: TBM Core beta (1): 7 registers set
[17:20:50.608] <TB2> INFO: TBM Core alpha (2): 7 registers set
[17:20:50.608] <TB2> INFO: TBM Core beta (3): 7 registers set
[17:20:50.608] <TB2> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[17:20:50.608] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[17:20:50.608] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[17:20:50.608] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[17:20:50.608] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[17:20:50.608] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[17:20:50.609] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[17:20:50.609] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[17:20:50.609] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[17:20:50.609] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[17:20:50.609] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[17:20:50.609] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[17:20:50.609] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[17:20:50.609] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[17:20:50.609] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[17:20:50.609] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[17:20:50.609] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[17:20:51.009] <TB2> INFO: enter 'restricted' command line mode
[17:20:51.009] <TB2> INFO: enter test to run
[17:20:51.009] <TB2> INFO: test: pretest no parameter change
[17:20:51.009] <TB2> INFO: running: pretest
[17:20:51.548] <TB2> INFO: ######################################################################
[17:20:51.548] <TB2> INFO: PixTestPretest::doTest()
[17:20:51.548] <TB2> INFO: ######################################################################
[17:20:51.549] <TB2> INFO: ----------------------------------------------------------------------
[17:20:51.549] <TB2> INFO: PixTestPretest::programROC()
[17:20:51.549] <TB2> INFO: ----------------------------------------------------------------------
[17:21:09.562] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[17:21:09.562] <TB2> INFO: IA differences per ROC: 20.9 20.9 19.3 23.3 16.9 20.1 18.5 18.5 17.7 20.9 21.7 19.3 19.3 18.5 17.7 19.3
[17:21:09.597] <TB2> INFO: ----------------------------------------------------------------------
[17:21:09.597] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[17:21:09.597] <TB2> INFO: ----------------------------------------------------------------------
[17:21:30.846] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 381.9 mA = 23.8688 mA/ROC
[17:21:30.846] <TB2> INFO: i(loss) [mA/ROC]: 18.5 18.5 19.3 17.7 19.3 18.5 20.1 20.1 20.1 18.5 17.7 19.3 18.5 19.3 18.5 18.5
[17:21:30.875] <TB2> INFO: ----------------------------------------------------------------------
[17:21:30.875] <TB2> INFO: PixTestPretest::findTiming()
[17:21:30.875] <TB2> INFO: ----------------------------------------------------------------------
[17:21:30.875] <TB2> INFO: PixTestCmd::init()

[17:22:02.161] <TB2> INFO: TBM phases: 160MHz: 0, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[17:22:02.161] <TB2> INFO: (success/tries = 100/100), width = 3
[17:22:03.660] <TB2> INFO: ----------------------------------------------------------------------
[17:22:03.660] <TB2> INFO: PixTestPretest::findWorkingPixel()
[17:22:03.660] <TB2> INFO: ----------------------------------------------------------------------
[17:22:03.752] <TB2> INFO: Expecting 231680 events.
[17:22:13.327] <TB2> INFO: 231680 events read in total (8984ms).
[17:22:13.333] <TB2> INFO: Test took 9671ms.
[17:22:13.589] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[17:22:13.618] <TB2> INFO: ----------------------------------------------------------------------
[17:22:13.619] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[17:22:13.619] <TB2> INFO: ----------------------------------------------------------------------
[17:22:13.711] <TB2> INFO: Expecting 231680 events.
[17:22:23.318] <TB2> INFO: 231680 events read in total (9016ms).
[17:22:23.325] <TB2> INFO: Test took 9703ms.
[17:22:23.584] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[17:22:23.584] <TB2> INFO: CalDel: 97 111 87 103 112 105 92 108 95 87 111 111 108 110 102 98
[17:22:23.584] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 52 51 51 51 51 51 51 51 51
[17:22:23.586] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters_C0.dat
[17:22:23.586] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters_C1.dat
[17:22:23.586] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters_C2.dat
[17:22:23.586] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters_C3.dat
[17:22:23.586] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters_C4.dat
[17:22:23.586] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters_C5.dat
[17:22:23.587] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters_C6.dat
[17:22:23.587] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters_C7.dat
[17:22:23.587] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters_C8.dat
[17:22:23.587] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters_C9.dat
[17:22:23.587] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters_C10.dat
[17:22:23.587] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters_C11.dat
[17:22:23.587] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters_C12.dat
[17:22:23.587] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters_C13.dat
[17:22:23.587] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters_C14.dat
[17:22:23.587] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters_C15.dat
[17:22:23.587] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//tbmParameters_C0a.dat
[17:22:23.587] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//tbmParameters_C0b.dat
[17:22:23.588] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//tbmParameters_C1a.dat
[17:22:23.588] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//tbmParameters_C1b.dat
[17:22:23.588] <TB2> INFO: PixTestPretest::doTest() done, duration: 92 seconds
[17:22:23.701] <TB2> INFO: enter test to run
[17:22:23.701] <TB2> INFO: test: FullTest no parameter change
[17:22:23.701] <TB2> INFO: running: fulltest
[17:22:23.701] <TB2> INFO: ######################################################################
[17:22:23.701] <TB2> INFO: PixTestFullTest::doTest()
[17:22:23.701] <TB2> INFO: ######################################################################
[17:22:23.702] <TB2> INFO: ######################################################################
[17:22:23.702] <TB2> INFO: PixTestAlive::doTest()
[17:22:23.702] <TB2> INFO: ######################################################################
[17:22:23.703] <TB2> INFO: ----------------------------------------------------------------------
[17:22:23.703] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:22:23.703] <TB2> INFO: ----------------------------------------------------------------------
[17:22:23.942] <TB2> INFO: Expecting 41600 events.
[17:22:27.536] <TB2> INFO: 41600 events read in total (3003ms).
[17:22:27.537] <TB2> INFO: Test took 3832ms.
[17:22:27.762] <TB2> INFO: PixTestAlive::aliveTest() done
[17:22:27.762] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[17:22:27.763] <TB2> INFO: ----------------------------------------------------------------------
[17:22:27.763] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:22:27.763] <TB2> INFO: ----------------------------------------------------------------------
[17:22:27.996] <TB2> INFO: Expecting 41600 events.
[17:22:31.003] <TB2> INFO: 41600 events read in total (2416ms).
[17:22:31.003] <TB2> INFO: Test took 3238ms.
[17:22:31.004] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[17:22:31.243] <TB2> INFO: PixTestAlive::maskTest() done
[17:22:31.243] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[17:22:31.244] <TB2> INFO: ----------------------------------------------------------------------
[17:22:31.244] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:22:31.244] <TB2> INFO: ----------------------------------------------------------------------
[17:22:31.478] <TB2> INFO: Expecting 41600 events.
[17:22:35.022] <TB2> INFO: 41600 events read in total (2952ms).
[17:22:35.022] <TB2> INFO: Test took 3777ms.
[17:22:35.249] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[17:22:35.249] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[17:22:35.249] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[17:22:35.249] <TB2> INFO: Decoding statistics:
[17:22:35.249] <TB2> INFO: General information:
[17:22:35.249] <TB2> INFO: 16bit words read: 0
[17:22:35.249] <TB2> INFO: valid events total: 0
[17:22:35.249] <TB2> INFO: empty events: 0
[17:22:35.249] <TB2> INFO: valid events with pixels: 0
[17:22:35.249] <TB2> INFO: valid pixel hits: 0
[17:22:35.249] <TB2> INFO: Event errors: 0
[17:22:35.249] <TB2> INFO: start marker: 0
[17:22:35.249] <TB2> INFO: stop marker: 0
[17:22:35.249] <TB2> INFO: overflow: 0
[17:22:35.249] <TB2> INFO: invalid 5bit words: 0
[17:22:35.249] <TB2> INFO: invalid XOR eye diagram: 0
[17:22:35.249] <TB2> INFO: frame (failed synchr.): 0
[17:22:35.249] <TB2> INFO: idle data (no TBM trl): 0
[17:22:35.249] <TB2> INFO: no data (only TBM hdr): 0
[17:22:35.249] <TB2> INFO: TBM errors: 0
[17:22:35.249] <TB2> INFO: flawed TBM headers: 0
[17:22:35.249] <TB2> INFO: flawed TBM trailers: 0
[17:22:35.249] <TB2> INFO: event ID mismatches: 0
[17:22:35.249] <TB2> INFO: ROC errors: 0
[17:22:35.249] <TB2> INFO: missing ROC header(s): 0
[17:22:35.249] <TB2> INFO: misplaced readback start: 0
[17:22:35.249] <TB2> INFO: Pixel decoding errors: 0
[17:22:35.249] <TB2> INFO: pixel data incomplete: 0
[17:22:35.249] <TB2> INFO: pixel address: 0
[17:22:35.249] <TB2> INFO: pulse height fill bit: 0
[17:22:35.249] <TB2> INFO: buffer corruption: 0
[17:22:35.256] <TB2> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C15.dat
[17:22:35.257] <TB2> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[17:22:35.257] <TB2> INFO: ######################################################################
[17:22:35.257] <TB2> INFO: PixTestReadback::doTest()
[17:22:35.257] <TB2> INFO: ######################################################################
[17:22:35.257] <TB2> INFO: ----------------------------------------------------------------------
[17:22:35.257] <TB2> INFO: PixTestReadback::CalibrateVd()
[17:22:35.257] <TB2> INFO: ----------------------------------------------------------------------
[17:22:45.228] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C0.dat
[17:22:45.228] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C1.dat
[17:22:45.228] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C2.dat
[17:22:45.228] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C3.dat
[17:22:45.228] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C4.dat
[17:22:45.228] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C5.dat
[17:22:45.228] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C6.dat
[17:22:45.228] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C7.dat
[17:22:45.228] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C8.dat
[17:22:45.228] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C9.dat
[17:22:45.229] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C10.dat
[17:22:45.229] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C11.dat
[17:22:45.229] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C12.dat
[17:22:45.229] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C13.dat
[17:22:45.229] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C14.dat
[17:22:45.229] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C15.dat
[17:22:45.256] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[17:22:45.256] <TB2> INFO: ----------------------------------------------------------------------
[17:22:45.256] <TB2> INFO: PixTestReadback::CalibrateVa()
[17:22:45.256] <TB2> INFO: ----------------------------------------------------------------------
[17:22:55.146] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C0.dat
[17:22:55.146] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C1.dat
[17:22:55.146] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C2.dat
[17:22:55.146] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C3.dat
[17:22:55.146] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C4.dat
[17:22:55.146] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C5.dat
[17:22:55.146] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C6.dat
[17:22:55.146] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C7.dat
[17:22:55.146] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C8.dat
[17:22:55.146] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C9.dat
[17:22:55.146] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C10.dat
[17:22:55.147] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C11.dat
[17:22:55.147] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C12.dat
[17:22:55.147] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C13.dat
[17:22:55.147] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C14.dat
[17:22:55.147] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C15.dat
[17:22:55.175] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[17:22:55.175] <TB2> INFO: ----------------------------------------------------------------------
[17:22:55.175] <TB2> INFO: PixTestReadback::readbackVbg()
[17:22:55.175] <TB2> INFO: ----------------------------------------------------------------------
[17:23:02.820] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[17:23:02.821] <TB2> INFO: ----------------------------------------------------------------------
[17:23:02.821] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[17:23:02.821] <TB2> INFO: ----------------------------------------------------------------------
[17:23:02.821] <TB2> INFO: Vbg will be calibrated using Vd calibration
[17:23:02.821] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 152.3calibrated Vbg = 1.16358 :::*/*/*/*/
[17:23:02.821] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 161.1calibrated Vbg = 1.15632 :::*/*/*/*/
[17:23:02.821] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 155.3calibrated Vbg = 1.15834 :::*/*/*/*/
[17:23:02.821] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 145calibrated Vbg = 1.16082 :::*/*/*/*/
[17:23:02.821] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 158.6calibrated Vbg = 1.16107 :::*/*/*/*/
[17:23:02.821] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 159.4calibrated Vbg = 1.15744 :::*/*/*/*/
[17:23:02.821] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 163.5calibrated Vbg = 1.16124 :::*/*/*/*/
[17:23:02.821] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 151.4calibrated Vbg = 1.16142 :::*/*/*/*/
[17:23:02.821] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 143calibrated Vbg = 1.15815 :::*/*/*/*/
[17:23:02.821] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 155.9calibrated Vbg = 1.15118 :::*/*/*/*/
[17:23:02.821] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 159calibrated Vbg = 1.15206 :::*/*/*/*/
[17:23:02.821] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 160.9calibrated Vbg = 1.1452 :::*/*/*/*/
[17:23:02.821] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 152.3calibrated Vbg = 1.15777 :::*/*/*/*/
[17:23:02.821] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 151.5calibrated Vbg = 1.15652 :::*/*/*/*/
[17:23:02.821] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 160calibrated Vbg = 1.1502 :::*/*/*/*/
[17:23:02.821] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 147.8calibrated Vbg = 1.15452 :::*/*/*/*/
[17:23:02.823] <TB2> INFO: ----------------------------------------------------------------------
[17:23:02.823] <TB2> INFO: PixTestReadback::CalibrateIa()
[17:23:02.823] <TB2> INFO: ----------------------------------------------------------------------
[17:25:43.126] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C0.dat
[17:25:43.126] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C1.dat
[17:25:43.127] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C2.dat
[17:25:43.127] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C3.dat
[17:25:43.127] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C4.dat
[17:25:43.127] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C5.dat
[17:25:43.127] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C6.dat
[17:25:43.127] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C7.dat
[17:25:43.127] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C8.dat
[17:25:43.127] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C9.dat
[17:25:43.127] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C10.dat
[17:25:43.127] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C11.dat
[17:25:43.127] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C12.dat
[17:25:43.127] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C13.dat
[17:25:43.127] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C14.dat
[17:25:43.127] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//readbackCal_C15.dat
[17:25:43.154] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[17:25:43.155] <TB2> INFO: PixTestReadback::doTest() done
[17:25:43.155] <TB2> INFO: Decoding statistics:
[17:25:43.155] <TB2> INFO: General information:
[17:25:43.155] <TB2> INFO: 16bit words read: 1536
[17:25:43.155] <TB2> INFO: valid events total: 256
[17:25:43.155] <TB2> INFO: empty events: 256
[17:25:43.155] <TB2> INFO: valid events with pixels: 0
[17:25:43.155] <TB2> INFO: valid pixel hits: 0
[17:25:43.155] <TB2> INFO: Event errors: 0
[17:25:43.155] <TB2> INFO: start marker: 0
[17:25:43.155] <TB2> INFO: stop marker: 0
[17:25:43.155] <TB2> INFO: overflow: 0
[17:25:43.155] <TB2> INFO: invalid 5bit words: 0
[17:25:43.155] <TB2> INFO: invalid XOR eye diagram: 0
[17:25:43.155] <TB2> INFO: frame (failed synchr.): 0
[17:25:43.155] <TB2> INFO: idle data (no TBM trl): 0
[17:25:43.155] <TB2> INFO: no data (only TBM hdr): 0
[17:25:43.155] <TB2> INFO: TBM errors: 0
[17:25:43.155] <TB2> INFO: flawed TBM headers: 0
[17:25:43.155] <TB2> INFO: flawed TBM trailers: 0
[17:25:43.155] <TB2> INFO: event ID mismatches: 0
[17:25:43.155] <TB2> INFO: ROC errors: 0
[17:25:43.155] <TB2> INFO: missing ROC header(s): 0
[17:25:43.155] <TB2> INFO: misplaced readback start: 0
[17:25:43.155] <TB2> INFO: Pixel decoding errors: 0
[17:25:43.155] <TB2> INFO: pixel data incomplete: 0
[17:25:43.155] <TB2> INFO: pixel address: 0
[17:25:43.155] <TB2> INFO: pulse height fill bit: 0
[17:25:43.155] <TB2> INFO: buffer corruption: 0
[17:25:43.188] <TB2> INFO: ######################################################################
[17:25:43.188] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[17:25:43.188] <TB2> INFO: ######################################################################
[17:25:43.191] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[17:25:43.201] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[17:25:43.201] <TB2> INFO: run 1 of 1
[17:25:43.443] <TB2> INFO: Expecting 3120000 events.
[17:26:13.751] <TB2> INFO: 660750 events read in total (29716ms).





















[17:26:43.121] <TB2> INFO: 1317900 events read in total (59086ms).











[17:27:12.217] <TB2> INFO: 1970635 events read in total (88182ms).











[17:27:41.381] <TB2> INFO: 2622305 events read in total (117346ms).











[17:28:03.994] <TB2> INFO: 3120000 events read in total (139959ms).
[17:28:04.054] <TB2> INFO: Test took 140852ms.
[17:28:31.142] <TB2> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 167 seconds
[17:28:31.142] <TB2> INFO: number of dead bumps (per ROC): 1 0 0 0 1 1 1 1 0 0 0 1 0 0 1 0
[17:28:31.142] <TB2> INFO: separation cut (per ROC): 103 104 101 111 95 101 110 100 104 101 105 105 103 101 105 104
[17:28:31.142] <TB2> INFO: Decoding statistics:
[17:28:31.142] <TB2> INFO: General information:
[17:28:31.142] <TB2> INFO: 16bit words read: 0
[17:28:31.142] <TB2> INFO: valid events total: 0
[17:28:31.142] <TB2> INFO: empty events: 0
[17:28:31.142] <TB2> INFO: valid events with pixels: 0
[17:28:31.142] <TB2> INFO: valid pixel hits: 0
[17:28:31.142] <TB2> INFO: Event errors: 0
[17:28:31.142] <TB2> INFO: start marker: 0
[17:28:31.142] <TB2> INFO: stop marker: 0
[17:28:31.142] <TB2> INFO: overflow: 0
[17:28:31.142] <TB2> INFO: invalid 5bit words: 0
[17:28:31.142] <TB2> INFO: invalid XOR eye diagram: 0
[17:28:31.142] <TB2> INFO: frame (failed synchr.): 0
[17:28:31.142] <TB2> INFO: idle data (no TBM trl): 0
[17:28:31.142] <TB2> INFO: no data (only TBM hdr): 0
[17:28:31.142] <TB2> INFO: TBM errors: 0
[17:28:31.142] <TB2> INFO: flawed TBM headers: 0
[17:28:31.142] <TB2> INFO: flawed TBM trailers: 0
[17:28:31.142] <TB2> INFO: event ID mismatches: 0
[17:28:31.142] <TB2> INFO: ROC errors: 0
[17:28:31.142] <TB2> INFO: missing ROC header(s): 0
[17:28:31.142] <TB2> INFO: misplaced readback start: 0
[17:28:31.142] <TB2> INFO: Pixel decoding errors: 0
[17:28:31.142] <TB2> INFO: pixel data incomplete: 0
[17:28:31.142] <TB2> INFO: pixel address: 0
[17:28:31.142] <TB2> INFO: pulse height fill bit: 0
[17:28:31.142] <TB2> INFO: buffer corruption: 0
[17:28:31.186] <TB2> INFO: ######################################################################
[17:28:31.186] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[17:28:31.186] <TB2> INFO: ######################################################################
[17:28:31.187] <TB2> INFO: ----------------------------------------------------------------------
[17:28:31.187] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[17:28:31.187] <TB2> INFO: ----------------------------------------------------------------------
[17:28:31.187] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[17:28:31.199] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[17:28:31.199] <TB2> INFO: run 1 of 1
[17:28:31.470] <TB2> INFO: Expecting 36608000 events.
[17:28:54.655] <TB2> INFO: 665450 events read in total (22594ms).
[17:29:17.059] <TB2> INFO: 1317100 events read in total (44998ms).
[17:29:39.211] <TB2> INFO: 1968750 events read in total (67150ms).
[17:30:01.306] <TB2> INFO: 2619150 events read in total (89245ms).
[17:30:23.507] <TB2> INFO: 3271300 events read in total (111446ms).
[17:30:45.920] <TB2> INFO: 3922500 events read in total (133859ms).
[17:31:08.290] <TB2> INFO: 4575000 events read in total (156229ms).
[17:31:30.622] <TB2> INFO: 5226550 events read in total (178561ms).
[17:31:52.949] <TB2> INFO: 5877700 events read in total (200888ms).
[17:32:15.520] <TB2> INFO: 6527850 events read in total (223459ms).
[17:32:37.630] <TB2> INFO: 7176850 events read in total (245569ms).
[17:32:59.777] <TB2> INFO: 7828100 events read in total (267716ms).
[17:33:21.794] <TB2> INFO: 8477200 events read in total (289733ms).
[17:33:43.791] <TB2> INFO: 9126800 events read in total (311730ms).
[17:34:05.678] <TB2> INFO: 9773700 events read in total (333618ms).
[17:34:27.851] <TB2> INFO: 10423350 events read in total (355790ms).
[17:34:50.085] <TB2> INFO: 11070550 events read in total (378024ms).
[17:35:12.389] <TB2> INFO: 11718450 events read in total (400328ms).
[17:35:34.668] <TB2> INFO: 12365750 events read in total (422607ms).
[17:35:56.915] <TB2> INFO: 13012850 events read in total (444854ms).
[17:36:19.329] <TB2> INFO: 13660550 events read in total (467268ms).
[17:36:41.507] <TB2> INFO: 14306250 events read in total (489446ms).
[17:37:03.673] <TB2> INFO: 14952950 events read in total (511612ms).
[17:37:25.870] <TB2> INFO: 15597700 events read in total (533809ms).
[17:37:48.120] <TB2> INFO: 16243300 events read in total (556059ms).
[17:38:10.585] <TB2> INFO: 16887550 events read in total (578524ms).
[17:38:32.917] <TB2> INFO: 17533800 events read in total (600856ms).
[17:38:55.281] <TB2> INFO: 18178050 events read in total (623220ms).
[17:39:17.660] <TB2> INFO: 18823900 events read in total (645599ms).
[17:39:40.008] <TB2> INFO: 19467050 events read in total (667947ms).
[17:40:01.976] <TB2> INFO: 20111700 events read in total (689915ms).
[17:40:24.088] <TB2> INFO: 20754400 events read in total (712027ms).
[17:40:46.390] <TB2> INFO: 21396450 events read in total (734329ms).
[17:41:08.376] <TB2> INFO: 22038750 events read in total (756315ms).
[17:41:30.745] <TB2> INFO: 22679450 events read in total (778684ms).
[17:41:52.739] <TB2> INFO: 23321150 events read in total (800678ms).
[17:42:14.912] <TB2> INFO: 23960650 events read in total (822851ms).
[17:42:37.199] <TB2> INFO: 24602700 events read in total (845138ms).
[17:42:59.163] <TB2> INFO: 25242800 events read in total (867102ms).
[17:43:21.064] <TB2> INFO: 25884200 events read in total (889003ms).
[17:43:43.291] <TB2> INFO: 26523400 events read in total (911230ms).
[17:44:05.421] <TB2> INFO: 27163650 events read in total (933360ms).
[17:44:27.777] <TB2> INFO: 27804000 events read in total (955716ms).
[17:44:49.916] <TB2> INFO: 28444150 events read in total (977855ms).
[17:45:11.959] <TB2> INFO: 29083100 events read in total (999898ms).
[17:45:34.077] <TB2> INFO: 29722250 events read in total (1022016ms).
[17:45:56.076] <TB2> INFO: 30360600 events read in total (1044015ms).
[17:46:18.561] <TB2> INFO: 30998300 events read in total (1066500ms).
[17:46:41.045] <TB2> INFO: 31637000 events read in total (1088984ms).
[17:47:03.281] <TB2> INFO: 32275750 events read in total (1111220ms).
[17:47:25.284] <TB2> INFO: 32916800 events read in total (1133223ms).
[17:47:47.645] <TB2> INFO: 33557450 events read in total (1155584ms).
[17:48:10.071] <TB2> INFO: 34198200 events read in total (1178010ms).
[17:48:32.387] <TB2> INFO: 34839050 events read in total (1200326ms).
[17:48:54.784] <TB2> INFO: 35479850 events read in total (1222723ms).
[17:49:17.216] <TB2> INFO: 36124300 events read in total (1245155ms).
[17:49:33.824] <TB2> INFO: 36608000 events read in total (1261763ms).
[17:49:33.880] <TB2> INFO: Test took 1262682ms.
[17:49:34.326] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:49:35.999] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:49:38.018] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:49:39.918] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:49:41.895] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:49:43.669] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:49:45.350] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:49:47.616] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:49:49.649] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:49:51.998] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:49:54.080] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:49:56.275] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:49:58.409] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:50:00.631] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:50:02.777] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:50:04.538] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[17:50:06.344] <TB2> INFO: PixTestScurves::scurves() done
[17:50:06.344] <TB2> INFO: Vcal mean: 103.48 114.06 95.51 108.37 114.13 102.98 111.84 115.68 103.76 111.44 110.64 117.46 101.99 102.75 122.18 106.62
[17:50:06.345] <TB2> INFO: Vcal RMS: 5.16 6.06 5.44 5.22 6.70 5.16 4.90 6.23 4.97 5.47 5.36 5.37 5.39 5.22 6.28 5.44
[17:50:06.345] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1295 seconds
[17:50:06.345] <TB2> INFO: Decoding statistics:
[17:50:06.345] <TB2> INFO: General information:
[17:50:06.345] <TB2> INFO: 16bit words read: 0
[17:50:06.345] <TB2> INFO: valid events total: 0
[17:50:06.345] <TB2> INFO: empty events: 0
[17:50:06.345] <TB2> INFO: valid events with pixels: 0
[17:50:06.345] <TB2> INFO: valid pixel hits: 0
[17:50:06.345] <TB2> INFO: Event errors: 0
[17:50:06.345] <TB2> INFO: start marker: 0
[17:50:06.345] <TB2> INFO: stop marker: 0
[17:50:06.345] <TB2> INFO: overflow: 0
[17:50:06.345] <TB2> INFO: invalid 5bit words: 0
[17:50:06.345] <TB2> INFO: invalid XOR eye diagram: 0
[17:50:06.345] <TB2> INFO: frame (failed synchr.): 0
[17:50:06.345] <TB2> INFO: idle data (no TBM trl): 0
[17:50:06.345] <TB2> INFO: no data (only TBM hdr): 0
[17:50:06.345] <TB2> INFO: TBM errors: 0
[17:50:06.345] <TB2> INFO: flawed TBM headers: 0
[17:50:06.345] <TB2> INFO: flawed TBM trailers: 0
[17:50:06.345] <TB2> INFO: event ID mismatches: 0
[17:50:06.345] <TB2> INFO: ROC errors: 0
[17:50:06.345] <TB2> INFO: missing ROC header(s): 0
[17:50:06.345] <TB2> INFO: misplaced readback start: 0
[17:50:06.345] <TB2> INFO: Pixel decoding errors: 0
[17:50:06.345] <TB2> INFO: pixel data incomplete: 0
[17:50:06.345] <TB2> INFO: pixel address: 0
[17:50:06.345] <TB2> INFO: pulse height fill bit: 0
[17:50:06.345] <TB2> INFO: buffer corruption: 0
[17:50:06.409] <TB2> INFO: ######################################################################
[17:50:06.409] <TB2> INFO: PixTestTrim::doTest()
[17:50:06.409] <TB2> INFO: ######################################################################
[17:50:06.411] <TB2> INFO: ----------------------------------------------------------------------
[17:50:06.411] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[17:50:06.411] <TB2> INFO: ----------------------------------------------------------------------
[17:50:06.451] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[17:50:06.451] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[17:50:06.461] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[17:50:06.461] <TB2> INFO: run 1 of 1
[17:50:06.694] <TB2> INFO: Expecting 5025280 events.
[17:50:37.359] <TB2> INFO: 816784 events read in total (30071ms).
[17:51:07.187] <TB2> INFO: 1630344 events read in total (59899ms).
[17:51:36.717] <TB2> INFO: 2440072 events read in total (89429ms).
[17:52:06.357] <TB2> INFO: 3246080 events read in total (119069ms).
[17:52:36.160] <TB2> INFO: 4047800 events read in total (148872ms).
[17:53:05.534] <TB2> INFO: 4846776 events read in total (178246ms).
[17:53:12.496] <TB2> INFO: 5025280 events read in total (185208ms).
[17:53:12.538] <TB2> INFO: Test took 186077ms.
[17:53:33.585] <TB2> INFO: ROC 0 VthrComp = 113
[17:53:33.585] <TB2> INFO: ROC 1 VthrComp = 114
[17:53:33.585] <TB2> INFO: ROC 2 VthrComp = 105
[17:53:33.585] <TB2> INFO: ROC 3 VthrComp = 121
[17:53:33.585] <TB2> INFO: ROC 4 VthrComp = 115
[17:53:33.586] <TB2> INFO: ROC 5 VthrComp = 108
[17:53:33.586] <TB2> INFO: ROC 6 VthrComp = 128
[17:53:33.586] <TB2> INFO: ROC 7 VthrComp = 118
[17:53:33.586] <TB2> INFO: ROC 8 VthrComp = 112
[17:53:33.586] <TB2> INFO: ROC 9 VthrComp = 121
[17:53:33.586] <TB2> INFO: ROC 10 VthrComp = 113
[17:53:33.587] <TB2> INFO: ROC 11 VthrComp = 120
[17:53:33.587] <TB2> INFO: ROC 12 VthrComp = 107
[17:53:33.587] <TB2> INFO: ROC 13 VthrComp = 106
[17:53:33.587] <TB2> INFO: ROC 14 VthrComp = 126
[17:53:33.587] <TB2> INFO: ROC 15 VthrComp = 110
[17:53:33.822] <TB2> INFO: Expecting 41600 events.
[17:53:37.253] <TB2> INFO: 41600 events read in total (2839ms).
[17:53:37.253] <TB2> INFO: Test took 3665ms.
[17:53:37.262] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[17:53:37.262] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[17:53:37.272] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[17:53:37.272] <TB2> INFO: run 1 of 1
[17:53:37.549] <TB2> INFO: Expecting 5025280 events.
[17:54:04.286] <TB2> INFO: 592568 events read in total (26145ms).
[17:54:30.154] <TB2> INFO: 1182304 events read in total (52013ms).
[17:54:55.681] <TB2> INFO: 1772696 events read in total (77540ms).
[17:55:20.972] <TB2> INFO: 2362008 events read in total (102831ms).
[17:55:46.650] <TB2> INFO: 2948736 events read in total (128509ms).
[17:56:11.803] <TB2> INFO: 3534992 events read in total (153662ms).
[17:56:36.978] <TB2> INFO: 4119792 events read in total (178837ms).
[17:57:02.964] <TB2> INFO: 4704496 events read in total (204823ms).
[17:57:17.353] <TB2> INFO: 5025280 events read in total (219212ms).
[17:57:17.411] <TB2> INFO: Test took 220139ms.
[17:57:44.217] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 57.1891 for pixel 35/7 mean/min/max = 44.8565/32.4134/57.2996
[17:57:44.217] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 64.8603 for pixel 0/7 mean/min/max = 47.8783/30.8029/64.9537
[17:57:44.218] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 59.9526 for pixel 0/16 mean/min/max = 47.2089/34.3636/60.0543
[17:57:44.218] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 58.3889 for pixel 10/20 mean/min/max = 45.0764/31.633/58.5197
[17:57:44.218] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 62.9951 for pixel 24/0 mean/min/max = 46.7122/30.4102/63.0142
[17:57:44.219] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 59.5951 for pixel 0/35 mean/min/max = 47.0427/34.2654/59.82
[17:57:44.219] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 56.9859 for pixel 14/1 mean/min/max = 44.3853/31.5993/57.1713
[17:57:44.219] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 62.9264 for pixel 32/10 mean/min/max = 46.8856/30.425/63.3462
[17:57:44.220] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 59.0193 for pixel 19/7 mean/min/max = 45.6262/32.0985/59.154
[17:57:44.220] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 60.3443 for pixel 0/5 mean/min/max = 46.0347/31.7023/60.3671
[17:57:44.220] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 60.1688 for pixel 24/13 mean/min/max = 46.2167/31.861/60.5725
[17:57:44.221] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 60.7082 for pixel 19/5 mean/min/max = 46.1776/31.5413/60.8138
[17:57:44.221] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 61.6077 for pixel 0/13 mean/min/max = 47.7794/33.9122/61.6465
[17:57:44.222] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 61.3096 for pixel 2/0 mean/min/max = 47.8376/34.3218/61.3534
[17:57:44.222] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 61.2679 for pixel 15/18 mean/min/max = 46.4499/31.6157/61.2842
[17:57:44.222] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 60.7284 for pixel 0/73 mean/min/max = 47.3888/34.0078/60.7697
[17:57:44.223] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:57:44.311] <TB2> INFO: Expecting 411648 events.
[17:57:53.606] <TB2> INFO: 411648 events read in total (8703ms).
[17:57:53.613] <TB2> INFO: Expecting 411648 events.
[17:58:02.704] <TB2> INFO: 411648 events read in total (8688ms).
[17:58:02.715] <TB2> INFO: Expecting 411648 events.
[17:58:11.772] <TB2> INFO: 411648 events read in total (8654ms).
[17:58:11.784] <TB2> INFO: Expecting 411648 events.
[17:58:20.778] <TB2> INFO: 411648 events read in total (8591ms).
[17:58:20.793] <TB2> INFO: Expecting 411648 events.
[17:58:29.765] <TB2> INFO: 411648 events read in total (8569ms).
[17:58:29.787] <TB2> INFO: Expecting 411648 events.
[17:58:38.822] <TB2> INFO: 411648 events read in total (8632ms).
[17:58:38.847] <TB2> INFO: Expecting 411648 events.
[17:58:47.872] <TB2> INFO: 411648 events read in total (8622ms).
[17:58:47.901] <TB2> INFO: Expecting 411648 events.
[17:58:56.909] <TB2> INFO: 411648 events read in total (8605ms).
[17:58:56.941] <TB2> INFO: Expecting 411648 events.
[17:59:06.086] <TB2> INFO: 411648 events read in total (8742ms).
[17:59:06.121] <TB2> INFO: Expecting 411648 events.
[17:59:15.073] <TB2> INFO: 411648 events read in total (8549ms).
[17:59:15.108] <TB2> INFO: Expecting 411648 events.
[17:59:24.195] <TB2> INFO: 411648 events read in total (8684ms).
[17:59:24.239] <TB2> INFO: Expecting 411648 events.
[17:59:33.273] <TB2> INFO: 411648 events read in total (8631ms).
[17:59:33.320] <TB2> INFO: Expecting 411648 events.
[17:59:42.352] <TB2> INFO: 411648 events read in total (8629ms).
[17:59:42.402] <TB2> INFO: Expecting 411648 events.
[17:59:51.459] <TB2> INFO: 411648 events read in total (8654ms).
[17:59:51.512] <TB2> INFO: Expecting 411648 events.
[18:00:00.660] <TB2> INFO: 411648 events read in total (8745ms).
[18:00:00.702] <TB2> INFO: Expecting 411648 events.
[18:00:09.731] <TB2> INFO: 411648 events read in total (8626ms).
[18:00:09.775] <TB2> INFO: Test took 145552ms.
[18:00:10.511] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[18:00:10.521] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[18:00:10.521] <TB2> INFO: run 1 of 1
[18:00:10.754] <TB2> INFO: Expecting 5025280 events.
[18:00:36.829] <TB2> INFO: 585752 events read in total (25484ms).
[18:01:02.188] <TB2> INFO: 1170968 events read in total (50843ms).
[18:01:27.760] <TB2> INFO: 1755824 events read in total (76415ms).
[18:01:53.230] <TB2> INFO: 2338112 events read in total (101885ms).
[18:02:18.874] <TB2> INFO: 2920800 events read in total (127529ms).
[18:02:44.168] <TB2> INFO: 3502856 events read in total (152823ms).
[18:03:09.870] <TB2> INFO: 4086896 events read in total (178525ms).
[18:03:35.261] <TB2> INFO: 4670408 events read in total (203916ms).
[18:03:51.307] <TB2> INFO: 5025280 events read in total (219962ms).
[18:03:51.406] <TB2> INFO: Test took 220886ms.
[18:04:15.999] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 1.500000 .. 147.917912
[18:04:16.245] <TB2> INFO: Expecting 208000 events.
[18:04:25.739] <TB2> INFO: 208000 events read in total (8903ms).
[18:04:25.741] <TB2> INFO: Test took 9741ms.
[18:04:25.807] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 157 (-1/-1) hits flags = 528 (plus default)
[18:04:25.818] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[18:04:25.818] <TB2> INFO: run 1 of 1
[18:04:26.096] <TB2> INFO: Expecting 5224960 events.
[18:04:52.363] <TB2> INFO: 583912 events read in total (25675ms).
[18:05:18.156] <TB2> INFO: 1168232 events read in total (51468ms).
[18:05:43.001] <TB2> INFO: 1752240 events read in total (77313ms).
[18:06:09.306] <TB2> INFO: 2335888 events read in total (102618ms).
[18:06:34.635] <TB2> INFO: 2920096 events read in total (127947ms).
[18:06:59.899] <TB2> INFO: 3503024 events read in total (153211ms).
[18:07:25.313] <TB2> INFO: 4085568 events read in total (178625ms).
[18:07:51.106] <TB2> INFO: 4667880 events read in total (204418ms).
[18:08:16.335] <TB2> INFO: 5224960 events read in total (229648ms).
[18:08:16.421] <TB2> INFO: Test took 230604ms.
[18:08:42.869] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 26.649661 .. 44.592440
[18:08:43.143] <TB2> INFO: Expecting 208000 events.
[18:08:52.796] <TB2> INFO: 208000 events read in total (9062ms).
[18:08:52.796] <TB2> INFO: Test took 9926ms.
[18:08:52.842] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 54 (-1/-1) hits flags = 528 (plus default)
[18:08:52.851] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[18:08:52.851] <TB2> INFO: run 1 of 1
[18:08:53.129] <TB2> INFO: Expecting 1297920 events.
[18:09:21.048] <TB2> INFO: 667928 events read in total (27328ms).
[18:09:47.674] <TB2> INFO: 1297920 events read in total (53954ms).
[18:09:47.703] <TB2> INFO: Test took 54853ms.
[18:10:00.848] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 25.449375 .. 47.317715
[18:10:01.098] <TB2> INFO: Expecting 208000 events.
[18:10:10.810] <TB2> INFO: 208000 events read in total (9120ms).
[18:10:10.811] <TB2> INFO: Test took 9961ms.
[18:10:10.891] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 15 .. 57 (-1/-1) hits flags = 528 (plus default)
[18:10:10.903] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[18:10:10.903] <TB2> INFO: run 1 of 1
[18:10:11.181] <TB2> INFO: Expecting 1431040 events.
[18:10:39.435] <TB2> INFO: 659664 events read in total (27662ms).
[18:11:07.189] <TB2> INFO: 1318296 events read in total (55416ms).
[18:11:12.306] <TB2> INFO: 1431040 events read in total (60533ms).
[18:11:12.331] <TB2> INFO: Test took 61429ms.
[18:11:25.188] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 23.859814 .. 44.763847
[18:11:25.469] <TB2> INFO: Expecting 208000 events.
[18:11:35.382] <TB2> INFO: 208000 events read in total (9321ms).
[18:11:35.383] <TB2> INFO: Test took 10193ms.
[18:11:35.449] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 13 .. 54 (-1/-1) hits flags = 528 (plus default)
[18:11:35.460] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[18:11:35.460] <TB2> INFO: run 1 of 1
[18:11:35.738] <TB2> INFO: Expecting 1397760 events.
[18:12:04.221] <TB2> INFO: 679280 events read in total (27891ms).
[18:12:31.961] <TB2> INFO: 1357728 events read in total (55631ms).
[18:12:34.006] <TB2> INFO: 1397760 events read in total (57676ms).
[18:12:34.030] <TB2> INFO: Test took 58569ms.
[18:12:46.771] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[18:12:46.771] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[18:12:46.780] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[18:12:46.781] <TB2> INFO: run 1 of 1
[18:12:47.061] <TB2> INFO: Expecting 1364480 events.
[18:13:15.067] <TB2> INFO: 667336 events read in total (27414ms).
[18:13:43.005] <TB2> INFO: 1333936 events read in total (55352ms).
[18:13:44.654] <TB2> INFO: 1364480 events read in total (57001ms).
[18:13:44.685] <TB2> INFO: Test took 57905ms.
[18:13:58.708] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C0.dat
[18:13:58.708] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C1.dat
[18:13:58.708] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C2.dat
[18:13:58.708] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C3.dat
[18:13:58.708] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C4.dat
[18:13:58.708] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C5.dat
[18:13:58.708] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C6.dat
[18:13:58.708] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C7.dat
[18:13:58.708] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C8.dat
[18:13:58.709] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C9.dat
[18:13:58.709] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C10.dat
[18:13:58.709] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C11.dat
[18:13:58.709] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C12.dat
[18:13:58.709] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C13.dat
[18:13:58.709] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C14.dat
[18:13:58.709] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C15.dat
[18:13:58.709] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//trimParameters35_C0.dat
[18:13:58.717] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//trimParameters35_C1.dat
[18:13:58.725] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//trimParameters35_C2.dat
[18:13:58.733] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//trimParameters35_C3.dat
[18:13:58.741] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//trimParameters35_C4.dat
[18:13:58.749] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//trimParameters35_C5.dat
[18:13:58.757] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//trimParameters35_C6.dat
[18:13:58.765] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//trimParameters35_C7.dat
[18:13:58.773] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//trimParameters35_C8.dat
[18:13:58.781] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//trimParameters35_C9.dat
[18:13:58.789] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//trimParameters35_C10.dat
[18:13:58.797] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//trimParameters35_C11.dat
[18:13:58.805] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//trimParameters35_C12.dat
[18:13:58.813] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//trimParameters35_C13.dat
[18:13:58.821] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//trimParameters35_C14.dat
[18:13:58.829] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//trimParameters35_C15.dat
[18:13:58.837] <TB2> INFO: PixTestTrim::trimTest() done
[18:13:58.837] <TB2> INFO: vtrim: 154 121 130 138 131 120 138 143 149 124 137 171 122 143 149 118
[18:13:58.837] <TB2> INFO: vthrcomp: 113 114 105 121 115 108 128 118 112 121 113 120 107 106 126 110
[18:13:58.837] <TB2> INFO: vcal mean: 34.98 35.01 34.98 34.91 34.98 34.99 34.95 34.95 34.93 34.97 34.99 35.03 35.00 34.96 35.02 34.97
[18:13:58.837] <TB2> INFO: vcal RMS: 0.92 1.09 0.92 1.00 1.20 0.95 1.01 1.21 0.95 1.03 1.04 1.22 0.94 0.98 1.18 0.95
[18:13:58.837] <TB2> INFO: bits mean: 10.21 9.23 8.90 10.05 9.97 9.00 10.00 9.97 9.67 8.99 9.67 10.67 8.45 9.49 9.98 8.67
[18:13:58.837] <TB2> INFO: bits RMS: 2.32 2.79 2.53 2.52 2.59 2.54 2.57 2.56 2.64 2.97 2.62 2.18 2.74 2.27 2.54 2.64
[18:13:58.844] <TB2> INFO: ----------------------------------------------------------------------
[18:13:58.844] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[18:13:58.844] <TB2> INFO: ----------------------------------------------------------------------
[18:13:58.846] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[18:13:58.856] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[18:13:58.856] <TB2> INFO: run 1 of 1
[18:13:59.101] <TB2> INFO: Expecting 4160000 events.
[18:14:30.618] <TB2> INFO: 730435 events read in total (30926ms).
[18:15:01.170] <TB2> INFO: 1453080 events read in total (61478ms).
[18:15:31.996] <TB2> INFO: 2170560 events read in total (92304ms).
[18:16:02.623] <TB2> INFO: 2883000 events read in total (122931ms).
[18:16:33.108] <TB2> INFO: 3591900 events read in total (153416ms).
[18:16:57.930] <TB2> INFO: 4160000 events read in total (178238ms).
[18:16:58.009] <TB2> INFO: Test took 179152ms.
[18:17:28.188] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 195 (-1/-1) hits flags = 528 (plus default)
[18:17:28.200] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[18:17:28.200] <TB2> INFO: run 1 of 1
[18:17:28.464] <TB2> INFO: Expecting 4076800 events.
[18:17:59.916] <TB2> INFO: 712030 events read in total (30860ms).
[18:18:30.392] <TB2> INFO: 1417020 events read in total (61336ms).
[18:19:00.573] <TB2> INFO: 2117915 events read in total (91517ms).
[18:19:30.911] <TB2> INFO: 2814350 events read in total (121855ms).
[18:20:00.853] <TB2> INFO: 3507660 events read in total (151797ms).
[18:20:26.144] <TB2> INFO: 4076800 events read in total (177088ms).
[18:20:26.199] <TB2> INFO: Test took 177999ms.
[18:20:56.090] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 182 (-1/-1) hits flags = 528 (plus default)
[18:20:56.099] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[18:20:56.099] <TB2> INFO: run 1 of 1
[18:20:56.337] <TB2> INFO: Expecting 3806400 events.
[18:21:27.833] <TB2> INFO: 729185 events read in total (30904ms).
[18:21:58.640] <TB2> INFO: 1450685 events read in total (61711ms).
[18:22:28.740] <TB2> INFO: 2167040 events read in total (91811ms).
[18:22:59.069] <TB2> INFO: 2878260 events read in total (122140ms).
[18:23:29.267] <TB2> INFO: 3587565 events read in total (152338ms).
[18:23:38.961] <TB2> INFO: 3806400 events read in total (162032ms).
[18:23:39.008] <TB2> INFO: Test took 162909ms.
[18:24:06.143] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 183 (-1/-1) hits flags = 528 (plus default)
[18:24:06.153] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[18:24:06.153] <TB2> INFO: run 1 of 1
[18:24:06.414] <TB2> INFO: Expecting 3827200 events.
[18:24:37.937] <TB2> INFO: 727750 events read in total (30932ms).
[18:25:08.204] <TB2> INFO: 1447965 events read in total (61199ms).
[18:25:38.287] <TB2> INFO: 2163210 events read in total (91282ms).
[18:26:08.453] <TB2> INFO: 2872975 events read in total (121448ms).
[18:26:39.038] <TB2> INFO: 3580660 events read in total (152033ms).
[18:26:50.093] <TB2> INFO: 3827200 events read in total (163088ms).
[18:26:50.157] <TB2> INFO: Test took 164004ms.
[18:27:18.856] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 181 (-1/-1) hits flags = 528 (plus default)
[18:27:18.865] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[18:27:18.865] <TB2> INFO: run 1 of 1
[18:27:19.138] <TB2> INFO: Expecting 3785600 events.
[18:27:50.416] <TB2> INFO: 731120 events read in total (30676ms).
[18:28:20.844] <TB2> INFO: 1454120 events read in total (61104ms).
[18:28:51.344] <TB2> INFO: 2172065 events read in total (91604ms).
[18:29:21.871] <TB2> INFO: 2884680 events read in total (122131ms).
[18:29:52.162] <TB2> INFO: 3595975 events read in total (152422ms).
[18:30:00.630] <TB2> INFO: 3785600 events read in total (160890ms).
[18:30:00.677] <TB2> INFO: Test took 161812ms.
[18:30:27.113] <TB2> INFO: PixTestTrim::trimBitTest() done
[18:30:27.114] <TB2> INFO: PixTestTrim::doTest() done, duration: 2420 seconds
[18:30:27.115] <TB2> INFO: Decoding statistics:
[18:30:27.115] <TB2> INFO: General information:
[18:30:27.115] <TB2> INFO: 16bit words read: 0
[18:30:27.115] <TB2> INFO: valid events total: 0
[18:30:27.115] <TB2> INFO: empty events: 0
[18:30:27.115] <TB2> INFO: valid events with pixels: 0
[18:30:27.115] <TB2> INFO: valid pixel hits: 0
[18:30:27.115] <TB2> INFO: Event errors: 0
[18:30:27.115] <TB2> INFO: start marker: 0
[18:30:27.115] <TB2> INFO: stop marker: 0
[18:30:27.115] <TB2> INFO: overflow: 0
[18:30:27.115] <TB2> INFO: invalid 5bit words: 0
[18:30:27.115] <TB2> INFO: invalid XOR eye diagram: 0
[18:30:27.115] <TB2> INFO: frame (failed synchr.): 0
[18:30:27.115] <TB2> INFO: idle data (no TBM trl): 0
[18:30:27.115] <TB2> INFO: no data (only TBM hdr): 0
[18:30:27.115] <TB2> INFO: TBM errors: 0
[18:30:27.115] <TB2> INFO: flawed TBM headers: 0
[18:30:27.115] <TB2> INFO: flawed TBM trailers: 0
[18:30:27.115] <TB2> INFO: event ID mismatches: 0
[18:30:27.115] <TB2> INFO: ROC errors: 0
[18:30:27.115] <TB2> INFO: missing ROC header(s): 0
[18:30:27.115] <TB2> INFO: misplaced readback start: 0
[18:30:27.115] <TB2> INFO: Pixel decoding errors: 0
[18:30:27.115] <TB2> INFO: pixel data incomplete: 0
[18:30:27.115] <TB2> INFO: pixel address: 0
[18:30:27.115] <TB2> INFO: pulse height fill bit: 0
[18:30:27.115] <TB2> INFO: buffer corruption: 0
[18:30:27.793] <TB2> INFO: ######################################################################
[18:30:27.793] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[18:30:27.793] <TB2> INFO: ######################################################################
[18:30:28.039] <TB2> INFO: Expecting 41600 events.
[18:30:31.546] <TB2> INFO: 41600 events read in total (2916ms).
[18:30:31.546] <TB2> INFO: Test took 3752ms.
[18:30:31.986] <TB2> INFO: Expecting 41600 events.
[18:30:35.469] <TB2> INFO: 41600 events read in total (2892ms).
[18:30:35.470] <TB2> INFO: Test took 3721ms.
[18:30:35.759] <TB2> INFO: Expecting 41600 events.
[18:30:39.313] <TB2> INFO: 41600 events read in total (2963ms).
[18:30:39.314] <TB2> INFO: Test took 3820ms.
[18:30:39.602] <TB2> INFO: Expecting 41600 events.
[18:30:43.093] <TB2> INFO: 41600 events read in total (2899ms).
[18:30:43.094] <TB2> INFO: Test took 3756ms.
[18:30:43.382] <TB2> INFO: Expecting 41600 events.
[18:30:46.887] <TB2> INFO: 41600 events read in total (2913ms).
[18:30:46.887] <TB2> INFO: Test took 3770ms.
[18:30:47.176] <TB2> INFO: Expecting 41600 events.
[18:30:50.648] <TB2> INFO: 41600 events read in total (2881ms).
[18:30:50.649] <TB2> INFO: Test took 3738ms.
[18:30:50.937] <TB2> INFO: Expecting 41600 events.
[18:30:54.468] <TB2> INFO: 41600 events read in total (2939ms).
[18:30:54.469] <TB2> INFO: Test took 3797ms.
[18:30:54.756] <TB2> INFO: Expecting 41600 events.
[18:30:58.331] <TB2> INFO: 41600 events read in total (2983ms).
[18:30:58.332] <TB2> INFO: Test took 3840ms.
[18:30:58.620] <TB2> INFO: Expecting 41600 events.
[18:31:02.130] <TB2> INFO: 41600 events read in total (2919ms).
[18:31:02.131] <TB2> INFO: Test took 3776ms.
[18:31:02.418] <TB2> INFO: Expecting 41600 events.
[18:31:05.874] <TB2> INFO: 41600 events read in total (2863ms).
[18:31:05.875] <TB2> INFO: Test took 3721ms.
[18:31:06.163] <TB2> INFO: Expecting 41600 events.
[18:31:09.685] <TB2> INFO: 41600 events read in total (2931ms).
[18:31:09.686] <TB2> INFO: Test took 3788ms.
[18:31:09.974] <TB2> INFO: Expecting 41600 events.
[18:31:13.427] <TB2> INFO: 41600 events read in total (2862ms).
[18:31:13.427] <TB2> INFO: Test took 3718ms.
[18:31:13.715] <TB2> INFO: Expecting 41600 events.
[18:31:17.236] <TB2> INFO: 41600 events read in total (2929ms).
[18:31:17.237] <TB2> INFO: Test took 3786ms.
[18:31:17.525] <TB2> INFO: Expecting 41600 events.
[18:31:21.018] <TB2> INFO: 41600 events read in total (2902ms).
[18:31:21.019] <TB2> INFO: Test took 3759ms.
[18:31:21.307] <TB2> INFO: Expecting 41600 events.
[18:31:24.777] <TB2> INFO: 41600 events read in total (2878ms).
[18:31:24.778] <TB2> INFO: Test took 3735ms.
[18:31:25.069] <TB2> INFO: Expecting 41600 events.
[18:31:28.532] <TB2> INFO: 41600 events read in total (2872ms).
[18:31:28.533] <TB2> INFO: Test took 3732ms.
[18:31:28.821] <TB2> INFO: Expecting 41600 events.
[18:31:32.291] <TB2> INFO: 41600 events read in total (2878ms).
[18:31:32.292] <TB2> INFO: Test took 3735ms.
[18:31:32.580] <TB2> INFO: Expecting 41600 events.
[18:31:36.079] <TB2> INFO: 41600 events read in total (2907ms).
[18:31:36.080] <TB2> INFO: Test took 3765ms.
[18:31:36.370] <TB2> INFO: Expecting 41600 events.
[18:31:39.822] <TB2> INFO: 41600 events read in total (2860ms).
[18:31:39.823] <TB2> INFO: Test took 3717ms.
[18:31:40.111] <TB2> INFO: Expecting 41600 events.
[18:31:43.703] <TB2> INFO: 41600 events read in total (3001ms).
[18:31:43.703] <TB2> INFO: Test took 3857ms.
[18:31:44.005] <TB2> INFO: Expecting 41600 events.
[18:31:47.571] <TB2> INFO: 41600 events read in total (2974ms).
[18:31:47.572] <TB2> INFO: Test took 3845ms.
[18:31:47.860] <TB2> INFO: Expecting 41600 events.
[18:31:51.470] <TB2> INFO: 41600 events read in total (3018ms).
[18:31:51.471] <TB2> INFO: Test took 3875ms.
[18:31:51.762] <TB2> INFO: Expecting 41600 events.
[18:31:55.205] <TB2> INFO: 41600 events read in total (2852ms).
[18:31:55.206] <TB2> INFO: Test took 3709ms.
[18:31:55.494] <TB2> INFO: Expecting 41600 events.
[18:31:58.956] <TB2> INFO: 41600 events read in total (2871ms).
[18:31:58.956] <TB2> INFO: Test took 3727ms.
[18:31:59.245] <TB2> INFO: Expecting 41600 events.
[18:32:02.769] <TB2> INFO: 41600 events read in total (2933ms).
[18:32:02.770] <TB2> INFO: Test took 3790ms.
[18:32:03.067] <TB2> INFO: Expecting 41600 events.
[18:32:06.569] <TB2> INFO: 41600 events read in total (2910ms).
[18:32:06.570] <TB2> INFO: Test took 3776ms.
[18:32:06.860] <TB2> INFO: Expecting 41600 events.
[18:32:10.369] <TB2> INFO: 41600 events read in total (2917ms).
[18:32:10.370] <TB2> INFO: Test took 3774ms.
[18:32:10.666] <TB2> INFO: Expecting 41600 events.
[18:32:14.230] <TB2> INFO: 41600 events read in total (2972ms).
[18:32:14.231] <TB2> INFO: Test took 3835ms.
[18:32:14.523] <TB2> INFO: Expecting 41600 events.
[18:32:18.007] <TB2> INFO: 41600 events read in total (2892ms).
[18:32:18.008] <TB2> INFO: Test took 3749ms.
[18:32:18.299] <TB2> INFO: Expecting 2560 events.
[18:32:19.188] <TB2> INFO: 2560 events read in total (297ms).
[18:32:19.188] <TB2> INFO: Test took 1165ms.
[18:32:19.496] <TB2> INFO: Expecting 2560 events.
[18:32:20.379] <TB2> INFO: 2560 events read in total (291ms).
[18:32:20.380] <TB2> INFO: Test took 1192ms.
[18:32:20.687] <TB2> INFO: Expecting 2560 events.
[18:32:21.570] <TB2> INFO: 2560 events read in total (291ms).
[18:32:21.570] <TB2> INFO: Test took 1190ms.
[18:32:21.878] <TB2> INFO: Expecting 2560 events.
[18:32:22.767] <TB2> INFO: 2560 events read in total (297ms).
[18:32:22.767] <TB2> INFO: Test took 1196ms.
[18:32:23.075] <TB2> INFO: Expecting 2560 events.
[18:32:23.955] <TB2> INFO: 2560 events read in total (289ms).
[18:32:23.956] <TB2> INFO: Test took 1189ms.
[18:32:24.264] <TB2> INFO: Expecting 2560 events.
[18:32:25.145] <TB2> INFO: 2560 events read in total (289ms).
[18:32:25.145] <TB2> INFO: Test took 1189ms.
[18:32:25.453] <TB2> INFO: Expecting 2560 events.
[18:32:26.332] <TB2> INFO: 2560 events read in total (288ms).
[18:32:26.332] <TB2> INFO: Test took 1187ms.
[18:32:26.640] <TB2> INFO: Expecting 2560 events.
[18:32:27.519] <TB2> INFO: 2560 events read in total (287ms).
[18:32:27.519] <TB2> INFO: Test took 1186ms.
[18:32:27.827] <TB2> INFO: Expecting 2560 events.
[18:32:28.706] <TB2> INFO: 2560 events read in total (288ms).
[18:32:28.706] <TB2> INFO: Test took 1186ms.
[18:32:29.014] <TB2> INFO: Expecting 2560 events.
[18:32:29.892] <TB2> INFO: 2560 events read in total (286ms).
[18:32:29.892] <TB2> INFO: Test took 1185ms.
[18:32:30.200] <TB2> INFO: Expecting 2560 events.
[18:32:31.080] <TB2> INFO: 2560 events read in total (288ms).
[18:32:31.081] <TB2> INFO: Test took 1189ms.
[18:32:31.388] <TB2> INFO: Expecting 2560 events.
[18:32:32.267] <TB2> INFO: 2560 events read in total (287ms).
[18:32:32.267] <TB2> INFO: Test took 1186ms.
[18:32:32.575] <TB2> INFO: Expecting 2560 events.
[18:32:33.457] <TB2> INFO: 2560 events read in total (291ms).
[18:32:33.457] <TB2> INFO: Test took 1190ms.
[18:32:33.764] <TB2> INFO: Expecting 2560 events.
[18:32:34.647] <TB2> INFO: 2560 events read in total (291ms).
[18:32:34.647] <TB2> INFO: Test took 1190ms.
[18:32:34.955] <TB2> INFO: Expecting 2560 events.
[18:32:35.840] <TB2> INFO: 2560 events read in total (293ms).
[18:32:35.840] <TB2> INFO: Test took 1192ms.
[18:32:36.148] <TB2> INFO: Expecting 2560 events.
[18:32:37.029] <TB2> INFO: 2560 events read in total (290ms).
[18:32:37.029] <TB2> INFO: Test took 1189ms.
[18:32:37.032] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:32:37.338] <TB2> INFO: Expecting 655360 events.
[18:32:51.608] <TB2> INFO: 655360 events read in total (13678ms).
[18:32:51.619] <TB2> INFO: Expecting 655360 events.
[18:33:05.622] <TB2> INFO: 655360 events read in total (13601ms).
[18:33:05.637] <TB2> INFO: Expecting 655360 events.
[18:33:19.747] <TB2> INFO: 655360 events read in total (13707ms).
[18:33:19.772] <TB2> INFO: Expecting 655360 events.
[18:33:33.763] <TB2> INFO: 655360 events read in total (13588ms).
[18:33:33.794] <TB2> INFO: Expecting 655360 events.
[18:33:47.825] <TB2> INFO: 655360 events read in total (13628ms).
[18:33:47.852] <TB2> INFO: Expecting 655360 events.
[18:34:01.922] <TB2> INFO: 655360 events read in total (13667ms).
[18:34:01.953] <TB2> INFO: Expecting 655360 events.
[18:34:15.994] <TB2> INFO: 655360 events read in total (13638ms).
[18:34:16.029] <TB2> INFO: Expecting 655360 events.
[18:34:30.068] <TB2> INFO: 655360 events read in total (13637ms).
[18:34:30.114] <TB2> INFO: Expecting 655360 events.
[18:34:44.074] <TB2> INFO: 655360 events read in total (13557ms).
[18:34:44.117] <TB2> INFO: Expecting 655360 events.
[18:34:58.101] <TB2> INFO: 655360 events read in total (13582ms).
[18:34:58.148] <TB2> INFO: Expecting 655360 events.
[18:35:12.156] <TB2> INFO: 655360 events read in total (13605ms).
[18:35:12.209] <TB2> INFO: Expecting 655360 events.
[18:35:26.227] <TB2> INFO: 655360 events read in total (13615ms).
[18:35:26.281] <TB2> INFO: Expecting 655360 events.
[18:35:40.323] <TB2> INFO: 655360 events read in total (13633ms).
[18:35:40.384] <TB2> INFO: Expecting 655360 events.
[18:35:54.434] <TB2> INFO: 655360 events read in total (13647ms).
[18:35:54.498] <TB2> INFO: Expecting 655360 events.
[18:36:08.547] <TB2> INFO: 655360 events read in total (13646ms).
[18:36:08.642] <TB2> INFO: Expecting 655360 events.
[18:36:22.784] <TB2> INFO: 655360 events read in total (13739ms).
[18:36:22.880] <TB2> INFO: Test took 225848ms.
[18:36:22.976] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:36:23.241] <TB2> INFO: Expecting 655360 events.
[18:36:37.334] <TB2> INFO: 655360 events read in total (13501ms).
[18:36:37.345] <TB2> INFO: Expecting 655360 events.
[18:36:51.192] <TB2> INFO: 655360 events read in total (13444ms).
[18:36:51.206] <TB2> INFO: Expecting 655360 events.
[18:37:05.226] <TB2> INFO: 655360 events read in total (13618ms).
[18:37:05.245] <TB2> INFO: Expecting 655360 events.
[18:37:18.993] <TB2> INFO: 655360 events read in total (13345ms).
[18:37:19.015] <TB2> INFO: Expecting 655360 events.
[18:37:32.852] <TB2> INFO: 655360 events read in total (13434ms).
[18:37:32.878] <TB2> INFO: Expecting 655360 events.
[18:37:46.896] <TB2> INFO: 655360 events read in total (13615ms).
[18:37:46.926] <TB2> INFO: Expecting 655360 events.
[18:38:00.697] <TB2> INFO: 655360 events read in total (13368ms).
[18:38:00.731] <TB2> INFO: Expecting 655360 events.
[18:38:14.402] <TB2> INFO: 655360 events read in total (13268ms).
[18:38:14.440] <TB2> INFO: Expecting 655360 events.
[18:38:28.490] <TB2> INFO: 655360 events read in total (13647ms).
[18:38:28.546] <TB2> INFO: Expecting 655360 events.
[18:38:42.442] <TB2> INFO: 655360 events read in total (13493ms).
[18:38:42.505] <TB2> INFO: Expecting 655360 events.
[18:38:56.463] <TB2> INFO: 655360 events read in total (13555ms).
[18:38:56.516] <TB2> INFO: Expecting 655360 events.
[18:39:10.551] <TB2> INFO: 655360 events read in total (13631ms).
[18:39:10.619] <TB2> INFO: Expecting 655360 events.
[18:39:24.613] <TB2> INFO: 655360 events read in total (13591ms).
[18:39:24.677] <TB2> INFO: Expecting 655360 events.
[18:39:38.536] <TB2> INFO: 655360 events read in total (13457ms).
[18:39:38.603] <TB2> INFO: Expecting 655360 events.
[18:39:52.489] <TB2> INFO: 655360 events read in total (13483ms).
[18:39:52.560] <TB2> INFO: Expecting 655360 events.
[18:40:06.577] <TB2> INFO: 655360 events read in total (13614ms).
[18:40:06.671] <TB2> INFO: Test took 223695ms.
[18:40:06.843] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:40:06.847] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:40:06.852] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[18:40:06.856] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:40:06.860] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[18:40:06.865] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[18:40:06.870] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[18:40:06.874] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[18:40:06.879] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[18:40:06.883] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[18:40:06.888] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[18:40:06.892] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[18:40:06.897] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:40:06.901] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[18:40:06.906] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:40:06.910] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:40:06.915] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:40:06.919] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:40:06.924] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:40:06.928] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:40:06.933] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:40:06.937] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[18:40:06.942] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:40:06.946] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:40:06.951] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:40:06.956] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[18:40:06.960] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:40:06.965] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[18:40:06.969] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[18:40:06.003] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C0.dat
[18:40:07.003] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C1.dat
[18:40:07.003] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C2.dat
[18:40:07.003] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C3.dat
[18:40:07.003] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C4.dat
[18:40:07.003] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C5.dat
[18:40:07.003] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C6.dat
[18:40:07.004] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C7.dat
[18:40:07.004] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C8.dat
[18:40:07.004] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C9.dat
[18:40:07.004] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C10.dat
[18:40:07.004] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C11.dat
[18:40:07.004] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C12.dat
[18:40:07.004] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C13.dat
[18:40:07.004] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C14.dat
[18:40:07.004] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//dacParameters35_C15.dat
[18:40:07.281] <TB2> INFO: Expecting 41600 events.
[18:40:10.394] <TB2> INFO: 41600 events read in total (2522ms).
[18:40:10.395] <TB2> INFO: Test took 3388ms.
[18:40:10.838] <TB2> INFO: Expecting 41600 events.
[18:40:13.860] <TB2> INFO: 41600 events read in total (2430ms).
[18:40:13.861] <TB2> INFO: Test took 3254ms.
[18:40:14.304] <TB2> INFO: Expecting 41600 events.
[18:40:17.451] <TB2> INFO: 41600 events read in total (2555ms).
[18:40:17.451] <TB2> INFO: Test took 3379ms.
[18:40:17.671] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:17.760] <TB2> INFO: Expecting 2560 events.
[18:40:18.643] <TB2> INFO: 2560 events read in total (291ms).
[18:40:18.644] <TB2> INFO: Test took 973ms.
[18:40:18.645] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:18.952] <TB2> INFO: Expecting 2560 events.
[18:40:19.834] <TB2> INFO: 2560 events read in total (291ms).
[18:40:19.834] <TB2> INFO: Test took 1189ms.
[18:40:19.836] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:20.143] <TB2> INFO: Expecting 2560 events.
[18:40:21.028] <TB2> INFO: 2560 events read in total (293ms).
[18:40:21.028] <TB2> INFO: Test took 1192ms.
[18:40:21.030] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:21.337] <TB2> INFO: Expecting 2560 events.
[18:40:22.220] <TB2> INFO: 2560 events read in total (292ms).
[18:40:22.221] <TB2> INFO: Test took 1191ms.
[18:40:22.222] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:22.529] <TB2> INFO: Expecting 2560 events.
[18:40:23.414] <TB2> INFO: 2560 events read in total (294ms).
[18:40:23.415] <TB2> INFO: Test took 1193ms.
[18:40:23.417] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:23.723] <TB2> INFO: Expecting 2560 events.
[18:40:24.605] <TB2> INFO: 2560 events read in total (291ms).
[18:40:24.606] <TB2> INFO: Test took 1189ms.
[18:40:24.607] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:24.914] <TB2> INFO: Expecting 2560 events.
[18:40:25.796] <TB2> INFO: 2560 events read in total (290ms).
[18:40:25.797] <TB2> INFO: Test took 1190ms.
[18:40:25.799] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:26.105] <TB2> INFO: Expecting 2560 events.
[18:40:26.988] <TB2> INFO: 2560 events read in total (291ms).
[18:40:26.988] <TB2> INFO: Test took 1189ms.
[18:40:26.990] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:27.296] <TB2> INFO: Expecting 2560 events.
[18:40:28.175] <TB2> INFO: 2560 events read in total (287ms).
[18:40:28.175] <TB2> INFO: Test took 1185ms.
[18:40:28.177] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:28.483] <TB2> INFO: Expecting 2560 events.
[18:40:29.363] <TB2> INFO: 2560 events read in total (288ms).
[18:40:29.364] <TB2> INFO: Test took 1187ms.
[18:40:29.366] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:29.672] <TB2> INFO: Expecting 2560 events.
[18:40:30.553] <TB2> INFO: 2560 events read in total (290ms).
[18:40:30.554] <TB2> INFO: Test took 1189ms.
[18:40:30.556] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:30.862] <TB2> INFO: Expecting 2560 events.
[18:40:31.742] <TB2> INFO: 2560 events read in total (289ms).
[18:40:31.743] <TB2> INFO: Test took 1187ms.
[18:40:31.744] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:32.051] <TB2> INFO: Expecting 2560 events.
[18:40:32.929] <TB2> INFO: 2560 events read in total (286ms).
[18:40:32.929] <TB2> INFO: Test took 1185ms.
[18:40:32.931] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:33.238] <TB2> INFO: Expecting 2560 events.
[18:40:34.116] <TB2> INFO: 2560 events read in total (287ms).
[18:40:34.117] <TB2> INFO: Test took 1186ms.
[18:40:34.118] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:34.425] <TB2> INFO: Expecting 2560 events.
[18:40:35.304] <TB2> INFO: 2560 events read in total (288ms).
[18:40:35.304] <TB2> INFO: Test took 1186ms.
[18:40:35.306] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:35.612] <TB2> INFO: Expecting 2560 events.
[18:40:36.491] <TB2> INFO: 2560 events read in total (287ms).
[18:40:36.491] <TB2> INFO: Test took 1185ms.
[18:40:36.493] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:36.799] <TB2> INFO: Expecting 2560 events.
[18:40:37.677] <TB2> INFO: 2560 events read in total (286ms).
[18:40:37.678] <TB2> INFO: Test took 1185ms.
[18:40:37.680] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:37.986] <TB2> INFO: Expecting 2560 events.
[18:40:38.865] <TB2> INFO: 2560 events read in total (287ms).
[18:40:38.865] <TB2> INFO: Test took 1186ms.
[18:40:38.867] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:39.173] <TB2> INFO: Expecting 2560 events.
[18:40:40.054] <TB2> INFO: 2560 events read in total (288ms).
[18:40:40.054] <TB2> INFO: Test took 1187ms.
[18:40:40.056] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:40.363] <TB2> INFO: Expecting 2560 events.
[18:40:41.242] <TB2> INFO: 2560 events read in total (288ms).
[18:40:41.243] <TB2> INFO: Test took 1187ms.
[18:40:41.244] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:41.551] <TB2> INFO: Expecting 2560 events.
[18:40:42.432] <TB2> INFO: 2560 events read in total (290ms).
[18:40:42.432] <TB2> INFO: Test took 1188ms.
[18:40:42.434] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:42.740] <TB2> INFO: Expecting 2560 events.
[18:40:43.620] <TB2> INFO: 2560 events read in total (288ms).
[18:40:43.620] <TB2> INFO: Test took 1186ms.
[18:40:43.622] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:43.929] <TB2> INFO: Expecting 2560 events.
[18:40:44.807] <TB2> INFO: 2560 events read in total (287ms).
[18:40:44.807] <TB2> INFO: Test took 1185ms.
[18:40:44.809] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:45.116] <TB2> INFO: Expecting 2560 events.
[18:40:45.994] <TB2> INFO: 2560 events read in total (287ms).
[18:40:45.995] <TB2> INFO: Test took 1186ms.
[18:40:45.996] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:46.303] <TB2> INFO: Expecting 2560 events.
[18:40:47.194] <TB2> INFO: 2560 events read in total (299ms).
[18:40:47.194] <TB2> INFO: Test took 1198ms.
[18:40:47.196] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:47.502] <TB2> INFO: Expecting 2560 events.
[18:40:48.389] <TB2> INFO: 2560 events read in total (295ms).
[18:40:48.389] <TB2> INFO: Test took 1193ms.
[18:40:48.391] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:48.697] <TB2> INFO: Expecting 2560 events.
[18:40:49.584] <TB2> INFO: 2560 events read in total (295ms).
[18:40:49.584] <TB2> INFO: Test took 1193ms.
[18:40:49.586] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:49.892] <TB2> INFO: Expecting 2560 events.
[18:40:50.774] <TB2> INFO: 2560 events read in total (290ms).
[18:40:50.775] <TB2> INFO: Test took 1189ms.
[18:40:50.776] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:51.083] <TB2> INFO: Expecting 2560 events.
[18:40:51.966] <TB2> INFO: 2560 events read in total (291ms).
[18:40:51.966] <TB2> INFO: Test took 1190ms.
[18:40:51.968] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:52.275] <TB2> INFO: Expecting 2560 events.
[18:40:53.161] <TB2> INFO: 2560 events read in total (295ms).
[18:40:53.161] <TB2> INFO: Test took 1193ms.
[18:40:53.163] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:53.470] <TB2> INFO: Expecting 2560 events.
[18:40:54.353] <TB2> INFO: 2560 events read in total (291ms).
[18:40:54.353] <TB2> INFO: Test took 1190ms.
[18:40:54.355] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:40:54.662] <TB2> INFO: Expecting 2560 events.
[18:40:55.545] <TB2> INFO: 2560 events read in total (292ms).
[18:40:55.545] <TB2> INFO: Test took 1190ms.
[18:40:56.008] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 628 seconds
[18:40:56.008] <TB2> INFO: PH scale (per ROC): 59 59 48 68 40 71 66 41 61 69 59 46 59 35 44 52
[18:40:56.008] <TB2> INFO: PH offset (per ROC): 109 105 106 126 89 122 115 111 124 126 123 106 114 113 102 113
[18:40:56.014] <TB2> INFO: Decoding statistics:
[18:40:56.014] <TB2> INFO: General information:
[18:40:56.014] <TB2> INFO: 16bit words read: 127886
[18:40:56.014] <TB2> INFO: valid events total: 20480
[18:40:56.014] <TB2> INFO: empty events: 17977
[18:40:56.014] <TB2> INFO: valid events with pixels: 2503
[18:40:56.014] <TB2> INFO: valid pixel hits: 2503
[18:40:56.014] <TB2> INFO: Event errors: 0
[18:40:56.014] <TB2> INFO: start marker: 0
[18:40:56.014] <TB2> INFO: stop marker: 0
[18:40:56.014] <TB2> INFO: overflow: 0
[18:40:56.014] <TB2> INFO: invalid 5bit words: 0
[18:40:56.014] <TB2> INFO: invalid XOR eye diagram: 0
[18:40:56.014] <TB2> INFO: frame (failed synchr.): 0
[18:40:56.014] <TB2> INFO: idle data (no TBM trl): 0
[18:40:56.014] <TB2> INFO: no data (only TBM hdr): 0
[18:40:56.014] <TB2> INFO: TBM errors: 0
[18:40:56.014] <TB2> INFO: flawed TBM headers: 0
[18:40:56.014] <TB2> INFO: flawed TBM trailers: 0
[18:40:56.014] <TB2> INFO: event ID mismatches: 0
[18:40:56.014] <TB2> INFO: ROC errors: 0
[18:40:56.014] <TB2> INFO: missing ROC header(s): 0
[18:40:56.014] <TB2> INFO: misplaced readback start: 0
[18:40:56.014] <TB2> INFO: Pixel decoding errors: 0
[18:40:56.014] <TB2> INFO: pixel data incomplete: 0
[18:40:56.014] <TB2> INFO: pixel address: 0
[18:40:56.014] <TB2> INFO: pulse height fill bit: 0
[18:40:56.014] <TB2> INFO: buffer corruption: 0
[18:40:56.293] <TB2> INFO: ######################################################################
[18:40:56.293] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[18:40:56.293] <TB2> INFO: ######################################################################
[18:40:56.305] <TB2> INFO: scanning low vcal = 10
[18:40:56.537] <TB2> INFO: Expecting 41600 events.
[18:41:00.098] <TB2> INFO: 41600 events read in total (2970ms).
[18:41:00.098] <TB2> INFO: Test took 3793ms.
[18:41:00.100] <TB2> INFO: scanning low vcal = 20
[18:41:00.399] <TB2> INFO: Expecting 41600 events.
[18:41:03.959] <TB2> INFO: 41600 events read in total (2968ms).
[18:41:03.960] <TB2> INFO: Test took 3860ms.
[18:41:03.961] <TB2> INFO: scanning low vcal = 30
[18:41:04.264] <TB2> INFO: Expecting 41600 events.
[18:41:07.898] <TB2> INFO: 41600 events read in total (3042ms).
[18:41:07.899] <TB2> INFO: Test took 3938ms.
[18:41:07.901] <TB2> INFO: scanning low vcal = 40
[18:41:08.180] <TB2> INFO: Expecting 41600 events.
[18:41:12.101] <TB2> INFO: 41600 events read in total (3330ms).
[18:41:12.102] <TB2> INFO: Test took 4201ms.
[18:41:12.105] <TB2> INFO: scanning low vcal = 50
[18:41:12.382] <TB2> INFO: Expecting 41600 events.
[18:41:16.329] <TB2> INFO: 41600 events read in total (3356ms).
[18:41:16.330] <TB2> INFO: Test took 4225ms.
[18:41:16.332] <TB2> INFO: scanning low vcal = 60
[18:41:16.609] <TB2> INFO: Expecting 41600 events.
[18:41:20.540] <TB2> INFO: 41600 events read in total (3339ms).
[18:41:20.541] <TB2> INFO: Test took 4208ms.
[18:41:20.543] <TB2> INFO: scanning low vcal = 70
[18:41:20.820] <TB2> INFO: Expecting 41600 events.
[18:41:24.756] <TB2> INFO: 41600 events read in total (3344ms).
[18:41:24.756] <TB2> INFO: Test took 4213ms.
[18:41:24.759] <TB2> INFO: scanning low vcal = 80
[18:41:25.036] <TB2> INFO: Expecting 41600 events.
[18:41:28.948] <TB2> INFO: 41600 events read in total (3321ms).
[18:41:28.949] <TB2> INFO: Test took 4190ms.
[18:41:28.951] <TB2> INFO: scanning low vcal = 90
[18:41:29.228] <TB2> INFO: Expecting 41600 events.
[18:41:33.155] <TB2> INFO: 41600 events read in total (3335ms).
[18:41:33.155] <TB2> INFO: Test took 4203ms.
[18:41:33.158] <TB2> INFO: scanning low vcal = 100
[18:41:33.435] <TB2> INFO: Expecting 41600 events.
[18:41:37.382] <TB2> INFO: 41600 events read in total (3356ms).
[18:41:37.383] <TB2> INFO: Test took 4225ms.
[18:41:37.385] <TB2> INFO: scanning low vcal = 110
[18:41:37.662] <TB2> INFO: Expecting 41600 events.
[18:41:41.576] <TB2> INFO: 41600 events read in total (3322ms).
[18:41:41.577] <TB2> INFO: Test took 4192ms.
[18:41:41.580] <TB2> INFO: scanning low vcal = 120
[18:41:41.857] <TB2> INFO: Expecting 41600 events.
[18:41:45.768] <TB2> INFO: 41600 events read in total (3320ms).
[18:41:45.769] <TB2> INFO: Test took 4189ms.
[18:41:45.773] <TB2> INFO: scanning low vcal = 130
[18:41:46.049] <TB2> INFO: Expecting 41600 events.
[18:41:49.994] <TB2> INFO: 41600 events read in total (3354ms).
[18:41:49.995] <TB2> INFO: Test took 4222ms.
[18:41:49.997] <TB2> INFO: scanning low vcal = 140
[18:41:50.274] <TB2> INFO: Expecting 41600 events.
[18:41:54.192] <TB2> INFO: 41600 events read in total (3326ms).
[18:41:54.193] <TB2> INFO: Test took 4196ms.
[18:41:54.196] <TB2> INFO: scanning low vcal = 150
[18:41:54.472] <TB2> INFO: Expecting 41600 events.
[18:41:58.405] <TB2> INFO: 41600 events read in total (3341ms).
[18:41:58.405] <TB2> INFO: Test took 4209ms.
[18:41:58.408] <TB2> INFO: scanning low vcal = 160
[18:41:58.685] <TB2> INFO: Expecting 41600 events.
[18:42:02.632] <TB2> INFO: 41600 events read in total (3356ms).
[18:42:02.632] <TB2> INFO: Test took 4224ms.
[18:42:02.635] <TB2> INFO: scanning low vcal = 170
[18:42:02.912] <TB2> INFO: Expecting 41600 events.
[18:42:06.842] <TB2> INFO: 41600 events read in total (3338ms).
[18:42:06.843] <TB2> INFO: Test took 4208ms.
[18:42:06.845] <TB2> INFO: scanning low vcal = 180
[18:42:07.122] <TB2> INFO: Expecting 41600 events.
[18:42:11.038] <TB2> INFO: 41600 events read in total (3324ms).
[18:42:11.038] <TB2> INFO: Test took 4192ms.
[18:42:11.041] <TB2> INFO: scanning low vcal = 190
[18:42:11.318] <TB2> INFO: Expecting 41600 events.
[18:42:15.256] <TB2> INFO: 41600 events read in total (3346ms).
[18:42:15.256] <TB2> INFO: Test took 4215ms.
[18:42:15.259] <TB2> INFO: scanning low vcal = 200
[18:42:15.536] <TB2> INFO: Expecting 41600 events.
[18:42:19.508] <TB2> INFO: 41600 events read in total (3381ms).
[18:42:19.509] <TB2> INFO: Test took 4250ms.
[18:42:19.512] <TB2> INFO: scanning low vcal = 210
[18:42:19.788] <TB2> INFO: Expecting 41600 events.
[18:42:23.743] <TB2> INFO: 41600 events read in total (3363ms).
[18:42:23.745] <TB2> INFO: Test took 4233ms.
[18:42:23.747] <TB2> INFO: scanning low vcal = 220
[18:42:24.024] <TB2> INFO: Expecting 41600 events.
[18:42:27.983] <TB2> INFO: 41600 events read in total (3368ms).
[18:42:27.984] <TB2> INFO: Test took 4237ms.
[18:42:27.987] <TB2> INFO: scanning low vcal = 230
[18:42:28.270] <TB2> INFO: Expecting 41600 events.
[18:42:32.219] <TB2> INFO: 41600 events read in total (3357ms).
[18:42:32.220] <TB2> INFO: Test took 4233ms.
[18:42:32.223] <TB2> INFO: scanning low vcal = 240
[18:42:32.500] <TB2> INFO: Expecting 41600 events.
[18:42:36.442] <TB2> INFO: 41600 events read in total (3351ms).
[18:42:36.443] <TB2> INFO: Test took 4220ms.
[18:42:36.446] <TB2> INFO: scanning low vcal = 250
[18:42:36.722] <TB2> INFO: Expecting 41600 events.
[18:42:40.711] <TB2> INFO: 41600 events read in total (3397ms).
[18:42:40.711] <TB2> INFO: Test took 4265ms.
[18:42:40.715] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[18:42:41.007] <TB2> INFO: Expecting 41600 events.
[18:42:44.963] <TB2> INFO: 41600 events read in total (3364ms).
[18:42:44.964] <TB2> INFO: Test took 4249ms.
[18:42:44.967] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[18:42:45.244] <TB2> INFO: Expecting 41600 events.
[18:42:49.218] <TB2> INFO: 41600 events read in total (3383ms).
[18:42:49.219] <TB2> INFO: Test took 4252ms.
[18:42:49.222] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[18:42:49.501] <TB2> INFO: Expecting 41600 events.
[18:42:53.458] <TB2> INFO: 41600 events read in total (3365ms).
[18:42:53.458] <TB2> INFO: Test took 4236ms.
[18:42:53.461] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[18:42:53.738] <TB2> INFO: Expecting 41600 events.
[18:42:57.747] <TB2> INFO: 41600 events read in total (3418ms).
[18:42:57.748] <TB2> INFO: Test took 4287ms.
[18:42:57.751] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[18:42:58.028] <TB2> INFO: Expecting 41600 events.
[18:43:01.000] <TB2> INFO: 41600 events read in total (3380ms).
[18:43:01.001] <TB2> INFO: Test took 4250ms.
[18:43:02.735] <TB2> INFO: PixTestGainPedestal::measure() done
[18:43:37.458] <TB2> INFO: PixTestGainPedestal::fit() done
[18:43:37.458] <TB2> INFO: non-linearity mean: 0.967 0.980 0.924 0.980 0.964 0.987 0.980 0.933 0.980 0.984 0.984 0.921 0.971 0.998 0.919 0.967
[18:43:37.458] <TB2> INFO: non-linearity RMS: 0.009 0.006 0.089 0.005 0.164 0.004 0.004 0.166 0.004 0.003 0.003 0.117 0.027 0.189 0.133 0.017
[18:43:37.458] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[18:43:37.472] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[18:43:37.486] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[18:43:37.499] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[18:43:37.513] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[18:43:37.526] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[18:43:37.540] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[18:43:37.554] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[18:43:37.567] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[18:43:37.581] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[18:43:37.594] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[18:43:37.607] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[18:43:37.621] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[18:43:37.635] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[18:43:37.648] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[18:43:37.662] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1036_FullQualification_2016-10-26_16h26m_1477492000//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[18:43:37.675] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 161 seconds
[18:43:37.675] <TB2> INFO: Decoding statistics:
[18:43:37.675] <TB2> INFO: General information:
[18:43:37.675] <TB2> INFO: 16bit words read: 3327920
[18:43:37.675] <TB2> INFO: valid events total: 332800
[18:43:37.675] <TB2> INFO: empty events: 0
[18:43:37.675] <TB2> INFO: valid events with pixels: 332800
[18:43:37.675] <TB2> INFO: valid pixel hits: 665560
[18:43:37.675] <TB2> INFO: Event errors: 0
[18:43:37.675] <TB2> INFO: start marker: 0
[18:43:37.676] <TB2> INFO: stop marker: 0
[18:43:37.676] <TB2> INFO: overflow: 0
[18:43:37.676] <TB2> INFO: invalid 5bit words: 0
[18:43:37.676] <TB2> INFO: invalid XOR eye diagram: 0
[18:43:37.676] <TB2> INFO: frame (failed synchr.): 0
[18:43:37.676] <TB2> INFO: idle data (no TBM trl): 0
[18:43:37.676] <TB2> INFO: no data (only TBM hdr): 0
[18:43:37.676] <TB2> INFO: TBM errors: 0
[18:43:37.676] <TB2> INFO: flawed TBM headers: 0
[18:43:37.676] <TB2> INFO: flawed TBM trailers: 0
[18:43:37.676] <TB2> INFO: event ID mismatches: 0
[18:43:37.676] <TB2> INFO: ROC errors: 0
[18:43:37.676] <TB2> INFO: missing ROC header(s): 0
[18:43:37.676] <TB2> INFO: misplaced readback start: 0
[18:43:37.676] <TB2> INFO: Pixel decoding errors: 0
[18:43:37.676] <TB2> INFO: pixel data incomplete: 0
[18:43:37.676] <TB2> INFO: pixel address: 0
[18:43:37.676] <TB2> INFO: pulse height fill bit: 0
[18:43:37.676] <TB2> INFO: buffer corruption: 0
[18:43:37.690] <TB2> INFO: Decoding statistics:
[18:43:37.690] <TB2> INFO: General information:
[18:43:37.690] <TB2> INFO: 16bit words read: 3457342
[18:43:37.690] <TB2> INFO: valid events total: 353536
[18:43:37.690] <TB2> INFO: empty events: 18233
[18:43:37.690] <TB2> INFO: valid events with pixels: 335303
[18:43:37.690] <TB2> INFO: valid pixel hits: 668063
[18:43:37.690] <TB2> INFO: Event errors: 0
[18:43:37.690] <TB2> INFO: start marker: 0
[18:43:37.690] <TB2> INFO: stop marker: 0
[18:43:37.690] <TB2> INFO: overflow: 0
[18:43:37.690] <TB2> INFO: invalid 5bit words: 0
[18:43:37.690] <TB2> INFO: invalid XOR eye diagram: 0
[18:43:37.690] <TB2> INFO: frame (failed synchr.): 0
[18:43:37.690] <TB2> INFO: idle data (no TBM trl): 0
[18:43:37.690] <TB2> INFO: no data (only TBM hdr): 0
[18:43:37.690] <TB2> INFO: TBM errors: 0
[18:43:37.690] <TB2> INFO: flawed TBM headers: 0
[18:43:37.690] <TB2> INFO: flawed TBM trailers: 0
[18:43:37.690] <TB2> INFO: event ID mismatches: 0
[18:43:37.690] <TB2> INFO: ROC errors: 0
[18:43:37.690] <TB2> INFO: missing ROC header(s): 0
[18:43:37.690] <TB2> INFO: misplaced readback start: 0
[18:43:37.690] <TB2> INFO: Pixel decoding errors: 0
[18:43:37.690] <TB2> INFO: pixel data incomplete: 0
[18:43:37.690] <TB2> INFO: pixel address: 0
[18:43:37.690] <TB2> INFO: pulse height fill bit: 0
[18:43:37.690] <TB2> INFO: buffer corruption: 0
[18:43:37.690] <TB2> INFO: enter test to run
[18:43:37.690] <TB2> INFO: test: exit no parameter change
[18:43:37.727] <TB2> QUIET: Connection to board 156 closed.
[18:43:37.729] <TB2> INFO: pXar: this is the end, my friend