[11:30:13.571] <TB3> INFO: *** Welcome to pxar ***
[11:30:13.571] <TB3> INFO: *** Today: 2016/10/21
[11:30:13.579] <TB3> INFO: *** Version: c8ba-dirty
[11:30:13.579] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C15.dat
[11:30:13.580] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//tbmParameters_C1b.dat
[11:30:13.580] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//defaultMaskFile.dat
[11:30:13.580] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters_C15.dat
[11:30:13.655] <TB3> INFO: clk: 4
[11:30:13.655] <TB3> INFO: ctr: 4
[11:30:13.655] <TB3> INFO: sda: 19
[11:30:13.655] <TB3> INFO: tin: 9
[11:30:13.655] <TB3> INFO: level: 15
[11:30:13.655] <TB3> INFO: triggerdelay: 0
[11:30:13.655] <TB3> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[11:30:13.655] <TB3> INFO: Log level: INFO
[11:30:13.664] <TB3> INFO: Found DTB DTB_WWVASW
[11:30:13.672] <TB3> QUIET: Connection to board DTB_WWVASW opened.
[11:30:13.674] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[11:30:13.677] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[11:30:15.172] <TB3> INFO: DUT info:
[11:30:15.172] <TB3> INFO: The DUT currently contains the following objects:
[11:30:15.172] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[11:30:15.172] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:30:15.172] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:30:15.172] <TB3> INFO: TBM Core alpha (2): 7 registers set
[11:30:15.172] <TB3> INFO: TBM Core beta (3): 7 registers set
[11:30:15.172] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[11:30:15.173] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:15.173] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:15.173] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:15.173] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:15.173] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:15.173] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:15.173] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:15.173] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:15.173] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:15.173] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:15.173] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:15.173] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:15.173] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:15.173] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:15.173] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:15.173] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:15.576] <TB3> INFO: enter 'restricted' command line mode
[11:30:15.576] <TB3> INFO: enter test to run
[11:30:15.576] <TB3> INFO: test: pretest no parameter change
[11:30:15.576] <TB3> INFO: running: pretest
[11:30:15.584] <TB3> INFO: ######################################################################
[11:30:15.584] <TB3> INFO: PixTestPretest::doTest()
[11:30:15.584] <TB3> INFO: ######################################################################
[11:30:15.585] <TB3> INFO: ----------------------------------------------------------------------
[11:30:15.585] <TB3> INFO: PixTestPretest::programROC()
[11:30:15.585] <TB3> INFO: ----------------------------------------------------------------------
[11:30:33.600] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:30:33.600] <TB3> INFO: IA differences per ROC: 17.7 20.1 17.7 18.5 18.5 21.7 21.7 20.9 16.9 21.7 20.9 17.7 16.9 20.1 20.9 21.7
[11:30:33.672] <TB3> INFO: ----------------------------------------------------------------------
[11:30:33.672] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:30:33.672] <TB3> INFO: ----------------------------------------------------------------------
[11:30:43.297] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 394.7 mA = 24.6687 mA/ROC
[11:30:43.297] <TB3> INFO: i(loss) [mA/ROC]: 20.9 19.3 20.9 18.5 20.1 20.1 18.5 20.1 19.3 20.1 20.1 20.1 20.1 20.1 19.3 19.3
[11:30:43.334] <TB3> INFO: ----------------------------------------------------------------------
[11:30:43.334] <TB3> INFO: PixTestPretest::findTiming()
[11:30:43.334] <TB3> INFO: ----------------------------------------------------------------------
[11:30:43.334] <TB3> INFO: PixTestCmd::init()

[11:31:15.504] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[11:31:15.504] <TB3> INFO: (success/tries = 100/100), width = 3
[11:31:17.010] <TB3> INFO: ----------------------------------------------------------------------
[11:31:17.010] <TB3> INFO: PixTestPretest::findWorkingPixel()
[11:31:17.010] <TB3> INFO: ----------------------------------------------------------------------
[11:31:17.105] <TB3> INFO: Expecting 231680 events.
[11:31:26.940] <TB3> INFO: 231680 events read in total (9243ms).
[11:31:26.948] <TB3> INFO: Test took 9933ms.
[11:31:27.186] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:31:27.216] <TB3> INFO: ----------------------------------------------------------------------
[11:31:27.217] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[11:31:27.217] <TB3> INFO: ----------------------------------------------------------------------
[11:31:27.309] <TB3> INFO: Expecting 231680 events.
[11:31:37.319] <TB3> INFO: 231680 events read in total (9418ms).
[11:31:37.332] <TB3> INFO: Test took 10112ms.
[11:31:37.599] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[11:31:37.599] <TB3> INFO: CalDel: 80 82 88 86 85 91 81 93 101 111 101 111 94 92 103 113
[11:31:37.599] <TB3> INFO: VthrComp: 54 51 51 52 51 51 53 54 51 51 51 51 51 51 51 51
[11:31:37.602] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C0.dat
[11:31:37.603] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C1.dat
[11:31:37.603] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C2.dat
[11:31:37.603] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C3.dat
[11:31:37.603] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C4.dat
[11:31:37.603] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C5.dat
[11:31:37.604] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C6.dat
[11:31:37.604] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C7.dat
[11:31:37.604] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C8.dat
[11:31:37.604] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C9.dat
[11:31:37.605] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C10.dat
[11:31:37.605] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C11.dat
[11:31:37.605] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C12.dat
[11:31:37.605] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C13.dat
[11:31:37.605] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C14.dat
[11:31:37.606] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C15.dat
[11:31:37.606] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//tbmParameters_C0a.dat
[11:31:37.606] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//tbmParameters_C0b.dat
[11:31:37.606] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//tbmParameters_C1a.dat
[11:31:37.606] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//tbmParameters_C1b.dat
[11:31:37.607] <TB3> INFO: PixTestPretest::doTest() done, duration: 82 seconds
[11:31:37.670] <TB3> INFO: enter test to run
[11:31:37.670] <TB3> INFO: test: FullTest no parameter change
[11:31:37.670] <TB3> INFO: running: fulltest
[11:31:37.670] <TB3> INFO: ######################################################################
[11:31:37.670] <TB3> INFO: PixTestFullTest::doTest()
[11:31:37.670] <TB3> INFO: ######################################################################
[11:31:37.671] <TB3> INFO: ######################################################################
[11:31:37.671] <TB3> INFO: PixTestAlive::doTest()
[11:31:37.671] <TB3> INFO: ######################################################################
[11:31:37.672] <TB3> INFO: ----------------------------------------------------------------------
[11:31:37.673] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:31:37.673] <TB3> INFO: ----------------------------------------------------------------------
[11:31:37.920] <TB3> INFO: Expecting 41600 events.
[11:31:41.471] <TB3> INFO: 41600 events read in total (2959ms).
[11:31:41.472] <TB3> INFO: Test took 3798ms.
[11:31:41.707] <TB3> INFO: PixTestAlive::aliveTest() done
[11:31:41.707] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:31:41.708] <TB3> INFO: ----------------------------------------------------------------------
[11:31:41.708] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:31:41.709] <TB3> INFO: ----------------------------------------------------------------------
[11:31:41.956] <TB3> INFO: Expecting 41600 events.
[11:31:45.059] <TB3> INFO: 41600 events read in total (2512ms).
[11:31:45.059] <TB3> INFO: Test took 3348ms.
[11:31:45.060] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:31:45.300] <TB3> INFO: PixTestAlive::maskTest() done
[11:31:45.300] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:31:45.302] <TB3> INFO: ----------------------------------------------------------------------
[11:31:45.302] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:31:45.302] <TB3> INFO: ----------------------------------------------------------------------
[11:31:45.547] <TB3> INFO: Expecting 41600 events.
[11:31:49.188] <TB3> INFO: 41600 events read in total (3049ms).
[11:31:49.189] <TB3> INFO: Test took 3885ms.
[11:31:49.427] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[11:31:49.427] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:31:49.428] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[11:31:49.428] <TB3> INFO: Decoding statistics:
[11:31:49.428] <TB3> INFO: General information:
[11:31:49.428] <TB3> INFO: 16bit words read: 0
[11:31:49.428] <TB3> INFO: valid events total: 0
[11:31:49.428] <TB3> INFO: empty events: 0
[11:31:49.428] <TB3> INFO: valid events with pixels: 0
[11:31:49.428] <TB3> INFO: valid pixel hits: 0
[11:31:49.428] <TB3> INFO: Event errors: 0
[11:31:49.428] <TB3> INFO: start marker: 0
[11:31:49.428] <TB3> INFO: stop marker: 0
[11:31:49.428] <TB3> INFO: overflow: 0
[11:31:49.428] <TB3> INFO: invalid 5bit words: 0
[11:31:49.428] <TB3> INFO: invalid XOR eye diagram: 0
[11:31:49.428] <TB3> INFO: frame (failed synchr.): 0
[11:31:49.428] <TB3> INFO: idle data (no TBM trl): 0
[11:31:49.428] <TB3> INFO: no data (only TBM hdr): 0
[11:31:49.428] <TB3> INFO: TBM errors: 0
[11:31:49.428] <TB3> INFO: flawed TBM headers: 0
[11:31:49.428] <TB3> INFO: flawed TBM trailers: 0
[11:31:49.428] <TB3> INFO: event ID mismatches: 0
[11:31:49.428] <TB3> INFO: ROC errors: 0
[11:31:49.428] <TB3> INFO: missing ROC header(s): 0
[11:31:49.428] <TB3> INFO: misplaced readback start: 0
[11:31:49.428] <TB3> INFO: Pixel decoding errors: 0
[11:31:49.428] <TB3> INFO: pixel data incomplete: 0
[11:31:49.428] <TB3> INFO: pixel address: 0
[11:31:49.428] <TB3> INFO: pulse height fill bit: 0
[11:31:49.428] <TB3> INFO: buffer corruption: 0
[11:31:49.436] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C15.dat
[11:31:49.436] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr_C15.dat

[11:31:49.436] <TB3> INFO: ######################################################################
[11:31:49.436] <TB3> INFO: PixTestReadback::doTest()
[11:31:49.436] <TB3> INFO: ######################################################################
[11:31:49.436] <TB3> INFO: ----------------------------------------------------------------------
[11:31:49.436] <TB3> INFO: PixTestReadback::CalibrateVd()
[11:31:49.436] <TB3> INFO: ----------------------------------------------------------------------
[11:31:59.412] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C0.dat
[11:31:59.412] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C1.dat
[11:31:59.412] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C2.dat
[11:31:59.412] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C3.dat
[11:31:59.412] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C4.dat
[11:31:59.413] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C5.dat
[11:31:59.413] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C6.dat
[11:31:59.413] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C7.dat
[11:31:59.413] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C8.dat
[11:31:59.413] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C9.dat
[11:31:59.413] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C10.dat
[11:31:59.413] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C11.dat
[11:31:59.413] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C12.dat
[11:31:59.413] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C13.dat
[11:31:59.413] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C14.dat
[11:31:59.413] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C15.dat
[11:31:59.445] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:31:59.445] <TB3> INFO: ----------------------------------------------------------------------
[11:31:59.445] <TB3> INFO: PixTestReadback::CalibrateVa()
[11:31:59.445] <TB3> INFO: ----------------------------------------------------------------------
[11:32:09.382] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C0.dat
[11:32:09.382] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C1.dat
[11:32:09.382] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C2.dat
[11:32:09.382] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C3.dat
[11:32:09.382] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C4.dat
[11:32:09.382] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C5.dat
[11:32:09.382] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C6.dat
[11:32:09.382] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C7.dat
[11:32:09.383] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C8.dat
[11:32:09.383] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C9.dat
[11:32:09.383] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C10.dat
[11:32:09.383] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C11.dat
[11:32:09.383] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C12.dat
[11:32:09.383] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C13.dat
[11:32:09.383] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C14.dat
[11:32:09.383] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C15.dat
[11:32:09.414] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:32:09.414] <TB3> INFO: ----------------------------------------------------------------------
[11:32:09.414] <TB3> INFO: PixTestReadback::readbackVbg()
[11:32:09.414] <TB3> INFO: ----------------------------------------------------------------------
[11:32:17.090] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:32:17.090] <TB3> INFO: ----------------------------------------------------------------------
[11:32:17.090] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[11:32:17.090] <TB3> INFO: ----------------------------------------------------------------------
[11:32:17.090] <TB3> INFO: Vbg will be calibrated using Vd calibration
[11:32:17.090] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 149calibrated Vbg = 1.21064 :::*/*/*/*/
[11:32:17.090] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 153.2calibrated Vbg = 1.21456 :::*/*/*/*/
[11:32:17.090] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 155.8calibrated Vbg = 1.20706 :::*/*/*/*/
[11:32:17.090] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 161.8calibrated Vbg = 1.21108 :::*/*/*/*/
[11:32:17.090] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 161.9calibrated Vbg = 1.20518 :::*/*/*/*/
[11:32:17.091] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 151calibrated Vbg = 1.20481 :::*/*/*/*/
[11:32:17.091] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 158.7calibrated Vbg = 1.21627 :::*/*/*/*/
[11:32:17.091] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 153.2calibrated Vbg = 1.2158 :::*/*/*/*/
[11:32:17.091] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 151.6calibrated Vbg = 1.21192 :::*/*/*/*/
[11:32:17.091] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 155.7calibrated Vbg = 1.21487 :::*/*/*/*/
[11:32:17.091] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 156.7calibrated Vbg = 1.20091 :::*/*/*/*/
[11:32:17.091] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 156.2calibrated Vbg = 1.20332 :::*/*/*/*/
[11:32:17.091] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 157calibrated Vbg = 1.20819 :::*/*/*/*/
[11:32:17.091] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 163.7calibrated Vbg = 1.20785 :::*/*/*/*/
[11:32:17.091] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 158.9calibrated Vbg = 1.21036 :::*/*/*/*/
[11:32:17.091] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 159.8calibrated Vbg = 1.20866 :::*/*/*/*/
[11:32:17.093] <TB3> INFO: ----------------------------------------------------------------------
[11:32:17.093] <TB3> INFO: PixTestReadback::CalibrateIa()
[11:32:17.093] <TB3> INFO: ----------------------------------------------------------------------
[11:34:57.919] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C0.dat
[11:34:57.919] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C1.dat
[11:34:57.919] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C2.dat
[11:34:57.919] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C3.dat
[11:34:57.919] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C4.dat
[11:34:57.919] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C5.dat
[11:34:57.919] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C6.dat
[11:34:57.919] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C7.dat
[11:34:57.919] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C8.dat
[11:34:57.919] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C9.dat
[11:34:57.920] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C10.dat
[11:34:57.920] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C11.dat
[11:34:57.920] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C12.dat
[11:34:57.920] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C13.dat
[11:34:57.920] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C14.dat
[11:34:57.920] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C15.dat
[11:34:57.950] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:34:57.951] <TB3> INFO: PixTestReadback::doTest() done
[11:34:57.951] <TB3> INFO: Decoding statistics:
[11:34:57.951] <TB3> INFO: General information:
[11:34:57.951] <TB3> INFO: 16bit words read: 1536
[11:34:57.951] <TB3> INFO: valid events total: 256
[11:34:57.951] <TB3> INFO: empty events: 256
[11:34:57.951] <TB3> INFO: valid events with pixels: 0
[11:34:57.951] <TB3> INFO: valid pixel hits: 0
[11:34:57.951] <TB3> INFO: Event errors: 0
[11:34:57.951] <TB3> INFO: start marker: 0
[11:34:57.951] <TB3> INFO: stop marker: 0
[11:34:57.951] <TB3> INFO: overflow: 0
[11:34:57.951] <TB3> INFO: invalid 5bit words: 0
[11:34:57.951] <TB3> INFO: invalid XOR eye diagram: 0
[11:34:57.951] <TB3> INFO: frame (failed synchr.): 0
[11:34:57.951] <TB3> INFO: idle data (no TBM trl): 0
[11:34:57.951] <TB3> INFO: no data (only TBM hdr): 0
[11:34:57.951] <TB3> INFO: TBM errors: 0
[11:34:57.951] <TB3> INFO: flawed TBM headers: 0
[11:34:57.951] <TB3> INFO: flawed TBM trailers: 0
[11:34:57.951] <TB3> INFO: event ID mismatches: 0
[11:34:57.951] <TB3> INFO: ROC errors: 0
[11:34:57.951] <TB3> INFO: missing ROC header(s): 0
[11:34:57.951] <TB3> INFO: misplaced readback start: 0
[11:34:57.951] <TB3> INFO: Pixel decoding errors: 0
[11:34:57.951] <TB3> INFO: pixel data incomplete: 0
[11:34:57.951] <TB3> INFO: pixel address: 0
[11:34:57.951] <TB3> INFO: pulse height fill bit: 0
[11:34:57.951] <TB3> INFO: buffer corruption: 0
[11:34:57.998] <TB3> INFO: ######################################################################
[11:34:57.998] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:34:57.998] <TB3> INFO: ######################################################################
[11:34:57.000] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[11:34:58.013] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:34:58.013] <TB3> INFO: run 1 of 1
[11:34:58.251] <TB3> INFO: Expecting 3120000 events.
[11:35:29.577] <TB3> INFO: 673720 events read in total (30735ms).











[11:35:59.873] <TB3> INFO: 1341455 events read in total (61031ms).





















[11:36:30.541] <TB3> INFO: 2006595 events read in total (91699ms).











[11:37:00.791] <TB3> INFO: 2671720 events read in total (121949ms).











[11:37:22.093] <TB3> INFO: 3120000 events read in total (143251ms).
[11:37:22.180] <TB3> INFO: Test took 144169ms.
[11:37:47.678] <TB3> INFO: PixTestBBMap::doTest() done with 1 decoding errors: , duration: 169 seconds
[11:37:47.678] <TB3> INFO: number of dead bumps (per ROC): 0 1 0 0 2 0 0 0 0 1 0 3 1 0 0 0
[11:37:47.678] <TB3> INFO: separation cut (per ROC): 124 109 112 110 105 111 122 124 102 107 110 108 109 119 108 105
[11:37:47.678] <TB3> INFO: Decoding statistics:
[11:37:47.678] <TB3> INFO: General information:
[11:37:47.678] <TB3> INFO: 16bit words read: 0
[11:37:47.678] <TB3> INFO: valid events total: 0
[11:37:47.678] <TB3> INFO: empty events: 0
[11:37:47.678] <TB3> INFO: valid events with pixels: 0
[11:37:47.678] <TB3> INFO: valid pixel hits: 0
[11:37:47.678] <TB3> INFO: Event errors: 0
[11:37:47.678] <TB3> INFO: start marker: 0
[11:37:47.678] <TB3> INFO: stop marker: 0
[11:37:47.678] <TB3> INFO: overflow: 0
[11:37:47.678] <TB3> INFO: invalid 5bit words: 0
[11:37:47.678] <TB3> INFO: invalid XOR eye diagram: 0
[11:37:47.678] <TB3> INFO: frame (failed synchr.): 0
[11:37:47.678] <TB3> INFO: idle data (no TBM trl): 0
[11:37:47.678] <TB3> INFO: no data (only TBM hdr): 0
[11:37:47.678] <TB3> INFO: TBM errors: 0
[11:37:47.678] <TB3> INFO: flawed TBM headers: 0
[11:37:47.678] <TB3> INFO: flawed TBM trailers: 0
[11:37:47.678] <TB3> INFO: event ID mismatches: 0
[11:37:47.678] <TB3> INFO: ROC errors: 0
[11:37:47.678] <TB3> INFO: missing ROC header(s): 0
[11:37:47.678] <TB3> INFO: misplaced readback start: 0
[11:37:47.678] <TB3> INFO: Pixel decoding errors: 0
[11:37:47.678] <TB3> INFO: pixel data incomplete: 0
[11:37:47.678] <TB3> INFO: pixel address: 0
[11:37:47.678] <TB3> INFO: pulse height fill bit: 0
[11:37:47.678] <TB3> INFO: buffer corruption: 0
[11:37:47.715] <TB3> INFO: ######################################################################
[11:37:47.715] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:37:47.715] <TB3> INFO: ######################################################################
[11:37:47.715] <TB3> INFO: ----------------------------------------------------------------------
[11:37:47.715] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:37:47.715] <TB3> INFO: ----------------------------------------------------------------------
[11:37:47.715] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[11:37:47.729] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[11:37:47.729] <TB3> INFO: run 1 of 1
[11:37:48.011] <TB3> INFO: Expecting 36608000 events.
[11:38:11.672] <TB3> INFO: 703000 events read in total (23069ms).
[11:38:34.582] <TB3> INFO: 1387050 events read in total (45979ms).
[11:38:57.376] <TB3> INFO: 2073100 events read in total (68773ms).
[11:39:20.088] <TB3> INFO: 2755450 events read in total (91485ms).
[11:39:43.028] <TB3> INFO: 3440700 events read in total (114425ms).
[11:40:05.790] <TB3> INFO: 4124350 events read in total (137187ms).
[11:40:28.490] <TB3> INFO: 4807800 events read in total (159887ms).
[11:40:51.252] <TB3> INFO: 5488100 events read in total (182649ms).
[11:41:13.896] <TB3> INFO: 6174350 events read in total (205293ms).
[11:41:36.931] <TB3> INFO: 6856900 events read in total (228328ms).
[11:41:59.943] <TB3> INFO: 7538900 events read in total (251340ms).
[11:42:22.469] <TB3> INFO: 8218650 events read in total (273866ms).
[11:42:45.276] <TB3> INFO: 8902350 events read in total (296673ms).
[11:43:08.159] <TB3> INFO: 9583650 events read in total (319556ms).
[11:43:30.992] <TB3> INFO: 10267300 events read in total (342389ms).
[11:43:53.851] <TB3> INFO: 10949550 events read in total (365248ms).
[11:44:16.674] <TB3> INFO: 11631200 events read in total (388071ms).
[11:44:39.529] <TB3> INFO: 12311300 events read in total (410926ms).
[11:45:02.309] <TB3> INFO: 12992200 events read in total (433706ms).
[11:45:25.131] <TB3> INFO: 13675250 events read in total (456528ms).
[11:45:48.007] <TB3> INFO: 14358100 events read in total (479404ms).
[11:46:11.280] <TB3> INFO: 15040850 events read in total (502677ms).
[11:46:34.243] <TB3> INFO: 15720650 events read in total (525640ms).
[11:46:57.191] <TB3> INFO: 16400300 events read in total (548588ms).
[11:47:19.942] <TB3> INFO: 17079500 events read in total (571339ms).
[11:47:42.648] <TB3> INFO: 17761350 events read in total (594045ms).
[11:48:05.845] <TB3> INFO: 18441150 events read in total (617242ms).
[11:48:28.768] <TB3> INFO: 19119050 events read in total (640165ms).
[11:48:51.827] <TB3> INFO: 19796000 events read in total (663224ms).
[11:49:14.559] <TB3> INFO: 20474400 events read in total (685956ms).
[11:49:37.440] <TB3> INFO: 21150350 events read in total (708837ms).
[11:50:00.323] <TB3> INFO: 21828600 events read in total (731720ms).
[11:50:23.219] <TB3> INFO: 22505150 events read in total (754616ms).
[11:50:45.969] <TB3> INFO: 23180100 events read in total (777366ms).
[11:51:08.727] <TB3> INFO: 23854450 events read in total (800124ms).
[11:51:31.913] <TB3> INFO: 24532450 events read in total (823310ms).
[11:51:54.841] <TB3> INFO: 25208650 events read in total (846238ms).
[11:52:17.890] <TB3> INFO: 25886900 events read in total (869287ms).
[11:52:40.953] <TB3> INFO: 26563500 events read in total (892350ms).
[11:53:04.238] <TB3> INFO: 27243000 events read in total (915635ms).
[11:53:27.039] <TB3> INFO: 27920750 events read in total (938436ms).
[11:53:50.238] <TB3> INFO: 28597650 events read in total (961636ms).
[11:54:12.920] <TB3> INFO: 29273800 events read in total (984317ms).
[11:54:35.957] <TB3> INFO: 29951700 events read in total (1007354ms).
[11:54:59.032] <TB3> INFO: 30628350 events read in total (1030429ms).
[11:55:21.000] <TB3> INFO: 31304100 events read in total (1053397ms).
[11:55:44.856] <TB3> INFO: 31981900 events read in total (1076253ms).
[11:56:08.074] <TB3> INFO: 32656550 events read in total (1099471ms).
[11:56:31.257] <TB3> INFO: 33335000 events read in total (1122654ms).
[11:56:54.442] <TB3> INFO: 34012800 events read in total (1145839ms).
[11:57:17.515] <TB3> INFO: 34691600 events read in total (1168912ms).
[11:57:40.558] <TB3> INFO: 35368250 events read in total (1191955ms).
[11:58:03.663] <TB3> INFO: 36051650 events read in total (1215060ms).
[11:58:23.180] <TB3> INFO: 36608000 events read in total (1234577ms).
[11:58:23.283] <TB3> INFO: Test took 1235552ms.
[11:58:23.841] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:58:25.586] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:58:27.803] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:58:29.411] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:58:30.885] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:58:32.346] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:58:33.847] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:58:35.314] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:58:36.854] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:58:38.333] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:58:39.834] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:58:41.877] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:58:43.762] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:58:45.249] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:58:46.791] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:58:48.694] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:58:50.669] <TB3> INFO: PixTestScurves::scurves() done
[11:58:50.669] <TB3> INFO: Vcal mean: 132.19 129.21 126.82 137.32 124.83 129.32 141.69 133.39 121.12 120.36 124.42 122.10 132.77 130.92 132.88 128.86
[11:58:50.669] <TB3> INFO: Vcal RMS: 6.13 6.19 5.78 6.08 5.94 6.01 5.32 6.01 5.74 5.80 6.66 6.77 6.42 5.81 6.99 6.20
[11:58:50.669] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1262 seconds
[11:58:50.670] <TB3> INFO: Decoding statistics:
[11:58:50.670] <TB3> INFO: General information:
[11:58:50.670] <TB3> INFO: 16bit words read: 0
[11:58:50.670] <TB3> INFO: valid events total: 0
[11:58:50.670] <TB3> INFO: empty events: 0
[11:58:50.670] <TB3> INFO: valid events with pixels: 0
[11:58:50.670] <TB3> INFO: valid pixel hits: 0
[11:58:50.670] <TB3> INFO: Event errors: 0
[11:58:50.670] <TB3> INFO: start marker: 0
[11:58:50.670] <TB3> INFO: stop marker: 0
[11:58:50.670] <TB3> INFO: overflow: 0
[11:58:50.670] <TB3> INFO: invalid 5bit words: 0
[11:58:50.670] <TB3> INFO: invalid XOR eye diagram: 0
[11:58:50.670] <TB3> INFO: frame (failed synchr.): 0
[11:58:50.670] <TB3> INFO: idle data (no TBM trl): 0
[11:58:50.670] <TB3> INFO: no data (only TBM hdr): 0
[11:58:50.670] <TB3> INFO: TBM errors: 0
[11:58:50.670] <TB3> INFO: flawed TBM headers: 0
[11:58:50.670] <TB3> INFO: flawed TBM trailers: 0
[11:58:50.670] <TB3> INFO: event ID mismatches: 0
[11:58:50.670] <TB3> INFO: ROC errors: 0
[11:58:50.670] <TB3> INFO: missing ROC header(s): 0
[11:58:50.670] <TB3> INFO: misplaced readback start: 0
[11:58:50.670] <TB3> INFO: Pixel decoding errors: 0
[11:58:50.670] <TB3> INFO: pixel data incomplete: 0
[11:58:50.670] <TB3> INFO: pixel address: 0
[11:58:50.670] <TB3> INFO: pulse height fill bit: 0
[11:58:50.670] <TB3> INFO: buffer corruption: 0
[11:58:50.752] <TB3> INFO: ######################################################################
[11:58:50.753] <TB3> INFO: PixTestTrim::doTest()
[11:58:50.753] <TB3> INFO: ######################################################################
[11:58:50.754] <TB3> INFO: ----------------------------------------------------------------------
[11:58:50.754] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[11:58:50.754] <TB3> INFO: ----------------------------------------------------------------------
[11:58:50.812] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:58:50.812] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:58:50.825] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:58:50.825] <TB3> INFO: run 1 of 1
[11:58:51.100] <TB3> INFO: Expecting 5025280 events.
[11:59:22.007] <TB3> INFO: 834448 events read in total (30303ms).
[11:59:52.004] <TB3> INFO: 1665912 events read in total (60300ms).
[12:00:22.341] <TB3> INFO: 2495472 events read in total (90637ms).
[12:00:52.710] <TB3> INFO: 3320712 events read in total (121006ms).
[12:01:23.166] <TB3> INFO: 4143440 events read in total (151463ms).
[12:01:53.551] <TB3> INFO: 4966952 events read in total (181847ms).
[12:01:56.073] <TB3> INFO: 5025280 events read in total (184369ms).
[12:01:56.120] <TB3> INFO: Test took 185295ms.
[12:02:11.538] <TB3> INFO: ROC 0 VthrComp = 133
[12:02:11.539] <TB3> INFO: ROC 1 VthrComp = 131
[12:02:11.539] <TB3> INFO: ROC 2 VthrComp = 130
[12:02:11.539] <TB3> INFO: ROC 3 VthrComp = 132
[12:02:11.539] <TB3> INFO: ROC 4 VthrComp = 127
[12:02:11.541] <TB3> INFO: ROC 5 VthrComp = 136
[12:02:11.543] <TB3> INFO: ROC 6 VthrComp = 132
[12:02:11.543] <TB3> INFO: ROC 7 VthrComp = 136
[12:02:11.543] <TB3> INFO: ROC 8 VthrComp = 113
[12:02:11.543] <TB3> INFO: ROC 9 VthrComp = 127
[12:02:11.544] <TB3> INFO: ROC 10 VthrComp = 127
[12:02:11.544] <TB3> INFO: ROC 11 VthrComp = 122
[12:02:11.544] <TB3> INFO: ROC 12 VthrComp = 130
[12:02:11.544] <TB3> INFO: ROC 13 VthrComp = 134
[12:02:11.545] <TB3> INFO: ROC 14 VthrComp = 128
[12:02:11.545] <TB3> INFO: ROC 15 VthrComp = 120
[12:02:11.834] <TB3> INFO: Expecting 41600 events.
[12:02:15.469] <TB3> INFO: 41600 events read in total (3044ms).
[12:02:15.470] <TB3> INFO: Test took 3924ms.
[12:02:15.479] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:02:15.479] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:02:15.492] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:02:15.492] <TB3> INFO: run 1 of 1
[12:02:15.770] <TB3> INFO: Expecting 5025280 events.
[12:02:42.858] <TB3> INFO: 592968 events read in total (26497ms).
[12:03:09.238] <TB3> INFO: 1184312 events read in total (52877ms).
[12:03:35.371] <TB3> INFO: 1775816 events read in total (79010ms).
[12:04:01.330] <TB3> INFO: 2367336 events read in total (104969ms).
[12:04:27.659] <TB3> INFO: 2956688 events read in total (131298ms).
[12:04:53.716] <TB3> INFO: 3543480 events read in total (157355ms).
[12:05:20.070] <TB3> INFO: 4129880 events read in total (183709ms).
[12:05:46.492] <TB3> INFO: 4715760 events read in total (210131ms).
[12:06:00.159] <TB3> INFO: 5025280 events read in total (223798ms).
[12:06:00.237] <TB3> INFO: Test took 224745ms.
[12:06:27.654] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 67.2616 for pixel 51/5 mean/min/max = 52.7877/37.6845/67.8909
[12:06:27.655] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 62.6151 for pixel 1/0 mean/min/max = 47.0288/31.2142/62.8434
[12:06:27.655] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 61.8014 for pixel 8/13 mean/min/max = 47.9084/33.8273/61.9895
[12:06:27.655] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 66.8241 for pixel 13/3 mean/min/max = 50.3909/33.6438/67.138
[12:06:27.656] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 61.077 for pixel 0/0 mean/min/max = 46.0772/31.0509/61.1036
[12:06:27.656] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 60.1058 for pixel 18/1 mean/min/max = 47.1526/34.1655/60.1396
[12:06:27.657] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 72.4826 for pixel 6/78 mean/min/max = 55.8195/38.9241/72.7148
[12:06:27.657] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 67.5005 for pixel 0/14 mean/min/max = 52.1596/36.5217/67.7976
[12:06:27.658] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 65.1747 for pixel 43/14 mean/min/max = 48.6368/31.9233/65.3504
[12:06:27.658] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 59.6136 for pixel 0/10 mean/min/max = 45.7684/31.9116/59.6253
[12:06:27.658] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 61.8117 for pixel 0/13 mean/min/max = 46.7634/31.57/61.9569
[12:06:27.659] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 61.4108 for pixel 20/69 mean/min/max = 47.1571/32.8445/61.4697
[12:06:27.659] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 62.4801 for pixel 0/6 mean/min/max = 46.8174/31.1193/62.5155
[12:06:27.660] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 60.3111 for pixel 11/71 mean/min/max = 46.8116/33.292/60.3311
[12:06:27.660] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 64.8449 for pixel 0/6 mean/min/max = 48.408/31.6345/65.1815
[12:06:27.660] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 65.8608 for pixel 0/5 mean/min/max = 49.1277/31.9914/66.264
[12:06:27.661] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:06:27.749] <TB3> INFO: Expecting 411648 events.
[12:06:37.299] <TB3> INFO: 411648 events read in total (8958ms).
[12:06:37.309] <TB3> INFO: Expecting 411648 events.
[12:06:46.746] <TB3> INFO: 411648 events read in total (9034ms).
[12:06:46.757] <TB3> INFO: Expecting 411648 events.
[12:06:56.117] <TB3> INFO: 411648 events read in total (8957ms).
[12:06:56.131] <TB3> INFO: Expecting 411648 events.
[12:07:05.504] <TB3> INFO: 411648 events read in total (8970ms).
[12:07:05.521] <TB3> INFO: Expecting 411648 events.
[12:07:14.879] <TB3> INFO: 411648 events read in total (8955ms).
[12:07:14.903] <TB3> INFO: Expecting 411648 events.
[12:07:24.280] <TB3> INFO: 411648 events read in total (8973ms).
[12:07:24.304] <TB3> INFO: Expecting 411648 events.
[12:07:33.662] <TB3> INFO: 411648 events read in total (8955ms).
[12:07:33.687] <TB3> INFO: Expecting 411648 events.
[12:07:43.021] <TB3> INFO: 411648 events read in total (8931ms).
[12:07:43.049] <TB3> INFO: Expecting 411648 events.
[12:07:52.516] <TB3> INFO: 411648 events read in total (9064ms).
[12:07:52.577] <TB3> INFO: Expecting 411648 events.
[12:08:01.837] <TB3> INFO: 411648 events read in total (8857ms).
[12:08:01.885] <TB3> INFO: Expecting 411648 events.
[12:08:11.209] <TB3> INFO: 411648 events read in total (8921ms).
[12:08:11.291] <TB3> INFO: Expecting 411648 events.
[12:08:20.594] <TB3> INFO: 411648 events read in total (8900ms).
[12:08:20.645] <TB3> INFO: Expecting 411648 events.
[12:08:30.009] <TB3> INFO: 411648 events read in total (8961ms).
[12:08:30.061] <TB3> INFO: Expecting 411648 events.
[12:08:39.505] <TB3> INFO: 411648 events read in total (9040ms).
[12:08:39.684] <TB3> INFO: Expecting 411648 events.
[12:08:48.919] <TB3> INFO: 411648 events read in total (8832ms).
[12:08:48.975] <TB3> INFO: Expecting 411648 events.
[12:08:58.159] <TB3> INFO: 411648 events read in total (8781ms).
[12:08:58.244] <TB3> INFO: Test took 150583ms.
[12:08:58.945] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[12:08:58.958] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:08:58.958] <TB3> INFO: run 1 of 1
[12:08:59.197] <TB3> INFO: Expecting 5025280 events.
[12:09:25.515] <TB3> INFO: 589128 events read in total (25727ms).
[12:09:51.290] <TB3> INFO: 1176584 events read in total (51502ms).
[12:10:17.852] <TB3> INFO: 1765168 events read in total (78064ms).
[12:10:44.082] <TB3> INFO: 2351400 events read in total (104294ms).
[12:11:10.639] <TB3> INFO: 2940624 events read in total (130851ms).
[12:11:37.066] <TB3> INFO: 3530168 events read in total (157278ms).
[12:12:03.579] <TB3> INFO: 4117592 events read in total (183791ms).
[12:12:29.962] <TB3> INFO: 4704320 events read in total (210174ms).
[12:12:44.730] <TB3> INFO: 5025280 events read in total (224942ms).
[12:12:44.865] <TB3> INFO: Test took 225908ms.
[12:13:09.596] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 11.315897 .. 143.578929
[12:13:09.833] <TB3> INFO: Expecting 208000 events.
[12:13:19.821] <TB3> INFO: 208000 events read in total (9396ms).
[12:13:19.823] <TB3> INFO: Test took 10226ms.
[12:13:19.877] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 153 (-1/-1) hits flags = 528 (plus default)
[12:13:19.890] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:13:19.890] <TB3> INFO: run 1 of 1
[12:13:20.169] <TB3> INFO: Expecting 5091840 events.
[12:13:46.625] <TB3> INFO: 585416 events read in total (25864ms).
[12:14:12.537] <TB3> INFO: 1171184 events read in total (51776ms).
[12:14:38.648] <TB3> INFO: 1756616 events read in total (77887ms).
[12:15:04.397] <TB3> INFO: 2341912 events read in total (103636ms).
[12:15:30.674] <TB3> INFO: 2927624 events read in total (129913ms).
[12:15:56.768] <TB3> INFO: 3512640 events read in total (156007ms).
[12:16:23.027] <TB3> INFO: 4097256 events read in total (182266ms).
[12:16:48.788] <TB3> INFO: 4681464 events read in total (208027ms).
[12:17:06.974] <TB3> INFO: 5091840 events read in total (226213ms).
[12:17:07.086] <TB3> INFO: Test took 227197ms.
[12:17:31.346] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 26.224740 .. 48.130757
[12:17:31.625] <TB3> INFO: Expecting 208000 events.
[12:17:41.360] <TB3> INFO: 208000 events read in total (9143ms).
[12:17:41.361] <TB3> INFO: Test took 10013ms.
[12:17:41.409] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 58 (-1/-1) hits flags = 528 (plus default)
[12:17:41.422] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:17:41.422] <TB3> INFO: run 1 of 1
[12:17:41.700] <TB3> INFO: Expecting 1431040 events.
[12:18:09.669] <TB3> INFO: 651968 events read in total (27378ms).
[12:18:37.569] <TB3> INFO: 1302504 events read in total (55278ms).
[12:18:43.276] <TB3> INFO: 1431040 events read in total (60985ms).
[12:18:43.319] <TB3> INFO: Test took 61898ms.
[12:18:58.318] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 27.294186 .. 50.896868
[12:18:58.555] <TB3> INFO: Expecting 208000 events.
[12:19:08.460] <TB3> INFO: 208000 events read in total (9313ms).
[12:19:08.460] <TB3> INFO: Test took 10141ms.
[12:19:08.530] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 17 .. 60 (-1/-1) hits flags = 528 (plus default)
[12:19:08.544] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:19:08.544] <TB3> INFO: run 1 of 1
[12:19:08.823] <TB3> INFO: Expecting 1464320 events.
[12:19:36.827] <TB3> INFO: 642208 events read in total (27412ms).
[12:20:04.353] <TB3> INFO: 1284376 events read in total (54939ms).
[12:20:12.330] <TB3> INFO: 1464320 events read in total (62915ms).
[12:20:12.371] <TB3> INFO: Test took 63828ms.
[12:20:26.614] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 26.445972 .. 55.728449
[12:20:26.876] <TB3> INFO: Expecting 208000 events.
[12:20:36.881] <TB3> INFO: 208000 events read in total (9414ms).
[12:20:36.882] <TB3> INFO: Test took 10266ms.
[12:20:36.930] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 16 .. 65 (-1/-1) hits flags = 528 (plus default)
[12:20:36.943] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:20:36.943] <TB3> INFO: run 1 of 1
[12:20:37.222] <TB3> INFO: Expecting 1664000 events.
[12:21:05.072] <TB3> INFO: 631816 events read in total (27258ms).
[12:21:32.160] <TB3> INFO: 1263728 events read in total (54347ms).
[12:21:49.373] <TB3> INFO: 1664000 events read in total (71559ms).
[12:21:49.416] <TB3> INFO: Test took 72474ms.
[12:22:04.368] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:22:04.368] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[12:22:04.381] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:22:04.381] <TB3> INFO: run 1 of 1
[12:22:04.620] <TB3> INFO: Expecting 1364480 events.
[12:22:33.428] <TB3> INFO: 667960 events read in total (28217ms).
[12:23:01.347] <TB3> INFO: 1335088 events read in total (56136ms).
[12:23:02.970] <TB3> INFO: 1364480 events read in total (57760ms).
[12:23:02.998] <TB3> INFO: Test took 58618ms.
[12:23:15.656] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C0.dat
[12:23:15.656] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C1.dat
[12:23:15.657] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C2.dat
[12:23:15.657] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C3.dat
[12:23:15.657] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C4.dat
[12:23:15.657] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C5.dat
[12:23:15.657] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C6.dat
[12:23:15.657] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C7.dat
[12:23:15.657] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C8.dat
[12:23:15.657] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C9.dat
[12:23:15.657] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C10.dat
[12:23:15.657] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C11.dat
[12:23:15.657] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C12.dat
[12:23:15.657] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C13.dat
[12:23:15.657] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C14.dat
[12:23:15.657] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C15.dat
[12:23:15.657] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C0.dat
[12:23:15.662] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C1.dat
[12:23:15.667] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C2.dat
[12:23:15.672] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C3.dat
[12:23:15.676] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C4.dat
[12:23:15.681] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C5.dat
[12:23:15.686] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C6.dat
[12:23:15.691] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C7.dat
[12:23:15.695] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C8.dat
[12:23:15.700] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C9.dat
[12:23:15.705] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C10.dat
[12:23:15.709] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C11.dat
[12:23:15.714] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C12.dat
[12:23:15.719] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C13.dat
[12:23:15.724] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C14.dat
[12:23:15.728] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C15.dat
[12:23:15.733] <TB3> INFO: PixTestTrim::trimTest() done
[12:23:15.733] <TB3> INFO: vtrim: 176 142 146 174 128 131 177 156 132 120 124 133 125 138 130 137
[12:23:15.733] <TB3> INFO: vthrcomp: 133 131 130 132 127 136 132 136 113 127 127 122 130 134 128 120
[12:23:15.733] <TB3> INFO: vcal mean: 35.17 35.13 35.02 36.05 34.91 35.00 35.47 35.17 35.12 34.99 34.97 35.08 35.10 34.97 35.04 35.18
[12:23:15.733] <TB3> INFO: vcal RMS: 1.34 1.32 1.13 2.20 1.12 1.01 1.81 1.33 1.29 1.00 1.04 1.22 1.39 1.00 1.29 1.32
[12:23:15.733] <TB3> INFO: bits mean: 7.59 9.60 9.00 9.64 9.35 8.88 7.60 7.29 9.60 8.80 8.83 9.30 9.39 9.05 8.88 8.46
[12:23:15.733] <TB3> INFO: bits RMS: 2.24 2.74 2.54 2.45 2.88 2.58 2.32 2.57 2.57 3.05 2.95 2.64 2.86 2.67 2.83 2.99
[12:23:15.740] <TB3> INFO: ----------------------------------------------------------------------
[12:23:15.740] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[12:23:15.740] <TB3> INFO: ----------------------------------------------------------------------
[12:23:15.743] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[12:23:15.755] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:23:15.755] <TB3> INFO: run 1 of 1
[12:23:15.993] <TB3> INFO: Expecting 4160000 events.
[12:23:48.673] <TB3> INFO: 774270 events read in total (32089ms).
[12:24:20.530] <TB3> INFO: 1542270 events read in total (63946ms).
[12:24:52.857] <TB3> INFO: 2307240 events read in total (96273ms).
[12:25:24.447] <TB3> INFO: 3068740 events read in total (127863ms).
[12:25:56.692] <TB3> INFO: 3829770 events read in total (160108ms).
[12:26:11.158] <TB3> INFO: 4160000 events read in total (174574ms).
[12:26:11.230] <TB3> INFO: Test took 175475ms.
[12:26:37.727] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 231 (-1/-1) hits flags = 528 (plus default)
[12:26:37.740] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:26:37.740] <TB3> INFO: run 1 of 1
[12:26:38.020] <TB3> INFO: Expecting 4825600 events.
[12:27:09.109] <TB3> INFO: 708020 events read in total (30498ms).
[12:27:39.399] <TB3> INFO: 1412770 events read in total (60788ms).
[12:28:10.224] <TB3> INFO: 2116605 events read in total (91613ms).
[12:28:41.026] <TB3> INFO: 2818095 events read in total (122415ms).
[12:29:11.645] <TB3> INFO: 3517315 events read in total (153034ms).
[12:29:42.470] <TB3> INFO: 4218740 events read in total (183859ms).
[12:30:08.920] <TB3> INFO: 4825600 events read in total (210309ms).
[12:30:09.035] <TB3> INFO: Test took 211294ms.
[12:30:41.461] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 210 (-1/-1) hits flags = 528 (plus default)
[12:30:41.475] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:30:41.475] <TB3> INFO: run 1 of 1
[12:30:41.755] <TB3> INFO: Expecting 4388800 events.
[12:31:13.952] <TB3> INFO: 732520 events read in total (31605ms).
[12:31:45.810] <TB3> INFO: 1460710 events read in total (63463ms).
[12:32:17.625] <TB3> INFO: 2187535 events read in total (95279ms).
[12:32:48.972] <TB3> INFO: 2910795 events read in total (126625ms).
[12:33:20.065] <TB3> INFO: 3634830 events read in total (157718ms).
[12:33:51.414] <TB3> INFO: 4360830 events read in total (189067ms).
[12:33:52.974] <TB3> INFO: 4388800 events read in total (190627ms).
[12:33:53.165] <TB3> INFO: Test took 191690ms.
[12:34:25.149] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 211 (-1/-1) hits flags = 528 (plus default)
[12:34:25.163] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:34:25.163] <TB3> INFO: run 1 of 1
[12:34:25.489] <TB3> INFO: Expecting 4409600 events.
[12:34:57.315] <TB3> INFO: 731585 events read in total (31235ms).
[12:35:28.861] <TB3> INFO: 1459145 events read in total (62781ms).
[12:36:00.446] <TB3> INFO: 2184570 events read in total (94367ms).
[12:36:31.506] <TB3> INFO: 2907225 events read in total (125426ms).
[12:37:03.075] <TB3> INFO: 3630160 events read in total (156995ms).
[12:37:34.185] <TB3> INFO: 4354350 events read in total (188105ms).
[12:37:36.963] <TB3> INFO: 4409600 events read in total (190883ms).
[12:37:37.037] <TB3> INFO: Test took 191874ms.
[12:38:01.876] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 212 (-1/-1) hits flags = 528 (plus default)
[12:38:01.888] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:38:01.888] <TB3> INFO: run 1 of 1
[12:38:02.218] <TB3> INFO: Expecting 4430400 events.
[12:38:34.596] <TB3> INFO: 729795 events read in total (31786ms).
[12:39:05.936] <TB3> INFO: 1455580 events read in total (63126ms).
[12:39:37.384] <TB3> INFO: 2180225 events read in total (94574ms).
[12:40:08.506] <TB3> INFO: 2901135 events read in total (125696ms).
[12:40:40.332] <TB3> INFO: 3622695 events read in total (157522ms).
[12:41:11.435] <TB3> INFO: 4345790 events read in total (188625ms).
[12:41:15.402] <TB3> INFO: 4430400 events read in total (192592ms).
[12:41:15.540] <TB3> INFO: Test took 193652ms.
[12:41:40.569] <TB3> INFO: PixTestTrim::trimBitTest() done
[12:41:40.570] <TB3> INFO: PixTestTrim::doTest() done, duration: 2569 seconds
[12:41:40.570] <TB3> INFO: Decoding statistics:
[12:41:40.570] <TB3> INFO: General information:
[12:41:40.570] <TB3> INFO: 16bit words read: 0
[12:41:40.570] <TB3> INFO: valid events total: 0
[12:41:40.570] <TB3> INFO: empty events: 0
[12:41:40.570] <TB3> INFO: valid events with pixels: 0
[12:41:40.570] <TB3> INFO: valid pixel hits: 0
[12:41:40.570] <TB3> INFO: Event errors: 0
[12:41:40.570] <TB3> INFO: start marker: 0
[12:41:40.570] <TB3> INFO: stop marker: 0
[12:41:40.570] <TB3> INFO: overflow: 0
[12:41:40.570] <TB3> INFO: invalid 5bit words: 0
[12:41:40.570] <TB3> INFO: invalid XOR eye diagram: 0
[12:41:40.570] <TB3> INFO: frame (failed synchr.): 0
[12:41:40.570] <TB3> INFO: idle data (no TBM trl): 0
[12:41:40.570] <TB3> INFO: no data (only TBM hdr): 0
[12:41:40.570] <TB3> INFO: TBM errors: 0
[12:41:40.570] <TB3> INFO: flawed TBM headers: 0
[12:41:40.570] <TB3> INFO: flawed TBM trailers: 0
[12:41:40.570] <TB3> INFO: event ID mismatches: 0
[12:41:40.570] <TB3> INFO: ROC errors: 0
[12:41:40.570] <TB3> INFO: missing ROC header(s): 0
[12:41:40.570] <TB3> INFO: misplaced readback start: 0
[12:41:40.570] <TB3> INFO: Pixel decoding errors: 0
[12:41:40.570] <TB3> INFO: pixel data incomplete: 0
[12:41:40.570] <TB3> INFO: pixel address: 0
[12:41:40.570] <TB3> INFO: pulse height fill bit: 0
[12:41:40.570] <TB3> INFO: buffer corruption: 0
[12:41:41.168] <TB3> INFO: ######################################################################
[12:41:41.168] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:41:41.168] <TB3> INFO: ######################################################################
[12:41:41.409] <TB3> INFO: Expecting 41600 events.
[12:41:44.938] <TB3> INFO: 41600 events read in total (2938ms).
[12:41:44.939] <TB3> INFO: Test took 3770ms.
[12:41:45.378] <TB3> INFO: Expecting 41600 events.
[12:41:48.888] <TB3> INFO: 41600 events read in total (2918ms).
[12:41:48.889] <TB3> INFO: Test took 3747ms.
[12:41:49.238] <TB3> INFO: Expecting 41600 events.
[12:41:52.727] <TB3> INFO: 41600 events read in total (2898ms).
[12:41:52.728] <TB3> INFO: Test took 3815ms.
[12:41:53.017] <TB3> INFO: Expecting 41600 events.
[12:41:56.532] <TB3> INFO: 41600 events read in total (2923ms).
[12:41:56.533] <TB3> INFO: Test took 3781ms.
[12:41:56.825] <TB3> INFO: Expecting 41600 events.
[12:42:00.589] <TB3> INFO: 41600 events read in total (3173ms).
[12:42:00.590] <TB3> INFO: Test took 4030ms.
[12:42:00.945] <TB3> INFO: Expecting 41600 events.
[12:42:04.480] <TB3> INFO: 41600 events read in total (2944ms).
[12:42:04.481] <TB3> INFO: Test took 3862ms.
[12:42:04.778] <TB3> INFO: Expecting 41600 events.
[12:42:08.379] <TB3> INFO: 41600 events read in total (3009ms).
[12:42:08.380] <TB3> INFO: Test took 3874ms.
[12:42:08.672] <TB3> INFO: Expecting 41600 events.
[12:42:12.155] <TB3> INFO: 41600 events read in total (2892ms).
[12:42:12.156] <TB3> INFO: Test took 3750ms.
[12:42:12.446] <TB3> INFO: Expecting 41600 events.
[12:42:15.931] <TB3> INFO: 41600 events read in total (2894ms).
[12:42:15.932] <TB3> INFO: Test took 3752ms.
[12:42:16.221] <TB3> INFO: Expecting 41600 events.
[12:42:19.780] <TB3> INFO: 41600 events read in total (2967ms).
[12:42:19.781] <TB3> INFO: Test took 3825ms.
[12:42:20.069] <TB3> INFO: Expecting 41600 events.
[12:42:23.609] <TB3> INFO: 41600 events read in total (2948ms).
[12:42:23.609] <TB3> INFO: Test took 3805ms.
[12:42:23.898] <TB3> INFO: Expecting 41600 events.
[12:42:27.463] <TB3> INFO: 41600 events read in total (2973ms).
[12:42:27.464] <TB3> INFO: Test took 3831ms.
[12:42:27.752] <TB3> INFO: Expecting 41600 events.
[12:42:31.311] <TB3> INFO: 41600 events read in total (2967ms).
[12:42:31.311] <TB3> INFO: Test took 3823ms.
[12:42:31.603] <TB3> INFO: Expecting 41600 events.
[12:42:35.130] <TB3> INFO: 41600 events read in total (2936ms).
[12:42:35.131] <TB3> INFO: Test took 3793ms.
[12:42:35.421] <TB3> INFO: Expecting 41600 events.
[12:42:39.050] <TB3> INFO: 41600 events read in total (3038ms).
[12:42:39.050] <TB3> INFO: Test took 3894ms.
[12:42:39.342] <TB3> INFO: Expecting 41600 events.
[12:42:42.974] <TB3> INFO: 41600 events read in total (3041ms).
[12:42:42.975] <TB3> INFO: Test took 3898ms.
[12:42:43.267] <TB3> INFO: Expecting 41600 events.
[12:42:46.834] <TB3> INFO: 41600 events read in total (2975ms).
[12:42:46.836] <TB3> INFO: Test took 3834ms.
[12:42:47.170] <TB3> INFO: Expecting 41600 events.
[12:42:50.685] <TB3> INFO: 41600 events read in total (2923ms).
[12:42:50.686] <TB3> INFO: Test took 3825ms.
[12:42:50.980] <TB3> INFO: Expecting 41600 events.
[12:42:54.569] <TB3> INFO: 41600 events read in total (2997ms).
[12:42:54.570] <TB3> INFO: Test took 3857ms.
[12:42:54.881] <TB3> INFO: Expecting 41600 events.
[12:42:58.492] <TB3> INFO: 41600 events read in total (3019ms).
[12:42:58.493] <TB3> INFO: Test took 3895ms.
[12:42:58.787] <TB3> INFO: Expecting 41600 events.
[12:43:02.290] <TB3> INFO: 41600 events read in total (2912ms).
[12:43:02.290] <TB3> INFO: Test took 3769ms.
[12:43:02.585] <TB3> INFO: Expecting 41600 events.
[12:43:06.119] <TB3> INFO: 41600 events read in total (2943ms).
[12:43:06.120] <TB3> INFO: Test took 3803ms.
[12:43:06.410] <TB3> INFO: Expecting 41600 events.
[12:43:09.954] <TB3> INFO: 41600 events read in total (2952ms).
[12:43:09.954] <TB3> INFO: Test took 3809ms.
[12:43:10.244] <TB3> INFO: Expecting 41600 events.
[12:43:13.764] <TB3> INFO: 41600 events read in total (2929ms).
[12:43:13.764] <TB3> INFO: Test took 3785ms.
[12:43:14.055] <TB3> INFO: Expecting 41600 events.
[12:43:17.645] <TB3> INFO: 41600 events read in total (2999ms).
[12:43:17.646] <TB3> INFO: Test took 3857ms.
[12:43:17.936] <TB3> INFO: Expecting 41600 events.
[12:43:21.595] <TB3> INFO: 41600 events read in total (3067ms).
[12:43:21.596] <TB3> INFO: Test took 3925ms.
[12:43:21.888] <TB3> INFO: Expecting 41600 events.
[12:43:25.527] <TB3> INFO: 41600 events read in total (3047ms).
[12:43:25.528] <TB3> INFO: Test took 3905ms.
[12:43:25.818] <TB3> INFO: Expecting 41600 events.
[12:43:29.369] <TB3> INFO: 41600 events read in total (2960ms).
[12:43:29.370] <TB3> INFO: Test took 3818ms.
[12:43:29.659] <TB3> INFO: Expecting 41600 events.
[12:43:33.168] <TB3> INFO: 41600 events read in total (2917ms).
[12:43:33.168] <TB3> INFO: Test took 3774ms.
[12:43:33.459] <TB3> INFO: Expecting 41600 events.
[12:43:36.972] <TB3> INFO: 41600 events read in total (2922ms).
[12:43:36.973] <TB3> INFO: Test took 3779ms.
[12:43:37.262] <TB3> INFO: Expecting 2560 events.
[12:43:38.155] <TB3> INFO: 2560 events read in total (301ms).
[12:43:38.155] <TB3> INFO: Test took 1170ms.
[12:43:38.464] <TB3> INFO: Expecting 2560 events.
[12:43:39.348] <TB3> INFO: 2560 events read in total (293ms).
[12:43:39.348] <TB3> INFO: Test took 1193ms.
[12:43:39.657] <TB3> INFO: Expecting 2560 events.
[12:43:40.543] <TB3> INFO: 2560 events read in total (294ms).
[12:43:40.543] <TB3> INFO: Test took 1194ms.
[12:43:40.849] <TB3> INFO: Expecting 2560 events.
[12:43:41.734] <TB3> INFO: 2560 events read in total (293ms).
[12:43:41.734] <TB3> INFO: Test took 1190ms.
[12:43:42.043] <TB3> INFO: Expecting 2560 events.
[12:43:42.925] <TB3> INFO: 2560 events read in total (290ms).
[12:43:42.925] <TB3> INFO: Test took 1190ms.
[12:43:43.233] <TB3> INFO: Expecting 2560 events.
[12:43:44.119] <TB3> INFO: 2560 events read in total (295ms).
[12:43:44.119] <TB3> INFO: Test took 1193ms.
[12:43:44.428] <TB3> INFO: Expecting 2560 events.
[12:43:45.312] <TB3> INFO: 2560 events read in total (292ms).
[12:43:45.312] <TB3> INFO: Test took 1192ms.
[12:43:45.619] <TB3> INFO: Expecting 2560 events.
[12:43:46.508] <TB3> INFO: 2560 events read in total (297ms).
[12:43:46.508] <TB3> INFO: Test took 1195ms.
[12:43:46.815] <TB3> INFO: Expecting 2560 events.
[12:43:47.695] <TB3> INFO: 2560 events read in total (289ms).
[12:43:47.695] <TB3> INFO: Test took 1186ms.
[12:43:48.003] <TB3> INFO: Expecting 2560 events.
[12:43:48.889] <TB3> INFO: 2560 events read in total (294ms).
[12:43:48.890] <TB3> INFO: Test took 1195ms.
[12:43:49.198] <TB3> INFO: Expecting 2560 events.
[12:43:50.079] <TB3> INFO: 2560 events read in total (290ms).
[12:43:50.079] <TB3> INFO: Test took 1189ms.
[12:43:50.388] <TB3> INFO: Expecting 2560 events.
[12:43:51.270] <TB3> INFO: 2560 events read in total (290ms).
[12:43:51.271] <TB3> INFO: Test took 1191ms.
[12:43:51.577] <TB3> INFO: Expecting 2560 events.
[12:43:52.462] <TB3> INFO: 2560 events read in total (293ms).
[12:43:52.462] <TB3> INFO: Test took 1190ms.
[12:43:52.769] <TB3> INFO: Expecting 2560 events.
[12:43:53.661] <TB3> INFO: 2560 events read in total (301ms).
[12:43:53.662] <TB3> INFO: Test took 1199ms.
[12:43:53.971] <TB3> INFO: Expecting 2560 events.
[12:43:54.865] <TB3> INFO: 2560 events read in total (303ms).
[12:43:54.866] <TB3> INFO: Test took 1204ms.
[12:43:55.173] <TB3> INFO: Expecting 2560 events.
[12:43:56.071] <TB3> INFO: 2560 events read in total (306ms).
[12:43:56.071] <TB3> INFO: Test took 1205ms.
[12:43:56.075] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:43:56.380] <TB3> INFO: Expecting 655360 events.
[12:44:11.496] <TB3> INFO: 655360 events read in total (14524ms).
[12:44:11.512] <TB3> INFO: Expecting 655360 events.
[12:44:26.127] <TB3> INFO: 655360 events read in total (14212ms).
[12:44:26.145] <TB3> INFO: Expecting 655360 events.
[12:44:40.922] <TB3> INFO: 655360 events read in total (14373ms).
[12:44:40.952] <TB3> INFO: Expecting 655360 events.
[12:44:55.547] <TB3> INFO: 655360 events read in total (14192ms).
[12:44:55.577] <TB3> INFO: Expecting 655360 events.
[12:45:10.222] <TB3> INFO: 655360 events read in total (14242ms).
[12:45:10.258] <TB3> INFO: Expecting 655360 events.
[12:45:24.964] <TB3> INFO: 655360 events read in total (14302ms).
[12:45:25.008] <TB3> INFO: Expecting 655360 events.
[12:45:39.531] <TB3> INFO: 655360 events read in total (14120ms).
[12:45:39.579] <TB3> INFO: Expecting 655360 events.
[12:45:54.064] <TB3> INFO: 655360 events read in total (14082ms).
[12:45:54.106] <TB3> INFO: Expecting 655360 events.
[12:46:08.627] <TB3> INFO: 655360 events read in total (14118ms).
[12:46:08.674] <TB3> INFO: Expecting 655360 events.
[12:46:23.193] <TB3> INFO: 655360 events read in total (14116ms).
[12:46:23.261] <TB3> INFO: Expecting 655360 events.
[12:46:37.914] <TB3> INFO: 655360 events read in total (14250ms).
[12:46:37.985] <TB3> INFO: Expecting 655360 events.
[12:46:52.600] <TB3> INFO: 655360 events read in total (14212ms).
[12:46:52.734] <TB3> INFO: Expecting 655360 events.
[12:47:07.431] <TB3> INFO: 655360 events read in total (14294ms).
[12:47:07.544] <TB3> INFO: Expecting 655360 events.
[12:47:22.059] <TB3> INFO: 655360 events read in total (14112ms).
[12:47:22.146] <TB3> INFO: Expecting 655360 events.
[12:47:36.792] <TB3> INFO: 655360 events read in total (14243ms).
[12:47:36.941] <TB3> INFO: Expecting 655360 events.
[12:47:51.500] <TB3> INFO: 655360 events read in total (14156ms).
[12:47:51.597] <TB3> INFO: Test took 235522ms.
[12:47:51.698] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:47:51.951] <TB3> INFO: Expecting 655360 events.
[12:48:06.592] <TB3> INFO: 655360 events read in total (14050ms).
[12:48:06.606] <TB3> INFO: Expecting 655360 events.
[12:48:20.001] <TB3> INFO: 655360 events read in total (13992ms).
[12:48:21.022] <TB3> INFO: Expecting 655360 events.
[12:48:35.496] <TB3> INFO: 655360 events read in total (14071ms).
[12:48:35.520] <TB3> INFO: Expecting 655360 events.
[12:48:49.880] <TB3> INFO: 655360 events read in total (13957ms).
[12:48:49.907] <TB3> INFO: Expecting 655360 events.
[12:49:04.279] <TB3> INFO: 655360 events read in total (13969ms).
[12:49:04.318] <TB3> INFO: Expecting 655360 events.
[12:49:18.951] <TB3> INFO: 655360 events read in total (14229ms).
[12:49:19.126] <TB3> INFO: Expecting 655360 events.
[12:49:33.553] <TB3> INFO: 655360 events read in total (14024ms).
[12:49:33.657] <TB3> INFO: Expecting 655360 events.
[12:49:48.057] <TB3> INFO: 655360 events read in total (13997ms).
[12:49:48.098] <TB3> INFO: Expecting 655360 events.
[12:50:02.308] <TB3> INFO: 655360 events read in total (13807ms).
[12:50:02.355] <TB3> INFO: Expecting 655360 events.
[12:50:16.741] <TB3> INFO: 655360 events read in total (13983ms).
[12:50:16.828] <TB3> INFO: Expecting 655360 events.
[12:50:31.150] <TB3> INFO: 655360 events read in total (13919ms).
[12:50:31.274] <TB3> INFO: Expecting 655360 events.
[12:50:45.819] <TB3> INFO: 655360 events read in total (14142ms).
[12:50:45.963] <TB3> INFO: Expecting 655360 events.
[12:51:00.664] <TB3> INFO: 655360 events read in total (14298ms).
[12:51:00.745] <TB3> INFO: Expecting 655360 events.
[12:51:15.214] <TB3> INFO: 655360 events read in total (14066ms).
[12:51:15.302] <TB3> INFO: Expecting 655360 events.
[12:51:29.823] <TB3> INFO: 655360 events read in total (14118ms).
[12:51:29.918] <TB3> INFO: Expecting 655360 events.
[12:51:44.390] <TB3> INFO: 655360 events read in total (14069ms).
[12:51:44.522] <TB3> INFO: Test took 232824ms.
[12:51:44.687] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:51:44.694] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:51:44.699] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:51:44.705] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[12:51:44.711] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:51:44.716] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:51:44.722] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:51:44.727] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:51:44.733] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[12:51:44.739] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:51:44.745] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:51:44.751] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:51:44.756] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:51:44.762] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:51:44.768] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:51:44.773] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:51:44.779] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[12:51:44.785] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[12:51:44.791] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[12:51:44.797] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[12:51:44.802] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[12:51:44.808] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[12:51:44.814] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:51:44.820] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:51:44.825] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:51:44.831] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:51:44.836] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:51:44.842] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:51:44.848] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:51:44.853] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:51:44.859] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[12:51:44.864] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[12:51:44.870] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:51:44.876] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:51:44.881] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:51:44.887] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:51:44.892] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:51:44.898] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:51:44.903] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:51:44.909] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[12:51:44.914] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[12:51:44.920] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[12:51:44.926] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[12:51:44.931] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[12:51:44.937] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[12:51:44.943] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[12:51:44.978] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C0.dat
[12:51:44.978] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C1.dat
[12:51:44.978] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C2.dat
[12:51:44.978] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C3.dat
[12:51:44.978] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C4.dat
[12:51:44.978] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C5.dat
[12:51:44.978] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C6.dat
[12:51:44.978] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C7.dat
[12:51:44.978] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C8.dat
[12:51:44.979] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C9.dat
[12:51:44.979] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C10.dat
[12:51:44.979] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C11.dat
[12:51:44.979] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C12.dat
[12:51:44.979] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C13.dat
[12:51:44.979] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C14.dat
[12:51:44.979] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C15.dat
[12:51:45.219] <TB3> INFO: Expecting 41600 events.
[12:51:48.369] <TB3> INFO: 41600 events read in total (2558ms).
[12:51:48.369] <TB3> INFO: Test took 3389ms.
[12:51:48.816] <TB3> INFO: Expecting 41600 events.
[12:51:51.876] <TB3> INFO: 41600 events read in total (2469ms).
[12:51:51.877] <TB3> INFO: Test took 3297ms.
[12:51:52.333] <TB3> INFO: Expecting 41600 events.
[12:51:55.456] <TB3> INFO: 41600 events read in total (2531ms).
[12:51:55.457] <TB3> INFO: Test took 3367ms.
[12:51:55.676] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:51:55.765] <TB3> INFO: Expecting 2560 events.
[12:51:56.659] <TB3> INFO: 2560 events read in total (302ms).
[12:51:56.660] <TB3> INFO: Test took 984ms.
[12:51:56.663] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:51:56.968] <TB3> INFO: Expecting 2560 events.
[12:51:57.853] <TB3> INFO: 2560 events read in total (294ms).
[12:51:57.853] <TB3> INFO: Test took 1190ms.
[12:51:57.855] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:51:58.161] <TB3> INFO: Expecting 2560 events.
[12:51:59.056] <TB3> INFO: 2560 events read in total (303ms).
[12:51:59.057] <TB3> INFO: Test took 1202ms.
[12:51:59.061] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:51:59.365] <TB3> INFO: Expecting 2560 events.
[12:52:00.253] <TB3> INFO: 2560 events read in total (297ms).
[12:52:00.254] <TB3> INFO: Test took 1193ms.
[12:52:00.257] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:00.562] <TB3> INFO: Expecting 2560 events.
[12:52:01.456] <TB3> INFO: 2560 events read in total (302ms).
[12:52:01.456] <TB3> INFO: Test took 1199ms.
[12:52:01.459] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:01.763] <TB3> INFO: Expecting 2560 events.
[12:52:02.655] <TB3> INFO: 2560 events read in total (300ms).
[12:52:02.655] <TB3> INFO: Test took 1196ms.
[12:52:02.657] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:02.964] <TB3> INFO: Expecting 2560 events.
[12:52:03.856] <TB3> INFO: 2560 events read in total (300ms).
[12:52:03.856] <TB3> INFO: Test took 1199ms.
[12:52:03.858] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:04.164] <TB3> INFO: Expecting 2560 events.
[12:52:05.055] <TB3> INFO: 2560 events read in total (299ms).
[12:52:05.055] <TB3> INFO: Test took 1197ms.
[12:52:05.057] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:05.364] <TB3> INFO: Expecting 2560 events.
[12:52:06.254] <TB3> INFO: 2560 events read in total (298ms).
[12:52:06.254] <TB3> INFO: Test took 1197ms.
[12:52:06.256] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:06.562] <TB3> INFO: Expecting 2560 events.
[12:52:07.444] <TB3> INFO: 2560 events read in total (290ms).
[12:52:07.444] <TB3> INFO: Test took 1188ms.
[12:52:07.446] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:07.753] <TB3> INFO: Expecting 2560 events.
[12:52:08.633] <TB3> INFO: 2560 events read in total (289ms).
[12:52:08.634] <TB3> INFO: Test took 1188ms.
[12:52:08.637] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:08.942] <TB3> INFO: Expecting 2560 events.
[12:52:09.833] <TB3> INFO: 2560 events read in total (299ms).
[12:52:09.833] <TB3> INFO: Test took 1197ms.
[12:52:09.836] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:10.140] <TB3> INFO: Expecting 2560 events.
[12:52:11.032] <TB3> INFO: 2560 events read in total (300ms).
[12:52:11.032] <TB3> INFO: Test took 1196ms.
[12:52:11.035] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:11.340] <TB3> INFO: Expecting 2560 events.
[12:52:12.231] <TB3> INFO: 2560 events read in total (299ms).
[12:52:12.232] <TB3> INFO: Test took 1197ms.
[12:52:12.234] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:12.540] <TB3> INFO: Expecting 2560 events.
[12:52:13.430] <TB3> INFO: 2560 events read in total (299ms).
[12:52:13.431] <TB3> INFO: Test took 1197ms.
[12:52:13.435] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:13.739] <TB3> INFO: Expecting 2560 events.
[12:52:14.631] <TB3> INFO: 2560 events read in total (300ms).
[12:52:14.631] <TB3> INFO: Test took 1196ms.
[12:52:14.634] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:14.940] <TB3> INFO: Expecting 2560 events.
[12:52:15.832] <TB3> INFO: 2560 events read in total (300ms).
[12:52:15.832] <TB3> INFO: Test took 1198ms.
[12:52:15.835] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:16.139] <TB3> INFO: Expecting 2560 events.
[12:52:17.032] <TB3> INFO: 2560 events read in total (301ms).
[12:52:17.032] <TB3> INFO: Test took 1197ms.
[12:52:17.035] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:17.342] <TB3> INFO: Expecting 2560 events.
[12:52:18.232] <TB3> INFO: 2560 events read in total (298ms).
[12:52:18.232] <TB3> INFO: Test took 1197ms.
[12:52:18.236] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:18.539] <TB3> INFO: Expecting 2560 events.
[12:52:19.423] <TB3> INFO: 2560 events read in total (292ms).
[12:52:19.424] <TB3> INFO: Test took 1188ms.
[12:52:19.427] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:19.732] <TB3> INFO: Expecting 2560 events.
[12:52:20.613] <TB3> INFO: 2560 events read in total (289ms).
[12:52:20.614] <TB3> INFO: Test took 1187ms.
[12:52:20.617] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:20.923] <TB3> INFO: Expecting 2560 events.
[12:52:21.813] <TB3> INFO: 2560 events read in total (298ms).
[12:52:21.813] <TB3> INFO: Test took 1196ms.
[12:52:21.816] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:22.121] <TB3> INFO: Expecting 2560 events.
[12:52:23.013] <TB3> INFO: 2560 events read in total (301ms).
[12:52:23.013] <TB3> INFO: Test took 1197ms.
[12:52:23.015] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:23.323] <TB3> INFO: Expecting 2560 events.
[12:52:24.212] <TB3> INFO: 2560 events read in total (297ms).
[12:52:24.212] <TB3> INFO: Test took 1197ms.
[12:52:24.215] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:24.519] <TB3> INFO: Expecting 2560 events.
[12:52:25.410] <TB3> INFO: 2560 events read in total (299ms).
[12:52:25.411] <TB3> INFO: Test took 1196ms.
[12:52:25.414] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:25.718] <TB3> INFO: Expecting 2560 events.
[12:52:26.613] <TB3> INFO: 2560 events read in total (303ms).
[12:52:26.613] <TB3> INFO: Test took 1200ms.
[12:52:26.617] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:26.921] <TB3> INFO: Expecting 2560 events.
[12:52:27.821] <TB3> INFO: 2560 events read in total (308ms).
[12:52:27.822] <TB3> INFO: Test took 1205ms.
[12:52:27.824] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:28.129] <TB3> INFO: Expecting 2560 events.
[12:52:29.027] <TB3> INFO: 2560 events read in total (306ms).
[12:52:29.027] <TB3> INFO: Test took 1203ms.
[12:52:29.030] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:29.335] <TB3> INFO: Expecting 2560 events.
[12:52:30.220] <TB3> INFO: 2560 events read in total (293ms).
[12:52:30.220] <TB3> INFO: Test took 1190ms.
[12:52:30.223] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:30.528] <TB3> INFO: Expecting 2560 events.
[12:52:31.421] <TB3> INFO: 2560 events read in total (301ms).
[12:52:31.421] <TB3> INFO: Test took 1198ms.
[12:52:31.425] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:31.729] <TB3> INFO: Expecting 2560 events.
[12:52:32.620] <TB3> INFO: 2560 events read in total (300ms).
[12:52:32.621] <TB3> INFO: Test took 1197ms.
[12:52:32.623] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:32.929] <TB3> INFO: Expecting 2560 events.
[12:52:33.820] <TB3> INFO: 2560 events read in total (299ms).
[12:52:33.820] <TB3> INFO: Test took 1198ms.
[12:52:34.291] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 653 seconds
[12:52:34.291] <TB3> INFO: PH scale (per ROC): 48 32 31 65 32 49 42 42 42 34 33 34 47 48 44 48
[12:52:34.291] <TB3> INFO: PH offset (per ROC): 110 108 102 113 87 102 96 96 81 106 82 107 109 114 107 95
[12:52:34.299] <TB3> INFO: Decoding statistics:
[12:52:34.299] <TB3> INFO: General information:
[12:52:34.299] <TB3> INFO: 16bit words read: 127868
[12:52:34.299] <TB3> INFO: valid events total: 20480
[12:52:34.299] <TB3> INFO: empty events: 17986
[12:52:34.299] <TB3> INFO: valid events with pixels: 2494
[12:52:34.299] <TB3> INFO: valid pixel hits: 2494
[12:52:34.299] <TB3> INFO: Event errors: 0
[12:52:34.299] <TB3> INFO: start marker: 0
[12:52:34.299] <TB3> INFO: stop marker: 0
[12:52:34.299] <TB3> INFO: overflow: 0
[12:52:34.299] <TB3> INFO: invalid 5bit words: 0
[12:52:34.299] <TB3> INFO: invalid XOR eye diagram: 0
[12:52:34.299] <TB3> INFO: frame (failed synchr.): 0
[12:52:34.299] <TB3> INFO: idle data (no TBM trl): 0
[12:52:34.299] <TB3> INFO: no data (only TBM hdr): 0
[12:52:34.299] <TB3> INFO: TBM errors: 0
[12:52:34.299] <TB3> INFO: flawed TBM headers: 0
[12:52:34.299] <TB3> INFO: flawed TBM trailers: 0
[12:52:34.299] <TB3> INFO: event ID mismatches: 0
[12:52:34.299] <TB3> INFO: ROC errors: 0
[12:52:34.299] <TB3> INFO: missing ROC header(s): 0
[12:52:34.299] <TB3> INFO: misplaced readback start: 0
[12:52:34.299] <TB3> INFO: Pixel decoding errors: 0
[12:52:34.299] <TB3> INFO: pixel data incomplete: 0
[12:52:34.299] <TB3> INFO: pixel address: 0
[12:52:34.299] <TB3> INFO: pulse height fill bit: 0
[12:52:34.299] <TB3> INFO: buffer corruption: 0
[12:52:34.461] <TB3> INFO: ######################################################################
[12:52:34.461] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[12:52:34.461] <TB3> INFO: ######################################################################
[12:52:34.475] <TB3> INFO: scanning low vcal = 10
[12:52:34.722] <TB3> INFO: Expecting 41600 events.
[12:52:38.316] <TB3> INFO: 41600 events read in total (3002ms).
[12:52:38.316] <TB3> INFO: Test took 3841ms.
[12:52:38.319] <TB3> INFO: scanning low vcal = 20
[12:52:38.611] <TB3> INFO: Expecting 41600 events.
[12:52:42.228] <TB3> INFO: 41600 events read in total (3025ms).
[12:52:42.229] <TB3> INFO: Test took 3910ms.
[12:52:42.230] <TB3> INFO: scanning low vcal = 30
[12:52:42.522] <TB3> INFO: Expecting 41600 events.
[12:52:46.191] <TB3> INFO: 41600 events read in total (3078ms).
[12:52:46.192] <TB3> INFO: Test took 3962ms.
[12:52:46.196] <TB3> INFO: scanning low vcal = 40
[12:52:46.471] <TB3> INFO: Expecting 41600 events.
[12:52:50.451] <TB3> INFO: 41600 events read in total (3388ms).
[12:52:50.452] <TB3> INFO: Test took 4256ms.
[12:52:50.454] <TB3> INFO: scanning low vcal = 50
[12:52:50.731] <TB3> INFO: Expecting 41600 events.
[12:52:54.718] <TB3> INFO: 41600 events read in total (3395ms).
[12:52:54.719] <TB3> INFO: Test took 4265ms.
[12:52:54.722] <TB3> INFO: scanning low vcal = 60
[12:52:54.998] <TB3> INFO: Expecting 41600 events.
[12:52:59.008] <TB3> INFO: 41600 events read in total (3418ms).
[12:52:59.008] <TB3> INFO: Test took 4286ms.
[12:52:59.012] <TB3> INFO: scanning low vcal = 70
[12:52:59.291] <TB3> INFO: Expecting 41600 events.
[12:53:03.315] <TB3> INFO: 41600 events read in total (3432ms).
[12:53:03.315] <TB3> INFO: Test took 4303ms.
[12:53:03.318] <TB3> INFO: scanning low vcal = 80
[12:53:03.596] <TB3> INFO: Expecting 41600 events.
[12:53:07.597] <TB3> INFO: 41600 events read in total (3410ms).
[12:53:07.597] <TB3> INFO: Test took 4278ms.
[12:53:07.600] <TB3> INFO: scanning low vcal = 90
[12:53:07.877] <TB3> INFO: Expecting 41600 events.
[12:53:11.886] <TB3> INFO: 41600 events read in total (3417ms).
[12:53:11.887] <TB3> INFO: Test took 4287ms.
[12:53:11.891] <TB3> INFO: scanning low vcal = 100
[12:53:12.167] <TB3> INFO: Expecting 41600 events.
[12:53:16.179] <TB3> INFO: 41600 events read in total (3420ms).
[12:53:16.180] <TB3> INFO: Test took 4289ms.
[12:53:16.183] <TB3> INFO: scanning low vcal = 110
[12:53:16.459] <TB3> INFO: Expecting 41600 events.
[12:53:20.478] <TB3> INFO: 41600 events read in total (3427ms).
[12:53:20.479] <TB3> INFO: Test took 4296ms.
[12:53:20.482] <TB3> INFO: scanning low vcal = 120
[12:53:20.759] <TB3> INFO: Expecting 41600 events.
[12:53:24.773] <TB3> INFO: 41600 events read in total (3423ms).
[12:53:24.774] <TB3> INFO: Test took 4292ms.
[12:53:24.777] <TB3> INFO: scanning low vcal = 130
[12:53:25.054] <TB3> INFO: Expecting 41600 events.
[12:53:28.996] <TB3> INFO: 41600 events read in total (3350ms).
[12:53:28.997] <TB3> INFO: Test took 4220ms.
[12:53:28.000] <TB3> INFO: scanning low vcal = 140
[12:53:29.277] <TB3> INFO: Expecting 41600 events.
[12:53:33.238] <TB3> INFO: 41600 events read in total (3370ms).
[12:53:33.238] <TB3> INFO: Test took 4238ms.
[12:53:33.242] <TB3> INFO: scanning low vcal = 150
[12:53:33.518] <TB3> INFO: Expecting 41600 events.
[12:53:37.456] <TB3> INFO: 41600 events read in total (3346ms).
[12:53:37.457] <TB3> INFO: Test took 4215ms.
[12:53:37.462] <TB3> INFO: scanning low vcal = 160
[12:53:37.737] <TB3> INFO: Expecting 41600 events.
[12:53:41.687] <TB3> INFO: 41600 events read in total (3358ms).
[12:53:41.687] <TB3> INFO: Test took 4225ms.
[12:53:41.691] <TB3> INFO: scanning low vcal = 170
[12:53:41.967] <TB3> INFO: Expecting 41600 events.
[12:53:45.986] <TB3> INFO: 41600 events read in total (3427ms).
[12:53:45.987] <TB3> INFO: Test took 4296ms.
[12:53:45.993] <TB3> INFO: scanning low vcal = 180
[12:53:46.267] <TB3> INFO: Expecting 41600 events.
[12:53:50.219] <TB3> INFO: 41600 events read in total (3361ms).
[12:53:50.220] <TB3> INFO: Test took 4227ms.
[12:53:50.223] <TB3> INFO: scanning low vcal = 190
[12:53:50.499] <TB3> INFO: Expecting 41600 events.
[12:53:54.457] <TB3> INFO: 41600 events read in total (3367ms).
[12:53:54.458] <TB3> INFO: Test took 4235ms.
[12:53:54.461] <TB3> INFO: scanning low vcal = 200
[12:53:54.738] <TB3> INFO: Expecting 41600 events.
[12:53:58.666] <TB3> INFO: 41600 events read in total (3337ms).
[12:53:58.667] <TB3> INFO: Test took 4205ms.
[12:53:58.670] <TB3> INFO: scanning low vcal = 210
[12:53:58.947] <TB3> INFO: Expecting 41600 events.
[12:54:02.946] <TB3> INFO: 41600 events read in total (3408ms).
[12:54:02.947] <TB3> INFO: Test took 4277ms.
[12:54:02.950] <TB3> INFO: scanning low vcal = 220
[12:54:03.245] <TB3> INFO: Expecting 41600 events.
[12:54:07.287] <TB3> INFO: 41600 events read in total (3450ms).
[12:54:07.287] <TB3> INFO: Test took 4337ms.
[12:54:07.290] <TB3> INFO: scanning low vcal = 230
[12:54:07.567] <TB3> INFO: Expecting 41600 events.
[12:54:11.615] <TB3> INFO: 41600 events read in total (3456ms).
[12:54:11.615] <TB3> INFO: Test took 4325ms.
[12:54:11.618] <TB3> INFO: scanning low vcal = 240
[12:54:11.895] <TB3> INFO: Expecting 41600 events.
[12:54:15.937] <TB3> INFO: 41600 events read in total (3450ms).
[12:54:15.938] <TB3> INFO: Test took 4320ms.
[12:54:15.942] <TB3> INFO: scanning low vcal = 250
[12:54:16.219] <TB3> INFO: Expecting 41600 events.
[12:54:20.216] <TB3> INFO: 41600 events read in total (3406ms).
[12:54:20.217] <TB3> INFO: Test took 4275ms.
[12:54:20.221] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[12:54:20.498] <TB3> INFO: Expecting 41600 events.
[12:54:24.510] <TB3> INFO: 41600 events read in total (3421ms).
[12:54:24.511] <TB3> INFO: Test took 4290ms.
[12:54:24.515] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[12:54:24.792] <TB3> INFO: Expecting 41600 events.
[12:54:28.834] <TB3> INFO: 41600 events read in total (3450ms).
[12:54:28.834] <TB3> INFO: Test took 4320ms.
[12:54:28.838] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[12:54:29.114] <TB3> INFO: Expecting 41600 events.
[12:54:33.105] <TB3> INFO: 41600 events read in total (3399ms).
[12:54:33.106] <TB3> INFO: Test took 4268ms.
[12:54:33.109] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[12:54:33.385] <TB3> INFO: Expecting 41600 events.
[12:54:37.408] <TB3> INFO: 41600 events read in total (3431ms).
[12:54:37.409] <TB3> INFO: Test took 4300ms.
[12:54:37.411] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:54:37.689] <TB3> INFO: Expecting 41600 events.
[12:54:41.751] <TB3> INFO: 41600 events read in total (3471ms).
[12:54:41.752] <TB3> INFO: Test took 4340ms.
[12:54:42.169] <TB3> INFO: PixTestGainPedestal::measure() done
[12:55:21.759] <TB3> INFO: PixTestGainPedestal::fit() done
[12:55:21.759] <TB3> INFO: non-linearity mean: 0.975 0.933 0.947 0.989 1.043 0.953 0.938 0.947 0.924 0.931 0.987 0.941 0.959 0.979 0.969 0.980
[12:55:21.759] <TB3> INFO: non-linearity RMS: 0.009 0.104 0.181 0.001 0.143 0.049 0.113 0.032 0.122 0.191 0.196 0.145 0.037 0.004 0.013 0.006
[12:55:21.759] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C0.dat
[12:55:21.772] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C1.dat
[12:55:21.785] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C2.dat
[12:55:21.798] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C3.dat
[12:55:21.811] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C4.dat
[12:55:21.825] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C5.dat
[12:55:21.838] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C6.dat
[12:55:21.851] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C7.dat
[12:55:21.864] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C8.dat
[12:55:21.877] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C9.dat
[12:55:21.890] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C10.dat
[12:55:21.903] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C11.dat
[12:55:21.916] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C12.dat
[12:55:21.930] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C13.dat
[12:55:21.942] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C14.dat
[12:55:21.956] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1035_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C15.dat
[12:55:21.968] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 167 seconds
[12:55:21.968] <TB3> INFO: Decoding statistics:
[12:55:21.968] <TB3> INFO: General information:
[12:55:21.968] <TB3> INFO: 16bit words read: 3270790
[12:55:21.968] <TB3> INFO: valid events total: 332800
[12:55:21.968] <TB3> INFO: empty events: 1838
[12:55:21.969] <TB3> INFO: valid events with pixels: 330962
[12:55:21.969] <TB3> INFO: valid pixel hits: 636995
[12:55:21.969] <TB3> INFO: Event errors: 0
[12:55:21.969] <TB3> INFO: start marker: 0
[12:55:21.969] <TB3> INFO: stop marker: 0
[12:55:21.969] <TB3> INFO: overflow: 0
[12:55:21.969] <TB3> INFO: invalid 5bit words: 0
[12:55:21.969] <TB3> INFO: invalid XOR eye diagram: 0
[12:55:21.969] <TB3> INFO: frame (failed synchr.): 0
[12:55:21.969] <TB3> INFO: idle data (no TBM trl): 0
[12:55:21.969] <TB3> INFO: no data (only TBM hdr): 0
[12:55:21.969] <TB3> INFO: TBM errors: 0
[12:55:21.969] <TB3> INFO: flawed TBM headers: 0
[12:55:21.969] <TB3> INFO: flawed TBM trailers: 0
[12:55:21.969] <TB3> INFO: event ID mismatches: 0
[12:55:21.969] <TB3> INFO: ROC errors: 0
[12:55:21.969] <TB3> INFO: missing ROC header(s): 0
[12:55:21.969] <TB3> INFO: misplaced readback start: 0
[12:55:21.969] <TB3> INFO: Pixel decoding errors: 0
[12:55:21.969] <TB3> INFO: pixel data incomplete: 0
[12:55:21.969] <TB3> INFO: pixel address: 0
[12:55:21.969] <TB3> INFO: pulse height fill bit: 0
[12:55:21.969] <TB3> INFO: buffer corruption: 0
[12:55:21.985] <TB3> INFO: Decoding statistics:
[12:55:21.985] <TB3> INFO: General information:
[12:55:21.985] <TB3> INFO: 16bit words read: 3400194
[12:55:21.985] <TB3> INFO: valid events total: 353536
[12:55:21.985] <TB3> INFO: empty events: 20080
[12:55:21.985] <TB3> INFO: valid events with pixels: 333456
[12:55:21.985] <TB3> INFO: valid pixel hits: 639489
[12:55:21.985] <TB3> INFO: Event errors: 0
[12:55:21.985] <TB3> INFO: start marker: 0
[12:55:21.985] <TB3> INFO: stop marker: 0
[12:55:21.985] <TB3> INFO: overflow: 0
[12:55:21.985] <TB3> INFO: invalid 5bit words: 0
[12:55:21.985] <TB3> INFO: invalid XOR eye diagram: 0
[12:55:21.985] <TB3> INFO: frame (failed synchr.): 0
[12:55:21.985] <TB3> INFO: idle data (no TBM trl): 0
[12:55:21.985] <TB3> INFO: no data (only TBM hdr): 0
[12:55:21.985] <TB3> INFO: TBM errors: 0
[12:55:21.985] <TB3> INFO: flawed TBM headers: 0
[12:55:21.985] <TB3> INFO: flawed TBM trailers: 0
[12:55:21.985] <TB3> INFO: event ID mismatches: 0
[12:55:21.985] <TB3> INFO: ROC errors: 0
[12:55:21.985] <TB3> INFO: missing ROC header(s): 0
[12:55:21.985] <TB3> INFO: misplaced readback start: 0
[12:55:21.985] <TB3> INFO: Pixel decoding errors: 0
[12:55:21.985] <TB3> INFO: pixel data incomplete: 0
[12:55:21.985] <TB3> INFO: pixel address: 0
[12:55:21.985] <TB3> INFO: pulse height fill bit: 0
[12:55:21.985] <TB3> INFO: buffer corruption: 0
[12:55:21.985] <TB3> INFO: enter test to run
[12:55:21.985] <TB3> INFO: test: exit no parameter change
[12:55:22.108] <TB3> QUIET: Connection to board 126 closed.
[12:55:22.109] <TB3> INFO: pXar: this is the end, my friend