[22:43:25.031] <TB2> INFO: *** Welcome to pxar ***
[22:43:25.031] <TB2> INFO: *** Today: 2016/11/07
[22:43:25.038] <TB2> INFO: *** Version: c8ba-dirty
[22:43:25.039] <TB2> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C15.dat
[22:43:25.039] <TB2> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[22:43:25.039] <TB2> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//defaultMaskFile.dat
[22:43:25.039] <TB2> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters_C15.dat
[22:43:25.105] <TB2> INFO: clk: 4
[22:43:25.105] <TB2> INFO: ctr: 4
[22:43:25.105] <TB2> INFO: sda: 19
[22:43:25.105] <TB2> INFO: tin: 9
[22:43:25.105] <TB2> INFO: level: 15
[22:43:25.105] <TB2> INFO: triggerdelay: 0
[22:43:25.105] <TB2> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[22:43:25.105] <TB2> INFO: Log level: INFO
[22:43:25.113] <TB2> INFO: Found DTB DTB_WWXUD2
[22:43:25.120] <TB2> QUIET: Connection to board DTB_WWXUD2 opened.
[22:43:25.122] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 149
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWXUD2
MAC address: 40D855118095
Hostname: pixelDTB149
Comment:
------------------------------------------------------
[22:43:25.124] <TB2> INFO: RPC call hashes of host and DTB match: 486171790
[22:43:26.614] <TB2> INFO: DUT info:
[22:43:26.614] <TB2> INFO: The DUT currently contains the following objects:
[22:43:26.614] <TB2> INFO: 4 TBM Cores tbm10c (4 ON)
[22:43:26.614] <TB2> INFO: TBM Core alpha (0): 7 registers set
[22:43:26.614] <TB2> INFO: TBM Core beta (1): 7 registers set
[22:43:26.614] <TB2> INFO: TBM Core alpha (2): 7 registers set
[22:43:26.615] <TB2> INFO: TBM Core beta (3): 7 registers set
[22:43:26.615] <TB2> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[22:43:26.615] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:26.615] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:26.615] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:26.615] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:26.615] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:26.615] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:26.615] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:26.615] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:26.615] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:26.615] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:26.615] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:26.615] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:26.615] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:26.615] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:26.615] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:26.615] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[22:43:27.016] <TB2> INFO: enter 'restricted' command line mode
[22:43:27.016] <TB2> INFO: enter test to run
[22:43:27.016] <TB2> INFO: test: pretest no parameter change
[22:43:27.016] <TB2> INFO: running: pretest
[22:43:27.022] <TB2> INFO: ######################################################################
[22:43:27.022] <TB2> INFO: PixTestPretest::doTest()
[22:43:27.022] <TB2> INFO: ######################################################################
[22:43:27.023] <TB2> INFO: ----------------------------------------------------------------------
[22:43:27.023] <TB2> INFO: PixTestPretest::programROC()
[22:43:27.023] <TB2> INFO: ----------------------------------------------------------------------
[22:43:45.037] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[22:43:45.037] <TB2> INFO: IA differences per ROC: 19.3 19.3 17.7 20.9 20.1 21.7 19.3 18.5 17.7 20.1 20.1 19.3 20.9 19.3 21.7 18.5
[22:43:45.099] <TB2> INFO: ----------------------------------------------------------------------
[22:43:45.099] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[22:43:45.099] <TB2> INFO: ----------------------------------------------------------------------
[22:43:51.806] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 376.2 mA = 23.5125 mA/ROC
[22:43:51.806] <TB2> INFO: i(loss) [mA/ROC]: 19.3 18.5 18.5 18.5 19.3 18.5 18.5 19.3 18.5 19.3 19.3 18.5 18.5 18.5 18.5 18.5
[22:43:51.841] <TB2> INFO: ----------------------------------------------------------------------
[22:43:51.841] <TB2> INFO: PixTestPretest::findTiming()
[22:43:51.841] <TB2> INFO: ----------------------------------------------------------------------
[22:43:51.841] <TB2> INFO: PixTestCmd::init()

[22:44:23.855] <TB2> INFO: TBM phases: 160MHz: 1, 400MHz: 3, TBM delays: ROC(0/1):6, header/trailer: 1, token: 1
[22:44:23.855] <TB2> INFO: (success/tries = 100/100), width = 2
[22:44:25.366] <TB2> INFO: ----------------------------------------------------------------------
[22:44:25.367] <TB2> INFO: PixTestPretest::findWorkingPixel()
[22:44:25.367] <TB2> INFO: ----------------------------------------------------------------------
[22:44:25.462] <TB2> INFO: Expecting 231680 events.
[22:44:35.427] <TB2> INFO: 231680 events read in total (9373ms).
[22:44:35.434] <TB2> INFO: Test took 10062ms.
[22:44:35.683] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[22:44:35.720] <TB2> INFO: ----------------------------------------------------------------------
[22:44:35.720] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[22:44:35.720] <TB2> INFO: ----------------------------------------------------------------------
[22:44:35.814] <TB2> INFO: Expecting 231680 events.
[22:44:45.832] <TB2> INFO: 231680 events read in total (9426ms).
[22:44:45.842] <TB2> INFO: Test took 10117ms.
[22:44:46.105] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[22:44:46.105] <TB2> INFO: CalDel: 79 77 82 82 97 92 81 77 94 74 105 93 77 92 89 82
[22:44:46.105] <TB2> INFO: VthrComp: 51 51 51 52 52 53 51 51 51 51 51 51 51 54 52 51
[22:44:46.108] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C0.dat
[22:44:46.108] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C1.dat
[22:44:46.108] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C2.dat
[22:44:46.108] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C3.dat
[22:44:46.108] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C4.dat
[22:44:46.108] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C5.dat
[22:44:46.109] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C6.dat
[22:44:46.109] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C7.dat
[22:44:46.109] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C8.dat
[22:44:46.109] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C9.dat
[22:44:46.109] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C10.dat
[22:44:46.109] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C11.dat
[22:44:46.109] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C12.dat
[22:44:46.109] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C13.dat
[22:44:46.109] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C14.dat
[22:44:46.110] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters_C15.dat
[22:44:46.110] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//tbmParameters_C0a.dat
[22:44:46.110] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//tbmParameters_C0b.dat
[22:44:46.110] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//tbmParameters_C1a.dat
[22:44:46.110] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[22:44:46.110] <TB2> INFO: PixTestPretest::doTest() done, duration: 79 seconds
[22:44:46.164] <TB2> INFO: enter test to run
[22:44:46.164] <TB2> INFO: test: fulltest no parameter change
[22:44:46.164] <TB2> INFO: running: fulltest
[22:44:46.164] <TB2> INFO: ######################################################################
[22:44:46.164] <TB2> INFO: PixTestFullTest::doTest()
[22:44:46.164] <TB2> INFO: ######################################################################
[22:44:46.166] <TB2> INFO: ######################################################################
[22:44:46.166] <TB2> INFO: PixTestAlive::doTest()
[22:44:46.166] <TB2> INFO: ######################################################################
[22:44:46.167] <TB2> INFO: ----------------------------------------------------------------------
[22:44:46.167] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[22:44:46.167] <TB2> INFO: ----------------------------------------------------------------------
[22:44:46.407] <TB2> INFO: Expecting 41600 events.
[22:44:49.957] <TB2> INFO: 41600 events read in total (2958ms).
[22:44:49.957] <TB2> INFO: Test took 3789ms.
[22:44:50.184] <TB2> INFO: PixTestAlive::aliveTest() done
[22:44:50.184] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 5 0 0 0 0 0 0 0
[22:44:50.186] <TB2> INFO: ----------------------------------------------------------------------
[22:44:50.186] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[22:44:50.186] <TB2> INFO: ----------------------------------------------------------------------
[22:44:50.428] <TB2> INFO: Expecting 41600 events.
[22:44:53.519] <TB2> INFO: 41600 events read in total (2499ms).
[22:44:53.520] <TB2> INFO: Test took 3333ms.
[22:44:53.520] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[22:44:53.755] <TB2> INFO: PixTestAlive::maskTest() done
[22:44:53.755] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[22:44:53.756] <TB2> INFO: ----------------------------------------------------------------------
[22:44:53.756] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[22:44:53.756] <TB2> INFO: ----------------------------------------------------------------------
[22:44:53.994] <TB2> INFO: Expecting 41600 events.
[22:44:57.492] <TB2> INFO: 41600 events read in total (2906ms).
[22:44:57.493] <TB2> INFO: Test took 3736ms.
[22:44:57.719] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[22:44:57.719] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[22:44:57.719] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[22:44:57.719] <TB2> INFO: Decoding statistics:
[22:44:57.720] <TB2> INFO: General information:
[22:44:57.720] <TB2> INFO: 16bit words read: 0
[22:44:57.720] <TB2> INFO: valid events total: 0
[22:44:57.720] <TB2> INFO: empty events: 0
[22:44:57.720] <TB2> INFO: valid events with pixels: 0
[22:44:57.720] <TB2> INFO: valid pixel hits: 0
[22:44:57.720] <TB2> INFO: Event errors: 0
[22:44:57.720] <TB2> INFO: start marker: 0
[22:44:57.720] <TB2> INFO: stop marker: 0
[22:44:57.720] <TB2> INFO: overflow: 0
[22:44:57.720] <TB2> INFO: invalid 5bit words: 0
[22:44:57.720] <TB2> INFO: invalid XOR eye diagram: 0
[22:44:57.720] <TB2> INFO: frame (failed synchr.): 0
[22:44:57.720] <TB2> INFO: idle data (no TBM trl): 0
[22:44:57.720] <TB2> INFO: no data (only TBM hdr): 0
[22:44:57.720] <TB2> INFO: TBM errors: 0
[22:44:57.720] <TB2> INFO: flawed TBM headers: 0
[22:44:57.720] <TB2> INFO: flawed TBM trailers: 0
[22:44:57.720] <TB2> INFO: event ID mismatches: 0
[22:44:57.720] <TB2> INFO: ROC errors: 0
[22:44:57.720] <TB2> INFO: missing ROC header(s): 0
[22:44:57.720] <TB2> INFO: misplaced readback start: 0
[22:44:57.720] <TB2> INFO: Pixel decoding errors: 0
[22:44:57.720] <TB2> INFO: pixel data incomplete: 0
[22:44:57.720] <TB2> INFO: pixel address: 0
[22:44:57.720] <TB2> INFO: pulse height fill bit: 0
[22:44:57.720] <TB2> INFO: buffer corruption: 0
[22:44:57.724] <TB2> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C15.dat
[22:44:57.725] <TB2> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr_C15.dat

[22:44:57.725] <TB2> INFO: ######################################################################
[22:44:57.725] <TB2> INFO: PixTestReadback::doTest()
[22:44:57.725] <TB2> INFO: ######################################################################
[22:44:57.725] <TB2> INFO: ----------------------------------------------------------------------
[22:44:57.725] <TB2> INFO: PixTestReadback::CalibrateVd()
[22:44:57.725] <TB2> INFO: ----------------------------------------------------------------------
[22:45:07.688] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C0.dat
[22:45:07.688] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C1.dat
[22:45:07.688] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C2.dat
[22:45:07.688] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C3.dat
[22:45:07.688] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C4.dat
[22:45:07.689] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C5.dat
[22:45:07.689] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C6.dat
[22:45:07.689] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C7.dat
[22:45:07.689] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C8.dat
[22:45:07.689] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C9.dat
[22:45:07.689] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C10.dat
[22:45:07.689] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C11.dat
[22:45:07.689] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C12.dat
[22:45:07.689] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C13.dat
[22:45:07.689] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C14.dat
[22:45:07.689] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C15.dat
[22:45:07.720] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[22:45:07.720] <TB2> INFO: ----------------------------------------------------------------------
[22:45:07.720] <TB2> INFO: PixTestReadback::CalibrateVa()
[22:45:07.720] <TB2> INFO: ----------------------------------------------------------------------
[22:45:17.672] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C0.dat
[22:45:17.672] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C1.dat
[22:45:17.672] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C2.dat
[22:45:17.672] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C3.dat
[22:45:17.672] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C4.dat
[22:45:17.672] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C5.dat
[22:45:17.672] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C6.dat
[22:45:17.672] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C7.dat
[22:45:17.672] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C8.dat
[22:45:17.672] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C9.dat
[22:45:17.672] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C10.dat
[22:45:17.672] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C11.dat
[22:45:17.673] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C12.dat
[22:45:17.673] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C13.dat
[22:45:17.673] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C14.dat
[22:45:17.673] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C15.dat
[22:45:17.703] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[22:45:17.703] <TB2> INFO: ----------------------------------------------------------------------
[22:45:17.703] <TB2> INFO: PixTestReadback::readbackVbg()
[22:45:17.703] <TB2> INFO: ----------------------------------------------------------------------
[22:45:25.377] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[22:45:25.377] <TB2> INFO: ----------------------------------------------------------------------
[22:45:25.377] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[22:45:25.377] <TB2> INFO: ----------------------------------------------------------------------
[22:45:25.377] <TB2> INFO: Vbg will be calibrated using Vd calibration
[22:45:25.377] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 153.8calibrated Vbg = 1.19678 :::*/*/*/*/
[22:45:25.377] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 153.8calibrated Vbg = 1.19573 :::*/*/*/*/
[22:45:25.377] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 151.1calibrated Vbg = 1.19341 :::*/*/*/*/
[22:45:25.377] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 156.9calibrated Vbg = 1.19509 :::*/*/*/*/
[22:45:25.377] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 149.3calibrated Vbg = 1.19208 :::*/*/*/*/
[22:45:25.377] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 157calibrated Vbg = 1.20363 :::*/*/*/*/
[22:45:25.377] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 152.5calibrated Vbg = 1.19993 :::*/*/*/*/
[22:45:25.377] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 151.8calibrated Vbg = 1.20183 :::*/*/*/*/
[22:45:25.377] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 155.2calibrated Vbg = 1.19781 :::*/*/*/*/
[22:45:25.377] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 160.4calibrated Vbg = 1.1897 :::*/*/*/*/
[22:45:25.377] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 165.9calibrated Vbg = 1.19188 :::*/*/*/*/
[22:45:25.377] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 159.3calibrated Vbg = 1.18088 :::*/*/*/*/
[22:45:25.377] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 149.9calibrated Vbg = 1.19007 :::*/*/*/*/
[22:45:25.377] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 158.3calibrated Vbg = 1.19733 :::*/*/*/*/
[22:45:25.377] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 161.3calibrated Vbg = 1.19892 :::*/*/*/*/
[22:45:25.377] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 155.9calibrated Vbg = 1.18977 :::*/*/*/*/
[22:45:25.382] <TB2> INFO: ----------------------------------------------------------------------
[22:45:25.382] <TB2> INFO: PixTestReadback::CalibrateIa()
[22:45:25.382] <TB2> INFO: ----------------------------------------------------------------------
[22:48:06.201] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C0.dat
[22:48:06.201] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C1.dat
[22:48:06.201] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C2.dat
[22:48:06.201] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C3.dat
[22:48:06.201] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C4.dat
[22:48:06.201] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C5.dat
[22:48:06.201] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C6.dat
[22:48:06.201] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C7.dat
[22:48:06.201] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C8.dat
[22:48:06.201] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C9.dat
[22:48:06.201] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C10.dat
[22:48:06.201] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C11.dat
[22:48:06.201] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C12.dat
[22:48:06.202] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C13.dat
[22:48:06.202] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C14.dat
[22:48:06.202] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//readbackCal_C15.dat
[22:48:06.230] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[22:48:06.232] <TB2> INFO: PixTestReadback::doTest() done
[22:48:06.232] <TB2> INFO: Decoding statistics:
[22:48:06.232] <TB2> INFO: General information:
[22:48:06.232] <TB2> INFO: 16bit words read: 1536
[22:48:06.232] <TB2> INFO: valid events total: 256
[22:48:06.232] <TB2> INFO: empty events: 256
[22:48:06.232] <TB2> INFO: valid events with pixels: 0
[22:48:06.232] <TB2> INFO: valid pixel hits: 0
[22:48:06.232] <TB2> INFO: Event errors: 0
[22:48:06.232] <TB2> INFO: start marker: 0
[22:48:06.232] <TB2> INFO: stop marker: 0
[22:48:06.232] <TB2> INFO: overflow: 0
[22:48:06.232] <TB2> INFO: invalid 5bit words: 0
[22:48:06.232] <TB2> INFO: invalid XOR eye diagram: 0
[22:48:06.232] <TB2> INFO: frame (failed synchr.): 0
[22:48:06.232] <TB2> INFO: idle data (no TBM trl): 0
[22:48:06.232] <TB2> INFO: no data (only TBM hdr): 0
[22:48:06.232] <TB2> INFO: TBM errors: 0
[22:48:06.232] <TB2> INFO: flawed TBM headers: 0
[22:48:06.232] <TB2> INFO: flawed TBM trailers: 0
[22:48:06.232] <TB2> INFO: event ID mismatches: 0
[22:48:06.232] <TB2> INFO: ROC errors: 0
[22:48:06.232] <TB2> INFO: missing ROC header(s): 0
[22:48:06.232] <TB2> INFO: misplaced readback start: 0
[22:48:06.232] <TB2> INFO: Pixel decoding errors: 0
[22:48:06.232] <TB2> INFO: pixel data incomplete: 0
[22:48:06.232] <TB2> INFO: pixel address: 0
[22:48:06.232] <TB2> INFO: pulse height fill bit: 0
[22:48:06.232] <TB2> INFO: buffer corruption: 0
[22:48:06.281] <TB2> INFO: ######################################################################
[22:48:06.281] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[22:48:06.281] <TB2> INFO: ######################################################################
[22:48:06.284] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[22:48:06.298] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[22:48:06.298] <TB2> INFO: run 1 of 1
[22:48:06.533] <TB2> INFO: Expecting 3120000 events.
[22:48:38.260] <TB2> INFO: 671845 events read in total (31134ms).











[22:49:08.646] <TB2> INFO: 1337625 events read in total (61520ms).











[22:49:39.224] <TB2> INFO: 2002210 events read in total (92098ms).











[22:50:09.615] <TB2> INFO: 2666705 events read in total (122489ms).











[22:50:29.936] <TB2> INFO: 3120000 events read in total (142810ms).
[22:50:30.065] <TB2> INFO: Test took 143768ms.
[22:50:53.877] <TB2> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 167 seconds
[22:50:53.877] <TB2> INFO: number of dead bumps (per ROC): 1 0 0 0 0 1 0 0 5 0 0 0 0 0 1 0
[22:50:53.877] <TB2> INFO: separation cut (per ROC): 104 106 103 104 112 105 105 99 104 106 97 103 109 106 105 104
[22:50:53.877] <TB2> INFO: Decoding statistics:
[22:50:53.877] <TB2> INFO: General information:
[22:50:53.877] <TB2> INFO: 16bit words read: 0
[22:50:53.877] <TB2> INFO: valid events total: 0
[22:50:53.877] <TB2> INFO: empty events: 0
[22:50:53.877] <TB2> INFO: valid events with pixels: 0
[22:50:53.877] <TB2> INFO: valid pixel hits: 0
[22:50:53.878] <TB2> INFO: Event errors: 0
[22:50:53.878] <TB2> INFO: start marker: 0
[22:50:53.878] <TB2> INFO: stop marker: 0
[22:50:53.878] <TB2> INFO: overflow: 0
[22:50:53.878] <TB2> INFO: invalid 5bit words: 0
[22:50:53.878] <TB2> INFO: invalid XOR eye diagram: 0
[22:50:53.878] <TB2> INFO: frame (failed synchr.): 0
[22:50:53.878] <TB2> INFO: idle data (no TBM trl): 0
[22:50:53.878] <TB2> INFO: no data (only TBM hdr): 0
[22:50:53.878] <TB2> INFO: TBM errors: 0
[22:50:53.878] <TB2> INFO: flawed TBM headers: 0
[22:50:53.878] <TB2> INFO: flawed TBM trailers: 0
[22:50:53.878] <TB2> INFO: event ID mismatches: 0
[22:50:53.878] <TB2> INFO: ROC errors: 0
[22:50:53.878] <TB2> INFO: missing ROC header(s): 0
[22:50:53.878] <TB2> INFO: misplaced readback start: 0
[22:50:53.878] <TB2> INFO: Pixel decoding errors: 0
[22:50:53.878] <TB2> INFO: pixel data incomplete: 0
[22:50:53.878] <TB2> INFO: pixel address: 0
[22:50:53.878] <TB2> INFO: pulse height fill bit: 0
[22:50:53.878] <TB2> INFO: buffer corruption: 0
[22:50:53.919] <TB2> INFO: ######################################################################
[22:50:53.919] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[22:50:53.919] <TB2> INFO: ######################################################################
[22:50:53.919] <TB2> INFO: ----------------------------------------------------------------------
[22:50:53.919] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[22:50:53.919] <TB2> INFO: ----------------------------------------------------------------------
[22:50:53.919] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[22:50:53.934] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[22:50:53.934] <TB2> INFO: run 1 of 1
[22:50:54.196] <TB2> INFO: Expecting 36608000 events.
[22:51:18.029] <TB2> INFO: 701950 events read in total (23241ms).
[22:51:41.124] <TB2> INFO: 1384150 events read in total (46336ms).
[22:52:04.067] <TB2> INFO: 2067250 events read in total (69279ms).
[22:52:27.071] <TB2> INFO: 2749950 events read in total (92283ms).
[22:52:50.182] <TB2> INFO: 3431450 events read in total (115394ms).
[22:53:13.039] <TB2> INFO: 4110800 events read in total (138251ms).
[22:53:36.006] <TB2> INFO: 4791250 events read in total (161218ms).
[22:53:58.854] <TB2> INFO: 5470300 events read in total (184066ms).
[22:54:22.161] <TB2> INFO: 6150100 events read in total (207373ms).
[22:54:45.057] <TB2> INFO: 6829000 events read in total (230269ms).
[22:55:08.252] <TB2> INFO: 7509200 events read in total (253464ms).
[22:55:31.127] <TB2> INFO: 8186000 events read in total (276339ms).
[22:55:54.227] <TB2> INFO: 8864750 events read in total (299439ms).
[22:56:17.110] <TB2> INFO: 9543100 events read in total (322322ms).
[22:56:40.027] <TB2> INFO: 10220700 events read in total (345239ms).
[22:57:02.966] <TB2> INFO: 10896600 events read in total (368178ms).
[22:57:25.916] <TB2> INFO: 11573650 events read in total (391128ms).
[22:57:48.761] <TB2> INFO: 12249500 events read in total (413973ms).
[22:58:12.081] <TB2> INFO: 12926650 events read in total (437293ms).
[22:58:35.048] <TB2> INFO: 13602950 events read in total (460260ms).
[22:58:58.446] <TB2> INFO: 14279850 events read in total (483658ms).
[22:59:21.624] <TB2> INFO: 14954350 events read in total (506836ms).
[22:59:44.930] <TB2> INFO: 15627850 events read in total (530142ms).
[23:00:08.071] <TB2> INFO: 16302750 events read in total (553283ms).
[23:00:31.274] <TB2> INFO: 16976750 events read in total (576486ms).
[23:00:54.101] <TB2> INFO: 17650400 events read in total (599313ms).
[23:01:17.026] <TB2> INFO: 18323250 events read in total (622238ms).
[23:01:40.058] <TB2> INFO: 18995700 events read in total (645270ms).
[23:02:03.098] <TB2> INFO: 19665450 events read in total (668310ms).
[23:02:25.903] <TB2> INFO: 20333950 events read in total (691115ms).
[23:02:48.851] <TB2> INFO: 21002000 events read in total (714063ms).
[23:03:11.857] <TB2> INFO: 21671150 events read in total (737069ms).
[23:03:34.791] <TB2> INFO: 22339050 events read in total (760003ms).
[23:03:57.660] <TB2> INFO: 23009100 events read in total (782872ms).
[23:04:20.926] <TB2> INFO: 23678500 events read in total (806138ms).
[23:04:43.002] <TB2> INFO: 24347800 events read in total (829214ms).
[23:05:07.177] <TB2> INFO: 25016900 events read in total (852389ms).
[23:05:30.269] <TB2> INFO: 25686800 events read in total (875481ms).
[23:05:53.330] <TB2> INFO: 26357850 events read in total (898542ms).
[23:06:16.402] <TB2> INFO: 27027350 events read in total (921614ms).
[23:06:39.310] <TB2> INFO: 27696400 events read in total (944522ms).
[23:07:02.276] <TB2> INFO: 28364150 events read in total (967488ms).
[23:07:25.239] <TB2> INFO: 29033250 events read in total (990451ms).
[23:07:48.404] <TB2> INFO: 29700900 events read in total (1013616ms).
[23:08:11.520] <TB2> INFO: 30367400 events read in total (1036732ms).
[23:08:34.409] <TB2> INFO: 31035200 events read in total (1059621ms).
[23:08:57.339] <TB2> INFO: 31704050 events read in total (1082551ms).
[23:09:20.161] <TB2> INFO: 32370900 events read in total (1105373ms).
[23:09:42.886] <TB2> INFO: 33039700 events read in total (1128098ms).
[23:10:05.932] <TB2> INFO: 33709000 events read in total (1151144ms).
[23:10:28.781] <TB2> INFO: 34379100 events read in total (1173993ms).
[23:10:51.591] <TB2> INFO: 35048300 events read in total (1196804ms).
[23:11:14.328] <TB2> INFO: 35718050 events read in total (1219540ms).
[23:11:37.267] <TB2> INFO: 36398050 events read in total (1242479ms).
[23:11:44.416] <TB2> INFO: 36608000 events read in total (1249628ms).
[23:11:44.521] <TB2> INFO: Test took 1250586ms.
[23:11:44.964] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[23:11:46.878] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[23:11:48.872] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[23:11:50.620] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[23:11:52.227] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[23:11:53.802] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[23:11:55.353] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[23:11:56.886] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[23:11:58.427] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[23:11:59.907] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[23:12:01.398] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[23:12:02.902] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[23:12:04.391] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[23:12:05.861] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[23:12:07.379] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[23:12:08.883] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[23:12:10.561] <TB2> INFO: PixTestScurves::scurves() done
[23:12:10.561] <TB2> INFO: Vcal mean: 116.31 120.96 114.23 133.68 137.32 126.14 115.71 118.79 133.19 123.18 120.81 120.27 124.27 135.13 126.97 118.01
[23:12:10.561] <TB2> INFO: Vcal RMS: 5.83 5.88 5.07 7.23 5.84 7.07 5.59 5.96 7.42 5.75 7.09 6.64 6.81 5.74 6.52 5.76
[23:12:10.561] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1276 seconds
[23:12:10.561] <TB2> INFO: Decoding statistics:
[23:12:10.561] <TB2> INFO: General information:
[23:12:10.561] <TB2> INFO: 16bit words read: 0
[23:12:10.561] <TB2> INFO: valid events total: 0
[23:12:10.561] <TB2> INFO: empty events: 0
[23:12:10.561] <TB2> INFO: valid events with pixels: 0
[23:12:10.561] <TB2> INFO: valid pixel hits: 0
[23:12:10.561] <TB2> INFO: Event errors: 0
[23:12:10.561] <TB2> INFO: start marker: 0
[23:12:10.561] <TB2> INFO: stop marker: 0
[23:12:10.561] <TB2> INFO: overflow: 0
[23:12:10.561] <TB2> INFO: invalid 5bit words: 0
[23:12:10.561] <TB2> INFO: invalid XOR eye diagram: 0
[23:12:10.561] <TB2> INFO: frame (failed synchr.): 0
[23:12:10.561] <TB2> INFO: idle data (no TBM trl): 0
[23:12:10.561] <TB2> INFO: no data (only TBM hdr): 0
[23:12:10.561] <TB2> INFO: TBM errors: 0
[23:12:10.561] <TB2> INFO: flawed TBM headers: 0
[23:12:10.561] <TB2> INFO: flawed TBM trailers: 0
[23:12:10.561] <TB2> INFO: event ID mismatches: 0
[23:12:10.561] <TB2> INFO: ROC errors: 0
[23:12:10.561] <TB2> INFO: missing ROC header(s): 0
[23:12:10.561] <TB2> INFO: misplaced readback start: 0
[23:12:10.561] <TB2> INFO: Pixel decoding errors: 0
[23:12:10.561] <TB2> INFO: pixel data incomplete: 0
[23:12:10.561] <TB2> INFO: pixel address: 0
[23:12:10.561] <TB2> INFO: pulse height fill bit: 0
[23:12:10.561] <TB2> INFO: buffer corruption: 0
[23:12:10.649] <TB2> INFO: ######################################################################
[23:12:10.649] <TB2> INFO: PixTestTrim::doTest()
[23:12:10.649] <TB2> INFO: ######################################################################
[23:12:10.650] <TB2> INFO: ----------------------------------------------------------------------
[23:12:10.651] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[23:12:10.651] <TB2> INFO: ----------------------------------------------------------------------
[23:12:10.697] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[23:12:10.697] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[23:12:10.710] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:12:10.710] <TB2> INFO: run 1 of 1
[23:12:10.981] <TB2> INFO: Expecting 5025280 events.
[23:12:41.435] <TB2> INFO: 832256 events read in total (29851ms).
[23:13:11.592] <TB2> INFO: 1661184 events read in total (60008ms).
[23:13:41.739] <TB2> INFO: 2487248 events read in total (90155ms).
[23:14:11.883] <TB2> INFO: 3309352 events read in total (120299ms).
[23:14:42.103] <TB2> INFO: 4127144 events read in total (150520ms).
[23:15:11.731] <TB2> INFO: 4943048 events read in total (180147ms).
[23:15:15.116] <TB2> INFO: 5025280 events read in total (183532ms).
[23:15:15.182] <TB2> INFO: Test took 184471ms.
[23:15:31.660] <TB2> INFO: ROC 0 VthrComp = 116
[23:15:31.660] <TB2> INFO: ROC 1 VthrComp = 123
[23:15:31.661] <TB2> INFO: ROC 2 VthrComp = 110
[23:15:31.661] <TB2> INFO: ROC 3 VthrComp = 126
[23:15:31.661] <TB2> INFO: ROC 4 VthrComp = 134
[23:15:31.661] <TB2> INFO: ROC 5 VthrComp = 127
[23:15:31.661] <TB2> INFO: ROC 6 VthrComp = 114
[23:15:31.661] <TB2> INFO: ROC 7 VthrComp = 118
[23:15:31.662] <TB2> INFO: ROC 8 VthrComp = 127
[23:15:31.663] <TB2> INFO: ROC 9 VthrComp = 122
[23:15:31.663] <TB2> INFO: ROC 10 VthrComp = 113
[23:15:31.663] <TB2> INFO: ROC 11 VthrComp = 113
[23:15:31.663] <TB2> INFO: ROC 12 VthrComp = 124
[23:15:31.663] <TB2> INFO: ROC 13 VthrComp = 129
[23:15:31.663] <TB2> INFO: ROC 14 VthrComp = 127
[23:15:31.663] <TB2> INFO: ROC 15 VthrComp = 118
[23:15:31.901] <TB2> INFO: Expecting 41600 events.
[23:15:35.402] <TB2> INFO: 41600 events read in total (2909ms).
[23:15:35.402] <TB2> INFO: Test took 3736ms.
[23:15:35.412] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[23:15:35.412] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[23:15:35.424] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:15:35.424] <TB2> INFO: run 1 of 1
[23:15:35.702] <TB2> INFO: Expecting 5025280 events.
[23:16:02.702] <TB2> INFO: 592520 events read in total (26408ms).
[23:16:28.600] <TB2> INFO: 1184224 events read in total (52306ms).
[23:16:54.551] <TB2> INFO: 1775328 events read in total (78257ms).
[23:17:20.193] <TB2> INFO: 2365768 events read in total (103899ms).
[23:17:46.006] <TB2> INFO: 2953776 events read in total (129712ms).
[23:18:12.160] <TB2> INFO: 3540560 events read in total (155866ms).
[23:18:37.956] <TB2> INFO: 4126536 events read in total (181662ms).
[23:19:03.611] <TB2> INFO: 4712416 events read in total (207317ms).
[23:19:17.535] <TB2> INFO: 5025280 events read in total (221241ms).
[23:19:17.647] <TB2> INFO: Test took 222222ms.
[23:19:40.306] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 60.9427 for pixel 2/6 mean/min/max = 46.6539/32.29/61.0178
[23:19:40.306] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 60.1837 for pixel 2/7 mean/min/max = 46.0551/31.911/60.1992
[23:19:40.307] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 64.1099 for pixel 2/3 mean/min/max = 49.8096/35.3719/64.2473
[23:19:40.307] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 63.4567 for pixel 0/70 mean/min/max = 47.4435/31.3134/63.5736
[23:19:40.307] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 65.0962 for pixel 51/0 mean/min/max = 49.6514/34.1758/65.127
[23:19:40.308] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 59.7659 for pixel 21/20 mean/min/max = 45.7365/31.4151/60.0579
[23:19:40.308] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 59.0985 for pixel 18/4 mean/min/max = 46.0501/32.7702/59.3299
[23:19:40.309] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 60.1657 for pixel 8/13 mean/min/max = 46.3376/32.4772/60.198
[23:19:40.309] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 65.7512 for pixel 27/5 mean/min/max = 47.497/29.1074/65.8867
[23:19:40.310] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 61.5551 for pixel 0/2 mean/min/max = 46.793/31.872/61.7139
[23:19:40.310] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 63.8692 for pixel 15/1 mean/min/max = 48.2788/32.194/64.3636
[23:19:40.310] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 64.3685 for pixel 0/8 mean/min/max = 48.8618/33.1562/64.5674
[23:19:40.311] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 61.9087 for pixel 9/79 mean/min/max = 46.9501/31.9096/61.9906
[23:19:40.311] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 63.8973 for pixel 40/3 mean/min/max = 48.3286/32.7193/63.9379
[23:19:40.312] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 60.6712 for pixel 0/12 mean/min/max = 46.7238/32.6028/60.8449
[23:19:40.312] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 60.636 for pixel 1/16 mean/min/max = 46.3654/32.0424/60.6883
[23:19:40.313] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:19:40.402] <TB2> INFO: Expecting 411648 events.
[23:19:49.704] <TB2> INFO: 411648 events read in total (8702ms).
[23:19:49.713] <TB2> INFO: Expecting 411648 events.
[23:19:58.930] <TB2> INFO: 411648 events read in total (8814ms).
[23:19:58.940] <TB2> INFO: Expecting 411648 events.
[23:20:08.098] <TB2> INFO: 411648 events read in total (8755ms).
[23:20:08.111] <TB2> INFO: Expecting 411648 events.
[23:20:17.352] <TB2> INFO: 411648 events read in total (8838ms).
[23:20:17.372] <TB2> INFO: Expecting 411648 events.
[23:20:26.708] <TB2> INFO: 411648 events read in total (8933ms).
[23:20:26.726] <TB2> INFO: Expecting 411648 events.
[23:20:36.155] <TB2> INFO: 411648 events read in total (9026ms).
[23:20:36.176] <TB2> INFO: Expecting 411648 events.
[23:20:45.611] <TB2> INFO: 411648 events read in total (9032ms).
[23:20:45.636] <TB2> INFO: Expecting 411648 events.
[23:20:55.105] <TB2> INFO: 411648 events read in total (9066ms).
[23:20:55.131] <TB2> INFO: Expecting 411648 events.
[23:21:04.665] <TB2> INFO: 411648 events read in total (9131ms).
[23:21:04.759] <TB2> INFO: Expecting 411648 events.
[23:21:14.191] <TB2> INFO: 411648 events read in total (9028ms).
[23:21:14.233] <TB2> INFO: Expecting 411648 events.
[23:21:23.660] <TB2> INFO: 411648 events read in total (9023ms).
[23:21:23.702] <TB2> INFO: Expecting 411648 events.
[23:21:33.153] <TB2> INFO: 411648 events read in total (9048ms).
[23:21:33.202] <TB2> INFO: Expecting 411648 events.
[23:21:42.703] <TB2> INFO: 411648 events read in total (9098ms).
[23:21:42.794] <TB2> INFO: Expecting 411648 events.
[23:21:52.257] <TB2> INFO: 411648 events read in total (9060ms).
[23:21:52.318] <TB2> INFO: Expecting 411648 events.
[23:22:01.806] <TB2> INFO: 411648 events read in total (9085ms).
[23:22:01.862] <TB2> INFO: Expecting 411648 events.
[23:22:11.388] <TB2> INFO: 411648 events read in total (9123ms).
[23:22:11.460] <TB2> INFO: Test took 151147ms.
[23:22:12.094] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[23:22:12.108] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:22:12.108] <TB2> INFO: run 1 of 1
[23:22:12.345] <TB2> INFO: Expecting 5025280 events.
[23:22:39.204] <TB2> INFO: 590904 events read in total (26267ms).
[23:23:05.338] <TB2> INFO: 1182152 events read in total (52401ms).
[23:23:31.797] <TB2> INFO: 1773848 events read in total (78860ms).
[23:23:58.480] <TB2> INFO: 2362832 events read in total (105543ms).
[23:24:25.181] <TB2> INFO: 2955000 events read in total (132244ms).
[23:24:52.015] <TB2> INFO: 3547328 events read in total (159078ms).
[23:25:18.685] <TB2> INFO: 4139152 events read in total (185748ms).
[23:25:45.588] <TB2> INFO: 4729624 events read in total (212652ms).
[23:25:59.261] <TB2> INFO: 5025280 events read in total (226324ms).
[23:25:59.485] <TB2> INFO: Test took 227377ms.
[23:26:21.718] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 1.955742 .. 145.581815
[23:26:21.998] <TB2> INFO: Expecting 208000 events.
[23:26:31.389] <TB2> INFO: 208000 events read in total (8799ms).
[23:26:31.391] <TB2> INFO: Test took 9671ms.
[23:26:31.440] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 155 (-1/-1) hits flags = 528 (plus default)
[23:26:31.453] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:26:31.453] <TB2> INFO: run 1 of 1
[23:26:31.731] <TB2> INFO: Expecting 5158400 events.
[23:26:57.589] <TB2> INFO: 585408 events read in total (25266ms).
[23:27:23.507] <TB2> INFO: 1170528 events read in total (51186ms).
[23:27:49.540] <TB2> INFO: 1755720 events read in total (77217ms).
[23:28:15.767] <TB2> INFO: 2340840 events read in total (103444ms).
[23:28:41.525] <TB2> INFO: 2925544 events read in total (129202ms).
[23:29:07.685] <TB2> INFO: 3509160 events read in total (155362ms).
[23:29:33.490] <TB2> INFO: 4092784 events read in total (181167ms).
[23:29:59.534] <TB2> INFO: 4676800 events read in total (207212ms).
[23:30:21.023] <TB2> INFO: 5158400 events read in total (228700ms).
[23:30:21.178] <TB2> INFO: Test took 229725ms.
[23:30:45.305] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 27.398073 .. 45.939234
[23:30:45.550] <TB2> INFO: Expecting 208000 events.
[23:30:55.290] <TB2> INFO: 208000 events read in total (9148ms).
[23:30:55.292] <TB2> INFO: Test took 9985ms.
[23:30:55.342] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 55 (-1/-1) hits flags = 528 (plus default)
[23:30:55.355] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:30:55.355] <TB2> INFO: run 1 of 1
[23:30:55.641] <TB2> INFO: Expecting 1297920 events.
[23:31:24.203] <TB2> INFO: 663184 events read in total (27971ms).
[23:31:51.175] <TB2> INFO: 1297920 events read in total (54943ms).
[23:31:51.216] <TB2> INFO: Test took 55862ms.
[23:32:03.946] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 29.091911 .. 49.091746
[23:32:04.243] <TB2> INFO: Expecting 208000 events.
[23:32:14.301] <TB2> INFO: 208000 events read in total (9466ms).
[23:32:14.302] <TB2> INFO: Test took 10355ms.
[23:32:14.350] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 19 .. 59 (-1/-1) hits flags = 528 (plus default)
[23:32:14.364] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:32:14.364] <TB2> INFO: run 1 of 1
[23:32:14.642] <TB2> INFO: Expecting 1364480 events.
[23:32:42.919] <TB2> INFO: 639056 events read in total (27685ms).
[23:33:09.977] <TB2> INFO: 1276512 events read in total (54743ms).
[23:33:14.092] <TB2> INFO: 1364480 events read in total (58858ms).
[23:33:14.125] <TB2> INFO: Test took 59761ms.
[23:33:29.223] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 25.972953 .. 49.959066
[23:33:29.502] <TB2> INFO: Expecting 208000 events.
[23:33:39.124] <TB2> INFO: 208000 events read in total (9031ms).
[23:33:39.125] <TB2> INFO: Test took 9900ms.
[23:33:39.173] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 59 (-1/-1) hits flags = 528 (plus default)
[23:33:39.186] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:33:39.186] <TB2> INFO: run 1 of 1
[23:33:39.465] <TB2> INFO: Expecting 1497600 events.
[23:34:07.933] <TB2> INFO: 654032 events read in total (27878ms).
[23:34:35.712] <TB2> INFO: 1307104 events read in total (55657ms).
[23:34:44.195] <TB2> INFO: 1497600 events read in total (64139ms).
[23:34:44.232] <TB2> INFO: Test took 65047ms.
[23:34:59.400] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[23:34:59.400] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[23:34:59.412] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:34:59.413] <TB2> INFO: run 1 of 1
[23:34:59.680] <TB2> INFO: Expecting 1364480 events.
[23:35:28.119] <TB2> INFO: 669584 events read in total (27847ms).
[23:35:56.238] <TB2> INFO: 1337880 events read in total (55967ms).
[23:35:57.858] <TB2> INFO: 1364480 events read in total (57586ms).
[23:35:57.887] <TB2> INFO: Test took 58475ms.
[23:36:10.387] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C0.dat
[23:36:10.387] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C1.dat
[23:36:10.387] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C2.dat
[23:36:10.387] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C3.dat
[23:36:10.387] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C4.dat
[23:36:10.387] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C5.dat
[23:36:10.387] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C6.dat
[23:36:10.387] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C7.dat
[23:36:10.387] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C8.dat
[23:36:10.387] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C9.dat
[23:36:10.387] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C10.dat
[23:36:10.388] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C11.dat
[23:36:10.388] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C12.dat
[23:36:10.388] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C13.dat
[23:36:10.388] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C14.dat
[23:36:10.388] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C15.dat
[23:36:10.388] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C0.dat
[23:36:10.394] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C1.dat
[23:36:10.398] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C2.dat
[23:36:10.403] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C3.dat
[23:36:10.408] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C4.dat
[23:36:10.412] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C5.dat
[23:36:10.417] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C6.dat
[23:36:10.422] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C7.dat
[23:36:10.426] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C8.dat
[23:36:10.431] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C9.dat
[23:36:10.436] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C10.dat
[23:36:10.441] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C11.dat
[23:36:10.445] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C12.dat
[23:36:10.450] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C13.dat
[23:36:10.455] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C14.dat
[23:36:10.460] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters35_C15.dat
[23:36:10.465] <TB2> INFO: PixTestTrim::trimTest() done
[23:36:10.465] <TB2> INFO: vtrim: 114 119 134 123 139 105 116 112 146 110 121 113 127 127 121 122
[23:36:10.465] <TB2> INFO: vthrcomp: 116 123 110 126 134 127 114 118 127 122 113 113 124 129 127 118
[23:36:10.465] <TB2> INFO: vcal mean: 35.10 34.96 35.12 35.14 35.12 35.01 34.99 35.13 36.10 35.00 35.12 35.20 35.02 35.76 35.02 35.12
[23:36:10.465] <TB2> INFO: vcal RMS: 1.11 1.01 1.16 1.32 1.26 1.11 1.09 1.25 2.59 1.09 1.41 1.24 1.07 1.88 1.13 1.27
[23:36:10.465] <TB2> INFO: bits mean: 9.49 9.50 8.33 9.00 8.40 9.84 9.61 9.95 10.67 8.98 9.24 8.59 9.51 9.86 9.17 9.54
[23:36:10.465] <TB2> INFO: bits RMS: 2.71 2.75 2.59 2.98 2.71 2.62 2.60 2.45 2.34 2.97 2.70 2.80 2.72 2.52 2.78 2.75
[23:36:10.472] <TB2> INFO: ----------------------------------------------------------------------
[23:36:10.472] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[23:36:10.472] <TB2> INFO: ----------------------------------------------------------------------
[23:36:10.475] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[23:36:10.486] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[23:36:10.487] <TB2> INFO: run 1 of 1
[23:36:10.725] <TB2> INFO: Expecting 4160000 events.
[23:36:43.523] <TB2> INFO: 773925 events read in total (32206ms).
[23:37:16.110] <TB2> INFO: 1539580 events read in total (64793ms).
[23:37:48.469] <TB2> INFO: 2298805 events read in total (97152ms).
[23:38:20.550] <TB2> INFO: 3053610 events read in total (129233ms).
[23:38:52.697] <TB2> INFO: 3805690 events read in total (161381ms).
[23:39:08.228] <TB2> INFO: 4160000 events read in total (176911ms).
[23:39:08.323] <TB2> INFO: Test took 177836ms.
[23:39:34.781] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 253 (-1/-1) hits flags = 528 (plus default)
[23:39:34.794] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[23:39:34.794] <TB2> INFO: run 1 of 1
[23:39:35.033] <TB2> INFO: Expecting 5283200 events.
[23:40:05.990] <TB2> INFO: 687285 events read in total (30362ms).
[23:40:35.993] <TB2> INFO: 1370730 events read in total (60365ms).
[23:41:06.407] <TB2> INFO: 2052250 events read in total (90779ms).
[23:41:36.480] <TB2> INFO: 2731580 events read in total (120852ms).
[23:42:07.011] <TB2> INFO: 3407360 events read in total (151383ms).
[23:42:37.105] <TB2> INFO: 4083545 events read in total (181477ms).
[23:43:06.551] <TB2> INFO: 4757570 events read in total (210923ms).
[23:43:30.369] <TB2> INFO: 5283200 events read in total (234741ms).
[23:43:30.509] <TB2> INFO: Test took 235715ms.
[23:44:00.357] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 207 (-1/-1) hits flags = 528 (plus default)
[23:44:00.371] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[23:44:00.371] <TB2> INFO: run 1 of 1
[23:44:00.624] <TB2> INFO: Expecting 4326400 events.
[23:44:33.170] <TB2> INFO: 734140 events read in total (31955ms).
[23:45:03.568] <TB2> INFO: 1462720 events read in total (62353ms).
[23:45:35.424] <TB2> INFO: 2187990 events read in total (94209ms).
[23:46:07.160] <TB2> INFO: 2907885 events read in total (125945ms).
[23:46:37.867] <TB2> INFO: 3626625 events read in total (156652ms).
[23:47:08.787] <TB2> INFO: 4326400 events read in total (187572ms).
[23:47:08.986] <TB2> INFO: Test took 188615ms.
[23:47:34.820] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 208 (-1/-1) hits flags = 528 (plus default)
[23:47:34.833] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[23:47:34.833] <TB2> INFO: run 1 of 1
[23:47:35.075] <TB2> INFO: Expecting 4347200 events.
[23:48:08.167] <TB2> INFO: 732990 events read in total (32501ms).
[23:48:40.233] <TB2> INFO: 1460295 events read in total (64567ms).
[23:49:11.281] <TB2> INFO: 2184390 events read in total (95615ms).
[23:49:42.569] <TB2> INFO: 2902775 events read in total (126903ms).
[23:50:14.262] <TB2> INFO: 3620115 events read in total (158596ms).
[23:50:45.758] <TB2> INFO: 4338760 events read in total (190092ms).
[23:50:46.567] <TB2> INFO: 4347200 events read in total (190901ms).
[23:50:46.651] <TB2> INFO: Test took 191817ms.
[23:51:15.686] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[23:51:15.699] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[23:51:15.699] <TB2> INFO: run 1 of 1
[23:51:15.935] <TB2> INFO: Expecting 4305600 events.
[23:51:48.018] <TB2> INFO: 735370 events read in total (31491ms).
[23:52:19.383] <TB2> INFO: 1465090 events read in total (62856ms).
[23:52:50.516] <TB2> INFO: 2191560 events read in total (93989ms).
[23:53:21.636] <TB2> INFO: 2912410 events read in total (125109ms).
[23:53:52.968] <TB2> INFO: 3632195 events read in total (156441ms).
[23:54:22.197] <TB2> INFO: 4305600 events read in total (185670ms).
[23:54:22.303] <TB2> INFO: Test took 186604ms.
[23:54:51.399] <TB2> INFO: PixTestTrim::trimBitTest() done
[23:54:51.400] <TB2> INFO: PixTestTrim::doTest() done, duration: 2560 seconds
[23:54:51.400] <TB2> INFO: Decoding statistics:
[23:54:51.400] <TB2> INFO: General information:
[23:54:51.400] <TB2> INFO: 16bit words read: 0
[23:54:51.400] <TB2> INFO: valid events total: 0
[23:54:51.400] <TB2> INFO: empty events: 0
[23:54:51.400] <TB2> INFO: valid events with pixels: 0
[23:54:51.400] <TB2> INFO: valid pixel hits: 0
[23:54:51.401] <TB2> INFO: Event errors: 0
[23:54:51.401] <TB2> INFO: start marker: 0
[23:54:51.401] <TB2> INFO: stop marker: 0
[23:54:51.401] <TB2> INFO: overflow: 0
[23:54:51.401] <TB2> INFO: invalid 5bit words: 0
[23:54:51.401] <TB2> INFO: invalid XOR eye diagram: 0
[23:54:51.401] <TB2> INFO: frame (failed synchr.): 0
[23:54:51.401] <TB2> INFO: idle data (no TBM trl): 0
[23:54:51.401] <TB2> INFO: no data (only TBM hdr): 0
[23:54:51.401] <TB2> INFO: TBM errors: 0
[23:54:51.401] <TB2> INFO: flawed TBM headers: 0
[23:54:51.401] <TB2> INFO: flawed TBM trailers: 0
[23:54:51.401] <TB2> INFO: event ID mismatches: 0
[23:54:51.401] <TB2> INFO: ROC errors: 0
[23:54:51.402] <TB2> INFO: missing ROC header(s): 0
[23:54:51.402] <TB2> INFO: misplaced readback start: 0
[23:54:51.402] <TB2> INFO: Pixel decoding errors: 0
[23:54:51.402] <TB2> INFO: pixel data incomplete: 0
[23:54:51.402] <TB2> INFO: pixel address: 0
[23:54:51.402] <TB2> INFO: pulse height fill bit: 0
[23:54:51.402] <TB2> INFO: buffer corruption: 0
[23:54:52.074] <TB2> INFO: ######################################################################
[23:54:52.074] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[23:54:52.074] <TB2> INFO: ######################################################################
[23:54:52.311] <TB2> INFO: Expecting 41600 events.
[23:54:55.834] <TB2> INFO: 41600 events read in total (2931ms).
[23:54:55.835] <TB2> INFO: Test took 3760ms.
[23:54:56.278] <TB2> INFO: Expecting 41600 events.
[23:54:59.773] <TB2> INFO: 41600 events read in total (2904ms).
[23:54:59.774] <TB2> INFO: Test took 3733ms.
[23:55:00.066] <TB2> INFO: Expecting 41600 events.
[23:55:03.622] <TB2> INFO: 41600 events read in total (2965ms).
[23:55:03.624] <TB2> INFO: Test took 3825ms.
[23:55:03.913] <TB2> INFO: Expecting 41600 events.
[23:55:07.441] <TB2> INFO: 41600 events read in total (2936ms).
[23:55:07.442] <TB2> INFO: Test took 3793ms.
[23:55:07.732] <TB2> INFO: Expecting 41600 events.
[23:55:11.428] <TB2> INFO: 41600 events read in total (3104ms).
[23:55:11.429] <TB2> INFO: Test took 3962ms.
[23:55:11.719] <TB2> INFO: Expecting 41600 events.
[23:55:15.237] <TB2> INFO: 41600 events read in total (2926ms).
[23:55:15.238] <TB2> INFO: Test took 3784ms.
[23:55:15.527] <TB2> INFO: Expecting 41600 events.
[23:55:19.017] <TB2> INFO: 41600 events read in total (2898ms).
[23:55:19.018] <TB2> INFO: Test took 3755ms.
[23:55:19.308] <TB2> INFO: Expecting 41600 events.
[23:55:22.800] <TB2> INFO: 41600 events read in total (2901ms).
[23:55:22.801] <TB2> INFO: Test took 3758ms.
[23:55:23.094] <TB2> INFO: Expecting 41600 events.
[23:55:26.650] <TB2> INFO: 41600 events read in total (2965ms).
[23:55:26.651] <TB2> INFO: Test took 3825ms.
[23:55:26.941] <TB2> INFO: Expecting 41600 events.
[23:55:30.464] <TB2> INFO: 41600 events read in total (2931ms).
[23:55:30.465] <TB2> INFO: Test took 3789ms.
[23:55:30.757] <TB2> INFO: Expecting 41600 events.
[23:55:34.306] <TB2> INFO: 41600 events read in total (2957ms).
[23:55:34.307] <TB2> INFO: Test took 3816ms.
[23:55:34.597] <TB2> INFO: Expecting 41600 events.
[23:55:38.153] <TB2> INFO: 41600 events read in total (2964ms).
[23:55:38.153] <TB2> INFO: Test took 3822ms.
[23:55:38.444] <TB2> INFO: Expecting 41600 events.
[23:55:41.961] <TB2> INFO: 41600 events read in total (2926ms).
[23:55:41.962] <TB2> INFO: Test took 3784ms.
[23:55:42.252] <TB2> INFO: Expecting 41600 events.
[23:55:45.879] <TB2> INFO: 41600 events read in total (3035ms).
[23:55:45.880] <TB2> INFO: Test took 3894ms.
[23:55:46.171] <TB2> INFO: Expecting 41600 events.
[23:55:49.720] <TB2> INFO: 41600 events read in total (2957ms).
[23:55:49.721] <TB2> INFO: Test took 3816ms.
[23:55:50.029] <TB2> INFO: Expecting 41600 events.
[23:55:53.603] <TB2> INFO: 41600 events read in total (2983ms).
[23:55:53.605] <TB2> INFO: Test took 3856ms.
[23:55:53.895] <TB2> INFO: Expecting 41600 events.
[23:55:57.473] <TB2> INFO: 41600 events read in total (2986ms).
[23:55:57.474] <TB2> INFO: Test took 3844ms.
[23:55:57.763] <TB2> INFO: Expecting 41600 events.
[23:56:01.301] <TB2> INFO: 41600 events read in total (2946ms).
[23:56:01.302] <TB2> INFO: Test took 3804ms.
[23:56:01.591] <TB2> INFO: Expecting 41600 events.
[23:56:05.136] <TB2> INFO: 41600 events read in total (2953ms).
[23:56:05.137] <TB2> INFO: Test took 3811ms.
[23:56:05.429] <TB2> INFO: Expecting 41600 events.
[23:56:08.951] <TB2> INFO: 41600 events read in total (2930ms).
[23:56:08.952] <TB2> INFO: Test took 3788ms.
[23:56:09.265] <TB2> INFO: Expecting 41600 events.
[23:56:12.791] <TB2> INFO: 41600 events read in total (2934ms).
[23:56:12.792] <TB2> INFO: Test took 3816ms.
[23:56:13.084] <TB2> INFO: Expecting 41600 events.
[23:56:16.795] <TB2> INFO: 41600 events read in total (3120ms).
[23:56:16.796] <TB2> INFO: Test took 3977ms.
[23:56:17.087] <TB2> INFO: Expecting 41600 events.
[23:56:20.748] <TB2> INFO: 41600 events read in total (3069ms).
[23:56:20.749] <TB2> INFO: Test took 3926ms.
[23:56:21.038] <TB2> INFO: Expecting 41600 events.
[23:56:24.607] <TB2> INFO: 41600 events read in total (2977ms).
[23:56:24.608] <TB2> INFO: Test took 3835ms.
[23:56:24.900] <TB2> INFO: Expecting 41600 events.
[23:56:28.518] <TB2> INFO: 41600 events read in total (3027ms).
[23:56:28.519] <TB2> INFO: Test took 3884ms.
[23:56:28.808] <TB2> INFO: Expecting 41600 events.
[23:56:32.306] <TB2> INFO: 41600 events read in total (2906ms).
[23:56:32.307] <TB2> INFO: Test took 3764ms.
[23:56:32.598] <TB2> INFO: Expecting 41600 events.
[23:56:36.186] <TB2> INFO: 41600 events read in total (2997ms).
[23:56:36.187] <TB2> INFO: Test took 3854ms.
[23:56:36.480] <TB2> INFO: Expecting 2560 events.
[23:56:37.364] <TB2> INFO: 2560 events read in total (292ms).
[23:56:37.364] <TB2> INFO: Test took 1160ms.
[23:56:37.673] <TB2> INFO: Expecting 2560 events.
[23:56:38.561] <TB2> INFO: 2560 events read in total (296ms).
[23:56:38.561] <TB2> INFO: Test took 1196ms.
[23:56:38.869] <TB2> INFO: Expecting 2560 events.
[23:56:39.753] <TB2> INFO: 2560 events read in total (292ms).
[23:56:39.753] <TB2> INFO: Test took 1189ms.
[23:56:40.061] <TB2> INFO: Expecting 2560 events.
[23:56:40.943] <TB2> INFO: 2560 events read in total (291ms).
[23:56:40.944] <TB2> INFO: Test took 1190ms.
[23:56:41.251] <TB2> INFO: Expecting 2560 events.
[23:56:42.130] <TB2> INFO: 2560 events read in total (287ms).
[23:56:42.130] <TB2> INFO: Test took 1186ms.
[23:56:42.439] <TB2> INFO: Expecting 2560 events.
[23:56:43.317] <TB2> INFO: 2560 events read in total (287ms).
[23:56:43.317] <TB2> INFO: Test took 1186ms.
[23:56:43.625] <TB2> INFO: Expecting 2560 events.
[23:56:44.509] <TB2> INFO: 2560 events read in total (292ms).
[23:56:44.510] <TB2> INFO: Test took 1193ms.
[23:56:44.818] <TB2> INFO: Expecting 2560 events.
[23:56:45.700] <TB2> INFO: 2560 events read in total (291ms).
[23:56:45.700] <TB2> INFO: Test took 1190ms.
[23:56:46.008] <TB2> INFO: Expecting 2560 events.
[23:56:46.890] <TB2> INFO: 2560 events read in total (290ms).
[23:56:46.891] <TB2> INFO: Test took 1190ms.
[23:56:47.199] <TB2> INFO: Expecting 2560 events.
[23:56:48.088] <TB2> INFO: 2560 events read in total (298ms).
[23:56:48.089] <TB2> INFO: Test took 1197ms.
[23:56:48.397] <TB2> INFO: Expecting 2560 events.
[23:56:49.285] <TB2> INFO: 2560 events read in total (296ms).
[23:56:49.285] <TB2> INFO: Test took 1195ms.
[23:56:49.593] <TB2> INFO: Expecting 2560 events.
[23:56:50.476] <TB2> INFO: 2560 events read in total (291ms).
[23:56:50.476] <TB2> INFO: Test took 1191ms.
[23:56:50.784] <TB2> INFO: Expecting 2560 events.
[23:56:51.677] <TB2> INFO: 2560 events read in total (301ms).
[23:56:51.678] <TB2> INFO: Test took 1201ms.
[23:56:51.985] <TB2> INFO: Expecting 2560 events.
[23:56:52.875] <TB2> INFO: 2560 events read in total (298ms).
[23:56:52.875] <TB2> INFO: Test took 1196ms.
[23:56:53.183] <TB2> INFO: Expecting 2560 events.
[23:56:54.066] <TB2> INFO: 2560 events read in total (291ms).
[23:56:54.066] <TB2> INFO: Test took 1190ms.
[23:56:54.374] <TB2> INFO: Expecting 2560 events.
[23:56:55.266] <TB2> INFO: 2560 events read in total (300ms).
[23:56:55.266] <TB2> INFO: Test took 1199ms.
[23:56:55.271] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:56:55.576] <TB2> INFO: Expecting 655360 events.
[23:57:10.358] <TB2> INFO: 655360 events read in total (14190ms).
[23:57:10.373] <TB2> INFO: Expecting 655360 events.
[23:57:25.049] <TB2> INFO: 655360 events read in total (14273ms).
[23:57:25.067] <TB2> INFO: Expecting 655360 events.
[23:57:39.723] <TB2> INFO: 655360 events read in total (14253ms).
[23:57:39.744] <TB2> INFO: Expecting 655360 events.
[23:57:54.375] <TB2> INFO: 655360 events read in total (14228ms).
[23:57:54.404] <TB2> INFO: Expecting 655360 events.
[23:58:09.070] <TB2> INFO: 655360 events read in total (14263ms).
[23:58:09.112] <TB2> INFO: Expecting 655360 events.
[23:58:23.919] <TB2> INFO: 655360 events read in total (14404ms).
[23:58:23.967] <TB2> INFO: Expecting 655360 events.
[23:58:38.626] <TB2> INFO: 655360 events read in total (14256ms).
[23:58:38.664] <TB2> INFO: Expecting 655360 events.
[23:58:53.673] <TB2> INFO: 655360 events read in total (14606ms).
[23:58:53.719] <TB2> INFO: Expecting 655360 events.
[23:59:08.561] <TB2> INFO: 655360 events read in total (14439ms).
[23:59:08.618] <TB2> INFO: Expecting 655360 events.
[23:59:23.361] <TB2> INFO: 655360 events read in total (14340ms).
[23:59:23.425] <TB2> INFO: Expecting 655360 events.
[23:59:38.035] <TB2> INFO: 655360 events read in total (14207ms).
[23:59:38.095] <TB2> INFO: Expecting 655360 events.
[23:59:52.782] <TB2> INFO: 655360 events read in total (14284ms).
[23:59:52.876] <TB2> INFO: Expecting 655360 events.
[00:00:07.542] <TB2> INFO: 655360 events read in total (14263ms).
[00:00:07.660] <TB2> INFO: Expecting 655360 events.
[00:00:22.389] <TB2> INFO: 655360 events read in total (14326ms).
[00:00:22.480] <TB2> INFO: Expecting 655360 events.
[00:00:37.184] <TB2> INFO: 655360 events read in total (14300ms).
[00:00:37.291] <TB2> INFO: Expecting 655360 events.
[00:00:52.033] <TB2> INFO: 655360 events read in total (14339ms).
[00:00:52.133] <TB2> INFO: Test took 236862ms.
[00:00:52.246] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:00:52.495] <TB2> INFO: Expecting 655360 events.
[00:01:07.268] <TB2> INFO: 655360 events read in total (14181ms).
[00:01:07.281] <TB2> INFO: Expecting 655360 events.
[00:01:21.880] <TB2> INFO: 655360 events read in total (14196ms).
[00:01:21.897] <TB2> INFO: Expecting 655360 events.
[00:01:36.341] <TB2> INFO: 655360 events read in total (14041ms).
[00:01:36.365] <TB2> INFO: Expecting 655360 events.
[00:01:50.649] <TB2> INFO: 655360 events read in total (13881ms).
[00:01:50.682] <TB2> INFO: Expecting 655360 events.
[00:02:05.159] <TB2> INFO: 655360 events read in total (14074ms).
[00:02:05.202] <TB2> INFO: Expecting 655360 events.
[00:02:19.463] <TB2> INFO: 655360 events read in total (13858ms).
[00:02:19.499] <TB2> INFO: Expecting 655360 events.
[00:02:33.826] <TB2> INFO: 655360 events read in total (13924ms).
[00:02:33.865] <TB2> INFO: Expecting 655360 events.
[00:02:48.303] <TB2> INFO: 655360 events read in total (14035ms).
[00:02:48.352] <TB2> INFO: Expecting 655360 events.
[00:03:02.556] <TB2> INFO: 655360 events read in total (13801ms).
[00:03:02.603] <TB2> INFO: Expecting 655360 events.
[00:03:17.232] <TB2> INFO: 655360 events read in total (14226ms).
[00:03:17.357] <TB2> INFO: Expecting 655360 events.
[00:03:31.595] <TB2> INFO: 655360 events read in total (13835ms).
[00:03:31.656] <TB2> INFO: Expecting 655360 events.
[00:03:46.157] <TB2> INFO: 655360 events read in total (14098ms).
[00:03:46.236] <TB2> INFO: Expecting 655360 events.
[00:04:00.747] <TB2> INFO: 655360 events read in total (14107ms).
[00:04:00.852] <TB2> INFO: Expecting 655360 events.
[00:04:15.204] <TB2> INFO: 655360 events read in total (13949ms).
[00:04:15.294] <TB2> INFO: Expecting 655360 events.
[00:04:29.803] <TB2> INFO: 655360 events read in total (14106ms).
[00:04:29.928] <TB2> INFO: Expecting 655360 events.
[00:04:44.601] <TB2> INFO: 655360 events read in total (14270ms).
[00:04:44.704] <TB2> INFO: Test took 232458ms.
[00:04:44.872] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[00:04:44.880] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[00:04:44.888] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[00:04:44.895] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[00:04:44.903] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[00:04:44.911] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[00:04:44.919] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[00:04:44.926] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[00:04:44.932] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[00:04:44.938] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[00:04:44.944] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[00:04:44.950] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[00:04:44.957] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[00:04:44.963] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[00:04:44.969] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[00:04:44.976] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[00:04:44.983] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[00:04:44.989] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[00:04:44.996] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[00:04:44.002] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[00:04:45.008] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[00:04:45.014] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[00:04:45.020] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[00:04:45.027] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[00:04:45.035] <TB2> INFO: safety margin for low PH: adding 10, margin is now 30
[00:04:45.041] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[00:04:45.047] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[00:04:45.052] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[00:04:45.058] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[00:04:45.064] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[00:04:45.070] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[00:04:45.075] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[00:04:45.081] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[00:04:45.087] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[00:04:45.092] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[00:04:45.098] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[00:04:45.104] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[00:04:45.110] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[00:04:45.115] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[00:04:45.121] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[00:04:45.127] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[00:04:45.133] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[00:04:45.141] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[00:04:45.149] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[00:04:45.157] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[00:04:45.165] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[00:04:45.173] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[00:04:45.181] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[00:04:45.188] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[00:04:45.197] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[00:04:45.204] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[00:04:45.212] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[00:04:45.220] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[00:04:45.228] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[00:04:45.236] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[00:04:45.243] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[00:04:45.251] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[00:04:45.260] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[00:04:45.268] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[00:04:45.276] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[00:04:45.284] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[00:04:45.291] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[00:04:45.299] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[00:04:45.307] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[00:04:45.315] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[00:04:45.323] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[00:04:45.331] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[00:04:45.339] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[00:04:45.347] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[00:04:45.356] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[00:04:45.363] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[00:04:45.371] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[00:04:45.379] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[00:04:45.387] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[00:04:45.395] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[00:04:45.430] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C0.dat
[00:04:45.430] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C1.dat
[00:04:45.430] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C2.dat
[00:04:45.431] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C3.dat
[00:04:45.431] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C4.dat
[00:04:45.431] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C5.dat
[00:04:45.431] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C6.dat
[00:04:45.431] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C7.dat
[00:04:45.431] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C8.dat
[00:04:45.431] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C9.dat
[00:04:45.431] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C10.dat
[00:04:45.431] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C11.dat
[00:04:45.431] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C12.dat
[00:04:45.432] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C13.dat
[00:04:45.432] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C14.dat
[00:04:45.432] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters35_C15.dat
[00:04:45.673] <TB2> INFO: Expecting 41600 events.
[00:04:48.836] <TB2> INFO: 41600 events read in total (2571ms).
[00:04:48.837] <TB2> INFO: Test took 3402ms.
[00:04:49.295] <TB2> INFO: Expecting 41600 events.
[00:04:52.403] <TB2> INFO: 41600 events read in total (2516ms).
[00:04:52.404] <TB2> INFO: Test took 3352ms.
[00:04:52.885] <TB2> INFO: Expecting 41600 events.
[00:04:56.024] <TB2> INFO: 41600 events read in total (2548ms).
[00:04:56.025] <TB2> INFO: Test took 3409ms.
[00:04:56.241] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:56.331] <TB2> INFO: Expecting 2560 events.
[00:04:57.215] <TB2> INFO: 2560 events read in total (293ms).
[00:04:57.216] <TB2> INFO: Test took 975ms.
[00:04:57.219] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:57.523] <TB2> INFO: Expecting 2560 events.
[00:04:58.407] <TB2> INFO: 2560 events read in total (292ms).
[00:04:58.407] <TB2> INFO: Test took 1188ms.
[00:04:58.412] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:58.715] <TB2> INFO: Expecting 2560 events.
[00:04:59.606] <TB2> INFO: 2560 events read in total (299ms).
[00:04:59.607] <TB2> INFO: Test took 1195ms.
[00:04:59.611] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:04:59.914] <TB2> INFO: Expecting 2560 events.
[00:05:00.805] <TB2> INFO: 2560 events read in total (299ms).
[00:05:00.805] <TB2> INFO: Test took 1194ms.
[00:05:00.807] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:01.113] <TB2> INFO: Expecting 2560 events.
[00:05:01.002] <TB2> INFO: 2560 events read in total (297ms).
[00:05:01.002] <TB2> INFO: Test took 1195ms.
[00:05:02.004] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:02.311] <TB2> INFO: Expecting 2560 events.
[00:05:03.208] <TB2> INFO: 2560 events read in total (306ms).
[00:05:03.209] <TB2> INFO: Test took 1205ms.
[00:05:03.211] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:03.518] <TB2> INFO: Expecting 2560 events.
[00:05:04.412] <TB2> INFO: 2560 events read in total (302ms).
[00:05:04.412] <TB2> INFO: Test took 1201ms.
[00:05:04.415] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:04.720] <TB2> INFO: Expecting 2560 events.
[00:05:05.614] <TB2> INFO: 2560 events read in total (302ms).
[00:05:05.614] <TB2> INFO: Test took 1199ms.
[00:05:05.617] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:05.923] <TB2> INFO: Expecting 2560 events.
[00:05:06.813] <TB2> INFO: 2560 events read in total (298ms).
[00:05:06.813] <TB2> INFO: Test took 1196ms.
[00:05:06.820] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:07.120] <TB2> INFO: Expecting 2560 events.
[00:05:08.006] <TB2> INFO: 2560 events read in total (294ms).
[00:05:08.007] <TB2> INFO: Test took 1187ms.
[00:05:08.009] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:08.315] <TB2> INFO: Expecting 2560 events.
[00:05:09.201] <TB2> INFO: 2560 events read in total (294ms).
[00:05:09.201] <TB2> INFO: Test took 1192ms.
[00:05:09.206] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:09.509] <TB2> INFO: Expecting 2560 events.
[00:05:10.387] <TB2> INFO: 2560 events read in total (286ms).
[00:05:10.387] <TB2> INFO: Test took 1181ms.
[00:05:10.390] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:10.696] <TB2> INFO: Expecting 2560 events.
[00:05:11.584] <TB2> INFO: 2560 events read in total (297ms).
[00:05:11.584] <TB2> INFO: Test took 1194ms.
[00:05:11.588] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:11.892] <TB2> INFO: Expecting 2560 events.
[00:05:12.778] <TB2> INFO: 2560 events read in total (294ms).
[00:05:12.778] <TB2> INFO: Test took 1190ms.
[00:05:12.783] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:13.086] <TB2> INFO: Expecting 2560 events.
[00:05:13.967] <TB2> INFO: 2560 events read in total (289ms).
[00:05:13.967] <TB2> INFO: Test took 1184ms.
[00:05:13.971] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:14.275] <TB2> INFO: Expecting 2560 events.
[00:05:15.161] <TB2> INFO: 2560 events read in total (294ms).
[00:05:15.161] <TB2> INFO: Test took 1190ms.
[00:05:15.166] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:15.474] <TB2> INFO: Expecting 2560 events.
[00:05:16.363] <TB2> INFO: 2560 events read in total (297ms).
[00:05:16.363] <TB2> INFO: Test took 1197ms.
[00:05:16.365] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:16.672] <TB2> INFO: Expecting 2560 events.
[00:05:17.553] <TB2> INFO: 2560 events read in total (289ms).
[00:05:17.553] <TB2> INFO: Test took 1188ms.
[00:05:17.556] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:17.862] <TB2> INFO: Expecting 2560 events.
[00:05:18.752] <TB2> INFO: 2560 events read in total (298ms).
[00:05:18.753] <TB2> INFO: Test took 1197ms.
[00:05:18.756] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:19.060] <TB2> INFO: Expecting 2560 events.
[00:05:19.950] <TB2> INFO: 2560 events read in total (298ms).
[00:05:19.950] <TB2> INFO: Test took 1194ms.
[00:05:19.954] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:20.258] <TB2> INFO: Expecting 2560 events.
[00:05:21.141] <TB2> INFO: 2560 events read in total (291ms).
[00:05:21.142] <TB2> INFO: Test took 1188ms.
[00:05:21.145] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:21.450] <TB2> INFO: Expecting 2560 events.
[00:05:22.343] <TB2> INFO: 2560 events read in total (301ms).
[00:05:22.343] <TB2> INFO: Test took 1198ms.
[00:05:22.347] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:22.651] <TB2> INFO: Expecting 2560 events.
[00:05:23.531] <TB2> INFO: 2560 events read in total (288ms).
[00:05:23.531] <TB2> INFO: Test took 1185ms.
[00:05:23.534] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:23.839] <TB2> INFO: Expecting 2560 events.
[00:05:24.719] <TB2> INFO: 2560 events read in total (288ms).
[00:05:24.720] <TB2> INFO: Test took 1186ms.
[00:05:24.722] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:25.029] <TB2> INFO: Expecting 2560 events.
[00:05:25.914] <TB2> INFO: 2560 events read in total (294ms).
[00:05:25.914] <TB2> INFO: Test took 1192ms.
[00:05:25.917] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:26.223] <TB2> INFO: Expecting 2560 events.
[00:05:27.114] <TB2> INFO: 2560 events read in total (299ms).
[00:05:27.115] <TB2> INFO: Test took 1198ms.
[00:05:27.117] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:27.423] <TB2> INFO: Expecting 2560 events.
[00:05:28.313] <TB2> INFO: 2560 events read in total (298ms).
[00:05:28.313] <TB2> INFO: Test took 1196ms.
[00:05:28.315] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:28.621] <TB2> INFO: Expecting 2560 events.
[00:05:29.509] <TB2> INFO: 2560 events read in total (295ms).
[00:05:29.509] <TB2> INFO: Test took 1194ms.
[00:05:29.512] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:29.818] <TB2> INFO: Expecting 2560 events.
[00:05:30.712] <TB2> INFO: 2560 events read in total (302ms).
[00:05:30.713] <TB2> INFO: Test took 1201ms.
[00:05:30.716] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:31.021] <TB2> INFO: Expecting 2560 events.
[00:05:31.912] <TB2> INFO: 2560 events read in total (299ms).
[00:05:31.912] <TB2> INFO: Test took 1196ms.
[00:05:31.916] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:32.221] <TB2> INFO: Expecting 2560 events.
[00:05:33.111] <TB2> INFO: 2560 events read in total (298ms).
[00:05:33.112] <TB2> INFO: Test took 1197ms.
[00:05:33.115] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:05:33.421] <TB2> INFO: Expecting 2560 events.
[00:05:34.312] <TB2> INFO: 2560 events read in total (300ms).
[00:05:34.313] <TB2> INFO: Test took 1198ms.
[00:05:34.800] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 642 seconds
[00:05:34.800] <TB2> INFO: PH scale (per ROC): 48 46 48 48 38 48 37 30 34 43 44 34 37 39 48 37
[00:05:34.800] <TB2> INFO: PH offset (per ROC): 124 106 127 110 108 122 106 97 96 112 100 109 112 108 128 86
[00:05:34.809] <TB2> INFO: Decoding statistics:
[00:05:34.809] <TB2> INFO: General information:
[00:05:34.809] <TB2> INFO: 16bit words read: 127880
[00:05:34.809] <TB2> INFO: valid events total: 20480
[00:05:34.809] <TB2> INFO: empty events: 17980
[00:05:34.809] <TB2> INFO: valid events with pixels: 2500
[00:05:34.809] <TB2> INFO: valid pixel hits: 2500
[00:05:34.809] <TB2> INFO: Event errors: 0
[00:05:34.809] <TB2> INFO: start marker: 0
[00:05:34.809] <TB2> INFO: stop marker: 0
[00:05:34.809] <TB2> INFO: overflow: 0
[00:05:34.809] <TB2> INFO: invalid 5bit words: 0
[00:05:34.809] <TB2> INFO: invalid XOR eye diagram: 0
[00:05:34.809] <TB2> INFO: frame (failed synchr.): 0
[00:05:34.809] <TB2> INFO: idle data (no TBM trl): 0
[00:05:34.809] <TB2> INFO: no data (only TBM hdr): 0
[00:05:34.809] <TB2> INFO: TBM errors: 0
[00:05:34.809] <TB2> INFO: flawed TBM headers: 0
[00:05:34.809] <TB2> INFO: flawed TBM trailers: 0
[00:05:34.809] <TB2> INFO: event ID mismatches: 0
[00:05:34.809] <TB2> INFO: ROC errors: 0
[00:05:34.809] <TB2> INFO: missing ROC header(s): 0
[00:05:34.809] <TB2> INFO: misplaced readback start: 0
[00:05:34.809] <TB2> INFO: Pixel decoding errors: 0
[00:05:34.809] <TB2> INFO: pixel data incomplete: 0
[00:05:34.809] <TB2> INFO: pixel address: 0
[00:05:34.809] <TB2> INFO: pulse height fill bit: 0
[00:05:34.809] <TB2> INFO: buffer corruption: 0
[00:05:35.026] <TB2> INFO: ######################################################################
[00:05:35.026] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[00:05:35.026] <TB2> INFO: ######################################################################
[00:05:35.041] <TB2> INFO: scanning low vcal = 10
[00:05:35.278] <TB2> INFO: Expecting 41600 events.
[00:05:38.857] <TB2> INFO: 41600 events read in total (2987ms).
[00:05:38.857] <TB2> INFO: Test took 3816ms.
[00:05:38.860] <TB2> INFO: scanning low vcal = 20
[00:05:39.155] <TB2> INFO: Expecting 41600 events.
[00:05:42.738] <TB2> INFO: 41600 events read in total (2991ms).
[00:05:42.738] <TB2> INFO: Test took 3878ms.
[00:05:42.740] <TB2> INFO: scanning low vcal = 30
[00:05:43.036] <TB2> INFO: Expecting 41600 events.
[00:05:46.694] <TB2> INFO: 41600 events read in total (3067ms).
[00:05:46.695] <TB2> INFO: Test took 3955ms.
[00:05:46.698] <TB2> INFO: scanning low vcal = 40
[00:05:46.974] <TB2> INFO: Expecting 41600 events.
[00:05:50.945] <TB2> INFO: 41600 events read in total (3379ms).
[00:05:50.946] <TB2> INFO: Test took 4248ms.
[00:05:50.949] <TB2> INFO: scanning low vcal = 50
[00:05:51.225] <TB2> INFO: Expecting 41600 events.
[00:05:55.248] <TB2> INFO: 41600 events read in total (3431ms).
[00:05:55.249] <TB2> INFO: Test took 4300ms.
[00:05:55.254] <TB2> INFO: scanning low vcal = 60
[00:05:55.531] <TB2> INFO: Expecting 41600 events.
[00:05:59.600] <TB2> INFO: 41600 events read in total (3447ms).
[00:05:59.602] <TB2> INFO: Test took 4348ms.
[00:05:59.607] <TB2> INFO: scanning low vcal = 70
[00:05:59.885] <TB2> INFO: Expecting 41600 events.
[00:06:03.884] <TB2> INFO: 41600 events read in total (3406ms).
[00:06:03.886] <TB2> INFO: Test took 4279ms.
[00:06:03.889] <TB2> INFO: scanning low vcal = 80
[00:06:04.165] <TB2> INFO: Expecting 41600 events.
[00:06:08.172] <TB2> INFO: 41600 events read in total (3415ms).
[00:06:08.173] <TB2> INFO: Test took 4284ms.
[00:06:08.176] <TB2> INFO: scanning low vcal = 90
[00:06:08.452] <TB2> INFO: Expecting 41600 events.
[00:06:12.419] <TB2> INFO: 41600 events read in total (3375ms).
[00:06:12.420] <TB2> INFO: Test took 4244ms.
[00:06:12.424] <TB2> INFO: scanning low vcal = 100
[00:06:12.702] <TB2> INFO: Expecting 41600 events.
[00:06:16.722] <TB2> INFO: 41600 events read in total (3428ms).
[00:06:16.723] <TB2> INFO: Test took 4298ms.
[00:06:16.726] <TB2> INFO: scanning low vcal = 110
[00:06:17.003] <TB2> INFO: Expecting 41600 events.
[00:06:21.021] <TB2> INFO: 41600 events read in total (3426ms).
[00:06:21.021] <TB2> INFO: Test took 4295ms.
[00:06:21.024] <TB2> INFO: scanning low vcal = 120
[00:06:21.302] <TB2> INFO: Expecting 41600 events.
[00:06:25.285] <TB2> INFO: 41600 events read in total (3391ms).
[00:06:25.286] <TB2> INFO: Test took 4261ms.
[00:06:25.291] <TB2> INFO: scanning low vcal = 130
[00:06:25.567] <TB2> INFO: Expecting 41600 events.
[00:06:29.556] <TB2> INFO: 41600 events read in total (3398ms).
[00:06:29.557] <TB2> INFO: Test took 4266ms.
[00:06:29.560] <TB2> INFO: scanning low vcal = 140
[00:06:29.837] <TB2> INFO: Expecting 41600 events.
[00:06:33.811] <TB2> INFO: 41600 events read in total (3383ms).
[00:06:33.812] <TB2> INFO: Test took 4252ms.
[00:06:33.816] <TB2> INFO: scanning low vcal = 150
[00:06:34.092] <TB2> INFO: Expecting 41600 events.
[00:06:38.027] <TB2> INFO: 41600 events read in total (3343ms).
[00:06:38.028] <TB2> INFO: Test took 4212ms.
[00:06:38.032] <TB2> INFO: scanning low vcal = 160
[00:06:38.308] <TB2> INFO: Expecting 41600 events.
[00:06:42.251] <TB2> INFO: 41600 events read in total (3350ms).
[00:06:42.251] <TB2> INFO: Test took 4219ms.
[00:06:42.255] <TB2> INFO: scanning low vcal = 170
[00:06:42.531] <TB2> INFO: Expecting 41600 events.
[00:06:46.486] <TB2> INFO: 41600 events read in total (3363ms).
[00:06:46.487] <TB2> INFO: Test took 4232ms.
[00:06:46.495] <TB2> INFO: scanning low vcal = 180
[00:06:46.767] <TB2> INFO: Expecting 41600 events.
[00:06:50.709] <TB2> INFO: 41600 events read in total (3350ms).
[00:06:50.710] <TB2> INFO: Test took 4215ms.
[00:06:50.714] <TB2> INFO: scanning low vcal = 190
[00:06:50.990] <TB2> INFO: Expecting 41600 events.
[00:06:54.918] <TB2> INFO: 41600 events read in total (3337ms).
[00:06:54.919] <TB2> INFO: Test took 4205ms.
[00:06:54.923] <TB2> INFO: scanning low vcal = 200
[00:06:55.198] <TB2> INFO: Expecting 41600 events.
[00:06:59.142] <TB2> INFO: 41600 events read in total (3352ms).
[00:06:59.143] <TB2> INFO: Test took 4220ms.
[00:06:59.147] <TB2> INFO: scanning low vcal = 210
[00:06:59.423] <TB2> INFO: Expecting 41600 events.
[00:07:03.377] <TB2> INFO: 41600 events read in total (3362ms).
[00:07:03.378] <TB2> INFO: Test took 4231ms.
[00:07:03.382] <TB2> INFO: scanning low vcal = 220
[00:07:03.658] <TB2> INFO: Expecting 41600 events.
[00:07:07.697] <TB2> INFO: 41600 events read in total (3447ms).
[00:07:07.698] <TB2> INFO: Test took 4316ms.
[00:07:07.702] <TB2> INFO: scanning low vcal = 230
[00:07:07.979] <TB2> INFO: Expecting 41600 events.
[00:07:12.021] <TB2> INFO: 41600 events read in total (3451ms).
[00:07:12.022] <TB2> INFO: Test took 4319ms.
[00:07:12.025] <TB2> INFO: scanning low vcal = 240
[00:07:12.302] <TB2> INFO: Expecting 41600 events.
[00:07:16.279] <TB2> INFO: 41600 events read in total (3385ms).
[00:07:16.280] <TB2> INFO: Test took 4255ms.
[00:07:16.283] <TB2> INFO: scanning low vcal = 250
[00:07:16.559] <TB2> INFO: Expecting 41600 events.
[00:07:20.530] <TB2> INFO: 41600 events read in total (3379ms).
[00:07:20.531] <TB2> INFO: Test took 4248ms.
[00:07:20.535] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[00:07:20.811] <TB2> INFO: Expecting 41600 events.
[00:07:24.794] <TB2> INFO: 41600 events read in total (3391ms).
[00:07:24.795] <TB2> INFO: Test took 4260ms.
[00:07:24.798] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[00:07:25.075] <TB2> INFO: Expecting 41600 events.
[00:07:29.069] <TB2> INFO: 41600 events read in total (3403ms).
[00:07:29.070] <TB2> INFO: Test took 4272ms.
[00:07:29.073] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[00:07:29.350] <TB2> INFO: Expecting 41600 events.
[00:07:33.333] <TB2> INFO: 41600 events read in total (3392ms).
[00:07:33.334] <TB2> INFO: Test took 4261ms.
[00:07:33.338] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[00:07:33.614] <TB2> INFO: Expecting 41600 events.
[00:07:37.644] <TB2> INFO: 41600 events read in total (3438ms).
[00:07:37.645] <TB2> INFO: Test took 4306ms.
[00:07:37.648] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[00:07:37.925] <TB2> INFO: Expecting 41600 events.
[00:07:41.961] <TB2> INFO: 41600 events read in total (3444ms).
[00:07:41.962] <TB2> INFO: Test took 4314ms.
[00:07:42.382] <TB2> INFO: PixTestGainPedestal::measure() done
[00:08:15.699] <TB2> INFO: PixTestGainPedestal::fit() done
[00:08:15.699] <TB2> INFO: non-linearity mean: 0.972 0.943 0.980 0.973 0.937 0.976 0.903 0.944 0.957 0.959 0.945 0.932 0.941 0.956 0.980 0.944
[00:08:15.699] <TB2> INFO: non-linearity RMS: 0.015 0.057 0.004 0.015 0.092 0.006 0.137 0.179 0.148 0.045 0.072 0.099 0.075 0.055 0.003 0.162
[00:08:15.699] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C0.dat
[00:08:15.713] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C1.dat
[00:08:15.727] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C2.dat
[00:08:15.740] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C3.dat
[00:08:15.753] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C4.dat
[00:08:15.771] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C5.dat
[00:08:15.784] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C6.dat
[00:08:15.797] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C7.dat
[00:08:15.810] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C8.dat
[00:08:15.823] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C9.dat
[00:08:15.835] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C10.dat
[00:08:15.848] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C11.dat
[00:08:15.861] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C12.dat
[00:08:15.874] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C13.dat
[00:08:15.886] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C14.dat
[00:08:15.899] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//phCalibrationFitErr35_C15.dat
[00:08:15.912] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 160 seconds
[00:08:15.912] <TB2> INFO: Decoding statistics:
[00:08:15.912] <TB2> INFO: General information:
[00:08:15.912] <TB2> INFO: 16bit words read: 3306630
[00:08:15.912] <TB2> INFO: valid events total: 332800
[00:08:15.912] <TB2> INFO: empty events: 718
[00:08:15.912] <TB2> INFO: valid events with pixels: 332082
[00:08:15.912] <TB2> INFO: valid pixel hits: 654915
[00:08:15.912] <TB2> INFO: Event errors: 0
[00:08:15.912] <TB2> INFO: start marker: 0
[00:08:15.912] <TB2> INFO: stop marker: 0
[00:08:15.912] <TB2> INFO: overflow: 0
[00:08:15.912] <TB2> INFO: invalid 5bit words: 0
[00:08:15.912] <TB2> INFO: invalid XOR eye diagram: 0
[00:08:15.912] <TB2> INFO: frame (failed synchr.): 0
[00:08:15.912] <TB2> INFO: idle data (no TBM trl): 0
[00:08:15.912] <TB2> INFO: no data (only TBM hdr): 0
[00:08:15.912] <TB2> INFO: TBM errors: 0
[00:08:15.912] <TB2> INFO: flawed TBM headers: 0
[00:08:15.912] <TB2> INFO: flawed TBM trailers: 0
[00:08:15.912] <TB2> INFO: event ID mismatches: 0
[00:08:15.912] <TB2> INFO: ROC errors: 0
[00:08:15.912] <TB2> INFO: missing ROC header(s): 0
[00:08:15.912] <TB2> INFO: misplaced readback start: 0
[00:08:15.912] <TB2> INFO: Pixel decoding errors: 0
[00:08:15.912] <TB2> INFO: pixel data incomplete: 0
[00:08:15.912] <TB2> INFO: pixel address: 0
[00:08:15.912] <TB2> INFO: pulse height fill bit: 0
[00:08:15.912] <TB2> INFO: buffer corruption: 0
[00:08:15.930] <TB2> INFO: Decoding statistics:
[00:08:15.931] <TB2> INFO: General information:
[00:08:15.931] <TB2> INFO: 16bit words read: 3436046
[00:08:15.931] <TB2> INFO: valid events total: 353536
[00:08:15.931] <TB2> INFO: empty events: 18954
[00:08:15.931] <TB2> INFO: valid events with pixels: 334582
[00:08:15.931] <TB2> INFO: valid pixel hits: 657415
[00:08:15.931] <TB2> INFO: Event errors: 0
[00:08:15.931] <TB2> INFO: start marker: 0
[00:08:15.931] <TB2> INFO: stop marker: 0
[00:08:15.931] <TB2> INFO: overflow: 0
[00:08:15.931] <TB2> INFO: invalid 5bit words: 0
[00:08:15.931] <TB2> INFO: invalid XOR eye diagram: 0
[00:08:15.931] <TB2> INFO: frame (failed synchr.): 0
[00:08:15.931] <TB2> INFO: idle data (no TBM trl): 0
[00:08:15.931] <TB2> INFO: no data (only TBM hdr): 0
[00:08:15.931] <TB2> INFO: TBM errors: 0
[00:08:15.931] <TB2> INFO: flawed TBM headers: 0
[00:08:15.931] <TB2> INFO: flawed TBM trailers: 0
[00:08:15.931] <TB2> INFO: event ID mismatches: 0
[00:08:15.931] <TB2> INFO: ROC errors: 0
[00:08:15.931] <TB2> INFO: missing ROC header(s): 0
[00:08:15.931] <TB2> INFO: misplaced readback start: 0
[00:08:15.931] <TB2> INFO: Pixel decoding errors: 0
[00:08:15.931] <TB2> INFO: pixel data incomplete: 0
[00:08:15.931] <TB2> INFO: pixel address: 0
[00:08:15.931] <TB2> INFO: pulse height fill bit: 0
[00:08:15.931] <TB2> INFO: buffer corruption: 0
[00:08:15.931] <TB2> INFO: enter test to run
[00:08:15.931] <TB2> INFO: test: trim80 no parameter change
[00:08:15.931] <TB2> INFO: running: trim80
[00:08:15.932] <TB2> INFO: ######################################################################
[00:08:15.932] <TB2> INFO: PixTestTrim80::doTest()
[00:08:15.932] <TB2> INFO: ######################################################################
[00:08:15.933] <TB2> INFO: ----------------------------------------------------------------------
[00:08:15.933] <TB2> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[00:08:15.933] <TB2> INFO: ----------------------------------------------------------------------
[00:08:15.979] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[00:08:15.979] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[00:08:15.991] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[00:08:15.991] <TB2> INFO: run 1 of 1
[00:08:16.227] <TB2> INFO: Expecting 5025280 events.
[00:08:44.501] <TB2> INFO: 686080 events read in total (27682ms).
[00:09:11.976] <TB2> INFO: 1368504 events read in total (55157ms).
[00:09:40.035] <TB2> INFO: 2049544 events read in total (83216ms).
[00:10:07.078] <TB2> INFO: 2728456 events read in total (110259ms).
[00:10:34.941] <TB2> INFO: 3406992 events read in total (138122ms).
[00:11:02.263] <TB2> INFO: 4083280 events read in total (165444ms).
[00:11:29.525] <TB2> INFO: 4758856 events read in total (192706ms).
[00:11:40.485] <TB2> INFO: 5025280 events read in total (203666ms).
[00:11:40.579] <TB2> INFO: Test took 204587ms.
[00:12:04.729] <TB2> INFO: ROC 0 VthrComp = 71
[00:12:04.729] <TB2> INFO: ROC 1 VthrComp = 74
[00:12:04.730] <TB2> INFO: ROC 2 VthrComp = 70
[00:12:04.730] <TB2> INFO: ROC 3 VthrComp = 80
[00:12:04.730] <TB2> INFO: ROC 4 VthrComp = 86
[00:12:04.730] <TB2> INFO: ROC 5 VthrComp = 78
[00:12:04.730] <TB2> INFO: ROC 6 VthrComp = 71
[00:12:04.730] <TB2> INFO: ROC 7 VthrComp = 72
[00:12:04.730] <TB2> INFO: ROC 8 VthrComp = 81
[00:12:04.731] <TB2> INFO: ROC 9 VthrComp = 74
[00:12:04.731] <TB2> INFO: ROC 10 VthrComp = 72
[00:12:04.731] <TB2> INFO: ROC 11 VthrComp = 72
[00:12:04.731] <TB2> INFO: ROC 12 VthrComp = 75
[00:12:04.731] <TB2> INFO: ROC 13 VthrComp = 86
[00:12:04.731] <TB2> INFO: ROC 14 VthrComp = 78
[00:12:04.731] <TB2> INFO: ROC 15 VthrComp = 73
[00:12:05.008] <TB2> INFO: Expecting 41600 events.
[00:12:08.533] <TB2> INFO: 41600 events read in total (2934ms).
[00:12:08.534] <TB2> INFO: Test took 3801ms.
[00:12:08.544] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[00:12:08.544] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[00:12:08.555] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[00:12:08.555] <TB2> INFO: run 1 of 1
[00:12:08.833] <TB2> INFO: Expecting 5025280 events.
[00:12:37.269] <TB2> INFO: 688904 events read in total (27844ms).
[00:13:05.047] <TB2> INFO: 1373112 events read in total (55622ms).
[00:13:32.839] <TB2> INFO: 2055960 events read in total (83414ms).
[00:14:00.373] <TB2> INFO: 2735552 events read in total (110948ms).
[00:14:28.008] <TB2> INFO: 3410184 events read in total (138583ms).
[00:14:55.711] <TB2> INFO: 4085088 events read in total (166286ms).
[00:15:22.974] <TB2> INFO: 4759296 events read in total (193549ms).
[00:15:33.798] <TB2> INFO: 5025280 events read in total (204373ms).
[00:15:33.862] <TB2> INFO: Test took 205308ms.
[00:15:56.042] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 108.12 for pixel 5/5 mean/min/max = 91.0423/73.7903/108.294
[00:15:56.042] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 109.156 for pixel 22/4 mean/min/max = 93.9162/78.6761/109.156
[00:15:56.043] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 105.604 for pixel 26/8 mean/min/max = 89.8328/73.7843/105.881
[00:15:56.043] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 112.207 for pixel 4/77 mean/min/max = 93.6196/75.0043/112.235
[00:15:56.044] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 108.662 for pixel 0/1 mean/min/max = 91.758/74.8292/108.687
[00:15:56.044] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 112.975 for pixel 0/71 mean/min/max = 95.3311/77.6334/113.029
[00:15:56.045] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 106.018 for pixel 28/79 mean/min/max = 89.4049/72.7415/106.068
[00:15:56.046] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 109.997 for pixel 0/66 mean/min/max = 93.7883/77.2841/110.292
[00:15:56.046] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 108.89 for pixel 51/79 mean/min/max = 92.1533/75.3482/108.958
[00:15:56.047] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 111.452 for pixel 0/52 mean/min/max = 94.8927/78.2665/111.519
[00:15:56.048] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 113.085 for pixel 0/8 mean/min/max = 95.1959/77.1191/113.273
[00:15:56.048] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 113.28 for pixel 0/79 mean/min/max = 94.7829/76.1142/113.452
[00:15:56.049] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 110.82 for pixel 0/34 mean/min/max = 94.7579/78.0963/111.42
[00:15:56.049] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 107.057 for pixel 0/62 mean/min/max = 90.6311/74.0365/107.226
[00:15:56.050] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 111.79 for pixel 0/12 mean/min/max = 95.1701/78.2513/112.089
[00:15:56.050] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 109.339 for pixel 14/1 mean/min/max = 93.0225/76.5463/109.499
[00:15:56.051] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:15:56.139] <TB2> INFO: Expecting 411648 events.
[00:16:05.575] <TB2> INFO: 411648 events read in total (8844ms).
[00:16:05.583] <TB2> INFO: Expecting 411648 events.
[00:16:15.118] <TB2> INFO: 411648 events read in total (9132ms).
[00:16:15.132] <TB2> INFO: Expecting 411648 events.
[00:16:24.364] <TB2> INFO: 411648 events read in total (8829ms).
[00:16:24.378] <TB2> INFO: Expecting 411648 events.
[00:16:33.674] <TB2> INFO: 411648 events read in total (8893ms).
[00:16:33.693] <TB2> INFO: Expecting 411648 events.
[00:16:42.956] <TB2> INFO: 411648 events read in total (8859ms).
[00:16:42.982] <TB2> INFO: Expecting 411648 events.
[00:16:52.130] <TB2> INFO: 411648 events read in total (8745ms).
[00:16:52.158] <TB2> INFO: Expecting 411648 events.
[00:17:01.290] <TB2> INFO: 411648 events read in total (8729ms).
[00:17:01.319] <TB2> INFO: Expecting 411648 events.
[00:17:10.788] <TB2> INFO: 411648 events read in total (9066ms).
[00:17:10.819] <TB2> INFO: Expecting 411648 events.
[00:17:20.075] <TB2> INFO: 411648 events read in total (8853ms).
[00:17:20.110] <TB2> INFO: Expecting 411648 events.
[00:17:29.389] <TB2> INFO: 411648 events read in total (8876ms).
[00:17:29.426] <TB2> INFO: Expecting 411648 events.
[00:17:38.636] <TB2> INFO: 411648 events read in total (8807ms).
[00:17:38.688] <TB2> INFO: Expecting 411648 events.
[00:17:47.791] <TB2> INFO: 411648 events read in total (8700ms).
[00:17:47.847] <TB2> INFO: Expecting 411648 events.
[00:17:57.196] <TB2> INFO: 411648 events read in total (8945ms).
[00:17:57.254] <TB2> INFO: Expecting 411648 events.
[00:18:06.597] <TB2> INFO: 411648 events read in total (8940ms).
[00:18:06.682] <TB2> INFO: Expecting 411648 events.
[00:18:16.367] <TB2> INFO: 411648 events read in total (9282ms).
[00:18:16.441] <TB2> INFO: Expecting 411648 events.
[00:18:25.740] <TB2> INFO: 411648 events read in total (8896ms).
[00:18:25.801] <TB2> INFO: Test took 149750ms.
[00:18:27.490] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[00:18:27.503] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[00:18:27.503] <TB2> INFO: run 1 of 1
[00:18:27.740] <TB2> INFO: Expecting 5025280 events.
[00:18:55.578] <TB2> INFO: 668472 events read in total (27247ms).
[00:19:22.660] <TB2> INFO: 1333376 events read in total (54329ms).
[00:19:49.959] <TB2> INFO: 1997896 events read in total (81628ms).
[00:20:17.216] <TB2> INFO: 2661024 events read in total (108885ms).
[00:20:44.175] <TB2> INFO: 3320464 events read in total (135844ms).
[00:21:10.954] <TB2> INFO: 3978472 events read in total (162623ms).
[00:21:37.654] <TB2> INFO: 4635064 events read in total (189323ms).
[00:21:53.905] <TB2> INFO: 5025280 events read in total (205574ms).
[00:21:53.969] <TB2> INFO: Test took 206466ms.
[00:22:17.666] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 54.043861 .. 97.808160
[00:22:17.908] <TB2> INFO: Expecting 208000 events.
[00:22:27.675] <TB2> INFO: 208000 events read in total (9175ms).
[00:22:27.676] <TB2> INFO: Test took 10008ms.
[00:22:27.723] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 44 .. 107 (-1/-1) hits flags = 528 (plus default)
[00:22:27.735] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[00:22:27.735] <TB2> INFO: run 1 of 1
[00:22:28.014] <TB2> INFO: Expecting 2129920 events.
[00:22:56.761] <TB2> INFO: 697040 events read in total (28155ms).
[00:23:24.622] <TB2> INFO: 1390800 events read in total (56017ms).
[00:23:52.788] <TB2> INFO: 2078088 events read in total (84182ms).
[00:23:55.275] <TB2> INFO: 2129920 events read in total (86669ms).
[00:23:55.315] <TB2> INFO: Test took 87580ms.
[00:24:11.805] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 63.153445 .. 90.729603
[00:24:12.065] <TB2> INFO: Expecting 208000 events.
[00:24:21.002] <TB2> INFO: 208000 events read in total (9346ms).
[00:24:22.003] <TB2> INFO: Test took 10193ms.
[00:24:22.055] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 53 .. 100 (-1/-1) hits flags = 528 (plus default)
[00:24:22.068] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[00:24:22.068] <TB2> INFO: run 1 of 1
[00:24:22.346] <TB2> INFO: Expecting 1597440 events.
[00:24:50.908] <TB2> INFO: 694120 events read in total (27970ms).
[00:25:18.817] <TB2> INFO: 1387688 events read in total (55880ms).
[00:25:27.667] <TB2> INFO: 1597440 events read in total (64730ms).
[00:25:27.700] <TB2> INFO: Test took 65633ms.
[00:25:43.934] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 67.875610 .. 88.815490
[00:25:44.172] <TB2> INFO: Expecting 208000 events.
[00:25:54.532] <TB2> INFO: 208000 events read in total (9768ms).
[00:25:54.532] <TB2> INFO: Test took 10596ms.
[00:25:54.582] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 57 .. 98 (-1/-1) hits flags = 528 (plus default)
[00:25:54.595] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[00:25:54.595] <TB2> INFO: run 1 of 1
[00:25:54.873] <TB2> INFO: Expecting 1397760 events.
[00:26:23.394] <TB2> INFO: 689632 events read in total (27930ms).
[00:26:51.332] <TB2> INFO: 1378488 events read in total (55869ms).
[00:26:52.660] <TB2> INFO: 1397760 events read in total (57196ms).
[00:26:52.694] <TB2> INFO: Test took 58100ms.
[00:27:10.332] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 69.673497 .. 94.359738
[00:27:10.573] <TB2> INFO: Expecting 208000 events.
[00:27:20.280] <TB2> INFO: 208000 events read in total (9115ms).
[00:27:20.281] <TB2> INFO: Test took 9948ms.
[00:27:20.328] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 59 .. 104 (-1/-1) hits flags = 528 (plus default)
[00:27:20.342] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[00:27:20.342] <TB2> INFO: run 1 of 1
[00:27:20.621] <TB2> INFO: Expecting 1530880 events.
[00:27:48.649] <TB2> INFO: 658552 events read in total (27436ms).
[00:28:16.410] <TB2> INFO: 1317112 events read in total (55197ms).
[00:28:25.745] <TB2> INFO: 1530880 events read in total (64533ms).
[00:28:25.775] <TB2> INFO: Test took 65434ms.
[00:28:43.111] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[00:28:43.111] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[00:28:43.125] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[00:28:43.125] <TB2> INFO: run 1 of 1
[00:28:43.375] <TB2> INFO: Expecting 1364480 events.
[00:29:11.840] <TB2> INFO: 668488 events read in total (27874ms).
[00:29:39.396] <TB2> INFO: 1336360 events read in total (55430ms).
[00:29:41.038] <TB2> INFO: 1364480 events read in total (57072ms).
[00:29:41.066] <TB2> INFO: Test took 57941ms.
[00:30:00.878] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C0.dat
[00:30:00.879] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C1.dat
[00:30:00.879] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C2.dat
[00:30:00.879] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C3.dat
[00:30:00.880] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C4.dat
[00:30:00.880] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C5.dat
[00:30:00.880] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C6.dat
[00:30:00.880] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C7.dat
[00:30:00.880] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C8.dat
[00:30:00.881] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C9.dat
[00:30:00.881] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C10.dat
[00:30:00.881] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C11.dat
[00:30:00.881] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C12.dat
[00:30:00.881] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C13.dat
[00:30:00.882] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C14.dat
[00:30:00.882] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//dacParameters80_C15.dat
[00:30:00.882] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C0.dat
[00:30:00.889] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C1.dat
[00:30:00.895] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C2.dat
[00:30:00.901] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C3.dat
[00:30:00.907] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C4.dat
[00:30:00.912] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C5.dat
[00:30:00.917] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C6.dat
[00:30:00.922] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C7.dat
[00:30:00.927] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C8.dat
[00:30:00.931] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C9.dat
[00:30:00.936] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C10.dat
[00:30:00.941] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C11.dat
[00:30:00.946] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C12.dat
[00:30:00.951] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C13.dat
[00:30:00.956] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C14.dat
[00:30:00.961] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1034_FullQualification_2016-11-07_20h10m_1478545806//003_FulltestTrim80_p17//trimParameters80_C15.dat
[00:30:00.966] <TB2> INFO: PixTestTrim80::trimTest() done
[00:30:00.966] <TB2> INFO: vtrim: 88 101 94 116 95 89 85 88 91 96 97 93 98 88 112 99
[00:30:00.966] <TB2> INFO: vthrcomp: 71 74 70 80 86 78 71 72 81 74 72 72 75 86 78 73
[00:30:00.966] <TB2> INFO: vcal mean: 79.95 79.98 79.90 79.96 79.92 79.96 79.92 79.94 79.86 79.93 79.95 79.91 79.97 79.95 79.95 79.95
[00:30:00.966] <TB2> INFO: vcal RMS: 0.73 0.74 0.76 0.83 0.76 0.77 0.74 0.73 2.86 0.73 0.81 0.75 0.73 0.84 0.74 0.72
[00:30:00.966] <TB2> INFO: bits mean: 10.34 9.43 10.67 9.94 9.65 9.04 10.77 9.59 9.57 9.23 9.22 9.24 9.06 10.31 9.45 9.82
[00:30:00.966] <TB2> INFO: bits RMS: 2.41 2.20 2.29 2.37 2.57 2.36 2.41 2.22 2.51 2.22 2.38 2.46 2.37 2.42 2.11 2.23
[00:30:00.973] <TB2> INFO: ----------------------------------------------------------------------
[00:30:00.973] <TB2> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[00:30:00.973] <TB2> INFO: ----------------------------------------------------------------------
[00:30:00.975] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[00:30:00.990] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[00:30:00.990] <TB2> INFO: run 1 of 1
[00:30:01.229] <TB2> INFO: Expecting 4160000 events.
[00:30:34.206] <TB2> INFO: 773465 events read in total (32385ms).
[00:31:06.457] <TB2> INFO: 1538745 events read in total (64636ms).
[00:31:37.830] <TB2> INFO: 2297860 events read in total (96009ms).
[00:32:10.569] <TB2> INFO: 3052580 events read in total (128748ms).
[00:32:41.994] <TB2> INFO: 3804210 events read in total (160173ms).
[00:32:57.267] <TB2> INFO: 4160000 events read in total (175446ms).
[00:32:57.335] <TB2> INFO: Test took 176345ms.
[00:33:23.327] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 223 (-1/-1) hits flags = 528 (plus default)
[00:33:23.340] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[00:33:23.341] <TB2> INFO: run 1 of 1
[00:33:23.579] <TB2> INFO: Expecting 4659200 events.
[00:33:55.028] <TB2> INFO: 714565 events read in total (30857ms).
[00:34:26.357] <TB2> INFO: 1424430 events read in total (62186ms).
[00:34:57.279] <TB2> INFO: 2131890 events read in total (93108ms).
[00:35:27.735] <TB2> INFO: 2834560 events read in total (123564ms).
[00:35:58.164] <TB2> INFO: 3536335 events read in total (153993ms).
[00:36:29.057] <TB2> INFO: 4235835 events read in total (184886ms).
[00:36:47.475] <TB2> INFO: 4659200 events read in total (203304ms).
[00:36:47.568] <TB2> INFO: Test took 204227ms.
[00:37:17.240] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[00:37:17.253] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[00:37:17.253] <TB2> INFO: run 1 of 1
[00:37:17.490] <TB2> INFO: Expecting 4305600 events.
[00:37:49.694] <TB2> INFO: 735020 events read in total (31613ms).
[00:38:20.789] <TB2> INFO: 1464590 events read in total (62708ms).
[00:38:52.244] <TB2> INFO: 2190995 events read in total (94163ms).
[00:39:23.788] <TB2> INFO: 2911670 events read in total (125707ms).
[00:39:55.573] <TB2> INFO: 3631420 events read in total (157492ms).
[00:40:24.844] <TB2> INFO: 4305600 events read in total (186763ms).
[00:40:24.933] <TB2> INFO: Test took 187679ms.
[00:40:52.339] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[00:40:52.351] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[00:40:52.351] <TB2> INFO: run 1 of 1
[00:40:52.630] <TB2> INFO: Expecting 4305600 events.
[00:41:24.651] <TB2> INFO: 735560 events read in total (31429ms).
[00:41:55.921] <TB2> INFO: 1465220 events read in total (62699ms).
[00:42:27.160] <TB2> INFO: 2191390 events read in total (93938ms).
[00:42:58.242] <TB2> INFO: 2912200 events read in total (125020ms).
[00:43:29.615] <TB2> INFO: 3631850 events read in total (156393ms).
[00:44:00.004] <TB2> INFO: 4305600 events read in total (186782ms).
[00:44:00.102] <TB2> INFO: Test took 187751ms.
[00:44:26.460] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[00:44:26.474] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[00:44:26.474] <TB2> INFO: run 1 of 1
[00:44:26.742] <TB2> INFO: Expecting 4305600 events.
[00:44:59.056] <TB2> INFO: 735530 events read in total (31722ms).
[00:45:30.392] <TB2> INFO: 1465250 events read in total (63058ms).
[00:46:01.982] <TB2> INFO: 2191850 events read in total (94648ms).
[00:46:33.929] <TB2> INFO: 2912855 events read in total (126595ms).
[00:47:05.905] <TB2> INFO: 3632615 events read in total (158571ms).
[00:47:35.961] <TB2> INFO: 4305600 events read in total (188627ms).
[00:47:36.033] <TB2> INFO: Test took 189559ms.
[00:48:04.710] <TB2> INFO: PixTestTrim80::trimBitTest() done
[00:48:04.711] <TB2> INFO: PixTestTrim80::doTest() done, duration: 2388 seconds
[00:48:05.347] <TB2> INFO: enter test to run
[00:48:05.347] <TB2> INFO: test: exit no parameter change
[00:48:05.563] <TB2> QUIET: Connection to board 149 closed.
[00:48:05.563] <TB2> INFO: pXar: this is the end, my friend