[10:54:56.809] <TB0> INFO: *** Welcome to pxar ***
[10:54:56.809] <TB0> INFO: *** Today: 2016/11/14
[10:54:56.819] <TB0> INFO: *** Version: c8ba-dirty
[10:54:56.819] <TB0> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters_C15.dat
[10:54:56.819] <TB0> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//tbmParameters_C1b.dat
[10:54:56.820] <TB0> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//defaultMaskFile.dat
[10:54:56.820] <TB0> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//trimParameters_C15.dat
[10:54:56.872] <TB0> INFO: clk: 4
[10:54:56.872] <TB0> INFO: ctr: 4
[10:54:56.872] <TB0> INFO: sda: 19
[10:54:56.872] <TB0> INFO: tin: 9
[10:54:56.872] <TB0> INFO: level: 15
[10:54:56.872] <TB0> INFO: triggerdelay: 0
[10:54:56.872] <TB0> QUIET: Instanciating API for pxar v2.1.0+875~gda35c4c
[10:54:56.872] <TB0> INFO: Log level: INFO
[10:54:56.880] <TB0> INFO: Found DTB DTB_WS6AYH
[10:54:56.888] <TB0> QUIET: Connection to board DTB_WS6AYH opened.
[10:54:56.890] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 73
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WS6AYH
MAC address: 40D855118049
Hostname: pixelDTB073
Comment:
------------------------------------------------------
[10:54:56.892] <TB0> INFO: RPC call hashes of host and DTB match: 486171790
[10:54:58.375] <TB0> INFO: DUT info:
[10:54:58.375] <TB0> INFO: The DUT currently contains the following objects:
[10:54:58.375] <TB0> INFO: 4 TBM Cores tbm10c (4 ON)
[10:54:58.375] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:54:58.375] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:54:58.375] <TB0> INFO: TBM Core alpha (2): 7 registers set
[10:54:58.375] <TB0> INFO: TBM Core beta (3): 7 registers set
[10:54:58.375] <TB0> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[10:54:58.376] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[10:54:58.376] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[10:54:58.376] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[10:54:58.376] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[10:54:58.376] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[10:54:58.376] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[10:54:58.376] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[10:54:58.376] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[10:54:58.376] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[10:54:58.376] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[10:54:58.376] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[10:54:58.376] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[10:54:58.376] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[10:54:58.376] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[10:54:58.376] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[10:54:58.376] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[10:54:58.776] <TB0> INFO: enter 'restricted' command line mode
[10:54:58.776] <TB0> INFO: enter test to run
[10:54:58.776] <TB0> INFO: test: pretest no parameter change
[10:54:58.776] <TB0> INFO: running: pretest
[10:54:59.318] <TB0> INFO: ######################################################################
[10:54:59.318] <TB0> INFO: PixTestPretest::doTest()
[10:54:59.318] <TB0> INFO: ######################################################################
[10:54:59.319] <TB0> INFO: ----------------------------------------------------------------------
[10:54:59.319] <TB0> INFO: PixTestPretest::programROC()
[10:54:59.319] <TB0> INFO: ----------------------------------------------------------------------
[10:55:17.332] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[10:55:17.332] <TB0> INFO: IA differences per ROC: 20.9 22.5 19.3 19.3 19.3 20.1 20.1 18.5 17.7 19.3 18.5 22.5 17.7 18.5 17.7 20.9
[10:55:17.367] <TB0> INFO: ----------------------------------------------------------------------
[10:55:17.367] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[10:55:17.367] <TB0> INFO: ----------------------------------------------------------------------
[10:55:24.143] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 383.5 mA = 23.9688 mA/ROC
[10:55:24.143] <TB0> INFO: i(loss) [mA/ROC]: 18.5 19.3 19.3 19.3 19.3 19.3 19.3 19.3 20.1 19.3 19.3 18.5 19.3 19.3 19.3 18.5
[10:55:24.169] <TB0> INFO: ----------------------------------------------------------------------
[10:55:24.169] <TB0> INFO: PixTestPretest::findTiming()
[10:55:24.169] <TB0> INFO: ----------------------------------------------------------------------
[10:55:24.169] <TB0> INFO: PixTestCmd::init()
[10:55:24.735] <TB0> WARNING: Not unmasking DUT, not setting Calibrate bits!
[10:55:55.105] <TB0> INFO: TBM phases: 160MHz: 7, 400MHz: 3, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[10:55:55.105] <TB0> INFO: (success/tries = 100/100), width = 4
[10:55:56.617] <TB0> INFO: ----------------------------------------------------------------------
[10:55:56.617] <TB0> INFO: PixTestPretest::findWorkingPixel()
[10:55:56.617] <TB0> INFO: ----------------------------------------------------------------------
[10:55:56.709] <TB0> INFO: Expecting 231680 events.
[10:56:06.365] <TB0> INFO: 231680 events read in total (9064ms).
[10:56:06.372] <TB0> INFO: Test took 9752ms.
[10:56:06.613] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[10:56:06.644] <TB0> INFO: ----------------------------------------------------------------------
[10:56:06.644] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[10:56:06.644] <TB0> INFO: ----------------------------------------------------------------------
[10:56:06.736] <TB0> INFO: Expecting 231680 events.
[10:56:16.366] <TB0> INFO: 231680 events read in total (9038ms).
[10:56:16.375] <TB0> INFO: Test took 9728ms.
[10:56:16.632] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[10:56:16.632] <TB0> INFO: CalDel: 84 100 92 100 90 96 112 91 84 80 79 88 77 97 93 94
[10:56:16.632] <TB0> INFO: VthrComp: 51 55 52 55 51 57 51 51 51 51 51 51 54 51 51 54
[10:56:16.634] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters_C0.dat
[10:56:16.635] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters_C1.dat
[10:56:16.635] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters_C2.dat
[10:56:16.635] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters_C3.dat
[10:56:16.635] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters_C4.dat
[10:56:16.635] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters_C5.dat
[10:56:16.635] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters_C6.dat
[10:56:16.635] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters_C7.dat
[10:56:16.635] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters_C8.dat
[10:56:16.635] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters_C9.dat
[10:56:16.635] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters_C10.dat
[10:56:16.635] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters_C11.dat
[10:56:16.635] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters_C12.dat
[10:56:16.635] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters_C13.dat
[10:56:16.636] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters_C14.dat
[10:56:16.636] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters_C15.dat
[10:56:16.636] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//tbmParameters_C0a.dat
[10:56:16.636] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//tbmParameters_C0b.dat
[10:56:16.636] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//tbmParameters_C1a.dat
[10:56:16.636] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//tbmParameters_C1b.dat
[10:56:16.636] <TB0> INFO: PixTestPretest::doTest() done, duration: 77 seconds
[10:56:16.752] <TB0> INFO: enter test to run
[10:56:16.752] <TB0> INFO: test: FullTest no parameter change
[10:56:16.752] <TB0> INFO: running: fulltest
[10:56:16.752] <TB0> INFO: ######################################################################
[10:56:16.752] <TB0> INFO: PixTestFullTest::doTest()
[10:56:16.752] <TB0> INFO: ######################################################################
[10:56:16.753] <TB0> INFO: ######################################################################
[10:56:16.753] <TB0> INFO: PixTestAlive::doTest()
[10:56:16.753] <TB0> INFO: ######################################################################
[10:56:16.754] <TB0> INFO: ----------------------------------------------------------------------
[10:56:16.754] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:56:16.754] <TB0> INFO: ----------------------------------------------------------------------
[10:56:16.988] <TB0> INFO: Expecting 41600 events.
[10:56:20.572] <TB0> INFO: 41600 events read in total (2993ms).
[10:56:20.573] <TB0> INFO: Test took 3818ms.
[10:56:20.799] <TB0> INFO: PixTestAlive::aliveTest() done
[10:56:20.799] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:56:20.800] <TB0> INFO: ----------------------------------------------------------------------
[10:56:20.800] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:56:20.800] <TB0> INFO: ----------------------------------------------------------------------
[10:56:21.033] <TB0> INFO: Expecting 41600 events.
[10:56:23.964] <TB0> INFO: 41600 events read in total (2339ms).
[10:56:23.965] <TB0> INFO: Test took 3163ms.
[10:56:23.965] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[10:56:24.202] <TB0> INFO: PixTestAlive::maskTest() done
[10:56:24.202] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:56:24.203] <TB0> INFO: ----------------------------------------------------------------------
[10:56:24.203] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:56:24.203] <TB0> INFO: ----------------------------------------------------------------------
[10:56:24.438] <TB0> INFO: Expecting 41600 events.
[10:56:27.903] <TB0> INFO: 41600 events read in total (2874ms).
[10:56:27.904] <TB0> INFO: Test took 3700ms.
[10:56:28.133] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[10:56:28.133] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:56:28.133] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[10:56:28.133] <TB0> INFO: Decoding statistics:
[10:56:28.133] <TB0> INFO: General information:
[10:56:28.133] <TB0> INFO: 16bit words read: 0
[10:56:28.133] <TB0> INFO: valid events total: 0
[10:56:28.133] <TB0> INFO: empty events: 0
[10:56:28.133] <TB0> INFO: valid events with pixels: 0
[10:56:28.133] <TB0> INFO: valid pixel hits: 0
[10:56:28.133] <TB0> INFO: Event errors: 0
[10:56:28.133] <TB0> INFO: start marker: 0
[10:56:28.133] <TB0> INFO: stop marker: 0
[10:56:28.133] <TB0> INFO: overflow: 0
[10:56:28.133] <TB0> INFO: invalid 5bit words: 0
[10:56:28.133] <TB0> INFO: invalid XOR eye diagram: 0
[10:56:28.133] <TB0> INFO: frame (failed synchr.): 0
[10:56:28.133] <TB0> INFO: idle data (no TBM trl): 0
[10:56:28.133] <TB0> INFO: no data (only TBM hdr): 0
[10:56:28.134] <TB0> INFO: TBM errors: 0
[10:56:28.134] <TB0> INFO: flawed TBM headers: 0
[10:56:28.134] <TB0> INFO: flawed TBM trailers: 0
[10:56:28.134] <TB0> INFO: event ID mismatches: 0
[10:56:28.134] <TB0> INFO: ROC errors: 0
[10:56:28.134] <TB0> INFO: missing ROC header(s): 0
[10:56:28.134] <TB0> INFO: misplaced readback start: 0
[10:56:28.134] <TB0> INFO: Pixel decoding errors: 0
[10:56:28.134] <TB0> INFO: pixel data incomplete: 0
[10:56:28.134] <TB0> INFO: pixel address: 0
[10:56:28.134] <TB0> INFO: pulse height fill bit: 0
[10:56:28.134] <TB0> INFO: buffer corruption: 0
[10:56:28.140] <TB0> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C15.dat
[10:56:28.141] <TB0> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//phCalibrationFitErr_C15.dat
[10:56:28.141] <TB0> ERROR: <ConfigParameters.cc/readGainPedestalParameters:L1005> cannot open /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//phCalibrationFitErr_C0.dat for reading PH calibration constants
[10:56:28.141] <TB0> INFO: ######################################################################
[10:56:28.141] <TB0> INFO: PixTestReadback::doTest()
[10:56:28.141] <TB0> INFO: ######################################################################
[10:56:28.141] <TB0> INFO: ----------------------------------------------------------------------
[10:56:28.141] <TB0> INFO: PixTestReadback::CalibrateVd()
[10:56:28.141] <TB0> INFO: ----------------------------------------------------------------------
[10:56:38.201] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C0.dat
[10:56:38.202] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C1.dat
[10:56:38.202] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C2.dat
[10:56:38.202] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C3.dat
[10:56:38.202] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C4.dat
[10:56:38.202] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C5.dat
[10:56:38.202] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C6.dat
[10:56:38.202] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C7.dat
[10:56:38.202] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C8.dat
[10:56:38.202] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C9.dat
[10:56:38.202] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C10.dat
[10:56:38.202] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C11.dat
[10:56:38.202] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C12.dat
[10:56:38.202] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C13.dat
[10:56:38.202] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C14.dat
[10:56:38.202] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C15.dat
[10:56:38.233] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:56:38.233] <TB0> INFO: ----------------------------------------------------------------------
[10:56:38.233] <TB0> INFO: PixTestReadback::CalibrateVa()
[10:56:38.233] <TB0> INFO: ----------------------------------------------------------------------
[10:56:48.204] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C0.dat
[10:56:48.204] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C1.dat
[10:56:48.204] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C2.dat
[10:56:48.204] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C3.dat
[10:56:48.204] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C4.dat
[10:56:48.204] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C5.dat
[10:56:48.204] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C6.dat
[10:56:48.204] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C7.dat
[10:56:48.204] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C8.dat
[10:56:48.204] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C9.dat
[10:56:48.205] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C10.dat
[10:56:48.205] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C11.dat
[10:56:48.205] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C12.dat
[10:56:48.205] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C13.dat
[10:56:48.205] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C14.dat
[10:56:48.205] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C15.dat
[10:56:48.232] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:56:48.232] <TB0> INFO: ----------------------------------------------------------------------
[10:56:48.232] <TB0> INFO: PixTestReadback::readbackVbg()
[10:56:48.232] <TB0> INFO: ----------------------------------------------------------------------
[10:56:55.913] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:56:55.913] <TB0> INFO: ----------------------------------------------------------------------
[10:56:55.913] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[10:56:55.913] <TB0> INFO: ----------------------------------------------------------------------
[10:56:55.914] <TB0> INFO: Vbg will be calibrated using Vd calibration
[10:56:55.914] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 154calibrated Vbg = 1.18642 :::*/*/*/*/
[10:56:55.914] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 162.8calibrated Vbg = 1.19105 :::*/*/*/*/
[10:56:55.914] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 166calibrated Vbg = 1.18284 :::*/*/*/*/
[10:56:55.914] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 154.3calibrated Vbg = 1.18666 :::*/*/*/*/
[10:56:55.914] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 152.7calibrated Vbg = 1.18771 :::*/*/*/*/
[10:56:55.914] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 159.9calibrated Vbg = 1.18954 :::*/*/*/*/
[10:56:55.914] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 161.6calibrated Vbg = 1.19199 :::*/*/*/*/
[10:56:55.914] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 161.3calibrated Vbg = 1.18672 :::*/*/*/*/
[10:56:55.914] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 158.1calibrated Vbg = 1.18209 :::*/*/*/*/
[10:56:55.914] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 157.7calibrated Vbg = 1.18766 :::*/*/*/*/
[10:56:55.914] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 161.9calibrated Vbg = 1.182 :::*/*/*/*/
[10:56:55.914] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 159.5calibrated Vbg = 1.17411 :::*/*/*/*/
[10:56:55.914] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 162.8calibrated Vbg = 1.17901 :::*/*/*/*/
[10:56:55.914] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 153.4calibrated Vbg = 1.18908 :::*/*/*/*/
[10:56:55.914] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 155.8calibrated Vbg = 1.19075 :::*/*/*/*/
[10:56:55.914] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 157.2calibrated Vbg = 1.1889 :::*/*/*/*/
[10:56:55.916] <TB0> INFO: ----------------------------------------------------------------------
[10:56:55.916] <TB0> INFO: PixTestReadback::CalibrateIa()
[10:56:55.917] <TB0> INFO: ----------------------------------------------------------------------
[10:59:36.309] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C0.dat
[10:59:36.309] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C1.dat
[10:59:36.309] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C2.dat
[10:59:36.309] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C3.dat
[10:59:36.309] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C4.dat
[10:59:36.309] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C5.dat
[10:59:36.309] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C6.dat
[10:59:36.309] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C7.dat
[10:59:36.309] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C8.dat
[10:59:36.309] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C9.dat
[10:59:36.309] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C10.dat
[10:59:36.309] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C11.dat
[10:59:36.309] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C12.dat
[10:59:36.309] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C13.dat
[10:59:36.310] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C14.dat
[10:59:36.310] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//readbackCal_C15.dat
[10:59:36.340] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:59:36.342] <TB0> INFO: PixTestReadback::doTest() done
[10:59:36.343] <TB0> INFO: Decoding statistics:
[10:59:36.343] <TB0> INFO: General information:
[10:59:36.343] <TB0> INFO: 16bit words read: 1536
[10:59:36.343] <TB0> INFO: valid events total: 256
[10:59:36.343] <TB0> INFO: empty events: 256
[10:59:36.343] <TB0> INFO: valid events with pixels: 0
[10:59:36.343] <TB0> INFO: valid pixel hits: 0
[10:59:36.343] <TB0> INFO: Event errors: 0
[10:59:36.343] <TB0> INFO: start marker: 0
[10:59:36.343] <TB0> INFO: stop marker: 0
[10:59:36.343] <TB0> INFO: overflow: 0
[10:59:36.343] <TB0> INFO: invalid 5bit words: 0
[10:59:36.343] <TB0> INFO: invalid XOR eye diagram: 0
[10:59:36.343] <TB0> INFO: frame (failed synchr.): 0
[10:59:36.343] <TB0> INFO: idle data (no TBM trl): 0
[10:59:36.343] <TB0> INFO: no data (only TBM hdr): 0
[10:59:36.343] <TB0> INFO: TBM errors: 0
[10:59:36.343] <TB0> INFO: flawed TBM headers: 0
[10:59:36.343] <TB0> INFO: flawed TBM trailers: 0
[10:59:36.343] <TB0> INFO: event ID mismatches: 0
[10:59:36.343] <TB0> INFO: ROC errors: 0
[10:59:36.343] <TB0> INFO: missing ROC header(s): 0
[10:59:36.343] <TB0> INFO: misplaced readback start: 0
[10:59:36.343] <TB0> INFO: Pixel decoding errors: 0
[10:59:36.343] <TB0> INFO: pixel data incomplete: 0
[10:59:36.343] <TB0> INFO: pixel address: 0
[10:59:36.343] <TB0> INFO: pulse height fill bit: 0
[10:59:36.343] <TB0> INFO: buffer corruption: 0
[10:59:36.391] <TB0> INFO: ######################################################################
[10:59:36.391] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[10:59:36.391] <TB0> INFO: ######################################################################
[10:59:36.395] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[10:59:36.411] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[10:59:36.411] <TB0> INFO: run 1 of 1
[10:59:36.676] <TB0> INFO: Expecting 3120000 events.
[11:00:06.969] <TB0> INFO: 674795 events read in total (29701ms).
[11:00:37.560] <TB0> INFO: 1349865 events read in total (60292ms).
[11:00:49.964] <TB0> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (106) != TBM ID (108)
[11:00:50.113] <TB0> ERROR: <hal.cc/daqAllEvents:L1697> Channels report mismatching event numbers: 106 106 108 106 106 106 106 106
[11:00:50.113] <TB0> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (109) != TBM ID (107)
[11:00:50.115] <TB0> ERROR: <datapipe.cc/Read:L170> Dumping the flawed event +- 3 events:
[11:00:50.115] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a06e 8000 4810 4c8 2fef 4813 4c8 2fef e022 c000
[11:00:50.115] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a068 80b1 4810 4c8 2fef 4811 4c8 2fef e022 c000
[11:00:50.115] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a069 80c0 4811 4c8 2fef 4811 4c8 2fef e022 c000
[11:00:50.115] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a06c 80b1 4831 264 2fef 4831 4c8 2fef e022 c000
[11:00:50.115] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a06b 8040 4831 4c8 2fef 4830 4c8 2fef e022 c000
[11:00:50.115] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a06c 80b1 4831 4c8 2fef 4811 4c8 2fef e022 c000
[11:00:50.115] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a06d 80c0 4810 4c8 2fef 4811 4c8 2fef e022 c000
[11:01:10.263] <TB0> INFO: 2024080 events read in total (92995ms).
[11:01:22.696] <TB0> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (17) != TBM ID (108)
[11:01:22.862] <TB0> ERROR: <hal.cc/daqAllEvents:L1697> Channels report mismatching event numbers: 17 17 108 17 17 17 17 17
[11:01:22.862] <TB0> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (109) != TBM ID (18)
[11:01:22.862] <TB0> ERROR: <datapipe.cc/Read:L170> Dumping the flawed event +- 3 events:
[11:01:22.862] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a015 80c0 4810 82e 25ef 4810 82e 25ef e022 c000
[11:01:22.862] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a00f 8040 4812 82e 25ef 4810 82e 25ef e022 c000
[11:01:22.862] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a010 80b1 4810 82e 25ef 4811 82e 25ef e022 c000
[11:01:22.862] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a06c 80b1 4831 264 25ef 4810 82e 25ef e022 c000
[11:01:22.862] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a012 8000 4810 82e 25ef 4811 82e 25ef e022 c000
[11:01:22.862] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a013 8040 4810 82e 25ef 4810 82e 25ef e022 c000
[11:01:22.862] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a014 80b1 4810 82e 25ef 4810 82e 25ef e022 c000
[11:01:43.515] <TB0> INFO: 2700675 events read in total (126247ms).
[11:01:51.333] <TB0> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (4) != TBM ID (108)
[11:01:51.489] <TB0> ERROR: <hal.cc/daqAllEvents:L1697> Channels report mismatching event numbers: 4 4 108 4 4 4 4 4
[11:01:51.489] <TB0> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (109) != TBM ID (5)
[11:01:51.490] <TB0> ERROR: <datapipe.cc/Read:L170> Dumping the flawed event +- 3 events:
[11:01:51.490] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a008 80b1 4811 aa0 21ef 4830 aa0 21ef e022 c000
[11:01:51.490] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a002 8000 4810 aa0 21ef 4811 aa0 21ef e022 c000
[11:01:51.490] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a003 8040 4810 aa0 21ef 4810 aa0 21ef e022 c000
[11:01:51.490] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a06c 80b1 4831 264 21ef 4830 aa0 21ef e022 c000
[11:01:51.490] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a005 80c0 4830 aa0 21ef 4830 aa0 21ef e022 c000
[11:01:51.490] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a006 8000 4830 aa0 21ef 4830 aa0 21ef e022 c000
[11:01:51.490] <TB0> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a007 8040 4810 aa0 21ef 4811 aa0 21ef e022 c000
[11:02:02.894] <TB0> INFO: 3120000 events read in total (145626ms).
[11:02:02.960] <TB0> INFO: Test took 146550ms.
[11:02:23.524] <TB0> INFO: PixTestBBMap::doTest() done, duration: 167 seconds
[11:02:23.524] <TB0> INFO: number of dead bumps (per ROC): 1 1 0 1 4 1 1 0 3 0 2 0 0 0 0 0
[11:02:23.524] <TB0> INFO: separation cut (per ROC): 105 104 119 116 105 126 102 110 105 104 112 111 117 92 104 111
[11:02:23.525] <TB0> INFO: Decoding statistics:
[11:02:23.525] <TB0> INFO: General information:
[11:02:23.525] <TB0> INFO: 16bit words read: 0
[11:02:23.525] <TB0> INFO: valid events total: 0
[11:02:23.525] <TB0> INFO: empty events: 0
[11:02:23.525] <TB0> INFO: valid events with pixels: 0
[11:02:23.525] <TB0> INFO: valid pixel hits: 0
[11:02:23.525] <TB0> INFO: Event errors: 0
[11:02:23.525] <TB0> INFO: start marker: 0
[11:02:23.525] <TB0> INFO: stop marker: 0
[11:02:23.525] <TB0> INFO: overflow: 0
[11:02:23.525] <TB0> INFO: invalid 5bit words: 0
[11:02:23.525] <TB0> INFO: invalid XOR eye diagram: 0
[11:02:23.525] <TB0> INFO: frame (failed synchr.): 0
[11:02:23.525] <TB0> INFO: idle data (no TBM trl): 0
[11:02:23.525] <TB0> INFO: no data (only TBM hdr): 0
[11:02:23.525] <TB0> INFO: TBM errors: 0
[11:02:23.525] <TB0> INFO: flawed TBM headers: 0
[11:02:23.525] <TB0> INFO: flawed TBM trailers: 0
[11:02:23.525] <TB0> INFO: event ID mismatches: 0
[11:02:23.525] <TB0> INFO: ROC errors: 0
[11:02:23.525] <TB0> INFO: missing ROC header(s): 0
[11:02:23.525] <TB0> INFO: misplaced readback start: 0
[11:02:23.525] <TB0> INFO: Pixel decoding errors: 0
[11:02:23.525] <TB0> INFO: pixel data incomplete: 0
[11:02:23.525] <TB0> INFO: pixel address: 0
[11:02:23.525] <TB0> INFO: pulse height fill bit: 0
[11:02:23.525] <TB0> INFO: buffer corruption: 0
[11:02:23.564] <TB0> INFO: ######################################################################
[11:02:23.564] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:02:23.564] <TB0> INFO: ######################################################################
[11:02:23.564] <TB0> INFO: ----------------------------------------------------------------------
[11:02:23.564] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:02:23.564] <TB0> INFO: ----------------------------------------------------------------------
[11:02:23.564] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[11:02:23.574] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[11:02:23.574] <TB0> INFO: run 1 of 1
[11:02:23.867] <TB0> INFO: Expecting 36608000 events.
[11:02:48.742] <TB0> INFO: 703100 events read in total (24283ms).
[11:03:12.111] <TB0> INFO: 1385450 events read in total (47652ms).
[11:03:35.530] <TB0> INFO: 2069300 events read in total (71071ms).
[11:03:59.082] <TB0> INFO: 2752100 events read in total (94623ms).
[11:04:22.048] <TB0> INFO: 3436600 events read in total (117589ms).
[11:04:45.426] <TB0> INFO: 4117650 events read in total (140967ms).
[11:05:08.959] <TB0> INFO: 4801950 events read in total (164500ms).
[11:05:32.584] <TB0> INFO: 5481650 events read in total (188125ms).
[11:05:56.173] <TB0> INFO: 6164700 events read in total (211714ms).
[11:06:19.660] <TB0> INFO: 6842900 events read in total (235201ms).
[11:06:43.235] <TB0> INFO: 7523200 events read in total (258776ms).
[11:07:06.739] <TB0> INFO: 8203950 events read in total (282280ms).
[11:07:30.203] <TB0> INFO: 8885500 events read in total (305744ms).
[11:07:53.758] <TB0> INFO: 9563850 events read in total (329299ms).
[11:08:17.126] <TB0> INFO: 10243100 events read in total (352667ms).
[11:08:40.651] <TB0> INFO: 10924100 events read in total (376192ms).
[11:09:04.251] <TB0> INFO: 11603500 events read in total (399792ms).
[11:09:27.364] <TB0> INFO: 12279950 events read in total (422905ms).
[11:09:50.536] <TB0> INFO: 12956700 events read in total (446077ms).
[11:10:13.791] <TB0> INFO: 13631900 events read in total (469332ms).
[11:10:37.097] <TB0> INFO: 14309450 events read in total (492638ms).
[11:11:00.289] <TB0> INFO: 14987400 events read in total (515830ms).
[11:11:23.409] <TB0> INFO: 15661800 events read in total (538950ms).
[11:11:46.936] <TB0> INFO: 16338500 events read in total (562477ms).
[11:12:09.985] <TB0> INFO: 17012300 events read in total (585526ms).
[11:12:33.117] <TB0> INFO: 17688100 events read in total (608658ms).
[11:12:56.071] <TB0> INFO: 18361550 events read in total (631612ms).
[11:13:19.243] <TB0> INFO: 19038550 events read in total (654784ms).
[11:13:42.318] <TB0> INFO: 19711050 events read in total (677859ms).
[11:14:05.715] <TB0> INFO: 20386250 events read in total (701256ms).
[11:14:29.434] <TB0> INFO: 21056000 events read in total (724975ms).
[11:14:52.602] <TB0> INFO: 21732350 events read in total (748143ms).
[11:15:15.862] <TB0> INFO: 22404150 events read in total (771403ms).
[11:15:39.109] <TB0> INFO: 23079450 events read in total (794650ms).
[11:16:02.235] <TB0> INFO: 23751300 events read in total (817776ms).
[11:16:25.465] <TB0> INFO: 24424100 events read in total (841006ms).
[11:16:48.750] <TB0> INFO: 25092800 events read in total (864291ms).
[11:17:11.955] <TB0> INFO: 25764650 events read in total (887496ms).
[11:17:34.882] <TB0> INFO: 26435450 events read in total (910423ms).
[11:17:57.982] <TB0> INFO: 27106600 events read in total (933523ms).
[11:18:21.055] <TB0> INFO: 27777700 events read in total (956596ms).
[11:18:44.397] <TB0> INFO: 28447450 events read in total (979938ms).
[11:19:07.646] <TB0> INFO: 29117100 events read in total (1003187ms).
[11:19:31.312] <TB0> INFO: 29787050 events read in total (1026853ms).
[11:19:54.448] <TB0> INFO: 30459100 events read in total (1049989ms).
[11:20:17.815] <TB0> INFO: 31128800 events read in total (1073356ms).
[11:20:40.874] <TB0> INFO: 31799450 events read in total (1096415ms).
[11:21:04.055] <TB0> INFO: 32468950 events read in total (1119596ms).
[11:21:27.152] <TB0> INFO: 33140550 events read in total (1142693ms).
[11:21:50.413] <TB0> INFO: 33812750 events read in total (1165954ms).
[11:22:13.591] <TB0> INFO: 34484950 events read in total (1189132ms).
[11:22:36.542] <TB0> INFO: 35154700 events read in total (1212083ms).
[11:23:00.082] <TB0> INFO: 35829300 events read in total (1235623ms).
[11:23:23.193] <TB0> INFO: 36511700 events read in total (1258734ms).
[11:23:26.908] <TB0> INFO: 36608000 events read in total (1262449ms).
[11:23:26.958] <TB0> INFO: Test took 1263384ms.
[11:23:27.311] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:23:28.956] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:23:30.433] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:23:31.852] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:23:33.484] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:23:34.993] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:23:36.768] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:23:38.469] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:23:40.308] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:23:42.108] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:23:44.300] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:23:46.473] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:23:48.486] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:23:50.150] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:23:51.003] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:23:53.876] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:23:55.451] <TB0> INFO: PixTestScurves::scurves() done
[11:23:55.451] <TB0> INFO: Vcal mean: 117.00 130.92 133.58 133.93 116.15 138.13 126.64 128.10 123.25 113.97 118.34 118.97 130.53 118.52 120.51 131.43
[11:23:55.451] <TB0> INFO: Vcal RMS: 5.51 7.29 7.00 6.63 5.68 5.83 7.16 6.20 5.73 5.86 5.49 5.59 6.91 7.15 6.50 6.13
[11:23:55.451] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1291 seconds
[11:23:55.451] <TB0> INFO: Decoding statistics:
[11:23:55.451] <TB0> INFO: General information:
[11:23:55.451] <TB0> INFO: 16bit words read: 0
[11:23:55.451] <TB0> INFO: valid events total: 0
[11:23:55.451] <TB0> INFO: empty events: 0
[11:23:55.451] <TB0> INFO: valid events with pixels: 0
[11:23:55.451] <TB0> INFO: valid pixel hits: 0
[11:23:55.451] <TB0> INFO: Event errors: 0
[11:23:55.451] <TB0> INFO: start marker: 0
[11:23:55.451] <TB0> INFO: stop marker: 0
[11:23:55.451] <TB0> INFO: overflow: 0
[11:23:55.451] <TB0> INFO: invalid 5bit words: 0
[11:23:55.451] <TB0> INFO: invalid XOR eye diagram: 0
[11:23:55.451] <TB0> INFO: frame (failed synchr.): 0
[11:23:55.451] <TB0> INFO: idle data (no TBM trl): 0
[11:23:55.451] <TB0> INFO: no data (only TBM hdr): 0
[11:23:55.451] <TB0> INFO: TBM errors: 0
[11:23:55.451] <TB0> INFO: flawed TBM headers: 0
[11:23:55.451] <TB0> INFO: flawed TBM trailers: 0
[11:23:55.451] <TB0> INFO: event ID mismatches: 0
[11:23:55.451] <TB0> INFO: ROC errors: 0
[11:23:55.451] <TB0> INFO: missing ROC header(s): 0
[11:23:55.451] <TB0> INFO: misplaced readback start: 0
[11:23:55.451] <TB0> INFO: Pixel decoding errors: 0
[11:23:55.451] <TB0> INFO: pixel data incomplete: 0
[11:23:55.451] <TB0> INFO: pixel address: 0
[11:23:55.451] <TB0> INFO: pulse height fill bit: 0
[11:23:55.451] <TB0> INFO: buffer corruption: 0
[11:23:55.517] <TB0> INFO: ######################################################################
[11:23:55.517] <TB0> INFO: PixTestTrim::doTest()
[11:23:55.517] <TB0> INFO: ######################################################################
[11:23:55.518] <TB0> INFO: ----------------------------------------------------------------------
[11:23:55.518] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[11:23:55.518] <TB0> INFO: ----------------------------------------------------------------------
[11:23:55.562] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:23:55.562] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:23:55.572] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:23:55.572] <TB0> INFO: run 1 of 1
[11:23:55.806] <TB0> INFO: Expecting 5025280 events.
[11:24:27.071] <TB0> INFO: 831552 events read in total (30671ms).
[11:24:57.531] <TB0> INFO: 1660240 events read in total (61132ms).
[11:25:28.256] <TB0> INFO: 2485944 events read in total (91856ms).
[11:25:58.399] <TB0> INFO: 3309208 events read in total (121999ms).
[11:26:28.788] <TB0> INFO: 4128624 events read in total (152389ms).
[11:26:59.412] <TB0> INFO: 4946648 events read in total (183012ms).
[11:27:02.678] <TB0> INFO: 5025280 events read in total (186278ms).
[11:27:02.718] <TB0> INFO: Test took 187147ms.
[11:27:18.787] <TB0> INFO: ROC 0 VthrComp = 114
[11:27:18.788] <TB0> INFO: ROC 1 VthrComp = 131
[11:27:18.788] <TB0> INFO: ROC 2 VthrComp = 130
[11:27:18.788] <TB0> INFO: ROC 3 VthrComp = 128
[11:27:18.788] <TB0> INFO: ROC 4 VthrComp = 113
[11:27:18.788] <TB0> INFO: ROC 5 VthrComp = 134
[11:27:18.788] <TB0> INFO: ROC 6 VthrComp = 115
[11:27:18.788] <TB0> INFO: ROC 7 VthrComp = 124
[11:27:18.788] <TB0> INFO: ROC 8 VthrComp = 126
[11:27:18.788] <TB0> INFO: ROC 9 VthrComp = 113
[11:27:18.788] <TB0> INFO: ROC 10 VthrComp = 117
[11:27:18.789] <TB0> INFO: ROC 11 VthrComp = 124
[11:27:18.789] <TB0> INFO: ROC 12 VthrComp = 131
[11:27:18.789] <TB0> INFO: ROC 13 VthrComp = 108
[11:27:18.789] <TB0> INFO: ROC 14 VthrComp = 119
[11:27:18.789] <TB0> INFO: ROC 15 VthrComp = 130
[11:27:19.072] <TB0> INFO: Expecting 41600 events.
[11:27:22.594] <TB0> INFO: 41600 events read in total (2930ms).
[11:27:22.595] <TB0> INFO: Test took 3805ms.
[11:27:22.603] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:27:22.603] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:27:22.613] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:27:22.613] <TB0> INFO: run 1 of 1
[11:27:22.891] <TB0> INFO: Expecting 5025280 events.
[11:27:50.268] <TB0> INFO: 593792 events read in total (26786ms).
[11:28:16.582] <TB0> INFO: 1185216 events read in total (53100ms).
[11:28:42.566] <TB0> INFO: 1776256 events read in total (79084ms).
[11:29:08.718] <TB0> INFO: 2366112 events read in total (105236ms).
[11:29:34.830] <TB0> INFO: 2954016 events read in total (131348ms).
[11:30:01.121] <TB0> INFO: 3540616 events read in total (157639ms).
[11:30:26.407] <TB0> INFO: 4126392 events read in total (182925ms).
[11:30:52.415] <TB0> INFO: 4711664 events read in total (208933ms).
[11:31:06.848] <TB0> INFO: 5025280 events read in total (223366ms).
[11:31:06.925] <TB0> INFO: Test took 224312ms.
[11:31:28.880] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 60.6215 for pixel 2/7 mean/min/max = 46.525/32.354/60.696
[11:31:28.880] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 65.5308 for pixel 18/71 mean/min/max = 48.6015/31.3577/65.8454
[11:31:28.881] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 61.611 for pixel 14/78 mean/min/max = 47.2141/32.5593/61.8689
[11:31:28.881] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 64.3702 for pixel 0/4 mean/min/max = 48.0604/31.7169/64.404
[11:31:28.881] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 61.1375 for pixel 41/0 mean/min/max = 47.2166/33.2813/61.1519
[11:31:28.881] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 64.754 for pixel 38/16 mean/min/max = 49.3087/33.5267/65.0907
[11:31:28.882] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 65.3816 for pixel 0/3 mean/min/max = 48.5854/31.6882/65.4825
[11:31:28.882] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 64.0803 for pixel 15/11 mean/min/max = 48.4377/32.5924/64.2829
[11:31:28.882] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 59.7507 for pixel 28/9 mean/min/max = 45.7798/31.7707/59.789
[11:31:28.883] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 61.573 for pixel 6/61 mean/min/max = 46.852/32.0598/61.6442
[11:31:28.883] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 60.4847 for pixel 8/47 mean/min/max = 46.5061/32.3514/60.6609
[11:31:28.883] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 59.1909 for pixel 2/59 mean/min/max = 45.4699/31.7075/59.2322
[11:31:28.884] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 62.8429 for pixel 1/74 mean/min/max = 47.6563/32.1938/63.1187
[11:31:28.884] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 68.3923 for pixel 0/41 mean/min/max = 51.3656/34.2909/68.4403
[11:31:28.884] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 60.6487 for pixel 16/17 mean/min/max = 46.0556/31.2831/60.8281
[11:31:28.884] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 64.001 for pixel 0/9 mean/min/max = 47.9097/31.7071/64.1122
[11:31:28.885] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:31:28.974] <TB0> INFO: Expecting 411648 events.
[11:31:38.429] <TB0> INFO: 411648 events read in total (8864ms).
[11:31:38.435] <TB0> INFO: Expecting 411648 events.
[11:31:47.769] <TB0> INFO: 411648 events read in total (8931ms).
[11:31:47.778] <TB0> INFO: Expecting 411648 events.
[11:31:57.310] <TB0> INFO: 411648 events read in total (9129ms).
[11:31:57.327] <TB0> INFO: Expecting 411648 events.
[11:32:06.465] <TB0> INFO: 411648 events read in total (8735ms).
[11:32:06.480] <TB0> INFO: Expecting 411648 events.
[11:32:15.913] <TB0> INFO: 411648 events read in total (9029ms).
[11:32:15.938] <TB0> INFO: Expecting 411648 events.
[11:32:25.369] <TB0> INFO: 411648 events read in total (9028ms).
[11:32:25.398] <TB0> INFO: Expecting 411648 events.
[11:32:34.768] <TB0> INFO: 411648 events read in total (8968ms).
[11:32:34.792] <TB0> INFO: Expecting 411648 events.
[11:32:44.195] <TB0> INFO: 411648 events read in total (9000ms).
[11:32:44.230] <TB0> INFO: Expecting 411648 events.
[11:32:53.622] <TB0> INFO: 411648 events read in total (8989ms).
[11:32:53.650] <TB0> INFO: Expecting 411648 events.
[11:33:02.910] <TB0> INFO: 411648 events read in total (8857ms).
[11:33:02.953] <TB0> INFO: Expecting 411648 events.
[11:33:12.279] <TB0> INFO: 411648 events read in total (8923ms).
[11:33:12.329] <TB0> INFO: Expecting 411648 events.
[11:33:21.719] <TB0> INFO: 411648 events read in total (8987ms).
[11:33:21.771] <TB0> INFO: Expecting 411648 events.
[11:33:30.959] <TB0> INFO: 411648 events read in total (8785ms).
[11:33:30.000] <TB0> INFO: Expecting 411648 events.
[11:33:40.347] <TB0> INFO: 411648 events read in total (8944ms).
[11:33:40.390] <TB0> INFO: Expecting 411648 events.
[11:33:49.650] <TB0> INFO: 411648 events read in total (8857ms).
[11:33:49.698] <TB0> INFO: Expecting 411648 events.
[11:33:59.031] <TB0> INFO: 411648 events read in total (8930ms).
[11:33:59.079] <TB0> INFO: Test took 150194ms.
[11:33:59.852] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[11:33:59.864] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:33:59.864] <TB0> INFO: run 1 of 1
[11:34:00.162] <TB0> INFO: Expecting 5025280 events.
[11:34:27.227] <TB0> INFO: 590064 events read in total (26474ms).
[11:34:53.333] <TB0> INFO: 1181936 events read in total (52580ms).
[11:35:19.833] <TB0> INFO: 1773768 events read in total (79081ms).
[11:35:46.051] <TB0> INFO: 2365384 events read in total (105299ms).
[11:36:12.858] <TB0> INFO: 2960376 events read in total (132105ms).
[11:36:39.428] <TB0> INFO: 3559472 events read in total (158675ms).
[11:37:06.114] <TB0> INFO: 4157392 events read in total (185361ms).
[11:37:32.342] <TB0> INFO: 4754096 events read in total (211589ms).
[11:37:44.419] <TB0> INFO: 5025280 events read in total (223666ms).
[11:37:44.599] <TB0> INFO: Test took 224735ms.
[11:38:05.376] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 5.637637 .. 145.293760
[11:38:05.667] <TB0> INFO: Expecting 208000 events.
[11:38:15.639] <TB0> INFO: 208000 events read in total (9380ms).
[11:38:15.641] <TB0> INFO: Test took 10263ms.
[11:38:15.718] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 5 .. 155 (-1/-1) hits flags = 528 (plus default)
[11:38:15.729] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:38:15.729] <TB0> INFO: run 1 of 1
[11:38:15.963] <TB0> INFO: Expecting 5025280 events.
[11:38:42.157] <TB0> INFO: 580640 events read in total (25603ms).
[11:39:08.063] <TB0> INFO: 1161048 events read in total (51510ms).
[11:39:34.024] <TB0> INFO: 1741592 events read in total (77470ms).
[11:40:00.305] <TB0> INFO: 2322056 events read in total (103751ms).
[11:40:26.544] <TB0> INFO: 2901400 events read in total (129991ms).
[11:40:52.803] <TB0> INFO: 3481328 events read in total (156249ms).
[11:41:18.842] <TB0> INFO: 4060016 events read in total (182288ms).
[11:41:44.691] <TB0> INFO: 4638360 events read in total (208137ms).
[11:42:02.251] <TB0> INFO: 5025280 events read in total (225698ms).
[11:42:02.364] <TB0> INFO: Test took 226635ms.
[11:42:25.893] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 24.894297 .. 45.600148
[11:42:26.127] <TB0> INFO: Expecting 208000 events.
[11:42:36.369] <TB0> INFO: 208000 events read in total (9650ms).
[11:42:36.370] <TB0> INFO: Test took 10474ms.
[11:42:36.418] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 14 .. 55 (-1/-1) hits flags = 528 (plus default)
[11:42:36.429] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:42:36.429] <TB0> INFO: run 1 of 1
[11:42:36.661] <TB0> INFO: Expecting 1397760 events.
[11:43:06.289] <TB0> INFO: 670280 events read in total (29037ms).
[11:43:34.712] <TB0> INFO: 1338440 events read in total (57460ms).
[11:43:37.507] <TB0> INFO: 1397760 events read in total (60255ms).
[11:43:37.543] <TB0> INFO: Test took 61115ms.
[11:43:50.548] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 23.593284 .. 45.741848
[11:43:50.841] <TB0> INFO: Expecting 208000 events.
[11:44:00.944] <TB0> INFO: 208000 events read in total (9510ms).
[11:44:00.944] <TB0> INFO: Test took 10392ms.
[11:44:01.013] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 13 .. 55 (-1/-1) hits flags = 528 (plus default)
[11:44:01.025] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:44:01.025] <TB0> INFO: run 1 of 1
[11:44:01.313] <TB0> INFO: Expecting 1431040 events.
[11:44:30.238] <TB0> INFO: 675280 events read in total (28333ms).
[11:44:58.455] <TB0> INFO: 1349424 events read in total (56550ms).
[11:45:02.294] <TB0> INFO: 1431040 events read in total (60389ms).
[11:45:02.321] <TB0> INFO: Test took 61296ms.
[11:45:13.277] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 22.258050 .. 42.964847
[11:45:13.572] <TB0> INFO: Expecting 208000 events.
[11:45:23.718] <TB0> INFO: 208000 events read in total (9555ms).
[11:45:23.719] <TB0> INFO: Test took 10440ms.
[11:45:23.770] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 12 .. 52 (-1/-1) hits flags = 528 (plus default)
[11:45:23.779] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:45:23.779] <TB0> INFO: run 1 of 1
[11:45:24.049] <TB0> INFO: Expecting 1364480 events.
[11:45:53.333] <TB0> INFO: 692344 events read in total (28692ms).
[11:46:21.712] <TB0> INFO: 1364480 events read in total (57071ms).
[11:46:21.740] <TB0> INFO: Test took 57961ms.
[11:46:32.903] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:46:32.903] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[11:46:32.915] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:46:32.915] <TB0> INFO: run 1 of 1
[11:46:33.207] <TB0> INFO: Expecting 1364480 events.
[11:47:02.783] <TB0> INFO: 668064 events read in total (28984ms).
[11:47:30.795] <TB0> INFO: 1335856 events read in total (56996ms).
[11:47:32.557] <TB0> INFO: 1364480 events read in total (58759ms).
[11:47:32.584] <TB0> INFO: Test took 59669ms.
[11:47:44.967] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C0.dat
[11:47:44.967] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C1.dat
[11:47:44.967] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C2.dat
[11:47:44.967] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C3.dat
[11:47:44.967] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C4.dat
[11:47:44.967] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C5.dat
[11:47:44.967] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C6.dat
[11:47:44.967] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C7.dat
[11:47:44.967] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C8.dat
[11:47:44.968] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C9.dat
[11:47:44.968] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C10.dat
[11:47:44.968] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C11.dat
[11:47:44.968] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C12.dat
[11:47:44.968] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C13.dat
[11:47:44.968] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C14.dat
[11:47:44.968] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C15.dat
[11:47:44.968] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//trimParameters35_C0.dat
[11:47:44.977] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//trimParameters35_C1.dat
[11:47:44.985] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//trimParameters35_C2.dat
[11:47:44.991] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//trimParameters35_C3.dat
[11:47:44.996] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//trimParameters35_C4.dat
[11:47:44.002] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//trimParameters35_C5.dat
[11:47:45.008] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//trimParameters35_C6.dat
[11:47:45.013] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//trimParameters35_C7.dat
[11:47:45.019] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//trimParameters35_C8.dat
[11:47:45.025] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//trimParameters35_C9.dat
[11:47:45.031] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//trimParameters35_C10.dat
[11:47:45.036] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//trimParameters35_C11.dat
[11:47:45.042] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//trimParameters35_C12.dat
[11:47:45.048] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//trimParameters35_C13.dat
[11:47:45.053] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//trimParameters35_C14.dat
[11:47:45.059] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//trimParameters35_C15.dat
[11:47:45.064] <TB0> INFO: PixTestTrim::trimTest() done
[11:47:45.065] <TB0> INFO: vtrim: 124 145 119 140 143 145 130 133 137 125 135 135 133 135 125 139
[11:47:45.065] <TB0> INFO: vthrcomp: 114 131 130 128 113 134 115 124 126 113 117 124 131 108 119 130
[11:47:45.065] <TB0> INFO: vcal mean: 34.94 34.91 34.97 35.00 34.97 35.00 34.91 34.97 34.99 34.93 34.95 34.97 34.98 35.01 35.00 34.98
[11:47:45.065] <TB0> INFO: vcal RMS: 1.10 1.17 1.09 1.20 1.10 1.15 1.16 1.15 1.17 1.05 1.07 1.02 1.08 1.24 1.19 1.15
[11:47:45.065] <TB0> INFO: bits mean: 10.09 9.62 9.35 9.67 9.96 9.35 9.02 9.57 10.00 9.78 9.79 9.91 9.44 8.73 9.95 9.69
[11:47:45.065] <TB0> INFO: bits RMS: 2.39 2.58 2.61 2.57 2.32 2.37 2.80 2.43 2.55 2.50 2.52 2.61 2.58 2.40 2.61 2.56
[11:47:45.072] <TB0> INFO: ----------------------------------------------------------------------
[11:47:45.072] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[11:47:45.072] <TB0> INFO: ----------------------------------------------------------------------
[11:47:45.074] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[11:47:45.086] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:47:45.086] <TB0> INFO: run 1 of 1
[11:47:45.320] <TB0> INFO: Expecting 4160000 events.
[11:48:18.345] <TB0> INFO: 772105 events read in total (32434ms).
[11:48:50.774] <TB0> INFO: 1536655 events read in total (64863ms).
[11:49:23.386] <TB0> INFO: 2295460 events read in total (97475ms).
[11:49:55.423] <TB0> INFO: 3050415 events read in total (129512ms).
[11:50:27.650] <TB0> INFO: 3804145 events read in total (161739ms).
[11:50:42.911] <TB0> INFO: 4160000 events read in total (177000ms).
[11:50:42.977] <TB0> INFO: Test took 177891ms.
[11:51:05.468] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 223 (-1/-1) hits flags = 528 (plus default)
[11:51:05.477] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:51:05.477] <TB0> INFO: run 1 of 1
[11:51:05.709] <TB0> INFO: Expecting 4659200 events.
[11:51:37.282] <TB0> INFO: 716575 events read in total (30981ms).
[11:52:08.517] <TB0> INFO: 1427225 events read in total (62216ms).
[11:52:39.369] <TB0> INFO: 2134715 events read in total (93068ms).
[11:53:10.936] <TB0> INFO: 2840050 events read in total (124635ms).
[11:53:42.270] <TB0> INFO: 3542390 events read in total (155969ms).
[11:54:13.418] <TB0> INFO: 4244090 events read in total (187117ms).
[11:54:31.765] <TB0> INFO: 4659200 events read in total (205464ms).
[11:54:31.824] <TB0> INFO: Test took 206347ms.
[11:54:57.815] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 209 (-1/-1) hits flags = 528 (plus default)
[11:54:57.828] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:54:57.828] <TB0> INFO: run 1 of 1
[11:54:58.115] <TB0> INFO: Expecting 4368000 events.
[11:55:30.766] <TB0> INFO: 733620 events read in total (32059ms).
[11:56:02.163] <TB0> INFO: 1460580 events read in total (63456ms).
[11:56:33.900] <TB0> INFO: 2183625 events read in total (95193ms).
[11:57:05.284] <TB0> INFO: 2904290 events read in total (126577ms).
[11:57:36.980] <TB0> INFO: 3621890 events read in total (158273ms).
[11:58:08.653] <TB0> INFO: 4341430 events read in total (189946ms).
[11:58:10.188] <TB0> INFO: 4368000 events read in total (191481ms).
[11:58:10.247] <TB0> INFO: Test took 192419ms.
[11:58:36.111] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 212 (-1/-1) hits flags = 528 (plus default)
[11:58:36.120] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:58:36.120] <TB0> INFO: run 1 of 1
[11:58:36.353] <TB0> INFO: Expecting 4430400 events.
[11:59:09.106] <TB0> INFO: 730150 events read in total (32162ms).
[11:59:40.649] <TB0> INFO: 1453560 events read in total (63705ms).
[12:00:11.956] <TB0> INFO: 2172940 events read in total (95012ms).
[12:00:43.874] <TB0> INFO: 2890370 events read in total (126930ms).
[12:01:15.362] <TB0> INFO: 3603945 events read in total (158418ms).
[12:01:46.328] <TB0> INFO: 4318570 events read in total (189384ms).
[12:01:51.739] <TB0> INFO: 4430400 events read in total (194795ms).
[12:01:51.793] <TB0> INFO: Test took 195672ms.
[12:02:16.386] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 209 (-1/-1) hits flags = 528 (plus default)
[12:02:16.398] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:02:16.398] <TB0> INFO: run 1 of 1
[12:02:16.684] <TB0> INFO: Expecting 4368000 events.
[12:02:49.266] <TB0> INFO: 733885 events read in total (31990ms).
[12:03:21.210] <TB0> INFO: 1460950 events read in total (63934ms).
[12:03:52.972] <TB0> INFO: 2183970 events read in total (95696ms).
[12:04:24.398] <TB0> INFO: 2904815 events read in total (127122ms).
[12:04:55.979] <TB0> INFO: 3622185 events read in total (158703ms).
[12:05:27.470] <TB0> INFO: 4341535 events read in total (190194ms).
[12:05:28.953] <TB0> INFO: 4368000 events read in total (191677ms).
[12:05:29.023] <TB0> INFO: Test took 192626ms.
[12:05:52.711] <TB0> INFO: PixTestTrim::trimBitTest() done
[12:05:52.712] <TB0> INFO: PixTestTrim::doTest() done, duration: 2517 seconds
[12:05:52.712] <TB0> INFO: Decoding statistics:
[12:05:52.712] <TB0> INFO: General information:
[12:05:52.712] <TB0> INFO: 16bit words read: 0
[12:05:52.712] <TB0> INFO: valid events total: 0
[12:05:52.712] <TB0> INFO: empty events: 0
[12:05:52.712] <TB0> INFO: valid events with pixels: 0
[12:05:52.712] <TB0> INFO: valid pixel hits: 0
[12:05:52.712] <TB0> INFO: Event errors: 0
[12:05:52.712] <TB0> INFO: start marker: 0
[12:05:52.712] <TB0> INFO: stop marker: 0
[12:05:52.712] <TB0> INFO: overflow: 0
[12:05:52.712] <TB0> INFO: invalid 5bit words: 0
[12:05:52.712] <TB0> INFO: invalid XOR eye diagram: 0
[12:05:52.712] <TB0> INFO: frame (failed synchr.): 0
[12:05:52.712] <TB0> INFO: idle data (no TBM trl): 0
[12:05:52.712] <TB0> INFO: no data (only TBM hdr): 0
[12:05:52.712] <TB0> INFO: TBM errors: 0
[12:05:52.712] <TB0> INFO: flawed TBM headers: 0
[12:05:52.712] <TB0> INFO: flawed TBM trailers: 0
[12:05:52.712] <TB0> INFO: event ID mismatches: 0
[12:05:52.712] <TB0> INFO: ROC errors: 0
[12:05:52.712] <TB0> INFO: missing ROC header(s): 0
[12:05:52.712] <TB0> INFO: misplaced readback start: 0
[12:05:52.712] <TB0> INFO: Pixel decoding errors: 0
[12:05:52.712] <TB0> INFO: pixel data incomplete: 0
[12:05:52.712] <TB0> INFO: pixel address: 0
[12:05:52.712] <TB0> INFO: pulse height fill bit: 0
[12:05:52.712] <TB0> INFO: buffer corruption: 0
[12:05:53.328] <TB0> INFO: ######################################################################
[12:05:53.328] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:05:53.328] <TB0> INFO: ######################################################################
[12:05:53.621] <TB0> INFO: Expecting 41600 events.
[12:05:57.159] <TB0> INFO: 41600 events read in total (2946ms).
[12:05:57.159] <TB0> INFO: Test took 3830ms.
[12:05:57.593] <TB0> INFO: Expecting 41600 events.
[12:06:01.049] <TB0> INFO: 41600 events read in total (2865ms).
[12:06:01.049] <TB0> INFO: Test took 3687ms.
[12:06:01.059] <TB0> INFO: Max pixel from chip 0 is [8 ,7] phvalue 92
[12:06:01.059] <TB0> INFO: Max pixel from chip 1 is [8 ,30] phvalue 160
[12:06:01.059] <TB0> INFO: Max pixel from chip 2 is [4 ,6] phvalue 142
[12:06:01.059] <TB0> INFO: Max pixel from chip 3 is [7 ,31] phvalue 75
[12:06:01.059] <TB0> INFO: Max pixel from chip 4 is [10 ,30] phvalue 112
[12:06:01.059] <TB0> INFO: Max pixel from chip 5 is [9 ,11] phvalue 187
[12:06:01.059] <TB0> INFO: Max pixel from chip 6 is [4 ,7] phvalue 164
[12:06:01.059] <TB0> INFO: Max pixel from chip 7 is [5 ,55] phvalue 136
[12:06:01.060] <TB0> INFO: Max pixel from chip 8 is [6 ,71] phvalue 81
[12:06:01.060] <TB0> INFO: Max pixel from chip 9 is [5 ,8] phvalue 68
[12:06:01.060] <TB0> INFO: Max pixel from chip 10 is [7 ,18] phvalue 151
[12:06:01.060] <TB0> INFO: Max pixel from chip 11 is [8 ,43] phvalue 98
[12:06:01.060] <TB0> INFO: Max pixel from chip 12 is [6 ,29] phvalue 102
[12:06:01.060] <TB0> INFO: Max pixel from chip 13 is [15 ,18] phvalue 181
[12:06:01.060] <TB0> INFO: Max pixel from chip 14 is [4 ,23] phvalue 189
[12:06:01.060] <TB0> INFO: Max pixel from chip 15 is [26 ,11] phvalue 98
[12:06:01.339] <TB0> INFO: Expecting 41600 events.
[12:06:04.843] <TB0> INFO: 41600 events read in total (2912ms).
[12:06:04.844] <TB0> INFO: Test took 3768ms.
[12:06:04.853] <TB0> INFO: Min pixel from chip 0 is [3 ,5] phvalue 255
[12:06:04.853] <TB0> INFO: Min pixel from chip 1 is [3 ,5] phvalue 255
[12:06:04.853] <TB0> INFO: Min pixel from chip 2 is [3 ,5] phvalue 255
[12:06:04.853] <TB0> INFO: Min pixel from chip 3 is [25 ,61] phvalue 252
[12:06:04.853] <TB0> INFO: Min pixel from chip 4 is [3 ,5] phvalue 255
[12:06:04.853] <TB0> INFO: Min pixel from chip 5 is [3 ,5] phvalue 255
[12:06:04.854] <TB0> INFO: Min pixel from chip 6 is [3 ,5] phvalue 255
[12:06:04.854] <TB0> INFO: Min pixel from chip 7 is [3 ,5] phvalue 255
[12:06:04.854] <TB0> INFO: Min pixel from chip 8 is [3 ,5] phvalue 255
[12:06:04.854] <TB0> INFO: Min pixel from chip 9 is [5 ,63] phvalue 241
[12:06:04.854] <TB0> INFO: Min pixel from chip 10 is [3 ,5] phvalue 255
[12:06:04.854] <TB0> INFO: Min pixel from chip 11 is [35 ,27] phvalue 252
[12:06:04.854] <TB0> INFO: Min pixel from chip 12 is [15 ,61] phvalue 244
[12:06:04.854] <TB0> INFO: Min pixel from chip 13 is [3 ,5] phvalue 255
[12:06:04.855] <TB0> INFO: Min pixel from chip 14 is [3 ,5] phvalue 255
[12:06:04.855] <TB0> INFO: Min pixel from chip 15 is [3 ,5] phvalue 255
[12:06:05.133] <TB0> INFO: Expecting 2560 events.
[12:06:06.018] <TB0> INFO: 2560 events read in total (294ms).
[12:06:06.018] <TB0> INFO: Test took 1162ms.
[12:06:06.325] <TB0> INFO: Expecting 2560 events.
[12:06:07.213] <TB0> INFO: 2560 events read in total (296ms).
[12:06:07.213] <TB0> INFO: Test took 1195ms.
[12:06:07.522] <TB0> INFO: Expecting 2560 events.
[12:06:08.410] <TB0> INFO: 2560 events read in total (297ms).
[12:06:08.410] <TB0> INFO: Test took 1196ms.
[12:06:08.718] <TB0> INFO: Expecting 2560 events.
[12:06:09.601] <TB0> INFO: 2560 events read in total (291ms).
[12:06:09.601] <TB0> INFO: Test took 1190ms.
[12:06:09.909] <TB0> INFO: Expecting 2560 events.
[12:06:10.788] <TB0> INFO: 2560 events read in total (288ms).
[12:06:10.788] <TB0> INFO: Test took 1187ms.
[12:06:11.096] <TB0> INFO: Expecting 2560 events.
[12:06:11.980] <TB0> INFO: 2560 events read in total (292ms).
[12:06:11.981] <TB0> INFO: Test took 1192ms.
[12:06:12.289] <TB0> INFO: Expecting 2560 events.
[12:06:13.168] <TB0> INFO: 2560 events read in total (289ms).
[12:06:13.169] <TB0> INFO: Test took 1188ms.
[12:06:13.476] <TB0> INFO: Expecting 2560 events.
[12:06:14.360] <TB0> INFO: 2560 events read in total (292ms).
[12:06:14.360] <TB0> INFO: Test took 1191ms.
[12:06:14.667] <TB0> INFO: Expecting 2560 events.
[12:06:15.547] <TB0> INFO: 2560 events read in total (288ms).
[12:06:15.547] <TB0> INFO: Test took 1186ms.
[12:06:15.855] <TB0> INFO: Expecting 2560 events.
[12:06:16.737] <TB0> INFO: 2560 events read in total (291ms).
[12:06:16.737] <TB0> INFO: Test took 1189ms.
[12:06:17.045] <TB0> INFO: Expecting 2560 events.
[12:06:17.924] <TB0> INFO: 2560 events read in total (287ms).
[12:06:17.924] <TB0> INFO: Test took 1187ms.
[12:06:18.232] <TB0> INFO: Expecting 2560 events.
[12:06:19.111] <TB0> INFO: 2560 events read in total (288ms).
[12:06:19.111] <TB0> INFO: Test took 1187ms.
[12:06:19.419] <TB0> INFO: Expecting 2560 events.
[12:06:20.303] <TB0> INFO: 2560 events read in total (293ms).
[12:06:20.303] <TB0> INFO: Test took 1191ms.
[12:06:20.610] <TB0> INFO: Expecting 2560 events.
[12:06:21.494] <TB0> INFO: 2560 events read in total (292ms).
[12:06:21.494] <TB0> INFO: Test took 1190ms.
[12:06:21.802] <TB0> INFO: Expecting 2560 events.
[12:06:22.691] <TB0> INFO: 2560 events read in total (298ms).
[12:06:22.691] <TB0> INFO: Test took 1197ms.
[12:06:22.999] <TB0> INFO: Expecting 2560 events.
[12:06:23.882] <TB0> INFO: 2560 events read in total (292ms).
[12:06:23.883] <TB0> INFO: Test took 1191ms.
[12:06:23.885] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:06:24.191] <TB0> INFO: Expecting 655360 events.
[12:06:38.922] <TB0> INFO: 655360 events read in total (14139ms).
[12:06:38.933] <TB0> INFO: Expecting 655360 events.
[12:06:53.371] <TB0> INFO: 655360 events read in total (14035ms).
[12:06:53.386] <TB0> INFO: Expecting 655360 events.
[12:07:07.849] <TB0> INFO: 655360 events read in total (14061ms).
[12:07:07.877] <TB0> INFO: Expecting 655360 events.
[12:07:22.341] <TB0> INFO: 655360 events read in total (14061ms).
[12:07:22.375] <TB0> INFO: Expecting 655360 events.
[12:07:36.841] <TB0> INFO: 655360 events read in total (14063ms).
[12:07:36.868] <TB0> INFO: Expecting 655360 events.
[12:07:51.344] <TB0> INFO: 655360 events read in total (14073ms).
[12:07:51.391] <TB0> INFO: Expecting 655360 events.
[12:08:05.895] <TB0> INFO: 655360 events read in total (14101ms).
[12:08:05.950] <TB0> INFO: Expecting 655360 events.
[12:08:20.505] <TB0> INFO: 655360 events read in total (14152ms).
[12:08:20.565] <TB0> INFO: Expecting 655360 events.
[12:08:35.076] <TB0> INFO: 655360 events read in total (14108ms).
[12:08:35.121] <TB0> INFO: Expecting 655360 events.
[12:08:49.770] <TB0> INFO: 655360 events read in total (14246ms).
[12:08:49.846] <TB0> INFO: Expecting 655360 events.
[12:09:04.167] <TB0> INFO: 655360 events read in total (13918ms).
[12:09:04.221] <TB0> INFO: Expecting 655360 events.
[12:09:18.732] <TB0> INFO: 655360 events read in total (14108ms).
[12:09:18.789] <TB0> INFO: Expecting 655360 events.
[12:09:33.433] <TB0> INFO: 655360 events read in total (14241ms).
[12:09:33.526] <TB0> INFO: Expecting 655360 events.
[12:09:48.084] <TB0> INFO: 655360 events read in total (14155ms).
[12:09:48.151] <TB0> INFO: Expecting 655360 events.
[12:10:02.692] <TB0> INFO: 655360 events read in total (14138ms).
[12:10:02.764] <TB0> INFO: Expecting 655360 events.
[12:10:17.079] <TB0> INFO: 655360 events read in total (13912ms).
[12:10:17.174] <TB0> INFO: Test took 233289ms.
[12:10:17.253] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:10:17.518] <TB0> INFO: Expecting 655360 events.
[12:10:32.092] <TB0> INFO: 655360 events read in total (13983ms).
[12:10:32.108] <TB0> INFO: Expecting 655360 events.
[12:10:46.277] <TB0> INFO: 655360 events read in total (13766ms).
[12:10:46.292] <TB0> INFO: Expecting 655360 events.
[12:11:00.555] <TB0> INFO: 655360 events read in total (13860ms).
[12:11:00.574] <TB0> INFO: Expecting 655360 events.
[12:11:14.944] <TB0> INFO: 655360 events read in total (13967ms).
[12:11:14.968] <TB0> INFO: Expecting 655360 events.
[12:11:29.354] <TB0> INFO: 655360 events read in total (13983ms).
[12:11:29.382] <TB0> INFO: Expecting 655360 events.
[12:11:43.762] <TB0> INFO: 655360 events read in total (13976ms).
[12:11:43.795] <TB0> INFO: Expecting 655360 events.
[12:11:57.823] <TB0> INFO: 655360 events read in total (13625ms).
[12:11:57.861] <TB0> INFO: Expecting 655360 events.
[12:12:12.089] <TB0> INFO: 655360 events read in total (13826ms).
[12:12:12.130] <TB0> INFO: Expecting 655360 events.
[12:12:26.791] <TB0> INFO: 655360 events read in total (14258ms).
[12:12:26.838] <TB0> INFO: Expecting 655360 events.
[12:12:41.338] <TB0> INFO: 655360 events read in total (14097ms).
[12:12:41.390] <TB0> INFO: Expecting 655360 events.
[12:12:55.852] <TB0> INFO: 655360 events read in total (14059ms).
[12:12:55.909] <TB0> INFO: Expecting 655360 events.
[12:13:10.340] <TB0> INFO: 655360 events read in total (14028ms).
[12:13:10.397] <TB0> INFO: Expecting 655360 events.
[12:13:24.896] <TB0> INFO: 655360 events read in total (14096ms).
[12:13:24.960] <TB0> INFO: Expecting 655360 events.
[12:13:39.027] <TB0> INFO: 655360 events read in total (13664ms).
[12:13:39.096] <TB0> INFO: Expecting 655360 events.
[12:13:53.658] <TB0> INFO: 655360 events read in total (14160ms).
[12:13:53.737] <TB0> INFO: Expecting 655360 events.
[12:14:08.192] <TB0> INFO: 655360 events read in total (14053ms).
[12:14:08.266] <TB0> INFO: Test took 231013ms.
[12:14:08.424] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:14:08.428] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:14:08.433] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:14:08.438] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[12:14:08.442] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[12:14:08.448] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[12:14:08.453] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[12:14:08.458] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[12:14:08.464] <TB0> INFO: safety margin for low PH: adding 8, margin is now 28
[12:14:08.470] <TB0> INFO: safety margin for low PH: adding 9, margin is now 29
[12:14:08.477] <TB0> INFO: safety margin for low PH: adding 10, margin is now 30
[12:14:08.485] <TB0> INFO: safety margin for low PH: adding 11, margin is now 31
[12:14:08.491] <TB0> INFO: safety margin for low PH: adding 12, margin is now 32
[12:14:08.497] <TB0> INFO: safety margin for low PH: adding 13, margin is now 33
[12:14:08.503] <TB0> INFO: safety margin for low PH: adding 14, margin is now 34
[12:14:08.508] <TB0> INFO: safety margin for low PH: adding 15, margin is now 35
[12:14:08.513] <TB0> INFO: safety margin for low PH: adding 16, margin is now 36
[12:14:08.518] <TB0> INFO: safety margin for low PH: adding 17, margin is now 37
[12:14:08.523] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:14:08.527] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:14:08.534] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:14:08.538] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:14:08.543] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:14:08.549] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:14:08.554] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:14:08.558] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:14:08.566] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:14:08.574] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:14:08.581] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[12:14:08.588] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[12:14:08.595] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[12:14:08.603] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[12:14:08.610] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[12:14:08.618] <TB0> INFO: safety margin for low PH: adding 8, margin is now 28
[12:14:08.625] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:14:08.633] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:14:08.640] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:14:08.647] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[12:14:08.654] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:14:08.661] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:14:08.669] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:14:08.676] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[12:14:08.683] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[12:14:08.690] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[12:14:08.698] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[12:14:08.705] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[12:14:08.712] <TB0> INFO: safety margin for low PH: adding 8, margin is now 28
[12:14:08.720] <TB0> INFO: safety margin for low PH: adding 9, margin is now 29
[12:14:08.727] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:14:08.734] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:14:08.742] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:14:08.749] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[12:14:08.756] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[12:14:08.764] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[12:14:08.772] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:14:08.779] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:14:08.787] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:14:08.794] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:14:08.801] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:14:08.809] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:14:08.816] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:14:08.851] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C0.dat
[12:14:08.851] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C1.dat
[12:14:08.851] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C2.dat
[12:14:08.851] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C3.dat
[12:14:08.851] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C4.dat
[12:14:08.851] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C5.dat
[12:14:08.852] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C6.dat
[12:14:08.852] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C7.dat
[12:14:08.852] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C8.dat
[12:14:08.852] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C9.dat
[12:14:08.852] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C10.dat
[12:14:08.852] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C11.dat
[12:14:08.852] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C12.dat
[12:14:08.852] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C13.dat
[12:14:08.852] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C14.dat
[12:14:08.853] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//dacParameters35_C15.dat
[12:14:09.086] <TB0> INFO: Expecting 41600 events.
[12:14:12.264] <TB0> INFO: 41600 events read in total (2586ms).
[12:14:12.265] <TB0> INFO: Test took 3410ms.
[12:14:12.710] <TB0> INFO: Expecting 41600 events.
[12:14:15.766] <TB0> INFO: 41600 events read in total (2464ms).
[12:14:15.766] <TB0> INFO: Test took 3288ms.
[12:14:16.270] <TB0> INFO: Expecting 41600 events.
[12:14:19.383] <TB0> INFO: 41600 events read in total (2522ms).
[12:14:19.384] <TB0> INFO: Test took 3407ms.
[12:14:19.598] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:19.686] <TB0> INFO: Expecting 2560 events.
[12:14:20.570] <TB0> INFO: 2560 events read in total (292ms).
[12:14:20.570] <TB0> INFO: Test took 972ms.
[12:14:20.572] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:20.878] <TB0> INFO: Expecting 2560 events.
[12:14:21.762] <TB0> INFO: 2560 events read in total (292ms).
[12:14:21.763] <TB0> INFO: Test took 1191ms.
[12:14:21.765] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:22.071] <TB0> INFO: Expecting 2560 events.
[12:14:22.955] <TB0> INFO: 2560 events read in total (293ms).
[12:14:22.955] <TB0> INFO: Test took 1190ms.
[12:14:22.957] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:23.263] <TB0> INFO: Expecting 2560 events.
[12:14:24.147] <TB0> INFO: 2560 events read in total (292ms).
[12:14:24.147] <TB0> INFO: Test took 1190ms.
[12:14:24.149] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:24.456] <TB0> INFO: Expecting 2560 events.
[12:14:25.340] <TB0> INFO: 2560 events read in total (293ms).
[12:14:25.340] <TB0> INFO: Test took 1191ms.
[12:14:25.342] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:25.648] <TB0> INFO: Expecting 2560 events.
[12:14:26.535] <TB0> INFO: 2560 events read in total (296ms).
[12:14:26.536] <TB0> INFO: Test took 1194ms.
[12:14:26.538] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:26.844] <TB0> INFO: Expecting 2560 events.
[12:14:27.731] <TB0> INFO: 2560 events read in total (295ms).
[12:14:27.732] <TB0> INFO: Test took 1195ms.
[12:14:27.734] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:28.040] <TB0> INFO: Expecting 2560 events.
[12:14:28.926] <TB0> INFO: 2560 events read in total (295ms).
[12:14:28.927] <TB0> INFO: Test took 1193ms.
[12:14:28.928] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:29.235] <TB0> INFO: Expecting 2560 events.
[12:14:30.118] <TB0> INFO: 2560 events read in total (292ms).
[12:14:30.119] <TB0> INFO: Test took 1191ms.
[12:14:30.120] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:30.434] <TB0> INFO: Expecting 2560 events.
[12:14:31.313] <TB0> INFO: 2560 events read in total (287ms).
[12:14:31.313] <TB0> INFO: Test took 1193ms.
[12:14:31.315] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:31.622] <TB0> INFO: Expecting 2560 events.
[12:14:32.502] <TB0> INFO: 2560 events read in total (288ms).
[12:14:32.502] <TB0> INFO: Test took 1187ms.
[12:14:32.504] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:32.810] <TB0> INFO: Expecting 2560 events.
[12:14:33.690] <TB0> INFO: 2560 events read in total (288ms).
[12:14:33.690] <TB0> INFO: Test took 1186ms.
[12:14:33.692] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:33.998] <TB0> INFO: Expecting 2560 events.
[12:14:34.878] <TB0> INFO: 2560 events read in total (288ms).
[12:14:34.878] <TB0> INFO: Test took 1186ms.
[12:14:34.880] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:35.186] <TB0> INFO: Expecting 2560 events.
[12:14:36.065] <TB0> INFO: 2560 events read in total (288ms).
[12:14:36.065] <TB0> INFO: Test took 1185ms.
[12:14:36.067] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:36.373] <TB0> INFO: Expecting 2560 events.
[12:14:37.253] <TB0> INFO: 2560 events read in total (288ms).
[12:14:37.253] <TB0> INFO: Test took 1186ms.
[12:14:37.255] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:37.561] <TB0> INFO: Expecting 2560 events.
[12:14:38.440] <TB0> INFO: 2560 events read in total (288ms).
[12:14:38.440] <TB0> INFO: Test took 1185ms.
[12:14:38.442] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:38.748] <TB0> INFO: Expecting 2560 events.
[12:14:39.633] <TB0> INFO: 2560 events read in total (293ms).
[12:14:39.633] <TB0> INFO: Test took 1191ms.
[12:14:39.635] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:39.941] <TB0> INFO: Expecting 2560 events.
[12:14:40.824] <TB0> INFO: 2560 events read in total (292ms).
[12:14:40.824] <TB0> INFO: Test took 1189ms.
[12:14:40.826] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:41.132] <TB0> INFO: Expecting 2560 events.
[12:14:42.012] <TB0> INFO: 2560 events read in total (288ms).
[12:14:42.012] <TB0> INFO: Test took 1186ms.
[12:14:42.014] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:42.320] <TB0> INFO: Expecting 2560 events.
[12:14:43.200] <TB0> INFO: 2560 events read in total (288ms).
[12:14:43.200] <TB0> INFO: Test took 1186ms.
[12:14:43.202] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:43.508] <TB0> INFO: Expecting 2560 events.
[12:14:44.393] <TB0> INFO: 2560 events read in total (293ms).
[12:14:44.393] <TB0> INFO: Test took 1191ms.
[12:14:44.395] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:44.702] <TB0> INFO: Expecting 2560 events.
[12:14:45.585] <TB0> INFO: 2560 events read in total (292ms).
[12:14:45.586] <TB0> INFO: Test took 1191ms.
[12:14:45.588] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:45.894] <TB0> INFO: Expecting 2560 events.
[12:14:46.777] <TB0> INFO: 2560 events read in total (291ms).
[12:14:46.777] <TB0> INFO: Test took 1190ms.
[12:14:46.779] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:47.086] <TB0> INFO: Expecting 2560 events.
[12:14:47.970] <TB0> INFO: 2560 events read in total (292ms).
[12:14:47.971] <TB0> INFO: Test took 1192ms.
[12:14:47.973] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:48.279] <TB0> INFO: Expecting 2560 events.
[12:14:49.167] <TB0> INFO: 2560 events read in total (296ms).
[12:14:49.167] <TB0> INFO: Test took 1195ms.
[12:14:49.169] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:49.476] <TB0> INFO: Expecting 2560 events.
[12:14:50.359] <TB0> INFO: 2560 events read in total (292ms).
[12:14:50.359] <TB0> INFO: Test took 1190ms.
[12:14:50.361] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:50.668] <TB0> INFO: Expecting 2560 events.
[12:14:51.550] <TB0> INFO: 2560 events read in total (291ms).
[12:14:51.550] <TB0> INFO: Test took 1189ms.
[12:14:51.553] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:51.859] <TB0> INFO: Expecting 2560 events.
[12:14:52.742] <TB0> INFO: 2560 events read in total (292ms).
[12:14:52.742] <TB0> INFO: Test took 1189ms.
[12:14:52.744] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:53.051] <TB0> INFO: Expecting 2560 events.
[12:14:53.935] <TB0> INFO: 2560 events read in total (293ms).
[12:14:53.935] <TB0> INFO: Test took 1191ms.
[12:14:53.937] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:54.243] <TB0> INFO: Expecting 2560 events.
[12:14:55.127] <TB0> INFO: 2560 events read in total (292ms).
[12:14:55.128] <TB0> INFO: Test took 1191ms.
[12:14:55.130] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:55.436] <TB0> INFO: Expecting 2560 events.
[12:14:56.324] <TB0> INFO: 2560 events read in total (296ms).
[12:14:56.325] <TB0> INFO: Test took 1196ms.
[12:14:56.326] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:56.633] <TB0> INFO: Expecting 2560 events.
[12:14:57.519] <TB0> INFO: 2560 events read in total (295ms).
[12:14:57.519] <TB0> INFO: Test took 1193ms.
[12:14:57.978] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 544 seconds
[12:14:57.978] <TB0> INFO: PH scale (per ROC): 48 37 37 52 43 37 48 40 41 48 34 60 52 34 45 35
[12:14:57.978] <TB0> INFO: PH offset (per ROC): 113 91 98 123 111 80 96 101 112 126 90 119 117 81 88 108
[12:14:57.983] <TB0> INFO: Decoding statistics:
[12:14:57.983] <TB0> INFO: General information:
[12:14:57.983] <TB0> INFO: 16bit words read: 127862
[12:14:57.983] <TB0> INFO: valid events total: 20480
[12:14:57.983] <TB0> INFO: empty events: 17989
[12:14:57.983] <TB0> INFO: valid events with pixels: 2491
[12:14:57.983] <TB0> INFO: valid pixel hits: 2491
[12:14:57.983] <TB0> INFO: Event errors: 0
[12:14:57.983] <TB0> INFO: start marker: 0
[12:14:57.983] <TB0> INFO: stop marker: 0
[12:14:57.983] <TB0> INFO: overflow: 0
[12:14:57.983] <TB0> INFO: invalid 5bit words: 0
[12:14:57.983] <TB0> INFO: invalid XOR eye diagram: 0
[12:14:57.983] <TB0> INFO: frame (failed synchr.): 0
[12:14:57.983] <TB0> INFO: idle data (no TBM trl): 0
[12:14:57.983] <TB0> INFO: no data (only TBM hdr): 0
[12:14:57.983] <TB0> INFO: TBM errors: 0
[12:14:57.983] <TB0> INFO: flawed TBM headers: 0
[12:14:57.983] <TB0> INFO: flawed TBM trailers: 0
[12:14:57.983] <TB0> INFO: event ID mismatches: 0
[12:14:57.983] <TB0> INFO: ROC errors: 0
[12:14:57.983] <TB0> INFO: missing ROC header(s): 0
[12:14:57.983] <TB0> INFO: misplaced readback start: 0
[12:14:57.983] <TB0> INFO: Pixel decoding errors: 0
[12:14:57.983] <TB0> INFO: pixel data incomplete: 0
[12:14:57.983] <TB0> INFO: pixel address: 0
[12:14:57.983] <TB0> INFO: pulse height fill bit: 0
[12:14:57.983] <TB0> INFO: buffer corruption: 0
[12:14:58.252] <TB0> INFO: ######################################################################
[12:14:58.252] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[12:14:58.252] <TB0> INFO: ######################################################################
[12:14:58.267] <TB0> INFO: scanning low vcal = 10
[12:14:58.500] <TB0> INFO: Expecting 41600 events.
[12:15:02.092] <TB0> INFO: 41600 events read in total (3000ms).
[12:15:02.092] <TB0> INFO: Test took 3825ms.
[12:15:02.093] <TB0> INFO: scanning low vcal = 20
[12:15:02.393] <TB0> INFO: Expecting 41600 events.
[12:15:06.021] <TB0> INFO: 41600 events read in total (3036ms).
[12:15:06.022] <TB0> INFO: Test took 3929ms.
[12:15:06.025] <TB0> INFO: scanning low vcal = 30
[12:15:06.322] <TB0> INFO: Expecting 41600 events.
[12:15:09.001] <TB0> INFO: 41600 events read in total (3088ms).
[12:15:09.002] <TB0> INFO: Test took 3977ms.
[12:15:09.005] <TB0> INFO: scanning low vcal = 40
[12:15:10.281] <TB0> INFO: Expecting 41600 events.
[12:15:14.237] <TB0> INFO: 41600 events read in total (3364ms).
[12:15:14.238] <TB0> INFO: Test took 4233ms.
[12:15:14.241] <TB0> INFO: scanning low vcal = 50
[12:15:14.517] <TB0> INFO: Expecting 41600 events.
[12:15:18.495] <TB0> INFO: 41600 events read in total (3386ms).
[12:15:18.496] <TB0> INFO: Test took 4255ms.
[12:15:18.498] <TB0> INFO: scanning low vcal = 60
[12:15:18.775] <TB0> INFO: Expecting 41600 events.
[12:15:22.749] <TB0> INFO: 41600 events read in total (3382ms).
[12:15:22.750] <TB0> INFO: Test took 4251ms.
[12:15:22.753] <TB0> INFO: scanning low vcal = 70
[12:15:23.029] <TB0> INFO: Expecting 41600 events.
[12:15:27.025] <TB0> INFO: 41600 events read in total (3404ms).
[12:15:27.026] <TB0> INFO: Test took 4273ms.
[12:15:27.029] <TB0> INFO: scanning low vcal = 80
[12:15:27.305] <TB0> INFO: Expecting 41600 events.
[12:15:31.283] <TB0> INFO: 41600 events read in total (3386ms).
[12:15:31.284] <TB0> INFO: Test took 4255ms.
[12:15:31.286] <TB0> INFO: scanning low vcal = 90
[12:15:31.563] <TB0> INFO: Expecting 41600 events.
[12:15:35.601] <TB0> INFO: 41600 events read in total (3447ms).
[12:15:35.602] <TB0> INFO: Test took 4316ms.
[12:15:35.605] <TB0> INFO: scanning low vcal = 100
[12:15:35.896] <TB0> INFO: Expecting 41600 events.
[12:15:39.844] <TB0> INFO: 41600 events read in total (3357ms).
[12:15:39.845] <TB0> INFO: Test took 4240ms.
[12:15:39.848] <TB0> INFO: scanning low vcal = 110
[12:15:40.144] <TB0> INFO: Expecting 41600 events.
[12:15:44.171] <TB0> INFO: 41600 events read in total (3435ms).
[12:15:44.172] <TB0> INFO: Test took 4324ms.
[12:15:44.175] <TB0> INFO: scanning low vcal = 120
[12:15:44.452] <TB0> INFO: Expecting 41600 events.
[12:15:48.399] <TB0> INFO: 41600 events read in total (3356ms).
[12:15:48.400] <TB0> INFO: Test took 4225ms.
[12:15:48.402] <TB0> INFO: scanning low vcal = 130
[12:15:48.679] <TB0> INFO: Expecting 41600 events.
[12:15:52.633] <TB0> INFO: 41600 events read in total (3362ms).
[12:15:52.633] <TB0> INFO: Test took 4230ms.
[12:15:52.636] <TB0> INFO: scanning low vcal = 140
[12:15:52.913] <TB0> INFO: Expecting 41600 events.
[12:15:56.974] <TB0> INFO: 41600 events read in total (3469ms).
[12:15:56.975] <TB0> INFO: Test took 4339ms.
[12:15:56.978] <TB0> INFO: scanning low vcal = 150
[12:15:57.254] <TB0> INFO: Expecting 41600 events.
[12:16:01.274] <TB0> INFO: 41600 events read in total (3428ms).
[12:16:01.275] <TB0> INFO: Test took 4297ms.
[12:16:01.277] <TB0> INFO: scanning low vcal = 160
[12:16:01.568] <TB0> INFO: Expecting 41600 events.
[12:16:05.565] <TB0> INFO: 41600 events read in total (3406ms).
[12:16:05.566] <TB0> INFO: Test took 4289ms.
[12:16:05.568] <TB0> INFO: scanning low vcal = 170
[12:16:05.845] <TB0> INFO: Expecting 41600 events.
[12:16:09.821] <TB0> INFO: 41600 events read in total (3385ms).
[12:16:09.821] <TB0> INFO: Test took 4253ms.
[12:16:09.824] <TB0> INFO: scanning low vcal = 180
[12:16:10.117] <TB0> INFO: Expecting 41600 events.
[12:16:14.169] <TB0> INFO: 41600 events read in total (3460ms).
[12:16:14.170] <TB0> INFO: Test took 4346ms.
[12:16:14.173] <TB0> INFO: scanning low vcal = 190
[12:16:14.449] <TB0> INFO: Expecting 41600 events.
[12:16:18.461] <TB0> INFO: 41600 events read in total (3420ms).
[12:16:18.462] <TB0> INFO: Test took 4289ms.
[12:16:18.464] <TB0> INFO: scanning low vcal = 200
[12:16:18.741] <TB0> INFO: Expecting 41600 events.
[12:16:22.756] <TB0> INFO: 41600 events read in total (3423ms).
[12:16:22.756] <TB0> INFO: Test took 4292ms.
[12:16:22.759] <TB0> INFO: scanning low vcal = 210
[12:16:23.035] <TB0> INFO: Expecting 41600 events.
[12:16:26.994] <TB0> INFO: 41600 events read in total (3367ms).
[12:16:26.995] <TB0> INFO: Test took 4236ms.
[12:16:26.998] <TB0> INFO: scanning low vcal = 220
[12:16:27.291] <TB0> INFO: Expecting 41600 events.
[12:16:31.293] <TB0> INFO: 41600 events read in total (3410ms).
[12:16:31.293] <TB0> INFO: Test took 4295ms.
[12:16:31.296] <TB0> INFO: scanning low vcal = 230
[12:16:31.573] <TB0> INFO: Expecting 41600 events.
[12:16:35.527] <TB0> INFO: 41600 events read in total (3362ms).
[12:16:35.528] <TB0> INFO: Test took 4231ms.
[12:16:35.530] <TB0> INFO: scanning low vcal = 240
[12:16:35.807] <TB0> INFO: Expecting 41600 events.
[12:16:39.833] <TB0> INFO: 41600 events read in total (3435ms).
[12:16:39.834] <TB0> INFO: Test took 4304ms.
[12:16:39.837] <TB0> INFO: scanning low vcal = 250
[12:16:40.114] <TB0> INFO: Expecting 41600 events.
[12:16:44.070] <TB0> INFO: 41600 events read in total (3364ms).
[12:16:44.071] <TB0> INFO: Test took 4234ms.
[12:16:44.075] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[12:16:44.351] <TB0> INFO: Expecting 41600 events.
[12:16:48.351] <TB0> INFO: 41600 events read in total (3409ms).
[12:16:48.351] <TB0> INFO: Test took 4276ms.
[12:16:48.354] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[12:16:48.631] <TB0> INFO: Expecting 41600 events.
[12:16:52.628] <TB0> INFO: 41600 events read in total (3406ms).
[12:16:52.629] <TB0> INFO: Test took 4275ms.
[12:16:52.632] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[12:16:52.909] <TB0> INFO: Expecting 41600 events.
[12:16:56.868] <TB0> INFO: 41600 events read in total (3368ms).
[12:16:56.868] <TB0> INFO: Test took 4236ms.
[12:16:56.871] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[12:16:57.148] <TB0> INFO: Expecting 41600 events.
[12:17:01.096] <TB0> INFO: 41600 events read in total (3357ms).
[12:17:01.096] <TB0> INFO: Test took 4225ms.
[12:17:01.099] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:17:01.376] <TB0> INFO: Expecting 41600 events.
[12:17:05.318] <TB0> INFO: 41600 events read in total (3351ms).
[12:17:05.318] <TB0> INFO: Test took 4219ms.
[12:17:05.729] <TB0> INFO: PixTestGainPedestal::measure() done
[12:17:38.911] <TB0> INFO: PixTestGainPedestal::fit() done
[12:17:38.911] <TB0> INFO: non-linearity mean: 0.970 0.930 0.949 0.983 0.971 0.965 0.964 0.943 0.929 0.982 0.955 0.985 0.983 0.971 0.950 0.945
[12:17:38.911] <TB0> INFO: non-linearity RMS: 0.025 0.130 0.065 0.004 0.021 0.173 0.041 0.073 0.113 0.004 0.165 0.003 0.004 0.174 0.052 0.157
[12:17:38.911] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//phCalibrationFitErr35_C0.dat
[12:17:38.925] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//phCalibrationFitErr35_C1.dat
[12:17:38.939] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//phCalibrationFitErr35_C2.dat
[12:17:38.952] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//phCalibrationFitErr35_C3.dat
[12:17:38.966] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//phCalibrationFitErr35_C4.dat
[12:17:38.980] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//phCalibrationFitErr35_C5.dat
[12:17:38.993] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//phCalibrationFitErr35_C6.dat
[12:17:39.007] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//phCalibrationFitErr35_C7.dat
[12:17:39.021] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//phCalibrationFitErr35_C8.dat
[12:17:39.035] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//phCalibrationFitErr35_C9.dat
[12:17:39.049] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//phCalibrationFitErr35_C10.dat
[12:17:39.063] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//phCalibrationFitErr35_C11.dat
[12:17:39.076] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//phCalibrationFitErr35_C12.dat
[12:17:39.090] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//phCalibrationFitErr35_C13.dat
[12:17:39.103] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//phCalibrationFitErr35_C14.dat
[12:17:39.117] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1033_FullQualification_2016-11-14_10h48m_1479116883//000_Fulltest_p17//phCalibrationFitErr35_C15.dat
[12:17:39.131] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 160 seconds
[12:17:39.131] <TB0> INFO: Decoding statistics:
[12:17:39.131] <TB0> INFO: General information:
[12:17:39.131] <TB0> INFO: 16bit words read: 3302528
[12:17:39.131] <TB0> INFO: valid events total: 332800
[12:17:39.131] <TB0> INFO: empty events: 351
[12:17:39.131] <TB0> INFO: valid events with pixels: 332449
[12:17:39.131] <TB0> INFO: valid pixel hits: 652864
[12:17:39.131] <TB0> INFO: Event errors: 0
[12:17:39.131] <TB0> INFO: start marker: 0
[12:17:39.131] <TB0> INFO: stop marker: 0
[12:17:39.131] <TB0> INFO: overflow: 0
[12:17:39.131] <TB0> INFO: invalid 5bit words: 0
[12:17:39.131] <TB0> INFO: invalid XOR eye diagram: 0
[12:17:39.131] <TB0> INFO: frame (failed synchr.): 0
[12:17:39.131] <TB0> INFO: idle data (no TBM trl): 0
[12:17:39.131] <TB0> INFO: no data (only TBM hdr): 0
[12:17:39.131] <TB0> INFO: TBM errors: 0
[12:17:39.131] <TB0> INFO: flawed TBM headers: 0
[12:17:39.131] <TB0> INFO: flawed TBM trailers: 0
[12:17:39.131] <TB0> INFO: event ID mismatches: 0
[12:17:39.131] <TB0> INFO: ROC errors: 0
[12:17:39.131] <TB0> INFO: missing ROC header(s): 0
[12:17:39.131] <TB0> INFO: misplaced readback start: 0
[12:17:39.131] <TB0> INFO: Pixel decoding errors: 0
[12:17:39.131] <TB0> INFO: pixel data incomplete: 0
[12:17:39.131] <TB0> INFO: pixel address: 0
[12:17:39.131] <TB0> INFO: pulse height fill bit: 0
[12:17:39.131] <TB0> INFO: buffer corruption: 0
[12:17:39.145] <TB0> INFO: Decoding statistics:
[12:17:39.145] <TB0> INFO: General information:
[12:17:39.145] <TB0> INFO: 16bit words read: 3431926
[12:17:39.145] <TB0> INFO: valid events total: 353536
[12:17:39.145] <TB0> INFO: empty events: 18596
[12:17:39.145] <TB0> INFO: valid events with pixels: 334940
[12:17:39.145] <TB0> INFO: valid pixel hits: 655355
[12:17:39.145] <TB0> INFO: Event errors: 0
[12:17:39.145] <TB0> INFO: start marker: 0
[12:17:39.145] <TB0> INFO: stop marker: 0
[12:17:39.145] <TB0> INFO: overflow: 0
[12:17:39.145] <TB0> INFO: invalid 5bit words: 0
[12:17:39.145] <TB0> INFO: invalid XOR eye diagram: 0
[12:17:39.145] <TB0> INFO: frame (failed synchr.): 0
[12:17:39.145] <TB0> INFO: idle data (no TBM trl): 0
[12:17:39.145] <TB0> INFO: no data (only TBM hdr): 0
[12:17:39.145] <TB0> INFO: TBM errors: 0
[12:17:39.145] <TB0> INFO: flawed TBM headers: 0
[12:17:39.145] <TB0> INFO: flawed TBM trailers: 0
[12:17:39.145] <TB0> INFO: event ID mismatches: 0
[12:17:39.145] <TB0> INFO: ROC errors: 0
[12:17:39.145] <TB0> INFO: missing ROC header(s): 0
[12:17:39.145] <TB0> INFO: misplaced readback start: 0
[12:17:39.145] <TB0> INFO: Pixel decoding errors: 0
[12:17:39.145] <TB0> INFO: pixel data incomplete: 0
[12:17:39.145] <TB0> INFO: pixel address: 0
[12:17:39.145] <TB0> INFO: pulse height fill bit: 0
[12:17:39.145] <TB0> INFO: buffer corruption: 0
[12:17:39.145] <TB0> INFO: enter test to run
[12:17:39.145] <TB0> INFO: test: exit no parameter change
[12:17:39.172] <TB0> QUIET: Connection to board 73 closed.
[12:17:39.172] <TB0> INFO: pXar: this is the end, my friend