[17:41:58.680] <TB1> INFO: *** Welcome to pxar ***
[17:41:58.680] <TB1> INFO: *** Today: 2016/11/15
[17:41:58.686] <TB1> INFO: *** Version: c8ba-dirty
[17:41:58.687] <TB1> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters_C15.dat
[17:41:58.687] <TB1> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//tbmParameters_C1b.dat
[17:41:58.687] <TB1> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//defaultMaskFile.dat
[17:41:58.687] <TB1> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//trimParameters_C15.dat
[17:41:58.741] <TB1> INFO: clk: 4
[17:41:58.741] <TB1> INFO: ctr: 4
[17:41:58.741] <TB1> INFO: sda: 19
[17:41:58.741] <TB1> INFO: tin: 9
[17:41:58.741] <TB1> INFO: level: 15
[17:41:58.741] <TB1> INFO: triggerdelay: 0
[17:41:58.741] <TB1> QUIET: Instanciating API for pxar v2.1.0+875~gda35c4c
[17:41:58.741] <TB1> INFO: Log level: INFO
[17:41:58.749] <TB1> INFO: Found DTB DTB_WXBYFL
[17:41:58.759] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[17:41:58.761] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[17:41:58.763] <TB1> INFO: RPC call hashes of host and DTB match: 486171790
[17:42:00.245] <TB1> INFO: DUT info:
[17:42:00.245] <TB1> INFO: The DUT currently contains the following objects:
[17:42:00.245] <TB1> INFO: 4 TBM Cores tbm10c (4 ON)
[17:42:00.245] <TB1> INFO: TBM Core alpha (0): 7 registers set
[17:42:00.246] <TB1> INFO: TBM Core beta (1): 7 registers set
[17:42:00.246] <TB1> INFO: TBM Core alpha (2): 7 registers set
[17:42:00.246] <TB1> INFO: TBM Core beta (3): 7 registers set
[17:42:00.246] <TB1> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[17:42:00.246] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[17:42:00.246] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[17:42:00.246] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[17:42:00.246] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[17:42:00.246] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[17:42:00.246] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[17:42:00.246] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[17:42:00.246] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[17:42:00.246] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[17:42:00.246] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[17:42:00.246] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[17:42:00.246] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[17:42:00.246] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[17:42:00.246] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[17:42:00.246] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[17:42:00.246] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[17:42:00.646] <TB1> INFO: enter 'restricted' command line mode
[17:42:00.646] <TB1> INFO: enter test to run
[17:42:00.646] <TB1> INFO: test: pretest no parameter change
[17:42:00.646] <TB1> INFO: running: pretest
[17:42:01.199] <TB1> INFO: ######################################################################
[17:42:01.199] <TB1> INFO: PixTestPretest::doTest()
[17:42:01.199] <TB1> INFO: ######################################################################
[17:42:01.200] <TB1> INFO: ----------------------------------------------------------------------
[17:42:01.200] <TB1> INFO: PixTestPretest::programROC()
[17:42:01.200] <TB1> INFO: ----------------------------------------------------------------------
[17:42:19.213] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[17:42:19.213] <TB1> INFO: IA differences per ROC: 16.9 18.5 17.7 19.3 20.1 19.3 18.5 20.1 16.1 17.7 16.9 20.1 19.3 19.3 19.3 20.1
[17:42:19.245] <TB1> INFO: ----------------------------------------------------------------------
[17:42:19.245] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[17:42:19.245] <TB1> INFO: ----------------------------------------------------------------------
[17:42:40.476] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 382.7 mA = 23.9187 mA/ROC
[17:42:40.476] <TB1> INFO: i(loss) [mA/ROC]: 19.3 18.5 19.3 19.3 20.1 19.3 20.1 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 20.1
[17:42:40.503] <TB1> INFO: ----------------------------------------------------------------------
[17:42:40.503] <TB1> INFO: PixTestPretest::findTiming()
[17:42:40.503] <TB1> INFO: ----------------------------------------------------------------------
[17:42:40.503] <TB1> INFO: PixTestCmd::init()

[17:43:11.699] <TB1> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[17:43:11.699] <TB1> INFO: (success/tries = 100/100), width = 3
[17:43:13.189] <TB1> INFO: ----------------------------------------------------------------------
[17:43:13.189] <TB1> INFO: PixTestPretest::findWorkingPixel()
[17:43:13.189] <TB1> INFO: ----------------------------------------------------------------------
[17:43:13.281] <TB1> INFO: Expecting 231680 events.
[17:43:23.066] <TB1> INFO: 231680 events read in total (9193ms).
[17:43:23.073] <TB1> INFO: Test took 9882ms.
[17:43:23.314] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[17:43:23.342] <TB1> INFO: ----------------------------------------------------------------------
[17:43:23.342] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[17:43:23.342] <TB1> INFO: ----------------------------------------------------------------------
[17:43:23.434] <TB1> INFO: Expecting 231680 events.
[17:43:33.282] <TB1> INFO: 231680 events read in total (9257ms).
[17:43:33.292] <TB1> INFO: Test took 9947ms.
[17:43:33.545] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[17:43:33.545] <TB1> INFO: CalDel: 92 83 111 82 96 94 80 100 107 111 131 111 112 107 120 92
[17:43:33.545] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 53
[17:43:33.548] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters_C0.dat
[17:43:33.548] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters_C1.dat
[17:43:33.548] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters_C2.dat
[17:43:33.548] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters_C3.dat
[17:43:33.548] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters_C4.dat
[17:43:33.548] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters_C5.dat
[17:43:33.548] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters_C6.dat
[17:43:33.548] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters_C7.dat
[17:43:33.549] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters_C8.dat
[17:43:33.549] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters_C9.dat
[17:43:33.549] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters_C10.dat
[17:43:33.549] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters_C11.dat
[17:43:33.549] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters_C12.dat
[17:43:33.549] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters_C13.dat
[17:43:33.549] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters_C14.dat
[17:43:33.549] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters_C15.dat
[17:43:33.549] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//tbmParameters_C0a.dat
[17:43:33.549] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//tbmParameters_C0b.dat
[17:43:33.549] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//tbmParameters_C1a.dat
[17:43:33.549] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//tbmParameters_C1b.dat
[17:43:33.549] <TB1> INFO: PixTestPretest::doTest() done, duration: 92 seconds
[17:43:33.643] <TB1> INFO: enter test to run
[17:43:33.643] <TB1> INFO: test: FullTest no parameter change
[17:43:33.643] <TB1> INFO: running: fulltest
[17:43:33.643] <TB1> INFO: ######################################################################
[17:43:33.643] <TB1> INFO: PixTestFullTest::doTest()
[17:43:33.643] <TB1> INFO: ######################################################################
[17:43:33.644] <TB1> INFO: ######################################################################
[17:43:33.644] <TB1> INFO: PixTestAlive::doTest()
[17:43:33.644] <TB1> INFO: ######################################################################
[17:43:33.646] <TB1> INFO: ----------------------------------------------------------------------
[17:43:33.646] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:43:33.646] <TB1> INFO: ----------------------------------------------------------------------
[17:43:33.879] <TB1> INFO: Expecting 41600 events.
[17:43:37.354] <TB1> INFO: 41600 events read in total (2883ms).
[17:43:37.355] <TB1> INFO: Test took 3708ms.
[17:43:37.581] <TB1> INFO: PixTestAlive::aliveTest() done
[17:43:37.581] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
[17:43:37.582] <TB1> INFO: ----------------------------------------------------------------------
[17:43:37.582] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:43:37.582] <TB1> INFO: ----------------------------------------------------------------------
[17:43:37.818] <TB1> INFO: Expecting 41600 events.
[17:43:40.767] <TB1> INFO: 41600 events read in total (2357ms).
[17:43:40.767] <TB1> INFO: Test took 3183ms.
[17:43:40.767] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[17:43:41.005] <TB1> INFO: PixTestAlive::maskTest() done
[17:43:41.005] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[17:43:41.006] <TB1> INFO: ----------------------------------------------------------------------
[17:43:41.006] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:43:41.006] <TB1> INFO: ----------------------------------------------------------------------
[17:43:41.245] <TB1> INFO: Expecting 41600 events.
[17:43:44.866] <TB1> INFO: 41600 events read in total (3029ms).
[17:43:44.866] <TB1> INFO: Test took 3858ms.
[17:43:45.092] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[17:43:45.092] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[17:43:45.092] <TB1> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[17:43:45.092] <TB1> INFO: Decoding statistics:
[17:43:45.092] <TB1> INFO: General information:
[17:43:45.092] <TB1> INFO: 16bit words read: 0
[17:43:45.092] <TB1> INFO: valid events total: 0
[17:43:45.092] <TB1> INFO: empty events: 0
[17:43:45.092] <TB1> INFO: valid events with pixels: 0
[17:43:45.092] <TB1> INFO: valid pixel hits: 0
[17:43:45.092] <TB1> INFO: Event errors: 0
[17:43:45.092] <TB1> INFO: start marker: 0
[17:43:45.092] <TB1> INFO: stop marker: 0
[17:43:45.092] <TB1> INFO: overflow: 0
[17:43:45.092] <TB1> INFO: invalid 5bit words: 0
[17:43:45.092] <TB1> INFO: invalid XOR eye diagram: 0
[17:43:45.092] <TB1> INFO: frame (failed synchr.): 0
[17:43:45.092] <TB1> INFO: idle data (no TBM trl): 0
[17:43:45.092] <TB1> INFO: no data (only TBM hdr): 0
[17:43:45.092] <TB1> INFO: TBM errors: 0
[17:43:45.092] <TB1> INFO: flawed TBM headers: 0
[17:43:45.092] <TB1> INFO: flawed TBM trailers: 0
[17:43:45.092] <TB1> INFO: event ID mismatches: 0
[17:43:45.092] <TB1> INFO: ROC errors: 0
[17:43:45.092] <TB1> INFO: missing ROC header(s): 0
[17:43:45.092] <TB1> INFO: misplaced readback start: 0
[17:43:45.092] <TB1> INFO: Pixel decoding errors: 0
[17:43:45.092] <TB1> INFO: pixel data incomplete: 0
[17:43:45.093] <TB1> INFO: pixel address: 0
[17:43:45.093] <TB1> INFO: pulse height fill bit: 0
[17:43:45.093] <TB1> INFO: buffer corruption: 0
[17:43:45.100] <TB1> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C15.dat
[17:43:45.100] <TB1> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//phCalibrationFitErr_C15.dat

[17:43:45.100] <TB1> INFO: ######################################################################
[17:43:45.100] <TB1> INFO: PixTestReadback::doTest()
[17:43:45.100] <TB1> INFO: ######################################################################
[17:43:45.100] <TB1> INFO: ----------------------------------------------------------------------
[17:43:45.100] <TB1> INFO: PixTestReadback::CalibrateVd()
[17:43:45.100] <TB1> INFO: ----------------------------------------------------------------------
[17:43:55.059] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C0.dat
[17:43:55.059] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C1.dat
[17:43:55.059] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C2.dat
[17:43:55.060] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C3.dat
[17:43:55.060] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C4.dat
[17:43:55.060] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C5.dat
[17:43:55.060] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C6.dat
[17:43:55.060] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C7.dat
[17:43:55.060] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C8.dat
[17:43:55.060] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C9.dat
[17:43:55.060] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C10.dat
[17:43:55.060] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C11.dat
[17:43:55.060] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C12.dat
[17:43:55.060] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C13.dat
[17:43:55.060] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C14.dat
[17:43:55.060] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C15.dat
[17:43:55.088] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[17:43:55.088] <TB1> INFO: ----------------------------------------------------------------------
[17:43:55.088] <TB1> INFO: PixTestReadback::CalibrateVa()
[17:43:55.088] <TB1> INFO: ----------------------------------------------------------------------
[17:44:04.976] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C0.dat
[17:44:04.976] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C1.dat
[17:44:04.976] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C2.dat
[17:44:04.976] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C3.dat
[17:44:04.976] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C4.dat
[17:44:04.976] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C5.dat
[17:44:04.976] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C6.dat
[17:44:04.976] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C7.dat
[17:44:04.976] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C8.dat
[17:44:04.976] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C9.dat
[17:44:04.976] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C10.dat
[17:44:04.977] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C11.dat
[17:44:04.977] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C12.dat
[17:44:04.977] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C13.dat
[17:44:04.977] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C14.dat
[17:44:04.977] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C15.dat
[17:44:05.005] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[17:44:05.005] <TB1> INFO: ----------------------------------------------------------------------
[17:44:05.005] <TB1> INFO: PixTestReadback::readbackVbg()
[17:44:05.005] <TB1> INFO: ----------------------------------------------------------------------
[17:44:12.643] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[17:44:12.643] <TB1> INFO: ----------------------------------------------------------------------
[17:44:12.644] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[17:44:12.644] <TB1> INFO: ----------------------------------------------------------------------
[17:44:12.644] <TB1> INFO: Vbg will be calibrated using Vd calibration
[17:44:12.644] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 152.4calibrated Vbg = 1.1472 :::*/*/*/*/
[17:44:12.644] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 148.3calibrated Vbg = 1.14681 :::*/*/*/*/
[17:44:12.644] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 143.7calibrated Vbg = 1.14615 :::*/*/*/*/
[17:44:12.644] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 160.5calibrated Vbg = 1.13384 :::*/*/*/*/
[17:44:12.644] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 163.5calibrated Vbg = 1.14188 :::*/*/*/*/
[17:44:12.644] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 148.3calibrated Vbg = 1.14351 :::*/*/*/*/
[17:44:12.644] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 143.8calibrated Vbg = 1.14912 :::*/*/*/*/
[17:44:12.644] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 148.1calibrated Vbg = 1.14828 :::*/*/*/*/
[17:44:12.644] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 155.1calibrated Vbg = 1.14555 :::*/*/*/*/
[17:44:12.644] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 153.9calibrated Vbg = 1.13736 :::*/*/*/*/
[17:44:12.644] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 159.1calibrated Vbg = 1.13338 :::*/*/*/*/
[17:44:12.644] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 150calibrated Vbg = 1.13 :::*/*/*/*/
[17:44:12.644] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 161.9calibrated Vbg = 1.13552 :::*/*/*/*/
[17:44:12.644] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 149.3calibrated Vbg = 1.14405 :::*/*/*/*/
[17:44:12.644] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 166.5calibrated Vbg = 1.15012 :::*/*/*/*/
[17:44:12.644] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 159.2calibrated Vbg = 1.141 :::*/*/*/*/
[17:44:12.646] <TB1> INFO: ----------------------------------------------------------------------
[17:44:12.646] <TB1> INFO: PixTestReadback::CalibrateIa()
[17:44:12.646] <TB1> INFO: ----------------------------------------------------------------------
[17:46:52.896] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C0.dat
[17:46:52.896] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C1.dat
[17:46:52.896] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C2.dat
[17:46:52.897] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C3.dat
[17:46:52.897] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C4.dat
[17:46:52.897] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C5.dat
[17:46:52.897] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C6.dat
[17:46:52.897] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C7.dat
[17:46:52.897] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C8.dat
[17:46:52.897] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C9.dat
[17:46:52.897] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C10.dat
[17:46:52.897] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C11.dat
[17:46:52.897] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C12.dat
[17:46:52.897] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C13.dat
[17:46:52.897] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C14.dat
[17:46:52.898] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//readbackCal_C15.dat
[17:46:52.924] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[17:46:52.925] <TB1> INFO: PixTestReadback::doTest() done
[17:46:52.925] <TB1> INFO: Decoding statistics:
[17:46:52.925] <TB1> INFO: General information:
[17:46:52.925] <TB1> INFO: 16bit words read: 1536
[17:46:52.925] <TB1> INFO: valid events total: 256
[17:46:52.925] <TB1> INFO: empty events: 256
[17:46:52.925] <TB1> INFO: valid events with pixels: 0
[17:46:52.925] <TB1> INFO: valid pixel hits: 0
[17:46:52.925] <TB1> INFO: Event errors: 0
[17:46:52.925] <TB1> INFO: start marker: 0
[17:46:52.925] <TB1> INFO: stop marker: 0
[17:46:52.925] <TB1> INFO: overflow: 0
[17:46:52.925] <TB1> INFO: invalid 5bit words: 0
[17:46:52.925] <TB1> INFO: invalid XOR eye diagram: 0
[17:46:52.925] <TB1> INFO: frame (failed synchr.): 0
[17:46:52.925] <TB1> INFO: idle data (no TBM trl): 0
[17:46:52.925] <TB1> INFO: no data (only TBM hdr): 0
[17:46:52.925] <TB1> INFO: TBM errors: 0
[17:46:52.925] <TB1> INFO: flawed TBM headers: 0
[17:46:52.925] <TB1> INFO: flawed TBM trailers: 0
[17:46:52.925] <TB1> INFO: event ID mismatches: 0
[17:46:52.925] <TB1> INFO: ROC errors: 0
[17:46:52.925] <TB1> INFO: missing ROC header(s): 0
[17:46:52.925] <TB1> INFO: misplaced readback start: 0
[17:46:52.925] <TB1> INFO: Pixel decoding errors: 0
[17:46:52.925] <TB1> INFO: pixel data incomplete: 0
[17:46:52.925] <TB1> INFO: pixel address: 0
[17:46:52.925] <TB1> INFO: pulse height fill bit: 0
[17:46:52.925] <TB1> INFO: buffer corruption: 0
[17:46:52.958] <TB1> INFO: ######################################################################
[17:46:52.958] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[17:46:52.958] <TB1> INFO: ######################################################################
[17:46:52.961] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[17:46:52.977] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:46:52.977] <TB1> INFO: run 1 of 1
[17:46:53.285] <TB1> INFO: Expecting 3120000 events.
[17:47:24.634] <TB1> INFO: 658205 events read in total (30757ms).











[17:47:54.604] <TB1> INFO: 1314500 events read in total (60727ms).











[17:48:25.447] <TB1> INFO: 1968450 events read in total (91570ms).











[17:48:56.912] <TB1> INFO: 2623420 events read in total (123035ms).











[17:49:20.507] <TB1> INFO: 3120000 events read in total (146630ms).
[17:49:20.558] <TB1> INFO: Test took 147582ms.
[17:49:41.171] <TB1> INFO: PixTestBBMap::doTest() done with 4 decoding errors: , duration: 168 seconds
[17:49:41.171] <TB1> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 1 1 1 0 0 2 0 0 0
[17:49:41.171] <TB1> INFO: separation cut (per ROC): 108 104 104 107 107 106 109 106 102 109 91 111 100 102 106 109
[17:49:41.172] <TB1> INFO: Decoding statistics:
[17:49:41.172] <TB1> INFO: General information:
[17:49:41.172] <TB1> INFO: 16bit words read: 0
[17:49:41.172] <TB1> INFO: valid events total: 0
[17:49:41.172] <TB1> INFO: empty events: 0
[17:49:41.172] <TB1> INFO: valid events with pixels: 0
[17:49:41.172] <TB1> INFO: valid pixel hits: 0
[17:49:41.172] <TB1> INFO: Event errors: 0
[17:49:41.172] <TB1> INFO: start marker: 0
[17:49:41.172] <TB1> INFO: stop marker: 0
[17:49:41.172] <TB1> INFO: overflow: 0
[17:49:41.172] <TB1> INFO: invalid 5bit words: 0
[17:49:41.172] <TB1> INFO: invalid XOR eye diagram: 0
[17:49:41.172] <TB1> INFO: frame (failed synchr.): 0
[17:49:41.172] <TB1> INFO: idle data (no TBM trl): 0
[17:49:41.172] <TB1> INFO: no data (only TBM hdr): 0
[17:49:41.172] <TB1> INFO: TBM errors: 0
[17:49:41.172] <TB1> INFO: flawed TBM headers: 0
[17:49:41.172] <TB1> INFO: flawed TBM trailers: 0
[17:49:41.172] <TB1> INFO: event ID mismatches: 0
[17:49:41.172] <TB1> INFO: ROC errors: 0
[17:49:41.172] <TB1> INFO: missing ROC header(s): 0
[17:49:41.172] <TB1> INFO: misplaced readback start: 0
[17:49:41.172] <TB1> INFO: Pixel decoding errors: 0
[17:49:41.172] <TB1> INFO: pixel data incomplete: 0
[17:49:41.172] <TB1> INFO: pixel address: 0
[17:49:41.172] <TB1> INFO: pulse height fill bit: 0
[17:49:41.172] <TB1> INFO: buffer corruption: 0
[17:49:41.207] <TB1> INFO: ######################################################################
[17:49:41.207] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[17:49:41.207] <TB1> INFO: ######################################################################
[17:49:41.207] <TB1> INFO: ----------------------------------------------------------------------
[17:49:41.208] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[17:49:41.208] <TB1> INFO: ----------------------------------------------------------------------
[17:49:41.208] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[17:49:41.219] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[17:49:41.219] <TB1> INFO: run 1 of 1
[17:49:41.451] <TB1> INFO: Expecting 36608000 events.
[17:50:05.709] <TB1> INFO: 691200 events read in total (23666ms).
[17:50:29.180] <TB1> INFO: 1361450 events read in total (47137ms).
[17:50:52.933] <TB1> INFO: 2034050 events read in total (70890ms).
[17:51:16.958] <TB1> INFO: 2702750 events read in total (94915ms).
[17:51:40.627] <TB1> INFO: 3374750 events read in total (118584ms).
[17:52:04.220] <TB1> INFO: 4043750 events read in total (142177ms).
[17:52:27.867] <TB1> INFO: 4714550 events read in total (165824ms).
[17:52:51.728] <TB1> INFO: 5384100 events read in total (189685ms).
[17:53:17.079] <TB1> INFO: 6053050 events read in total (215036ms).
[17:53:41.148] <TB1> INFO: 6722150 events read in total (239105ms).
[17:54:05.083] <TB1> INFO: 7391200 events read in total (263040ms).
[17:54:28.975] <TB1> INFO: 8060100 events read in total (286932ms).
[17:54:52.747] <TB1> INFO: 8728450 events read in total (310704ms).
[17:55:16.477] <TB1> INFO: 9397650 events read in total (334434ms).
[17:55:40.517] <TB1> INFO: 10065000 events read in total (358474ms).
[17:56:04.310] <TB1> INFO: 10734600 events read in total (382267ms).
[17:56:28.332] <TB1> INFO: 11401850 events read in total (406289ms).
[17:56:52.746] <TB1> INFO: 12067850 events read in total (430703ms).
[17:57:15.985] <TB1> INFO: 12730450 events read in total (453942ms).
[17:57:39.243] <TB1> INFO: 13398350 events read in total (477200ms).
[17:58:03.563] <TB1> INFO: 14061800 events read in total (501520ms).
[17:58:27.237] <TB1> INFO: 14730700 events read in total (525194ms).
[17:58:50.472] <TB1> INFO: 15396600 events read in total (548429ms).
[17:59:14.628] <TB1> INFO: 16063050 events read in total (572585ms).
[17:59:38.569] <TB1> INFO: 16727850 events read in total (596526ms).
[18:00:02.476] <TB1> INFO: 17392950 events read in total (620433ms).
[18:00:25.723] <TB1> INFO: 18057300 events read in total (643680ms).
[18:00:49.651] <TB1> INFO: 18722450 events read in total (667608ms).
[18:01:13.325] <TB1> INFO: 19385650 events read in total (691282ms).
[18:01:37.057] <TB1> INFO: 20048150 events read in total (715014ms).
[18:02:00.248] <TB1> INFO: 20712400 events read in total (738205ms).
[18:02:24.302] <TB1> INFO: 21374200 events read in total (762259ms).
[18:02:48.422] <TB1> INFO: 22036400 events read in total (786379ms).
[18:03:12.368] <TB1> INFO: 22697100 events read in total (810325ms).
[18:03:36.067] <TB1> INFO: 23361150 events read in total (834024ms).
[18:03:59.894] <TB1> INFO: 24021300 events read in total (857851ms).
[18:04:23.291] <TB1> INFO: 24682750 events read in total (881248ms).
[18:04:46.962] <TB1> INFO: 25343750 events read in total (904919ms).
[18:05:10.686] <TB1> INFO: 26005200 events read in total (928643ms).
[18:05:33.883] <TB1> INFO: 26664500 events read in total (951840ms).
[18:05:57.996] <TB1> INFO: 27326100 events read in total (975953ms).
[18:06:21.708] <TB1> INFO: 27985850 events read in total (999665ms).
[18:06:44.774] <TB1> INFO: 28646100 events read in total (1022731ms).
[18:07:08.485] <TB1> INFO: 29306400 events read in total (1046442ms).
[18:07:32.158] <TB1> INFO: 29965400 events read in total (1070115ms).
[18:07:54.674] <TB1> INFO: 30624600 events read in total (1092631ms).
[18:08:18.167] <TB1> INFO: 31286100 events read in total (1116124ms).
[18:08:42.200] <TB1> INFO: 31949150 events read in total (1140157ms).
[18:09:06.025] <TB1> INFO: 32609750 events read in total (1163982ms).
[18:09:28.932] <TB1> INFO: 33271300 events read in total (1186889ms).
[18:09:53.399] <TB1> INFO: 33932200 events read in total (1211356ms).
[18:10:16.861] <TB1> INFO: 34596500 events read in total (1234818ms).
[18:10:40.861] <TB1> INFO: 35255300 events read in total (1258818ms).
[18:11:05.113] <TB1> INFO: 35920750 events read in total (1283070ms).
[18:11:29.650] <TB1> INFO: 36593850 events read in total (1307607ms).
[18:11:30.512] <TB1> INFO: 36608000 events read in total (1308469ms).
[18:11:30.563] <TB1> INFO: Test took 1309345ms.
[18:11:30.921] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:11:32.444] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:11:33.926] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:11:35.408] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:11:36.878] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:11:38.318] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:11:39.794] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:11:41.280] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:11:42.755] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:11:44.223] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:11:45.674] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:11:47.150] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:11:48.637] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:11:50.253] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:11:51.714] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:11:53.154] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:11:54.661] <TB1> INFO: PixTestScurves::scurves() done
[18:11:54.661] <TB1> INFO: Vcal mean: 112.30 113.04 119.51 122.55 117.77 111.52 116.15 118.23 117.75 121.33 115.01 115.32 116.34 116.47 120.09 125.74
[18:11:54.661] <TB1> INFO: Vcal RMS: 5.19 5.62 6.22 6.53 5.40 4.65 5.88 6.36 6.36 6.85 6.29 5.49 5.36 5.37 6.33 6.07
[18:11:54.661] <TB1> INFO: PixTestScurves::fullTest() done, duration: 1333 seconds
[18:11:54.661] <TB1> INFO: Decoding statistics:
[18:11:54.661] <TB1> INFO: General information:
[18:11:54.661] <TB1> INFO: 16bit words read: 0
[18:11:54.661] <TB1> INFO: valid events total: 0
[18:11:54.661] <TB1> INFO: empty events: 0
[18:11:54.661] <TB1> INFO: valid events with pixels: 0
[18:11:54.661] <TB1> INFO: valid pixel hits: 0
[18:11:54.661] <TB1> INFO: Event errors: 0
[18:11:54.661] <TB1> INFO: start marker: 0
[18:11:54.661] <TB1> INFO: stop marker: 0
[18:11:54.661] <TB1> INFO: overflow: 0
[18:11:54.661] <TB1> INFO: invalid 5bit words: 0
[18:11:54.661] <TB1> INFO: invalid XOR eye diagram: 0
[18:11:54.661] <TB1> INFO: frame (failed synchr.): 0
[18:11:54.661] <TB1> INFO: idle data (no TBM trl): 0
[18:11:54.661] <TB1> INFO: no data (only TBM hdr): 0
[18:11:54.661] <TB1> INFO: TBM errors: 0
[18:11:54.661] <TB1> INFO: flawed TBM headers: 0
[18:11:54.661] <TB1> INFO: flawed TBM trailers: 0
[18:11:54.661] <TB1> INFO: event ID mismatches: 0
[18:11:54.661] <TB1> INFO: ROC errors: 0
[18:11:54.661] <TB1> INFO: missing ROC header(s): 0
[18:11:54.661] <TB1> INFO: misplaced readback start: 0
[18:11:54.661] <TB1> INFO: Pixel decoding errors: 0
[18:11:54.661] <TB1> INFO: pixel data incomplete: 0
[18:11:54.661] <TB1> INFO: pixel address: 0
[18:11:54.661] <TB1> INFO: pulse height fill bit: 0
[18:11:54.661] <TB1> INFO: buffer corruption: 0
[18:11:54.724] <TB1> INFO: ######################################################################
[18:11:54.724] <TB1> INFO: PixTestTrim::doTest()
[18:11:54.724] <TB1> INFO: ######################################################################
[18:11:54.725] <TB1> INFO: ----------------------------------------------------------------------
[18:11:54.725] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[18:11:54.725] <TB1> INFO: ----------------------------------------------------------------------
[18:11:54.765] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[18:11:54.765] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[18:11:54.775] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:11:54.775] <TB1> INFO: run 1 of 1
[18:11:55.009] <TB1> INFO: Expecting 5025280 events.
[18:12:26.240] <TB1> INFO: 827856 events read in total (30639ms).
[18:12:56.884] <TB1> INFO: 1652216 events read in total (61283ms).
[18:13:28.405] <TB1> INFO: 2473304 events read in total (92804ms).
[18:13:59.394] <TB1> INFO: 3290528 events read in total (123793ms).
[18:14:30.767] <TB1> INFO: 4104048 events read in total (155167ms).
[18:15:01.958] <TB1> INFO: 4917600 events read in total (186357ms).
[18:15:06.154] <TB1> INFO: 5025280 events read in total (190553ms).
[18:15:06.209] <TB1> INFO: Test took 191434ms.
[18:15:21.779] <TB1> INFO: ROC 0 VthrComp = 123
[18:15:21.779] <TB1> INFO: ROC 1 VthrComp = 116
[18:15:21.779] <TB1> INFO: ROC 2 VthrComp = 118
[18:15:21.779] <TB1> INFO: ROC 3 VthrComp = 127
[18:15:21.780] <TB1> INFO: ROC 4 VthrComp = 130
[18:15:21.780] <TB1> INFO: ROC 5 VthrComp = 126
[18:15:21.780] <TB1> INFO: ROC 6 VthrComp = 130
[18:15:21.781] <TB1> INFO: ROC 7 VthrComp = 125
[18:15:21.782] <TB1> INFO: ROC 8 VthrComp = 118
[18:15:21.782] <TB1> INFO: ROC 9 VthrComp = 124
[18:15:21.782] <TB1> INFO: ROC 10 VthrComp = 106
[18:15:21.782] <TB1> INFO: ROC 11 VthrComp = 123
[18:15:21.782] <TB1> INFO: ROC 12 VthrComp = 116
[18:15:21.782] <TB1> INFO: ROC 13 VthrComp = 123
[18:15:21.782] <TB1> INFO: ROC 14 VthrComp = 116
[18:15:21.782] <TB1> INFO: ROC 15 VthrComp = 130
[18:15:22.019] <TB1> INFO: Expecting 41600 events.
[18:15:25.800] <TB1> INFO: 41600 events read in total (3189ms).
[18:15:25.800] <TB1> INFO: Test took 4016ms.
[18:15:25.813] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[18:15:25.813] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[18:15:25.826] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:15:25.826] <TB1> INFO: run 1 of 1
[18:15:26.138] <TB1> INFO: Expecting 5025280 events.
[18:15:53.340] <TB1> INFO: 588064 events read in total (26610ms).
[18:16:20.444] <TB1> INFO: 1175400 events read in total (53714ms).
[18:16:46.974] <TB1> INFO: 1763080 events read in total (80244ms).
[18:17:13.503] <TB1> INFO: 2350632 events read in total (106773ms).
[18:17:39.811] <TB1> INFO: 2936960 events read in total (133081ms).
[18:18:06.485] <TB1> INFO: 3522152 events read in total (159755ms).
[18:18:33.054] <TB1> INFO: 4107104 events read in total (186324ms).
[18:18:59.696] <TB1> INFO: 4691896 events read in total (212966ms).
[18:19:15.307] <TB1> INFO: 5025280 events read in total (228577ms).
[18:19:15.367] <TB1> INFO: Test took 229542ms.
[18:19:36.660] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 59.4868 for pixel 4/72 mean/min/max = 45.2792/30.7652/59.7933
[18:19:36.661] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 60.5915 for pixel 11/5 mean/min/max = 46.214/31.5553/60.8726
[18:19:36.661] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 65.8636 for pixel 4/9 mean/min/max = 47.9299/29.7481/66.1118
[18:19:36.662] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 60.3776 for pixel 6/5 mean/min/max = 45.2383/30.0441/60.4325
[18:19:36.662] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 58.9258 for pixel 16/71 mean/min/max = 45.6865/32.3202/59.0527
[18:19:36.663] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 57.2362 for pixel 10/7 mean/min/max = 43.9676/30.6853/57.25
[18:19:36.663] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 58.3619 for pixel 51/74 mean/min/max = 45.6023/32.6481/58.5564
[18:19:36.663] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 59.5773 for pixel 18/22 mean/min/max = 45.4256/30.9939/59.8572
[18:19:36.664] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 66.5272 for pixel 34/0 mean/min/max = 48.3353/29.5902/67.0804
[18:19:36.664] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 66.0143 for pixel 12/3 mean/min/max = 47.8878/29.5103/66.2653
[18:19:36.665] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 70.079 for pixel 0/18 mean/min/max = 51.8319/33.3378/70.326
[18:19:36.665] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 59.3033 for pixel 14/79 mean/min/max = 45.0643/30.5722/59.5564
[18:19:36.665] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 62.5851 for pixel 4/4 mean/min/max = 47.3091/32.025/62.5933
[18:19:36.666] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 59.63 for pixel 18/4 mean/min/max = 45.4507/31.195/59.7064
[18:19:36.666] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 68.7445 for pixel 22/10 mean/min/max = 49.243/29.6461/68.84
[18:19:36.666] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 66.7211 for pixel 12/12 mean/min/max = 51.8183/36.6834/66.9532
[18:19:36.667] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:19:36.755] <TB1> INFO: Expecting 411648 events.
[18:19:46.518] <TB1> INFO: 411648 events read in total (9171ms).
[18:19:46.527] <TB1> INFO: Expecting 411648 events.
[18:19:55.999] <TB1> INFO: 411648 events read in total (9069ms).
[18:19:56.013] <TB1> INFO: Expecting 411648 events.
[18:20:05.465] <TB1> INFO: 411648 events read in total (9049ms).
[18:20:05.477] <TB1> INFO: Expecting 411648 events.
[18:20:14.770] <TB1> INFO: 411648 events read in total (8890ms).
[18:20:14.784] <TB1> INFO: Expecting 411648 events.
[18:20:24.243] <TB1> INFO: 411648 events read in total (9056ms).
[18:20:24.260] <TB1> INFO: Expecting 411648 events.
[18:20:33.654] <TB1> INFO: 411648 events read in total (8992ms).
[18:20:33.673] <TB1> INFO: Expecting 411648 events.
[18:20:43.094] <TB1> INFO: 411648 events read in total (9018ms).
[18:20:43.116] <TB1> INFO: Expecting 411648 events.
[18:20:52.469] <TB1> INFO: 411648 events read in total (8950ms).
[18:20:52.494] <TB1> INFO: Expecting 411648 events.
[18:21:01.945] <TB1> INFO: 411648 events read in total (9048ms).
[18:21:01.972] <TB1> INFO: Expecting 411648 events.
[18:21:11.449] <TB1> INFO: 411648 events read in total (9074ms).
[18:21:11.479] <TB1> INFO: Expecting 411648 events.
[18:21:20.001] <TB1> INFO: 411648 events read in total (9119ms).
[18:21:21.050] <TB1> INFO: Expecting 411648 events.
[18:21:30.360] <TB1> INFO: 411648 events read in total (8907ms).
[18:21:30.394] <TB1> INFO: Expecting 411648 events.
[18:21:39.706] <TB1> INFO: 411648 events read in total (8909ms).
[18:21:39.743] <TB1> INFO: Expecting 411648 events.
[18:21:49.118] <TB1> INFO: 411648 events read in total (8972ms).
[18:21:49.159] <TB1> INFO: Expecting 411648 events.
[18:21:58.596] <TB1> INFO: 411648 events read in total (9034ms).
[18:21:58.637] <TB1> INFO: Expecting 411648 events.
[18:22:08.159] <TB1> INFO: 411648 events read in total (9119ms).
[18:22:08.205] <TB1> INFO: Test took 151538ms.
[18:22:08.910] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[18:22:08.922] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:22:08.922] <TB1> INFO: run 1 of 1
[18:22:09.155] <TB1> INFO: Expecting 5025280 events.
[18:22:36.232] <TB1> INFO: 586072 events read in total (26485ms).
[18:23:02.639] <TB1> INFO: 1170992 events read in total (52892ms).
[18:23:29.096] <TB1> INFO: 1755232 events read in total (79349ms).
[18:23:55.581] <TB1> INFO: 2339008 events read in total (105834ms).
[18:24:21.789] <TB1> INFO: 2924616 events read in total (132042ms).
[18:24:47.879] <TB1> INFO: 3507656 events read in total (158132ms).
[18:25:14.276] <TB1> INFO: 4091000 events read in total (184529ms).
[18:25:40.676] <TB1> INFO: 4672408 events read in total (210930ms).
[18:25:56.645] <TB1> INFO: 5025280 events read in total (226898ms).
[18:25:56.728] <TB1> INFO: Test took 227806ms.
[18:26:15.023] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.860342 .. 147.168488
[18:26:15.335] <TB1> INFO: Expecting 208000 events.
[18:26:25.601] <TB1> INFO: 208000 events read in total (9674ms).
[18:26:25.602] <TB1> INFO: Test took 10577ms.
[18:26:25.668] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 157 (-1/-1) hits flags = 528 (plus default)
[18:26:25.678] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:26:25.678] <TB1> INFO: run 1 of 1
[18:26:25.914] <TB1> INFO: Expecting 5258240 events.
[18:26:53.727] <TB1> INFO: 584904 events read in total (27222ms).
[18:27:20.294] <TB1> INFO: 1169728 events read in total (53789ms).
[18:27:46.757] <TB1> INFO: 1753912 events read in total (80252ms).
[18:28:13.574] <TB1> INFO: 2339000 events read in total (107069ms).
[18:28:40.120] <TB1> INFO: 2923144 events read in total (133615ms).
[18:29:08.014] <TB1> INFO: 3506520 events read in total (161509ms).
[18:29:35.322] <TB1> INFO: 4090040 events read in total (188817ms).
[18:30:02.234] <TB1> INFO: 4672848 events read in total (215729ms).
[18:30:28.927] <TB1> INFO: 5256816 events read in total (242422ms).
[18:30:29.404] <TB1> INFO: 5258240 events read in total (242899ms).
[18:30:29.469] <TB1> INFO: Test took 243790ms.
[18:30:51.206] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 26.091460 .. 44.846916
[18:30:51.440] <TB1> INFO: Expecting 208000 events.
[18:31:01.532] <TB1> INFO: 208000 events read in total (9501ms).
[18:31:01.532] <TB1> INFO: Test took 10324ms.
[18:31:01.579] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 54 (-1/-1) hits flags = 528 (plus default)
[18:31:01.588] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:31:01.588] <TB1> INFO: run 1 of 1
[18:31:01.820] <TB1> INFO: Expecting 1297920 events.
[18:31:31.940] <TB1> INFO: 666648 events read in total (29528ms).
[18:31:59.761] <TB1> INFO: 1297920 events read in total (57349ms).
[18:31:59.799] <TB1> INFO: Test took 58212ms.
[18:32:11.122] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 22.165802 .. 47.229207
[18:32:11.356] <TB1> INFO: Expecting 208000 events.
[18:32:21.530] <TB1> INFO: 208000 events read in total (9583ms).
[18:32:21.531] <TB1> INFO: Test took 10407ms.
[18:32:21.577] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 12 .. 57 (-1/-1) hits flags = 528 (plus default)
[18:32:21.587] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:32:21.587] <TB1> INFO: run 1 of 1
[18:32:21.819] <TB1> INFO: Expecting 1530880 events.
[18:32:51.491] <TB1> INFO: 670752 events read in total (29080ms).
[18:33:19.709] <TB1> INFO: 1340640 events read in total (57298ms).
[18:33:28.187] <TB1> INFO: 1530880 events read in total (65776ms).
[18:33:28.211] <TB1> INFO: Test took 66624ms.
[18:33:39.583] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 22.387470 .. 44.024517
[18:33:39.893] <TB1> INFO: Expecting 208000 events.
[18:33:50.297] <TB1> INFO: 208000 events read in total (9812ms).
[18:33:50.298] <TB1> INFO: Test took 10713ms.
[18:33:50.382] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 12 .. 54 (-1/-1) hits flags = 528 (plus default)
[18:33:50.395] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:33:50.395] <TB1> INFO: run 1 of 1
[18:33:50.704] <TB1> INFO: Expecting 1431040 events.
[18:34:21.087] <TB1> INFO: 683144 events read in total (29791ms).
[18:34:51.092] <TB1> INFO: 1366656 events read in total (59796ms).
[18:34:54.268] <TB1> INFO: 1431040 events read in total (62973ms).
[18:34:54.301] <TB1> INFO: Test took 63906ms.
[18:35:04.936] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[18:35:04.936] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[18:35:04.946] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:35:04.946] <TB1> INFO: run 1 of 1
[18:35:05.178] <TB1> INFO: Expecting 1364480 events.
[18:35:34.059] <TB1> INFO: 667456 events read in total (28290ms).
[18:36:02.887] <TB1> INFO: 1334000 events read in total (57119ms).
[18:36:04.701] <TB1> INFO: 1364480 events read in total (58933ms).
[18:36:04.723] <TB1> INFO: Test took 59776ms.
[18:36:17.248] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C0.dat
[18:36:17.248] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C1.dat
[18:36:17.248] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C2.dat
[18:36:17.249] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C3.dat
[18:36:17.249] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C4.dat
[18:36:17.249] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C5.dat
[18:36:17.249] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C6.dat
[18:36:17.249] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C7.dat
[18:36:17.249] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C8.dat
[18:36:17.249] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C9.dat
[18:36:17.249] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C10.dat
[18:36:17.249] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C11.dat
[18:36:17.249] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C12.dat
[18:36:17.249] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C13.dat
[18:36:17.250] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C14.dat
[18:36:17.250] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C15.dat
[18:36:17.250] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//trimParameters35_C0.dat
[18:36:17.258] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//trimParameters35_C1.dat
[18:36:17.267] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//trimParameters35_C2.dat
[18:36:17.275] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//trimParameters35_C3.dat
[18:36:17.283] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//trimParameters35_C4.dat
[18:36:17.292] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//trimParameters35_C5.dat
[18:36:17.300] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//trimParameters35_C6.dat
[18:36:17.308] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//trimParameters35_C7.dat
[18:36:17.317] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//trimParameters35_C8.dat
[18:36:17.325] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//trimParameters35_C9.dat
[18:36:17.333] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//trimParameters35_C10.dat
[18:36:17.342] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//trimParameters35_C11.dat
[18:36:17.350] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//trimParameters35_C12.dat
[18:36:17.359] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//trimParameters35_C13.dat
[18:36:17.367] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//trimParameters35_C14.dat
[18:36:17.375] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//trimParameters35_C15.dat
[18:36:17.384] <TB1> INFO: PixTestTrim::trimTest() done
[18:36:17.384] <TB1> INFO: vtrim: 125 153 153 127 135 141 129 159 153 175 138 130 145 163 151 172
[18:36:17.384] <TB1> INFO: vthrcomp: 123 116 118 127 130 126 130 125 118 124 106 123 116 123 116 130
[18:36:17.384] <TB1> INFO: vcal mean: 34.96 34.92 34.97 34.89 34.95 34.96 34.96 34.88 34.93 34.93 35.01 34.92 34.96 34.97 35.01 35.13
[18:36:17.384] <TB1> INFO: vcal RMS: 1.01 1.08 1.22 1.18 0.99 1.03 0.97 1.24 1.18 1.22 1.23 1.05 1.13 1.15 1.26 1.14
[18:36:17.384] <TB1> INFO: bits mean: 10.09 10.43 10.27 10.03 9.63 10.64 9.46 10.40 9.88 10.10 8.59 9.96 9.93 10.70 9.85 8.45
[18:36:17.384] <TB1> INFO: bits RMS: 2.62 2.24 2.48 2.69 2.60 2.40 2.58 2.41 2.68 2.58 2.59 2.67 2.38 2.19 2.66 2.16
[18:36:17.391] <TB1> INFO: ----------------------------------------------------------------------
[18:36:17.391] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[18:36:17.391] <TB1> INFO: ----------------------------------------------------------------------
[18:36:17.394] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[18:36:17.407] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[18:36:17.407] <TB1> INFO: run 1 of 1
[18:36:17.717] <TB1> INFO: Expecting 4160000 events.
[18:36:50.567] <TB1> INFO: 755000 events read in total (32258ms).
[18:37:23.793] <TB1> INFO: 1505390 events read in total (65484ms).
[18:37:56.536] <TB1> INFO: 2252690 events read in total (98227ms).
[18:38:28.656] <TB1> INFO: 2994925 events read in total (130347ms).
[18:39:01.004] <TB1> INFO: 3735430 events read in total (162695ms).
[18:39:19.861] <TB1> INFO: 4160000 events read in total (181552ms).
[18:39:19.906] <TB1> INFO: Test took 182499ms.
[18:39:42.508] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 201 (-1/-1) hits flags = 528 (plus default)
[18:39:42.521] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[18:39:42.521] <TB1> INFO: run 1 of 1
[18:39:42.829] <TB1> INFO: Expecting 4201600 events.
[18:40:15.462] <TB1> INFO: 728130 events read in total (32041ms).
[18:40:48.181] <TB1> INFO: 1450350 events read in total (64760ms).
[18:41:20.052] <TB1> INFO: 2170420 events read in total (96631ms).
[18:41:52.054] <TB1> INFO: 2885655 events read in total (128633ms).
[18:42:23.437] <TB1> INFO: 3598555 events read in total (160016ms).
[18:42:51.274] <TB1> INFO: 4201600 events read in total (187853ms).
[18:42:51.326] <TB1> INFO: Test took 188806ms.
[18:43:18.926] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 191 (-1/-1) hits flags = 528 (plus default)
[18:43:18.938] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[18:43:18.938] <TB1> INFO: run 1 of 1
[18:43:19.245] <TB1> INFO: Expecting 3993600 events.
[18:43:52.626] <TB1> INFO: 742155 events read in total (32790ms).
[18:44:24.953] <TB1> INFO: 1479040 events read in total (65117ms).
[18:44:57.482] <TB1> INFO: 2212135 events read in total (97646ms).
[18:45:28.901] <TB1> INFO: 2940250 events read in total (129065ms).
[18:46:01.350] <TB1> INFO: 3666990 events read in total (161514ms).
[18:46:16.409] <TB1> INFO: 3993600 events read in total (176573ms).
[18:46:16.478] <TB1> INFO: Test took 177539ms.
[18:46:39.579] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 190 (-1/-1) hits flags = 528 (plus default)
[18:46:39.592] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[18:46:39.592] <TB1> INFO: run 1 of 1
[18:46:39.902] <TB1> INFO: Expecting 3972800 events.
[18:47:14.475] <TB1> INFO: 743870 events read in total (33981ms).
[18:47:47.143] <TB1> INFO: 1482125 events read in total (66649ms).
[18:48:19.870] <TB1> INFO: 2216950 events read in total (99376ms).
[18:48:52.437] <TB1> INFO: 2946095 events read in total (131943ms).
[18:49:24.690] <TB1> INFO: 3674655 events read in total (164196ms).
[18:49:37.664] <TB1> INFO: 3972800 events read in total (177170ms).
[18:49:37.710] <TB1> INFO: Test took 178117ms.
[18:49:59.908] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 189 (-1/-1) hits flags = 528 (plus default)
[18:49:59.918] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[18:49:59.918] <TB1> INFO: run 1 of 1
[18:50:00.149] <TB1> INFO: Expecting 3952000 events.
[18:50:33.917] <TB1> INFO: 745475 events read in total (33177ms).
[18:51:06.109] <TB1> INFO: 1485225 events read in total (65369ms).
[18:51:38.777] <TB1> INFO: 2221590 events read in total (98037ms).
[18:52:11.250] <TB1> INFO: 2952465 events read in total (130510ms).
[18:52:43.347] <TB1> INFO: 3682455 events read in total (162607ms).
[18:52:55.556] <TB1> INFO: 3952000 events read in total (174816ms).
[18:52:55.602] <TB1> INFO: Test took 175684ms.
[18:53:19.640] <TB1> INFO: PixTestTrim::trimBitTest() done
[18:53:19.641] <TB1> INFO: PixTestTrim::doTest() done, duration: 2484 seconds
[18:53:19.641] <TB1> INFO: Decoding statistics:
[18:53:19.641] <TB1> INFO: General information:
[18:53:19.641] <TB1> INFO: 16bit words read: 0
[18:53:19.641] <TB1> INFO: valid events total: 0
[18:53:19.641] <TB1> INFO: empty events: 0
[18:53:19.641] <TB1> INFO: valid events with pixels: 0
[18:53:19.641] <TB1> INFO: valid pixel hits: 0
[18:53:19.641] <TB1> INFO: Event errors: 0
[18:53:19.642] <TB1> INFO: start marker: 0
[18:53:19.642] <TB1> INFO: stop marker: 0
[18:53:19.642] <TB1> INFO: overflow: 0
[18:53:19.642] <TB1> INFO: invalid 5bit words: 0
[18:53:19.642] <TB1> INFO: invalid XOR eye diagram: 0
[18:53:19.642] <TB1> INFO: frame (failed synchr.): 0
[18:53:19.642] <TB1> INFO: idle data (no TBM trl): 0
[18:53:19.642] <TB1> INFO: no data (only TBM hdr): 0
[18:53:19.642] <TB1> INFO: TBM errors: 0
[18:53:19.642] <TB1> INFO: flawed TBM headers: 0
[18:53:19.642] <TB1> INFO: flawed TBM trailers: 0
[18:53:19.642] <TB1> INFO: event ID mismatches: 0
[18:53:19.642] <TB1> INFO: ROC errors: 0
[18:53:19.642] <TB1> INFO: missing ROC header(s): 0
[18:53:19.642] <TB1> INFO: misplaced readback start: 0
[18:53:19.642] <TB1> INFO: Pixel decoding errors: 0
[18:53:19.642] <TB1> INFO: pixel data incomplete: 0
[18:53:19.642] <TB1> INFO: pixel address: 0
[18:53:19.642] <TB1> INFO: pulse height fill bit: 0
[18:53:19.642] <TB1> INFO: buffer corruption: 0
[18:53:20.252] <TB1> INFO: ######################################################################
[18:53:20.252] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[18:53:20.252] <TB1> INFO: ######################################################################
[18:53:20.484] <TB1> INFO: Expecting 41600 events.
[18:53:23.946] <TB1> INFO: 41600 events read in total (2870ms).
[18:53:23.946] <TB1> INFO: Test took 3693ms.
[18:53:24.385] <TB1> INFO: Expecting 41600 events.
[18:53:28.103] <TB1> INFO: 41600 events read in total (3126ms).
[18:53:28.104] <TB1> INFO: Test took 3956ms.
[18:53:28.118] <TB1> INFO: Max pixel from chip 0 is [12 ,38] phvalue 187
[18:53:28.118] <TB1> INFO: Max pixel from chip 1 is [8 ,9] phvalue 97
[18:53:28.118] <TB1> INFO: Max pixel from chip 2 is [10 ,5] phvalue 143
[18:53:28.118] <TB1> INFO: Max pixel from chip 3 is [4 ,15] phvalue 123
[18:53:28.119] <TB1> INFO: Max pixel from chip 4 is [6 ,32] phvalue 145
[18:53:28.119] <TB1> INFO: Max pixel from chip 5 is [4 ,10] phvalue 79
[18:53:28.119] <TB1> INFO: Max pixel from chip 6 is [6 ,5] phvalue 129
[18:53:28.119] <TB1> INFO: Max pixel from chip 7 is [11 ,16] phvalue 110
[18:53:28.119] <TB1> INFO: Max pixel from chip 8 is [16 ,14] phvalue 198
[18:53:28.120] <TB1> INFO: Max pixel from chip 9 is [20 ,14] phvalue 154
[18:53:28.120] <TB1> INFO: Max pixel from chip 10 is [10 ,12] phvalue 159
[18:53:28.120] <TB1> INFO: Max pixel from chip 11 is [9 ,32] phvalue 115
[18:53:28.120] <TB1> INFO: Max pixel from chip 12 is [4 ,40] phvalue 148
[18:53:28.120] <TB1> INFO: Max pixel from chip 13 is [12 ,14] phvalue 93
[18:53:28.120] <TB1> INFO: Max pixel from chip 14 is [8 ,15] phvalue 103
[18:53:28.121] <TB1> INFO: Max pixel from chip 15 is [5 ,6] phvalue 162
[18:53:28.401] <TB1> INFO: Expecting 41600 events.
[18:53:31.002] <TB1> INFO: 41600 events read in total (3010ms).
[18:53:31.002] <TB1> INFO: Test took 3867ms.
[18:53:32.011] <TB1> INFO: Min pixel from chip 0 is [3 ,5] phvalue 255
[18:53:32.011] <TB1> INFO: Min pixel from chip 1 is [13 ,13] phvalue 244
[18:53:32.012] <TB1> INFO: Min pixel from chip 2 is [3 ,5] phvalue 255
[18:53:32.012] <TB1> INFO: Min pixel from chip 3 is [3 ,5] phvalue 255
[18:53:32.012] <TB1> INFO: Min pixel from chip 4 is [3 ,5] phvalue 255
[18:53:32.012] <TB1> INFO: Min pixel from chip 5 is [3 ,5] phvalue 255
[18:53:32.012] <TB1> INFO: Min pixel from chip 6 is [3 ,5] phvalue 255
[18:53:32.012] <TB1> INFO: Min pixel from chip 7 is [29 ,31] phvalue 251
[18:53:32.012] <TB1> INFO: Min pixel from chip 8 is [3 ,5] phvalue 255
[18:53:32.012] <TB1> INFO: Min pixel from chip 9 is [3 ,5] phvalue 255
[18:53:32.012] <TB1> INFO: Min pixel from chip 10 is [3 ,5] phvalue 255
[18:53:32.012] <TB1> INFO: Min pixel from chip 11 is [3 ,63] phvalue 252
[18:53:32.013] <TB1> INFO: Min pixel from chip 12 is [3 ,5] phvalue 255
[18:53:32.013] <TB1> INFO: Min pixel from chip 13 is [3 ,5] phvalue 255
[18:53:32.013] <TB1> INFO: Min pixel from chip 14 is [43 ,25] phvalue 248
[18:53:32.013] <TB1> INFO: Min pixel from chip 15 is [3 ,5] phvalue 255
[18:53:32.291] <TB1> INFO: Expecting 2560 events.
[18:53:33.174] <TB1> INFO: 2560 events read in total (291ms).
[18:53:33.174] <TB1> INFO: Test took 1160ms.
[18:53:33.482] <TB1> INFO: Expecting 2560 events.
[18:53:34.367] <TB1> INFO: 2560 events read in total (293ms).
[18:53:34.367] <TB1> INFO: Test took 1192ms.
[18:53:34.675] <TB1> INFO: Expecting 2560 events.
[18:53:35.560] <TB1> INFO: 2560 events read in total (293ms).
[18:53:35.560] <TB1> INFO: Test took 1192ms.
[18:53:35.868] <TB1> INFO: Expecting 2560 events.
[18:53:36.757] <TB1> INFO: 2560 events read in total (298ms).
[18:53:36.757] <TB1> INFO: Test took 1197ms.
[18:53:37.065] <TB1> INFO: Expecting 2560 events.
[18:53:37.949] <TB1> INFO: 2560 events read in total (293ms).
[18:53:37.949] <TB1> INFO: Test took 1191ms.
[18:53:38.258] <TB1> INFO: Expecting 2560 events.
[18:53:39.142] <TB1> INFO: 2560 events read in total (292ms).
[18:53:39.143] <TB1> INFO: Test took 1193ms.
[18:53:39.451] <TB1> INFO: Expecting 2560 events.
[18:53:40.330] <TB1> INFO: 2560 events read in total (288ms).
[18:53:40.331] <TB1> INFO: Test took 1188ms.
[18:53:40.639] <TB1> INFO: Expecting 2560 events.
[18:53:41.519] <TB1> INFO: 2560 events read in total (289ms).
[18:53:41.519] <TB1> INFO: Test took 1188ms.
[18:53:41.826] <TB1> INFO: Expecting 2560 events.
[18:53:42.706] <TB1> INFO: 2560 events read in total (288ms).
[18:53:42.707] <TB1> INFO: Test took 1188ms.
[18:53:43.015] <TB1> INFO: Expecting 2560 events.
[18:53:43.896] <TB1> INFO: 2560 events read in total (290ms).
[18:53:43.896] <TB1> INFO: Test took 1189ms.
[18:53:44.204] <TB1> INFO: Expecting 2560 events.
[18:53:45.083] <TB1> INFO: 2560 events read in total (288ms).
[18:53:45.084] <TB1> INFO: Test took 1188ms.
[18:53:45.392] <TB1> INFO: Expecting 2560 events.
[18:53:46.272] <TB1> INFO: 2560 events read in total (288ms).
[18:53:46.272] <TB1> INFO: Test took 1188ms.
[18:53:46.580] <TB1> INFO: Expecting 2560 events.
[18:53:47.464] <TB1> INFO: 2560 events read in total (292ms).
[18:53:47.465] <TB1> INFO: Test took 1192ms.
[18:53:47.773] <TB1> INFO: Expecting 2560 events.
[18:53:48.658] <TB1> INFO: 2560 events read in total (293ms).
[18:53:48.658] <TB1> INFO: Test took 1193ms.
[18:53:48.967] <TB1> INFO: Expecting 2560 events.
[18:53:49.851] <TB1> INFO: 2560 events read in total (293ms).
[18:53:49.851] <TB1> INFO: Test took 1192ms.
[18:53:50.160] <TB1> INFO: Expecting 2560 events.
[18:53:51.043] <TB1> INFO: 2560 events read in total (292ms).
[18:53:51.043] <TB1> INFO: Test took 1191ms.
[18:53:51.046] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:51.352] <TB1> INFO: Expecting 655360 events.
[18:54:06.163] <TB1> INFO: 655360 events read in total (14219ms).
[18:54:06.174] <TB1> INFO: Expecting 655360 events.
[18:54:20.731] <TB1> INFO: 655360 events read in total (14154ms).
[18:54:20.746] <TB1> INFO: Expecting 655360 events.
[18:54:35.547] <TB1> INFO: 655360 events read in total (14398ms).
[18:54:35.576] <TB1> INFO: Expecting 655360 events.
[18:54:50.365] <TB1> INFO: 655360 events read in total (14386ms).
[18:54:50.389] <TB1> INFO: Expecting 655360 events.
[18:55:05.249] <TB1> INFO: 655360 events read in total (14457ms).
[18:55:05.290] <TB1> INFO: Expecting 655360 events.
[18:55:19.899] <TB1> INFO: 655360 events read in total (14206ms).
[18:55:19.949] <TB1> INFO: Expecting 655360 events.
[18:55:34.718] <TB1> INFO: 655360 events read in total (14366ms).
[18:55:34.755] <TB1> INFO: Expecting 655360 events.
[18:55:49.411] <TB1> INFO: 655360 events read in total (14253ms).
[18:55:49.475] <TB1> INFO: Expecting 655360 events.
[18:56:04.206] <TB1> INFO: 655360 events read in total (14328ms).
[18:56:04.251] <TB1> INFO: Expecting 655360 events.
[18:56:19.127] <TB1> INFO: 655360 events read in total (14473ms).
[18:56:19.202] <TB1> INFO: Expecting 655360 events.
[18:56:33.722] <TB1> INFO: 655360 events read in total (14117ms).
[18:56:33.778] <TB1> INFO: Expecting 655360 events.
[18:56:48.499] <TB1> INFO: 655360 events read in total (14318ms).
[18:56:48.588] <TB1> INFO: Expecting 655360 events.
[18:57:03.419] <TB1> INFO: 655360 events read in total (14427ms).
[18:57:03.481] <TB1> INFO: Expecting 655360 events.
[18:57:18.216] <TB1> INFO: 655360 events read in total (14332ms).
[18:57:18.282] <TB1> INFO: Expecting 655360 events.
[18:57:32.990] <TB1> INFO: 655360 events read in total (14305ms).
[18:57:33.061] <TB1> INFO: Expecting 655360 events.
[18:57:48.012] <TB1> INFO: 655360 events read in total (14548ms).
[18:57:48.126] <TB1> INFO: Test took 237080ms.
[18:57:48.235] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:48.500] <TB1> INFO: Expecting 655360 events.
[18:58:03.338] <TB1> INFO: 655360 events read in total (14247ms).
[18:58:03.348] <TB1> INFO: Expecting 655360 events.
[18:58:17.688] <TB1> INFO: 655360 events read in total (13936ms).
[18:58:17.702] <TB1> INFO: Expecting 655360 events.
[18:58:32.269] <TB1> INFO: 655360 events read in total (14164ms).
[18:58:32.287] <TB1> INFO: Expecting 655360 events.
[18:58:47.003] <TB1> INFO: 655360 events read in total (14313ms).
[18:58:47.037] <TB1> INFO: Expecting 655360 events.
[18:59:01.309] <TB1> INFO: 655360 events read in total (13869ms).
[18:59:01.335] <TB1> INFO: Expecting 655360 events.
[18:59:15.917] <TB1> INFO: 655360 events read in total (14179ms).
[18:59:15.948] <TB1> INFO: Expecting 655360 events.
[18:59:30.838] <TB1> INFO: 655360 events read in total (14487ms).
[18:59:30.891] <TB1> INFO: Expecting 655360 events.
[18:59:45.660] <TB1> INFO: 655360 events read in total (14366ms).
[18:59:45.702] <TB1> INFO: Expecting 655360 events.
[19:00:00.276] <TB1> INFO: 655360 events read in total (14171ms).
[19:00:00.322] <TB1> INFO: Expecting 655360 events.
[19:00:14.953] <TB1> INFO: 655360 events read in total (14228ms).
[19:00:15.005] <TB1> INFO: Expecting 655360 events.
[19:00:29.598] <TB1> INFO: 655360 events read in total (14190ms).
[19:00:29.650] <TB1> INFO: Expecting 655360 events.
[19:00:44.403] <TB1> INFO: 655360 events read in total (14349ms).
[19:00:44.492] <TB1> INFO: Expecting 655360 events.
[19:00:59.152] <TB1> INFO: 655360 events read in total (14257ms).
[19:00:59.212] <TB1> INFO: Expecting 655360 events.
[19:01:13.886] <TB1> INFO: 655360 events read in total (14271ms).
[19:01:13.951] <TB1> INFO: Expecting 655360 events.
[19:01:28.588] <TB1> INFO: 655360 events read in total (14234ms).
[19:01:28.657] <TB1> INFO: Expecting 655360 events.
[19:01:43.403] <TB1> INFO: 655360 events read in total (14343ms).
[19:01:43.520] <TB1> INFO: Test took 235285ms.
[19:01:43.810] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:01:43.818] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:01:43.826] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:01:43.834] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[19:01:43.841] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:01:43.849] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:01:43.856] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[19:01:43.864] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:01:43.872] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:01:43.880] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:01:43.887] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:01:43.895] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:01:43.903] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:01:43.910] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[19:01:43.918] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[19:01:43.926] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[19:01:43.934] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[19:01:43.941] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[19:01:43.949] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[19:01:43.957] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:01:43.964] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:01:43.972] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[19:01:43.980] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:01:43.988] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:01:43.996] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:01:44.003] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[19:01:44.039] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C0.dat
[19:01:44.040] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C1.dat
[19:01:44.040] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C2.dat
[19:01:44.040] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C3.dat
[19:01:44.040] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C4.dat
[19:01:44.040] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C5.dat
[19:01:44.040] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C6.dat
[19:01:44.040] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C7.dat
[19:01:44.040] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C8.dat
[19:01:44.040] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C9.dat
[19:01:44.040] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C10.dat
[19:01:44.041] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C11.dat
[19:01:44.041] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C12.dat
[19:01:44.041] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C13.dat
[19:01:44.041] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C14.dat
[19:01:44.041] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//dacParameters35_C15.dat
[19:01:44.306] <TB1> INFO: Expecting 41600 events.
[19:01:47.434] <TB1> INFO: 41600 events read in total (2537ms).
[19:01:47.434] <TB1> INFO: Test took 3390ms.
[19:01:47.953] <TB1> INFO: Expecting 41600 events.
[19:01:50.993] <TB1> INFO: 41600 events read in total (2448ms).
[19:01:50.993] <TB1> INFO: Test took 3348ms.
[19:01:51.440] <TB1> INFO: Expecting 41600 events.
[19:01:54.581] <TB1> INFO: 41600 events read in total (2550ms).
[19:01:54.582] <TB1> INFO: Test took 3378ms.
[19:01:54.803] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:01:54.892] <TB1> INFO: Expecting 2560 events.
[19:01:55.781] <TB1> INFO: 2560 events read in total (298ms).
[19:01:55.781] <TB1> INFO: Test took 978ms.
[19:01:55.783] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:01:56.089] <TB1> INFO: Expecting 2560 events.
[19:01:56.973] <TB1> INFO: 2560 events read in total (292ms).
[19:01:56.974] <TB1> INFO: Test took 1191ms.
[19:01:56.975] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:01:57.282] <TB1> INFO: Expecting 2560 events.
[19:01:58.172] <TB1> INFO: 2560 events read in total (298ms).
[19:01:58.172] <TB1> INFO: Test took 1197ms.
[19:01:58.174] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:01:58.480] <TB1> INFO: Expecting 2560 events.
[19:01:59.364] <TB1> INFO: 2560 events read in total (292ms).
[19:01:59.364] <TB1> INFO: Test took 1190ms.
[19:01:59.366] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:01:59.673] <TB1> INFO: Expecting 2560 events.
[19:02:00.562] <TB1> INFO: 2560 events read in total (297ms).
[19:02:00.562] <TB1> INFO: Test took 1196ms.
[19:02:00.564] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:00.871] <TB1> INFO: Expecting 2560 events.
[19:02:01.755] <TB1> INFO: 2560 events read in total (292ms).
[19:02:01.755] <TB1> INFO: Test took 1191ms.
[19:02:01.757] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:02.064] <TB1> INFO: Expecting 2560 events.
[19:02:02.949] <TB1> INFO: 2560 events read in total (293ms).
[19:02:02.949] <TB1> INFO: Test took 1192ms.
[19:02:02.951] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:03.257] <TB1> INFO: Expecting 2560 events.
[19:02:04.142] <TB1> INFO: 2560 events read in total (293ms).
[19:02:04.142] <TB1> INFO: Test took 1191ms.
[19:02:04.144] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:04.450] <TB1> INFO: Expecting 2560 events.
[19:02:05.335] <TB1> INFO: 2560 events read in total (293ms).
[19:02:05.335] <TB1> INFO: Test took 1191ms.
[19:02:05.337] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:05.643] <TB1> INFO: Expecting 2560 events.
[19:02:06.527] <TB1> INFO: 2560 events read in total (292ms).
[19:02:06.528] <TB1> INFO: Test took 1191ms.
[19:02:06.529] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:06.836] <TB1> INFO: Expecting 2560 events.
[19:02:07.716] <TB1> INFO: 2560 events read in total (288ms).
[19:02:07.716] <TB1> INFO: Test took 1187ms.
[19:02:07.718] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:08.025] <TB1> INFO: Expecting 2560 events.
[19:02:08.909] <TB1> INFO: 2560 events read in total (293ms).
[19:02:08.910] <TB1> INFO: Test took 1192ms.
[19:02:08.912] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:09.218] <TB1> INFO: Expecting 2560 events.
[19:02:10.103] <TB1> INFO: 2560 events read in total (293ms).
[19:02:10.103] <TB1> INFO: Test took 1192ms.
[19:02:10.105] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:10.411] <TB1> INFO: Expecting 2560 events.
[19:02:11.291] <TB1> INFO: 2560 events read in total (288ms).
[19:02:11.291] <TB1> INFO: Test took 1187ms.
[19:02:11.292] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:11.600] <TB1> INFO: Expecting 2560 events.
[19:02:12.484] <TB1> INFO: 2560 events read in total (293ms).
[19:02:12.484] <TB1> INFO: Test took 1192ms.
[19:02:12.485] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:12.793] <TB1> INFO: Expecting 2560 events.
[19:02:13.673] <TB1> INFO: 2560 events read in total (289ms).
[19:02:13.673] <TB1> INFO: Test took 1188ms.
[19:02:13.675] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:13.982] <TB1> INFO: Expecting 2560 events.
[19:02:14.866] <TB1> INFO: 2560 events read in total (292ms).
[19:02:14.866] <TB1> INFO: Test took 1191ms.
[19:02:14.868] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:15.175] <TB1> INFO: Expecting 2560 events.
[19:02:16.055] <TB1> INFO: 2560 events read in total (288ms).
[19:02:16.056] <TB1> INFO: Test took 1188ms.
[19:02:16.058] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:16.364] <TB1> INFO: Expecting 2560 events.
[19:02:17.243] <TB1> INFO: 2560 events read in total (287ms).
[19:02:17.244] <TB1> INFO: Test took 1186ms.
[19:02:17.246] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:17.552] <TB1> INFO: Expecting 2560 events.
[19:02:18.438] <TB1> INFO: 2560 events read in total (294ms).
[19:02:18.438] <TB1> INFO: Test took 1192ms.
[19:02:18.440] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:18.746] <TB1> INFO: Expecting 2560 events.
[19:02:19.631] <TB1> INFO: 2560 events read in total (293ms).
[19:02:19.631] <TB1> INFO: Test took 1191ms.
[19:02:19.633] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:19.939] <TB1> INFO: Expecting 2560 events.
[19:02:20.820] <TB1> INFO: 2560 events read in total (289ms).
[19:02:20.820] <TB1> INFO: Test took 1187ms.
[19:02:20.822] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:21.128] <TB1> INFO: Expecting 2560 events.
[19:02:22.013] <TB1> INFO: 2560 events read in total (293ms).
[19:02:22.014] <TB1> INFO: Test took 1192ms.
[19:02:22.016] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:22.322] <TB1> INFO: Expecting 2560 events.
[19:02:23.202] <TB1> INFO: 2560 events read in total (288ms).
[19:02:23.202] <TB1> INFO: Test took 1187ms.
[19:02:23.204] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:23.511] <TB1> INFO: Expecting 2560 events.
[19:02:24.394] <TB1> INFO: 2560 events read in total (292ms).
[19:02:24.394] <TB1> INFO: Test took 1190ms.
[19:02:24.396] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:24.703] <TB1> INFO: Expecting 2560 events.
[19:02:25.587] <TB1> INFO: 2560 events read in total (292ms).
[19:02:25.587] <TB1> INFO: Test took 1191ms.
[19:02:25.589] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:25.896] <TB1> INFO: Expecting 2560 events.
[19:02:26.781] <TB1> INFO: 2560 events read in total (293ms).
[19:02:26.781] <TB1> INFO: Test took 1193ms.
[19:02:26.783] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:27.089] <TB1> INFO: Expecting 2560 events.
[19:02:27.974] <TB1> INFO: 2560 events read in total (293ms).
[19:02:27.974] <TB1> INFO: Test took 1191ms.
[19:02:27.976] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:28.283] <TB1> INFO: Expecting 2560 events.
[19:02:29.167] <TB1> INFO: 2560 events read in total (293ms).
[19:02:29.167] <TB1> INFO: Test took 1192ms.
[19:02:29.169] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:29.476] <TB1> INFO: Expecting 2560 events.
[19:02:30.360] <TB1> INFO: 2560 events read in total (293ms).
[19:02:30.360] <TB1> INFO: Test took 1191ms.
[19:02:30.362] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:30.669] <TB1> INFO: Expecting 2560 events.
[19:02:31.553] <TB1> INFO: 2560 events read in total (293ms).
[19:02:31.553] <TB1> INFO: Test took 1191ms.
[19:02:31.555] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:02:31.862] <TB1> INFO: Expecting 2560 events.
[19:02:32.746] <TB1> INFO: 2560 events read in total (292ms).
[19:02:32.746] <TB1> INFO: Test took 1191ms.
[19:02:33.205] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 552 seconds
[19:02:33.205] <TB1> INFO: PH scale (per ROC): 47 64 44 51 49 58 54 63 51 51 48 65 58 37 65 38
[19:02:33.205] <TB1> INFO: PH offset (per ROC): 84 119 95 108 99 117 102 115 85 99 93 116 100 103 119 85
[19:02:33.212] <TB1> INFO: Decoding statistics:
[19:02:33.212] <TB1> INFO: General information:
[19:02:33.212] <TB1> INFO: 16bit words read: 127884
[19:02:33.212] <TB1> INFO: valid events total: 20480
[19:02:33.212] <TB1> INFO: empty events: 17978
[19:02:33.212] <TB1> INFO: valid events with pixels: 2502
[19:02:33.212] <TB1> INFO: valid pixel hits: 2502
[19:02:33.212] <TB1> INFO: Event errors: 0
[19:02:33.212] <TB1> INFO: start marker: 0
[19:02:33.212] <TB1> INFO: stop marker: 0
[19:02:33.212] <TB1> INFO: overflow: 0
[19:02:33.212] <TB1> INFO: invalid 5bit words: 0
[19:02:33.212] <TB1> INFO: invalid XOR eye diagram: 0
[19:02:33.212] <TB1> INFO: frame (failed synchr.): 0
[19:02:33.212] <TB1> INFO: idle data (no TBM trl): 0
[19:02:33.212] <TB1> INFO: no data (only TBM hdr): 0
[19:02:33.212] <TB1> INFO: TBM errors: 0
[19:02:33.212] <TB1> INFO: flawed TBM headers: 0
[19:02:33.212] <TB1> INFO: flawed TBM trailers: 0
[19:02:33.212] <TB1> INFO: event ID mismatches: 0
[19:02:33.212] <TB1> INFO: ROC errors: 0
[19:02:33.212] <TB1> INFO: missing ROC header(s): 0
[19:02:33.212] <TB1> INFO: misplaced readback start: 0
[19:02:33.212] <TB1> INFO: Pixel decoding errors: 0
[19:02:33.213] <TB1> INFO: pixel data incomplete: 0
[19:02:33.213] <TB1> INFO: pixel address: 0
[19:02:33.213] <TB1> INFO: pulse height fill bit: 0
[19:02:33.213] <TB1> INFO: buffer corruption: 0
[19:02:33.616] <TB1> INFO: ######################################################################
[19:02:33.616] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[19:02:33.616] <TB1> INFO: ######################################################################
[19:02:33.630] <TB1> INFO: scanning low vcal = 10
[19:02:33.939] <TB1> INFO: Expecting 41600 events.
[19:02:37.549] <TB1> INFO: 41600 events read in total (3018ms).
[19:02:37.549] <TB1> INFO: Test took 3919ms.
[19:02:37.551] <TB1> INFO: scanning low vcal = 20
[19:02:37.847] <TB1> INFO: Expecting 41600 events.
[19:02:41.419] <TB1> INFO: 41600 events read in total (2981ms).
[19:02:41.419] <TB1> INFO: Test took 3868ms.
[19:02:41.421] <TB1> INFO: scanning low vcal = 30
[19:02:41.734] <TB1> INFO: Expecting 41600 events.
[19:02:45.415] <TB1> INFO: 41600 events read in total (3089ms).
[19:02:45.416] <TB1> INFO: Test took 3995ms.
[19:02:45.418] <TB1> INFO: scanning low vcal = 40
[19:02:45.695] <TB1> INFO: Expecting 41600 events.
[19:02:49.713] <TB1> INFO: 41600 events read in total (3426ms).
[19:02:49.714] <TB1> INFO: Test took 4296ms.
[19:02:49.716] <TB1> INFO: scanning low vcal = 50
[19:02:49.993] <TB1> INFO: Expecting 41600 events.
[19:02:54.008] <TB1> INFO: 41600 events read in total (3424ms).
[19:02:54.009] <TB1> INFO: Test took 4293ms.
[19:02:54.012] <TB1> INFO: scanning low vcal = 60
[19:02:54.289] <TB1> INFO: Expecting 41600 events.
[19:02:58.307] <TB1> INFO: 41600 events read in total (3427ms).
[19:02:58.308] <TB1> INFO: Test took 4296ms.
[19:02:58.310] <TB1> INFO: scanning low vcal = 70
[19:02:58.619] <TB1> INFO: Expecting 41600 events.
[19:03:02.633] <TB1> INFO: 41600 events read in total (3422ms).
[19:03:02.633] <TB1> INFO: Test took 4322ms.
[19:03:02.636] <TB1> INFO: scanning low vcal = 80
[19:03:02.913] <TB1> INFO: Expecting 41600 events.
[19:03:06.974] <TB1> INFO: 41600 events read in total (3469ms).
[19:03:06.975] <TB1> INFO: Test took 4339ms.
[19:03:06.977] <TB1> INFO: scanning low vcal = 90
[19:03:07.290] <TB1> INFO: Expecting 41600 events.
[19:03:11.322] <TB1> INFO: 41600 events read in total (3440ms).
[19:03:11.323] <TB1> INFO: Test took 4346ms.
[19:03:11.325] <TB1> INFO: scanning low vcal = 100
[19:03:11.636] <TB1> INFO: Expecting 41600 events.
[19:03:15.634] <TB1> INFO: 41600 events read in total (3406ms).
[19:03:15.634] <TB1> INFO: Test took 4309ms.
[19:03:15.637] <TB1> INFO: scanning low vcal = 110
[19:03:15.947] <TB1> INFO: Expecting 41600 events.
[19:03:19.985] <TB1> INFO: 41600 events read in total (3446ms).
[19:03:19.986] <TB1> INFO: Test took 4349ms.
[19:03:19.989] <TB1> INFO: scanning low vcal = 120
[19:03:20.301] <TB1> INFO: Expecting 41600 events.
[19:03:24.345] <TB1> INFO: 41600 events read in total (3453ms).
[19:03:24.346] <TB1> INFO: Test took 4357ms.
[19:03:24.348] <TB1> INFO: scanning low vcal = 130
[19:03:24.625] <TB1> INFO: Expecting 41600 events.
[19:03:28.577] <TB1> INFO: 41600 events read in total (3360ms).
[19:03:28.578] <TB1> INFO: Test took 4229ms.
[19:03:28.580] <TB1> INFO: scanning low vcal = 140
[19:03:28.857] <TB1> INFO: Expecting 41600 events.
[19:03:32.842] <TB1> INFO: 41600 events read in total (3394ms).
[19:03:32.843] <TB1> INFO: Test took 4263ms.
[19:03:32.845] <TB1> INFO: scanning low vcal = 150
[19:03:33.154] <TB1> INFO: Expecting 41600 events.
[19:03:37.140] <TB1> INFO: 41600 events read in total (3394ms).
[19:03:37.140] <TB1> INFO: Test took 4295ms.
[19:03:37.143] <TB1> INFO: scanning low vcal = 160
[19:03:37.449] <TB1> INFO: Expecting 41600 events.
[19:03:41.417] <TB1> INFO: 41600 events read in total (3376ms).
[19:03:41.418] <TB1> INFO: Test took 4275ms.
[19:03:41.420] <TB1> INFO: scanning low vcal = 170
[19:03:41.697] <TB1> INFO: Expecting 41600 events.
[19:03:45.745] <TB1> INFO: 41600 events read in total (3456ms).
[19:03:45.746] <TB1> INFO: Test took 4326ms.
[19:03:45.748] <TB1> INFO: scanning low vcal = 180
[19:03:46.025] <TB1> INFO: Expecting 41600 events.
[19:03:49.987] <TB1> INFO: 41600 events read in total (3370ms).
[19:03:49.988] <TB1> INFO: Test took 4240ms.
[19:03:49.991] <TB1> INFO: scanning low vcal = 190
[19:03:50.267] <TB1> INFO: Expecting 41600 events.
[19:03:54.237] <TB1> INFO: 41600 events read in total (3378ms).
[19:03:54.237] <TB1> INFO: Test took 4246ms.
[19:03:54.240] <TB1> INFO: scanning low vcal = 200
[19:03:54.517] <TB1> INFO: Expecting 41600 events.
[19:03:58.561] <TB1> INFO: 41600 events read in total (3453ms).
[19:03:58.562] <TB1> INFO: Test took 4322ms.
[19:03:58.565] <TB1> INFO: scanning low vcal = 210
[19:03:58.874] <TB1> INFO: Expecting 41600 events.
[19:04:02.897] <TB1> INFO: 41600 events read in total (3431ms).
[19:04:02.897] <TB1> INFO: Test took 4332ms.
[19:04:02.900] <TB1> INFO: scanning low vcal = 220
[19:04:03.177] <TB1> INFO: Expecting 41600 events.
[19:04:07.215] <TB1> INFO: 41600 events read in total (3448ms).
[19:04:07.216] <TB1> INFO: Test took 4316ms.
[19:04:07.219] <TB1> INFO: scanning low vcal = 230
[19:04:07.528] <TB1> INFO: Expecting 41600 events.
[19:04:11.559] <TB1> INFO: 41600 events read in total (3439ms).
[19:04:11.560] <TB1> INFO: Test took 4341ms.
[19:04:11.563] <TB1> INFO: scanning low vcal = 240
[19:04:11.859] <TB1> INFO: Expecting 41600 events.
[19:04:15.847] <TB1> INFO: 41600 events read in total (3397ms).
[19:04:15.847] <TB1> INFO: Test took 4284ms.
[19:04:15.850] <TB1> INFO: scanning low vcal = 250
[19:04:16.126] <TB1> INFO: Expecting 41600 events.
[19:04:20.115] <TB1> INFO: 41600 events read in total (3397ms).
[19:04:20.116] <TB1> INFO: Test took 4266ms.
[19:04:20.120] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[19:04:20.395] <TB1> INFO: Expecting 41600 events.
[19:04:24.473] <TB1> INFO: 41600 events read in total (3486ms).
[19:04:24.474] <TB1> INFO: Test took 4354ms.
[19:04:24.476] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[19:04:24.753] <TB1> INFO: Expecting 41600 events.
[19:04:28.806] <TB1> INFO: 41600 events read in total (3461ms).
[19:04:28.807] <TB1> INFO: Test took 4330ms.
[19:04:28.810] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[19:04:29.087] <TB1> INFO: Expecting 41600 events.
[19:04:33.086] <TB1> INFO: 41600 events read in total (3408ms).
[19:04:33.086] <TB1> INFO: Test took 4277ms.
[19:04:33.089] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[19:04:33.366] <TB1> INFO: Expecting 41600 events.
[19:04:37.349] <TB1> INFO: 41600 events read in total (3391ms).
[19:04:37.350] <TB1> INFO: Test took 4261ms.
[19:04:37.353] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[19:04:37.630] <TB1> INFO: Expecting 41600 events.
[19:04:41.595] <TB1> INFO: 41600 events read in total (3374ms).
[19:04:41.595] <TB1> INFO: Test took 4242ms.
[19:04:41.961] <TB1> INFO: PixTestGainPedestal::measure() done
[19:05:15.139] <TB1> INFO: PixTestGainPedestal::fit() done
[19:05:15.139] <TB1> INFO: non-linearity mean: 0.923 0.983 0.948 0.963 0.940 0.972 0.939 0.982 0.959 0.965 0.959 0.983 0.969 1.002 0.987 0.988
[19:05:15.139] <TB1> INFO: non-linearity RMS: 0.120 0.004 0.156 0.035 0.067 0.009 0.065 0.004 0.042 0.034 0.057 0.003 0.017 0.166 0.003 0.181
[19:05:15.139] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//phCalibrationFitErr35_C0.dat
[19:05:15.162] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//phCalibrationFitErr35_C1.dat
[19:05:15.186] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//phCalibrationFitErr35_C2.dat
[19:05:15.209] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//phCalibrationFitErr35_C3.dat
[19:05:15.231] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//phCalibrationFitErr35_C4.dat
[19:05:15.254] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//phCalibrationFitErr35_C5.dat
[19:05:15.276] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//phCalibrationFitErr35_C6.dat
[19:05:15.299] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//phCalibrationFitErr35_C7.dat
[19:05:15.321] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//phCalibrationFitErr35_C8.dat
[19:05:15.344] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//phCalibrationFitErr35_C9.dat
[19:05:15.366] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//phCalibrationFitErr35_C10.dat
[19:05:15.388] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//phCalibrationFitErr35_C11.dat
[19:05:15.411] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//phCalibrationFitErr35_C12.dat
[19:05:15.433] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//phCalibrationFitErr35_C13.dat
[19:05:15.456] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//phCalibrationFitErr35_C14.dat
[19:05:15.478] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-11-15_17h24m_1479227094//000_Fulltest_m20//phCalibrationFitErr35_C15.dat
[19:05:15.501] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 161 seconds
[19:05:15.501] <TB1> INFO: Decoding statistics:
[19:05:15.501] <TB1> INFO: General information:
[19:05:15.501] <TB1> INFO: 16bit words read: 3327332
[19:05:15.501] <TB1> INFO: valid events total: 332800
[19:05:15.501] <TB1> INFO: empty events: 0
[19:05:15.501] <TB1> INFO: valid events with pixels: 332800
[19:05:15.501] <TB1> INFO: valid pixel hits: 665266
[19:05:15.501] <TB1> INFO: Event errors: 0
[19:05:15.501] <TB1> INFO: start marker: 0
[19:05:15.501] <TB1> INFO: stop marker: 0
[19:05:15.501] <TB1> INFO: overflow: 0
[19:05:15.501] <TB1> INFO: invalid 5bit words: 0
[19:05:15.501] <TB1> INFO: invalid XOR eye diagram: 0
[19:05:15.501] <TB1> INFO: frame (failed synchr.): 0
[19:05:15.501] <TB1> INFO: idle data (no TBM trl): 0
[19:05:15.501] <TB1> INFO: no data (only TBM hdr): 0
[19:05:15.501] <TB1> INFO: TBM errors: 0
[19:05:15.501] <TB1> INFO: flawed TBM headers: 0
[19:05:15.501] <TB1> INFO: flawed TBM trailers: 0
[19:05:15.501] <TB1> INFO: event ID mismatches: 0
[19:05:15.501] <TB1> INFO: ROC errors: 0
[19:05:15.501] <TB1> INFO: missing ROC header(s): 0
[19:05:15.501] <TB1> INFO: misplaced readback start: 0
[19:05:15.501] <TB1> INFO: Pixel decoding errors: 0
[19:05:15.501] <TB1> INFO: pixel data incomplete: 0
[19:05:15.501] <TB1> INFO: pixel address: 0
[19:05:15.501] <TB1> INFO: pulse height fill bit: 0
[19:05:15.501] <TB1> INFO: buffer corruption: 0
[19:05:15.515] <TB1> INFO: Decoding statistics:
[19:05:15.515] <TB1> INFO: General information:
[19:05:15.515] <TB1> INFO: 16bit words read: 3456752
[19:05:15.515] <TB1> INFO: valid events total: 353536
[19:05:15.515] <TB1> INFO: empty events: 18234
[19:05:15.515] <TB1> INFO: valid events with pixels: 335302
[19:05:15.515] <TB1> INFO: valid pixel hits: 667768
[19:05:15.515] <TB1> INFO: Event errors: 0
[19:05:15.515] <TB1> INFO: start marker: 0
[19:05:15.515] <TB1> INFO: stop marker: 0
[19:05:15.515] <TB1> INFO: overflow: 0
[19:05:15.515] <TB1> INFO: invalid 5bit words: 0
[19:05:15.515] <TB1> INFO: invalid XOR eye diagram: 0
[19:05:15.515] <TB1> INFO: frame (failed synchr.): 0
[19:05:15.515] <TB1> INFO: idle data (no TBM trl): 0
[19:05:15.515] <TB1> INFO: no data (only TBM hdr): 0
[19:05:15.515] <TB1> INFO: TBM errors: 0
[19:05:15.516] <TB1> INFO: flawed TBM headers: 0
[19:05:15.516] <TB1> INFO: flawed TBM trailers: 0
[19:05:15.516] <TB1> INFO: event ID mismatches: 0
[19:05:15.516] <TB1> INFO: ROC errors: 0
[19:05:15.516] <TB1> INFO: missing ROC header(s): 0
[19:05:15.516] <TB1> INFO: misplaced readback start: 0
[19:05:15.516] <TB1> INFO: Pixel decoding errors: 0
[19:05:15.516] <TB1> INFO: pixel data incomplete: 0
[19:05:15.516] <TB1> INFO: pixel address: 0
[19:05:15.516] <TB1> INFO: pulse height fill bit: 0
[19:05:15.516] <TB1> INFO: buffer corruption: 0
[19:05:15.516] <TB1> INFO: enter test to run
[19:05:15.516] <TB1> INFO: test: exit no parameter change
[19:05:15.538] <TB1> QUIET: Connection to board 153 closed.
[19:05:15.539] <TB1> INFO: pXar: this is the end, my friend