[11:29:43.533] <TB0> INFO: *** Welcome to pxar ***
[11:29:43.533] <TB0> INFO: *** Today: 2016/10/21
[11:29:43.540] <TB0> INFO: *** Version: c8ba-dirty
[11:29:43.540] <TB0> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C15.dat
[11:29:43.540] <TB0> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//tbmParameters_C1b.dat
[11:29:43.540] <TB0> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//defaultMaskFile.dat
[11:29:43.540] <TB0> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters_C15.dat
[11:29:43.600] <TB0> INFO: clk: 4
[11:29:43.600] <TB0> INFO: ctr: 4
[11:29:43.600] <TB0> INFO: sda: 19
[11:29:43.600] <TB0> INFO: tin: 9
[11:29:43.600] <TB0> INFO: level: 15
[11:29:43.600] <TB0> INFO: triggerdelay: 0
[11:29:43.600] <TB0> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[11:29:43.600] <TB0> INFO: Log level: INFO
[11:29:43.609] <TB0> INFO: Found DTB DTB_WRQ4OZ
[11:29:43.619] <TB0> QUIET: Connection to board DTB_WRQ4OZ opened.
[11:29:43.621] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 71
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WRQ4OZ
MAC address: 40D855118047
Hostname: pixelDTB071
Comment:
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[11:29:43.623] <TB0> INFO: RPC call hashes of host and DTB match: 486171790
[11:29:45.111] <TB0> INFO: DUT info:
[11:29:45.111] <TB0> INFO: The DUT currently contains the following objects:
[11:29:45.111] <TB0> INFO: 4 TBM Cores tbm10c (4 ON)
[11:29:45.111] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:29:45.111] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:29:45.111] <TB0> INFO: TBM Core alpha (2): 7 registers set
[11:29:45.111] <TB0> INFO: TBM Core beta (3): 7 registers set
[11:29:45.111] <TB0> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[11:29:45.111] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:29:45.111] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:29:45.111] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:29:45.111] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:29:45.111] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:29:45.111] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:29:45.111] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:29:45.111] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:29:45.111] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:29:45.111] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:29:45.111] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:29:45.111] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:29:45.111] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:29:45.111] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:29:45.111] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:29:45.111] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:29:45.512] <TB0> INFO: enter 'restricted' command line mode
[11:29:45.512] <TB0> INFO: enter test to run
[11:29:45.512] <TB0> INFO: test: pretest no parameter change
[11:29:45.512] <TB0> INFO: running: pretest
[11:29:45.517] <TB0> INFO: ######################################################################
[11:29:45.517] <TB0> INFO: PixTestPretest::doTest()
[11:29:45.517] <TB0> INFO: ######################################################################
[11:29:45.518] <TB0> INFO: ----------------------------------------------------------------------
[11:29:45.518] <TB0> INFO: PixTestPretest::programROC()
[11:29:45.518] <TB0> INFO: ----------------------------------------------------------------------
[11:30:03.532] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:30:03.532] <TB0> INFO: IA differences per ROC: 16.9 18.5 18.5 19.3 20.1 19.3 18.5 20.1 16.1 17.7 16.9 20.1 20.1 20.1 19.3 20.1
[11:30:03.611] <TB0> INFO: ----------------------------------------------------------------------
[11:30:03.611] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:30:03.612] <TB0> INFO: ----------------------------------------------------------------------
[11:30:24.882] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 389.9 mA = 24.3688 mA/ROC
[11:30:24.882] <TB0> INFO: i(loss) [mA/ROC]: 19.3 20.1 19.3 20.1 19.3 19.3 19.3 19.3 20.1 20.1 19.3 19.3 20.1 19.3 19.3 20.1
[11:30:24.918] <TB0> INFO: ----------------------------------------------------------------------
[11:30:24.918] <TB0> INFO: PixTestPretest::findTiming()
[11:30:24.918] <TB0> INFO: ----------------------------------------------------------------------
[11:30:24.918] <TB0> INFO: PixTestCmd::init()

[11:30:57.236] <TB0> INFO: TBM phases: 160MHz: 0, 400MHz: 3, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[11:30:57.236] <TB0> INFO: (success/tries = 100/100), width = 4
[11:30:58.743] <TB0> INFO: ----------------------------------------------------------------------
[11:30:58.743] <TB0> INFO: PixTestPretest::findWorkingPixel()
[11:30:58.743] <TB0> INFO: ----------------------------------------------------------------------
[11:30:58.838] <TB0> INFO: Expecting 231680 events.
[11:31:08.976] <TB0> INFO: 231680 events read in total (9546ms).
[11:31:08.985] <TB0> INFO: Test took 10237ms.
[11:31:09.233] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:31:09.269] <TB0> INFO: ----------------------------------------------------------------------
[11:31:09.269] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[11:31:09.269] <TB0> INFO: ----------------------------------------------------------------------
[11:31:09.365] <TB0> INFO: Expecting 231680 events.
[11:31:19.247] <TB0> INFO: 231680 events read in total (9291ms).
[11:31:19.254] <TB0> INFO: Test took 9979ms.
[11:31:19.520] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[11:31:19.520] <TB0> INFO: CalDel: 81 76 99 75 83 83 72 91 97 100 119 100 105 94 111 81
[11:31:19.520] <TB0> INFO: VthrComp: 51 51 53 54 51 51 51 52 51 51 52 51 53 51 51 55
[11:31:19.524] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C0.dat
[11:31:19.524] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C1.dat
[11:31:19.524] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C2.dat
[11:31:19.525] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C3.dat
[11:31:19.525] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C4.dat
[11:31:19.525] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C5.dat
[11:31:19.525] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C6.dat
[11:31:19.525] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C7.dat
[11:31:19.525] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C8.dat
[11:31:19.526] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C9.dat
[11:31:19.526] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C10.dat
[11:31:19.526] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C11.dat
[11:31:19.526] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C12.dat
[11:31:19.526] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C13.dat
[11:31:19.526] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C14.dat
[11:31:19.527] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters_C15.dat
[11:31:19.527] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//tbmParameters_C0a.dat
[11:31:19.527] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//tbmParameters_C0b.dat
[11:31:19.527] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//tbmParameters_C1a.dat
[11:31:19.527] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//tbmParameters_C1b.dat
[11:31:19.527] <TB0> INFO: PixTestPretest::doTest() done, duration: 94 seconds
[11:31:19.580] <TB0> INFO: enter test to run
[11:31:19.580] <TB0> INFO: test: FullTest no parameter change
[11:31:19.580] <TB0> INFO: running: fulltest
[11:31:19.580] <TB0> INFO: ######################################################################
[11:31:19.580] <TB0> INFO: PixTestFullTest::doTest()
[11:31:19.580] <TB0> INFO: ######################################################################
[11:31:19.581] <TB0> INFO: ######################################################################
[11:31:19.581] <TB0> INFO: PixTestAlive::doTest()
[11:31:19.581] <TB0> INFO: ######################################################################
[11:31:19.582] <TB0> INFO: ----------------------------------------------------------------------
[11:31:19.582] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:31:19.582] <TB0> INFO: ----------------------------------------------------------------------
[11:31:19.825] <TB0> INFO: Expecting 41600 events.
[11:31:23.304] <TB0> INFO: 41600 events read in total (2888ms).
[11:31:23.304] <TB0> INFO: Test took 3720ms.
[11:31:23.538] <TB0> INFO: PixTestAlive::aliveTest() done
[11:31:23.538] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
[11:31:23.539] <TB0> INFO: ----------------------------------------------------------------------
[11:31:23.539] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:31:23.539] <TB0> INFO: ----------------------------------------------------------------------
[11:31:23.789] <TB0> INFO: Expecting 41600 events.
[11:31:26.862] <TB0> INFO: 41600 events read in total (2481ms).
[11:31:26.862] <TB0> INFO: Test took 3321ms.
[11:31:26.863] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:31:27.103] <TB0> INFO: PixTestAlive::maskTest() done
[11:31:27.103] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:31:27.105] <TB0> INFO: ----------------------------------------------------------------------
[11:31:27.105] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:31:27.105] <TB0> INFO: ----------------------------------------------------------------------
[11:31:27.348] <TB0> INFO: Expecting 41600 events.
[11:31:30.879] <TB0> INFO: 41600 events read in total (2939ms).
[11:31:30.880] <TB0> INFO: Test took 3773ms.
[11:31:31.114] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[11:31:31.114] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:31:31.114] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[11:31:31.114] <TB0> INFO: Decoding statistics:
[11:31:31.114] <TB0> INFO: General information:
[11:31:31.114] <TB0> INFO: 16bit words read: 0
[11:31:31.114] <TB0> INFO: valid events total: 0
[11:31:31.114] <TB0> INFO: empty events: 0
[11:31:31.114] <TB0> INFO: valid events with pixels: 0
[11:31:31.114] <TB0> INFO: valid pixel hits: 0
[11:31:31.114] <TB0> INFO: Event errors: 0
[11:31:31.114] <TB0> INFO: start marker: 0
[11:31:31.114] <TB0> INFO: stop marker: 0
[11:31:31.114] <TB0> INFO: overflow: 0
[11:31:31.114] <TB0> INFO: invalid 5bit words: 0
[11:31:31.114] <TB0> INFO: invalid XOR eye diagram: 0
[11:31:31.114] <TB0> INFO: frame (failed synchr.): 0
[11:31:31.114] <TB0> INFO: idle data (no TBM trl): 0
[11:31:31.114] <TB0> INFO: no data (only TBM hdr): 0
[11:31:31.114] <TB0> INFO: TBM errors: 0
[11:31:31.114] <TB0> INFO: flawed TBM headers: 0
[11:31:31.114] <TB0> INFO: flawed TBM trailers: 0
[11:31:31.114] <TB0> INFO: event ID mismatches: 0
[11:31:31.114] <TB0> INFO: ROC errors: 0
[11:31:31.114] <TB0> INFO: missing ROC header(s): 0
[11:31:31.114] <TB0> INFO: misplaced readback start: 0
[11:31:31.114] <TB0> INFO: Pixel decoding errors: 0
[11:31:31.114] <TB0> INFO: pixel data incomplete: 0
[11:31:31.114] <TB0> INFO: pixel address: 0
[11:31:31.114] <TB0> INFO: pulse height fill bit: 0
[11:31:31.115] <TB0> INFO: buffer corruption: 0
[11:31:31.123] <TB0> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C15.dat
[11:31:31.123] <TB0> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr_C15.dat

[11:31:31.123] <TB0> INFO: ######################################################################
[11:31:31.123] <TB0> INFO: PixTestReadback::doTest()
[11:31:31.123] <TB0> INFO: ######################################################################
[11:31:31.123] <TB0> INFO: ----------------------------------------------------------------------
[11:31:31.123] <TB0> INFO: PixTestReadback::CalibrateVd()
[11:31:31.123] <TB0> INFO: ----------------------------------------------------------------------
[11:31:41.084] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C0.dat
[11:31:41.084] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C1.dat
[11:31:41.084] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C2.dat
[11:31:41.085] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C3.dat
[11:31:41.085] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C4.dat
[11:31:41.085] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C5.dat
[11:31:41.085] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C6.dat
[11:31:41.085] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C7.dat
[11:31:41.085] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C8.dat
[11:31:41.085] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C9.dat
[11:31:41.085] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C10.dat
[11:31:41.085] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C11.dat
[11:31:41.085] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C12.dat
[11:31:41.085] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C13.dat
[11:31:41.085] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C14.dat
[11:31:41.085] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C15.dat
[11:31:41.114] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:31:41.114] <TB0> INFO: ----------------------------------------------------------------------
[11:31:41.114] <TB0> INFO: PixTestReadback::CalibrateVa()
[11:31:41.114] <TB0> INFO: ----------------------------------------------------------------------
[11:31:51.046] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C0.dat
[11:31:51.046] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C1.dat
[11:31:51.046] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C2.dat
[11:31:51.046] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C3.dat
[11:31:51.046] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C4.dat
[11:31:51.046] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C5.dat
[11:31:51.046] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C6.dat
[11:31:51.046] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C7.dat
[11:31:51.047] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C8.dat
[11:31:51.047] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C9.dat
[11:31:51.047] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C10.dat
[11:31:51.047] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C11.dat
[11:31:51.047] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C12.dat
[11:31:51.047] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C13.dat
[11:31:51.047] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C14.dat
[11:31:51.047] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C15.dat
[11:31:51.078] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:31:51.078] <TB0> INFO: ----------------------------------------------------------------------
[11:31:51.078] <TB0> INFO: PixTestReadback::readbackVbg()
[11:31:51.078] <TB0> INFO: ----------------------------------------------------------------------
[11:31:58.752] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:31:58.752] <TB0> INFO: ----------------------------------------------------------------------
[11:31:58.752] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[11:31:58.752] <TB0> INFO: ----------------------------------------------------------------------
[11:31:58.752] <TB0> INFO: Vbg will be calibrated using Vd calibration
[11:31:58.752] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 153calibrated Vbg = 1.18672 :::*/*/*/*/
[11:31:58.752] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 149.5calibrated Vbg = 1.18779 :::*/*/*/*/
[11:31:58.752] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 145.8calibrated Vbg = 1.18499 :::*/*/*/*/
[11:31:58.752] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 160.4calibrated Vbg = 1.17745 :::*/*/*/*/
[11:31:58.752] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 163.2calibrated Vbg = 1.18721 :::*/*/*/*/
[11:31:58.752] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 150.1calibrated Vbg = 1.18826 :::*/*/*/*/
[11:31:58.752] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 145.2calibrated Vbg = 1.19023 :::*/*/*/*/
[11:31:58.752] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 149.4calibrated Vbg = 1.19329 :::*/*/*/*/
[11:31:58.752] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 155.4calibrated Vbg = 1.18532 :::*/*/*/*/
[11:31:58.752] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 154.8calibrated Vbg = 1.18117 :::*/*/*/*/
[11:31:58.752] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 160calibrated Vbg = 1.17832 :::*/*/*/*/
[11:31:58.752] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 150.3calibrated Vbg = 1.1738 :::*/*/*/*/
[11:31:58.752] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 162.9calibrated Vbg = 1.17926 :::*/*/*/*/
[11:31:58.752] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 150.8calibrated Vbg = 1.18877 :::*/*/*/*/
[11:31:58.752] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 166calibrated Vbg = 1.1896 :::*/*/*/*/
[11:31:58.752] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 159.1calibrated Vbg = 1.18356 :::*/*/*/*/
[11:31:58.755] <TB0> INFO: ----------------------------------------------------------------------
[11:31:58.755] <TB0> INFO: PixTestReadback::CalibrateIa()
[11:31:58.755] <TB0> INFO: ----------------------------------------------------------------------
[11:34:39.589] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C0.dat
[11:34:39.589] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C1.dat
[11:34:39.589] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C2.dat
[11:34:39.589] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C3.dat
[11:34:39.589] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C4.dat
[11:34:39.589] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C5.dat
[11:34:39.590] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C6.dat
[11:34:39.590] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C7.dat
[11:34:39.590] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C8.dat
[11:34:39.590] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C9.dat
[11:34:39.590] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C10.dat
[11:34:39.590] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C11.dat
[11:34:39.590] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C12.dat
[11:34:39.590] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C13.dat
[11:34:39.590] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C14.dat
[11:34:39.590] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//readbackCal_C15.dat
[11:34:39.619] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:34:39.621] <TB0> INFO: PixTestReadback::doTest() done
[11:34:39.621] <TB0> INFO: Decoding statistics:
[11:34:39.621] <TB0> INFO: General information:
[11:34:39.621] <TB0> INFO: 16bit words read: 1536
[11:34:39.621] <TB0> INFO: valid events total: 256
[11:34:39.621] <TB0> INFO: empty events: 256
[11:34:39.621] <TB0> INFO: valid events with pixels: 0
[11:34:39.621] <TB0> INFO: valid pixel hits: 0
[11:34:39.621] <TB0> INFO: Event errors: 0
[11:34:39.621] <TB0> INFO: start marker: 0
[11:34:39.621] <TB0> INFO: stop marker: 0
[11:34:39.621] <TB0> INFO: overflow: 0
[11:34:39.621] <TB0> INFO: invalid 5bit words: 0
[11:34:39.621] <TB0> INFO: invalid XOR eye diagram: 0
[11:34:39.621] <TB0> INFO: frame (failed synchr.): 0
[11:34:39.621] <TB0> INFO: idle data (no TBM trl): 0
[11:34:39.621] <TB0> INFO: no data (only TBM hdr): 0
[11:34:39.621] <TB0> INFO: TBM errors: 0
[11:34:39.621] <TB0> INFO: flawed TBM headers: 0
[11:34:39.621] <TB0> INFO: flawed TBM trailers: 0
[11:34:39.621] <TB0> INFO: event ID mismatches: 0
[11:34:39.621] <TB0> INFO: ROC errors: 0
[11:34:39.621] <TB0> INFO: missing ROC header(s): 0
[11:34:39.621] <TB0> INFO: misplaced readback start: 0
[11:34:39.621] <TB0> INFO: Pixel decoding errors: 0
[11:34:39.621] <TB0> INFO: pixel data incomplete: 0
[11:34:39.621] <TB0> INFO: pixel address: 0
[11:34:39.621] <TB0> INFO: pulse height fill bit: 0
[11:34:39.621] <TB0> INFO: buffer corruption: 0
[11:34:39.672] <TB0> INFO: ######################################################################
[11:34:39.672] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:34:39.672] <TB0> INFO: ######################################################################
[11:34:39.674] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[11:34:39.688] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:34:39.689] <TB0> INFO: run 1 of 1
[11:34:39.925] <TB0> INFO: Expecting 3120000 events.
[11:35:10.658] <TB0> INFO: 671615 events read in total (30141ms).




















[11:35:40.696] <TB0> INFO: 1341395 events read in total (60179ms).











[11:36:10.782] <TB0> INFO: 2008295 events read in total (90265ms).
[11:36:40.968] <TB0> INFO: 2674115 events read in total (120451ms).











[11:37:01.260] <TB0> INFO: 3120000 events read in total (140743ms).
[11:37:01.325] <TB0> INFO: Test took 141637ms.
[11:37:29.013] <TB0> INFO: PixTestBBMap::doTest() done with 1 decoding errors: , duration: 169 seconds
[11:37:29.013] <TB0> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 1 1 1 0 0 2 0 0 0
[11:37:29.014] <TB0> INFO: separation cut (per ROC): 110 109 107 106 106 105 107 107 106 111 100 113 103 104 108 110
[11:37:29.014] <TB0> INFO: Decoding statistics:
[11:37:29.014] <TB0> INFO: General information:
[11:37:29.014] <TB0> INFO: 16bit words read: 0
[11:37:29.014] <TB0> INFO: valid events total: 0
[11:37:29.014] <TB0> INFO: empty events: 0
[11:37:29.014] <TB0> INFO: valid events with pixels: 0
[11:37:29.014] <TB0> INFO: valid pixel hits: 0
[11:37:29.014] <TB0> INFO: Event errors: 0
[11:37:29.014] <TB0> INFO: start marker: 0
[11:37:29.014] <TB0> INFO: stop marker: 0
[11:37:29.014] <TB0> INFO: overflow: 0
[11:37:29.014] <TB0> INFO: invalid 5bit words: 0
[11:37:29.014] <TB0> INFO: invalid XOR eye diagram: 0
[11:37:29.014] <TB0> INFO: frame (failed synchr.): 0
[11:37:29.014] <TB0> INFO: idle data (no TBM trl): 0
[11:37:29.014] <TB0> INFO: no data (only TBM hdr): 0
[11:37:29.014] <TB0> INFO: TBM errors: 0
[11:37:29.014] <TB0> INFO: flawed TBM headers: 0
[11:37:29.014] <TB0> INFO: flawed TBM trailers: 0
[11:37:29.014] <TB0> INFO: event ID mismatches: 0
[11:37:29.014] <TB0> INFO: ROC errors: 0
[11:37:29.014] <TB0> INFO: missing ROC header(s): 0
[11:37:29.014] <TB0> INFO: misplaced readback start: 0
[11:37:29.014] <TB0> INFO: Pixel decoding errors: 0
[11:37:29.014] <TB0> INFO: pixel data incomplete: 0
[11:37:29.014] <TB0> INFO: pixel address: 0
[11:37:29.014] <TB0> INFO: pulse height fill bit: 0
[11:37:29.014] <TB0> INFO: buffer corruption: 0
[11:37:29.056] <TB0> INFO: ######################################################################
[11:37:29.056] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:37:29.056] <TB0> INFO: ######################################################################
[11:37:29.056] <TB0> INFO: ----------------------------------------------------------------------
[11:37:29.056] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:37:29.056] <TB0> INFO: ----------------------------------------------------------------------
[11:37:29.056] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[11:37:29.070] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[11:37:29.070] <TB0> INFO: run 1 of 1
[11:37:29.330] <TB0> INFO: Expecting 36608000 events.
[11:37:52.954] <TB0> INFO: 714300 events read in total (23032ms).
[11:38:16.041] <TB0> INFO: 1404450 events read in total (46120ms).
[11:38:39.192] <TB0> INFO: 2097250 events read in total (69270ms).
[11:39:02.180] <TB0> INFO: 2786550 events read in total (92258ms).
[11:39:25.285] <TB0> INFO: 3477950 events read in total (115363ms).
[11:39:48.384] <TB0> INFO: 4166500 events read in total (138462ms).
[11:40:11.537] <TB0> INFO: 4858550 events read in total (161615ms).
[11:40:34.827] <TB0> INFO: 5549100 events read in total (184905ms).
[11:40:58.486] <TB0> INFO: 6238750 events read in total (208564ms).
[11:41:21.370] <TB0> INFO: 6926400 events read in total (231448ms).
[11:41:44.654] <TB0> INFO: 7617800 events read in total (254732ms).
[11:42:07.667] <TB0> INFO: 8304350 events read in total (277745ms).
[11:42:30.806] <TB0> INFO: 8997450 events read in total (300884ms).
[11:42:53.903] <TB0> INFO: 9686650 events read in total (323981ms).
[11:43:16.886] <TB0> INFO: 10374050 events read in total (346964ms).
[11:43:39.974] <TB0> INFO: 11060650 events read in total (370052ms).
[11:44:03.008] <TB0> INFO: 11751550 events read in total (393086ms).
[11:44:26.354] <TB0> INFO: 12441150 events read in total (416432ms).
[11:44:49.505] <TB0> INFO: 13131150 events read in total (439583ms).
[11:45:12.346] <TB0> INFO: 13821750 events read in total (462424ms).
[11:45:35.643] <TB0> INFO: 14510000 events read in total (485721ms).
[11:45:58.761] <TB0> INFO: 15196450 events read in total (508839ms).
[11:46:21.785] <TB0> INFO: 15884100 events read in total (531863ms).
[11:46:44.904] <TB0> INFO: 16572550 events read in total (554982ms).
[11:47:08.324] <TB0> INFO: 17259450 events read in total (578402ms).
[11:47:31.385] <TB0> INFO: 17948250 events read in total (601463ms).
[11:47:54.390] <TB0> INFO: 18632900 events read in total (624468ms).
[11:48:17.729] <TB0> INFO: 19318600 events read in total (647807ms).
[11:48:40.569] <TB0> INFO: 20002200 events read in total (670647ms).
[11:49:03.878] <TB0> INFO: 20688100 events read in total (693957ms).
[11:49:27.060] <TB0> INFO: 21372800 events read in total (717138ms).
[11:49:50.360] <TB0> INFO: 22058000 events read in total (740438ms).
[11:50:13.694] <TB0> INFO: 22739850 events read in total (763772ms).
[11:50:36.689] <TB0> INFO: 23422300 events read in total (786767ms).
[11:50:59.472] <TB0> INFO: 24101750 events read in total (809550ms).
[11:51:22.360] <TB0> INFO: 24785450 events read in total (832438ms).
[11:51:45.506] <TB0> INFO: 25466250 events read in total (855585ms).
[11:52:08.625] <TB0> INFO: 26150900 events read in total (878703ms).
[11:52:31.635] <TB0> INFO: 26831700 events read in total (901713ms).
[11:52:54.500] <TB0> INFO: 27517250 events read in total (924578ms).
[11:53:17.346] <TB0> INFO: 28197400 events read in total (947424ms).
[11:53:40.537] <TB0> INFO: 28881400 events read in total (970615ms).
[11:54:03.727] <TB0> INFO: 29560750 events read in total (993805ms).
[11:54:26.930] <TB0> INFO: 30245050 events read in total (1017008ms).
[11:54:49.944] <TB0> INFO: 30923050 events read in total (1040022ms).
[11:55:12.898] <TB0> INFO: 31607100 events read in total (1062976ms).
[11:55:35.942] <TB0> INFO: 32286400 events read in total (1086020ms).
[11:55:59.233] <TB0> INFO: 32970950 events read in total (1109311ms).
[11:56:22.381] <TB0> INFO: 33653150 events read in total (1132459ms).
[11:56:45.341] <TB0> INFO: 34337600 events read in total (1155419ms).
[11:57:08.210] <TB0> INFO: 35020600 events read in total (1178288ms).
[11:57:31.181] <TB0> INFO: 35705000 events read in total (1201259ms).
[11:57:54.357] <TB0> INFO: 36399700 events read in total (1224435ms).
[11:58:01.475] <TB0> INFO: 36608000 events read in total (1231553ms).
[11:58:01.548] <TB0> INFO: Test took 1232478ms.
[11:58:01.954] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:58:03.456] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:58:04.915] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:58:06.407] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:58:07.883] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:58:09.409] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:58:11.034] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:58:12.577] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:58:14.203] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:58:15.747] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:58:17.302] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:58:18.836] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:58:20.458] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:58:22.016] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:58:23.572] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:58:25.678] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:58:27.640] <TB0> INFO: PixTestScurves::scurves() done
[11:58:27.640] <TB0> INFO: Vcal mean: 123.70 130.20 127.24 130.51 126.25 121.25 122.98 128.67 128.18 132.58 127.38 126.47 127.03 129.05 133.37 133.97
[11:58:27.640] <TB0> INFO: Vcal RMS: 6.29 6.55 6.27 6.60 5.71 5.62 6.62 6.97 6.78 6.82 6.72 6.04 5.64 5.71 6.44 6.05
[11:58:27.640] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1258 seconds
[11:58:27.640] <TB0> INFO: Decoding statistics:
[11:58:27.640] <TB0> INFO: General information:
[11:58:27.640] <TB0> INFO: 16bit words read: 0
[11:58:27.640] <TB0> INFO: valid events total: 0
[11:58:27.640] <TB0> INFO: empty events: 0
[11:58:27.640] <TB0> INFO: valid events with pixels: 0
[11:58:27.640] <TB0> INFO: valid pixel hits: 0
[11:58:27.640] <TB0> INFO: Event errors: 0
[11:58:27.640] <TB0> INFO: start marker: 0
[11:58:27.640] <TB0> INFO: stop marker: 0
[11:58:27.640] <TB0> INFO: overflow: 0
[11:58:27.640] <TB0> INFO: invalid 5bit words: 0
[11:58:27.640] <TB0> INFO: invalid XOR eye diagram: 0
[11:58:27.640] <TB0> INFO: frame (failed synchr.): 0
[11:58:27.640] <TB0> INFO: idle data (no TBM trl): 0
[11:58:27.640] <TB0> INFO: no data (only TBM hdr): 0
[11:58:27.640] <TB0> INFO: TBM errors: 0
[11:58:27.640] <TB0> INFO: flawed TBM headers: 0
[11:58:27.641] <TB0> INFO: flawed TBM trailers: 0
[11:58:27.641] <TB0> INFO: event ID mismatches: 0
[11:58:27.641] <TB0> INFO: ROC errors: 0
[11:58:27.641] <TB0> INFO: missing ROC header(s): 0
[11:58:27.641] <TB0> INFO: misplaced readback start: 0
[11:58:27.641] <TB0> INFO: Pixel decoding errors: 0
[11:58:27.641] <TB0> INFO: pixel data incomplete: 0
[11:58:27.641] <TB0> INFO: pixel address: 0
[11:58:27.641] <TB0> INFO: pulse height fill bit: 0
[11:58:27.641] <TB0> INFO: buffer corruption: 0
[11:58:27.733] <TB0> INFO: ######################################################################
[11:58:27.733] <TB0> INFO: PixTestTrim::doTest()
[11:58:27.733] <TB0> INFO: ######################################################################
[11:58:27.735] <TB0> INFO: ----------------------------------------------------------------------
[11:58:27.735] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[11:58:27.735] <TB0> INFO: ----------------------------------------------------------------------
[11:58:27.805] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:58:27.805] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:58:27.819] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:58:27.819] <TB0> INFO: run 1 of 1
[11:58:28.150] <TB0> INFO: Expecting 5025280 events.
[11:59:00.170] <TB0> INFO: 841600 events read in total (31415ms).
[11:59:30.669] <TB0> INFO: 1681720 events read in total (61914ms).
[12:00:01.277] <TB0> INFO: 2521168 events read in total (92522ms).
[12:00:32.124] <TB0> INFO: 3354808 events read in total (123369ms).
[12:01:03.298] <TB0> INFO: 4185600 events read in total (154543ms).
[12:01:33.900] <TB0> INFO: 5015632 events read in total (185145ms).
[12:01:34.670] <TB0> INFO: 5025280 events read in total (185915ms).
[12:01:34.731] <TB0> INFO: Test took 186911ms.
[12:01:49.844] <TB0> INFO: ROC 0 VthrComp = 129
[12:01:49.844] <TB0> INFO: ROC 1 VthrComp = 133
[12:01:49.844] <TB0> INFO: ROC 2 VthrComp = 124
[12:01:49.844] <TB0> INFO: ROC 3 VthrComp = 132
[12:01:49.844] <TB0> INFO: ROC 4 VthrComp = 132
[12:01:49.844] <TB0> INFO: ROC 5 VthrComp = 130
[12:01:49.844] <TB0> INFO: ROC 6 VthrComp = 130
[12:01:49.844] <TB0> INFO: ROC 7 VthrComp = 130
[12:01:49.844] <TB0> INFO: ROC 8 VthrComp = 123
[12:01:49.845] <TB0> INFO: ROC 9 VthrComp = 128
[12:01:49.845] <TB0> INFO: ROC 10 VthrComp = 113
[12:01:49.845] <TB0> INFO: ROC 11 VthrComp = 128
[12:01:49.845] <TB0> INFO: ROC 12 VthrComp = 128
[12:01:49.845] <TB0> INFO: ROC 13 VthrComp = 130
[12:01:49.845] <TB0> INFO: ROC 14 VthrComp = 126
[12:01:49.845] <TB0> INFO: ROC 15 VthrComp = 137
[12:01:50.081] <TB0> INFO: Expecting 41600 events.
[12:01:53.621] <TB0> INFO: 41600 events read in total (2948ms).
[12:01:53.622] <TB0> INFO: Test took 3776ms.
[12:01:53.631] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:01:53.631] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:01:53.642] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:01:53.642] <TB0> INFO: run 1 of 1
[12:01:53.920] <TB0> INFO: Expecting 5025280 events.
[12:02:21.032] <TB0> INFO: 590472 events read in total (26520ms).
[12:02:46.566] <TB0> INFO: 1180128 events read in total (52054ms).
[12:03:12.578] <TB0> INFO: 1769904 events read in total (78066ms).
[12:03:38.443] <TB0> INFO: 2359200 events read in total (103931ms).
[12:04:03.890] <TB0> INFO: 2947168 events read in total (129378ms).
[12:04:29.642] <TB0> INFO: 3533736 events read in total (155130ms).
[12:04:54.878] <TB0> INFO: 4119632 events read in total (180366ms).
[12:05:21.058] <TB0> INFO: 4705432 events read in total (206546ms).
[12:05:35.379] <TB0> INFO: 5025280 events read in total (220867ms).
[12:05:35.477] <TB0> INFO: Test took 221836ms.
[12:06:01.290] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 61 for pixel 2/1 mean/min/max = 46.5839/32.1419/61.0258
[12:06:01.290] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 60.6519 for pixel 12/5 mean/min/max = 46.4062/32.1094/60.7031
[12:06:01.290] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 66.9647 for pixel 2/3 mean/min/max = 48.9201/30.6967/67.1435
[12:06:01.291] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 63.6561 for pixel 51/69 mean/min/max = 48.6568/33.6485/63.665
[12:06:01.291] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 59.2397 for pixel 22/15 mean/min/max = 45.977/32.5699/59.384
[12:06:01.292] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 58.4751 for pixel 4/11 mean/min/max = 45.4991/32.4361/58.562
[12:06:01.292] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 59.0835 for pixel 10/8 mean/min/max = 45.9816/32.8445/59.1187
[12:06:01.292] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 61.4931 for pixel 12/7 mean/min/max = 47.0806/32.6276/61.5335
[12:06:01.293] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 69.0236 for pixel 20/10 mean/min/max = 50.0562/30.9465/69.1659
[12:06:01.293] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 68.356 for pixel 15/20 mean/min/max = 49.5513/30.6217/68.4809
[12:06:01.293] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 70.0035 for pixel 0/18 mean/min/max = 51.0023/31.977/70.0276
[12:06:01.294] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 61.4634 for pixel 18/7 mean/min/max = 47.0965/32.6829/61.5101
[12:06:01.294] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 62.27 for pixel 50/3 mean/min/max = 46.8283/31.2114/62.4451
[12:06:01.294] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 61.1458 for pixel 0/16 mean/min/max = 46.8708/32.5641/61.1774
[12:06:01.295] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 69.8085 for pixel 13/4 mean/min/max = 49.7054/29.4386/69.9723
[12:06:01.295] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 68.9338 for pixel 22/5 mean/min/max = 53.2727/37.5002/69.0452
[12:06:01.296] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:06:01.385] <TB0> INFO: Expecting 411648 events.
[12:06:10.003] <TB0> INFO: 411648 events read in total (9027ms).
[12:06:11.011] <TB0> INFO: Expecting 411648 events.
[12:06:20.523] <TB0> INFO: 411648 events read in total (9109ms).
[12:06:20.537] <TB0> INFO: Expecting 411648 events.
[12:06:29.944] <TB0> INFO: 411648 events read in total (9004ms).
[12:06:29.959] <TB0> INFO: Expecting 411648 events.
[12:06:39.326] <TB0> INFO: 411648 events read in total (8964ms).
[12:06:39.341] <TB0> INFO: Expecting 411648 events.
[12:06:48.848] <TB0> INFO: 411648 events read in total (9104ms).
[12:06:48.867] <TB0> INFO: Expecting 411648 events.
[12:06:58.263] <TB0> INFO: 411648 events read in total (8993ms).
[12:06:58.285] <TB0> INFO: Expecting 411648 events.
[12:07:07.658] <TB0> INFO: 411648 events read in total (8970ms).
[12:07:07.682] <TB0> INFO: Expecting 411648 events.
[12:07:17.143] <TB0> INFO: 411648 events read in total (9058ms).
[12:07:17.171] <TB0> INFO: Expecting 411648 events.
[12:07:26.625] <TB0> INFO: 411648 events read in total (9051ms).
[12:07:26.654] <TB0> INFO: Expecting 411648 events.
[12:07:36.152] <TB0> INFO: 411648 events read in total (9095ms).
[12:07:36.186] <TB0> INFO: Expecting 411648 events.
[12:07:45.633] <TB0> INFO: 411648 events read in total (9044ms).
[12:07:45.668] <TB0> INFO: Expecting 411648 events.
[12:07:55.175] <TB0> INFO: 411648 events read in total (9104ms).
[12:07:55.224] <TB0> INFO: Expecting 411648 events.
[12:08:04.641] <TB0> INFO: 411648 events read in total (9014ms).
[12:08:04.720] <TB0> INFO: Expecting 411648 events.
[12:08:14.180] <TB0> INFO: 411648 events read in total (9057ms).
[12:08:14.226] <TB0> INFO: Expecting 411648 events.
[12:08:23.684] <TB0> INFO: 411648 events read in total (9055ms).
[12:08:23.742] <TB0> INFO: Expecting 411648 events.
[12:08:33.241] <TB0> INFO: 411648 events read in total (9096ms).
[12:08:33.296] <TB0> INFO: Test took 152000ms.
[12:08:34.035] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[12:08:34.049] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:08:34.049] <TB0> INFO: run 1 of 1
[12:08:34.325] <TB0> INFO: Expecting 5025280 events.
[12:09:00.872] <TB0> INFO: 587424 events read in total (25955ms).
[12:09:26.379] <TB0> INFO: 1173720 events read in total (51462ms).
[12:09:52.121] <TB0> INFO: 1759864 events read in total (77204ms).
[12:10:18.274] <TB0> INFO: 2345376 events read in total (103357ms).
[12:10:44.629] <TB0> INFO: 2931424 events read in total (129712ms).
[12:11:10.694] <TB0> INFO: 3517280 events read in total (155777ms).
[12:11:36.640] <TB0> INFO: 4102032 events read in total (181723ms).
[12:12:02.590] <TB0> INFO: 4685776 events read in total (207673ms).
[12:12:18.067] <TB0> INFO: 5025280 events read in total (223150ms).
[12:12:18.224] <TB0> INFO: Test took 224176ms.
[12:12:41.004] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 6.782338 .. 147.221538
[12:12:41.247] <TB0> INFO: Expecting 208000 events.
[12:12:50.877] <TB0> INFO: 208000 events read in total (9039ms).
[12:12:50.880] <TB0> INFO: Test took 9875ms.
[12:12:50.937] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 6 .. 157 (-1/-1) hits flags = 528 (plus default)
[12:12:50.949] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:12:50.949] <TB0> INFO: run 1 of 1
[12:12:51.227] <TB0> INFO: Expecting 5058560 events.
[12:13:18.122] <TB0> INFO: 577176 events read in total (26303ms).
[12:13:43.874] <TB0> INFO: 1154880 events read in total (52056ms).
[12:14:09.656] <TB0> INFO: 1732200 events read in total (77837ms).
[12:14:35.151] <TB0> INFO: 2309448 events read in total (103332ms).
[12:15:00.724] <TB0> INFO: 2886904 events read in total (128905ms).
[12:15:26.984] <TB0> INFO: 3463584 events read in total (155165ms).
[12:15:52.942] <TB0> INFO: 4040544 events read in total (181123ms).
[12:16:18.425] <TB0> INFO: 4617176 events read in total (206606ms).
[12:16:37.999] <TB0> INFO: 5058560 events read in total (226180ms).
[12:16:38.105] <TB0> INFO: Test took 227156ms.
[12:17:03.437] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 26.790274 .. 46.461630
[12:17:03.676] <TB0> INFO: Expecting 208000 events.
[12:17:13.701] <TB0> INFO: 208000 events read in total (9433ms).
[12:17:13.702] <TB0> INFO: Test took 10263ms.
[12:17:13.754] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 56 (-1/-1) hits flags = 528 (plus default)
[12:17:13.767] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:17:13.767] <TB0> INFO: run 1 of 1
[12:17:14.045] <TB0> INFO: Expecting 1364480 events.
[12:17:43.221] <TB0> INFO: 660488 events read in total (28584ms).
[12:18:10.860] <TB0> INFO: 1319640 events read in total (56223ms).
[12:18:13.169] <TB0> INFO: 1364480 events read in total (58532ms).
[12:18:13.207] <TB0> INFO: Test took 59440ms.
[12:18:26.495] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 27.801380 .. 51.517294
[12:18:26.733] <TB0> INFO: Expecting 208000 events.
[12:18:36.845] <TB0> INFO: 208000 events read in total (9520ms).
[12:18:36.846] <TB0> INFO: Test took 10348ms.
[12:18:36.916] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 17 .. 61 (-1/-1) hits flags = 528 (plus default)
[12:18:36.930] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:18:36.930] <TB0> INFO: run 1 of 1
[12:18:37.208] <TB0> INFO: Expecting 1497600 events.
[12:19:06.265] <TB0> INFO: 639840 events read in total (28465ms).
[12:19:33.365] <TB0> INFO: 1278552 events read in total (55565ms).
[12:19:42.857] <TB0> INFO: 1497600 events read in total (65057ms).
[12:19:42.888] <TB0> INFO: Test took 65959ms.
[12:19:56.136] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 26.644913 .. 56.048222
[12:19:56.403] <TB0> INFO: Expecting 208000 events.
[12:20:06.193] <TB0> INFO: 208000 events read in total (9198ms).
[12:20:06.194] <TB0> INFO: Test took 10057ms.
[12:20:06.242] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 16 .. 66 (-1/-1) hits flags = 528 (plus default)
[12:20:06.255] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:20:06.255] <TB0> INFO: run 1 of 1
[12:20:06.533] <TB0> INFO: Expecting 1697280 events.
[12:20:35.127] <TB0> INFO: 630200 events read in total (28002ms).
[12:21:01.888] <TB0> INFO: 1259904 events read in total (54763ms).
[12:21:20.327] <TB0> INFO: 1697280 events read in total (73202ms).
[12:21:20.361] <TB0> INFO: Test took 74107ms.
[12:21:35.451] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:21:35.451] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[12:21:35.464] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:21:35.464] <TB0> INFO: run 1 of 1
[12:21:35.723] <TB0> INFO: Expecting 1364480 events.
[12:22:05.072] <TB0> INFO: 667736 events read in total (28757ms).
[12:22:33.453] <TB0> INFO: 1335176 events read in total (57138ms).
[12:22:35.088] <TB0> INFO: 1364480 events read in total (58774ms).
[12:22:35.117] <TB0> INFO: Test took 59653ms.
[12:22:48.337] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C0.dat
[12:22:48.337] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C1.dat
[12:22:48.338] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C2.dat
[12:22:48.338] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C3.dat
[12:22:48.338] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C4.dat
[12:22:48.338] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C5.dat
[12:22:48.338] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C6.dat
[12:22:48.338] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C7.dat
[12:22:48.338] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C8.dat
[12:22:48.338] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C9.dat
[12:22:48.338] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C10.dat
[12:22:48.338] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C11.dat
[12:22:48.338] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C12.dat
[12:22:48.338] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C13.dat
[12:22:48.338] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C14.dat
[12:22:48.339] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C15.dat
[12:22:48.339] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C0.dat
[12:22:48.344] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C1.dat
[12:22:48.348] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C2.dat
[12:22:48.353] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C3.dat
[12:22:48.358] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C4.dat
[12:22:48.362] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C5.dat
[12:22:48.367] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C6.dat
[12:22:48.372] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C7.dat
[12:22:48.377] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C8.dat
[12:22:48.381] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C9.dat
[12:22:48.386] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C10.dat
[12:22:48.391] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C11.dat
[12:22:48.396] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C12.dat
[12:22:48.400] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C13.dat
[12:22:48.405] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C14.dat
[12:22:48.410] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//trimParameters35_C15.dat
[12:22:48.415] <TB0> INFO: PixTestTrim::trimTest() done
[12:22:48.415] <TB0> INFO: vtrim: 125 136 134 136 130 130 114 143 163 174 134 140 133 124 161 176
[12:22:48.415] <TB0> INFO: vthrcomp: 129 133 124 132 132 130 130 130 123 128 113 128 128 130 126 137
[12:22:48.415] <TB0> INFO: vcal mean: 35.23 35.02 35.30 35.17 34.97 34.85 35.00 34.98 36.02 35.22 35.77 35.02 34.99 35.03 35.29 36.41
[12:22:48.415] <TB0> INFO: vcal RMS: 1.46 1.03 1.50 1.28 1.03 0.97 0.98 1.17 2.32 1.38 1.98 1.05 1.11 1.12 1.64 2.65
[12:22:48.415] <TB0> INFO: bits mean: 9.54 9.35 9.42 8.87 9.57 9.62 8.90 9.06 9.94 9.60 9.09 9.46 9.53 8.62 9.97 8.62
[12:22:48.415] <TB0> INFO: bits RMS: 2.68 2.68 2.85 2.63 2.61 2.58 2.82 2.72 2.60 2.67 2.80 2.52 2.74 2.98 2.70 2.43
[12:22:48.422] <TB0> INFO: ----------------------------------------------------------------------
[12:22:48.422] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[12:22:48.422] <TB0> INFO: ----------------------------------------------------------------------
[12:22:48.424] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[12:22:48.435] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:22:48.435] <TB0> INFO: run 1 of 1
[12:22:48.713] <TB0> INFO: Expecting 4160000 events.
[12:23:22.893] <TB0> INFO: 780245 events read in total (33589ms).
[12:23:55.634] <TB0> INFO: 1556330 events read in total (66330ms).
[12:24:28.500] <TB0> INFO: 2328075 events read in total (99197ms).
[12:25:01.137] <TB0> INFO: 3094480 events read in total (131833ms).
[12:25:33.716] <TB0> INFO: 3860960 events read in total (164412ms).
[12:25:46.616] <TB0> INFO: 4160000 events read in total (177312ms).
[12:25:46.701] <TB0> INFO: Test took 178265ms.
[12:26:15.521] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 209 (-1/-1) hits flags = 528 (plus default)
[12:26:15.535] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:26:15.535] <TB0> INFO: run 1 of 1
[12:26:15.862] <TB0> INFO: Expecting 4368000 events.
[12:26:48.877] <TB0> INFO: 738670 events read in total (32423ms).
[12:27:20.787] <TB0> INFO: 1472845 events read in total (64333ms).
[12:27:52.735] <TB0> INFO: 2205875 events read in total (96281ms).
[12:28:24.306] <TB0> INFO: 2934770 events read in total (127852ms).
[12:28:56.172] <TB0> INFO: 3662490 events read in total (159718ms).
[12:29:27.142] <TB0> INFO: 4368000 events read in total (190688ms).
[12:29:27.224] <TB0> INFO: Test took 191689ms.
[12:29:52.851] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[12:29:52.863] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:29:52.863] <TB0> INFO: run 1 of 1
[12:29:53.111] <TB0> INFO: Expecting 4305600 events.
[12:30:25.656] <TB0> INFO: 742990 events read in total (31953ms).
[12:30:56.821] <TB0> INFO: 1481665 events read in total (63118ms).
[12:31:28.903] <TB0> INFO: 2218860 events read in total (95200ms).
[12:32:00.604] <TB0> INFO: 2951555 events read in total (126901ms).
[12:32:32.417] <TB0> INFO: 3684075 events read in total (158714ms).
[12:32:59.147] <TB0> INFO: 4305600 events read in total (185444ms).
[12:32:59.241] <TB0> INFO: Test took 186377ms.
[12:33:25.972] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[12:33:25.986] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:33:25.986] <TB0> INFO: run 1 of 1
[12:33:26.244] <TB0> INFO: Expecting 4264000 events.
[12:33:59.673] <TB0> INFO: 746345 events read in total (32837ms).
[12:34:30.887] <TB0> INFO: 1488040 events read in total (64051ms).
[12:35:02.791] <TB0> INFO: 2228415 events read in total (95955ms).
[12:35:34.832] <TB0> INFO: 2964130 events read in total (127996ms).
[12:36:06.781] <TB0> INFO: 3699595 events read in total (159945ms).
[12:36:31.205] <TB0> INFO: 4264000 events read in total (184369ms).
[12:36:31.312] <TB0> INFO: Test took 185326ms.
[12:36:56.386] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 202 (-1/-1) hits flags = 528 (plus default)
[12:36:56.399] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:36:56.399] <TB0> INFO: run 1 of 1
[12:36:56.636] <TB0> INFO: Expecting 4222400 events.
[12:37:29.350] <TB0> INFO: 749210 events read in total (32123ms).
[12:38:01.320] <TB0> INFO: 1493970 events read in total (64093ms).
[12:38:33.675] <TB0> INFO: 2236855 events read in total (96448ms).
[12:39:05.426] <TB0> INFO: 2975190 events read in total (128199ms).
[12:39:37.500] <TB0> INFO: 3713265 events read in total (160273ms).
[12:39:59.419] <TB0> INFO: 4222400 events read in total (182192ms).
[12:39:59.488] <TB0> INFO: Test took 183089ms.
[12:40:23.053] <TB0> INFO: PixTestTrim::trimBitTest() done
[12:40:23.055] <TB0> INFO: PixTestTrim::doTest() done, duration: 2515 seconds
[12:40:23.055] <TB0> INFO: Decoding statistics:
[12:40:23.055] <TB0> INFO: General information:
[12:40:23.055] <TB0> INFO: 16bit words read: 0
[12:40:23.055] <TB0> INFO: valid events total: 0
[12:40:23.055] <TB0> INFO: empty events: 0
[12:40:23.055] <TB0> INFO: valid events with pixels: 0
[12:40:23.055] <TB0> INFO: valid pixel hits: 0
[12:40:23.055] <TB0> INFO: Event errors: 0
[12:40:23.055] <TB0> INFO: start marker: 0
[12:40:23.055] <TB0> INFO: stop marker: 0
[12:40:23.055] <TB0> INFO: overflow: 0
[12:40:23.055] <TB0> INFO: invalid 5bit words: 0
[12:40:23.055] <TB0> INFO: invalid XOR eye diagram: 0
[12:40:23.055] <TB0> INFO: frame (failed synchr.): 0
[12:40:23.055] <TB0> INFO: idle data (no TBM trl): 0
[12:40:23.055] <TB0> INFO: no data (only TBM hdr): 0
[12:40:23.055] <TB0> INFO: TBM errors: 0
[12:40:23.055] <TB0> INFO: flawed TBM headers: 0
[12:40:23.055] <TB0> INFO: flawed TBM trailers: 0
[12:40:23.055] <TB0> INFO: event ID mismatches: 0
[12:40:23.055] <TB0> INFO: ROC errors: 0
[12:40:23.055] <TB0> INFO: missing ROC header(s): 0
[12:40:23.055] <TB0> INFO: misplaced readback start: 0
[12:40:23.055] <TB0> INFO: Pixel decoding errors: 0
[12:40:23.055] <TB0> INFO: pixel data incomplete: 0
[12:40:23.055] <TB0> INFO: pixel address: 0
[12:40:23.055] <TB0> INFO: pulse height fill bit: 0
[12:40:23.055] <TB0> INFO: buffer corruption: 0
[12:40:23.728] <TB0> INFO: ######################################################################
[12:40:23.728] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:40:23.728] <TB0> INFO: ######################################################################
[12:40:23.983] <TB0> INFO: Expecting 41600 events.
[12:40:27.652] <TB0> INFO: 41600 events read in total (3077ms).
[12:40:27.653] <TB0> INFO: Test took 3924ms.
[12:40:28.116] <TB0> INFO: Expecting 41600 events.
[12:40:31.677] <TB0> INFO: 41600 events read in total (2970ms).
[12:40:31.678] <TB0> INFO: Test took 3820ms.
[12:40:31.970] <TB0> INFO: Expecting 41600 events.
[12:40:35.523] <TB0> INFO: 41600 events read in total (2961ms).
[12:40:35.524] <TB0> INFO: Test took 3819ms.
[12:40:35.813] <TB0> INFO: Expecting 41600 events.
[12:40:39.322] <TB0> INFO: 41600 events read in total (2918ms).
[12:40:39.323] <TB0> INFO: Test took 3775ms.
[12:40:39.613] <TB0> INFO: Expecting 41600 events.
[12:40:43.147] <TB0> INFO: 41600 events read in total (2943ms).
[12:40:43.148] <TB0> INFO: Test took 3801ms.
[12:40:43.437] <TB0> INFO: Expecting 41600 events.
[12:40:46.924] <TB0> INFO: 41600 events read in total (2895ms).
[12:40:46.925] <TB0> INFO: Test took 3753ms.
[12:40:47.216] <TB0> INFO: Expecting 41600 events.
[12:40:50.766] <TB0> INFO: 41600 events read in total (2959ms).
[12:40:50.767] <TB0> INFO: Test took 3816ms.
[12:40:51.067] <TB0> INFO: Expecting 41600 events.
[12:40:54.650] <TB0> INFO: 41600 events read in total (2991ms).
[12:40:54.651] <TB0> INFO: Test took 3860ms.
[12:40:54.941] <TB0> INFO: Expecting 41600 events.
[12:40:58.526] <TB0> INFO: 41600 events read in total (2994ms).
[12:40:58.527] <TB0> INFO: Test took 3852ms.
[12:40:58.816] <TB0> INFO: Expecting 41600 events.
[12:41:02.492] <TB0> INFO: 41600 events read in total (3085ms).
[12:41:02.493] <TB0> INFO: Test took 3942ms.
[12:41:02.785] <TB0> INFO: Expecting 41600 events.
[12:41:06.239] <TB0> INFO: 41600 events read in total (2863ms).
[12:41:06.240] <TB0> INFO: Test took 3720ms.
[12:41:06.531] <TB0> INFO: Expecting 41600 events.
[12:41:09.003] <TB0> INFO: 41600 events read in total (2880ms).
[12:41:10.004] <TB0> INFO: Test took 3738ms.
[12:41:10.292] <TB0> INFO: Expecting 41600 events.
[12:41:13.741] <TB0> INFO: 41600 events read in total (2857ms).
[12:41:13.742] <TB0> INFO: Test took 3714ms.
[12:41:14.038] <TB0> INFO: Expecting 41600 events.
[12:41:17.738] <TB0> INFO: 41600 events read in total (3109ms).
[12:41:17.739] <TB0> INFO: Test took 3973ms.
[12:41:18.046] <TB0> INFO: Expecting 41600 events.
[12:41:21.568] <TB0> INFO: 41600 events read in total (2930ms).
[12:41:21.569] <TB0> INFO: Test took 3803ms.
[12:41:21.921] <TB0> INFO: Expecting 41600 events.
[12:41:25.493] <TB0> INFO: 41600 events read in total (2980ms).
[12:41:25.494] <TB0> INFO: Test took 3897ms.
[12:41:25.786] <TB0> INFO: Expecting 41600 events.
[12:41:29.460] <TB0> INFO: 41600 events read in total (3083ms).
[12:41:29.461] <TB0> INFO: Test took 3940ms.
[12:41:29.814] <TB0> INFO: Expecting 41600 events.
[12:41:33.376] <TB0> INFO: 41600 events read in total (2970ms).
[12:41:33.377] <TB0> INFO: Test took 3888ms.
[12:41:33.668] <TB0> INFO: Expecting 41600 events.
[12:41:37.114] <TB0> INFO: 41600 events read in total (2853ms).
[12:41:37.115] <TB0> INFO: Test took 3712ms.
[12:41:37.404] <TB0> INFO: Expecting 41600 events.
[12:41:40.935] <TB0> INFO: 41600 events read in total (2939ms).
[12:41:40.936] <TB0> INFO: Test took 3796ms.
[12:41:41.227] <TB0> INFO: Expecting 41600 events.
[12:41:44.788] <TB0> INFO: 41600 events read in total (2969ms).
[12:41:44.789] <TB0> INFO: Test took 3827ms.
[12:41:45.078] <TB0> INFO: Expecting 41600 events.
[12:41:48.651] <TB0> INFO: 41600 events read in total (2982ms).
[12:41:48.652] <TB0> INFO: Test took 3839ms.
[12:41:48.946] <TB0> INFO: Expecting 41600 events.
[12:41:52.502] <TB0> INFO: 41600 events read in total (2965ms).
[12:41:52.503] <TB0> INFO: Test took 3822ms.
[12:41:52.823] <TB0> INFO: Expecting 41600 events.
[12:41:56.285] <TB0> INFO: 41600 events read in total (2871ms).
[12:41:56.285] <TB0> INFO: Test took 3753ms.
[12:41:56.632] <TB0> INFO: Expecting 41600 events.
[12:42:00.098] <TB0> INFO: 41600 events read in total (2875ms).
[12:42:00.099] <TB0> INFO: Test took 3790ms.
[12:42:00.388] <TB0> INFO: Expecting 41600 events.
[12:42:03.978] <TB0> INFO: 41600 events read in total (2999ms).
[12:42:03.978] <TB0> INFO: Test took 3856ms.
[12:42:04.269] <TB0> INFO: Expecting 41600 events.
[12:42:07.768] <TB0> INFO: 41600 events read in total (2907ms).
[12:42:07.768] <TB0> INFO: Test took 3763ms.
[12:42:08.065] <TB0> INFO: Expecting 41600 events.
[12:42:11.536] <TB0> INFO: 41600 events read in total (2879ms).
[12:42:11.537] <TB0> INFO: Test took 3745ms.
[12:42:11.826] <TB0> INFO: Expecting 41600 events.
[12:42:15.322] <TB0> INFO: 41600 events read in total (2905ms).
[12:42:15.323] <TB0> INFO: Test took 3762ms.
[12:42:15.613] <TB0> INFO: Expecting 41600 events.
[12:42:19.162] <TB0> INFO: 41600 events read in total (2957ms).
[12:42:19.163] <TB0> INFO: Test took 3815ms.
[12:42:19.452] <TB0> INFO: Expecting 2560 events.
[12:42:20.343] <TB0> INFO: 2560 events read in total (299ms).
[12:42:20.343] <TB0> INFO: Test took 1167ms.
[12:42:20.652] <TB0> INFO: Expecting 2560 events.
[12:42:21.543] <TB0> INFO: 2560 events read in total (299ms).
[12:42:21.543] <TB0> INFO: Test took 1199ms.
[12:42:21.851] <TB0> INFO: Expecting 2560 events.
[12:42:22.743] <TB0> INFO: 2560 events read in total (300ms).
[12:42:22.743] <TB0> INFO: Test took 1199ms.
[12:42:23.052] <TB0> INFO: Expecting 2560 events.
[12:42:23.936] <TB0> INFO: 2560 events read in total (293ms).
[12:42:23.936] <TB0> INFO: Test took 1193ms.
[12:42:24.243] <TB0> INFO: Expecting 2560 events.
[12:42:25.130] <TB0> INFO: 2560 events read in total (296ms).
[12:42:25.130] <TB0> INFO: Test took 1193ms.
[12:42:25.437] <TB0> INFO: Expecting 2560 events.
[12:42:26.320] <TB0> INFO: 2560 events read in total (291ms).
[12:42:26.321] <TB0> INFO: Test took 1190ms.
[12:42:26.629] <TB0> INFO: Expecting 2560 events.
[12:42:27.508] <TB0> INFO: 2560 events read in total (288ms).
[12:42:27.508] <TB0> INFO: Test took 1187ms.
[12:42:27.817] <TB0> INFO: Expecting 2560 events.
[12:42:28.697] <TB0> INFO: 2560 events read in total (288ms).
[12:42:28.697] <TB0> INFO: Test took 1189ms.
[12:42:29.006] <TB0> INFO: Expecting 2560 events.
[12:42:29.887] <TB0> INFO: 2560 events read in total (289ms).
[12:42:29.887] <TB0> INFO: Test took 1190ms.
[12:42:30.194] <TB0> INFO: Expecting 2560 events.
[12:42:31.076] <TB0> INFO: 2560 events read in total (290ms).
[12:42:31.076] <TB0> INFO: Test took 1188ms.
[12:42:31.383] <TB0> INFO: Expecting 2560 events.
[12:42:32.271] <TB0> INFO: 2560 events read in total (296ms).
[12:42:32.272] <TB0> INFO: Test took 1196ms.
[12:42:32.578] <TB0> INFO: Expecting 2560 events.
[12:42:33.469] <TB0> INFO: 2560 events read in total (299ms).
[12:42:33.470] <TB0> INFO: Test took 1197ms.
[12:42:33.779] <TB0> INFO: Expecting 2560 events.
[12:42:34.662] <TB0> INFO: 2560 events read in total (292ms).
[12:42:34.662] <TB0> INFO: Test took 1192ms.
[12:42:34.970] <TB0> INFO: Expecting 2560 events.
[12:42:35.861] <TB0> INFO: 2560 events read in total (299ms).
[12:42:35.862] <TB0> INFO: Test took 1200ms.
[12:42:36.170] <TB0> INFO: Expecting 2560 events.
[12:42:37.063] <TB0> INFO: 2560 events read in total (301ms).
[12:42:37.063] <TB0> INFO: Test took 1201ms.
[12:42:37.371] <TB0> INFO: Expecting 2560 events.
[12:42:38.260] <TB0> INFO: 2560 events read in total (298ms).
[12:42:38.261] <TB0> INFO: Test took 1197ms.
[12:42:38.264] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:42:38.569] <TB0> INFO: Expecting 655360 events.
[12:42:53.437] <TB0> INFO: 655360 events read in total (14276ms).
[12:42:53.449] <TB0> INFO: Expecting 655360 events.
[12:43:08.099] <TB0> INFO: 655360 events read in total (14247ms).
[12:43:08.115] <TB0> INFO: Expecting 655360 events.
[12:43:22.684] <TB0> INFO: 655360 events read in total (14166ms).
[12:43:22.705] <TB0> INFO: Expecting 655360 events.
[12:43:37.260] <TB0> INFO: 655360 events read in total (14152ms).
[12:43:37.286] <TB0> INFO: Expecting 655360 events.
[12:43:52.052] <TB0> INFO: 655360 events read in total (14362ms).
[12:43:52.081] <TB0> INFO: Expecting 655360 events.
[12:44:06.996] <TB0> INFO: 655360 events read in total (14512ms).
[12:44:07.042] <TB0> INFO: Expecting 655360 events.
[12:44:21.718] <TB0> INFO: 655360 events read in total (14273ms).
[12:44:21.783] <TB0> INFO: Expecting 655360 events.
[12:44:36.451] <TB0> INFO: 655360 events read in total (14265ms).
[12:44:36.495] <TB0> INFO: Expecting 655360 events.
[12:44:51.246] <TB0> INFO: 655360 events read in total (14348ms).
[12:44:51.320] <TB0> INFO: Expecting 655360 events.
[12:45:06.210] <TB0> INFO: 655360 events read in total (14487ms).
[12:45:06.279] <TB0> INFO: Expecting 655360 events.
[12:45:21.450] <TB0> INFO: 655360 events read in total (14768ms).
[12:45:21.529] <TB0> INFO: Expecting 655360 events.
[12:45:36.021] <TB0> INFO: 655360 events read in total (14089ms).
[12:45:36.177] <TB0> INFO: Expecting 655360 events.
[12:45:50.771] <TB0> INFO: 655360 events read in total (14191ms).
[12:45:50.950] <TB0> INFO: Expecting 655360 events.
[12:46:05.561] <TB0> INFO: 655360 events read in total (14208ms).
[12:46:05.698] <TB0> INFO: Expecting 655360 events.
[12:46:20.211] <TB0> INFO: 655360 events read in total (14110ms).
[12:46:20.335] <TB0> INFO: Expecting 655360 events.
[12:46:34.872] <TB0> INFO: 655360 events read in total (14134ms).
[12:46:34.971] <TB0> INFO: Test took 236707ms.
[12:46:35.081] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:46:35.339] <TB0> INFO: Expecting 655360 events.
[12:46:50.226] <TB0> INFO: 655360 events read in total (14295ms).
[12:46:50.240] <TB0> INFO: Expecting 655360 events.
[12:47:04.677] <TB0> INFO: 655360 events read in total (14034ms).
[12:47:04.692] <TB0> INFO: Expecting 655360 events.
[12:47:19.180] <TB0> INFO: 655360 events read in total (14085ms).
[12:47:19.200] <TB0> INFO: Expecting 655360 events.
[12:47:33.358] <TB0> INFO: 655360 events read in total (13755ms).
[12:47:33.381] <TB0> INFO: Expecting 655360 events.
[12:47:47.905] <TB0> INFO: 655360 events read in total (14121ms).
[12:47:47.933] <TB0> INFO: Expecting 655360 events.
[12:48:02.501] <TB0> INFO: 655360 events read in total (14165ms).
[12:48:02.536] <TB0> INFO: Expecting 655360 events.
[12:48:17.103] <TB0> INFO: 655360 events read in total (14164ms).
[12:48:17.145] <TB0> INFO: Expecting 655360 events.
[12:48:31.497] <TB0> INFO: 655360 events read in total (13949ms).
[12:48:31.538] <TB0> INFO: Expecting 655360 events.
[12:48:46.119] <TB0> INFO: 655360 events read in total (14178ms).
[12:48:46.267] <TB0> INFO: Expecting 655360 events.
[12:49:00.811] <TB0> INFO: 655360 events read in total (14137ms).
[12:49:00.864] <TB0> INFO: Expecting 655360 events.
[12:49:15.322] <TB0> INFO: 655360 events read in total (14055ms).
[12:49:15.393] <TB0> INFO: Expecting 655360 events.
[12:49:29.876] <TB0> INFO: 655360 events read in total (14080ms).
[12:49:29.948] <TB0> INFO: Expecting 655360 events.
[12:49:44.421] <TB0> INFO: 655360 events read in total (14069ms).
[12:49:44.550] <TB0> INFO: Expecting 655360 events.
[12:49:59.088] <TB0> INFO: 655360 events read in total (14135ms).
[12:49:59.202] <TB0> INFO: Expecting 655360 events.
[12:50:13.629] <TB0> INFO: 655360 events read in total (14024ms).
[12:50:13.745] <TB0> INFO: Expecting 655360 events.
[12:50:28.108] <TB0> INFO: 655360 events read in total (13960ms).
[12:50:28.221] <TB0> INFO: Test took 233140ms.
[12:50:28.388] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:50:28.394] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:50:28.400] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:50:28.406] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[12:50:28.412] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:50:28.418] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:50:28.424] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:50:28.430] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:50:28.436] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[12:50:28.442] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[12:50:28.448] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[12:50:28.454] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[12:50:28.460] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[12:50:28.466] <TB0> INFO: safety margin for low PH: adding 8, margin is now 28
[12:50:28.471] <TB0> INFO: safety margin for low PH: adding 9, margin is now 29
[12:50:28.477] <TB0> INFO: safety margin for low PH: adding 10, margin is now 30
[12:50:28.483] <TB0> INFO: safety margin for low PH: adding 11, margin is now 31
[12:50:28.489] <TB0> INFO: safety margin for low PH: adding 12, margin is now 32
[12:50:28.496] <TB0> INFO: safety margin for low PH: adding 13, margin is now 33
[12:50:28.501] <TB0> INFO: safety margin for low PH: adding 14, margin is now 34
[12:50:28.507] <TB0> INFO: safety margin for low PH: adding 15, margin is now 35
[12:50:28.513] <TB0> INFO: safety margin for low PH: adding 16, margin is now 36
[12:50:28.519] <TB0> INFO: safety margin for low PH: adding 17, margin is now 37
[12:50:28.525] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:50:28.531] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:50:28.536] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:50:28.543] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:50:28.549] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:50:28.554] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:50:28.561] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:50:28.567] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:50:28.572] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:50:28.578] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:50:28.584] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:50:28.589] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:50:28.596] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:50:28.601] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:50:28.607] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[12:50:28.614] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:50:28.619] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:50:28.625] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:50:28.631] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[12:50:28.636] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:50:28.642] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:50:28.648] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:50:28.654] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:50:28.660] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:50:28.666] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:50:28.672] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:50:28.679] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[12:50:28.713] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C0.dat
[12:50:28.713] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C1.dat
[12:50:28.713] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C2.dat
[12:50:28.713] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C3.dat
[12:50:28.713] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C4.dat
[12:50:28.713] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C5.dat
[12:50:28.714] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C6.dat
[12:50:28.714] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C7.dat
[12:50:28.714] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C8.dat
[12:50:28.714] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C9.dat
[12:50:28.714] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C10.dat
[12:50:28.714] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C11.dat
[12:50:28.714] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C12.dat
[12:50:28.714] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C13.dat
[12:50:28.714] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C14.dat
[12:50:28.714] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//dacParameters35_C15.dat
[12:50:28.972] <TB0> INFO: Expecting 41600 events.
[12:50:32.138] <TB0> INFO: 41600 events read in total (2574ms).
[12:50:32.139] <TB0> INFO: Test took 3422ms.
[12:50:32.592] <TB0> INFO: Expecting 41600 events.
[12:50:35.669] <TB0> INFO: 41600 events read in total (2485ms).
[12:50:35.670] <TB0> INFO: Test took 3320ms.
[12:50:36.130] <TB0> INFO: Expecting 41600 events.
[12:50:39.238] <TB0> INFO: 41600 events read in total (2516ms).
[12:50:39.239] <TB0> INFO: Test took 3353ms.
[12:50:39.456] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:50:39.546] <TB0> INFO: Expecting 2560 events.
[12:50:40.430] <TB0> INFO: 2560 events read in total (293ms).
[12:50:40.430] <TB0> INFO: Test took 974ms.
[12:50:40.433] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:50:40.739] <TB0> INFO: Expecting 2560 events.
[12:50:41.625] <TB0> INFO: 2560 events read in total (295ms).
[12:50:41.626] <TB0> INFO: Test took 1193ms.
[12:50:41.627] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:50:41.935] <TB0> INFO: Expecting 2560 events.
[12:50:42.820] <TB0> INFO: 2560 events read in total (294ms).
[12:50:42.820] <TB0> INFO: Test took 1193ms.
[12:50:42.823] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:50:43.128] <TB0> INFO: Expecting 2560 events.
[12:50:44.010] <TB0> INFO: 2560 events read in total (291ms).
[12:50:44.011] <TB0> INFO: Test took 1188ms.
[12:50:44.012] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:50:44.320] <TB0> INFO: Expecting 2560 events.
[12:50:45.205] <TB0> INFO: 2560 events read in total (293ms).
[12:50:45.206] <TB0> INFO: Test took 1194ms.
[12:50:45.210] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:50:45.513] <TB0> INFO: Expecting 2560 events.
[12:50:46.411] <TB0> INFO: 2560 events read in total (306ms).
[12:50:46.411] <TB0> INFO: Test took 1201ms.
[12:50:46.414] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:50:46.719] <TB0> INFO: Expecting 2560 events.
[12:50:47.612] <TB0> INFO: 2560 events read in total (301ms).
[12:50:47.613] <TB0> INFO: Test took 1199ms.
[12:50:47.617] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:50:47.921] <TB0> INFO: Expecting 2560 events.
[12:50:48.817] <TB0> INFO: 2560 events read in total (305ms).
[12:50:48.818] <TB0> INFO: Test took 1201ms.
[12:50:48.821] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:50:49.126] <TB0> INFO: Expecting 2560 events.
[12:50:50.016] <TB0> INFO: 2560 events read in total (298ms).
[12:50:50.017] <TB0> INFO: Test took 1196ms.
[12:50:50.020] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:50:50.325] <TB0> INFO: Expecting 2560 events.
[12:50:51.211] <TB0> INFO: 2560 events read in total (295ms).
[12:50:51.211] <TB0> INFO: Test took 1191ms.
[12:50:51.214] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:50:51.520] <TB0> INFO: Expecting 2560 events.
[12:50:52.407] <TB0> INFO: 2560 events read in total (295ms).
[12:50:52.408] <TB0> INFO: Test took 1194ms.
[12:50:52.411] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:50:52.715] <TB0> INFO: Expecting 2560 events.
[12:50:53.607] <TB0> INFO: 2560 events read in total (300ms).
[12:50:53.608] <TB0> INFO: Test took 1197ms.
[12:50:53.613] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:50:53.916] <TB0> INFO: Expecting 2560 events.
[12:50:54.801] <TB0> INFO: 2560 events read in total (294ms).
[12:50:54.801] <TB0> INFO: Test took 1188ms.
[12:50:54.804] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:50:55.110] <TB0> INFO: Expecting 2560 events.
[12:50:55.996] <TB0> INFO: 2560 events read in total (295ms).
[12:50:55.996] <TB0> INFO: Test took 1192ms.
[12:50:55.999] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:50:56.305] <TB0> INFO: Expecting 2560 events.
[12:50:57.195] <TB0> INFO: 2560 events read in total (298ms).
[12:50:57.195] <TB0> INFO: Test took 1196ms.
[12:50:57.198] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:50:57.503] <TB0> INFO: Expecting 2560 events.
[12:50:58.391] <TB0> INFO: 2560 events read in total (297ms).
[12:50:58.391] <TB0> INFO: Test took 1194ms.
[12:50:58.396] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:50:58.699] <TB0> INFO: Expecting 2560 events.
[12:50:59.578] <TB0> INFO: 2560 events read in total (287ms).
[12:50:59.578] <TB0> INFO: Test took 1182ms.
[12:50:59.581] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:50:59.887] <TB0> INFO: Expecting 2560 events.
[12:51:00.768] <TB0> INFO: 2560 events read in total (290ms).
[12:51:00.768] <TB0> INFO: Test took 1187ms.
[12:51:00.772] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:51:01.077] <TB0> INFO: Expecting 2560 events.
[12:51:01.962] <TB0> INFO: 2560 events read in total (293ms).
[12:51:01.962] <TB0> INFO: Test took 1190ms.
[12:51:01.965] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:51:02.270] <TB0> INFO: Expecting 2560 events.
[12:51:03.158] <TB0> INFO: 2560 events read in total (296ms).
[12:51:03.158] <TB0> INFO: Test took 1193ms.
[12:51:03.161] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:51:03.468] <TB0> INFO: Expecting 2560 events.
[12:51:04.351] <TB0> INFO: 2560 events read in total (292ms).
[12:51:04.351] <TB0> INFO: Test took 1190ms.
[12:51:04.354] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:51:04.660] <TB0> INFO: Expecting 2560 events.
[12:51:05.540] <TB0> INFO: 2560 events read in total (288ms).
[12:51:05.540] <TB0> INFO: Test took 1187ms.
[12:51:05.542] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:51:05.848] <TB0> INFO: Expecting 2560 events.
[12:51:06.729] <TB0> INFO: 2560 events read in total (290ms).
[12:51:06.729] <TB0> INFO: Test took 1188ms.
[12:51:06.732] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:51:07.038] <TB0> INFO: Expecting 2560 events.
[12:51:07.916] <TB0> INFO: 2560 events read in total (286ms).
[12:51:07.916] <TB0> INFO: Test took 1185ms.
[12:51:07.919] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:51:08.225] <TB0> INFO: Expecting 2560 events.
[12:51:09.111] <TB0> INFO: 2560 events read in total (294ms).
[12:51:09.111] <TB0> INFO: Test took 1193ms.
[12:51:09.114] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:51:09.420] <TB0> INFO: Expecting 2560 events.
[12:51:10.304] <TB0> INFO: 2560 events read in total (292ms).
[12:51:10.304] <TB0> INFO: Test took 1191ms.
[12:51:10.307] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:51:10.612] <TB0> INFO: Expecting 2560 events.
[12:51:11.495] <TB0> INFO: 2560 events read in total (291ms).
[12:51:11.496] <TB0> INFO: Test took 1189ms.
[12:51:11.499] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:51:11.804] <TB0> INFO: Expecting 2560 events.
[12:51:12.691] <TB0> INFO: 2560 events read in total (297ms).
[12:51:12.692] <TB0> INFO: Test took 1193ms.
[12:51:12.695] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:51:12.000] <TB0> INFO: Expecting 2560 events.
[12:51:13.893] <TB0> INFO: 2560 events read in total (301ms).
[12:51:13.893] <TB0> INFO: Test took 1198ms.
[12:51:13.895] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:51:14.202] <TB0> INFO: Expecting 2560 events.
[12:51:15.095] <TB0> INFO: 2560 events read in total (301ms).
[12:51:15.095] <TB0> INFO: Test took 1200ms.
[12:51:15.097] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:51:15.403] <TB0> INFO: Expecting 2560 events.
[12:51:16.299] <TB0> INFO: 2560 events read in total (304ms).
[12:51:16.300] <TB0> INFO: Test took 1203ms.
[12:51:16.303] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:51:16.607] <TB0> INFO: Expecting 2560 events.
[12:51:17.500] <TB0> INFO: 2560 events read in total (301ms).
[12:51:17.500] <TB0> INFO: Test took 1197ms.
[12:51:17.977] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 654 seconds
[12:51:17.977] <TB0> INFO: PH scale (per ROC): 35 54 31 44 38 48 45 42 42 46 33 48 48 29 31 30
[12:51:17.977] <TB0> INFO: PH offset (per ROC): 84 115 97 104 97 113 101 106 86 93 93 110 96 99 99 83
[12:51:17.984] <TB0> INFO: Decoding statistics:
[12:51:17.984] <TB0> INFO: General information:
[12:51:17.984] <TB0> INFO: 16bit words read: 126912
[12:51:17.984] <TB0> INFO: valid events total: 20480
[12:51:17.984] <TB0> INFO: empty events: 18464
[12:51:17.984] <TB0> INFO: valid events with pixels: 2016
[12:51:17.984] <TB0> INFO: valid pixel hits: 2016
[12:51:17.984] <TB0> INFO: Event errors: 0
[12:51:17.984] <TB0> INFO: start marker: 0
[12:51:17.984] <TB0> INFO: stop marker: 0
[12:51:17.984] <TB0> INFO: overflow: 0
[12:51:17.984] <TB0> INFO: invalid 5bit words: 0
[12:51:17.984] <TB0> INFO: invalid XOR eye diagram: 0
[12:51:17.984] <TB0> INFO: frame (failed synchr.): 0
[12:51:17.984] <TB0> INFO: idle data (no TBM trl): 0
[12:51:17.984] <TB0> INFO: no data (only TBM hdr): 0
[12:51:17.984] <TB0> INFO: TBM errors: 0
[12:51:17.984] <TB0> INFO: flawed TBM headers: 0
[12:51:17.984] <TB0> INFO: flawed TBM trailers: 0
[12:51:17.984] <TB0> INFO: event ID mismatches: 0
[12:51:17.984] <TB0> INFO: ROC errors: 0
[12:51:17.984] <TB0> INFO: missing ROC header(s): 0
[12:51:17.984] <TB0> INFO: misplaced readback start: 0
[12:51:17.984] <TB0> INFO: Pixel decoding errors: 0
[12:51:17.984] <TB0> INFO: pixel data incomplete: 0
[12:51:17.984] <TB0> INFO: pixel address: 0
[12:51:17.984] <TB0> INFO: pulse height fill bit: 0
[12:51:17.984] <TB0> INFO: buffer corruption: 0
[12:51:18.144] <TB0> INFO: ######################################################################
[12:51:18.144] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[12:51:18.144] <TB0> INFO: ######################################################################
[12:51:18.157] <TB0> INFO: scanning low vcal = 10
[12:51:18.393] <TB0> INFO: Expecting 41600 events.
[12:51:21.955] <TB0> INFO: 41600 events read in total (2970ms).
[12:51:21.955] <TB0> INFO: Test took 3797ms.
[12:51:21.958] <TB0> INFO: scanning low vcal = 20
[12:51:22.253] <TB0> INFO: Expecting 41600 events.
[12:51:25.822] <TB0> INFO: 41600 events read in total (2977ms).
[12:51:25.822] <TB0> INFO: Test took 3864ms.
[12:51:25.824] <TB0> INFO: scanning low vcal = 30
[12:51:26.119] <TB0> INFO: Expecting 41600 events.
[12:51:29.786] <TB0> INFO: 41600 events read in total (3075ms).
[12:51:29.787] <TB0> INFO: Test took 3963ms.
[12:51:29.790] <TB0> INFO: scanning low vcal = 40
[12:51:30.067] <TB0> INFO: Expecting 41600 events.
[12:51:34.043] <TB0> INFO: 41600 events read in total (3385ms).
[12:51:34.045] <TB0> INFO: Test took 4255ms.
[12:51:34.048] <TB0> INFO: scanning low vcal = 50
[12:51:34.325] <TB0> INFO: Expecting 41600 events.
[12:51:38.319] <TB0> INFO: 41600 events read in total (3403ms).
[12:51:38.320] <TB0> INFO: Test took 4272ms.
[12:51:38.323] <TB0> INFO: scanning low vcal = 60
[12:51:38.600] <TB0> INFO: Expecting 41600 events.
[12:51:42.632] <TB0> INFO: 41600 events read in total (3440ms).
[12:51:42.633] <TB0> INFO: Test took 4309ms.
[12:51:42.636] <TB0> INFO: scanning low vcal = 70
[12:51:42.913] <TB0> INFO: Expecting 41600 events.
[12:51:46.964] <TB0> INFO: 41600 events read in total (3459ms).
[12:51:46.965] <TB0> INFO: Test took 4329ms.
[12:51:46.968] <TB0> INFO: scanning low vcal = 80
[12:51:47.246] <TB0> INFO: Expecting 41600 events.
[12:51:51.221] <TB0> INFO: 41600 events read in total (3384ms).
[12:51:51.222] <TB0> INFO: Test took 4254ms.
[12:51:51.225] <TB0> INFO: scanning low vcal = 90
[12:51:51.501] <TB0> INFO: Expecting 41600 events.
[12:51:55.494] <TB0> INFO: 41600 events read in total (3401ms).
[12:51:55.495] <TB0> INFO: Test took 4270ms.
[12:51:55.501] <TB0> INFO: scanning low vcal = 100
[12:51:55.776] <TB0> INFO: Expecting 41600 events.
[12:51:59.828] <TB0> INFO: 41600 events read in total (3460ms).
[12:51:59.829] <TB0> INFO: Test took 4328ms.
[12:51:59.832] <TB0> INFO: scanning low vcal = 110
[12:52:00.110] <TB0> INFO: Expecting 41600 events.
[12:52:04.104] <TB0> INFO: 41600 events read in total (3402ms).
[12:52:04.105] <TB0> INFO: Test took 4272ms.
[12:52:04.107] <TB0> INFO: scanning low vcal = 120
[12:52:04.384] <TB0> INFO: Expecting 41600 events.
[12:52:08.411] <TB0> INFO: 41600 events read in total (3435ms).
[12:52:08.412] <TB0> INFO: Test took 4304ms.
[12:52:08.415] <TB0> INFO: scanning low vcal = 130
[12:52:08.692] <TB0> INFO: Expecting 41600 events.
[12:52:12.725] <TB0> INFO: 41600 events read in total (3441ms).
[12:52:12.726] <TB0> INFO: Test took 4311ms.
[12:52:12.729] <TB0> INFO: scanning low vcal = 140
[12:52:13.006] <TB0> INFO: Expecting 41600 events.
[12:52:16.984] <TB0> INFO: 41600 events read in total (3386ms).
[12:52:16.985] <TB0> INFO: Test took 4256ms.
[12:52:16.988] <TB0> INFO: scanning low vcal = 150
[12:52:17.265] <TB0> INFO: Expecting 41600 events.
[12:52:21.267] <TB0> INFO: 41600 events read in total (3410ms).
[12:52:21.268] <TB0> INFO: Test took 4280ms.
[12:52:21.271] <TB0> INFO: scanning low vcal = 160
[12:52:21.549] <TB0> INFO: Expecting 41600 events.
[12:52:25.533] <TB0> INFO: 41600 events read in total (3393ms).
[12:52:25.533] <TB0> INFO: Test took 4261ms.
[12:52:25.536] <TB0> INFO: scanning low vcal = 170
[12:52:25.818] <TB0> INFO: Expecting 41600 events.
[12:52:29.868] <TB0> INFO: 41600 events read in total (3458ms).
[12:52:29.868] <TB0> INFO: Test took 4332ms.
[12:52:29.874] <TB0> INFO: scanning low vcal = 180
[12:52:30.156] <TB0> INFO: Expecting 41600 events.
[12:52:34.208] <TB0> INFO: 41600 events read in total (3460ms).
[12:52:34.208] <TB0> INFO: Test took 4334ms.
[12:52:34.211] <TB0> INFO: scanning low vcal = 190
[12:52:34.488] <TB0> INFO: Expecting 41600 events.
[12:52:38.492] <TB0> INFO: 41600 events read in total (3412ms).
[12:52:38.493] <TB0> INFO: Test took 4281ms.
[12:52:38.495] <TB0> INFO: scanning low vcal = 200
[12:52:38.776] <TB0> INFO: Expecting 41600 events.
[12:52:42.781] <TB0> INFO: 41600 events read in total (3414ms).
[12:52:42.782] <TB0> INFO: Test took 4286ms.
[12:52:42.785] <TB0> INFO: scanning low vcal = 210
[12:52:43.063] <TB0> INFO: Expecting 41600 events.
[12:52:47.043] <TB0> INFO: 41600 events read in total (3389ms).
[12:52:47.044] <TB0> INFO: Test took 4259ms.
[12:52:47.048] <TB0> INFO: scanning low vcal = 220
[12:52:47.330] <TB0> INFO: Expecting 41600 events.
[12:52:51.349] <TB0> INFO: 41600 events read in total (3427ms).
[12:52:51.349] <TB0> INFO: Test took 4301ms.
[12:52:51.352] <TB0> INFO: scanning low vcal = 230
[12:52:51.628] <TB0> INFO: Expecting 41600 events.
[12:52:55.582] <TB0> INFO: 41600 events read in total (3362ms).
[12:52:55.583] <TB0> INFO: Test took 4231ms.
[12:52:55.585] <TB0> INFO: scanning low vcal = 240
[12:52:55.862] <TB0> INFO: Expecting 41600 events.
[12:52:59.884] <TB0> INFO: 41600 events read in total (3430ms).
[12:52:59.885] <TB0> INFO: Test took 4299ms.
[12:52:59.888] <TB0> INFO: scanning low vcal = 250
[12:53:00.165] <TB0> INFO: Expecting 41600 events.
[12:53:04.188] <TB0> INFO: 41600 events read in total (3431ms).
[12:53:04.188] <TB0> INFO: Test took 4300ms.
[12:53:04.192] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[12:53:04.469] <TB0> INFO: Expecting 41600 events.
[12:53:08.477] <TB0> INFO: 41600 events read in total (3416ms).
[12:53:08.478] <TB0> INFO: Test took 4285ms.
[12:53:08.481] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[12:53:08.758] <TB0> INFO: Expecting 41600 events.
[12:53:12.751] <TB0> INFO: 41600 events read in total (3401ms).
[12:53:12.752] <TB0> INFO: Test took 4271ms.
[12:53:12.755] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[12:53:13.032] <TB0> INFO: Expecting 41600 events.
[12:53:17.028] <TB0> INFO: 41600 events read in total (3404ms).
[12:53:17.029] <TB0> INFO: Test took 4274ms.
[12:53:17.033] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[12:53:17.310] <TB0> INFO: Expecting 41600 events.
[12:53:21.263] <TB0> INFO: 41600 events read in total (3361ms).
[12:53:21.264] <TB0> INFO: Test took 4231ms.
[12:53:21.267] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:53:21.544] <TB0> INFO: Expecting 41600 events.
[12:53:25.513] <TB0> INFO: 41600 events read in total (3377ms).
[12:53:25.514] <TB0> INFO: Test took 4247ms.
[12:53:26.052] <TB0> INFO: PixTestGainPedestal::measure() done
[12:54:00.294] <TB0> INFO: PixTestGainPedestal::fit() done
[12:54:00.294] <TB0> INFO: non-linearity mean: 0.923 0.981 0.928 0.961 0.928 0.972 0.935 0.933 0.954 0.962 0.953 0.972 0.963 1.014 1.004 0.997
[12:54:00.294] <TB0> INFO: non-linearity RMS: 0.138 0.004 0.151 0.045 0.097 0.009 0.072 0.091 0.040 0.038 0.079 0.012 0.025 0.173 0.166 0.182
[12:54:00.294] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C0.dat
[12:54:00.312] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C1.dat
[12:54:00.324] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C2.dat
[12:54:00.337] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C3.dat
[12:54:00.350] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C4.dat
[12:54:00.363] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C5.dat
[12:54:00.376] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C6.dat
[12:54:00.389] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C7.dat
[12:54:00.402] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C8.dat
[12:54:00.415] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C9.dat
[12:54:00.428] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C10.dat
[12:54:00.441] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C11.dat
[12:54:00.454] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C12.dat
[12:54:00.467] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C13.dat
[12:54:00.480] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C14.dat
[12:54:00.493] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1032_FullQualification_2016-10-21_09h47m_1477036052//002_Fulltest_p17//phCalibrationFitErr35_C15.dat
[12:54:00.506] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 162 seconds
[12:54:00.506] <TB0> INFO: Decoding statistics:
[12:54:00.506] <TB0> INFO: General information:
[12:54:00.506] <TB0> INFO: 16bit words read: 3229140
[12:54:00.506] <TB0> INFO: valid events total: 332800
[12:54:00.506] <TB0> INFO: empty events: 2287
[12:54:00.506] <TB0> INFO: valid events with pixels: 330513
[12:54:00.506] <TB0> INFO: valid pixel hits: 616170
[12:54:00.506] <TB0> INFO: Event errors: 0
[12:54:00.506] <TB0> INFO: start marker: 0
[12:54:00.506] <TB0> INFO: stop marker: 0
[12:54:00.506] <TB0> INFO: overflow: 0
[12:54:00.506] <TB0> INFO: invalid 5bit words: 0
[12:54:00.506] <TB0> INFO: invalid XOR eye diagram: 0
[12:54:00.506] <TB0> INFO: frame (failed synchr.): 0
[12:54:00.506] <TB0> INFO: idle data (no TBM trl): 0
[12:54:00.506] <TB0> INFO: no data (only TBM hdr): 0
[12:54:00.506] <TB0> INFO: TBM errors: 0
[12:54:00.506] <TB0> INFO: flawed TBM headers: 0
[12:54:00.506] <TB0> INFO: flawed TBM trailers: 0
[12:54:00.506] <TB0> INFO: event ID mismatches: 0
[12:54:00.506] <TB0> INFO: ROC errors: 0
[12:54:00.506] <TB0> INFO: missing ROC header(s): 0
[12:54:00.506] <TB0> INFO: misplaced readback start: 0
[12:54:00.506] <TB0> INFO: Pixel decoding errors: 0
[12:54:00.506] <TB0> INFO: pixel data incomplete: 0
[12:54:00.506] <TB0> INFO: pixel address: 0
[12:54:00.506] <TB0> INFO: pulse height fill bit: 0
[12:54:00.506] <TB0> INFO: buffer corruption: 0
[12:54:00.521] <TB0> INFO: Decoding statistics:
[12:54:00.521] <TB0> INFO: General information:
[12:54:00.521] <TB0> INFO: 16bit words read: 3357588
[12:54:00.521] <TB0> INFO: valid events total: 353536
[12:54:00.521] <TB0> INFO: empty events: 21007
[12:54:00.521] <TB0> INFO: valid events with pixels: 332529
[12:54:00.521] <TB0> INFO: valid pixel hits: 618186
[12:54:00.521] <TB0> INFO: Event errors: 0
[12:54:00.521] <TB0> INFO: start marker: 0
[12:54:00.521] <TB0> INFO: stop marker: 0
[12:54:00.521] <TB0> INFO: overflow: 0
[12:54:00.521] <TB0> INFO: invalid 5bit words: 0
[12:54:00.521] <TB0> INFO: invalid XOR eye diagram: 0
[12:54:00.521] <TB0> INFO: frame (failed synchr.): 0
[12:54:00.521] <TB0> INFO: idle data (no TBM trl): 0
[12:54:00.521] <TB0> INFO: no data (only TBM hdr): 0
[12:54:00.521] <TB0> INFO: TBM errors: 0
[12:54:00.521] <TB0> INFO: flawed TBM headers: 0
[12:54:00.521] <TB0> INFO: flawed TBM trailers: 0
[12:54:00.521] <TB0> INFO: event ID mismatches: 0
[12:54:00.521] <TB0> INFO: ROC errors: 0
[12:54:00.521] <TB0> INFO: missing ROC header(s): 0
[12:54:00.521] <TB0> INFO: misplaced readback start: 0
[12:54:00.521] <TB0> INFO: Pixel decoding errors: 0
[12:54:00.521] <TB0> INFO: pixel data incomplete: 0
[12:54:00.521] <TB0> INFO: pixel address: 0
[12:54:00.521] <TB0> INFO: pulse height fill bit: 0
[12:54:00.521] <TB0> INFO: buffer corruption: 0
[12:54:00.521] <TB0> INFO: enter test to run
[12:54:00.521] <TB0> INFO: test: exit no parameter change
[12:54:00.640] <TB0> QUIET: Connection to board 71 closed.
[12:54:00.641] <TB0> INFO: pXar: this is the end, my friend