[12:11:01.226] <TB1> INFO: *** Welcome to pxar ***
[12:11:01.227] <TB1> INFO: *** Today: 2016/10/20
[12:11:01.233] <TB1> INFO: *** Version: c8ba-dirty
[12:11:01.233] <TB1> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C15.dat
[12:11:01.234] <TB1> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//tbmParameters_C1b.dat
[12:11:01.234] <TB1> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//defaultMaskFile.dat
[12:11:01.234] <TB1> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters_C15.dat
[12:11:01.295] <TB1> INFO: clk: 4
[12:11:01.295] <TB1> INFO: ctr: 4
[12:11:01.295] <TB1> INFO: sda: 19
[12:11:01.295] <TB1> INFO: tin: 9
[12:11:01.295] <TB1> INFO: level: 15
[12:11:01.295] <TB1> INFO: triggerdelay: 0
[12:11:01.295] <TB1> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[12:11:01.295] <TB1> INFO: Log level: INFO
[12:11:01.304] <TB1> INFO: Found DTB DTB_WXC03A
[12:11:01.316] <TB1> QUIET: Connection to board DTB_WXC03A opened.
[12:11:01.318] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 154
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC03A
MAC address: 40D85511809A
Hostname: pixelDTB154
Comment:
------------------------------------------------------
[12:11:01.319] <TB1> INFO: RPC call hashes of host and DTB match: 486171790
[12:11:02.809] <TB1> INFO: DUT info:
[12:11:02.809] <TB1> INFO: The DUT currently contains the following objects:
[12:11:02.809] <TB1> INFO: 4 TBM Cores tbm10c (4 ON)
[12:11:02.809] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:11:02.809] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:11:02.809] <TB1> INFO: TBM Core alpha (2): 7 registers set
[12:11:02.809] <TB1> INFO: TBM Core beta (3): 7 registers set
[12:11:02.809] <TB1> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[12:11:02.809] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:11:02.809] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:11:02.809] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:11:02.809] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:11:02.809] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:11:02.809] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:11:02.809] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:11:02.809] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:11:02.809] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:11:02.809] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:11:02.809] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:11:02.809] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:11:02.809] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:11:02.809] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:11:02.809] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:11:02.809] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:11:03.210] <TB1> INFO: enter 'restricted' command line mode
[12:11:03.210] <TB1> INFO: enter test to run
[12:11:03.210] <TB1> INFO: test: pretest no parameter change
[12:11:03.210] <TB1> INFO: running: pretest
[12:11:03.215] <TB1> INFO: ######################################################################
[12:11:03.215] <TB1> INFO: PixTestPretest::doTest()
[12:11:03.215] <TB1> INFO: ######################################################################
[12:11:03.216] <TB1> INFO: ----------------------------------------------------------------------
[12:11:03.216] <TB1> INFO: PixTestPretest::programROC()
[12:11:03.216] <TB1> INFO: ----------------------------------------------------------------------
[12:11:21.229] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:11:21.229] <TB1> INFO: IA differences per ROC: 19.3 18.5 19.3 17.7 20.1 18.5 20.1 16.9 18.5 20.9 17.7 18.5 18.5 18.5 22.5 20.1
[12:11:21.286] <TB1> INFO: ----------------------------------------------------------------------
[12:11:21.286] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:11:21.286] <TB1> INFO: ----------------------------------------------------------------------
[12:11:31.406] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 389.1 mA = 24.3188 mA/ROC
[12:11:31.406] <TB1> INFO: i(loss) [mA/ROC]: 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 18.5 19.3 19.3 20.9 20.9 18.5 18.5 18.5
[12:11:31.440] <TB1> INFO: ----------------------------------------------------------------------
[12:11:31.440] <TB1> INFO: PixTestPretest::findTiming()
[12:11:31.441] <TB1> INFO: ----------------------------------------------------------------------
[12:11:31.441] <TB1> INFO: PixTestCmd::init()

[12:12:03.421] <TB1> INFO: TBM phases: 160MHz: 0, 400MHz: 3, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[12:12:03.421] <TB1> INFO: (success/tries = 100/100), width = 3
[12:12:04.989] <TB1> INFO: ----------------------------------------------------------------------
[12:12:04.990] <TB1> INFO: PixTestPretest::findWorkingPixel()
[12:12:04.990] <TB1> INFO: ----------------------------------------------------------------------
[12:12:05.085] <TB1> INFO: Expecting 231680 events.
[12:12:15.058] <TB1> INFO: 231680 events read in total (9381ms).
[12:12:15.066] <TB1> INFO: Test took 10071ms.
[12:12:15.316] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:12:15.347] <TB1> INFO: ----------------------------------------------------------------------
[12:12:15.347] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[12:12:15.347] <TB1> INFO: ----------------------------------------------------------------------
[12:12:15.440] <TB1> INFO: Expecting 231680 events.
[12:12:25.397] <TB1> INFO: 231680 events read in total (9366ms).
[12:12:25.407] <TB1> INFO: Test took 10056ms.
[12:12:25.673] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[12:12:25.673] <TB1> INFO: CalDel: 71 80 78 79 91 86 84 96 88 94 79 88 97 86 75 86
[12:12:25.673] <TB1> INFO: VthrComp: 51 51 54 57 54 53 51 51 53 51 51 54 51 51 54 51
[12:12:25.676] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C0.dat
[12:12:25.676] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C1.dat
[12:12:25.677] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C2.dat
[12:12:25.677] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C3.dat
[12:12:25.677] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C4.dat
[12:12:25.677] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C5.dat
[12:12:25.677] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C6.dat
[12:12:25.677] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C7.dat
[12:12:25.677] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C8.dat
[12:12:25.678] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C9.dat
[12:12:25.678] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C10.dat
[12:12:25.678] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C11.dat
[12:12:25.678] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C12.dat
[12:12:25.678] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C13.dat
[12:12:25.678] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C14.dat
[12:12:25.678] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C15.dat
[12:12:25.679] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//tbmParameters_C0a.dat
[12:12:25.679] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//tbmParameters_C0b.dat
[12:12:25.679] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//tbmParameters_C1a.dat
[12:12:25.679] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//tbmParameters_C1b.dat
[12:12:25.679] <TB1> INFO: PixTestPretest::doTest() done, duration: 82 seconds
[12:12:25.732] <TB1> INFO: enter test to run
[12:12:25.732] <TB1> INFO: test: FullTest no parameter change
[12:12:25.732] <TB1> INFO: running: fulltest
[12:12:25.732] <TB1> INFO: ######################################################################
[12:12:25.732] <TB1> INFO: PixTestFullTest::doTest()
[12:12:25.732] <TB1> INFO: ######################################################################
[12:12:25.734] <TB1> INFO: ######################################################################
[12:12:25.734] <TB1> INFO: PixTestAlive::doTest()
[12:12:25.734] <TB1> INFO: ######################################################################
[12:12:25.735] <TB1> INFO: ----------------------------------------------------------------------
[12:12:25.735] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:12:25.735] <TB1> INFO: ----------------------------------------------------------------------
[12:12:25.977] <TB1> INFO: Expecting 41600 events.
[12:12:29.483] <TB1> INFO: 41600 events read in total (2914ms).
[12:12:29.483] <TB1> INFO: Test took 3745ms.
[12:12:29.714] <TB1> INFO: PixTestAlive::aliveTest() done
[12:12:29.714] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
[12:12:29.716] <TB1> INFO: ----------------------------------------------------------------------
[12:12:29.716] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:12:29.716] <TB1> INFO: ----------------------------------------------------------------------
[12:12:29.963] <TB1> INFO: Expecting 41600 events.
[12:12:33.049] <TB1> INFO: 41600 events read in total (2494ms).
[12:12:33.049] <TB1> INFO: Test took 3331ms.
[12:12:33.050] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:12:33.290] <TB1> INFO: PixTestAlive::maskTest() done
[12:12:33.290] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:12:33.292] <TB1> INFO: ----------------------------------------------------------------------
[12:12:33.292] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:12:33.292] <TB1> INFO: ----------------------------------------------------------------------
[12:12:33.540] <TB1> INFO: Expecting 41600 events.
[12:12:37.082] <TB1> INFO: 41600 events read in total (2950ms).
[12:12:37.083] <TB1> INFO: Test took 3788ms.
[12:12:37.316] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[12:12:37.316] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:12:37.317] <TB1> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[12:12:37.317] <TB1> INFO: Decoding statistics:
[12:12:37.317] <TB1> INFO: General information:
[12:12:37.317] <TB1> INFO: 16bit words read: 0
[12:12:37.317] <TB1> INFO: valid events total: 0
[12:12:37.317] <TB1> INFO: empty events: 0
[12:12:37.317] <TB1> INFO: valid events with pixels: 0
[12:12:37.317] <TB1> INFO: valid pixel hits: 0
[12:12:37.317] <TB1> INFO: Event errors: 0
[12:12:37.317] <TB1> INFO: start marker: 0
[12:12:37.317] <TB1> INFO: stop marker: 0
[12:12:37.317] <TB1> INFO: overflow: 0
[12:12:37.317] <TB1> INFO: invalid 5bit words: 0
[12:12:37.317] <TB1> INFO: invalid XOR eye diagram: 0
[12:12:37.317] <TB1> INFO: frame (failed synchr.): 0
[12:12:37.317] <TB1> INFO: idle data (no TBM trl): 0
[12:12:37.317] <TB1> INFO: no data (only TBM hdr): 0
[12:12:37.317] <TB1> INFO: TBM errors: 0
[12:12:37.317] <TB1> INFO: flawed TBM headers: 0
[12:12:37.317] <TB1> INFO: flawed TBM trailers: 0
[12:12:37.317] <TB1> INFO: event ID mismatches: 0
[12:12:37.317] <TB1> INFO: ROC errors: 0
[12:12:37.317] <TB1> INFO: missing ROC header(s): 0
[12:12:37.317] <TB1> INFO: misplaced readback start: 0
[12:12:37.317] <TB1> INFO: Pixel decoding errors: 0
[12:12:37.317] <TB1> INFO: pixel data incomplete: 0
[12:12:37.317] <TB1> INFO: pixel address: 0
[12:12:37.317] <TB1> INFO: pulse height fill bit: 0
[12:12:37.317] <TB1> INFO: buffer corruption: 0
[12:12:37.327] <TB1> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C15.dat
[12:12:37.328] <TB1> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr_C15.dat

[12:12:37.328] <TB1> INFO: ######################################################################
[12:12:37.328] <TB1> INFO: PixTestReadback::doTest()
[12:12:37.328] <TB1> INFO: ######################################################################
[12:12:37.328] <TB1> INFO: ----------------------------------------------------------------------
[12:12:37.328] <TB1> INFO: PixTestReadback::CalibrateVd()
[12:12:37.328] <TB1> INFO: ----------------------------------------------------------------------
[12:12:47.296] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C0.dat
[12:12:47.296] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C1.dat
[12:12:47.296] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C2.dat
[12:12:47.296] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C3.dat
[12:12:47.296] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C4.dat
[12:12:47.297] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C5.dat
[12:12:47.297] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C6.dat
[12:12:47.297] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C7.dat
[12:12:47.297] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C8.dat
[12:12:47.297] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C9.dat
[12:12:47.297] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C10.dat
[12:12:47.297] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C11.dat
[12:12:47.297] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C12.dat
[12:12:47.297] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C13.dat
[12:12:47.297] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C14.dat
[12:12:47.297] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C15.dat
[12:12:47.329] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[12:12:47.329] <TB1> INFO: ----------------------------------------------------------------------
[12:12:47.329] <TB1> INFO: PixTestReadback::CalibrateVa()
[12:12:47.330] <TB1> INFO: ----------------------------------------------------------------------
[12:12:57.262] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C0.dat
[12:12:57.262] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C1.dat
[12:12:57.262] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C2.dat
[12:12:57.262] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C3.dat
[12:12:57.262] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C4.dat
[12:12:57.262] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C5.dat
[12:12:57.262] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C6.dat
[12:12:57.263] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C7.dat
[12:12:57.263] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C8.dat
[12:12:57.263] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C9.dat
[12:12:57.263] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C10.dat
[12:12:57.263] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C11.dat
[12:12:57.263] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C12.dat
[12:12:57.263] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C13.dat
[12:12:57.263] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C14.dat
[12:12:57.263] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C15.dat
[12:12:57.292] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[12:12:57.292] <TB1> INFO: ----------------------------------------------------------------------
[12:12:57.292] <TB1> INFO: PixTestReadback::readbackVbg()
[12:12:57.292] <TB1> INFO: ----------------------------------------------------------------------
[12:13:04.960] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[12:13:04.960] <TB1> INFO: ----------------------------------------------------------------------
[12:13:04.960] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[12:13:04.960] <TB1> INFO: ----------------------------------------------------------------------
[12:13:04.960] <TB1> INFO: Vbg will be calibrated using Vd calibration
[12:13:04.960] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 158.3calibrated Vbg = 1.20162 :::*/*/*/*/
[12:13:04.960] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 153.2calibrated Vbg = 1.19111 :::*/*/*/*/
[12:13:04.960] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 157calibrated Vbg = 1.19664 :::*/*/*/*/
[12:13:04.961] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 156.1calibrated Vbg = 1.18976 :::*/*/*/*/
[12:13:04.961] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 162.5calibrated Vbg = 1.1963 :::*/*/*/*/
[12:13:04.961] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 162.9calibrated Vbg = 1.19789 :::*/*/*/*/
[12:13:04.961] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 149.2calibrated Vbg = 1.19869 :::*/*/*/*/
[12:13:04.961] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 156.6calibrated Vbg = 1.19837 :::*/*/*/*/
[12:13:04.961] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 155calibrated Vbg = 1.19573 :::*/*/*/*/
[12:13:04.961] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 150.2calibrated Vbg = 1.19149 :::*/*/*/*/
[12:13:04.961] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 160.1calibrated Vbg = 1.18664 :::*/*/*/*/
[12:13:04.961] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 160.4calibrated Vbg = 1.18481 :::*/*/*/*/
[12:13:04.961] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 166calibrated Vbg = 1.19487 :::*/*/*/*/
[12:13:04.961] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 153.9calibrated Vbg = 1.19491 :::*/*/*/*/
[12:13:04.961] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 156.7calibrated Vbg = 1.19779 :::*/*/*/*/
[12:13:04.961] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 151.8calibrated Vbg = 1.1974 :::*/*/*/*/
[12:13:04.964] <TB1> INFO: ----------------------------------------------------------------------
[12:13:04.964] <TB1> INFO: PixTestReadback::CalibrateIa()
[12:13:04.964] <TB1> INFO: ----------------------------------------------------------------------
[12:15:45.779] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C0.dat
[12:15:45.779] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C1.dat
[12:15:45.779] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C2.dat
[12:15:45.780] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C3.dat
[12:15:45.780] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C4.dat
[12:15:45.780] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C5.dat
[12:15:45.780] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C6.dat
[12:15:45.780] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C7.dat
[12:15:45.780] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C8.dat
[12:15:45.780] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C9.dat
[12:15:45.780] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C10.dat
[12:15:45.780] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C11.dat
[12:15:45.780] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C12.dat
[12:15:45.780] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C13.dat
[12:15:45.780] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C14.dat
[12:15:45.780] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C15.dat
[12:15:45.809] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[12:15:45.812] <TB1> INFO: PixTestReadback::doTest() done
[12:15:45.812] <TB1> INFO: Decoding statistics:
[12:15:45.812] <TB1> INFO: General information:
[12:15:45.812] <TB1> INFO: 16bit words read: 1536
[12:15:45.812] <TB1> INFO: valid events total: 256
[12:15:45.812] <TB1> INFO: empty events: 256
[12:15:45.812] <TB1> INFO: valid events with pixels: 0
[12:15:45.812] <TB1> INFO: valid pixel hits: 0
[12:15:45.812] <TB1> INFO: Event errors: 0
[12:15:45.812] <TB1> INFO: start marker: 0
[12:15:45.812] <TB1> INFO: stop marker: 0
[12:15:45.812] <TB1> INFO: overflow: 0
[12:15:45.812] <TB1> INFO: invalid 5bit words: 0
[12:15:45.812] <TB1> INFO: invalid XOR eye diagram: 0
[12:15:45.812] <TB1> INFO: frame (failed synchr.): 0
[12:15:45.812] <TB1> INFO: idle data (no TBM trl): 0
[12:15:45.812] <TB1> INFO: no data (only TBM hdr): 0
[12:15:45.812] <TB1> INFO: TBM errors: 0
[12:15:45.812] <TB1> INFO: flawed TBM headers: 0
[12:15:45.812] <TB1> INFO: flawed TBM trailers: 0
[12:15:45.812] <TB1> INFO: event ID mismatches: 0
[12:15:45.812] <TB1> INFO: ROC errors: 0
[12:15:45.812] <TB1> INFO: missing ROC header(s): 0
[12:15:45.812] <TB1> INFO: misplaced readback start: 0
[12:15:45.812] <TB1> INFO: Pixel decoding errors: 0
[12:15:45.812] <TB1> INFO: pixel data incomplete: 0
[12:15:45.812] <TB1> INFO: pixel address: 0
[12:15:45.812] <TB1> INFO: pulse height fill bit: 0
[12:15:45.812] <TB1> INFO: buffer corruption: 0
[12:15:45.863] <TB1> INFO: ######################################################################
[12:15:45.863] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:15:45.864] <TB1> INFO: ######################################################################
[12:15:45.866] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[12:15:45.881] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[12:15:45.881] <TB1> INFO: run 1 of 1
[12:15:46.117] <TB1> INFO: Expecting 3120000 events.
[12:16:17.120] <TB1> INFO: 678610 events read in total (30411ms).











[12:16:47.596] <TB1> INFO: 1357900 events read in total (60887ms).











[12:17:17.979] <TB1> INFO: 2034560 events read in total (91270ms).
[12:17:48.436] <TB1> INFO: 2711080 events read in total (121727ms).











[12:18:06.849] <TB1> INFO: 3120000 events read in total (140140ms).
[12:18:06.905] <TB1> INFO: Test took 141024ms.
[12:18:31.701] <TB1> INFO: PixTestBBMap::doTest() done with 1 decoding errors: , duration: 165 seconds
[12:18:31.701] <TB1> INFO: number of dead bumps (per ROC): 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0
[12:18:31.701] <TB1> INFO: separation cut (per ROC): 110 109 126 116 118 110 105 104 118 105 121 134 113 104 129 120
[12:18:31.701] <TB1> INFO: Decoding statistics:
[12:18:31.701] <TB1> INFO: General information:
[12:18:31.701] <TB1> INFO: 16bit words read: 0
[12:18:31.701] <TB1> INFO: valid events total: 0
[12:18:31.701] <TB1> INFO: empty events: 0
[12:18:31.701] <TB1> INFO: valid events with pixels: 0
[12:18:31.701] <TB1> INFO: valid pixel hits: 0
[12:18:31.701] <TB1> INFO: Event errors: 0
[12:18:31.701] <TB1> INFO: start marker: 0
[12:18:31.701] <TB1> INFO: stop marker: 0
[12:18:31.701] <TB1> INFO: overflow: 0
[12:18:31.701] <TB1> INFO: invalid 5bit words: 0
[12:18:31.701] <TB1> INFO: invalid XOR eye diagram: 0
[12:18:31.701] <TB1> INFO: frame (failed synchr.): 0
[12:18:31.701] <TB1> INFO: idle data (no TBM trl): 0
[12:18:31.701] <TB1> INFO: no data (only TBM hdr): 0
[12:18:31.701] <TB1> INFO: TBM errors: 0
[12:18:31.701] <TB1> INFO: flawed TBM headers: 0
[12:18:31.701] <TB1> INFO: flawed TBM trailers: 0
[12:18:31.701] <TB1> INFO: event ID mismatches: 0
[12:18:31.701] <TB1> INFO: ROC errors: 0
[12:18:31.701] <TB1> INFO: missing ROC header(s): 0
[12:18:31.701] <TB1> INFO: misplaced readback start: 0
[12:18:31.701] <TB1> INFO: Pixel decoding errors: 0
[12:18:31.701] <TB1> INFO: pixel data incomplete: 0
[12:18:31.701] <TB1> INFO: pixel address: 0
[12:18:31.701] <TB1> INFO: pulse height fill bit: 0
[12:18:31.701] <TB1> INFO: buffer corruption: 0
[12:18:31.738] <TB1> INFO: ######################################################################
[12:18:31.738] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:18:31.738] <TB1> INFO: ######################################################################
[12:18:31.738] <TB1> INFO: ----------------------------------------------------------------------
[12:18:31.738] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:18:31.738] <TB1> INFO: ----------------------------------------------------------------------
[12:18:31.738] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[12:18:31.752] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[12:18:31.752] <TB1> INFO: run 1 of 1
[12:18:32.025] <TB1> INFO: Expecting 36608000 events.
[12:18:55.945] <TB1> INFO: 708700 events read in total (23329ms).
[12:19:19.268] <TB1> INFO: 1393200 events read in total (46652ms).
[12:19:42.866] <TB1> INFO: 2083900 events read in total (70250ms).
[12:20:06.465] <TB1> INFO: 2769100 events read in total (93849ms).
[12:20:29.929] <TB1> INFO: 3458000 events read in total (117313ms).
[12:20:53.285] <TB1> INFO: 4144700 events read in total (140669ms).
[12:21:16.678] <TB1> INFO: 4834150 events read in total (164062ms).
[12:21:39.884] <TB1> INFO: 5519500 events read in total (187268ms).
[12:22:03.318] <TB1> INFO: 6206550 events read in total (210702ms).
[12:22:26.430] <TB1> INFO: 6890850 events read in total (233814ms).
[12:22:50.113] <TB1> INFO: 7579900 events read in total (257497ms).
[12:23:13.549] <TB1> INFO: 8267300 events read in total (280933ms).
[12:23:36.982] <TB1> INFO: 8954850 events read in total (304366ms).
[12:24:00.193] <TB1> INFO: 9640300 events read in total (327577ms).
[12:24:23.519] <TB1> INFO: 10324650 events read in total (350903ms).
[12:24:46.643] <TB1> INFO: 11008500 events read in total (374027ms).
[12:25:10.168] <TB1> INFO: 11693900 events read in total (397552ms).
[12:25:33.145] <TB1> INFO: 12379450 events read in total (420529ms).
[12:25:56.467] <TB1> INFO: 13064300 events read in total (443851ms).
[12:26:19.346] <TB1> INFO: 13748350 events read in total (466730ms).
[12:26:42.658] <TB1> INFO: 14431350 events read in total (490042ms).
[12:27:06.013] <TB1> INFO: 15115700 events read in total (513397ms).
[12:27:29.587] <TB1> INFO: 15797850 events read in total (536971ms).
[12:27:52.763] <TB1> INFO: 16480850 events read in total (560147ms).
[12:28:15.962] <TB1> INFO: 17164000 events read in total (583346ms).
[12:28:39.103] <TB1> INFO: 17845850 events read in total (606487ms).
[12:29:02.102] <TB1> INFO: 18525350 events read in total (629486ms).
[12:29:25.275] <TB1> INFO: 19207350 events read in total (652659ms).
[12:29:48.518] <TB1> INFO: 19885300 events read in total (675902ms).
[12:30:11.820] <TB1> INFO: 20564200 events read in total (699204ms).
[12:30:34.999] <TB1> INFO: 21241750 events read in total (722383ms).
[12:30:57.939] <TB1> INFO: 21922000 events read in total (745323ms).
[12:31:21.242] <TB1> INFO: 22598050 events read in total (768626ms).
[12:31:44.132] <TB1> INFO: 23278450 events read in total (791516ms).
[12:32:07.200] <TB1> INFO: 23952950 events read in total (814584ms).
[12:32:30.525] <TB1> INFO: 24633050 events read in total (837909ms).
[12:32:53.496] <TB1> INFO: 25308450 events read in total (860880ms).
[12:33:16.425] <TB1> INFO: 25988200 events read in total (883809ms).
[12:33:39.746] <TB1> INFO: 26663550 events read in total (907130ms).
[12:34:02.799] <TB1> INFO: 27340900 events read in total (930183ms).
[12:34:25.769] <TB1> INFO: 28016200 events read in total (953153ms).
[12:34:48.719] <TB1> INFO: 28692000 events read in total (976103ms).
[12:35:11.556] <TB1> INFO: 29364150 events read in total (998940ms).
[12:35:34.481] <TB1> INFO: 30038450 events read in total (1021865ms).
[12:35:57.507] <TB1> INFO: 30710850 events read in total (1044891ms).
[12:36:20.454] <TB1> INFO: 31386500 events read in total (1067838ms).
[12:36:43.307] <TB1> INFO: 32060000 events read in total (1090691ms).
[12:37:06.440] <TB1> INFO: 32735200 events read in total (1113824ms).
[12:37:29.455] <TB1> INFO: 33410450 events read in total (1136839ms).
[12:37:52.356] <TB1> INFO: 34083600 events read in total (1159740ms).
[12:38:15.363] <TB1> INFO: 34759250 events read in total (1182747ms).
[12:38:38.364] <TB1> INFO: 35434550 events read in total (1205748ms).
[12:39:01.244] <TB1> INFO: 36115350 events read in total (1228628ms).
[12:39:17.922] <TB1> INFO: 36608000 events read in total (1245306ms).
[12:39:17.988] <TB1> INFO: Test took 1246235ms.
[12:39:18.390] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:39:19.990] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:39:21.415] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:39:22.861] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:39:24.352] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:39:26.463] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:39:28.393] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:39:30.366] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:39:32.259] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:39:33.821] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:39:35.613] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:39:37.523] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:39:39.138] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:39:40.736] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:39:42.128] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:39:43.550] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:39:44.960] <TB1> INFO: PixTestScurves::scurves() done
[12:39:44.960] <TB1> INFO: Vcal mean: 124.61 121.71 131.28 128.91 127.80 126.91 125.54 119.08 127.96 121.20 125.46 128.17 127.84 114.42 131.85 131.31
[12:39:44.961] <TB1> INFO: Vcal RMS: 6.52 6.02 5.84 6.60 7.00 7.33 6.34 5.46 6.36 5.68 6.39 6.15 6.32 5.25 6.16 6.31
[12:39:44.961] <TB1> INFO: PixTestScurves::fullTest() done, duration: 1273 seconds
[12:39:44.961] <TB1> INFO: Decoding statistics:
[12:39:44.961] <TB1> INFO: General information:
[12:39:44.961] <TB1> INFO: 16bit words read: 0
[12:39:44.961] <TB1> INFO: valid events total: 0
[12:39:44.961] <TB1> INFO: empty events: 0
[12:39:44.961] <TB1> INFO: valid events with pixels: 0
[12:39:44.961] <TB1> INFO: valid pixel hits: 0
[12:39:44.961] <TB1> INFO: Event errors: 0
[12:39:44.961] <TB1> INFO: start marker: 0
[12:39:44.961] <TB1> INFO: stop marker: 0
[12:39:44.961] <TB1> INFO: overflow: 0
[12:39:44.961] <TB1> INFO: invalid 5bit words: 0
[12:39:44.961] <TB1> INFO: invalid XOR eye diagram: 0
[12:39:44.961] <TB1> INFO: frame (failed synchr.): 0
[12:39:44.961] <TB1> INFO: idle data (no TBM trl): 0
[12:39:44.961] <TB1> INFO: no data (only TBM hdr): 0
[12:39:44.961] <TB1> INFO: TBM errors: 0
[12:39:44.961] <TB1> INFO: flawed TBM headers: 0
[12:39:44.961] <TB1> INFO: flawed TBM trailers: 0
[12:39:44.961] <TB1> INFO: event ID mismatches: 0
[12:39:44.961] <TB1> INFO: ROC errors: 0
[12:39:44.961] <TB1> INFO: missing ROC header(s): 0
[12:39:44.961] <TB1> INFO: misplaced readback start: 0
[12:39:44.961] <TB1> INFO: Pixel decoding errors: 0
[12:39:44.961] <TB1> INFO: pixel data incomplete: 0
[12:39:44.961] <TB1> INFO: pixel address: 0
[12:39:44.961] <TB1> INFO: pulse height fill bit: 0
[12:39:44.961] <TB1> INFO: buffer corruption: 0
[12:39:45.026] <TB1> INFO: ######################################################################
[12:39:45.026] <TB1> INFO: PixTestTrim::doTest()
[12:39:45.026] <TB1> INFO: ######################################################################
[12:39:45.027] <TB1> INFO: ----------------------------------------------------------------------
[12:39:45.027] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[12:39:45.027] <TB1> INFO: ----------------------------------------------------------------------
[12:39:45.071] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:39:45.071] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:39:45.083] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[12:39:45.083] <TB1> INFO: run 1 of 1
[12:39:45.319] <TB1> INFO: Expecting 5025280 events.
[12:40:16.746] <TB1> INFO: 830952 events read in total (30829ms).
[12:40:47.315] <TB1> INFO: 1660592 events read in total (61398ms).
[12:41:17.991] <TB1> INFO: 2487456 events read in total (92074ms).
[12:41:48.920] <TB1> INFO: 3310504 events read in total (123003ms).
[12:42:20.022] <TB1> INFO: 4129248 events read in total (154106ms).
[12:42:51.199] <TB1> INFO: 4945736 events read in total (185282ms).
[12:42:54.737] <TB1> INFO: 5025280 events read in total (188820ms).
[12:42:54.806] <TB1> INFO: Test took 189723ms.
[12:43:13.826] <TB1> INFO: ROC 0 VthrComp = 127
[12:43:13.826] <TB1> INFO: ROC 1 VthrComp = 126
[12:43:13.826] <TB1> INFO: ROC 2 VthrComp = 131
[12:43:13.826] <TB1> INFO: ROC 3 VthrComp = 129
[12:43:13.826] <TB1> INFO: ROC 4 VthrComp = 130
[12:43:13.826] <TB1> INFO: ROC 5 VthrComp = 122
[12:43:13.826] <TB1> INFO: ROC 6 VthrComp = 125
[12:43:13.827] <TB1> INFO: ROC 7 VthrComp = 116
[12:43:13.827] <TB1> INFO: ROC 8 VthrComp = 129
[12:43:13.827] <TB1> INFO: ROC 9 VthrComp = 125
[12:43:13.827] <TB1> INFO: ROC 10 VthrComp = 124
[12:43:13.828] <TB1> INFO: ROC 11 VthrComp = 135
[12:43:13.828] <TB1> INFO: ROC 12 VthrComp = 126
[12:43:13.828] <TB1> INFO: ROC 13 VthrComp = 115
[12:43:13.828] <TB1> INFO: ROC 14 VthrComp = 132
[12:43:13.828] <TB1> INFO: ROC 15 VthrComp = 130
[12:43:14.078] <TB1> INFO: Expecting 41600 events.
[12:43:17.604] <TB1> INFO: 41600 events read in total (2934ms).
[12:43:17.605] <TB1> INFO: Test took 3775ms.
[12:43:17.615] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:43:17.615] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:43:17.626] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[12:43:17.626] <TB1> INFO: run 1 of 1
[12:43:17.904] <TB1> INFO: Expecting 5025280 events.
[12:43:44.878] <TB1> INFO: 590328 events read in total (26382ms).
[12:44:11.298] <TB1> INFO: 1180616 events read in total (52802ms).
[12:44:37.547] <TB1> INFO: 1770400 events read in total (79051ms).
[12:45:03.842] <TB1> INFO: 2360336 events read in total (105346ms).
[12:45:30.372] <TB1> INFO: 2947728 events read in total (131876ms).
[12:45:56.593] <TB1> INFO: 3533480 events read in total (158097ms).
[12:46:22.898] <TB1> INFO: 4119016 events read in total (184402ms).
[12:46:49.279] <TB1> INFO: 4703208 events read in total (210783ms).
[12:47:03.930] <TB1> INFO: 5025280 events read in total (225434ms).
[12:47:04.005] <TB1> INFO: Test took 226379ms.
[12:47:29.895] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 60.057 for pixel 0/15 mean/min/max = 45.4538/30.7115/60.1961
[12:47:29.896] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 59.8962 for pixel 12/73 mean/min/max = 45.3811/30.8462/59.9161
[12:47:29.896] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 63.4648 for pixel 4/3 mean/min/max = 48.1988/32.7956/63.6019
[12:47:29.897] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 65.5537 for pixel 6/16 mean/min/max = 49.3975/33.1358/65.6592
[12:47:29.897] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 62.9994 for pixel 11/7 mean/min/max = 46.9436/30.8565/63.0307
[12:47:29.898] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 64.8617 for pixel 16/3 mean/min/max = 48.3407/31.7077/64.9737
[12:47:29.898] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 61.2552 for pixel 47/1 mean/min/max = 46.7097/32.1357/61.2836
[12:47:29.899] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 59.1939 for pixel 24/2 mean/min/max = 46.2616/33.211/59.3122
[12:47:29.899] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 61.1832 for pixel 8/17 mean/min/max = 46.6742/32.147/61.2015
[12:47:29.900] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 59.0581 for pixel 21/1 mean/min/max = 45.3749/31.2661/59.4837
[12:47:29.900] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 61.053 for pixel 16/8 mean/min/max = 46.6514/32.1301/61.1727
[12:47:29.900] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 62.4254 for pixel 17/28 mean/min/max = 47.9052/33.3775/62.433
[12:47:29.901] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 60.5495 for pixel 0/7 mean/min/max = 46.1553/31.7197/60.5909
[12:47:29.901] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 59.9397 for pixel 0/3 mean/min/max = 46.1293/32.2709/59.9878
[12:47:29.902] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 62.9098 for pixel 51/0 mean/min/max = 48.0023/32.8751/63.1295
[12:47:29.902] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 60.6498 for pixel 30/32 mean/min/max = 46.3407/32.01/60.6713
[12:47:29.903] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:47:29.991] <TB1> INFO: Expecting 411648 events.
[12:47:39.290] <TB1> INFO: 411648 events read in total (8707ms).
[12:47:39.297] <TB1> INFO: Expecting 411648 events.
[12:47:48.743] <TB1> INFO: 411648 events read in total (9043ms).
[12:47:48.753] <TB1> INFO: Expecting 411648 events.
[12:47:58.245] <TB1> INFO: 411648 events read in total (9089ms).
[12:47:58.257] <TB1> INFO: Expecting 411648 events.
[12:48:07.773] <TB1> INFO: 411648 events read in total (9112ms).
[12:48:07.792] <TB1> INFO: Expecting 411648 events.
[12:48:17.326] <TB1> INFO: 411648 events read in total (9131ms).
[12:48:17.343] <TB1> INFO: Expecting 411648 events.
[12:48:26.843] <TB1> INFO: 411648 events read in total (9096ms).
[12:48:26.864] <TB1> INFO: Expecting 411648 events.
[12:48:36.353] <TB1> INFO: 411648 events read in total (9086ms).
[12:48:36.376] <TB1> INFO: Expecting 411648 events.
[12:48:45.856] <TB1> INFO: 411648 events read in total (9077ms).
[12:48:45.882] <TB1> INFO: Expecting 411648 events.
[12:48:55.370] <TB1> INFO: 411648 events read in total (9085ms).
[12:48:55.399] <TB1> INFO: Expecting 411648 events.
[12:49:04.948] <TB1> INFO: 411648 events read in total (9146ms).
[12:49:04.978] <TB1> INFO: Expecting 411648 events.
[12:49:14.517] <TB1> INFO: 411648 events read in total (9135ms).
[12:49:14.551] <TB1> INFO: Expecting 411648 events.
[12:49:24.124] <TB1> INFO: 411648 events read in total (9169ms).
[12:49:24.161] <TB1> INFO: Expecting 411648 events.
[12:49:33.650] <TB1> INFO: 411648 events read in total (9086ms).
[12:49:33.689] <TB1> INFO: Expecting 411648 events.
[12:49:43.158] <TB1> INFO: 411648 events read in total (9066ms).
[12:49:43.200] <TB1> INFO: Expecting 411648 events.
[12:49:52.769] <TB1> INFO: 411648 events read in total (9166ms).
[12:49:52.815] <TB1> INFO: Expecting 411648 events.
[12:50:02.084] <TB1> INFO: 411648 events read in total (8866ms).
[12:50:02.152] <TB1> INFO: Test took 152249ms.
[12:50:02.865] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[12:50:02.878] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[12:50:02.878] <TB1> INFO: run 1 of 1
[12:50:03.134] <TB1> INFO: Expecting 5025280 events.
[12:50:30.404] <TB1> INFO: 590184 events read in total (26678ms).
[12:50:57.204] <TB1> INFO: 1177952 events read in total (53478ms).
[12:51:23.761] <TB1> INFO: 1766040 events read in total (80035ms).
[12:51:50.318] <TB1> INFO: 2353704 events read in total (106592ms).
[12:52:17.242] <TB1> INFO: 2942040 events read in total (133516ms).
[12:52:44.166] <TB1> INFO: 3528888 events read in total (160440ms).
[12:53:10.950] <TB1> INFO: 4116320 events read in total (187224ms).
[12:53:37.533] <TB1> INFO: 4706520 events read in total (213807ms).
[12:53:52.507] <TB1> INFO: 5025280 events read in total (228781ms).
[12:53:52.665] <TB1> INFO: Test took 229788ms.
[12:54:14.296] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 2.500000 .. 147.045259
[12:54:14.545] <TB1> INFO: Expecting 208000 events.
[12:54:24.526] <TB1> INFO: 208000 events read in total (9390ms).
[12:54:24.528] <TB1> INFO: Test took 10231ms.
[12:54:24.610] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 2 .. 157 (-1/-1) hits flags = 528 (plus default)
[12:54:24.624] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[12:54:24.624] <TB1> INFO: run 1 of 1
[12:54:24.902] <TB1> INFO: Expecting 5191680 events.
[12:54:51.383] <TB1> INFO: 582560 events read in total (25889ms).
[12:55:16.677] <TB1> INFO: 1164864 events read in total (51183ms).
[12:55:42.670] <TB1> INFO: 1746880 events read in total (77176ms).
[12:56:09.100] <TB1> INFO: 2329056 events read in total (103606ms).
[12:56:35.211] <TB1> INFO: 2911152 events read in total (129717ms).
[12:57:01.367] <TB1> INFO: 3493096 events read in total (155873ms).
[12:57:27.193] <TB1> INFO: 4074832 events read in total (181699ms).
[12:57:53.473] <TB1> INFO: 4655904 events read in total (207979ms).
[12:58:18.211] <TB1> INFO: 5191680 events read in total (232717ms).
[12:58:18.336] <TB1> INFO: Test took 233713ms.
[12:58:51.152] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 27.376568 .. 48.605516
[12:58:51.390] <TB1> INFO: Expecting 208000 events.
[12:59:01.109] <TB1> INFO: 208000 events read in total (9127ms).
[12:59:01.109] <TB1> INFO: Test took 9956ms.
[12:59:01.156] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 58 (-1/-1) hits flags = 528 (plus default)
[12:59:01.169] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[12:59:01.170] <TB1> INFO: run 1 of 1
[12:59:01.448] <TB1> INFO: Expecting 1397760 events.
[12:59:29.645] <TB1> INFO: 648296 events read in total (27605ms).
[12:59:56.964] <TB1> INFO: 1294384 events read in total (54924ms).
[13:00:01.735] <TB1> INFO: 1397760 events read in total (59695ms).
[13:00:01.769] <TB1> INFO: Test took 60600ms.
[13:00:18.475] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 28.051442 .. 50.453563
[13:00:18.714] <TB1> INFO: Expecting 208000 events.
[13:00:28.653] <TB1> INFO: 208000 events read in total (9347ms).
[13:00:28.654] <TB1> INFO: Test took 10176ms.
[13:00:28.701] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 18 .. 60 (-1/-1) hits flags = 528 (plus default)
[13:00:28.713] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[13:00:28.713] <TB1> INFO: run 1 of 1
[13:00:28.992] <TB1> INFO: Expecting 1431040 events.
[13:00:57.419] <TB1> INFO: 638712 events read in total (27835ms).
[13:01:24.742] <TB1> INFO: 1275768 events read in total (55158ms).
[13:01:31.984] <TB1> INFO: 1431040 events read in total (62400ms).
[13:01:32.027] <TB1> INFO: Test took 63315ms.
[13:01:47.332] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 25.525265 .. 53.140723
[13:01:47.568] <TB1> INFO: Expecting 208000 events.
[13:01:57.474] <TB1> INFO: 208000 events read in total (9314ms).
[13:01:57.475] <TB1> INFO: Test took 10142ms.
[13:01:57.522] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 63 (-1/-1) hits flags = 528 (plus default)
[13:01:57.535] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[13:01:57.535] <TB1> INFO: run 1 of 1
[13:01:57.813] <TB1> INFO: Expecting 1630720 events.
[13:02:25.476] <TB1> INFO: 641520 events read in total (27071ms).
[13:02:52.323] <TB1> INFO: 1282552 events read in total (53919ms).
[13:03:06.956] <TB1> INFO: 1630720 events read in total (68551ms).
[13:03:06.999] <TB1> INFO: Test took 69464ms.
[13:03:20.867] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:03:20.867] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[13:03:20.880] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[13:03:20.880] <TB1> INFO: run 1 of 1
[13:03:21.134] <TB1> INFO: Expecting 1364480 events.
[13:03:49.686] <TB1> INFO: 668688 events read in total (27959ms).
[13:04:17.453] <TB1> INFO: 1336344 events read in total (55726ms).
[13:04:19.141] <TB1> INFO: 1364480 events read in total (57414ms).
[13:04:19.169] <TB1> INFO: Test took 58289ms.
[13:04:31.613] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C0.dat
[13:04:31.614] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C1.dat
[13:04:31.614] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C2.dat
[13:04:31.614] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C3.dat
[13:04:31.614] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C4.dat
[13:04:31.615] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C5.dat
[13:04:31.615] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C6.dat
[13:04:31.615] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C7.dat
[13:04:31.615] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C8.dat
[13:04:31.615] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C9.dat
[13:04:31.616] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C10.dat
[13:04:31.616] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C11.dat
[13:04:31.616] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C12.dat
[13:04:31.616] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C13.dat
[13:04:31.616] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C14.dat
[13:04:31.617] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C15.dat
[13:04:31.617] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C0.dat
[13:04:31.628] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C1.dat
[13:04:31.634] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C2.dat
[13:04:31.641] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C3.dat
[13:04:31.647] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C4.dat
[13:04:31.653] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C5.dat
[13:04:31.659] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C6.dat
[13:04:31.666] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C7.dat
[13:04:31.672] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C8.dat
[13:04:31.678] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C9.dat
[13:04:31.684] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C10.dat
[13:04:31.691] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C11.dat
[13:04:31.697] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C12.dat
[13:04:31.703] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C13.dat
[13:04:31.709] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C14.dat
[13:04:31.716] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C15.dat
[13:04:31.722] <TB1> INFO: PixTestTrim::trimTest() done
[13:04:31.722] <TB1> INFO: vtrim: 126 111 140 137 128 136 118 103 127 121 128 153 116 114 123 128
[13:04:31.722] <TB1> INFO: vthrcomp: 127 126 131 129 130 122 125 116 129 125 124 135 126 115 132 130
[13:04:31.722] <TB1> INFO: vcal mean: 34.97 34.99 35.68 35.91 34.98 35.28 35.21 34.99 35.23 34.95 35.06 34.99 34.96 35.03 35.21 35.02
[13:04:31.722] <TB1> INFO: vcal RMS: 1.13 1.09 1.77 2.03 1.15 1.39 1.32 0.96 1.32 1.11 1.17 1.07 1.04 1.02 1.25 1.10
[13:04:31.722] <TB1> INFO: bits mean: 9.36 9.62 9.51 9.36 9.03 9.32 9.39 9.18 9.60 9.93 9.46 9.06 9.21 8.99 9.34 9.67
[13:04:31.722] <TB1> INFO: bits RMS: 2.97 2.84 2.67 2.65 2.99 2.72 2.77 2.68 2.70 2.64 2.74 2.54 2.90 2.91 2.61 2.64
[13:04:31.730] <TB1> INFO: ----------------------------------------------------------------------
[13:04:31.730] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[13:04:31.730] <TB1> INFO: ----------------------------------------------------------------------
[13:04:31.732] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[13:04:31.749] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[13:04:31.749] <TB1> INFO: run 1 of 1
[13:04:32.030] <TB1> INFO: Expecting 4160000 events.
[13:05:05.973] <TB1> INFO: 781330 events read in total (33351ms).
[13:05:39.382] <TB1> INFO: 1556505 events read in total (66760ms).
[13:06:12.218] <TB1> INFO: 2326340 events read in total (99597ms).
[13:06:44.598] <TB1> INFO: 3090490 events read in total (131976ms).
[13:07:17.240] <TB1> INFO: 3849615 events read in total (164618ms).
[13:07:30.596] <TB1> INFO: 4160000 events read in total (177974ms).
[13:07:30.649] <TB1> INFO: Test took 178900ms.
[13:07:53.120] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 210 (-1/-1) hits flags = 528 (plus default)
[13:07:53.134] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[13:07:53.134] <TB1> INFO: run 1 of 1
[13:07:53.370] <TB1> INFO: Expecting 4388800 events.
[13:08:25.969] <TB1> INFO: 736555 events read in total (32007ms).
[13:08:58.136] <TB1> INFO: 1469530 events read in total (64174ms).
[13:09:30.441] <TB1> INFO: 2198980 events read in total (96479ms).
[13:10:02.051] <TB1> INFO: 2923415 events read in total (128089ms).
[13:10:33.232] <TB1> INFO: 3644800 events read in total (159270ms).
[13:11:06.089] <TB1> INFO: 4366280 events read in total (192127ms).
[13:11:07.519] <TB1> INFO: 4388800 events read in total (193557ms).
[13:11:07.606] <TB1> INFO: Test took 194472ms.
[13:11:33.950] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[13:11:33.963] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[13:11:33.963] <TB1> INFO: run 1 of 1
[13:11:34.200] <TB1> INFO: Expecting 4305600 events.
[13:12:07.053] <TB1> INFO: 742025 events read in total (32261ms).
[13:12:39.146] <TB1> INFO: 1480030 events read in total (64354ms).
[13:13:11.347] <TB1> INFO: 2214650 events read in total (96556ms).
[13:13:43.363] <TB1> INFO: 2944135 events read in total (128571ms).
[13:14:15.049] <TB1> INFO: 3670130 events read in total (160257ms).
[13:14:42.164] <TB1> INFO: 4305600 events read in total (187372ms).
[13:14:42.234] <TB1> INFO: Test took 188271ms.
[13:15:10.378] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[13:15:10.390] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[13:15:10.391] <TB1> INFO: run 1 of 1
[13:15:10.626] <TB1> INFO: Expecting 4264000 events.
[13:15:43.034] <TB1> INFO: 745310 events read in total (31816ms).
[13:16:14.653] <TB1> INFO: 1486055 events read in total (63435ms).
[13:16:46.526] <TB1> INFO: 2223640 events read in total (95308ms).
[13:17:18.150] <TB1> INFO: 2955860 events read in total (126932ms).
[13:17:49.972] <TB1> INFO: 3684540 events read in total (158754ms).
[13:18:14.906] <TB1> INFO: 4264000 events read in total (183688ms).
[13:18:14.982] <TB1> INFO: Test took 184591ms.
[13:18:40.731] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[13:18:40.744] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[13:18:40.744] <TB1> INFO: run 1 of 1
[13:18:40.982] <TB1> INFO: Expecting 4305600 events.
[13:19:13.115] <TB1> INFO: 742475 events read in total (31541ms).
[13:19:44.886] <TB1> INFO: 1480815 events read in total (63312ms).
[13:20:16.836] <TB1> INFO: 2215690 events read in total (95262ms).
[13:20:48.168] <TB1> INFO: 2945270 events read in total (126594ms).
[13:21:20.699] <TB1> INFO: 3671530 events read in total (159125ms).
[13:21:48.169] <TB1> INFO: 4305600 events read in total (186595ms).
[13:21:48.234] <TB1> INFO: Test took 187490ms.
[13:22:12.151] <TB1> INFO: PixTestTrim::trimBitTest() done
[13:22:12.152] <TB1> INFO: PixTestTrim::doTest() done, duration: 2547 seconds
[13:22:12.152] <TB1> INFO: Decoding statistics:
[13:22:12.152] <TB1> INFO: General information:
[13:22:12.152] <TB1> INFO: 16bit words read: 0
[13:22:12.152] <TB1> INFO: valid events total: 0
[13:22:12.152] <TB1> INFO: empty events: 0
[13:22:12.152] <TB1> INFO: valid events with pixels: 0
[13:22:12.152] <TB1> INFO: valid pixel hits: 0
[13:22:12.152] <TB1> INFO: Event errors: 0
[13:22:12.152] <TB1> INFO: start marker: 0
[13:22:12.152] <TB1> INFO: stop marker: 0
[13:22:12.152] <TB1> INFO: overflow: 0
[13:22:12.152] <TB1> INFO: invalid 5bit words: 0
[13:22:12.152] <TB1> INFO: invalid XOR eye diagram: 0
[13:22:12.152] <TB1> INFO: frame (failed synchr.): 0
[13:22:12.152] <TB1> INFO: idle data (no TBM trl): 0
[13:22:12.152] <TB1> INFO: no data (only TBM hdr): 0
[13:22:12.152] <TB1> INFO: TBM errors: 0
[13:22:12.152] <TB1> INFO: flawed TBM headers: 0
[13:22:12.152] <TB1> INFO: flawed TBM trailers: 0
[13:22:12.152] <TB1> INFO: event ID mismatches: 0
[13:22:12.152] <TB1> INFO: ROC errors: 0
[13:22:12.152] <TB1> INFO: missing ROC header(s): 0
[13:22:12.152] <TB1> INFO: misplaced readback start: 0
[13:22:12.152] <TB1> INFO: Pixel decoding errors: 0
[13:22:12.152] <TB1> INFO: pixel data incomplete: 0
[13:22:12.152] <TB1> INFO: pixel address: 0
[13:22:12.152] <TB1> INFO: pulse height fill bit: 0
[13:22:12.152] <TB1> INFO: buffer corruption: 0
[13:22:12.749] <TB1> INFO: ######################################################################
[13:22:12.749] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:22:12.749] <TB1> INFO: ######################################################################
[13:22:12.989] <TB1> INFO: Expecting 41600 events.
[13:22:16.515] <TB1> INFO: 41600 events read in total (2934ms).
[13:22:16.516] <TB1> INFO: Test took 3766ms.
[13:22:16.957] <TB1> INFO: Expecting 41600 events.
[13:22:20.603] <TB1> INFO: 41600 events read in total (3054ms).
[13:22:20.604] <TB1> INFO: Test took 3884ms.
[13:22:20.894] <TB1> INFO: Expecting 41600 events.
[13:22:24.466] <TB1> INFO: 41600 events read in total (2981ms).
[13:22:24.466] <TB1> INFO: Test took 3838ms.
[13:22:24.756] <TB1> INFO: Expecting 41600 events.
[13:22:28.315] <TB1> INFO: 41600 events read in total (2968ms).
[13:22:28.316] <TB1> INFO: Test took 3826ms.
[13:22:28.606] <TB1> INFO: Expecting 41600 events.
[13:22:32.353] <TB1> INFO: 41600 events read in total (3155ms).
[13:22:32.354] <TB1> INFO: Test took 4013ms.
[13:22:32.642] <TB1> INFO: Expecting 41600 events.
[13:22:36.281] <TB1> INFO: 41600 events read in total (3047ms).
[13:22:36.282] <TB1> INFO: Test took 3905ms.
[13:22:36.573] <TB1> INFO: Expecting 41600 events.
[13:22:40.224] <TB1> INFO: 41600 events read in total (3060ms).
[13:22:40.224] <TB1> INFO: Test took 3917ms.
[13:22:40.514] <TB1> INFO: Expecting 41600 events.
[13:22:44.071] <TB1> INFO: 41600 events read in total (2966ms).
[13:22:44.072] <TB1> INFO: Test took 3823ms.
[13:22:44.360] <TB1> INFO: Expecting 41600 events.
[13:22:48.004] <TB1> INFO: 41600 events read in total (3052ms).
[13:22:48.005] <TB1> INFO: Test took 3909ms.
[13:22:48.294] <TB1> INFO: Expecting 41600 events.
[13:22:51.941] <TB1> INFO: 41600 events read in total (3055ms).
[13:22:51.942] <TB1> INFO: Test took 3913ms.
[13:22:52.232] <TB1> INFO: Expecting 41600 events.
[13:22:55.782] <TB1> INFO: 41600 events read in total (2958ms).
[13:22:55.783] <TB1> INFO: Test took 3816ms.
[13:22:56.072] <TB1> INFO: Expecting 41600 events.
[13:22:59.627] <TB1> INFO: 41600 events read in total (2963ms).
[13:22:59.628] <TB1> INFO: Test took 3820ms.
[13:22:59.916] <TB1> INFO: Expecting 41600 events.
[13:23:03.449] <TB1> INFO: 41600 events read in total (2941ms).
[13:23:03.451] <TB1> INFO: Test took 3800ms.
[13:23:03.742] <TB1> INFO: Expecting 41600 events.
[13:23:07.375] <TB1> INFO: 41600 events read in total (3041ms).
[13:23:07.375] <TB1> INFO: Test took 3898ms.
[13:23:07.664] <TB1> INFO: Expecting 41600 events.
[13:23:11.357] <TB1> INFO: 41600 events read in total (3102ms).
[13:23:11.358] <TB1> INFO: Test took 3959ms.
[13:23:11.655] <TB1> INFO: Expecting 41600 events.
[13:23:15.387] <TB1> INFO: 41600 events read in total (3141ms).
[13:23:15.388] <TB1> INFO: Test took 4005ms.
[13:23:15.679] <TB1> INFO: Expecting 41600 events.
[13:23:19.356] <TB1> INFO: 41600 events read in total (3085ms).
[13:23:19.357] <TB1> INFO: Test took 3943ms.
[13:23:19.646] <TB1> INFO: Expecting 41600 events.
[13:23:23.197] <TB1> INFO: 41600 events read in total (2959ms).
[13:23:23.198] <TB1> INFO: Test took 3816ms.
[13:23:23.487] <TB1> INFO: Expecting 41600 events.
[13:23:27.051] <TB1> INFO: 41600 events read in total (2973ms).
[13:23:27.052] <TB1> INFO: Test took 3830ms.
[13:23:27.358] <TB1> INFO: Expecting 41600 events.
[13:23:30.925] <TB1> INFO: 41600 events read in total (2975ms).
[13:23:30.926] <TB1> INFO: Test took 3850ms.
[13:23:31.217] <TB1> INFO: Expecting 41600 events.
[13:23:34.792] <TB1> INFO: 41600 events read in total (2983ms).
[13:23:34.793] <TB1> INFO: Test took 3841ms.
[13:23:35.082] <TB1> INFO: Expecting 41600 events.
[13:23:38.669] <TB1> INFO: 41600 events read in total (2995ms).
[13:23:38.670] <TB1> INFO: Test took 3853ms.
[13:23:38.960] <TB1> INFO: Expecting 41600 events.
[13:23:42.526] <TB1> INFO: 41600 events read in total (2975ms).
[13:23:42.527] <TB1> INFO: Test took 3833ms.
[13:23:42.816] <TB1> INFO: Expecting 41600 events.
[13:23:46.484] <TB1> INFO: 41600 events read in total (3076ms).
[13:23:46.484] <TB1> INFO: Test took 3933ms.
[13:23:46.773] <TB1> INFO: Expecting 41600 events.
[13:23:50.384] <TB1> INFO: 41600 events read in total (3019ms).
[13:23:50.385] <TB1> INFO: Test took 3877ms.
[13:23:50.676] <TB1> INFO: Expecting 41600 events.
[13:23:54.198] <TB1> INFO: 41600 events read in total (2930ms).
[13:23:54.199] <TB1> INFO: Test took 3788ms.
[13:23:54.490] <TB1> INFO: Expecting 41600 events.
[13:23:58.024] <TB1> INFO: 41600 events read in total (2942ms).
[13:23:58.025] <TB1> INFO: Test took 3801ms.
[13:23:58.317] <TB1> INFO: Expecting 41600 events.
[13:24:01.917] <TB1> INFO: 41600 events read in total (3008ms).
[13:24:01.918] <TB1> INFO: Test took 3866ms.
[13:24:02.212] <TB1> INFO: Expecting 41600 events.
[13:24:05.788] <TB1> INFO: 41600 events read in total (2984ms).
[13:24:05.788] <TB1> INFO: Test took 3841ms.
[13:24:06.082] <TB1> INFO: Expecting 2560 events.
[13:24:06.977] <TB1> INFO: 2560 events read in total (303ms).
[13:24:06.978] <TB1> INFO: Test took 1174ms.
[13:24:07.283] <TB1> INFO: Expecting 2560 events.
[13:24:08.175] <TB1> INFO: 2560 events read in total (300ms).
[13:24:08.175] <TB1> INFO: Test took 1197ms.
[13:24:08.483] <TB1> INFO: Expecting 2560 events.
[13:24:09.372] <TB1> INFO: 2560 events read in total (297ms).
[13:24:09.372] <TB1> INFO: Test took 1196ms.
[13:24:09.681] <TB1> INFO: Expecting 2560 events.
[13:24:10.570] <TB1> INFO: 2560 events read in total (298ms).
[13:24:10.570] <TB1> INFO: Test took 1197ms.
[13:24:10.877] <TB1> INFO: Expecting 2560 events.
[13:24:11.759] <TB1> INFO: 2560 events read in total (291ms).
[13:24:11.760] <TB1> INFO: Test took 1189ms.
[13:24:12.068] <TB1> INFO: Expecting 2560 events.
[13:24:12.948] <TB1> INFO: 2560 events read in total (289ms).
[13:24:12.949] <TB1> INFO: Test took 1189ms.
[13:24:13.257] <TB1> INFO: Expecting 2560 events.
[13:24:14.143] <TB1> INFO: 2560 events read in total (295ms).
[13:24:14.143] <TB1> INFO: Test took 1193ms.
[13:24:14.450] <TB1> INFO: Expecting 2560 events.
[13:24:15.338] <TB1> INFO: 2560 events read in total (296ms).
[13:24:15.338] <TB1> INFO: Test took 1194ms.
[13:24:15.646] <TB1> INFO: Expecting 2560 events.
[13:24:16.525] <TB1> INFO: 2560 events read in total (289ms).
[13:24:16.526] <TB1> INFO: Test took 1187ms.
[13:24:16.834] <TB1> INFO: Expecting 2560 events.
[13:24:17.719] <TB1> INFO: 2560 events read in total (293ms).
[13:24:17.719] <TB1> INFO: Test took 1193ms.
[13:24:18.026] <TB1> INFO: Expecting 2560 events.
[13:24:18.912] <TB1> INFO: 2560 events read in total (294ms).
[13:24:18.912] <TB1> INFO: Test took 1192ms.
[13:24:19.220] <TB1> INFO: Expecting 2560 events.
[13:24:20.105] <TB1> INFO: 2560 events read in total (293ms).
[13:24:20.106] <TB1> INFO: Test took 1194ms.
[13:24:20.413] <TB1> INFO: Expecting 2560 events.
[13:24:21.303] <TB1> INFO: 2560 events read in total (298ms).
[13:24:21.303] <TB1> INFO: Test took 1197ms.
[13:24:21.611] <TB1> INFO: Expecting 2560 events.
[13:24:22.499] <TB1> INFO: 2560 events read in total (296ms).
[13:24:22.500] <TB1> INFO: Test took 1196ms.
[13:24:22.807] <TB1> INFO: Expecting 2560 events.
[13:24:23.694] <TB1> INFO: 2560 events read in total (295ms).
[13:24:23.694] <TB1> INFO: Test took 1194ms.
[13:24:23.001] <TB1> INFO: Expecting 2560 events.
[13:24:24.886] <TB1> INFO: 2560 events read in total (293ms).
[13:24:24.887] <TB1> INFO: Test took 1192ms.
[13:24:24.890] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:25.196] <TB1> INFO: Expecting 655360 events.
[13:24:39.877] <TB1> INFO: 655360 events read in total (14090ms).
[13:24:39.892] <TB1> INFO: Expecting 655360 events.
[13:24:54.562] <TB1> INFO: 655360 events read in total (14267ms).
[13:24:54.581] <TB1> INFO: Expecting 655360 events.
[13:25:09.160] <TB1> INFO: 655360 events read in total (14176ms).
[13:25:09.183] <TB1> INFO: Expecting 655360 events.
[13:25:23.685] <TB1> INFO: 655360 events read in total (14099ms).
[13:25:23.712] <TB1> INFO: Expecting 655360 events.
[13:25:38.339] <TB1> INFO: 655360 events read in total (14223ms).
[13:25:38.368] <TB1> INFO: Expecting 655360 events.
[13:25:53.023] <TB1> INFO: 655360 events read in total (14252ms).
[13:25:53.056] <TB1> INFO: Expecting 655360 events.
[13:26:07.625] <TB1> INFO: 655360 events read in total (14166ms).
[13:26:07.662] <TB1> INFO: Expecting 655360 events.
[13:26:22.208] <TB1> INFO: 655360 events read in total (14143ms).
[13:26:22.250] <TB1> INFO: Expecting 655360 events.
[13:26:36.757] <TB1> INFO: 655360 events read in total (14103ms).
[13:26:36.809] <TB1> INFO: Expecting 655360 events.
[13:26:51.343] <TB1> INFO: 655360 events read in total (14131ms).
[13:26:51.394] <TB1> INFO: Expecting 655360 events.
[13:27:05.961] <TB1> INFO: 655360 events read in total (14164ms).
[13:27:06.027] <TB1> INFO: Expecting 655360 events.
[13:27:20.479] <TB1> INFO: 655360 events read in total (14049ms).
[13:27:20.563] <TB1> INFO: Expecting 655360 events.
[13:27:35.168] <TB1> INFO: 655360 events read in total (14202ms).
[13:27:35.308] <TB1> INFO: Expecting 655360 events.
[13:27:49.868] <TB1> INFO: 655360 events read in total (14157ms).
[13:27:49.957] <TB1> INFO: Expecting 655360 events.
[13:28:04.445] <TB1> INFO: 655360 events read in total (14085ms).
[13:28:04.541] <TB1> INFO: Expecting 655360 events.
[13:28:19.053] <TB1> INFO: 655360 events read in total (14109ms).
[13:28:19.137] <TB1> INFO: Test took 234247ms.
[13:28:19.226] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:28:19.489] <TB1> INFO: Expecting 655360 events.
[13:28:34.253] <TB1> INFO: 655360 events read in total (14172ms).
[13:28:34.271] <TB1> INFO: Expecting 655360 events.
[13:28:48.778] <TB1> INFO: 655360 events read in total (14104ms).
[13:28:48.796] <TB1> INFO: Expecting 655360 events.
[13:29:03.246] <TB1> INFO: 655360 events read in total (14047ms).
[13:29:03.270] <TB1> INFO: Expecting 655360 events.
[13:29:17.491] <TB1> INFO: 655360 events read in total (13818ms).
[13:29:17.519] <TB1> INFO: Expecting 655360 events.
[13:29:31.921] <TB1> INFO: 655360 events read in total (13999ms).
[13:29:31.950] <TB1> INFO: Expecting 655360 events.
[13:29:46.436] <TB1> INFO: 655360 events read in total (14083ms).
[13:29:46.470] <TB1> INFO: Expecting 655360 events.
[13:30:00.983] <TB1> INFO: 655360 events read in total (14110ms).
[13:30:01.021] <TB1> INFO: Expecting 655360 events.
[13:30:15.415] <TB1> INFO: 655360 events read in total (13991ms).
[13:30:15.455] <TB1> INFO: Expecting 655360 events.
[13:30:29.843] <TB1> INFO: 655360 events read in total (13985ms).
[13:30:29.888] <TB1> INFO: Expecting 655360 events.
[13:30:44.209] <TB1> INFO: 655360 events read in total (13918ms).
[13:30:44.258] <TB1> INFO: Expecting 655360 events.
[13:30:58.915] <TB1> INFO: 655360 events read in total (14253ms).
[13:30:58.982] <TB1> INFO: Expecting 655360 events.
[13:31:13.298] <TB1> INFO: 655360 events read in total (13913ms).
[13:31:13.364] <TB1> INFO: Expecting 655360 events.
[13:31:27.574] <TB1> INFO: 655360 events read in total (13807ms).
[13:31:27.680] <TB1> INFO: Expecting 655360 events.
[13:31:41.782] <TB1> INFO: 655360 events read in total (13699ms).
[13:31:41.857] <TB1> INFO: Expecting 655360 events.
[13:31:56.800] <TB1> INFO: 655360 events read in total (14540ms).
[13:31:56.876] <TB1> INFO: Expecting 655360 events.
[13:32:11.927] <TB1> INFO: 655360 events read in total (14648ms).
[13:32:11.002] <TB1> INFO: Test took 232776ms.
[13:32:12.161] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:32:12.167] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[13:32:12.173] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[13:32:12.178] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[13:32:12.183] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[13:32:12.189] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[13:32:12.195] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[13:32:12.200] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[13:32:12.206] <TB1> INFO: safety margin for low PH: adding 8, margin is now 28
[13:32:12.212] <TB1> INFO: safety margin for low PH: adding 9, margin is now 29
[13:32:12.217] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:32:12.223] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[13:32:12.229] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[13:32:12.234] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[13:32:12.240] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[13:32:12.245] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[13:32:12.251] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[13:32:12.257] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:32:12.262] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[13:32:12.268] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[13:32:12.273] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[13:32:12.279] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:32:12.285] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[13:32:12.290] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[13:32:12.296] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[13:32:12.301] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:32:12.307] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[13:32:12.313] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[13:32:12.318] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[13:32:12.324] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[13:32:12.329] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[13:32:12.335] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[13:32:12.341] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[13:32:12.346] <TB1> INFO: safety margin for low PH: adding 8, margin is now 28
[13:32:12.352] <TB1> INFO: safety margin for low PH: adding 9, margin is now 29
[13:32:12.358] <TB1> INFO: safety margin for low PH: adding 10, margin is now 30
[13:32:12.363] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:32:12.369] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:32:12.375] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[13:32:12.380] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:32:12.386] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[13:32:12.392] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:32:12.398] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[13:32:12.403] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[13:32:12.409] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:32:12.415] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[13:32:12.420] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[13:32:12.426] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[13:32:12.431] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[13:32:12.437] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:32:12.443] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:32:12.448] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[13:32:12.454] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[13:32:12.459] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[13:32:12.465] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[13:32:12.471] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[13:32:12.477] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[13:32:12.482] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[13:32:12.488] <TB1> INFO: safety margin for low PH: adding 8, margin is now 28
[13:32:12.494] <TB1> INFO: safety margin for low PH: adding 9, margin is now 29
[13:32:12.499] <TB1> INFO: safety margin for low PH: adding 10, margin is now 30
[13:32:12.505] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:32:12.511] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:32:12.516] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[13:32:12.522] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[13:32:12.528] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:32:12.533] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:32:12.569] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C0.dat
[13:32:12.569] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C1.dat
[13:32:12.570] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C2.dat
[13:32:12.570] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C3.dat
[13:32:12.570] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C4.dat
[13:32:12.570] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C5.dat
[13:32:12.570] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C6.dat
[13:32:12.570] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C7.dat
[13:32:12.570] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C8.dat
[13:32:12.571] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C9.dat
[13:32:12.571] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C10.dat
[13:32:12.571] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C11.dat
[13:32:12.571] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C12.dat
[13:32:12.571] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C13.dat
[13:32:12.571] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C14.dat
[13:32:12.571] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C15.dat
[13:32:12.864] <TB1> INFO: Expecting 41600 events.
[13:32:16.077] <TB1> INFO: 41600 events read in total (2622ms).
[13:32:16.078] <TB1> INFO: Test took 3504ms.
[13:32:16.561] <TB1> INFO: Expecting 41600 events.
[13:32:19.679] <TB1> INFO: 41600 events read in total (2527ms).
[13:32:19.680] <TB1> INFO: Test took 3387ms.
[13:32:20.133] <TB1> INFO: Expecting 41600 events.
[13:32:23.356] <TB1> INFO: 41600 events read in total (2631ms).
[13:32:23.357] <TB1> INFO: Test took 3466ms.
[13:32:23.573] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:23.663] <TB1> INFO: Expecting 2560 events.
[13:32:24.557] <TB1> INFO: 2560 events read in total (303ms).
[13:32:24.558] <TB1> INFO: Test took 985ms.
[13:32:24.559] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:24.866] <TB1> INFO: Expecting 2560 events.
[13:32:25.756] <TB1> INFO: 2560 events read in total (298ms).
[13:32:25.756] <TB1> INFO: Test took 1197ms.
[13:32:25.759] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:26.064] <TB1> INFO: Expecting 2560 events.
[13:32:26.955] <TB1> INFO: 2560 events read in total (299ms).
[13:32:26.955] <TB1> INFO: Test took 1196ms.
[13:32:26.958] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:27.263] <TB1> INFO: Expecting 2560 events.
[13:32:28.156] <TB1> INFO: 2560 events read in total (302ms).
[13:32:28.157] <TB1> INFO: Test took 1199ms.
[13:32:28.159] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:28.465] <TB1> INFO: Expecting 2560 events.
[13:32:29.354] <TB1> INFO: 2560 events read in total (297ms).
[13:32:29.354] <TB1> INFO: Test took 1195ms.
[13:32:29.356] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:29.662] <TB1> INFO: Expecting 2560 events.
[13:32:30.552] <TB1> INFO: 2560 events read in total (298ms).
[13:32:30.552] <TB1> INFO: Test took 1196ms.
[13:32:30.554] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:30.861] <TB1> INFO: Expecting 2560 events.
[13:32:31.751] <TB1> INFO: 2560 events read in total (298ms).
[13:32:31.751] <TB1> INFO: Test took 1197ms.
[13:32:31.755] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:32.060] <TB1> INFO: Expecting 2560 events.
[13:32:32.949] <TB1> INFO: 2560 events read in total (298ms).
[13:32:32.949] <TB1> INFO: Test took 1194ms.
[13:32:32.952] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:33.257] <TB1> INFO: Expecting 2560 events.
[13:32:34.143] <TB1> INFO: 2560 events read in total (294ms).
[13:32:34.144] <TB1> INFO: Test took 1192ms.
[13:32:34.147] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:34.452] <TB1> INFO: Expecting 2560 events.
[13:32:35.338] <TB1> INFO: 2560 events read in total (294ms).
[13:32:35.339] <TB1> INFO: Test took 1192ms.
[13:32:35.341] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:35.647] <TB1> INFO: Expecting 2560 events.
[13:32:36.528] <TB1> INFO: 2560 events read in total (289ms).
[13:32:36.528] <TB1> INFO: Test took 1187ms.
[13:32:36.530] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:36.836] <TB1> INFO: Expecting 2560 events.
[13:32:37.722] <TB1> INFO: 2560 events read in total (294ms).
[13:32:37.723] <TB1> INFO: Test took 1193ms.
[13:32:37.725] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:38.030] <TB1> INFO: Expecting 2560 events.
[13:32:38.916] <TB1> INFO: 2560 events read in total (294ms).
[13:32:38.917] <TB1> INFO: Test took 1192ms.
[13:32:38.919] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:39.225] <TB1> INFO: Expecting 2560 events.
[13:32:40.106] <TB1> INFO: 2560 events read in total (290ms).
[13:32:40.107] <TB1> INFO: Test took 1188ms.
[13:32:40.109] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:40.414] <TB1> INFO: Expecting 2560 events.
[13:32:41.304] <TB1> INFO: 2560 events read in total (298ms).
[13:32:41.304] <TB1> INFO: Test took 1195ms.
[13:32:41.306] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:41.613] <TB1> INFO: Expecting 2560 events.
[13:32:42.497] <TB1> INFO: 2560 events read in total (292ms).
[13:32:42.497] <TB1> INFO: Test took 1191ms.
[13:32:42.500] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:42.806] <TB1> INFO: Expecting 2560 events.
[13:32:43.696] <TB1> INFO: 2560 events read in total (298ms).
[13:32:43.697] <TB1> INFO: Test took 1197ms.
[13:32:43.699] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:44.005] <TB1> INFO: Expecting 2560 events.
[13:32:44.894] <TB1> INFO: 2560 events read in total (298ms).
[13:32:44.894] <TB1> INFO: Test took 1195ms.
[13:32:44.896] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:45.203] <TB1> INFO: Expecting 2560 events.
[13:32:46.094] <TB1> INFO: 2560 events read in total (299ms).
[13:32:46.094] <TB1> INFO: Test took 1198ms.
[13:32:46.097] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:46.402] <TB1> INFO: Expecting 2560 events.
[13:32:47.294] <TB1> INFO: 2560 events read in total (300ms).
[13:32:47.295] <TB1> INFO: Test took 1199ms.
[13:32:47.297] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:47.603] <TB1> INFO: Expecting 2560 events.
[13:32:48.489] <TB1> INFO: 2560 events read in total (294ms).
[13:32:48.489] <TB1> INFO: Test took 1192ms.
[13:32:48.492] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:48.796] <TB1> INFO: Expecting 2560 events.
[13:32:49.687] <TB1> INFO: 2560 events read in total (299ms).
[13:32:49.687] <TB1> INFO: Test took 1195ms.
[13:32:49.690] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:49.994] <TB1> INFO: Expecting 2560 events.
[13:32:50.880] <TB1> INFO: 2560 events read in total (294ms).
[13:32:50.881] <TB1> INFO: Test took 1192ms.
[13:32:50.884] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:51.189] <TB1> INFO: Expecting 2560 events.
[13:32:52.079] <TB1> INFO: 2560 events read in total (299ms).
[13:32:52.079] <TB1> INFO: Test took 1195ms.
[13:32:52.082] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:52.388] <TB1> INFO: Expecting 2560 events.
[13:32:53.272] <TB1> INFO: 2560 events read in total (293ms).
[13:32:53.272] <TB1> INFO: Test took 1190ms.
[13:32:53.274] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:53.581] <TB1> INFO: Expecting 2560 events.
[13:32:54.469] <TB1> INFO: 2560 events read in total (297ms).
[13:32:54.470] <TB1> INFO: Test took 1196ms.
[13:32:54.473] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:54.778] <TB1> INFO: Expecting 2560 events.
[13:32:55.673] <TB1> INFO: 2560 events read in total (303ms).
[13:32:55.673] <TB1> INFO: Test took 1201ms.
[13:32:55.676] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:55.981] <TB1> INFO: Expecting 2560 events.
[13:32:56.870] <TB1> INFO: 2560 events read in total (298ms).
[13:32:56.870] <TB1> INFO: Test took 1195ms.
[13:32:56.873] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:57.178] <TB1> INFO: Expecting 2560 events.
[13:32:58.068] <TB1> INFO: 2560 events read in total (298ms).
[13:32:58.068] <TB1> INFO: Test took 1195ms.
[13:32:58.071] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:58.376] <TB1> INFO: Expecting 2560 events.
[13:32:59.265] <TB1> INFO: 2560 events read in total (297ms).
[13:32:59.265] <TB1> INFO: Test took 1194ms.
[13:32:59.268] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:59.574] <TB1> INFO: Expecting 2560 events.
[13:33:00.464] <TB1> INFO: 2560 events read in total (298ms).
[13:33:00.465] <TB1> INFO: Test took 1197ms.
[13:33:00.468] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:33:00.773] <TB1> INFO: Expecting 2560 events.
[13:33:01.665] <TB1> INFO: 2560 events read in total (301ms).
[13:33:01.665] <TB1> INFO: Test took 1198ms.
[13:33:02.134] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 649 seconds
[13:33:02.134] <TB1> INFO: PH scale (per ROC): 48 51 50 44 46 46 43 46 29 50 58 44 35 36 39 47
[13:33:02.134] <TB1> INFO: PH offset (per ROC): 101 112 127 95 112 106 134 94 107 126 116 80 94 108 91 104
[13:33:02.143] <TB1> INFO: Decoding statistics:
[13:33:02.143] <TB1> INFO: General information:
[13:33:02.143] <TB1> INFO: 16bit words read: 127876
[13:33:02.143] <TB1> INFO: valid events total: 20480
[13:33:02.143] <TB1> INFO: empty events: 17982
[13:33:02.143] <TB1> INFO: valid events with pixels: 2498
[13:33:02.143] <TB1> INFO: valid pixel hits: 2498
[13:33:02.143] <TB1> INFO: Event errors: 0
[13:33:02.143] <TB1> INFO: start marker: 0
[13:33:02.143] <TB1> INFO: stop marker: 0
[13:33:02.143] <TB1> INFO: overflow: 0
[13:33:02.143] <TB1> INFO: invalid 5bit words: 0
[13:33:02.143] <TB1> INFO: invalid XOR eye diagram: 0
[13:33:02.143] <TB1> INFO: frame (failed synchr.): 0
[13:33:02.143] <TB1> INFO: idle data (no TBM trl): 0
[13:33:02.143] <TB1> INFO: no data (only TBM hdr): 0
[13:33:02.143] <TB1> INFO: TBM errors: 0
[13:33:02.143] <TB1> INFO: flawed TBM headers: 0
[13:33:02.143] <TB1> INFO: flawed TBM trailers: 0
[13:33:02.143] <TB1> INFO: event ID mismatches: 0
[13:33:02.143] <TB1> INFO: ROC errors: 0
[13:33:02.143] <TB1> INFO: missing ROC header(s): 0
[13:33:02.143] <TB1> INFO: misplaced readback start: 0
[13:33:02.143] <TB1> INFO: Pixel decoding errors: 0
[13:33:02.143] <TB1> INFO: pixel data incomplete: 0
[13:33:02.143] <TB1> INFO: pixel address: 0
[13:33:02.143] <TB1> INFO: pulse height fill bit: 0
[13:33:02.143] <TB1> INFO: buffer corruption: 0
[13:33:02.300] <TB1> INFO: ######################################################################
[13:33:02.300] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:33:02.300] <TB1> INFO: ######################################################################
[13:33:02.314] <TB1> INFO: scanning low vcal = 10
[13:33:02.565] <TB1> INFO: Expecting 41600 events.
[13:33:06.161] <TB1> INFO: 41600 events read in total (3005ms).
[13:33:06.161] <TB1> INFO: Test took 3847ms.
[13:33:06.163] <TB1> INFO: scanning low vcal = 20
[13:33:06.459] <TB1> INFO: Expecting 41600 events.
[13:33:10.054] <TB1> INFO: 41600 events read in total (3004ms).
[13:33:10.054] <TB1> INFO: Test took 3891ms.
[13:33:10.056] <TB1> INFO: scanning low vcal = 30
[13:33:10.353] <TB1> INFO: Expecting 41600 events.
[13:33:14.040] <TB1> INFO: 41600 events read in total (3096ms).
[13:33:14.041] <TB1> INFO: Test took 3985ms.
[13:33:14.043] <TB1> INFO: scanning low vcal = 40
[13:33:14.320] <TB1> INFO: Expecting 41600 events.
[13:33:18.392] <TB1> INFO: 41600 events read in total (3480ms).
[13:33:18.393] <TB1> INFO: Test took 4349ms.
[13:33:18.396] <TB1> INFO: scanning low vcal = 50
[13:33:18.673] <TB1> INFO: Expecting 41600 events.
[13:33:22.755] <TB1> INFO: 41600 events read in total (3490ms).
[13:33:22.756] <TB1> INFO: Test took 4360ms.
[13:33:22.759] <TB1> INFO: scanning low vcal = 60
[13:33:23.036] <TB1> INFO: Expecting 41600 events.
[13:33:27.110] <TB1> INFO: 41600 events read in total (3482ms).
[13:33:27.111] <TB1> INFO: Test took 4352ms.
[13:33:27.114] <TB1> INFO: scanning low vcal = 70
[13:33:27.414] <TB1> INFO: Expecting 41600 events.
[13:33:31.415] <TB1> INFO: 41600 events read in total (3409ms).
[13:33:31.416] <TB1> INFO: Test took 4302ms.
[13:33:31.419] <TB1> INFO: scanning low vcal = 80
[13:33:31.696] <TB1> INFO: Expecting 41600 events.
[13:33:35.714] <TB1> INFO: 41600 events read in total (3426ms).
[13:33:35.715] <TB1> INFO: Test took 4296ms.
[13:33:35.718] <TB1> INFO: scanning low vcal = 90
[13:33:35.994] <TB1> INFO: Expecting 41600 events.
[13:33:39.998] <TB1> INFO: 41600 events read in total (3412ms).
[13:33:39.999] <TB1> INFO: Test took 4281ms.
[13:33:39.003] <TB1> INFO: scanning low vcal = 100
[13:33:40.278] <TB1> INFO: Expecting 41600 events.
[13:33:44.335] <TB1> INFO: 41600 events read in total (3465ms).
[13:33:44.335] <TB1> INFO: Test took 4332ms.
[13:33:44.338] <TB1> INFO: scanning low vcal = 110
[13:33:44.615] <TB1> INFO: Expecting 41600 events.
[13:33:48.658] <TB1> INFO: 41600 events read in total (3451ms).
[13:33:48.659] <TB1> INFO: Test took 4320ms.
[13:33:48.662] <TB1> INFO: scanning low vcal = 120
[13:33:48.939] <TB1> INFO: Expecting 41600 events.
[13:33:53.007] <TB1> INFO: 41600 events read in total (3477ms).
[13:33:53.008] <TB1> INFO: Test took 4346ms.
[13:33:53.011] <TB1> INFO: scanning low vcal = 130
[13:33:53.288] <TB1> INFO: Expecting 41600 events.
[13:33:57.343] <TB1> INFO: 41600 events read in total (3464ms).
[13:33:57.344] <TB1> INFO: Test took 4333ms.
[13:33:57.347] <TB1> INFO: scanning low vcal = 140
[13:33:57.623] <TB1> INFO: Expecting 41600 events.
[13:34:01.676] <TB1> INFO: 41600 events read in total (3461ms).
[13:34:01.676] <TB1> INFO: Test took 4329ms.
[13:34:01.679] <TB1> INFO: scanning low vcal = 150
[13:34:01.956] <TB1> INFO: Expecting 41600 events.
[13:34:05.997] <TB1> INFO: 41600 events read in total (3449ms).
[13:34:05.998] <TB1> INFO: Test took 4319ms.
[13:34:05.001] <TB1> INFO: scanning low vcal = 160
[13:34:06.278] <TB1> INFO: Expecting 41600 events.
[13:34:10.326] <TB1> INFO: 41600 events read in total (3457ms).
[13:34:10.327] <TB1> INFO: Test took 4326ms.
[13:34:10.329] <TB1> INFO: scanning low vcal = 170
[13:34:10.606] <TB1> INFO: Expecting 41600 events.
[13:34:14.604] <TB1> INFO: 41600 events read in total (3406ms).
[13:34:14.605] <TB1> INFO: Test took 4275ms.
[13:34:14.610] <TB1> INFO: scanning low vcal = 180
[13:34:14.884] <TB1> INFO: Expecting 41600 events.
[13:34:18.940] <TB1> INFO: 41600 events read in total (3464ms).
[13:34:18.941] <TB1> INFO: Test took 4331ms.
[13:34:18.944] <TB1> INFO: scanning low vcal = 190
[13:34:19.221] <TB1> INFO: Expecting 41600 events.
[13:34:23.219] <TB1> INFO: 41600 events read in total (3406ms).
[13:34:23.220] <TB1> INFO: Test took 4275ms.
[13:34:23.223] <TB1> INFO: scanning low vcal = 200
[13:34:23.500] <TB1> INFO: Expecting 41600 events.
[13:34:27.497] <TB1> INFO: 41600 events read in total (3406ms).
[13:34:27.498] <TB1> INFO: Test took 4275ms.
[13:34:27.501] <TB1> INFO: scanning low vcal = 210
[13:34:27.778] <TB1> INFO: Expecting 41600 events.
[13:34:31.797] <TB1> INFO: 41600 events read in total (3428ms).
[13:34:31.798] <TB1> INFO: Test took 4296ms.
[13:34:31.801] <TB1> INFO: scanning low vcal = 220
[13:34:32.077] <TB1> INFO: Expecting 41600 events.
[13:34:36.081] <TB1> INFO: 41600 events read in total (3412ms).
[13:34:36.081] <TB1> INFO: Test took 4280ms.
[13:34:36.084] <TB1> INFO: scanning low vcal = 230
[13:34:36.383] <TB1> INFO: Expecting 41600 events.
[13:34:40.362] <TB1> INFO: 41600 events read in total (3387ms).
[13:34:40.363] <TB1> INFO: Test took 4278ms.
[13:34:40.366] <TB1> INFO: scanning low vcal = 240
[13:34:40.643] <TB1> INFO: Expecting 41600 events.
[13:34:44.698] <TB1> INFO: 41600 events read in total (3464ms).
[13:34:44.699] <TB1> INFO: Test took 4333ms.
[13:34:44.702] <TB1> INFO: scanning low vcal = 250
[13:34:44.994] <TB1> INFO: Expecting 41600 events.
[13:34:49.079] <TB1> INFO: 41600 events read in total (3493ms).
[13:34:49.080] <TB1> INFO: Test took 4378ms.
[13:34:49.084] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[13:34:49.413] <TB1> INFO: Expecting 41600 events.
[13:34:53.495] <TB1> INFO: 41600 events read in total (3490ms).
[13:34:53.496] <TB1> INFO: Test took 4411ms.
[13:34:53.500] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[13:34:53.794] <TB1> INFO: Expecting 41600 events.
[13:34:57.865] <TB1> INFO: 41600 events read in total (3479ms).
[13:34:57.867] <TB1> INFO: Test took 4367ms.
[13:34:57.870] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[13:34:58.162] <TB1> INFO: Expecting 41600 events.
[13:35:02.183] <TB1> INFO: 41600 events read in total (3429ms).
[13:35:02.184] <TB1> INFO: Test took 4314ms.
[13:35:02.187] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[13:35:02.503] <TB1> INFO: Expecting 41600 events.
[13:35:06.572] <TB1> INFO: 41600 events read in total (3477ms).
[13:35:06.573] <TB1> INFO: Test took 4385ms.
[13:35:06.576] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:35:06.892] <TB1> INFO: Expecting 41600 events.
[13:35:10.955] <TB1> INFO: 41600 events read in total (3471ms).
[13:35:10.956] <TB1> INFO: Test took 4379ms.
[13:35:11.424] <TB1> INFO: PixTestGainPedestal::measure() done
[13:35:44.736] <TB1> INFO: PixTestGainPedestal::fit() done
[13:35:44.736] <TB1> INFO: non-linearity mean: 0.947 0.983 0.983 0.949 0.964 0.960 0.977 0.940 0.973 0.985 0.986 0.945 0.935 0.913 0.955 0.967
[13:35:44.736] <TB1> INFO: non-linearity RMS: 0.064 0.003 0.004 0.059 0.019 0.030 0.006 0.109 0.175 0.003 0.004 0.047 0.139 0.147 0.129 0.013
[13:35:44.736] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C0.dat
[13:35:44.749] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C1.dat
[13:35:44.762] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C2.dat
[13:35:44.776] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C3.dat
[13:35:44.789] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C4.dat
[13:35:44.802] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C5.dat
[13:35:44.815] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C6.dat
[13:35:44.829] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C7.dat
[13:35:44.842] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C8.dat
[13:35:44.855] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C9.dat
[13:35:44.868] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C10.dat
[13:35:44.882] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C11.dat
[13:35:44.895] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C12.dat
[13:35:44.909] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C13.dat
[13:35:44.922] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C14.dat
[13:35:44.935] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1029_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C15.dat
[13:35:44.948] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 162 seconds
[13:35:44.948] <TB1> INFO: Decoding statistics:
[13:35:44.948] <TB1> INFO: General information:
[13:35:44.948] <TB1> INFO: 16bit words read: 3237570
[13:35:44.948] <TB1> INFO: valid events total: 332800
[13:35:44.948] <TB1> INFO: empty events: 7241
[13:35:44.948] <TB1> INFO: valid events with pixels: 325559
[13:35:44.948] <TB1> INFO: valid pixel hits: 620385
[13:35:44.948] <TB1> INFO: Event errors: 0
[13:35:44.948] <TB1> INFO: start marker: 0
[13:35:44.948] <TB1> INFO: stop marker: 0
[13:35:44.948] <TB1> INFO: overflow: 0
[13:35:44.948] <TB1> INFO: invalid 5bit words: 0
[13:35:44.948] <TB1> INFO: invalid XOR eye diagram: 0
[13:35:44.948] <TB1> INFO: frame (failed synchr.): 0
[13:35:44.948] <TB1> INFO: idle data (no TBM trl): 0
[13:35:44.948] <TB1> INFO: no data (only TBM hdr): 0
[13:35:44.948] <TB1> INFO: TBM errors: 0
[13:35:44.948] <TB1> INFO: flawed TBM headers: 0
[13:35:44.948] <TB1> INFO: flawed TBM trailers: 0
[13:35:44.948] <TB1> INFO: event ID mismatches: 0
[13:35:44.948] <TB1> INFO: ROC errors: 0
[13:35:44.948] <TB1> INFO: missing ROC header(s): 0
[13:35:44.948] <TB1> INFO: misplaced readback start: 0
[13:35:44.948] <TB1> INFO: Pixel decoding errors: 0
[13:35:44.948] <TB1> INFO: pixel data incomplete: 0
[13:35:44.948] <TB1> INFO: pixel address: 0
[13:35:44.948] <TB1> INFO: pulse height fill bit: 0
[13:35:44.948] <TB1> INFO: buffer corruption: 0
[13:35:44.964] <TB1> INFO: Decoding statistics:
[13:35:44.964] <TB1> INFO: General information:
[13:35:44.964] <TB1> INFO: 16bit words read: 3366982
[13:35:44.964] <TB1> INFO: valid events total: 353536
[13:35:44.964] <TB1> INFO: empty events: 25479
[13:35:44.964] <TB1> INFO: valid events with pixels: 328057
[13:35:44.964] <TB1> INFO: valid pixel hits: 622883
[13:35:44.964] <TB1> INFO: Event errors: 0
[13:35:44.964] <TB1> INFO: start marker: 0
[13:35:44.964] <TB1> INFO: stop marker: 0
[13:35:44.964] <TB1> INFO: overflow: 0
[13:35:44.964] <TB1> INFO: invalid 5bit words: 0
[13:35:44.964] <TB1> INFO: invalid XOR eye diagram: 0
[13:35:44.964] <TB1> INFO: frame (failed synchr.): 0
[13:35:44.964] <TB1> INFO: idle data (no TBM trl): 0
[13:35:44.964] <TB1> INFO: no data (only TBM hdr): 0
[13:35:44.964] <TB1> INFO: TBM errors: 0
[13:35:44.964] <TB1> INFO: flawed TBM headers: 0
[13:35:44.964] <TB1> INFO: flawed TBM trailers: 0
[13:35:44.964] <TB1> INFO: event ID mismatches: 0
[13:35:44.964] <TB1> INFO: ROC errors: 0
[13:35:44.964] <TB1> INFO: missing ROC header(s): 0
[13:35:44.964] <TB1> INFO: misplaced readback start: 0
[13:35:44.964] <TB1> INFO: Pixel decoding errors: 0
[13:35:44.964] <TB1> INFO: pixel data incomplete: 0
[13:35:44.964] <TB1> INFO: pixel address: 0
[13:35:44.964] <TB1> INFO: pulse height fill bit: 0
[13:35:44.964] <TB1> INFO: buffer corruption: 0
[13:35:44.964] <TB1> INFO: enter test to run
[13:35:44.964] <TB1> INFO: test: exit no parameter change
[13:35:45.087] <TB1> QUIET: Connection to board 154 closed.
[13:35:45.088] <TB1> INFO: pXar: this is the end, my friend