[12:10:51.216] <TB0> INFO: *** Welcome to pxar ***
[12:10:51.216] <TB0> INFO: *** Today: 2016/10/20
[12:10:51.222] <TB0> INFO: *** Version: c8ba-dirty
[12:10:51.222] <TB0> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C15.dat
[12:10:51.222] <TB0> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//tbmParameters_C1b.dat
[12:10:51.222] <TB0> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//defaultMaskFile.dat
[12:10:51.222] <TB0> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters_C15.dat
[12:10:51.282] <TB0> INFO: clk: 4
[12:10:51.282] <TB0> INFO: ctr: 4
[12:10:51.282] <TB0> INFO: sda: 19
[12:10:51.282] <TB0> INFO: tin: 9
[12:10:51.282] <TB0> INFO: level: 15
[12:10:51.282] <TB0> INFO: triggerdelay: 0
[12:10:51.282] <TB0> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[12:10:51.282] <TB0> INFO: Log level: INFO
[12:10:51.290] <TB0> INFO: Found DTB DTB_WRQ4OZ
[12:10:51.300] <TB0> QUIET: Connection to board DTB_WRQ4OZ opened.
[12:10:51.302] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 71
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WRQ4OZ
MAC address: 40D855118047
Hostname: pixelDTB071
Comment:
------------------------------------------------------
[12:10:51.304] <TB0> INFO: RPC call hashes of host and DTB match: 486171790
[12:10:52.792] <TB0> INFO: DUT info:
[12:10:52.792] <TB0> INFO: The DUT currently contains the following objects:
[12:10:52.792] <TB0> INFO: 4 TBM Cores tbm10c (4 ON)
[12:10:52.792] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:10:52.792] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:10:52.792] <TB0> INFO: TBM Core alpha (2): 7 registers set
[12:10:52.792] <TB0> INFO: TBM Core beta (3): 7 registers set
[12:10:52.792] <TB0> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[12:10:52.792] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:10:52.792] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:10:52.792] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:10:52.792] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:10:52.792] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:10:52.792] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:10:52.792] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:10:52.792] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:10:52.792] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:10:52.792] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:10:52.792] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:10:52.792] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:10:52.792] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:10:52.792] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:10:52.792] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:10:52.792] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:10:53.193] <TB0> INFO: enter 'restricted' command line mode
[12:10:53.193] <TB0> INFO: enter test to run
[12:10:53.193] <TB0> INFO: test: pretest no parameter change
[12:10:53.193] <TB0> INFO: running: pretest
[12:10:53.197] <TB0> INFO: ######################################################################
[12:10:53.197] <TB0> INFO: PixTestPretest::doTest()
[12:10:53.197] <TB0> INFO: ######################################################################
[12:10:53.199] <TB0> INFO: ----------------------------------------------------------------------
[12:10:53.199] <TB0> INFO: PixTestPretest::programROC()
[12:10:53.199] <TB0> INFO: ----------------------------------------------------------------------
[12:11:11.212] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:11:11.212] <TB0> INFO: IA differences per ROC: 19.3 18.5 16.9 16.9 17.7 17.7 19.3 18.5 20.1 20.1 18.5 22.5 17.7 19.3 22.5 17.7
[12:11:11.273] <TB0> INFO: ----------------------------------------------------------------------
[12:11:11.273] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:11:11.273] <TB0> INFO: ----------------------------------------------------------------------
[12:11:17.854] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 390.7 mA = 24.4187 mA/ROC
[12:11:17.854] <TB0> INFO: i(loss) [mA/ROC]: 19.3 19.3 20.1 20.1 20.1 19.3 18.5 19.3 20.1 19.3 19.3 19.3 19.3 19.3 20.1 19.3
[12:11:17.884] <TB0> INFO: ----------------------------------------------------------------------
[12:11:17.884] <TB0> INFO: PixTestPretest::findTiming()
[12:11:17.884] <TB0> INFO: ----------------------------------------------------------------------
[12:11:17.884] <TB0> INFO: PixTestCmd::init()

[12:11:50.508] <TB0> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[12:11:50.508] <TB0> INFO: (success/tries = 100/100), width = 4
[12:11:52.015] <TB0> INFO: ----------------------------------------------------------------------
[12:11:52.016] <TB0> INFO: PixTestPretest::findWorkingPixel()
[12:11:52.016] <TB0> INFO: ----------------------------------------------------------------------
[12:11:52.112] <TB0> INFO: Expecting 231680 events.
[12:12:02.206] <TB0> INFO: 231680 events read in total (9502ms).
[12:12:02.215] <TB0> INFO: Test took 10193ms.
[12:12:02.459] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:12:02.495] <TB0> INFO: ----------------------------------------------------------------------
[12:12:02.495] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[12:12:02.495] <TB0> INFO: ----------------------------------------------------------------------
[12:12:02.590] <TB0> INFO: Expecting 231680 events.
[12:12:12.516] <TB0> INFO: 231680 events read in total (9335ms).
[12:12:12.526] <TB0> INFO: Test took 10026ms.
[12:12:12.787] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[12:12:12.787] <TB0> INFO: CalDel: 86 80 85 95 86 90 78 80 97 95 81 98 80 90 82 103
[12:12:12.787] <TB0> INFO: VthrComp: 51 52 55 55 51 51 51 52 51 53 51 52 53 51 51 51
[12:12:12.790] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C0.dat
[12:12:12.790] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C1.dat
[12:12:12.790] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C2.dat
[12:12:12.790] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C3.dat
[12:12:12.791] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C4.dat
[12:12:12.791] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C5.dat
[12:12:12.791] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C6.dat
[12:12:12.791] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C7.dat
[12:12:12.791] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C8.dat
[12:12:12.791] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C9.dat
[12:12:12.792] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C10.dat
[12:12:12.792] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C11.dat
[12:12:12.792] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C12.dat
[12:12:12.792] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C13.dat
[12:12:12.792] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C14.dat
[12:12:12.792] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters_C15.dat
[12:12:12.793] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//tbmParameters_C0a.dat
[12:12:12.793] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//tbmParameters_C0b.dat
[12:12:12.793] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//tbmParameters_C1a.dat
[12:12:12.793] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//tbmParameters_C1b.dat
[12:12:12.793] <TB0> INFO: PixTestPretest::doTest() done, duration: 79 seconds
[12:12:12.846] <TB0> INFO: enter test to run
[12:12:12.846] <TB0> INFO: test: FullTest no parameter change
[12:12:12.846] <TB0> INFO: running: fulltest
[12:12:12.846] <TB0> INFO: ######################################################################
[12:12:12.846] <TB0> INFO: PixTestFullTest::doTest()
[12:12:12.846] <TB0> INFO: ######################################################################
[12:12:12.848] <TB0> INFO: ######################################################################
[12:12:12.848] <TB0> INFO: PixTestAlive::doTest()
[12:12:12.848] <TB0> INFO: ######################################################################
[12:12:12.849] <TB0> INFO: ----------------------------------------------------------------------
[12:12:12.849] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:12:12.849] <TB0> INFO: ----------------------------------------------------------------------
[12:12:13.087] <TB0> INFO: Expecting 41600 events.
[12:12:16.629] <TB0> INFO: 41600 events read in total (2950ms).
[12:12:16.630] <TB0> INFO: Test took 3780ms.
[12:12:16.862] <TB0> INFO: PixTestAlive::aliveTest() done
[12:12:16.862] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
[12:12:16.863] <TB0> INFO: ----------------------------------------------------------------------
[12:12:16.863] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:12:16.863] <TB0> INFO: ----------------------------------------------------------------------
[12:12:17.107] <TB0> INFO: Expecting 41600 events.
[12:12:20.092] <TB0> INFO: 41600 events read in total (2393ms).
[12:12:20.092] <TB0> INFO: Test took 3226ms.
[12:12:20.092] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:12:20.337] <TB0> INFO: PixTestAlive::maskTest() done
[12:12:20.337] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:12:20.339] <TB0> INFO: ----------------------------------------------------------------------
[12:12:20.339] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:12:20.339] <TB0> INFO: ----------------------------------------------------------------------
[12:12:20.582] <TB0> INFO: Expecting 41600 events.
[12:12:24.085] <TB0> INFO: 41600 events read in total (2912ms).
[12:12:24.086] <TB0> INFO: Test took 3745ms.
[12:12:24.320] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[12:12:24.320] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:12:24.320] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[12:12:24.320] <TB0> INFO: Decoding statistics:
[12:12:24.320] <TB0> INFO: General information:
[12:12:24.320] <TB0> INFO: 16bit words read: 0
[12:12:24.320] <TB0> INFO: valid events total: 0
[12:12:24.320] <TB0> INFO: empty events: 0
[12:12:24.320] <TB0> INFO: valid events with pixels: 0
[12:12:24.320] <TB0> INFO: valid pixel hits: 0
[12:12:24.320] <TB0> INFO: Event errors: 0
[12:12:24.320] <TB0> INFO: start marker: 0
[12:12:24.320] <TB0> INFO: stop marker: 0
[12:12:24.320] <TB0> INFO: overflow: 0
[12:12:24.320] <TB0> INFO: invalid 5bit words: 0
[12:12:24.320] <TB0> INFO: invalid XOR eye diagram: 0
[12:12:24.320] <TB0> INFO: frame (failed synchr.): 0
[12:12:24.320] <TB0> INFO: idle data (no TBM trl): 0
[12:12:24.320] <TB0> INFO: no data (only TBM hdr): 0
[12:12:24.320] <TB0> INFO: TBM errors: 0
[12:12:24.320] <TB0> INFO: flawed TBM headers: 0
[12:12:24.320] <TB0> INFO: flawed TBM trailers: 0
[12:12:24.320] <TB0> INFO: event ID mismatches: 0
[12:12:24.320] <TB0> INFO: ROC errors: 0
[12:12:24.320] <TB0> INFO: missing ROC header(s): 0
[12:12:24.320] <TB0> INFO: misplaced readback start: 0
[12:12:24.320] <TB0> INFO: Pixel decoding errors: 0
[12:12:24.320] <TB0> INFO: pixel data incomplete: 0
[12:12:24.320] <TB0> INFO: pixel address: 0
[12:12:24.320] <TB0> INFO: pulse height fill bit: 0
[12:12:24.320] <TB0> INFO: buffer corruption: 0
[12:12:24.329] <TB0> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C15.dat
[12:12:24.330] <TB0> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr_C15.dat

[12:12:24.330] <TB0> INFO: ######################################################################
[12:12:24.330] <TB0> INFO: PixTestReadback::doTest()
[12:12:24.330] <TB0> INFO: ######################################################################
[12:12:24.330] <TB0> INFO: ----------------------------------------------------------------------
[12:12:24.330] <TB0> INFO: PixTestReadback::CalibrateVd()
[12:12:24.330] <TB0> INFO: ----------------------------------------------------------------------
[12:12:34.295] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C0.dat
[12:12:34.295] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C1.dat
[12:12:34.295] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C2.dat
[12:12:34.295] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C3.dat
[12:12:34.296] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C4.dat
[12:12:34.296] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C5.dat
[12:12:34.296] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C6.dat
[12:12:34.296] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C7.dat
[12:12:34.296] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C8.dat
[12:12:34.296] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C9.dat
[12:12:34.296] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C10.dat
[12:12:34.296] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C11.dat
[12:12:34.296] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C12.dat
[12:12:34.296] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C13.dat
[12:12:34.296] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C14.dat
[12:12:34.296] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C15.dat
[12:12:34.325] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[12:12:34.325] <TB0> INFO: ----------------------------------------------------------------------
[12:12:34.325] <TB0> INFO: PixTestReadback::CalibrateVa()
[12:12:34.325] <TB0> INFO: ----------------------------------------------------------------------
[12:12:44.239] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C0.dat
[12:12:44.239] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C1.dat
[12:12:44.239] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C2.dat
[12:12:44.239] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C3.dat
[12:12:44.240] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C4.dat
[12:12:44.240] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C5.dat
[12:12:44.240] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C6.dat
[12:12:44.240] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C7.dat
[12:12:44.240] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C8.dat
[12:12:44.240] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C9.dat
[12:12:44.240] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C10.dat
[12:12:44.240] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C11.dat
[12:12:44.240] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C12.dat
[12:12:44.240] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C13.dat
[12:12:44.240] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C14.dat
[12:12:44.240] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C15.dat
[12:12:44.268] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[12:12:44.268] <TB0> INFO: ----------------------------------------------------------------------
[12:12:44.268] <TB0> INFO: PixTestReadback::readbackVbg()
[12:12:44.268] <TB0> INFO: ----------------------------------------------------------------------
[12:12:51.935] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[12:12:51.935] <TB0> INFO: ----------------------------------------------------------------------
[12:12:51.935] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[12:12:51.936] <TB0> INFO: ----------------------------------------------------------------------
[12:12:51.936] <TB0> INFO: Vbg will be calibrated using Vd calibration
[12:12:51.936] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 151.5calibrated Vbg = 1.18596 :::*/*/*/*/
[12:12:51.936] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 150.2calibrated Vbg = 1.17946 :::*/*/*/*/
[12:12:51.936] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 154calibrated Vbg = 1.1803 :::*/*/*/*/
[12:12:51.936] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 160.6calibrated Vbg = 1.17339 :::*/*/*/*/
[12:12:51.936] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 152.8calibrated Vbg = 1.18297 :::*/*/*/*/
[12:12:51.936] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 157.1calibrated Vbg = 1.19029 :::*/*/*/*/
[12:12:51.936] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 159.8calibrated Vbg = 1.18199 :::*/*/*/*/
[12:12:51.936] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 161.7calibrated Vbg = 1.19426 :::*/*/*/*/
[12:12:51.936] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 151.8calibrated Vbg = 1.18087 :::*/*/*/*/
[12:12:51.936] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 158calibrated Vbg = 1.17745 :::*/*/*/*/
[12:12:51.936] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 156.3calibrated Vbg = 1.18015 :::*/*/*/*/
[12:12:51.936] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 161.8calibrated Vbg = 1.17286 :::*/*/*/*/
[12:12:51.936] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 163.4calibrated Vbg = 1.18116 :::*/*/*/*/
[12:12:51.936] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 154calibrated Vbg = 1.18587 :::*/*/*/*/
[12:12:51.936] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 155calibrated Vbg = 1.18498 :::*/*/*/*/
[12:12:51.936] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 145.5calibrated Vbg = 1.17811 :::*/*/*/*/
[12:12:51.939] <TB0> INFO: ----------------------------------------------------------------------
[12:12:51.939] <TB0> INFO: PixTestReadback::CalibrateIa()
[12:12:51.939] <TB0> INFO: ----------------------------------------------------------------------
[12:15:32.787] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C0.dat
[12:15:32.787] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C1.dat
[12:15:32.787] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C2.dat
[12:15:32.787] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C3.dat
[12:15:32.787] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C4.dat
[12:15:32.787] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C5.dat
[12:15:32.787] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C6.dat
[12:15:32.787] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C7.dat
[12:15:32.787] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C8.dat
[12:15:32.788] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C9.dat
[12:15:32.788] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C10.dat
[12:15:32.788] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C11.dat
[12:15:32.788] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C12.dat
[12:15:32.788] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C13.dat
[12:15:32.788] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C14.dat
[12:15:32.788] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//readbackCal_C15.dat
[12:15:32.824] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[12:15:32.826] <TB0> INFO: PixTestReadback::doTest() done
[12:15:32.826] <TB0> INFO: Decoding statistics:
[12:15:32.826] <TB0> INFO: General information:
[12:15:32.826] <TB0> INFO: 16bit words read: 1558
[12:15:32.826] <TB0> INFO: valid events total: 256
[12:15:32.826] <TB0> INFO: empty events: 245
[12:15:32.827] <TB0> INFO: valid events with pixels: 11
[12:15:32.827] <TB0> INFO: valid pixel hits: 11
[12:15:32.827] <TB0> INFO: Event errors: 0
[12:15:32.827] <TB0> INFO: start marker: 0
[12:15:32.827] <TB0> INFO: stop marker: 0
[12:15:32.827] <TB0> INFO: overflow: 0
[12:15:32.827] <TB0> INFO: invalid 5bit words: 0
[12:15:32.827] <TB0> INFO: invalid XOR eye diagram: 0
[12:15:32.827] <TB0> INFO: frame (failed synchr.): 0
[12:15:32.827] <TB0> INFO: idle data (no TBM trl): 0
[12:15:32.827] <TB0> INFO: no data (only TBM hdr): 0
[12:15:32.827] <TB0> INFO: TBM errors: 0
[12:15:32.827] <TB0> INFO: flawed TBM headers: 0
[12:15:32.827] <TB0> INFO: flawed TBM trailers: 0
[12:15:32.827] <TB0> INFO: event ID mismatches: 0
[12:15:32.827] <TB0> INFO: ROC errors: 0
[12:15:32.827] <TB0> INFO: missing ROC header(s): 0
[12:15:32.827] <TB0> INFO: misplaced readback start: 0
[12:15:32.827] <TB0> INFO: Pixel decoding errors: 0
[12:15:32.827] <TB0> INFO: pixel data incomplete: 0
[12:15:32.827] <TB0> INFO: pixel address: 0
[12:15:32.827] <TB0> INFO: pulse height fill bit: 0
[12:15:32.827] <TB0> INFO: buffer corruption: 0
[12:15:32.879] <TB0> INFO: ######################################################################
[12:15:32.879] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:15:32.879] <TB0> INFO: ######################################################################
[12:15:32.881] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[12:15:32.896] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:15:32.896] <TB0> INFO: run 1 of 1
[12:15:33.133] <TB0> INFO: Expecting 3120000 events.
[12:16:05.562] <TB0> INFO: 695780 events read in total (31837ms).











[12:16:36.745] <TB0> INFO: 1386985 events read in total (63020ms).











[12:17:07.897] <TB0> INFO: 2074005 events read in total (94172ms).











[12:17:38.914] <TB0> INFO: 2760600 events read in total (125189ms).











[12:17:55.405] <TB0> INFO: 3120000 events read in total (141680ms).
[12:17:55.456] <TB0> INFO: Test took 142561ms.
[12:18:19.746] <TB0> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 166 seconds
[12:18:19.746] <TB0> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 11
[12:18:19.746] <TB0> INFO: separation cut (per ROC): 123 122 130 126 103 120 107 118 130 134 118 135 129 114 128 119
[12:18:19.746] <TB0> INFO: Decoding statistics:
[12:18:19.746] <TB0> INFO: General information:
[12:18:19.746] <TB0> INFO: 16bit words read: 0
[12:18:19.746] <TB0> INFO: valid events total: 0
[12:18:19.746] <TB0> INFO: empty events: 0
[12:18:19.747] <TB0> INFO: valid events with pixels: 0
[12:18:19.747] <TB0> INFO: valid pixel hits: 0
[12:18:19.747] <TB0> INFO: Event errors: 0
[12:18:19.747] <TB0> INFO: start marker: 0
[12:18:19.747] <TB0> INFO: stop marker: 0
[12:18:19.747] <TB0> INFO: overflow: 0
[12:18:19.747] <TB0> INFO: invalid 5bit words: 0
[12:18:19.747] <TB0> INFO: invalid XOR eye diagram: 0
[12:18:19.747] <TB0> INFO: frame (failed synchr.): 0
[12:18:19.747] <TB0> INFO: idle data (no TBM trl): 0
[12:18:19.747] <TB0> INFO: no data (only TBM hdr): 0
[12:18:19.747] <TB0> INFO: TBM errors: 0
[12:18:19.747] <TB0> INFO: flawed TBM headers: 0
[12:18:19.747] <TB0> INFO: flawed TBM trailers: 0
[12:18:19.747] <TB0> INFO: event ID mismatches: 0
[12:18:19.747] <TB0> INFO: ROC errors: 0
[12:18:19.747] <TB0> INFO: missing ROC header(s): 0
[12:18:19.747] <TB0> INFO: misplaced readback start: 0
[12:18:19.747] <TB0> INFO: Pixel decoding errors: 0
[12:18:19.747] <TB0> INFO: pixel data incomplete: 0
[12:18:19.747] <TB0> INFO: pixel address: 0
[12:18:19.747] <TB0> INFO: pulse height fill bit: 0
[12:18:19.747] <TB0> INFO: buffer corruption: 0
[12:18:19.788] <TB0> INFO: ######################################################################
[12:18:19.788] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:18:19.788] <TB0> INFO: ######################################################################
[12:18:19.788] <TB0> INFO: ----------------------------------------------------------------------
[12:18:19.788] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:18:19.788] <TB0> INFO: ----------------------------------------------------------------------
[12:18:19.788] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[12:18:19.801] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[12:18:19.802] <TB0> INFO: run 1 of 1
[12:18:20.040] <TB0> INFO: Expecting 36608000 events.
[12:18:43.698] <TB0> INFO: 700800 events read in total (23066ms).
[12:19:06.752] <TB0> INFO: 1384850 events read in total (46120ms).
[12:19:30.057] <TB0> INFO: 2071400 events read in total (69425ms).
[12:19:53.389] <TB0> INFO: 2754150 events read in total (92757ms).
[12:20:16.627] <TB0> INFO: 3437250 events read in total (115995ms).
[12:20:39.528] <TB0> INFO: 4119000 events read in total (138896ms).
[12:21:02.781] <TB0> INFO: 4802750 events read in total (162149ms).
[12:21:25.860] <TB0> INFO: 5483050 events read in total (185228ms).
[12:21:48.977] <TB0> INFO: 6165750 events read in total (208345ms).
[12:22:12.295] <TB0> INFO: 6845900 events read in total (231663ms).
[12:22:35.288] <TB0> INFO: 7527050 events read in total (254656ms).
[12:22:58.460] <TB0> INFO: 8206800 events read in total (277828ms).
[12:23:21.668] <TB0> INFO: 8887150 events read in total (301036ms).
[12:23:44.874] <TB0> INFO: 9567650 events read in total (324242ms).
[12:24:07.940] <TB0> INFO: 10250250 events read in total (347308ms).
[12:24:31.017] <TB0> INFO: 10931700 events read in total (370385ms).
[12:24:54.226] <TB0> INFO: 11612400 events read in total (393594ms).
[12:25:17.187] <TB0> INFO: 12290700 events read in total (416555ms).
[12:25:40.394] <TB0> INFO: 12970100 events read in total (439762ms).
[12:26:03.710] <TB0> INFO: 13648800 events read in total (463078ms).
[12:26:27.220] <TB0> INFO: 14327450 events read in total (486588ms).
[12:26:50.637] <TB0> INFO: 15008550 events read in total (510005ms).
[12:27:13.796] <TB0> INFO: 15684750 events read in total (533164ms).
[12:27:37.057] <TB0> INFO: 16359400 events read in total (556425ms).
[12:27:59.990] <TB0> INFO: 17035600 events read in total (579358ms).
[12:28:23.055] <TB0> INFO: 17711950 events read in total (602423ms).
[12:28:46.185] <TB0> INFO: 18387200 events read in total (625553ms).
[12:29:09.044] <TB0> INFO: 19060350 events read in total (648412ms).
[12:29:32.174] <TB0> INFO: 19734550 events read in total (671542ms).
[12:29:55.284] <TB0> INFO: 20406000 events read in total (694652ms).
[12:30:18.405] <TB0> INFO: 21077800 events read in total (717773ms).
[12:30:41.327] <TB0> INFO: 21751250 events read in total (740695ms).
[12:31:04.374] <TB0> INFO: 22422050 events read in total (763742ms).
[12:31:27.245] <TB0> INFO: 23093800 events read in total (786613ms).
[12:31:50.274] <TB0> INFO: 23764600 events read in total (809642ms).
[12:32:13.160] <TB0> INFO: 24435900 events read in total (832528ms).
[12:32:35.878] <TB0> INFO: 25109700 events read in total (855246ms).
[12:32:59.073] <TB0> INFO: 25780800 events read in total (878441ms).
[12:33:22.174] <TB0> INFO: 26452100 events read in total (901542ms).
[12:33:45.292] <TB0> INFO: 27123750 events read in total (924660ms).
[12:34:08.823] <TB0> INFO: 27792950 events read in total (948191ms).
[12:34:31.748] <TB0> INFO: 28464000 events read in total (971116ms).
[12:34:54.588] <TB0> INFO: 29134350 events read in total (993956ms).
[12:35:17.607] <TB0> INFO: 29804600 events read in total (1016975ms).
[12:35:40.465] <TB0> INFO: 30473550 events read in total (1039833ms).
[12:36:03.132] <TB0> INFO: 31142200 events read in total (1062500ms).
[12:36:26.200] <TB0> INFO: 31811950 events read in total (1085568ms).
[12:36:49.207] <TB0> INFO: 32480350 events read in total (1108575ms).
[12:37:12.421] <TB0> INFO: 33151450 events read in total (1131789ms).
[12:37:35.144] <TB0> INFO: 33823250 events read in total (1154512ms).
[12:37:58.003] <TB0> INFO: 34494500 events read in total (1177371ms).
[12:38:20.836] <TB0> INFO: 35163750 events read in total (1200204ms).
[12:38:44.029] <TB0> INFO: 35835600 events read in total (1223397ms).
[12:39:07.045] <TB0> INFO: 36517300 events read in total (1246413ms).
[12:39:10.432] <TB0> INFO: 36608000 events read in total (1249800ms).
[12:39:10.508] <TB0> INFO: Test took 1250706ms.
[12:39:11.026] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:39:12.764] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:39:14.616] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:39:16.531] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:39:18.487] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:39:20.386] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:39:22.099] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:39:23.587] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:39:25.136] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:39:26.628] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:39:28.136] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:39:29.922] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:39:31.752] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:39:33.655] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:39:35.396] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:39:37.139] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:39:39.110] <TB0> INFO: PixTestScurves::scurves() done
[12:39:39.110] <TB0> INFO: Vcal mean: 128.76 129.53 127.09 127.93 123.53 124.17 119.05 124.98 124.37 134.77 122.22 134.94 129.99 113.17 120.64 116.01
[12:39:39.110] <TB0> INFO: Vcal RMS: 5.33 6.09 6.34 5.83 5.71 6.11 6.17 6.69 6.48 5.99 5.93 6.40 6.58 5.80 5.72 5.88
[12:39:39.110] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1279 seconds
[12:39:39.110] <TB0> INFO: Decoding statistics:
[12:39:39.110] <TB0> INFO: General information:
[12:39:39.110] <TB0> INFO: 16bit words read: 0
[12:39:39.110] <TB0> INFO: valid events total: 0
[12:39:39.110] <TB0> INFO: empty events: 0
[12:39:39.110] <TB0> INFO: valid events with pixels: 0
[12:39:39.110] <TB0> INFO: valid pixel hits: 0
[12:39:39.110] <TB0> INFO: Event errors: 0
[12:39:39.110] <TB0> INFO: start marker: 0
[12:39:39.110] <TB0> INFO: stop marker: 0
[12:39:39.110] <TB0> INFO: overflow: 0
[12:39:39.110] <TB0> INFO: invalid 5bit words: 0
[12:39:39.110] <TB0> INFO: invalid XOR eye diagram: 0
[12:39:39.110] <TB0> INFO: frame (failed synchr.): 0
[12:39:39.110] <TB0> INFO: idle data (no TBM trl): 0
[12:39:39.110] <TB0> INFO: no data (only TBM hdr): 0
[12:39:39.110] <TB0> INFO: TBM errors: 0
[12:39:39.110] <TB0> INFO: flawed TBM headers: 0
[12:39:39.110] <TB0> INFO: flawed TBM trailers: 0
[12:39:39.110] <TB0> INFO: event ID mismatches: 0
[12:39:39.110] <TB0> INFO: ROC errors: 0
[12:39:39.110] <TB0> INFO: missing ROC header(s): 0
[12:39:39.110] <TB0> INFO: misplaced readback start: 0
[12:39:39.110] <TB0> INFO: Pixel decoding errors: 0
[12:39:39.110] <TB0> INFO: pixel data incomplete: 0
[12:39:39.110] <TB0> INFO: pixel address: 0
[12:39:39.110] <TB0> INFO: pulse height fill bit: 0
[12:39:39.110] <TB0> INFO: buffer corruption: 0
[12:39:39.185] <TB0> INFO: ######################################################################
[12:39:39.185] <TB0> INFO: PixTestTrim::doTest()
[12:39:39.185] <TB0> INFO: ######################################################################
[12:39:39.186] <TB0> INFO: ----------------------------------------------------------------------
[12:39:39.186] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[12:39:39.186] <TB0> INFO: ----------------------------------------------------------------------
[12:39:39.227] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:39:39.227] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:39:39.241] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:39:39.241] <TB0> INFO: run 1 of 1
[12:39:39.492] <TB0> INFO: Expecting 5025280 events.
[12:40:10.897] <TB0> INFO: 833576 events read in total (30808ms).
[12:40:41.476] <TB0> INFO: 1664504 events read in total (61387ms).
[12:41:11.904] <TB0> INFO: 2492408 events read in total (91815ms).
[12:41:42.117] <TB0> INFO: 3315592 events read in total (122028ms).
[12:42:12.381] <TB0> INFO: 4135952 events read in total (152292ms).
[12:42:42.799] <TB0> INFO: 4955192 events read in total (182710ms).
[12:42:46.022] <TB0> INFO: 5025280 events read in total (185933ms).
[12:42:46.081] <TB0> INFO: Test took 186840ms.
[12:43:06.077] <TB0> INFO: ROC 0 VthrComp = 128
[12:43:06.077] <TB0> INFO: ROC 1 VthrComp = 132
[12:43:06.077] <TB0> INFO: ROC 2 VthrComp = 132
[12:43:06.077] <TB0> INFO: ROC 3 VthrComp = 132
[12:43:06.077] <TB0> INFO: ROC 4 VthrComp = 121
[12:43:06.077] <TB0> INFO: ROC 5 VthrComp = 128
[12:43:06.077] <TB0> INFO: ROC 6 VthrComp = 120
[12:43:06.077] <TB0> INFO: ROC 7 VthrComp = 123
[12:43:06.077] <TB0> INFO: ROC 8 VthrComp = 127
[12:43:06.077] <TB0> INFO: ROC 9 VthrComp = 131
[12:43:06.077] <TB0> INFO: ROC 10 VthrComp = 125
[12:43:06.077] <TB0> INFO: ROC 11 VthrComp = 131
[12:43:06.078] <TB0> INFO: ROC 12 VthrComp = 127
[12:43:06.078] <TB0> INFO: ROC 13 VthrComp = 109
[12:43:06.078] <TB0> INFO: ROC 14 VthrComp = 126
[12:43:06.078] <TB0> INFO: ROC 15 VthrComp = 113
[12:43:06.329] <TB0> INFO: Expecting 41600 events.
[12:43:09.836] <TB0> INFO: 41600 events read in total (2913ms).
[12:43:09.837] <TB0> INFO: Test took 3758ms.
[12:43:09.846] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:43:09.846] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:43:09.858] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:43:09.858] <TB0> INFO: run 1 of 1
[12:43:10.136] <TB0> INFO: Expecting 5025280 events.
[12:43:36.135] <TB0> INFO: 590896 events read in total (25408ms).
[12:44:02.196] <TB0> INFO: 1181312 events read in total (51469ms).
[12:44:28.394] <TB0> INFO: 1771576 events read in total (77667ms).
[12:44:54.328] <TB0> INFO: 2361864 events read in total (103601ms).
[12:45:20.528] <TB0> INFO: 2949560 events read in total (129801ms).
[12:45:46.336] <TB0> INFO: 3536664 events read in total (155609ms).
[12:46:12.588] <TB0> INFO: 4123000 events read in total (181862ms).
[12:46:38.607] <TB0> INFO: 4708592 events read in total (207880ms).
[12:46:52.991] <TB0> INFO: 5025280 events read in total (222264ms).
[12:46:53.073] <TB0> INFO: Test took 223215ms.
[12:47:17.824] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 61.2201 for pixel 1/6 mean/min/max = 47.4582/33.666/61.2505
[12:47:17.824] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 60.6892 for pixel 0/78 mean/min/max = 46.5601/32.401/60.7192
[12:47:17.824] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 62.7329 for pixel 47/1 mean/min/max = 47.5275/32.2004/62.8546
[12:47:17.825] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 61.6055 for pixel 26/18 mean/min/max = 47.0507/32.3197/61.7817
[12:47:17.825] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 60.5202 for pixel 0/24 mean/min/max = 46.9758/33.2982/60.6534
[12:47:17.826] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 58.4719 for pixel 2/20 mean/min/max = 45.0715/31.4476/58.6954
[12:47:17.826] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 60.434 for pixel 0/74 mean/min/max = 46.478/32.2752/60.6808
[12:47:17.827] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 61.876 for pixel 0/3 mean/min/max = 47.0839/32.0399/62.128
[12:47:17.827] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 60.3232 for pixel 19/1 mean/min/max = 46.1038/31.8836/60.3239
[12:47:17.828] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 63.2468 for pixel 7/2 mean/min/max = 48.6473/33.8969/63.3976
[12:47:17.828] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 60.3118 for pixel 2/16 mean/min/max = 46.0881/31.7968/60.3794
[12:47:17.829] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 66.2846 for pixel 5/0 mean/min/max = 51.2773/36.1908/66.3638
[12:47:17.829] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 63.6546 for pixel 2/9 mean/min/max = 47.4069/31.1085/63.7053
[12:47:17.830] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 62.7716 for pixel 2/0 mean/min/max = 48.9727/35.0829/62.8625
[12:47:17.830] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 58.6834 for pixel 13/31 mean/min/max = 45.6261/32.4634/58.7888
[12:47:17.831] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 62.3733 for pixel 8/13 mean/min/max = 47.1723/31.8704/62.4742
[12:47:17.831] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:47:17.919] <TB0> INFO: Expecting 411648 events.
[12:47:27.423] <TB0> INFO: 411648 events read in total (8912ms).
[12:47:27.433] <TB0> INFO: Expecting 411648 events.
[12:47:36.435] <TB0> INFO: 411648 events read in total (8598ms).
[12:47:36.445] <TB0> INFO: Expecting 411648 events.
[12:47:45.663] <TB0> INFO: 411648 events read in total (8815ms).
[12:47:45.678] <TB0> INFO: Expecting 411648 events.
[12:47:55.087] <TB0> INFO: 411648 events read in total (9005ms).
[12:47:55.103] <TB0> INFO: Expecting 411648 events.
[12:48:04.352] <TB0> INFO: 411648 events read in total (8846ms).
[12:48:04.369] <TB0> INFO: Expecting 411648 events.
[12:48:13.774] <TB0> INFO: 411648 events read in total (9002ms).
[12:48:13.795] <TB0> INFO: Expecting 411648 events.
[12:48:23.076] <TB0> INFO: 411648 events read in total (8878ms).
[12:48:23.101] <TB0> INFO: Expecting 411648 events.
[12:48:32.388] <TB0> INFO: 411648 events read in total (8884ms).
[12:48:32.413] <TB0> INFO: Expecting 411648 events.
[12:48:41.661] <TB0> INFO: 411648 events read in total (8844ms).
[12:48:41.689] <TB0> INFO: Expecting 411648 events.
[12:48:50.002] <TB0> INFO: 411648 events read in total (8910ms).
[12:48:51.032] <TB0> INFO: Expecting 411648 events.
[12:49:00.419] <TB0> INFO: 411648 events read in total (8984ms).
[12:49:00.454] <TB0> INFO: Expecting 411648 events.
[12:49:09.784] <TB0> INFO: 411648 events read in total (8927ms).
[12:49:09.821] <TB0> INFO: Expecting 411648 events.
[12:49:19.148] <TB0> INFO: 411648 events read in total (8924ms).
[12:49:19.188] <TB0> INFO: Expecting 411648 events.
[12:49:28.484] <TB0> INFO: 411648 events read in total (8893ms).
[12:49:28.528] <TB0> INFO: Expecting 411648 events.
[12:49:37.837] <TB0> INFO: 411648 events read in total (8906ms).
[12:49:37.882] <TB0> INFO: Expecting 411648 events.
[12:49:47.096] <TB0> INFO: 411648 events read in total (8811ms).
[12:49:47.146] <TB0> INFO: Test took 149315ms.
[12:49:47.873] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[12:49:47.886] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:49:47.886] <TB0> INFO: run 1 of 1
[12:49:48.127] <TB0> INFO: Expecting 5025280 events.
[12:50:14.672] <TB0> INFO: 588880 events read in total (25953ms).
[12:50:40.709] <TB0> INFO: 1176192 events read in total (51990ms).
[12:51:06.816] <TB0> INFO: 1764760 events read in total (78098ms).
[12:51:33.162] <TB0> INFO: 2352000 events read in total (104443ms).
[12:51:59.526] <TB0> INFO: 2941088 events read in total (130808ms).
[12:52:25.781] <TB0> INFO: 3530928 events read in total (157062ms).
[12:52:52.069] <TB0> INFO: 4119680 events read in total (183350ms).
[12:53:18.646] <TB0> INFO: 4707888 events read in total (209927ms).
[12:53:33.170] <TB0> INFO: 5025280 events read in total (224451ms).
[12:53:33.315] <TB0> INFO: Test took 225428ms.
[12:53:58.267] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 11.028503 .. 146.969236
[12:53:58.598] <TB0> INFO: Expecting 208000 events.
[12:54:08.811] <TB0> INFO: 208000 events read in total (9621ms).
[12:54:08.812] <TB0> INFO: Test took 10544ms.
[12:54:08.867] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 156 (-1/-1) hits flags = 528 (plus default)
[12:54:08.879] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:54:08.879] <TB0> INFO: run 1 of 1
[12:54:09.157] <TB0> INFO: Expecting 5191680 events.
[12:54:35.582] <TB0> INFO: 583512 events read in total (25834ms).
[12:55:01.789] <TB0> INFO: 1167888 events read in total (52041ms).
[12:55:27.161] <TB0> INFO: 1751776 events read in total (77413ms).
[12:55:53.038] <TB0> INFO: 2335632 events read in total (103289ms).
[12:56:18.769] <TB0> INFO: 2919808 events read in total (129021ms).
[12:56:44.749] <TB0> INFO: 3503432 events read in total (155000ms).
[12:57:10.710] <TB0> INFO: 4086904 events read in total (180961ms).
[12:57:36.764] <TB0> INFO: 4670272 events read in total (207015ms).
[12:57:59.897] <TB0> INFO: 5191680 events read in total (230148ms).
[12:57:59.984] <TB0> INFO: Test took 231106ms.
[12:58:26.235] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 27.628923 .. 45.747688
[12:58:26.569] <TB0> INFO: Expecting 208000 events.
[12:58:36.058] <TB0> INFO: 208000 events read in total (8898ms).
[12:58:36.059] <TB0> INFO: Test took 9821ms.
[12:58:36.106] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 55 (-1/-1) hits flags = 528 (plus default)
[12:58:36.119] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:58:36.119] <TB0> INFO: run 1 of 1
[12:58:36.397] <TB0> INFO: Expecting 1297920 events.
[12:59:04.946] <TB0> INFO: 661040 events read in total (27957ms).
[12:59:31.823] <TB0> INFO: 1297920 events read in total (54835ms).
[12:59:31.858] <TB0> INFO: Test took 55739ms.
[12:59:45.175] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 27.073858 .. 47.578855
[12:59:45.420] <TB0> INFO: Expecting 208000 events.
[12:59:55.332] <TB0> INFO: 208000 events read in total (9320ms).
[12:59:55.333] <TB0> INFO: Test took 10156ms.
[12:59:55.403] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 17 .. 57 (-1/-1) hits flags = 528 (plus default)
[12:59:55.417] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:59:55.417] <TB0> INFO: run 1 of 1
[12:59:55.695] <TB0> INFO: Expecting 1364480 events.
[13:00:25.580] <TB0> INFO: 653320 events read in total (29293ms).
[13:00:53.312] <TB0> INFO: 1305232 events read in total (57025ms).
[13:00:56.231] <TB0> INFO: 1364480 events read in total (59945ms).
[13:00:56.266] <TB0> INFO: Test took 60849ms.
[13:01:08.794] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 25.080511 .. 46.431352
[13:01:09.034] <TB0> INFO: Expecting 208000 events.
[13:01:18.932] <TB0> INFO: 208000 events read in total (9307ms).
[13:01:18.933] <TB0> INFO: Test took 10137ms.
[13:01:18.992] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 56 (-1/-1) hits flags = 528 (plus default)
[13:01:19.004] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[13:01:19.005] <TB0> INFO: run 1 of 1
[13:01:19.283] <TB0> INFO: Expecting 1397760 events.
[13:01:47.942] <TB0> INFO: 664896 events read in total (28068ms).
[13:02:15.976] <TB0> INFO: 1329576 events read in total (56102ms).
[13:02:19.456] <TB0> INFO: 1397760 events read in total (59582ms).
[13:02:19.487] <TB0> INFO: Test took 60483ms.
[13:02:32.795] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:02:32.795] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[13:02:32.808] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[13:02:32.808] <TB0> INFO: run 1 of 1
[13:02:33.044] <TB0> INFO: Expecting 1364480 events.
[13:03:01.101] <TB0> INFO: 668432 events read in total (27465ms).
[13:03:28.876] <TB0> INFO: 1335848 events read in total (55241ms).
[13:03:30.467] <TB0> INFO: 1364480 events read in total (56832ms).
[13:03:30.492] <TB0> INFO: Test took 57684ms.
[13:03:44.783] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C0.dat
[13:03:44.783] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C1.dat
[13:03:44.783] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C2.dat
[13:03:44.783] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C3.dat
[13:03:44.784] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C4.dat
[13:03:44.784] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C5.dat
[13:03:44.784] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C6.dat
[13:03:44.784] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C7.dat
[13:03:44.784] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C8.dat
[13:03:44.784] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C9.dat
[13:03:44.784] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C10.dat
[13:03:44.784] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C11.dat
[13:03:44.784] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C12.dat
[13:03:44.784] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C13.dat
[13:03:44.784] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C14.dat
[13:03:44.784] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C15.dat
[13:03:44.784] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C0.dat
[13:03:44.789] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C1.dat
[13:03:44.794] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C2.dat
[13:03:44.799] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C3.dat
[13:03:44.803] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C4.dat
[13:03:44.808] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C5.dat
[13:03:44.813] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C6.dat
[13:03:44.819] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C7.dat
[13:03:44.825] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C8.dat
[13:03:44.831] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C9.dat
[13:03:44.837] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C10.dat
[13:03:44.843] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C11.dat
[13:03:44.847] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C12.dat
[13:03:44.852] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C13.dat
[13:03:44.857] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C14.dat
[13:03:44.861] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//trimParameters35_C15.dat
[13:03:44.866] <TB0> INFO: PixTestTrim::trimTest() done
[13:03:44.866] <TB0> INFO: vtrim: 140 116 146 137 114 129 119 120 136 134 128 170 143 129 127 135
[13:03:44.866] <TB0> INFO: vthrcomp: 128 132 132 132 121 128 120 123 127 131 125 131 127 109 126 113
[13:03:44.866] <TB0> INFO: vcal mean: 34.98 34.95 35.32 35.17 34.98 34.91 35.00 34.98 34.94 35.04 34.90 35.19 35.09 34.98 34.95 35.04
[13:03:44.866] <TB0> INFO: vcal RMS: 0.99 1.03 1.44 1.28 1.14 1.00 0.99 1.02 0.98 1.16 1.08 1.27 1.22 1.02 0.96 1.09
[13:03:44.866] <TB0> INFO: bits mean: 8.88 9.01 9.74 9.40 8.80 9.58 9.04 8.66 9.58 8.77 9.37 8.24 9.67 8.63 9.55 9.49
[13:03:44.866] <TB0> INFO: bits RMS: 2.70 2.85 2.52 2.74 2.81 2.82 2.83 3.00 2.67 2.65 2.77 2.36 2.67 2.47 2.65 2.65
[13:03:44.873] <TB0> INFO: ----------------------------------------------------------------------
[13:03:44.873] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[13:03:44.873] <TB0> INFO: ----------------------------------------------------------------------
[13:03:44.876] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[13:03:44.889] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[13:03:44.889] <TB0> INFO: run 1 of 1
[13:03:45.127] <TB0> INFO: Expecting 4160000 events.
[13:04:18.388] <TB0> INFO: 772935 events read in total (32669ms).
[13:04:50.953] <TB0> INFO: 1539680 events read in total (65234ms).
[13:05:23.183] <TB0> INFO: 2300280 events read in total (97464ms).
[13:05:55.572] <TB0> INFO: 3056140 events read in total (129853ms).
[13:06:27.765] <TB0> INFO: 3809215 events read in total (162046ms).
[13:06:42.924] <TB0> INFO: 4160000 events read in total (177205ms).
[13:06:42.990] <TB0> INFO: Test took 178101ms.
[13:07:06.726] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 217 (-1/-1) hits flags = 528 (plus default)
[13:07:06.737] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[13:07:06.737] <TB0> INFO: run 1 of 1
[13:07:06.974] <TB0> INFO: Expecting 4534400 events.
[13:07:39.348] <TB0> INFO: 723515 events read in total (31782ms).
[13:08:10.856] <TB0> INFO: 1443045 events read in total (63290ms).
[13:08:42.289] <TB0> INFO: 2159730 events read in total (94723ms).
[13:09:13.615] <TB0> INFO: 2871950 events read in total (126049ms).
[13:09:44.900] <TB0> INFO: 3582535 events read in total (157334ms).
[13:10:16.391] <TB0> INFO: 4291375 events read in total (188825ms).
[13:10:27.184] <TB0> INFO: 4534400 events read in total (199618ms).
[13:10:27.388] <TB0> INFO: Test took 200650ms.
[13:10:56.660] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[13:10:56.674] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[13:10:56.674] <TB0> INFO: run 1 of 1
[13:10:56.948] <TB0> INFO: Expecting 4160000 events.
[13:11:29.921] <TB0> INFO: 747820 events read in total (32382ms).
[13:12:02.119] <TB0> INFO: 1490220 events read in total (64580ms).
[13:12:33.845] <TB0> INFO: 2228765 events read in total (96306ms).
[13:13:05.646] <TB0> INFO: 2962505 events read in total (128107ms).
[13:13:37.584] <TB0> INFO: 3693340 events read in total (160045ms).
[13:13:57.811] <TB0> INFO: 4160000 events read in total (180272ms).
[13:13:58.059] <TB0> INFO: Test took 181384ms.
[13:14:28.337] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 201 (-1/-1) hits flags = 528 (plus default)
[13:14:28.354] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[13:14:28.354] <TB0> INFO: run 1 of 1
[13:14:28.680] <TB0> INFO: Expecting 4201600 events.
[13:15:00.752] <TB0> INFO: 744680 events read in total (31480ms).
[13:15:32.283] <TB0> INFO: 1484645 events read in total (63011ms).
[13:16:03.640] <TB0> INFO: 2220675 events read in total (94368ms).
[13:16:35.163] <TB0> INFO: 2951880 events read in total (125891ms).
[13:17:06.910] <TB0> INFO: 3680500 events read in total (157638ms).
[13:17:29.239] <TB0> INFO: 4201600 events read in total (179967ms).
[13:17:29.310] <TB0> INFO: Test took 180955ms.
[13:17:57.057] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 201 (-1/-1) hits flags = 528 (plus default)
[13:17:57.070] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[13:17:57.070] <TB0> INFO: run 1 of 1
[13:17:57.309] <TB0> INFO: Expecting 4201600 events.
[13:18:29.021] <TB0> INFO: 745125 events read in total (31120ms).
[13:19:01.357] <TB0> INFO: 1485015 events read in total (63456ms).
[13:19:33.412] <TB0> INFO: 2221160 events read in total (95511ms).
[13:20:05.336] <TB0> INFO: 2952410 events read in total (127435ms).
[13:20:37.177] <TB0> INFO: 3681165 events read in total (159276ms).
[13:20:59.731] <TB0> INFO: 4201600 events read in total (181830ms).
[13:20:59.926] <TB0> INFO: Test took 182856ms.
[13:21:24.065] <TB0> INFO: PixTestTrim::trimBitTest() done
[13:21:24.066] <TB0> INFO: PixTestTrim::doTest() done, duration: 2504 seconds
[13:21:24.066] <TB0> INFO: Decoding statistics:
[13:21:24.066] <TB0> INFO: General information:
[13:21:24.066] <TB0> INFO: 16bit words read: 0
[13:21:24.066] <TB0> INFO: valid events total: 0
[13:21:24.066] <TB0> INFO: empty events: 0
[13:21:24.066] <TB0> INFO: valid events with pixels: 0
[13:21:24.066] <TB0> INFO: valid pixel hits: 0
[13:21:24.066] <TB0> INFO: Event errors: 0
[13:21:24.066] <TB0> INFO: start marker: 0
[13:21:24.066] <TB0> INFO: stop marker: 0
[13:21:24.066] <TB0> INFO: overflow: 0
[13:21:24.066] <TB0> INFO: invalid 5bit words: 0
[13:21:24.066] <TB0> INFO: invalid XOR eye diagram: 0
[13:21:24.066] <TB0> INFO: frame (failed synchr.): 0
[13:21:24.066] <TB0> INFO: idle data (no TBM trl): 0
[13:21:24.066] <TB0> INFO: no data (only TBM hdr): 0
[13:21:24.066] <TB0> INFO: TBM errors: 0
[13:21:24.066] <TB0> INFO: flawed TBM headers: 0
[13:21:24.066] <TB0> INFO: flawed TBM trailers: 0
[13:21:24.066] <TB0> INFO: event ID mismatches: 0
[13:21:24.066] <TB0> INFO: ROC errors: 0
[13:21:24.066] <TB0> INFO: missing ROC header(s): 0
[13:21:24.066] <TB0> INFO: misplaced readback start: 0
[13:21:24.066] <TB0> INFO: Pixel decoding errors: 0
[13:21:24.066] <TB0> INFO: pixel data incomplete: 0
[13:21:24.066] <TB0> INFO: pixel address: 0
[13:21:24.066] <TB0> INFO: pulse height fill bit: 0
[13:21:24.066] <TB0> INFO: buffer corruption: 0
[13:21:24.683] <TB0> INFO: ######################################################################
[13:21:24.683] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:21:24.683] <TB0> INFO: ######################################################################
[13:21:24.923] <TB0> INFO: Expecting 41600 events.
[13:21:28.421] <TB0> INFO: 41600 events read in total (2906ms).
[13:21:28.423] <TB0> INFO: Test took 3739ms.
[13:21:28.872] <TB0> INFO: Expecting 41600 events.
[13:21:32.371] <TB0> INFO: 41600 events read in total (2908ms).
[13:21:32.372] <TB0> INFO: Test took 3743ms.
[13:21:32.663] <TB0> INFO: Expecting 41600 events.
[13:21:36.210] <TB0> INFO: 41600 events read in total (2955ms).
[13:21:36.211] <TB0> INFO: Test took 3813ms.
[13:21:36.502] <TB0> INFO: Expecting 41600 events.
[13:21:40.167] <TB0> INFO: 41600 events read in total (3074ms).
[13:21:40.168] <TB0> INFO: Test took 3931ms.
[13:21:40.519] <TB0> INFO: Expecting 41600 events.
[13:21:44.177] <TB0> INFO: 41600 events read in total (3067ms).
[13:21:44.178] <TB0> INFO: Test took 3984ms.
[13:21:44.468] <TB0> INFO: Expecting 41600 events.
[13:21:48.074] <TB0> INFO: 41600 events read in total (3014ms).
[13:21:48.075] <TB0> INFO: Test took 3871ms.
[13:21:48.364] <TB0> INFO: Expecting 41600 events.
[13:21:51.957] <TB0> INFO: 41600 events read in total (3002ms).
[13:21:51.958] <TB0> INFO: Test took 3859ms.
[13:21:52.247] <TB0> INFO: Expecting 41600 events.
[13:21:55.824] <TB0> INFO: 41600 events read in total (2985ms).
[13:21:55.825] <TB0> INFO: Test took 3843ms.
[13:21:56.114] <TB0> INFO: Expecting 41600 events.
[13:21:59.634] <TB0> INFO: 41600 events read in total (2929ms).
[13:21:59.635] <TB0> INFO: Test took 3786ms.
[13:21:59.927] <TB0> INFO: Expecting 41600 events.
[13:22:03.518] <TB0> INFO: 41600 events read in total (3000ms).
[13:22:03.519] <TB0> INFO: Test took 3857ms.
[13:22:03.807] <TB0> INFO: Expecting 41600 events.
[13:22:07.292] <TB0> INFO: 41600 events read in total (2894ms).
[13:22:07.293] <TB0> INFO: Test took 3750ms.
[13:22:07.583] <TB0> INFO: Expecting 41600 events.
[13:22:11.066] <TB0> INFO: 41600 events read in total (2892ms).
[13:22:11.067] <TB0> INFO: Test took 3749ms.
[13:22:11.358] <TB0> INFO: Expecting 41600 events.
[13:22:14.833] <TB0> INFO: 41600 events read in total (2884ms).
[13:22:14.834] <TB0> INFO: Test took 3741ms.
[13:22:15.124] <TB0> INFO: Expecting 41600 events.
[13:22:18.613] <TB0> INFO: 41600 events read in total (2897ms).
[13:22:18.614] <TB0> INFO: Test took 3756ms.
[13:22:18.904] <TB0> INFO: Expecting 41600 events.
[13:22:22.417] <TB0> INFO: 41600 events read in total (2922ms).
[13:22:22.418] <TB0> INFO: Test took 3780ms.
[13:22:22.708] <TB0> INFO: Expecting 41600 events.
[13:22:26.216] <TB0> INFO: 41600 events read in total (2916ms).
[13:22:26.217] <TB0> INFO: Test took 3775ms.
[13:22:26.531] <TB0> INFO: Expecting 41600 events.
[13:22:30.136] <TB0> INFO: 41600 events read in total (3013ms).
[13:22:30.137] <TB0> INFO: Test took 3892ms.
[13:22:30.428] <TB0> INFO: Expecting 41600 events.
[13:22:33.941] <TB0> INFO: 41600 events read in total (2921ms).
[13:22:33.942] <TB0> INFO: Test took 3779ms.
[13:22:34.231] <TB0> INFO: Expecting 41600 events.
[13:22:37.758] <TB0> INFO: 41600 events read in total (2935ms).
[13:22:37.759] <TB0> INFO: Test took 3793ms.
[13:22:38.048] <TB0> INFO: Expecting 41600 events.
[13:22:41.596] <TB0> INFO: 41600 events read in total (2956ms).
[13:22:41.597] <TB0> INFO: Test took 3815ms.
[13:22:41.886] <TB0> INFO: Expecting 41600 events.
[13:22:45.438] <TB0> INFO: 41600 events read in total (2960ms).
[13:22:45.439] <TB0> INFO: Test took 3818ms.
[13:22:45.731] <TB0> INFO: Expecting 41600 events.
[13:22:49.264] <TB0> INFO: 41600 events read in total (2941ms).
[13:22:49.264] <TB0> INFO: Test took 3798ms.
[13:22:49.553] <TB0> INFO: Expecting 41600 events.
[13:22:53.089] <TB0> INFO: 41600 events read in total (2944ms).
[13:22:53.090] <TB0> INFO: Test took 3802ms.
[13:22:53.379] <TB0> INFO: Expecting 41600 events.
[13:22:56.907] <TB0> INFO: 41600 events read in total (2937ms).
[13:22:56.908] <TB0> INFO: Test took 3794ms.
[13:22:57.219] <TB0> INFO: Expecting 41600 events.
[13:23:00.813] <TB0> INFO: 41600 events read in total (3002ms).
[13:23:00.815] <TB0> INFO: Test took 3880ms.
[13:23:01.106] <TB0> INFO: Expecting 41600 events.
[13:23:04.649] <TB0> INFO: 41600 events read in total (2952ms).
[13:23:04.650] <TB0> INFO: Test took 3810ms.
[13:23:04.941] <TB0> INFO: Expecting 41600 events.
[13:23:08.537] <TB0> INFO: 41600 events read in total (3004ms).
[13:23:08.538] <TB0> INFO: Test took 3863ms.
[13:23:08.828] <TB0> INFO: Expecting 41600 events.
[13:23:12.392] <TB0> INFO: 41600 events read in total (2973ms).
[13:23:12.393] <TB0> INFO: Test took 3831ms.
[13:23:12.684] <TB0> INFO: Expecting 41600 events.
[13:23:16.215] <TB0> INFO: 41600 events read in total (2939ms).
[13:23:16.216] <TB0> INFO: Test took 3797ms.
[13:23:16.506] <TB0> INFO: Expecting 2560 events.
[13:23:17.406] <TB0> INFO: 2560 events read in total (308ms).
[13:23:17.407] <TB0> INFO: Test took 1178ms.
[13:23:17.714] <TB0> INFO: Expecting 2560 events.
[13:23:18.598] <TB0> INFO: 2560 events read in total (292ms).
[13:23:18.598] <TB0> INFO: Test took 1191ms.
[13:23:18.906] <TB0> INFO: Expecting 2560 events.
[13:23:19.791] <TB0> INFO: 2560 events read in total (293ms).
[13:23:19.792] <TB0> INFO: Test took 1194ms.
[13:23:20.099] <TB0> INFO: Expecting 2560 events.
[13:23:20.994] <TB0> INFO: 2560 events read in total (303ms).
[13:23:20.994] <TB0> INFO: Test took 1202ms.
[13:23:21.301] <TB0> INFO: Expecting 2560 events.
[13:23:22.183] <TB0> INFO: 2560 events read in total (290ms).
[13:23:22.184] <TB0> INFO: Test took 1189ms.
[13:23:22.490] <TB0> INFO: Expecting 2560 events.
[13:23:23.375] <TB0> INFO: 2560 events read in total (293ms).
[13:23:23.376] <TB0> INFO: Test took 1192ms.
[13:23:23.684] <TB0> INFO: Expecting 2560 events.
[13:23:24.570] <TB0> INFO: 2560 events read in total (294ms).
[13:23:24.571] <TB0> INFO: Test took 1195ms.
[13:23:24.879] <TB0> INFO: Expecting 2560 events.
[13:23:25.767] <TB0> INFO: 2560 events read in total (296ms).
[13:23:25.767] <TB0> INFO: Test took 1196ms.
[13:23:26.075] <TB0> INFO: Expecting 2560 events.
[13:23:26.960] <TB0> INFO: 2560 events read in total (293ms).
[13:23:26.960] <TB0> INFO: Test took 1192ms.
[13:23:27.268] <TB0> INFO: Expecting 2560 events.
[13:23:28.155] <TB0> INFO: 2560 events read in total (295ms).
[13:23:28.155] <TB0> INFO: Test took 1195ms.
[13:23:28.463] <TB0> INFO: Expecting 2560 events.
[13:23:29.354] <TB0> INFO: 2560 events read in total (299ms).
[13:23:29.355] <TB0> INFO: Test took 1198ms.
[13:23:29.662] <TB0> INFO: Expecting 2560 events.
[13:23:30.539] <TB0> INFO: 2560 events read in total (286ms).
[13:23:30.540] <TB0> INFO: Test took 1185ms.
[13:23:30.848] <TB0> INFO: Expecting 2560 events.
[13:23:31.733] <TB0> INFO: 2560 events read in total (293ms).
[13:23:31.733] <TB0> INFO: Test took 1193ms.
[13:23:32.042] <TB0> INFO: Expecting 2560 events.
[13:23:32.936] <TB0> INFO: 2560 events read in total (302ms).
[13:23:32.936] <TB0> INFO: Test took 1202ms.
[13:23:33.244] <TB0> INFO: Expecting 2560 events.
[13:23:34.130] <TB0> INFO: 2560 events read in total (295ms).
[13:23:34.130] <TB0> INFO: Test took 1193ms.
[13:23:34.438] <TB0> INFO: Expecting 2560 events.
[13:23:35.330] <TB0> INFO: 2560 events read in total (300ms).
[13:23:35.330] <TB0> INFO: Test took 1200ms.
[13:23:35.333] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:23:35.639] <TB0> INFO: Expecting 655360 events.
[13:23:50.820] <TB0> INFO: 655360 events read in total (14589ms).
[13:23:50.832] <TB0> INFO: Expecting 655360 events.
[13:24:05.388] <TB0> INFO: 655360 events read in total (14153ms).
[13:24:05.404] <TB0> INFO: Expecting 655360 events.
[13:24:20.287] <TB0> INFO: 655360 events read in total (14480ms).
[13:24:20.314] <TB0> INFO: Expecting 655360 events.
[13:24:35.022] <TB0> INFO: 655360 events read in total (14305ms).
[13:24:35.047] <TB0> INFO: Expecting 655360 events.
[13:24:49.666] <TB0> INFO: 655360 events read in total (14216ms).
[13:24:49.697] <TB0> INFO: Expecting 655360 events.
[13:25:04.223] <TB0> INFO: 655360 events read in total (14123ms).
[13:25:04.256] <TB0> INFO: Expecting 655360 events.
[13:25:19.016] <TB0> INFO: 655360 events read in total (14357ms).
[13:25:19.065] <TB0> INFO: Expecting 655360 events.
[13:25:33.753] <TB0> INFO: 655360 events read in total (14285ms).
[13:25:33.795] <TB0> INFO: Expecting 655360 events.
[13:25:48.594] <TB0> INFO: 655360 events read in total (14396ms).
[13:25:48.667] <TB0> INFO: Expecting 655360 events.
[13:26:03.334] <TB0> INFO: 655360 events read in total (14263ms).
[13:26:03.389] <TB0> INFO: Expecting 655360 events.
[13:26:18.039] <TB0> INFO: 655360 events read in total (14247ms).
[13:26:18.108] <TB0> INFO: Expecting 655360 events.
[13:26:32.696] <TB0> INFO: 655360 events read in total (14185ms).
[13:26:32.894] <TB0> INFO: Expecting 655360 events.
[13:26:47.555] <TB0> INFO: 655360 events read in total (14258ms).
[13:26:47.637] <TB0> INFO: Expecting 655360 events.
[13:27:02.241] <TB0> INFO: 655360 events read in total (14201ms).
[13:27:02.324] <TB0> INFO: Expecting 655360 events.
[13:27:17.043] <TB0> INFO: 655360 events read in total (14316ms).
[13:27:17.166] <TB0> INFO: Expecting 655360 events.
[13:27:31.845] <TB0> INFO: 655360 events read in total (14275ms).
[13:27:31.940] <TB0> INFO: Test took 236607ms.
[13:27:32.034] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:27:32.291] <TB0> INFO: Expecting 655360 events.
[13:27:46.694] <TB0> INFO: 655360 events read in total (13811ms).
[13:27:46.705] <TB0> INFO: Expecting 655360 events.
[13:28:01.268] <TB0> INFO: 655360 events read in total (14160ms).
[13:28:01.287] <TB0> INFO: Expecting 655360 events.
[13:28:15.787] <TB0> INFO: 655360 events read in total (14097ms).
[13:28:15.811] <TB0> INFO: Expecting 655360 events.
[13:28:30.413] <TB0> INFO: 655360 events read in total (14199ms).
[13:28:30.444] <TB0> INFO: Expecting 655360 events.
[13:28:45.150] <TB0> INFO: 655360 events read in total (14303ms).
[13:28:45.179] <TB0> INFO: Expecting 655360 events.
[13:28:59.903] <TB0> INFO: 655360 events read in total (14321ms).
[13:28:59.945] <TB0> INFO: Expecting 655360 events.
[13:29:14.465] <TB0> INFO: 655360 events read in total (14117ms).
[13:29:14.504] <TB0> INFO: Expecting 655360 events.
[13:29:29.455] <TB0> INFO: 655360 events read in total (14548ms).
[13:29:29.508] <TB0> INFO: Expecting 655360 events.
[13:29:44.273] <TB0> INFO: 655360 events read in total (14362ms).
[13:29:44.335] <TB0> INFO: Expecting 655360 events.
[13:29:58.972] <TB0> INFO: 655360 events read in total (14234ms).
[13:29:59.044] <TB0> INFO: Expecting 655360 events.
[13:30:13.719] <TB0> INFO: 655360 events read in total (14272ms).
[13:30:13.816] <TB0> INFO: Expecting 655360 events.
[13:30:28.427] <TB0> INFO: 655360 events read in total (14208ms).
[13:30:28.523] <TB0> INFO: Expecting 655360 events.
[13:30:43.149] <TB0> INFO: 655360 events read in total (14223ms).
[13:30:43.333] <TB0> INFO: Expecting 655360 events.
[13:30:57.781] <TB0> INFO: 655360 events read in total (14045ms).
[13:30:57.884] <TB0> INFO: Expecting 655360 events.
[13:31:12.339] <TB0> INFO: 655360 events read in total (14052ms).
[13:31:12.433] <TB0> INFO: Expecting 655360 events.
[13:31:26.619] <TB0> INFO: 655360 events read in total (13783ms).
[13:31:26.716] <TB0> INFO: Test took 234682ms.
[13:31:26.885] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:26.891] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:26.896] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[13:31:26.902] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[13:31:26.908] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[13:31:26.914] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[13:31:26.919] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[13:31:26.925] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[13:31:26.931] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:26.937] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[13:31:26.943] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[13:31:26.948] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:26.954] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:26.960] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[13:31:26.966] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[13:31:26.972] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[13:31:26.980] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[13:31:26.988] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[13:31:26.995] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[13:31:27.003] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[13:31:27.011] <TB0> INFO: safety margin for low PH: adding 8, margin is now 28
[13:31:27.018] <TB0> INFO: safety margin for low PH: adding 9, margin is now 29
[13:31:27.026] <TB0> INFO: safety margin for low PH: adding 10, margin is now 30
[13:31:27.034] <TB0> INFO: safety margin for low PH: adding 11, margin is now 31
[13:31:27.042] <TB0> INFO: safety margin for low PH: adding 12, margin is now 32
[13:31:27.050] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:27.058] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:27.066] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:27.075] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[13:31:27.083] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:27.092] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:27.101] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:27.109] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:27.116] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:27.125] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[13:31:27.132] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[13:31:27.140] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[13:31:27.148] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:27.156] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[13:31:27.164] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:27.172] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:27.180] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[13:31:27.188] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[13:31:27.196] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[13:31:27.204] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[13:31:27.241] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C0.dat
[13:31:27.241] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C1.dat
[13:31:27.241] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C2.dat
[13:31:27.241] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C3.dat
[13:31:27.241] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C4.dat
[13:31:27.241] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C5.dat
[13:31:27.241] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C6.dat
[13:31:27.241] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C7.dat
[13:31:27.241] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C8.dat
[13:31:27.242] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C9.dat
[13:31:27.242] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C10.dat
[13:31:27.242] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C11.dat
[13:31:27.242] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C12.dat
[13:31:27.242] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C13.dat
[13:31:27.242] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C14.dat
[13:31:27.242] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//dacParameters35_C15.dat
[13:31:27.500] <TB0> INFO: Expecting 41600 events.
[13:31:30.602] <TB0> INFO: 41600 events read in total (2511ms).
[13:31:30.603] <TB0> INFO: Test took 3357ms.
[13:31:31.050] <TB0> INFO: Expecting 41600 events.
[13:31:34.121] <TB0> INFO: 41600 events read in total (2479ms).
[13:31:34.122] <TB0> INFO: Test took 3308ms.
[13:31:34.579] <TB0> INFO: Expecting 41600 events.
[13:31:37.693] <TB0> INFO: 41600 events read in total (2523ms).
[13:31:37.694] <TB0> INFO: Test took 3359ms.
[13:31:37.910] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:37.998] <TB0> INFO: Expecting 2560 events.
[13:31:38.885] <TB0> INFO: 2560 events read in total (295ms).
[13:31:38.885] <TB0> INFO: Test took 975ms.
[13:31:38.887] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:39.194] <TB0> INFO: Expecting 2560 events.
[13:31:40.078] <TB0> INFO: 2560 events read in total (293ms).
[13:31:40.078] <TB0> INFO: Test took 1191ms.
[13:31:40.080] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:40.386] <TB0> INFO: Expecting 2560 events.
[13:31:41.269] <TB0> INFO: 2560 events read in total (291ms).
[13:31:41.269] <TB0> INFO: Test took 1189ms.
[13:31:41.272] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:41.577] <TB0> INFO: Expecting 2560 events.
[13:31:42.463] <TB0> INFO: 2560 events read in total (294ms).
[13:31:42.463] <TB0> INFO: Test took 1191ms.
[13:31:42.466] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:42.771] <TB0> INFO: Expecting 2560 events.
[13:31:43.664] <TB0> INFO: 2560 events read in total (301ms).
[13:31:43.665] <TB0> INFO: Test took 1199ms.
[13:31:43.668] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:43.973] <TB0> INFO: Expecting 2560 events.
[13:31:44.870] <TB0> INFO: 2560 events read in total (305ms).
[13:31:44.871] <TB0> INFO: Test took 1203ms.
[13:31:44.873] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:45.178] <TB0> INFO: Expecting 2560 events.
[13:31:46.073] <TB0> INFO: 2560 events read in total (303ms).
[13:31:46.073] <TB0> INFO: Test took 1200ms.
[13:31:46.075] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:46.382] <TB0> INFO: Expecting 2560 events.
[13:31:47.272] <TB0> INFO: 2560 events read in total (298ms).
[13:31:47.272] <TB0> INFO: Test took 1197ms.
[13:31:47.275] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:47.580] <TB0> INFO: Expecting 2560 events.
[13:31:48.466] <TB0> INFO: 2560 events read in total (294ms).
[13:31:48.466] <TB0> INFO: Test took 1191ms.
[13:31:48.468] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:48.774] <TB0> INFO: Expecting 2560 events.
[13:31:49.654] <TB0> INFO: 2560 events read in total (289ms).
[13:31:49.655] <TB0> INFO: Test took 1187ms.
[13:31:49.657] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:49.963] <TB0> INFO: Expecting 2560 events.
[13:31:50.850] <TB0> INFO: 2560 events read in total (296ms).
[13:31:50.851] <TB0> INFO: Test took 1194ms.
[13:31:50.853] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:51.159] <TB0> INFO: Expecting 2560 events.
[13:31:52.051] <TB0> INFO: 2560 events read in total (300ms).
[13:31:52.051] <TB0> INFO: Test took 1198ms.
[13:31:52.054] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:52.358] <TB0> INFO: Expecting 2560 events.
[13:31:53.238] <TB0> INFO: 2560 events read in total (288ms).
[13:31:53.238] <TB0> INFO: Test took 1184ms.
[13:31:53.241] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:53.546] <TB0> INFO: Expecting 2560 events.
[13:31:54.433] <TB0> INFO: 2560 events read in total (295ms).
[13:31:54.434] <TB0> INFO: Test took 1194ms.
[13:31:54.437] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:54.742] <TB0> INFO: Expecting 2560 events.
[13:31:55.625] <TB0> INFO: 2560 events read in total (291ms).
[13:31:55.625] <TB0> INFO: Test took 1188ms.
[13:31:55.628] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:55.934] <TB0> INFO: Expecting 2560 events.
[13:31:56.826] <TB0> INFO: 2560 events read in total (300ms).
[13:31:56.826] <TB0> INFO: Test took 1198ms.
[13:31:56.830] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:57.134] <TB0> INFO: Expecting 2560 events.
[13:31:58.021] <TB0> INFO: 2560 events read in total (296ms).
[13:31:58.021] <TB0> INFO: Test took 1192ms.
[13:31:58.024] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:58.329] <TB0> INFO: Expecting 2560 events.
[13:31:59.216] <TB0> INFO: 2560 events read in total (295ms).
[13:31:59.216] <TB0> INFO: Test took 1192ms.
[13:31:59.218] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:59.525] <TB0> INFO: Expecting 2560 events.
[13:32:00.415] <TB0> INFO: 2560 events read in total (299ms).
[13:32:00.416] <TB0> INFO: Test took 1198ms.
[13:32:00.418] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:00.723] <TB0> INFO: Expecting 2560 events.
[13:32:01.613] <TB0> INFO: 2560 events read in total (298ms).
[13:32:01.614] <TB0> INFO: Test took 1196ms.
[13:32:01.617] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:01.922] <TB0> INFO: Expecting 2560 events.
[13:32:02.809] <TB0> INFO: 2560 events read in total (295ms).
[13:32:02.809] <TB0> INFO: Test took 1193ms.
[13:32:02.812] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:03.118] <TB0> INFO: Expecting 2560 events.
[13:32:04.004] <TB0> INFO: 2560 events read in total (294ms).
[13:32:04.005] <TB0> INFO: Test took 1193ms.
[13:32:04.007] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:04.313] <TB0> INFO: Expecting 2560 events.
[13:32:05.202] <TB0> INFO: 2560 events read in total (298ms).
[13:32:05.203] <TB0> INFO: Test took 1196ms.
[13:32:05.205] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:05.511] <TB0> INFO: Expecting 2560 events.
[13:32:06.392] <TB0> INFO: 2560 events read in total (290ms).
[13:32:06.392] <TB0> INFO: Test took 1187ms.
[13:32:06.395] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:06.700] <TB0> INFO: Expecting 2560 events.
[13:32:07.589] <TB0> INFO: 2560 events read in total (297ms).
[13:32:07.589] <TB0> INFO: Test took 1194ms.
[13:32:07.592] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:07.898] <TB0> INFO: Expecting 2560 events.
[13:32:08.788] <TB0> INFO: 2560 events read in total (299ms).
[13:32:08.789] <TB0> INFO: Test took 1197ms.
[13:32:08.791] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:09.096] <TB0> INFO: Expecting 2560 events.
[13:32:09.986] <TB0> INFO: 2560 events read in total (299ms).
[13:32:09.987] <TB0> INFO: Test took 1196ms.
[13:32:09.989] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:10.294] <TB0> INFO: Expecting 2560 events.
[13:32:11.181] <TB0> INFO: 2560 events read in total (295ms).
[13:32:11.181] <TB0> INFO: Test took 1193ms.
[13:32:11.184] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:11.490] <TB0> INFO: Expecting 2560 events.
[13:32:12.379] <TB0> INFO: 2560 events read in total (297ms).
[13:32:12.380] <TB0> INFO: Test took 1196ms.
[13:32:12.383] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:12.687] <TB0> INFO: Expecting 2560 events.
[13:32:13.576] <TB0> INFO: 2560 events read in total (297ms).
[13:32:13.577] <TB0> INFO: Test took 1194ms.
[13:32:13.580] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:13.885] <TB0> INFO: Expecting 2560 events.
[13:32:14.775] <TB0> INFO: 2560 events read in total (299ms).
[13:32:14.775] <TB0> INFO: Test took 1196ms.
[13:32:14.778] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:15.084] <TB0> INFO: Expecting 2560 events.
[13:32:15.968] <TB0> INFO: 2560 events read in total (293ms).
[13:32:15.968] <TB0> INFO: Test took 1190ms.
[13:32:16.438] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 651 seconds
[13:32:16.438] <TB0> INFO: PH scale (per ROC): 48 47 35 35 33 43 40 37 71 35 45 42 38 51 52 32
[13:32:16.438] <TB0> INFO: PH offset (per ROC): 106 112 102 104 112 109 92 99 139 98 89 114 93 122 117 106
[13:32:16.444] <TB0> INFO: Decoding statistics:
[13:32:16.444] <TB0> INFO: General information:
[13:32:16.444] <TB0> INFO: 16bit words read: 127886
[13:32:16.444] <TB0> INFO: valid events total: 20480
[13:32:16.444] <TB0> INFO: empty events: 17977
[13:32:16.444] <TB0> INFO: valid events with pixels: 2503
[13:32:16.444] <TB0> INFO: valid pixel hits: 2503
[13:32:16.444] <TB0> INFO: Event errors: 0
[13:32:16.444] <TB0> INFO: start marker: 0
[13:32:16.444] <TB0> INFO: stop marker: 0
[13:32:16.444] <TB0> INFO: overflow: 0
[13:32:16.444] <TB0> INFO: invalid 5bit words: 0
[13:32:16.444] <TB0> INFO: invalid XOR eye diagram: 0
[13:32:16.444] <TB0> INFO: frame (failed synchr.): 0
[13:32:16.444] <TB0> INFO: idle data (no TBM trl): 0
[13:32:16.444] <TB0> INFO: no data (only TBM hdr): 0
[13:32:16.444] <TB0> INFO: TBM errors: 0
[13:32:16.444] <TB0> INFO: flawed TBM headers: 0
[13:32:16.444] <TB0> INFO: flawed TBM trailers: 0
[13:32:16.444] <TB0> INFO: event ID mismatches: 0
[13:32:16.444] <TB0> INFO: ROC errors: 0
[13:32:16.444] <TB0> INFO: missing ROC header(s): 0
[13:32:16.444] <TB0> INFO: misplaced readback start: 0
[13:32:16.444] <TB0> INFO: Pixel decoding errors: 0
[13:32:16.444] <TB0> INFO: pixel data incomplete: 0
[13:32:16.444] <TB0> INFO: pixel address: 0
[13:32:16.444] <TB0> INFO: pulse height fill bit: 0
[13:32:16.444] <TB0> INFO: buffer corruption: 0
[13:32:16.605] <TB0> INFO: ######################################################################
[13:32:16.605] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:32:16.605] <TB0> INFO: ######################################################################
[13:32:16.618] <TB0> INFO: scanning low vcal = 10
[13:32:16.857] <TB0> INFO: Expecting 41600 events.
[13:32:20.449] <TB0> INFO: 41600 events read in total (3001ms).
[13:32:20.450] <TB0> INFO: Test took 3832ms.
[13:32:20.452] <TB0> INFO: scanning low vcal = 20
[13:32:20.744] <TB0> INFO: Expecting 41600 events.
[13:32:24.407] <TB0> INFO: 41600 events read in total (3072ms).
[13:32:24.407] <TB0> INFO: Test took 3955ms.
[13:32:24.409] <TB0> INFO: scanning low vcal = 30
[13:32:24.706] <TB0> INFO: Expecting 41600 events.
[13:32:28.399] <TB0> INFO: 41600 events read in total (3101ms).
[13:32:28.401] <TB0> INFO: Test took 3992ms.
[13:32:28.403] <TB0> INFO: scanning low vcal = 40
[13:32:28.680] <TB0> INFO: Expecting 41600 events.
[13:32:32.669] <TB0> INFO: 41600 events read in total (3397ms).
[13:32:32.670] <TB0> INFO: Test took 4267ms.
[13:32:32.673] <TB0> INFO: scanning low vcal = 50
[13:32:32.950] <TB0> INFO: Expecting 41600 events.
[13:32:36.965] <TB0> INFO: 41600 events read in total (3423ms).
[13:32:36.965] <TB0> INFO: Test took 4292ms.
[13:32:36.969] <TB0> INFO: scanning low vcal = 60
[13:32:37.245] <TB0> INFO: Expecting 41600 events.
[13:32:41.234] <TB0> INFO: 41600 events read in total (3397ms).
[13:32:41.235] <TB0> INFO: Test took 4266ms.
[13:32:41.238] <TB0> INFO: scanning low vcal = 70
[13:32:41.515] <TB0> INFO: Expecting 41600 events.
[13:32:45.580] <TB0> INFO: 41600 events read in total (3474ms).
[13:32:45.580] <TB0> INFO: Test took 4342ms.
[13:32:45.583] <TB0> INFO: scanning low vcal = 80
[13:32:45.860] <TB0> INFO: Expecting 41600 events.
[13:32:49.864] <TB0> INFO: 41600 events read in total (3412ms).
[13:32:49.865] <TB0> INFO: Test took 4281ms.
[13:32:49.868] <TB0> INFO: scanning low vcal = 90
[13:32:50.145] <TB0> INFO: Expecting 41600 events.
[13:32:54.170] <TB0> INFO: 41600 events read in total (3434ms).
[13:32:54.170] <TB0> INFO: Test took 4302ms.
[13:32:54.174] <TB0> INFO: scanning low vcal = 100
[13:32:54.450] <TB0> INFO: Expecting 41600 events.
[13:32:58.526] <TB0> INFO: 41600 events read in total (3484ms).
[13:32:58.527] <TB0> INFO: Test took 4352ms.
[13:32:58.529] <TB0> INFO: scanning low vcal = 110
[13:32:58.806] <TB0> INFO: Expecting 41600 events.
[13:33:02.811] <TB0> INFO: 41600 events read in total (3413ms).
[13:33:02.811] <TB0> INFO: Test took 4282ms.
[13:33:02.814] <TB0> INFO: scanning low vcal = 120
[13:33:03.091] <TB0> INFO: Expecting 41600 events.
[13:33:07.085] <TB0> INFO: 41600 events read in total (3402ms).
[13:33:07.086] <TB0> INFO: Test took 4272ms.
[13:33:07.089] <TB0> INFO: scanning low vcal = 130
[13:33:07.366] <TB0> INFO: Expecting 41600 events.
[13:33:11.417] <TB0> INFO: 41600 events read in total (3460ms).
[13:33:11.418] <TB0> INFO: Test took 4329ms.
[13:33:11.421] <TB0> INFO: scanning low vcal = 140
[13:33:11.719] <TB0> INFO: Expecting 41600 events.
[13:33:15.773] <TB0> INFO: 41600 events read in total (3462ms).
[13:33:15.774] <TB0> INFO: Test took 4353ms.
[13:33:15.777] <TB0> INFO: scanning low vcal = 150
[13:33:16.077] <TB0> INFO: Expecting 41600 events.
[13:33:20.106] <TB0> INFO: 41600 events read in total (3438ms).
[13:33:20.107] <TB0> INFO: Test took 4330ms.
[13:33:20.109] <TB0> INFO: scanning low vcal = 160
[13:33:20.387] <TB0> INFO: Expecting 41600 events.
[13:33:24.391] <TB0> INFO: 41600 events read in total (3413ms).
[13:33:24.392] <TB0> INFO: Test took 4282ms.
[13:33:24.394] <TB0> INFO: scanning low vcal = 170
[13:33:24.671] <TB0> INFO: Expecting 41600 events.
[13:33:28.668] <TB0> INFO: 41600 events read in total (3405ms).
[13:33:28.668] <TB0> INFO: Test took 4274ms.
[13:33:28.674] <TB0> INFO: scanning low vcal = 180
[13:33:28.948] <TB0> INFO: Expecting 41600 events.
[13:33:32.946] <TB0> INFO: 41600 events read in total (3406ms).
[13:33:32.946] <TB0> INFO: Test took 4272ms.
[13:33:32.949] <TB0> INFO: scanning low vcal = 190
[13:33:33.226] <TB0> INFO: Expecting 41600 events.
[13:33:37.230] <TB0> INFO: 41600 events read in total (3412ms).
[13:33:37.230] <TB0> INFO: Test took 4281ms.
[13:33:37.233] <TB0> INFO: scanning low vcal = 200
[13:33:37.510] <TB0> INFO: Expecting 41600 events.
[13:33:41.513] <TB0> INFO: 41600 events read in total (3411ms).
[13:33:41.514] <TB0> INFO: Test took 4281ms.
[13:33:41.517] <TB0> INFO: scanning low vcal = 210
[13:33:41.794] <TB0> INFO: Expecting 41600 events.
[13:33:45.841] <TB0> INFO: 41600 events read in total (3456ms).
[13:33:45.842] <TB0> INFO: Test took 4325ms.
[13:33:45.845] <TB0> INFO: scanning low vcal = 220
[13:33:46.122] <TB0> INFO: Expecting 41600 events.
[13:33:50.161] <TB0> INFO: 41600 events read in total (3448ms).
[13:33:50.162] <TB0> INFO: Test took 4317ms.
[13:33:50.164] <TB0> INFO: scanning low vcal = 230
[13:33:50.442] <TB0> INFO: Expecting 41600 events.
[13:33:54.493] <TB0> INFO: 41600 events read in total (3460ms).
[13:33:54.494] <TB0> INFO: Test took 4329ms.
[13:33:54.497] <TB0> INFO: scanning low vcal = 240
[13:33:54.773] <TB0> INFO: Expecting 41600 events.
[13:33:58.772] <TB0> INFO: 41600 events read in total (3407ms).
[13:33:58.772] <TB0> INFO: Test took 4275ms.
[13:33:58.775] <TB0> INFO: scanning low vcal = 250
[13:33:59.052] <TB0> INFO: Expecting 41600 events.
[13:34:03.039] <TB0> INFO: 41600 events read in total (3396ms).
[13:34:03.040] <TB0> INFO: Test took 4264ms.
[13:34:03.044] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[13:34:03.320] <TB0> INFO: Expecting 41600 events.
[13:34:07.394] <TB0> INFO: 41600 events read in total (3482ms).
[13:34:07.395] <TB0> INFO: Test took 4351ms.
[13:34:07.398] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[13:34:07.675] <TB0> INFO: Expecting 41600 events.
[13:34:11.670] <TB0> INFO: 41600 events read in total (3404ms).
[13:34:11.671] <TB0> INFO: Test took 4273ms.
[13:34:11.674] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[13:34:11.951] <TB0> INFO: Expecting 41600 events.
[13:34:16.014] <TB0> INFO: 41600 events read in total (3472ms).
[13:34:16.014] <TB0> INFO: Test took 4340ms.
[13:34:16.017] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[13:34:16.294] <TB0> INFO: Expecting 41600 events.
[13:34:20.340] <TB0> INFO: 41600 events read in total (3455ms).
[13:34:20.341] <TB0> INFO: Test took 4323ms.
[13:34:20.343] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:34:20.620] <TB0> INFO: Expecting 41600 events.
[13:34:24.649] <TB0> INFO: 41600 events read in total (3437ms).
[13:34:24.650] <TB0> INFO: Test took 4307ms.
[13:34:25.064] <TB0> INFO: PixTestGainPedestal::measure() done
[13:34:58.453] <TB0> INFO: PixTestGainPedestal::fit() done
[13:34:58.453] <TB0> INFO: non-linearity mean: 0.951 0.969 0.944 0.925 0.937 0.942 0.955 0.877 0.991 0.930 0.964 0.929 0.935 0.984 0.982 0.929
[13:34:58.453] <TB0> INFO: non-linearity RMS: 0.063 0.020 0.082 0.128 0.080 0.067 0.038 0.117 0.001 0.124 0.038 0.075 0.094 0.003 0.002 0.141
[13:34:58.453] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C0.dat
[13:34:58.466] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C1.dat
[13:34:58.480] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C2.dat
[13:34:58.493] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C3.dat
[13:34:58.506] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C4.dat
[13:34:58.520] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C5.dat
[13:34:58.533] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C6.dat
[13:34:58.546] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C7.dat
[13:34:58.559] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C8.dat
[13:34:58.572] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C9.dat
[13:34:58.585] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C10.dat
[13:34:58.598] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C11.dat
[13:34:58.611] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C12.dat
[13:34:58.624] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C13.dat
[13:34:58.637] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C14.dat
[13:34:58.650] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1028_FullQualification_2016-10-20_09h44m_1476949484//003_Fulltest_p17//phCalibrationFitErr35_C15.dat
[13:34:58.663] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 162 seconds
[13:34:58.663] <TB0> INFO: Decoding statistics:
[13:34:58.663] <TB0> INFO: General information:
[13:34:58.663] <TB0> INFO: 16bit words read: 3304098
[13:34:58.663] <TB0> INFO: valid events total: 332800
[13:34:58.663] <TB0> INFO: empty events: 1409
[13:34:58.663] <TB0> INFO: valid events with pixels: 331391
[13:34:58.663] <TB0> INFO: valid pixel hits: 653649
[13:34:58.663] <TB0> INFO: Event errors: 0
[13:34:58.663] <TB0> INFO: start marker: 0
[13:34:58.663] <TB0> INFO: stop marker: 0
[13:34:58.663] <TB0> INFO: overflow: 0
[13:34:58.663] <TB0> INFO: invalid 5bit words: 0
[13:34:58.663] <TB0> INFO: invalid XOR eye diagram: 0
[13:34:58.663] <TB0> INFO: frame (failed synchr.): 0
[13:34:58.663] <TB0> INFO: idle data (no TBM trl): 0
[13:34:58.663] <TB0> INFO: no data (only TBM hdr): 0
[13:34:58.663] <TB0> INFO: TBM errors: 0
[13:34:58.663] <TB0> INFO: flawed TBM headers: 0
[13:34:58.663] <TB0> INFO: flawed TBM trailers: 0
[13:34:58.663] <TB0> INFO: event ID mismatches: 0
[13:34:58.663] <TB0> INFO: ROC errors: 0
[13:34:58.663] <TB0> INFO: missing ROC header(s): 0
[13:34:58.663] <TB0> INFO: misplaced readback start: 0
[13:34:58.663] <TB0> INFO: Pixel decoding errors: 0
[13:34:58.663] <TB0> INFO: pixel data incomplete: 0
[13:34:58.663] <TB0> INFO: pixel address: 0
[13:34:58.663] <TB0> INFO: pulse height fill bit: 0
[13:34:58.663] <TB0> INFO: buffer corruption: 0
[13:34:58.678] <TB0> INFO: Decoding statistics:
[13:34:58.678] <TB0> INFO: General information:
[13:34:58.678] <TB0> INFO: 16bit words read: 3433542
[13:34:58.678] <TB0> INFO: valid events total: 353536
[13:34:58.678] <TB0> INFO: empty events: 19631
[13:34:58.678] <TB0> INFO: valid events with pixels: 333905
[13:34:58.678] <TB0> INFO: valid pixel hits: 656163
[13:34:58.678] <TB0> INFO: Event errors: 0
[13:34:58.678] <TB0> INFO: start marker: 0
[13:34:58.678] <TB0> INFO: stop marker: 0
[13:34:58.678] <TB0> INFO: overflow: 0
[13:34:58.678] <TB0> INFO: invalid 5bit words: 0
[13:34:58.678] <TB0> INFO: invalid XOR eye diagram: 0
[13:34:58.678] <TB0> INFO: frame (failed synchr.): 0
[13:34:58.678] <TB0> INFO: idle data (no TBM trl): 0
[13:34:58.678] <TB0> INFO: no data (only TBM hdr): 0
[13:34:58.678] <TB0> INFO: TBM errors: 0
[13:34:58.678] <TB0> INFO: flawed TBM headers: 0
[13:34:58.678] <TB0> INFO: flawed TBM trailers: 0
[13:34:58.678] <TB0> INFO: event ID mismatches: 0
[13:34:58.678] <TB0> INFO: ROC errors: 0
[13:34:58.678] <TB0> INFO: missing ROC header(s): 0
[13:34:58.678] <TB0> INFO: misplaced readback start: 0
[13:34:58.678] <TB0> INFO: Pixel decoding errors: 0
[13:34:58.678] <TB0> INFO: pixel data incomplete: 0
[13:34:58.678] <TB0> INFO: pixel address: 0
[13:34:58.678] <TB0> INFO: pulse height fill bit: 0
[13:34:58.678] <TB0> INFO: buffer corruption: 0
[13:34:58.678] <TB0> INFO: enter test to run
[13:34:58.678] <TB0> INFO: test: exit no parameter change
[13:34:58.792] <TB0> QUIET: Connection to board 71 closed.
[13:34:58.792] <TB0> INFO: pXar: this is the end, my friend