[22:23:47.349] <TB2> INFO: *** Welcome to pxar ***
[22:23:47.349] <TB2> INFO: *** Today: 2016/10/19
[22:23:47.355] <TB2> INFO: *** Version: c8ba-dirty
[22:23:47.355] <TB2> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters_C15.dat
[22:23:47.356] <TB2> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//tbmParameters_C1b.dat
[22:23:47.356] <TB2> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//defaultMaskFile.dat
[22:23:47.356] <TB2> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//trimParameters_C15.dat
[22:23:47.419] <TB2> INFO: clk: 4
[22:23:47.419] <TB2> INFO: ctr: 4
[22:23:47.419] <TB2> INFO: sda: 19
[22:23:47.419] <TB2> INFO: tin: 9
[22:23:47.419] <TB2> INFO: level: 15
[22:23:47.419] <TB2> INFO: triggerdelay: 0
[22:23:47.419] <TB2> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[22:23:47.419] <TB2> INFO: Log level: INFO
[22:23:47.427] <TB2> INFO: Found DTB DTB_WWXUD2
[22:23:47.434] <TB2> QUIET: Connection to board DTB_WWXUD2 opened.
[22:23:47.437] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 149
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWXUD2
MAC address: 40D855118095
Hostname: pixelDTB149
Comment:
------------------------------------------------------
[22:23:47.438] <TB2> INFO: RPC call hashes of host and DTB match: 486171790
[22:23:48.935] <TB2> INFO: DUT info:
[22:23:48.935] <TB2> INFO: The DUT currently contains the following objects:
[22:23:48.935] <TB2> INFO: 4 TBM Cores tbm10c (4 ON)
[22:23:48.935] <TB2> INFO: TBM Core alpha (0): 7 registers set
[22:23:48.935] <TB2> INFO: TBM Core beta (1): 7 registers set
[22:23:48.935] <TB2> INFO: TBM Core alpha (2): 7 registers set
[22:23:48.935] <TB2> INFO: TBM Core beta (3): 7 registers set
[22:23:48.935] <TB2> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[22:23:48.935] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[22:23:48.935] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[22:23:48.935] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[22:23:48.935] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[22:23:48.936] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[22:23:48.936] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[22:23:48.936] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[22:23:48.936] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[22:23:48.936] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[22:23:48.936] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[22:23:48.936] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[22:23:48.936] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[22:23:48.936] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[22:23:48.936] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[22:23:48.936] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[22:23:48.936] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[22:23:49.337] <TB2> INFO: enter 'restricted' command line mode
[22:23:49.337] <TB2> INFO: enter test to run
[22:23:49.337] <TB2> INFO: test: pretest no parameter change
[22:23:49.337] <TB2> INFO: running: pretest
[22:23:49.343] <TB2> INFO: ######################################################################
[22:23:49.343] <TB2> INFO: PixTestPretest::doTest()
[22:23:49.343] <TB2> INFO: ######################################################################
[22:23:49.344] <TB2> INFO: ----------------------------------------------------------------------
[22:23:49.344] <TB2> INFO: PixTestPretest::programROC()
[22:23:49.344] <TB2> INFO: ----------------------------------------------------------------------
[22:24:07.360] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[22:24:07.360] <TB2> INFO: IA differences per ROC: 19.3 17.7 17.7 20.9 19.3 20.9 19.3 19.3 17.7 18.5 20.9 18.5 20.1 20.9 19.3 19.3
[22:24:07.427] <TB2> INFO: ----------------------------------------------------------------------
[22:24:07.427] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[22:24:07.427] <TB2> INFO: ----------------------------------------------------------------------
[22:24:14.434] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 393.9 mA = 24.6187 mA/ROC
[22:24:14.434] <TB2> INFO: i(loss) [mA/ROC]: 20.1 20.9 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 19.3 20.1 20.1 20.1
[22:24:14.471] <TB2> INFO: ----------------------------------------------------------------------
[22:24:14.471] <TB2> INFO: PixTestPretest::findTiming()
[22:24:14.471] <TB2> INFO: ----------------------------------------------------------------------
[22:24:14.471] <TB2> INFO: PixTestCmd::init()

[22:24:46.646] <TB2> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[22:24:46.646] <TB2> INFO: (success/tries = 100/100), width = 4
[22:24:48.138] <TB2> INFO: ----------------------------------------------------------------------
[22:24:48.138] <TB2> INFO: PixTestPretest::findWorkingPixel()
[22:24:48.138] <TB2> INFO: ----------------------------------------------------------------------
[22:24:48.234] <TB2> INFO: Expecting 231680 events.
[22:24:58.146] <TB2> INFO: 231680 events read in total (9320ms).
[22:24:58.156] <TB2> INFO: Test took 10013ms.
[22:24:58.402] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[22:24:58.436] <TB2> INFO: ----------------------------------------------------------------------
[22:24:58.436] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[22:24:58.436] <TB2> INFO: ----------------------------------------------------------------------
[22:24:58.533] <TB2> INFO: Expecting 231680 events.
[22:25:08.469] <TB2> INFO: 231680 events read in total (9345ms).
[22:25:08.481] <TB2> INFO: Test took 10038ms.
[22:25:08.732] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[22:25:08.732] <TB2> INFO: CalDel: 100 91 94 98 97 93 96 87 111 100 88 82 96 109 83 92
[22:25:08.732] <TB2> INFO: VthrComp: 51 53 51 51 52 53 51 51 51 51 51 51 51 51 51 51
[22:25:08.734] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters_C0.dat
[22:25:08.734] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters_C1.dat
[22:25:08.734] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters_C2.dat
[22:25:08.735] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters_C3.dat
[22:25:08.735] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters_C4.dat
[22:25:08.735] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters_C5.dat
[22:25:08.735] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters_C6.dat
[22:25:08.735] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters_C7.dat
[22:25:08.735] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters_C8.dat
[22:25:08.735] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters_C9.dat
[22:25:08.735] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters_C10.dat
[22:25:08.735] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters_C11.dat
[22:25:08.735] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters_C12.dat
[22:25:08.736] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters_C13.dat
[22:25:08.736] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters_C14.dat
[22:25:08.736] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters_C15.dat
[22:25:08.736] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//tbmParameters_C0a.dat
[22:25:08.736] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//tbmParameters_C0b.dat
[22:25:08.736] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//tbmParameters_C1a.dat
[22:25:08.736] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//tbmParameters_C1b.dat
[22:25:08.736] <TB2> INFO: PixTestPretest::doTest() done, duration: 79 seconds
[22:25:08.792] <TB2> INFO: enter test to run
[22:25:08.792] <TB2> INFO: test: FullTest no parameter change
[22:25:08.792] <TB2> INFO: running: fulltest
[22:25:08.792] <TB2> INFO: ######################################################################
[22:25:08.792] <TB2> INFO: PixTestFullTest::doTest()
[22:25:08.792] <TB2> INFO: ######################################################################
[22:25:08.794] <TB2> INFO: ######################################################################
[22:25:08.794] <TB2> INFO: PixTestAlive::doTest()
[22:25:08.794] <TB2> INFO: ######################################################################
[22:25:08.795] <TB2> INFO: ----------------------------------------------------------------------
[22:25:08.795] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[22:25:08.795] <TB2> INFO: ----------------------------------------------------------------------
[22:25:09.079] <TB2> INFO: Expecting 41600 events.
[22:25:12.599] <TB2> INFO: 41600 events read in total (2928ms).
[22:25:12.600] <TB2> INFO: Test took 3803ms.
[22:25:12.835] <TB2> INFO: PixTestAlive::aliveTest() done
[22:25:12.835] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[22:25:12.837] <TB2> INFO: ----------------------------------------------------------------------
[22:25:12.837] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[22:25:12.837] <TB2> INFO: ----------------------------------------------------------------------
[22:25:13.081] <TB2> INFO: Expecting 41600 events.
[22:25:16.194] <TB2> INFO: 41600 events read in total (2521ms).
[22:25:16.194] <TB2> INFO: Test took 3355ms.
[22:25:16.195] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[22:25:16.437] <TB2> INFO: PixTestAlive::maskTest() done
[22:25:16.437] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[22:25:16.438] <TB2> INFO: ----------------------------------------------------------------------
[22:25:16.438] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[22:25:16.438] <TB2> INFO: ----------------------------------------------------------------------
[22:25:16.679] <TB2> INFO: Expecting 41600 events.
[22:25:20.206] <TB2> INFO: 41600 events read in total (2936ms).
[22:25:20.206] <TB2> INFO: Test took 3766ms.
[22:25:20.441] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[22:25:20.441] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[22:25:20.441] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[22:25:20.441] <TB2> INFO: Decoding statistics:
[22:25:20.441] <TB2> INFO: General information:
[22:25:20.441] <TB2> INFO: 16bit words read: 0
[22:25:20.441] <TB2> INFO: valid events total: 0
[22:25:20.441] <TB2> INFO: empty events: 0
[22:25:20.441] <TB2> INFO: valid events with pixels: 0
[22:25:20.441] <TB2> INFO: valid pixel hits: 0
[22:25:20.441] <TB2> INFO: Event errors: 0
[22:25:20.441] <TB2> INFO: start marker: 0
[22:25:20.441] <TB2> INFO: stop marker: 0
[22:25:20.441] <TB2> INFO: overflow: 0
[22:25:20.441] <TB2> INFO: invalid 5bit words: 0
[22:25:20.441] <TB2> INFO: invalid XOR eye diagram: 0
[22:25:20.441] <TB2> INFO: frame (failed synchr.): 0
[22:25:20.441] <TB2> INFO: idle data (no TBM trl): 0
[22:25:20.441] <TB2> INFO: no data (only TBM hdr): 0
[22:25:20.441] <TB2> INFO: TBM errors: 0
[22:25:20.441] <TB2> INFO: flawed TBM headers: 0
[22:25:20.442] <TB2> INFO: flawed TBM trailers: 0
[22:25:20.442] <TB2> INFO: event ID mismatches: 0
[22:25:20.442] <TB2> INFO: ROC errors: 0
[22:25:20.442] <TB2> INFO: missing ROC header(s): 0
[22:25:20.442] <TB2> INFO: misplaced readback start: 0
[22:25:20.442] <TB2> INFO: Pixel decoding errors: 0
[22:25:20.442] <TB2> INFO: pixel data incomplete: 0
[22:25:20.442] <TB2> INFO: pixel address: 0
[22:25:20.442] <TB2> INFO: pulse height fill bit: 0
[22:25:20.442] <TB2> INFO: buffer corruption: 0
[22:25:20.449] <TB2> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C15.dat
[22:25:20.449] <TB2> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//phCalibrationFitErr_C15.dat

[22:25:20.450] <TB2> INFO: ######################################################################
[22:25:20.450] <TB2> INFO: PixTestReadback::doTest()
[22:25:20.450] <TB2> INFO: ######################################################################
[22:25:20.450] <TB2> INFO: ----------------------------------------------------------------------
[22:25:20.450] <TB2> INFO: PixTestReadback::CalibrateVd()
[22:25:20.450] <TB2> INFO: ----------------------------------------------------------------------
[22:25:30.415] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C0.dat
[22:25:30.415] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C1.dat
[22:25:30.415] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C2.dat
[22:25:30.415] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C3.dat
[22:25:30.415] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C4.dat
[22:25:30.415] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C5.dat
[22:25:30.415] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C6.dat
[22:25:30.415] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C7.dat
[22:25:30.415] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C8.dat
[22:25:30.415] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C9.dat
[22:25:30.415] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C10.dat
[22:25:30.415] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C11.dat
[22:25:30.415] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C12.dat
[22:25:30.416] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C13.dat
[22:25:30.416] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C14.dat
[22:25:30.416] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C15.dat
[22:25:30.448] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[22:25:30.448] <TB2> INFO: ----------------------------------------------------------------------
[22:25:30.448] <TB2> INFO: PixTestReadback::CalibrateVa()
[22:25:30.448] <TB2> INFO: ----------------------------------------------------------------------
[22:25:40.391] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C0.dat
[22:25:40.391] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C1.dat
[22:25:40.391] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C2.dat
[22:25:40.391] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C3.dat
[22:25:40.391] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C4.dat
[22:25:40.391] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C5.dat
[22:25:40.391] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C6.dat
[22:25:40.391] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C7.dat
[22:25:40.391] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C8.dat
[22:25:40.391] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C9.dat
[22:25:40.391] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C10.dat
[22:25:40.391] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C11.dat
[22:25:40.391] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C12.dat
[22:25:40.391] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C13.dat
[22:25:40.391] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C14.dat
[22:25:40.392] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C15.dat
[22:25:40.420] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[22:25:40.420] <TB2> INFO: ----------------------------------------------------------------------
[22:25:40.420] <TB2> INFO: PixTestReadback::readbackVbg()
[22:25:40.420] <TB2> INFO: ----------------------------------------------------------------------
[22:25:48.097] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[22:25:48.098] <TB2> INFO: ----------------------------------------------------------------------
[22:25:48.098] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[22:25:48.098] <TB2> INFO: ----------------------------------------------------------------------
[22:25:48.098] <TB2> INFO: Vbg will be calibrated using Vd calibration
[22:25:48.098] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 153.1calibrated Vbg = 1.19986 :::*/*/*/*/
[22:25:48.098] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 149.7calibrated Vbg = 1.19457 :::*/*/*/*/
[22:25:48.098] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 154.6calibrated Vbg = 1.19444 :::*/*/*/*/
[22:25:48.098] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 158calibrated Vbg = 1.19051 :::*/*/*/*/
[22:25:48.098] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 154.2calibrated Vbg = 1.19461 :::*/*/*/*/
[22:25:48.098] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 164.5calibrated Vbg = 1.20092 :::*/*/*/*/
[22:25:48.098] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 160.3calibrated Vbg = 1.19634 :::*/*/*/*/
[22:25:48.098] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 157.1calibrated Vbg = 1.20108 :::*/*/*/*/
[22:25:48.098] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 151.6calibrated Vbg = 1.19698 :::*/*/*/*/
[22:25:48.098] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 147.2calibrated Vbg = 1.19164 :::*/*/*/*/
[22:25:48.098] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 146.1calibrated Vbg = 1.1883 :::*/*/*/*/
[22:25:48.098] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 154.2calibrated Vbg = 1.18334 :::*/*/*/*/
[22:25:48.098] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 164.2calibrated Vbg = 1.19316 :::*/*/*/*/
[22:25:48.098] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 157.7calibrated Vbg = 1.20388 :::*/*/*/*/
[22:25:48.098] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 156.7calibrated Vbg = 1.19679 :::*/*/*/*/
[22:25:48.098] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 154.5calibrated Vbg = 1.19847 :::*/*/*/*/
[22:25:48.102] <TB2> INFO: ----------------------------------------------------------------------
[22:25:48.102] <TB2> INFO: PixTestReadback::CalibrateIa()
[22:25:48.102] <TB2> INFO: ----------------------------------------------------------------------
[22:28:28.953] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C0.dat
[22:28:28.953] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C1.dat
[22:28:28.954] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C2.dat
[22:28:28.954] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C3.dat
[22:28:28.954] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C4.dat
[22:28:28.954] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C5.dat
[22:28:28.954] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C6.dat
[22:28:28.954] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C7.dat
[22:28:28.954] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C8.dat
[22:28:28.954] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C9.dat
[22:28:28.954] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C10.dat
[22:28:28.954] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C11.dat
[22:28:28.954] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C12.dat
[22:28:28.954] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C13.dat
[22:28:28.954] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C14.dat
[22:28:28.954] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//readbackCal_C15.dat
[22:28:28.984] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[22:28:28.986] <TB2> INFO: PixTestReadback::doTest() done
[22:28:28.986] <TB2> INFO: Decoding statistics:
[22:28:28.986] <TB2> INFO: General information:
[22:28:28.986] <TB2> INFO: 16bit words read: 1536
[22:28:28.986] <TB2> INFO: valid events total: 256
[22:28:28.986] <TB2> INFO: empty events: 256
[22:28:28.986] <TB2> INFO: valid events with pixels: 0
[22:28:28.986] <TB2> INFO: valid pixel hits: 0
[22:28:28.986] <TB2> INFO: Event errors: 0
[22:28:28.986] <TB2> INFO: start marker: 0
[22:28:28.986] <TB2> INFO: stop marker: 0
[22:28:28.986] <TB2> INFO: overflow: 0
[22:28:28.986] <TB2> INFO: invalid 5bit words: 0
[22:28:28.986] <TB2> INFO: invalid XOR eye diagram: 0
[22:28:28.986] <TB2> INFO: frame (failed synchr.): 0
[22:28:28.986] <TB2> INFO: idle data (no TBM trl): 0
[22:28:28.986] <TB2> INFO: no data (only TBM hdr): 0
[22:28:28.986] <TB2> INFO: TBM errors: 0
[22:28:28.986] <TB2> INFO: flawed TBM headers: 0
[22:28:28.986] <TB2> INFO: flawed TBM trailers: 0
[22:28:28.986] <TB2> INFO: event ID mismatches: 0
[22:28:28.986] <TB2> INFO: ROC errors: 0
[22:28:28.986] <TB2> INFO: missing ROC header(s): 0
[22:28:28.986] <TB2> INFO: misplaced readback start: 0
[22:28:28.986] <TB2> INFO: Pixel decoding errors: 0
[22:28:28.986] <TB2> INFO: pixel data incomplete: 0
[22:28:28.986] <TB2> INFO: pixel address: 0
[22:28:28.986] <TB2> INFO: pulse height fill bit: 0
[22:28:28.986] <TB2> INFO: buffer corruption: 0
[22:28:29.039] <TB2> INFO: ######################################################################
[22:28:29.039] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[22:28:29.039] <TB2> INFO: ######################################################################
[22:28:29.042] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[22:28:29.057] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[22:28:29.057] <TB2> INFO: run 1 of 1
[22:28:29.340] <TB2> INFO: Expecting 3120000 events.
[22:29:01.210] <TB2> INFO: 676160 events read in total (31278ms).











[22:29:32.366] <TB2> INFO: 1348700 events read in total (62434ms).











[22:30:03.479] <TB2> INFO: 2017270 events read in total (93547ms).











[22:30:34.407] <TB2> INFO: 2682110 events read in total (124475ms).





















[22:30:54.510] <TB2> INFO: 3120000 events read in total (144578ms).
[22:30:54.586] <TB2> INFO: Test took 145529ms.
[22:31:21.252] <TB2> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 172 seconds
[22:31:21.252] <TB2> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[22:31:21.252] <TB2> INFO: separation cut (per ROC): 120 113 119 125 117 123 102 129 104 103 106 110 118 125 108 106
[22:31:21.252] <TB2> INFO: Decoding statistics:
[22:31:21.252] <TB2> INFO: General information:
[22:31:21.252] <TB2> INFO: 16bit words read: 0
[22:31:21.252] <TB2> INFO: valid events total: 0
[22:31:21.252] <TB2> INFO: empty events: 0
[22:31:21.252] <TB2> INFO: valid events with pixels: 0
[22:31:21.252] <TB2> INFO: valid pixel hits: 0
[22:31:21.252] <TB2> INFO: Event errors: 0
[22:31:21.252] <TB2> INFO: start marker: 0
[22:31:21.252] <TB2> INFO: stop marker: 0
[22:31:21.252] <TB2> INFO: overflow: 0
[22:31:21.252] <TB2> INFO: invalid 5bit words: 0
[22:31:21.252] <TB2> INFO: invalid XOR eye diagram: 0
[22:31:21.252] <TB2> INFO: frame (failed synchr.): 0
[22:31:21.252] <TB2> INFO: idle data (no TBM trl): 0
[22:31:21.252] <TB2> INFO: no data (only TBM hdr): 0
[22:31:21.252] <TB2> INFO: TBM errors: 0
[22:31:21.253] <TB2> INFO: flawed TBM headers: 0
[22:31:21.253] <TB2> INFO: flawed TBM trailers: 0
[22:31:21.253] <TB2> INFO: event ID mismatches: 0
[22:31:21.253] <TB2> INFO: ROC errors: 0
[22:31:21.253] <TB2> INFO: missing ROC header(s): 0
[22:31:21.253] <TB2> INFO: misplaced readback start: 0
[22:31:21.253] <TB2> INFO: Pixel decoding errors: 0
[22:31:21.253] <TB2> INFO: pixel data incomplete: 0
[22:31:21.253] <TB2> INFO: pixel address: 0
[22:31:21.253] <TB2> INFO: pulse height fill bit: 0
[22:31:21.253] <TB2> INFO: buffer corruption: 0
[22:31:21.300] <TB2> INFO: ######################################################################
[22:31:21.300] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[22:31:21.300] <TB2> INFO: ######################################################################
[22:31:21.300] <TB2> INFO: ----------------------------------------------------------------------
[22:31:21.300] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[22:31:21.300] <TB2> INFO: ----------------------------------------------------------------------
[22:31:21.300] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[22:31:21.314] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[22:31:21.314] <TB2> INFO: run 1 of 1
[22:31:21.590] <TB2> INFO: Expecting 36608000 events.
[22:31:46.196] <TB2> INFO: 703200 events read in total (24015ms).
[22:32:09.779] <TB2> INFO: 1390350 events read in total (47598ms).
[22:32:32.925] <TB2> INFO: 2073700 events read in total (70744ms).
[22:32:56.634] <TB2> INFO: 2756800 events read in total (94453ms).
[22:33:19.788] <TB2> INFO: 3440550 events read in total (117607ms).
[22:33:43.381] <TB2> INFO: 4125750 events read in total (141200ms).
[22:34:06.597] <TB2> INFO: 4807850 events read in total (164416ms).
[22:34:29.743] <TB2> INFO: 5488200 events read in total (187562ms).
[22:34:52.938] <TB2> INFO: 6167650 events read in total (210757ms).
[22:35:16.368] <TB2> INFO: 6851350 events read in total (234187ms).
[22:35:39.881] <TB2> INFO: 7532150 events read in total (257700ms).
[22:36:03.335] <TB2> INFO: 8215700 events read in total (281154ms).
[22:36:26.859] <TB2> INFO: 8897200 events read in total (304678ms).
[22:36:50.385] <TB2> INFO: 9578350 events read in total (328204ms).
[22:37:13.791] <TB2> INFO: 10259700 events read in total (351610ms).
[22:37:37.342] <TB2> INFO: 10939250 events read in total (375161ms).
[22:38:00.982] <TB2> INFO: 11620400 events read in total (398801ms).
[22:38:24.557] <TB2> INFO: 12301000 events read in total (422376ms).
[22:38:48.202] <TB2> INFO: 12981050 events read in total (446022ms).
[22:39:11.766] <TB2> INFO: 13662200 events read in total (469585ms).
[22:39:35.562] <TB2> INFO: 14341500 events read in total (493381ms).
[22:39:58.796] <TB2> INFO: 15019750 events read in total (516615ms).
[22:40:22.425] <TB2> INFO: 15696150 events read in total (540244ms).
[22:40:45.773] <TB2> INFO: 16373400 events read in total (563592ms).
[22:41:09.271] <TB2> INFO: 17051650 events read in total (587090ms).
[22:41:32.668] <TB2> INFO: 17727950 events read in total (610487ms).
[22:41:55.922] <TB2> INFO: 18400600 events read in total (633741ms).
[22:42:19.350] <TB2> INFO: 19076450 events read in total (657169ms).
[22:42:42.608] <TB2> INFO: 19752050 events read in total (680427ms).
[22:43:06.148] <TB2> INFO: 20424350 events read in total (703967ms).
[22:43:29.606] <TB2> INFO: 21098550 events read in total (727425ms).
[22:43:52.746] <TB2> INFO: 21769850 events read in total (750565ms).
[22:44:16.020] <TB2> INFO: 22441550 events read in total (773839ms).
[22:44:39.264] <TB2> INFO: 23114500 events read in total (797083ms).
[22:45:02.521] <TB2> INFO: 23785650 events read in total (820340ms).
[22:45:25.628] <TB2> INFO: 24457350 events read in total (843447ms).
[22:45:49.314] <TB2> INFO: 25130050 events read in total (867133ms).
[22:46:12.563] <TB2> INFO: 25801250 events read in total (890382ms).
[22:46:35.837] <TB2> INFO: 26471750 events read in total (913656ms).
[22:46:58.993] <TB2> INFO: 27144600 events read in total (936812ms).
[22:47:22.313] <TB2> INFO: 27816500 events read in total (960132ms).
[22:47:45.520] <TB2> INFO: 28488350 events read in total (983339ms).
[22:48:08.914] <TB2> INFO: 29159450 events read in total (1006733ms).
[22:48:32.092] <TB2> INFO: 29830100 events read in total (1029911ms).
[22:48:55.224] <TB2> INFO: 30500400 events read in total (1053043ms).
[22:49:18.430] <TB2> INFO: 31171700 events read in total (1076249ms).
[22:49:41.879] <TB2> INFO: 31843800 events read in total (1099698ms).
[22:50:05.425] <TB2> INFO: 32514800 events read in total (1123244ms).
[22:50:28.590] <TB2> INFO: 33186050 events read in total (1146409ms).
[22:50:52.204] <TB2> INFO: 33859500 events read in total (1170023ms).
[22:51:15.701] <TB2> INFO: 34530600 events read in total (1193520ms).
[22:51:38.772] <TB2> INFO: 35201800 events read in total (1216591ms).
[22:52:02.120] <TB2> INFO: 35875450 events read in total (1239939ms).
[22:52:25.482] <TB2> INFO: 36562350 events read in total (1263301ms).
[22:52:27.319] <TB2> INFO: 36608000 events read in total (1265138ms).
[22:52:27.380] <TB2> INFO: Test took 1266066ms.
[22:52:27.863] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:52:29.513] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:52:31.020] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:52:32.794] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:52:34.363] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:52:36.102] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:52:38.048] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:52:39.956] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:52:41.858] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:52:43.881] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:52:45.610] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:52:47.472] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:52:49.133] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:52:51.025] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:52:53.249] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:52:55.629] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:52:58.050] <TB2> INFO: PixTestScurves::scurves() done
[22:52:58.050] <TB2> INFO: Vcal mean: 126.38 124.85 114.31 127.41 132.09 126.29 111.96 128.72 124.18 116.58 116.37 121.23 125.86 130.13 123.44 122.61
[22:52:58.050] <TB2> INFO: Vcal RMS: 6.95 6.01 5.37 6.07 6.13 5.97 4.56 6.11 6.05 5.59 5.51 5.72 6.45 6.47 5.61 5.81
[22:52:58.050] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1296 seconds
[22:52:58.050] <TB2> INFO: Decoding statistics:
[22:52:58.050] <TB2> INFO: General information:
[22:52:58.050] <TB2> INFO: 16bit words read: 0
[22:52:58.050] <TB2> INFO: valid events total: 0
[22:52:58.050] <TB2> INFO: empty events: 0
[22:52:58.050] <TB2> INFO: valid events with pixels: 0
[22:52:58.050] <TB2> INFO: valid pixel hits: 0
[22:52:58.050] <TB2> INFO: Event errors: 0
[22:52:58.050] <TB2> INFO: start marker: 0
[22:52:58.050] <TB2> INFO: stop marker: 0
[22:52:58.050] <TB2> INFO: overflow: 0
[22:52:58.050] <TB2> INFO: invalid 5bit words: 0
[22:52:58.050] <TB2> INFO: invalid XOR eye diagram: 0
[22:52:58.050] <TB2> INFO: frame (failed synchr.): 0
[22:52:58.050] <TB2> INFO: idle data (no TBM trl): 0
[22:52:58.050] <TB2> INFO: no data (only TBM hdr): 0
[22:52:58.050] <TB2> INFO: TBM errors: 0
[22:52:58.050] <TB2> INFO: flawed TBM headers: 0
[22:52:58.050] <TB2> INFO: flawed TBM trailers: 0
[22:52:58.050] <TB2> INFO: event ID mismatches: 0
[22:52:58.050] <TB2> INFO: ROC errors: 0
[22:52:58.050] <TB2> INFO: missing ROC header(s): 0
[22:52:58.050] <TB2> INFO: misplaced readback start: 0
[22:52:58.050] <TB2> INFO: Pixel decoding errors: 0
[22:52:58.050] <TB2> INFO: pixel data incomplete: 0
[22:52:58.050] <TB2> INFO: pixel address: 0
[22:52:58.050] <TB2> INFO: pulse height fill bit: 0
[22:52:58.050] <TB2> INFO: buffer corruption: 0
[22:52:58.142] <TB2> INFO: ######################################################################
[22:52:58.142] <TB2> INFO: PixTestTrim::doTest()
[22:52:58.142] <TB2> INFO: ######################################################################
[22:52:58.143] <TB2> INFO: ----------------------------------------------------------------------
[22:52:58.143] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[22:52:58.143] <TB2> INFO: ----------------------------------------------------------------------
[22:52:58.212] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[22:52:58.212] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[22:52:58.226] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[22:52:58.226] <TB2> INFO: run 1 of 1
[22:52:58.551] <TB2> INFO: Expecting 5025280 events.
[22:53:30.542] <TB2> INFO: 833720 events read in total (31394ms).
[22:54:01.530] <TB2> INFO: 1665048 events read in total (62382ms).
[22:54:32.267] <TB2> INFO: 2493776 events read in total (93120ms).
[22:55:02.951] <TB2> INFO: 3317216 events read in total (123803ms).
[22:55:33.618] <TB2> INFO: 4136392 events read in total (154470ms).
[22:56:03.534] <TB2> INFO: 4954632 events read in total (184386ms).
[22:56:06.631] <TB2> INFO: 5025280 events read in total (187483ms).
[22:56:06.678] <TB2> INFO: Test took 188451ms.
[22:56:22.586] <TB2> INFO: ROC 0 VthrComp = 127
[22:56:22.587] <TB2> INFO: ROC 1 VthrComp = 130
[22:56:22.587] <TB2> INFO: ROC 2 VthrComp = 119
[22:56:22.587] <TB2> INFO: ROC 3 VthrComp = 133
[22:56:22.587] <TB2> INFO: ROC 4 VthrComp = 132
[22:56:22.587] <TB2> INFO: ROC 5 VthrComp = 134
[22:56:22.588] <TB2> INFO: ROC 6 VthrComp = 119
[22:56:22.588] <TB2> INFO: ROC 7 VthrComp = 132
[22:56:22.588] <TB2> INFO: ROC 8 VthrComp = 126
[22:56:22.588] <TB2> INFO: ROC 9 VthrComp = 120
[22:56:22.588] <TB2> INFO: ROC 10 VthrComp = 126
[22:56:22.589] <TB2> INFO: ROC 11 VthrComp = 125
[22:56:22.589] <TB2> INFO: ROC 12 VthrComp = 128
[22:56:22.589] <TB2> INFO: ROC 13 VthrComp = 131
[22:56:22.589] <TB2> INFO: ROC 14 VthrComp = 130
[22:56:22.589] <TB2> INFO: ROC 15 VthrComp = 129
[22:56:22.849] <TB2> INFO: Expecting 41600 events.
[22:56:26.422] <TB2> INFO: 41600 events read in total (2982ms).
[22:56:26.422] <TB2> INFO: Test took 3832ms.
[22:56:26.431] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[22:56:26.431] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[22:56:26.443] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[22:56:26.443] <TB2> INFO: run 1 of 1
[22:56:26.721] <TB2> INFO: Expecting 5025280 events.
[22:56:53.179] <TB2> INFO: 590848 events read in total (25866ms).
[22:57:18.998] <TB2> INFO: 1181008 events read in total (51685ms).
[22:57:45.404] <TB2> INFO: 1770304 events read in total (78091ms).
[22:58:11.561] <TB2> INFO: 2358928 events read in total (104248ms).
[22:58:37.438] <TB2> INFO: 2945176 events read in total (130125ms).
[22:59:03.297] <TB2> INFO: 3530408 events read in total (155984ms).
[22:59:29.518] <TB2> INFO: 4115160 events read in total (182205ms).
[22:59:55.443] <TB2> INFO: 4698704 events read in total (208130ms).
[23:00:10.024] <TB2> INFO: 5025280 events read in total (222711ms).
[23:00:10.094] <TB2> INFO: Test took 223651ms.
[23:00:37.630] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 60.4426 for pixel 0/10 mean/min/max = 46.2644/32.0578/60.471
[23:00:37.630] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 59.2334 for pixel 28/0 mean/min/max = 45.6555/31.9614/59.3495
[23:00:37.631] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 57.5203 for pixel 12/2 mean/min/max = 44.8633/32.0097/57.7169
[23:00:37.631] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 58.7708 for pixel 18/24 mean/min/max = 45.4792/32.08/58.8783
[23:00:37.632] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 61.2635 for pixel 14/20 mean/min/max = 47.1279/32.8059/61.4499
[23:00:37.632] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 58.7919 for pixel 0/61 mean/min/max = 45.3687/31.4196/59.3179
[23:00:37.633] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 57.3667 for pixel 7/9 mean/min/max = 44.7958/32.1939/57.3978
[23:00:37.633] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 58.9251 for pixel 51/9 mean/min/max = 46.2787/33.1656/59.3917
[23:00:37.634] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 59.6313 for pixel 0/15 mean/min/max = 45.9918/32.1796/59.8041
[23:00:37.634] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 59.6922 for pixel 5/77 mean/min/max = 46.5735/33.3759/59.771
[23:00:37.635] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 58.6165 for pixel 24/2 mean/min/max = 45.2457/31.8239/58.6675
[23:00:37.635] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 59.4506 for pixel 5/11 mean/min/max = 46.0252/32.5854/59.4649
[23:00:37.635] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 59.9783 for pixel 31/1 mean/min/max = 46.2712/32.5334/60.009
[23:00:37.636] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 59.8337 for pixel 16/4 mean/min/max = 46.4774/33.1076/59.8471
[23:00:37.636] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 59.5308 for pixel 37/1 mean/min/max = 46.453/33.3393/59.5668
[23:00:37.636] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 58.2719 for pixel 6/37 mean/min/max = 44.8559/31.2342/58.4776
[23:00:37.637] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:00:37.726] <TB2> INFO: Expecting 411648 events.
[23:00:46.946] <TB2> INFO: 411648 events read in total (8629ms).
[23:00:46.955] <TB2> INFO: Expecting 411648 events.
[23:00:56.270] <TB2> INFO: 411648 events read in total (8912ms).
[23:00:56.281] <TB2> INFO: Expecting 411648 events.
[23:01:05.603] <TB2> INFO: 411648 events read in total (8919ms).
[23:01:05.618] <TB2> INFO: Expecting 411648 events.
[23:01:14.913] <TB2> INFO: 411648 events read in total (8892ms).
[23:01:14.928] <TB2> INFO: Expecting 411648 events.
[23:01:24.206] <TB2> INFO: 411648 events read in total (8875ms).
[23:01:24.230] <TB2> INFO: Expecting 411648 events.
[23:01:33.612] <TB2> INFO: 411648 events read in total (8979ms).
[23:01:33.644] <TB2> INFO: Expecting 411648 events.
[23:01:42.982] <TB2> INFO: 411648 events read in total (8935ms).
[23:01:43.014] <TB2> INFO: Expecting 411648 events.
[23:01:52.266] <TB2> INFO: 411648 events read in total (8849ms).
[23:01:52.308] <TB2> INFO: Expecting 411648 events.
[23:02:01.573] <TB2> INFO: 411648 events read in total (8862ms).
[23:02:01.611] <TB2> INFO: Expecting 411648 events.
[23:02:10.863] <TB2> INFO: 411648 events read in total (8849ms).
[23:02:10.913] <TB2> INFO: Expecting 411648 events.
[23:02:20.223] <TB2> INFO: 411648 events read in total (8907ms).
[23:02:20.273] <TB2> INFO: Expecting 411648 events.
[23:02:29.701] <TB2> INFO: 411648 events read in total (9025ms).
[23:02:29.756] <TB2> INFO: Expecting 411648 events.
[23:02:38.927] <TB2> INFO: 411648 events read in total (8768ms).
[23:02:38.974] <TB2> INFO: Expecting 411648 events.
[23:02:48.185] <TB2> INFO: 411648 events read in total (8808ms).
[23:02:48.228] <TB2> INFO: Expecting 411648 events.
[23:02:57.803] <TB2> INFO: 411648 events read in total (9172ms).
[23:02:57.862] <TB2> INFO: Expecting 411648 events.
[23:03:06.974] <TB2> INFO: 411648 events read in total (8709ms).
[23:03:07.023] <TB2> INFO: Test took 149386ms.
[23:03:07.827] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[23:03:07.840] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:03:07.840] <TB2> INFO: run 1 of 1
[23:03:08.139] <TB2> INFO: Expecting 5025280 events.
[23:03:35.128] <TB2> INFO: 586856 events read in total (26393ms).
[23:04:01.462] <TB2> INFO: 1173608 events read in total (52727ms).
[23:04:28.097] <TB2> INFO: 1758344 events read in total (79362ms).
[23:04:54.667] <TB2> INFO: 2343888 events read in total (105932ms).
[23:05:20.876] <TB2> INFO: 2928064 events read in total (132141ms).
[23:05:47.128] <TB2> INFO: 3514840 events read in total (158393ms).
[23:06:13.527] <TB2> INFO: 4100488 events read in total (184792ms).
[23:06:39.910] <TB2> INFO: 4685832 events read in total (211175ms).
[23:06:55.517] <TB2> INFO: 5025280 events read in total (226782ms).
[23:06:55.640] <TB2> INFO: Test took 227801ms.
[23:07:17.461] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 11.678755 .. 147.160517
[23:07:17.702] <TB2> INFO: Expecting 208000 events.
[23:07:27.338] <TB2> INFO: 208000 events read in total (9044ms).
[23:07:27.340] <TB2> INFO: Test took 9877ms.
[23:07:27.419] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 157 (-1/-1) hits flags = 528 (plus default)
[23:07:27.438] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:07:27.438] <TB2> INFO: run 1 of 1
[23:07:27.764] <TB2> INFO: Expecting 5224960 events.
[23:07:53.754] <TB2> INFO: 583544 events read in total (25398ms).
[23:08:19.893] <TB2> INFO: 1167280 events read in total (51537ms).
[23:08:46.063] <TB2> INFO: 1751280 events read in total (77707ms).
[23:09:12.112] <TB2> INFO: 2335016 events read in total (103756ms).
[23:09:38.193] <TB2> INFO: 2918624 events read in total (129837ms).
[23:10:04.081] <TB2> INFO: 3501664 events read in total (155725ms).
[23:10:30.194] <TB2> INFO: 4084376 events read in total (181839ms).
[23:10:56.697] <TB2> INFO: 4666760 events read in total (208341ms).
[23:11:21.564] <TB2> INFO: 5224960 events read in total (233208ms).
[23:11:21.737] <TB2> INFO: Test took 234299ms.
[23:11:48.443] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 28.158785 .. 44.755065
[23:11:48.696] <TB2> INFO: Expecting 208000 events.
[23:11:58.745] <TB2> INFO: 208000 events read in total (9457ms).
[23:11:58.746] <TB2> INFO: Test took 10301ms.
[23:11:58.795] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 18 .. 54 (-1/-1) hits flags = 528 (plus default)
[23:11:58.808] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:11:58.808] <TB2> INFO: run 1 of 1
[23:11:59.086] <TB2> INFO: Expecting 1231360 events.
[23:12:27.784] <TB2> INFO: 660072 events read in total (28106ms).
[23:12:51.928] <TB2> INFO: 1231360 events read in total (52250ms).
[23:12:51.959] <TB2> INFO: Test took 53152ms.
[23:13:05.551] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 26.905843 .. 45.708776
[23:13:05.825] <TB2> INFO: Expecting 208000 events.
[23:13:15.897] <TB2> INFO: 208000 events read in total (9480ms).
[23:13:15.897] <TB2> INFO: Test took 10345ms.
[23:13:15.948] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 16 .. 55 (-1/-1) hits flags = 528 (plus default)
[23:13:15.961] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:13:15.961] <TB2> INFO: run 1 of 1
[23:13:16.286] <TB2> INFO: Expecting 1331200 events.
[23:13:44.719] <TB2> INFO: 664960 events read in total (27841ms).
[23:14:13.073] <TB2> INFO: 1328128 events read in total (56195ms).
[23:14:13.651] <TB2> INFO: 1331200 events read in total (56773ms).
[23:14:13.679] <TB2> INFO: Test took 57717ms.
[23:14:27.279] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 26.451964 .. 43.328205
[23:14:27.525] <TB2> INFO: Expecting 208000 events.
[23:14:37.440] <TB2> INFO: 208000 events read in total (9323ms).
[23:14:37.441] <TB2> INFO: Test took 10161ms.
[23:14:37.515] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 16 .. 53 (-1/-1) hits flags = 528 (plus default)
[23:14:37.532] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:14:37.532] <TB2> INFO: run 1 of 1
[23:14:37.817] <TB2> INFO: Expecting 1264640 events.
[23:15:07.707] <TB2> INFO: 672960 events read in total (29299ms).
[23:15:33.022] <TB2> INFO: 1264640 events read in total (54614ms).
[23:15:33.060] <TB2> INFO: Test took 55529ms.
[23:15:47.082] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[23:15:47.082] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[23:15:47.095] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:15:47.095] <TB2> INFO: run 1 of 1
[23:15:47.334] <TB2> INFO: Expecting 1364480 events.
[23:16:16.688] <TB2> INFO: 667656 events read in total (28763ms).
[23:16:44.459] <TB2> INFO: 1334408 events read in total (56534ms).
[23:16:46.182] <TB2> INFO: 1364480 events read in total (58257ms).
[23:16:46.210] <TB2> INFO: Test took 59114ms.
[23:17:01.544] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C0.dat
[23:17:01.545] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C1.dat
[23:17:01.545] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C2.dat
[23:17:01.545] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C3.dat
[23:17:01.545] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C4.dat
[23:17:01.545] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C5.dat
[23:17:01.545] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C6.dat
[23:17:01.545] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C7.dat
[23:17:01.545] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C8.dat
[23:17:01.545] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C9.dat
[23:17:01.545] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C10.dat
[23:17:01.545] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C11.dat
[23:17:01.545] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C12.dat
[23:17:01.546] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C13.dat
[23:17:01.546] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C14.dat
[23:17:01.546] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C15.dat
[23:17:01.546] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//trimParameters35_C0.dat
[23:17:01.553] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//trimParameters35_C1.dat
[23:17:01.559] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//trimParameters35_C2.dat
[23:17:01.566] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//trimParameters35_C3.dat
[23:17:01.573] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//trimParameters35_C4.dat
[23:17:01.580] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//trimParameters35_C5.dat
[23:17:01.587] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//trimParameters35_C6.dat
[23:17:01.594] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//trimParameters35_C7.dat
[23:17:01.601] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//trimParameters35_C8.dat
[23:17:01.608] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//trimParameters35_C9.dat
[23:17:01.614] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//trimParameters35_C10.dat
[23:17:01.619] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//trimParameters35_C11.dat
[23:17:01.624] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//trimParameters35_C12.dat
[23:17:01.629] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//trimParameters35_C13.dat
[23:17:01.633] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//trimParameters35_C14.dat
[23:17:01.638] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//trimParameters35_C15.dat
[23:17:01.643] <TB2> INFO: PixTestTrim::trimTest() done
[23:17:01.643] <TB2> INFO: vtrim: 113 118 110 132 137 127 122 122 121 109 127 127 137 123 140 122
[23:17:01.643] <TB2> INFO: vthrcomp: 127 130 119 133 132 134 119 132 126 120 126 125 128 131 130 129
[23:17:01.643] <TB2> INFO: vcal mean: 34.93 34.92 34.89 34.84 35.05 34.89 34.88 34.90 34.93 34.93 34.91 34.91 34.98 34.99 34.92 34.94
[23:17:01.643] <TB2> INFO: vcal RMS: 1.02 1.08 0.89 1.00 1.22 1.01 0.92 1.01 1.08 0.94 0.97 0.98 0.99 0.99 1.02 1.01
[23:17:01.643] <TB2> INFO: bits mean: 8.93 9.23 9.51 9.88 9.49 9.18 9.83 9.37 9.21 8.62 9.79 9.41 9.63 9.18 9.19 9.57
[23:17:01.643] <TB2> INFO: bits RMS: 3.00 2.90 2.76 2.55 2.55 3.01 2.60 2.57 2.85 2.85 2.62 2.70 2.56 2.67 2.64 2.88
[23:17:01.650] <TB2> INFO: ----------------------------------------------------------------------
[23:17:01.650] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[23:17:01.650] <TB2> INFO: ----------------------------------------------------------------------
[23:17:01.652] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[23:17:01.666] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[23:17:01.666] <TB2> INFO: run 1 of 1
[23:17:01.951] <TB2> INFO: Expecting 4160000 events.
[23:17:35.364] <TB2> INFO: 771200 events read in total (32821ms).
[23:18:07.674] <TB2> INFO: 1536520 events read in total (65131ms).
[23:18:40.242] <TB2> INFO: 2294825 events read in total (97699ms).
[23:19:13.381] <TB2> INFO: 3048640 events read in total (130838ms).
[23:19:45.915] <TB2> INFO: 3801015 events read in total (163372ms).
[23:20:01.155] <TB2> INFO: 4160000 events read in total (178612ms).
[23:20:01.225] <TB2> INFO: Test took 179559ms.
[23:20:23.923] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[23:20:23.936] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[23:20:23.936] <TB2> INFO: run 1 of 1
[23:20:24.173] <TB2> INFO: Expecting 4305600 events.
[23:20:56.518] <TB2> INFO: 735825 events read in total (31753ms).
[23:21:28.456] <TB2> INFO: 1466905 events read in total (63691ms).
[23:22:00.233] <TB2> INFO: 2193590 events read in total (95469ms).
[23:22:32.068] <TB2> INFO: 2916385 events read in total (127303ms).
[23:23:03.972] <TB2> INFO: 3636905 events read in total (159207ms).
[23:23:33.718] <TB2> INFO: 4305600 events read in total (188953ms).
[23:23:33.879] <TB2> INFO: Test took 189943ms.
[23:24:01.190] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[23:24:01.204] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[23:24:01.204] <TB2> INFO: run 1 of 1
[23:24:01.487] <TB2> INFO: Expecting 4160000 events.
[23:24:34.853] <TB2> INFO: 746020 events read in total (32774ms).
[23:25:07.122] <TB2> INFO: 1486940 events read in total (65043ms).
[23:25:39.129] <TB2> INFO: 2223250 events read in total (97050ms).
[23:26:10.930] <TB2> INFO: 2954855 events read in total (128851ms).
[23:26:43.414] <TB2> INFO: 3684900 events read in total (161335ms).
[23:27:04.080] <TB2> INFO: 4160000 events read in total (182001ms).
[23:27:04.176] <TB2> INFO: Test took 182972ms.
[23:27:30.843] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 201 (-1/-1) hits flags = 528 (plus default)
[23:27:30.857] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[23:27:30.857] <TB2> INFO: run 1 of 1
[23:27:31.096] <TB2> INFO: Expecting 4201600 events.
[23:28:03.969] <TB2> INFO: 743210 events read in total (32281ms).
[23:28:35.986] <TB2> INFO: 1481445 events read in total (64298ms).
[23:29:08.264] <TB2> INFO: 2215210 events read in total (96576ms).
[23:29:40.008] <TB2> INFO: 2944325 events read in total (128320ms).
[23:30:11.005] <TB2> INFO: 3671680 events read in total (160317ms).
[23:30:35.221] <TB2> INFO: 4201600 events read in total (183533ms).
[23:30:35.319] <TB2> INFO: Test took 184461ms.
[23:30:58.996] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 201 (-1/-1) hits flags = 528 (plus default)
[23:30:59.009] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[23:30:59.009] <TB2> INFO: run 1 of 1
[23:30:59.245] <TB2> INFO: Expecting 4201600 events.
[23:31:31.892] <TB2> INFO: 743140 events read in total (32055ms).
[23:32:03.974] <TB2> INFO: 1481475 events read in total (64137ms).
[23:32:36.169] <TB2> INFO: 2215285 events read in total (96332ms).
[23:33:07.936] <TB2> INFO: 2944420 events read in total (128099ms).
[23:33:40.617] <TB2> INFO: 3672430 events read in total (160780ms).
[23:34:03.660] <TB2> INFO: 4201600 events read in total (183823ms).
[23:34:03.825] <TB2> INFO: Test took 184816ms.
[23:34:29.473] <TB2> INFO: PixTestTrim::trimBitTest() done
[23:34:29.474] <TB2> INFO: PixTestTrim::doTest() done, duration: 2491 seconds
[23:34:29.474] <TB2> INFO: Decoding statistics:
[23:34:29.474] <TB2> INFO: General information:
[23:34:29.474] <TB2> INFO: 16bit words read: 0
[23:34:29.474] <TB2> INFO: valid events total: 0
[23:34:29.474] <TB2> INFO: empty events: 0
[23:34:29.474] <TB2> INFO: valid events with pixels: 0
[23:34:29.474] <TB2> INFO: valid pixel hits: 0
[23:34:29.474] <TB2> INFO: Event errors: 0
[23:34:29.474] <TB2> INFO: start marker: 0
[23:34:29.474] <TB2> INFO: stop marker: 0
[23:34:29.474] <TB2> INFO: overflow: 0
[23:34:29.474] <TB2> INFO: invalid 5bit words: 0
[23:34:29.474] <TB2> INFO: invalid XOR eye diagram: 0
[23:34:29.474] <TB2> INFO: frame (failed synchr.): 0
[23:34:29.474] <TB2> INFO: idle data (no TBM trl): 0
[23:34:29.474] <TB2> INFO: no data (only TBM hdr): 0
[23:34:29.475] <TB2> INFO: TBM errors: 0
[23:34:29.475] <TB2> INFO: flawed TBM headers: 0
[23:34:29.475] <TB2> INFO: flawed TBM trailers: 0
[23:34:29.475] <TB2> INFO: event ID mismatches: 0
[23:34:29.475] <TB2> INFO: ROC errors: 0
[23:34:29.475] <TB2> INFO: missing ROC header(s): 0
[23:34:29.475] <TB2> INFO: misplaced readback start: 0
[23:34:29.475] <TB2> INFO: Pixel decoding errors: 0
[23:34:29.475] <TB2> INFO: pixel data incomplete: 0
[23:34:29.475] <TB2> INFO: pixel address: 0
[23:34:29.475] <TB2> INFO: pulse height fill bit: 0
[23:34:29.475] <TB2> INFO: buffer corruption: 0
[23:34:30.109] <TB2> INFO: ######################################################################
[23:34:30.109] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[23:34:30.109] <TB2> INFO: ######################################################################
[23:34:30.350] <TB2> INFO: Expecting 41600 events.
[23:34:33.821] <TB2> INFO: 41600 events read in total (2880ms).
[23:34:33.822] <TB2> INFO: Test took 3712ms.
[23:34:34.262] <TB2> INFO: Expecting 41600 events.
[23:34:37.847] <TB2> INFO: 41600 events read in total (2993ms).
[23:34:37.848] <TB2> INFO: Test took 3823ms.
[23:34:38.137] <TB2> INFO: Expecting 41600 events.
[23:34:41.795] <TB2> INFO: 41600 events read in total (3066ms).
[23:34:41.796] <TB2> INFO: Test took 3924ms.
[23:34:42.085] <TB2> INFO: Expecting 41600 events.
[23:34:45.654] <TB2> INFO: 41600 events read in total (2977ms).
[23:34:45.655] <TB2> INFO: Test took 3835ms.
[23:34:45.945] <TB2> INFO: Expecting 41600 events.
[23:34:49.652] <TB2> INFO: 41600 events read in total (3116ms).
[23:34:49.653] <TB2> INFO: Test took 3973ms.
[23:34:49.943] <TB2> INFO: Expecting 41600 events.
[23:34:53.571] <TB2> INFO: 41600 events read in total (3036ms).
[23:34:53.571] <TB2> INFO: Test took 3893ms.
[23:34:53.879] <TB2> INFO: Expecting 41600 events.
[23:34:57.518] <TB2> INFO: 41600 events read in total (3048ms).
[23:34:57.518] <TB2> INFO: Test took 3920ms.
[23:34:57.807] <TB2> INFO: Expecting 41600 events.
[23:35:01.352] <TB2> INFO: 41600 events read in total (2953ms).
[23:35:01.353] <TB2> INFO: Test took 3811ms.
[23:35:01.644] <TB2> INFO: Expecting 41600 events.
[23:35:05.294] <TB2> INFO: 41600 events read in total (3058ms).
[23:35:05.295] <TB2> INFO: Test took 3916ms.
[23:35:05.641] <TB2> INFO: Expecting 41600 events.
[23:35:09.174] <TB2> INFO: 41600 events read in total (2941ms).
[23:35:09.174] <TB2> INFO: Test took 3855ms.
[23:35:09.524] <TB2> INFO: Expecting 41600 events.
[23:35:13.043] <TB2> INFO: 41600 events read in total (2928ms).
[23:35:13.044] <TB2> INFO: Test took 3846ms.
[23:35:13.340] <TB2> INFO: Expecting 41600 events.
[23:35:16.913] <TB2> INFO: 41600 events read in total (2981ms).
[23:35:16.914] <TB2> INFO: Test took 3843ms.
[23:35:17.203] <TB2> INFO: Expecting 41600 events.
[23:35:20.737] <TB2> INFO: 41600 events read in total (2942ms).
[23:35:20.738] <TB2> INFO: Test took 3799ms.
[23:35:21.030] <TB2> INFO: Expecting 41600 events.
[23:35:24.512] <TB2> INFO: 41600 events read in total (2890ms).
[23:35:24.514] <TB2> INFO: Test took 3751ms.
[23:35:24.804] <TB2> INFO: Expecting 41600 events.
[23:35:28.370] <TB2> INFO: 41600 events read in total (2975ms).
[23:35:28.372] <TB2> INFO: Test took 3833ms.
[23:35:28.665] <TB2> INFO: Expecting 41600 events.
[23:35:32.225] <TB2> INFO: 41600 events read in total (2968ms).
[23:35:32.226] <TB2> INFO: Test took 3829ms.
[23:35:32.515] <TB2> INFO: Expecting 41600 events.
[23:35:36.044] <TB2> INFO: 41600 events read in total (2937ms).
[23:35:36.045] <TB2> INFO: Test took 3795ms.
[23:35:36.336] <TB2> INFO: Expecting 41600 events.
[23:35:39.919] <TB2> INFO: 41600 events read in total (2992ms).
[23:35:39.920] <TB2> INFO: Test took 3850ms.
[23:35:40.210] <TB2> INFO: Expecting 41600 events.
[23:35:43.808] <TB2> INFO: 41600 events read in total (3006ms).
[23:35:43.809] <TB2> INFO: Test took 3865ms.
[23:35:44.102] <TB2> INFO: Expecting 41600 events.
[23:35:47.674] <TB2> INFO: 41600 events read in total (2980ms).
[23:35:47.675] <TB2> INFO: Test took 3839ms.
[23:35:47.965] <TB2> INFO: Expecting 41600 events.
[23:35:51.515] <TB2> INFO: 41600 events read in total (2959ms).
[23:35:51.516] <TB2> INFO: Test took 3816ms.
[23:35:51.805] <TB2> INFO: Expecting 41600 events.
[23:35:55.363] <TB2> INFO: 41600 events read in total (2966ms).
[23:35:55.364] <TB2> INFO: Test took 3824ms.
[23:35:55.669] <TB2> INFO: Expecting 41600 events.
[23:35:59.217] <TB2> INFO: 41600 events read in total (2956ms).
[23:35:59.217] <TB2> INFO: Test took 3829ms.
[23:35:59.506] <TB2> INFO: Expecting 41600 events.
[23:36:03.094] <TB2> INFO: 41600 events read in total (2996ms).
[23:36:03.095] <TB2> INFO: Test took 3854ms.
[23:36:03.384] <TB2> INFO: Expecting 41600 events.
[23:36:06.876] <TB2> INFO: 41600 events read in total (2900ms).
[23:36:06.877] <TB2> INFO: Test took 3758ms.
[23:36:07.168] <TB2> INFO: Expecting 41600 events.
[23:36:10.725] <TB2> INFO: 41600 events read in total (2965ms).
[23:36:10.726] <TB2> INFO: Test took 3823ms.
[23:36:11.077] <TB2> INFO: Expecting 41600 events.
[23:36:14.566] <TB2> INFO: 41600 events read in total (2897ms).
[23:36:14.567] <TB2> INFO: Test took 3816ms.
[23:36:14.855] <TB2> INFO: Expecting 41600 events.
[23:36:18.368] <TB2> INFO: 41600 events read in total (2921ms).
[23:36:18.369] <TB2> INFO: Test took 3778ms.
[23:36:18.661] <TB2> INFO: Expecting 41600 events.
[23:36:22.147] <TB2> INFO: 41600 events read in total (2894ms).
[23:36:22.148] <TB2> INFO: Test took 3751ms.
[23:36:22.438] <TB2> INFO: Expecting 2560 events.
[23:36:23.322] <TB2> INFO: 2560 events read in total (292ms).
[23:36:23.322] <TB2> INFO: Test took 1160ms.
[23:36:23.630] <TB2> INFO: Expecting 2560 events.
[23:36:24.513] <TB2> INFO: 2560 events read in total (292ms).
[23:36:24.513] <TB2> INFO: Test took 1191ms.
[23:36:24.820] <TB2> INFO: Expecting 2560 events.
[23:36:25.705] <TB2> INFO: 2560 events read in total (293ms).
[23:36:25.705] <TB2> INFO: Test took 1192ms.
[23:36:26.012] <TB2> INFO: Expecting 2560 events.
[23:36:26.905] <TB2> INFO: 2560 events read in total (301ms).
[23:36:26.905] <TB2> INFO: Test took 1199ms.
[23:36:27.213] <TB2> INFO: Expecting 2560 events.
[23:36:28.094] <TB2> INFO: 2560 events read in total (289ms).
[23:36:28.094] <TB2> INFO: Test took 1189ms.
[23:36:28.401] <TB2> INFO: Expecting 2560 events.
[23:36:29.291] <TB2> INFO: 2560 events read in total (298ms).
[23:36:29.291] <TB2> INFO: Test took 1197ms.
[23:36:29.599] <TB2> INFO: Expecting 2560 events.
[23:36:30.486] <TB2> INFO: 2560 events read in total (295ms).
[23:36:30.486] <TB2> INFO: Test took 1194ms.
[23:36:30.793] <TB2> INFO: Expecting 2560 events.
[23:36:31.672] <TB2> INFO: 2560 events read in total (287ms).
[23:36:31.673] <TB2> INFO: Test took 1186ms.
[23:36:31.980] <TB2> INFO: Expecting 2560 events.
[23:36:32.860] <TB2> INFO: 2560 events read in total (288ms).
[23:36:32.860] <TB2> INFO: Test took 1188ms.
[23:36:33.168] <TB2> INFO: Expecting 2560 events.
[23:36:34.056] <TB2> INFO: 2560 events read in total (297ms).
[23:36:34.056] <TB2> INFO: Test took 1195ms.
[23:36:34.365] <TB2> INFO: Expecting 2560 events.
[23:36:35.255] <TB2> INFO: 2560 events read in total (299ms).
[23:36:35.256] <TB2> INFO: Test took 1200ms.
[23:36:35.563] <TB2> INFO: Expecting 2560 events.
[23:36:36.447] <TB2> INFO: 2560 events read in total (292ms).
[23:36:36.447] <TB2> INFO: Test took 1190ms.
[23:36:36.755] <TB2> INFO: Expecting 2560 events.
[23:36:37.649] <TB2> INFO: 2560 events read in total (302ms).
[23:36:37.649] <TB2> INFO: Test took 1202ms.
[23:36:37.957] <TB2> INFO: Expecting 2560 events.
[23:36:38.846] <TB2> INFO: 2560 events read in total (297ms).
[23:36:38.846] <TB2> INFO: Test took 1196ms.
[23:36:39.155] <TB2> INFO: Expecting 2560 events.
[23:36:40.040] <TB2> INFO: 2560 events read in total (293ms).
[23:36:40.040] <TB2> INFO: Test took 1193ms.
[23:36:40.349] <TB2> INFO: Expecting 2560 events.
[23:36:41.235] <TB2> INFO: 2560 events read in total (294ms).
[23:36:41.235] <TB2> INFO: Test took 1194ms.
[23:36:41.239] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:36:41.543] <TB2> INFO: Expecting 655360 events.
[23:36:56.401] <TB2> INFO: 655360 events read in total (14266ms).
[23:36:56.413] <TB2> INFO: Expecting 655360 events.
[23:37:11.133] <TB2> INFO: 655360 events read in total (14317ms).
[23:37:11.154] <TB2> INFO: Expecting 655360 events.
[23:37:25.863] <TB2> INFO: 655360 events read in total (14306ms).
[23:37:25.883] <TB2> INFO: Expecting 655360 events.
[23:37:40.602] <TB2> INFO: 655360 events read in total (14316ms).
[23:37:40.627] <TB2> INFO: Expecting 655360 events.
[23:37:55.380] <TB2> INFO: 655360 events read in total (14350ms).
[23:37:55.414] <TB2> INFO: Expecting 655360 events.
[23:38:10.127] <TB2> INFO: 655360 events read in total (14310ms).
[23:38:10.166] <TB2> INFO: Expecting 655360 events.
[23:38:25.050] <TB2> INFO: 655360 events read in total (14481ms).
[23:38:25.088] <TB2> INFO: Expecting 655360 events.
[23:38:39.927] <TB2> INFO: 655360 events read in total (14436ms).
[23:38:39.004] <TB2> INFO: Expecting 655360 events.
[23:38:54.537] <TB2> INFO: 655360 events read in total (14130ms).
[23:38:54.595] <TB2> INFO: Expecting 655360 events.
[23:39:09.194] <TB2> INFO: 655360 events read in total (14196ms).
[23:39:09.304] <TB2> INFO: Expecting 655360 events.
[23:39:23.812] <TB2> INFO: 655360 events read in total (14105ms).
[23:39:23.870] <TB2> INFO: Expecting 655360 events.
[23:39:38.671] <TB2> INFO: 655360 events read in total (14398ms).
[23:39:38.746] <TB2> INFO: Expecting 655360 events.
[23:39:53.351] <TB2> INFO: 655360 events read in total (14203ms).
[23:39:53.432] <TB2> INFO: Expecting 655360 events.
[23:40:08.279] <TB2> INFO: 655360 events read in total (14444ms).
[23:40:08.365] <TB2> INFO: Expecting 655360 events.
[23:40:23.032] <TB2> INFO: 655360 events read in total (14263ms).
[23:40:23.202] <TB2> INFO: Expecting 655360 events.
[23:40:37.843] <TB2> INFO: 655360 events read in total (14238ms).
[23:40:37.961] <TB2> INFO: Test took 236722ms.
[23:40:38.058] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:40:38.315] <TB2> INFO: Expecting 655360 events.
[23:40:53.068] <TB2> INFO: 655360 events read in total (14162ms).
[23:40:53.080] <TB2> INFO: Expecting 655360 events.
[23:41:07.413] <TB2> INFO: 655360 events read in total (13930ms).
[23:41:07.429] <TB2> INFO: Expecting 655360 events.
[23:41:22.021] <TB2> INFO: 655360 events read in total (14189ms).
[23:41:22.049] <TB2> INFO: Expecting 655360 events.
[23:41:36.833] <TB2> INFO: 655360 events read in total (14381ms).
[23:41:36.858] <TB2> INFO: Expecting 655360 events.
[23:41:51.396] <TB2> INFO: 655360 events read in total (14135ms).
[23:41:51.427] <TB2> INFO: Expecting 655360 events.
[23:42:06.133] <TB2> INFO: 655360 events read in total (14302ms).
[23:42:06.169] <TB2> INFO: Expecting 655360 events.
[23:42:20.748] <TB2> INFO: 655360 events read in total (14175ms).
[23:42:20.797] <TB2> INFO: Expecting 655360 events.
[23:42:35.477] <TB2> INFO: 655360 events read in total (14277ms).
[23:42:35.607] <TB2> INFO: Expecting 655360 events.
[23:42:49.915] <TB2> INFO: 655360 events read in total (13905ms).
[23:42:49.963] <TB2> INFO: Expecting 655360 events.
[23:43:04.612] <TB2> INFO: 655360 events read in total (14246ms).
[23:43:04.724] <TB2> INFO: Expecting 655360 events.
[23:43:19.289] <TB2> INFO: 655360 events read in total (14162ms).
[23:43:19.346] <TB2> INFO: Expecting 655360 events.
[23:43:33.780] <TB2> INFO: 655360 events read in total (14031ms).
[23:43:33.938] <TB2> INFO: Expecting 655360 events.
[23:43:48.633] <TB2> INFO: 655360 events read in total (14291ms).
[23:43:48.714] <TB2> INFO: Expecting 655360 events.
[23:44:03.466] <TB2> INFO: 655360 events read in total (14349ms).
[23:44:03.615] <TB2> INFO: Expecting 655360 events.
[23:44:18.521] <TB2> INFO: 655360 events read in total (14503ms).
[23:44:18.613] <TB2> INFO: Expecting 655360 events.
[23:44:33.511] <TB2> INFO: 655360 events read in total (14495ms).
[23:44:33.606] <TB2> INFO: Test took 235548ms.
[23:44:33.777] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:44:33.783] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[23:44:33.789] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:44:33.795] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[23:44:33.800] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[23:44:33.806] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[23:44:33.812] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:44:33.818] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[23:44:33.823] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[23:44:33.829] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[23:44:33.835] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[23:44:33.841] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[23:44:33.847] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[23:44:33.852] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[23:44:33.859] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[23:44:33.864] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:44:33.870] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:44:33.876] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:44:33.882] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[23:44:33.888] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[23:44:33.894] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[23:44:33.900] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[23:44:33.906] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[23:44:33.912] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[23:44:33.917] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[23:44:33.923] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[23:44:33.929] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:44:33.935] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:44:33.941] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:44:33.947] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:44:33.952] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:44:33.959] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:44:33.964] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:44:33.970] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[23:44:33.976] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[23:44:33.981] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[23:44:33.987] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[23:44:33.993] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[23:44:33.998] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[23:44:33.004] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[23:44:34.010] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[23:44:34.015] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[23:44:34.021] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:44:34.027] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:44:34.032] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[23:44:34.038] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[23:44:34.044] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:44:34.080] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C0.dat
[23:44:34.080] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C1.dat
[23:44:34.080] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C2.dat
[23:44:34.080] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C3.dat
[23:44:34.080] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C4.dat
[23:44:34.080] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C5.dat
[23:44:34.080] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C6.dat
[23:44:34.080] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C7.dat
[23:44:34.081] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C8.dat
[23:44:34.081] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C9.dat
[23:44:34.081] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C10.dat
[23:44:34.081] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C11.dat
[23:44:34.081] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C12.dat
[23:44:34.081] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C13.dat
[23:44:34.081] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C14.dat
[23:44:34.081] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//dacParameters35_C15.dat
[23:44:34.338] <TB2> INFO: Expecting 41600 events.
[23:44:37.502] <TB2> INFO: 41600 events read in total (2572ms).
[23:44:37.503] <TB2> INFO: Test took 3419ms.
[23:44:37.965] <TB2> INFO: Expecting 41600 events.
[23:44:41.070] <TB2> INFO: 41600 events read in total (2514ms).
[23:44:41.071] <TB2> INFO: Test took 3350ms.
[23:44:41.528] <TB2> INFO: Expecting 41600 events.
[23:44:44.688] <TB2> INFO: 41600 events read in total (2568ms).
[23:44:44.688] <TB2> INFO: Test took 3403ms.
[23:44:44.909] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:44:44.998] <TB2> INFO: Expecting 2560 events.
[23:44:45.882] <TB2> INFO: 2560 events read in total (292ms).
[23:44:45.883] <TB2> INFO: Test took 974ms.
[23:44:45.886] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:44:46.192] <TB2> INFO: Expecting 2560 events.
[23:44:47.083] <TB2> INFO: 2560 events read in total (300ms).
[23:44:47.083] <TB2> INFO: Test took 1197ms.
[23:44:47.088] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:44:47.391] <TB2> INFO: Expecting 2560 events.
[23:44:48.283] <TB2> INFO: 2560 events read in total (300ms).
[23:44:48.283] <TB2> INFO: Test took 1195ms.
[23:44:48.287] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:44:48.592] <TB2> INFO: Expecting 2560 events.
[23:44:49.481] <TB2> INFO: 2560 events read in total (298ms).
[23:44:49.481] <TB2> INFO: Test took 1194ms.
[23:44:49.484] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:44:49.790] <TB2> INFO: Expecting 2560 events.
[23:44:50.675] <TB2> INFO: 2560 events read in total (294ms).
[23:44:50.676] <TB2> INFO: Test took 1192ms.
[23:44:50.679] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:44:50.985] <TB2> INFO: Expecting 2560 events.
[23:44:51.875] <TB2> INFO: 2560 events read in total (298ms).
[23:44:51.876] <TB2> INFO: Test took 1197ms.
[23:44:51.880] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:44:52.184] <TB2> INFO: Expecting 2560 events.
[23:44:53.069] <TB2> INFO: 2560 events read in total (294ms).
[23:44:53.069] <TB2> INFO: Test took 1189ms.
[23:44:53.071] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:44:53.377] <TB2> INFO: Expecting 2560 events.
[23:44:54.267] <TB2> INFO: 2560 events read in total (298ms).
[23:44:54.268] <TB2> INFO: Test took 1197ms.
[23:44:54.271] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:44:54.576] <TB2> INFO: Expecting 2560 events.
[23:44:55.465] <TB2> INFO: 2560 events read in total (297ms).
[23:44:55.466] <TB2> INFO: Test took 1195ms.
[23:44:55.472] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:44:55.773] <TB2> INFO: Expecting 2560 events.
[23:44:56.656] <TB2> INFO: 2560 events read in total (291ms).
[23:44:56.657] <TB2> INFO: Test took 1185ms.
[23:44:56.659] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:44:56.964] <TB2> INFO: Expecting 2560 events.
[23:44:57.848] <TB2> INFO: 2560 events read in total (292ms).
[23:44:57.848] <TB2> INFO: Test took 1189ms.
[23:44:57.851] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:44:58.155] <TB2> INFO: Expecting 2560 events.
[23:44:59.037] <TB2> INFO: 2560 events read in total (290ms).
[23:44:59.037] <TB2> INFO: Test took 1186ms.
[23:44:59.040] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:44:59.346] <TB2> INFO: Expecting 2560 events.
[23:45:00.233] <TB2> INFO: 2560 events read in total (296ms).
[23:45:00.234] <TB2> INFO: Test took 1194ms.
[23:45:00.237] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:45:00.542] <TB2> INFO: Expecting 2560 events.
[23:45:01.424] <TB2> INFO: 2560 events read in total (289ms).
[23:45:01.424] <TB2> INFO: Test took 1187ms.
[23:45:01.427] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:45:01.732] <TB2> INFO: Expecting 2560 events.
[23:45:02.614] <TB2> INFO: 2560 events read in total (290ms).
[23:45:02.614] <TB2> INFO: Test took 1187ms.
[23:45:02.619] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:45:02.923] <TB2> INFO: Expecting 2560 events.
[23:45:03.811] <TB2> INFO: 2560 events read in total (297ms).
[23:45:03.811] <TB2> INFO: Test took 1192ms.
[23:45:03.815] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:45:04.120] <TB2> INFO: Expecting 2560 events.
[23:45:05.007] <TB2> INFO: 2560 events read in total (295ms).
[23:45:05.008] <TB2> INFO: Test took 1193ms.
[23:45:05.012] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:45:05.315] <TB2> INFO: Expecting 2560 events.
[23:45:06.195] <TB2> INFO: 2560 events read in total (288ms).
[23:45:06.195] <TB2> INFO: Test took 1183ms.
[23:45:06.198] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:45:06.503] <TB2> INFO: Expecting 2560 events.
[23:45:07.393] <TB2> INFO: 2560 events read in total (298ms).
[23:45:07.394] <TB2> INFO: Test took 1196ms.
[23:45:07.396] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:45:07.702] <TB2> INFO: Expecting 2560 events.
[23:45:08.588] <TB2> INFO: 2560 events read in total (294ms).
[23:45:08.588] <TB2> INFO: Test took 1192ms.
[23:45:08.591] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:45:08.898] <TB2> INFO: Expecting 2560 events.
[23:45:09.785] <TB2> INFO: 2560 events read in total (296ms).
[23:45:09.785] <TB2> INFO: Test took 1194ms.
[23:45:09.788] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:45:10.093] <TB2> INFO: Expecting 2560 events.
[23:45:10.975] <TB2> INFO: 2560 events read in total (290ms).
[23:45:10.975] <TB2> INFO: Test took 1187ms.
[23:45:10.977] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:45:11.284] <TB2> INFO: Expecting 2560 events.
[23:45:12.173] <TB2> INFO: 2560 events read in total (297ms).
[23:45:12.173] <TB2> INFO: Test took 1196ms.
[23:45:12.176] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:45:12.481] <TB2> INFO: Expecting 2560 events.
[23:45:13.370] <TB2> INFO: 2560 events read in total (297ms).
[23:45:13.370] <TB2> INFO: Test took 1194ms.
[23:45:13.372] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:45:13.679] <TB2> INFO: Expecting 2560 events.
[23:45:14.565] <TB2> INFO: 2560 events read in total (295ms).
[23:45:14.565] <TB2> INFO: Test took 1193ms.
[23:45:14.569] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:45:14.873] <TB2> INFO: Expecting 2560 events.
[23:45:15.770] <TB2> INFO: 2560 events read in total (305ms).
[23:45:15.770] <TB2> INFO: Test took 1202ms.
[23:45:15.774] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:45:16.078] <TB2> INFO: Expecting 2560 events.
[23:45:16.972] <TB2> INFO: 2560 events read in total (302ms).
[23:45:16.973] <TB2> INFO: Test took 1200ms.
[23:45:16.976] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:45:17.281] <TB2> INFO: Expecting 2560 events.
[23:45:18.178] <TB2> INFO: 2560 events read in total (305ms).
[23:45:18.179] <TB2> INFO: Test took 1203ms.
[23:45:18.182] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:45:18.486] <TB2> INFO: Expecting 2560 events.
[23:45:19.373] <TB2> INFO: 2560 events read in total (296ms).
[23:45:19.373] <TB2> INFO: Test took 1191ms.
[23:45:19.375] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:45:19.682] <TB2> INFO: Expecting 2560 events.
[23:45:20.567] <TB2> INFO: 2560 events read in total (295ms).
[23:45:20.568] <TB2> INFO: Test took 1193ms.
[23:45:20.572] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:45:20.876] <TB2> INFO: Expecting 2560 events.
[23:45:21.771] <TB2> INFO: 2560 events read in total (303ms).
[23:45:21.771] <TB2> INFO: Test took 1199ms.
[23:45:21.775] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:45:22.079] <TB2> INFO: Expecting 2560 events.
[23:45:22.964] <TB2> INFO: 2560 events read in total (293ms).
[23:45:22.965] <TB2> INFO: Test took 1190ms.
[23:45:23.437] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 653 seconds
[23:45:23.437] <TB2> INFO: PH scale (per ROC): 43 28 48 41 44 48 45 59 41 53 55 42 48 35 50 49
[23:45:23.437] <TB2> INFO: PH offset (per ROC): 106 101 110 96 105 91 101 117 98 125 125 80 91 101 129 122
[23:45:23.444] <TB2> INFO: Decoding statistics:
[23:45:23.444] <TB2> INFO: General information:
[23:45:23.444] <TB2> INFO: 16bit words read: 127884
[23:45:23.444] <TB2> INFO: valid events total: 20480
[23:45:23.444] <TB2> INFO: empty events: 17978
[23:45:23.444] <TB2> INFO: valid events with pixels: 2502
[23:45:23.444] <TB2> INFO: valid pixel hits: 2502
[23:45:23.444] <TB2> INFO: Event errors: 0
[23:45:23.444] <TB2> INFO: start marker: 0
[23:45:23.444] <TB2> INFO: stop marker: 0
[23:45:23.444] <TB2> INFO: overflow: 0
[23:45:23.444] <TB2> INFO: invalid 5bit words: 0
[23:45:23.444] <TB2> INFO: invalid XOR eye diagram: 0
[23:45:23.444] <TB2> INFO: frame (failed synchr.): 0
[23:45:23.444] <TB2> INFO: idle data (no TBM trl): 0
[23:45:23.444] <TB2> INFO: no data (only TBM hdr): 0
[23:45:23.444] <TB2> INFO: TBM errors: 0
[23:45:23.444] <TB2> INFO: flawed TBM headers: 0
[23:45:23.444] <TB2> INFO: flawed TBM trailers: 0
[23:45:23.444] <TB2> INFO: event ID mismatches: 0
[23:45:23.444] <TB2> INFO: ROC errors: 0
[23:45:23.444] <TB2> INFO: missing ROC header(s): 0
[23:45:23.444] <TB2> INFO: misplaced readback start: 0
[23:45:23.444] <TB2> INFO: Pixel decoding errors: 0
[23:45:23.444] <TB2> INFO: pixel data incomplete: 0
[23:45:23.444] <TB2> INFO: pixel address: 0
[23:45:23.444] <TB2> INFO: pulse height fill bit: 0
[23:45:23.444] <TB2> INFO: buffer corruption: 0
[23:45:23.604] <TB2> INFO: ######################################################################
[23:45:23.604] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[23:45:23.604] <TB2> INFO: ######################################################################
[23:45:23.620] <TB2> INFO: scanning low vcal = 10
[23:45:23.858] <TB2> INFO: Expecting 41600 events.
[23:45:27.431] <TB2> INFO: 41600 events read in total (2981ms).
[23:45:27.431] <TB2> INFO: Test took 3811ms.
[23:45:27.434] <TB2> INFO: scanning low vcal = 20
[23:45:27.728] <TB2> INFO: Expecting 41600 events.
[23:45:31.316] <TB2> INFO: 41600 events read in total (2997ms).
[23:45:31.317] <TB2> INFO: Test took 3883ms.
[23:45:31.319] <TB2> INFO: scanning low vcal = 30
[23:45:31.617] <TB2> INFO: Expecting 41600 events.
[23:45:35.261] <TB2> INFO: 41600 events read in total (3053ms).
[23:45:35.262] <TB2> INFO: Test took 3943ms.
[23:45:35.265] <TB2> INFO: scanning low vcal = 40
[23:45:35.541] <TB2> INFO: Expecting 41600 events.
[23:45:39.502] <TB2> INFO: 41600 events read in total (3369ms).
[23:45:39.503] <TB2> INFO: Test took 4238ms.
[23:45:39.506] <TB2> INFO: scanning low vcal = 50
[23:45:39.783] <TB2> INFO: Expecting 41600 events.
[23:45:43.787] <TB2> INFO: 41600 events read in total (3413ms).
[23:45:43.788] <TB2> INFO: Test took 4281ms.
[23:45:43.792] <TB2> INFO: scanning low vcal = 60
[23:45:44.068] <TB2> INFO: Expecting 41600 events.
[23:45:48.103] <TB2> INFO: 41600 events read in total (3443ms).
[23:45:48.104] <TB2> INFO: Test took 4312ms.
[23:45:48.107] <TB2> INFO: scanning low vcal = 70
[23:45:48.384] <TB2> INFO: Expecting 41600 events.
[23:45:52.359] <TB2> INFO: 41600 events read in total (3383ms).
[23:45:52.360] <TB2> INFO: Test took 4253ms.
[23:45:52.363] <TB2> INFO: scanning low vcal = 80
[23:45:52.640] <TB2> INFO: Expecting 41600 events.
[23:45:56.666] <TB2> INFO: 41600 events read in total (3434ms).
[23:45:56.666] <TB2> INFO: Test took 4302ms.
[23:45:56.670] <TB2> INFO: scanning low vcal = 90
[23:45:56.946] <TB2> INFO: Expecting 41600 events.
[23:46:00.966] <TB2> INFO: 41600 events read in total (3428ms).
[23:46:00.967] <TB2> INFO: Test took 4297ms.
[23:46:00.971] <TB2> INFO: scanning low vcal = 100
[23:46:01.247] <TB2> INFO: Expecting 41600 events.
[23:46:05.241] <TB2> INFO: 41600 events read in total (3401ms).
[23:46:05.241] <TB2> INFO: Test took 4270ms.
[23:46:05.245] <TB2> INFO: scanning low vcal = 110
[23:46:05.521] <TB2> INFO: Expecting 41600 events.
[23:46:09.543] <TB2> INFO: 41600 events read in total (3430ms).
[23:46:09.543] <TB2> INFO: Test took 4298ms.
[23:46:09.548] <TB2> INFO: scanning low vcal = 120
[23:46:09.823] <TB2> INFO: Expecting 41600 events.
[23:46:13.822] <TB2> INFO: 41600 events read in total (3407ms).
[23:46:13.823] <TB2> INFO: Test took 4275ms.
[23:46:13.826] <TB2> INFO: scanning low vcal = 130
[23:46:14.102] <TB2> INFO: Expecting 41600 events.
[23:46:18.140] <TB2> INFO: 41600 events read in total (3446ms).
[23:46:18.140] <TB2> INFO: Test took 4314ms.
[23:46:18.143] <TB2> INFO: scanning low vcal = 140
[23:46:18.425] <TB2> INFO: Expecting 41600 events.
[23:46:22.442] <TB2> INFO: 41600 events read in total (3426ms).
[23:46:22.444] <TB2> INFO: Test took 4300ms.
[23:46:22.447] <TB2> INFO: scanning low vcal = 150
[23:46:22.724] <TB2> INFO: Expecting 41600 events.
[23:46:26.691] <TB2> INFO: 41600 events read in total (3375ms).
[23:46:26.692] <TB2> INFO: Test took 4245ms.
[23:46:26.695] <TB2> INFO: scanning low vcal = 160
[23:46:26.972] <TB2> INFO: Expecting 41600 events.
[23:46:30.991] <TB2> INFO: 41600 events read in total (3428ms).
[23:46:30.991] <TB2> INFO: Test took 4296ms.
[23:46:30.995] <TB2> INFO: scanning low vcal = 170
[23:46:31.272] <TB2> INFO: Expecting 41600 events.
[23:46:35.324] <TB2> INFO: 41600 events read in total (3460ms).
[23:46:35.325] <TB2> INFO: Test took 4330ms.
[23:46:35.330] <TB2> INFO: scanning low vcal = 180
[23:46:35.605] <TB2> INFO: Expecting 41600 events.
[23:46:39.547] <TB2> INFO: 41600 events read in total (3350ms).
[23:46:39.548] <TB2> INFO: Test took 4218ms.
[23:46:39.551] <TB2> INFO: scanning low vcal = 190
[23:46:39.828] <TB2> INFO: Expecting 41600 events.
[23:46:43.768] <TB2> INFO: 41600 events read in total (3349ms).
[23:46:43.769] <TB2> INFO: Test took 4217ms.
[23:46:43.774] <TB2> INFO: scanning low vcal = 200
[23:46:44.049] <TB2> INFO: Expecting 41600 events.
[23:46:47.003] <TB2> INFO: 41600 events read in total (3362ms).
[23:46:47.004] <TB2> INFO: Test took 4230ms.
[23:46:48.009] <TB2> INFO: scanning low vcal = 210
[23:46:48.284] <TB2> INFO: Expecting 41600 events.
[23:46:52.220] <TB2> INFO: 41600 events read in total (3344ms).
[23:46:52.221] <TB2> INFO: Test took 4212ms.
[23:46:52.224] <TB2> INFO: scanning low vcal = 220
[23:46:52.501] <TB2> INFO: Expecting 41600 events.
[23:46:56.494] <TB2> INFO: 41600 events read in total (3402ms).
[23:46:56.494] <TB2> INFO: Test took 4270ms.
[23:46:56.498] <TB2> INFO: scanning low vcal = 230
[23:46:56.823] <TB2> INFO: Expecting 41600 events.
[23:47:00.777] <TB2> INFO: 41600 events read in total (3363ms).
[23:47:00.778] <TB2> INFO: Test took 4280ms.
[23:47:00.782] <TB2> INFO: scanning low vcal = 240
[23:47:01.058] <TB2> INFO: Expecting 41600 events.
[23:47:05.188] <TB2> INFO: 41600 events read in total (3539ms).
[23:47:05.189] <TB2> INFO: Test took 4407ms.
[23:47:05.192] <TB2> INFO: scanning low vcal = 250
[23:47:05.517] <TB2> INFO: Expecting 41600 events.
[23:47:09.501] <TB2> INFO: 41600 events read in total (3392ms).
[23:47:09.502] <TB2> INFO: Test took 4309ms.
[23:47:09.506] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[23:47:09.782] <TB2> INFO: Expecting 41600 events.
[23:47:13.795] <TB2> INFO: 41600 events read in total (3422ms).
[23:47:13.796] <TB2> INFO: Test took 4290ms.
[23:47:13.799] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[23:47:14.075] <TB2> INFO: Expecting 41600 events.
[23:47:18.048] <TB2> INFO: 41600 events read in total (3381ms).
[23:47:18.049] <TB2> INFO: Test took 4250ms.
[23:47:18.052] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[23:47:18.349] <TB2> INFO: Expecting 41600 events.
[23:47:22.337] <TB2> INFO: 41600 events read in total (3396ms).
[23:47:22.338] <TB2> INFO: Test took 4286ms.
[23:47:22.341] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[23:47:22.617] <TB2> INFO: Expecting 41600 events.
[23:47:26.656] <TB2> INFO: 41600 events read in total (3447ms).
[23:47:26.657] <TB2> INFO: Test took 4315ms.
[23:47:26.661] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[23:47:26.958] <TB2> INFO: Expecting 41600 events.
[23:47:30.935] <TB2> INFO: 41600 events read in total (3386ms).
[23:47:30.936] <TB2> INFO: Test took 4275ms.
[23:47:31.360] <TB2> INFO: PixTestGainPedestal::measure() done
[23:48:03.569] <TB2> INFO: PixTestGainPedestal::fit() done
[23:48:03.569] <TB2> INFO: non-linearity mean: 0.938 0.994 0.960 0.942 0.951 0.969 0.923 0.984 0.955 0.982 0.979 0.942 0.944 0.937 0.978 0.980
[23:48:03.569] <TB2> INFO: non-linearity RMS: 0.092 0.202 0.044 0.158 0.054 0.009 0.092 0.003 0.155 0.004 0.004 0.056 0.084 0.137 0.003 0.004
[23:48:03.569] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//phCalibrationFitErr35_C0.dat
[23:48:03.584] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//phCalibrationFitErr35_C1.dat
[23:48:03.597] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//phCalibrationFitErr35_C2.dat
[23:48:03.611] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//phCalibrationFitErr35_C3.dat
[23:48:03.624] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//phCalibrationFitErr35_C4.dat
[23:48:03.637] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//phCalibrationFitErr35_C5.dat
[23:48:03.650] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//phCalibrationFitErr35_C6.dat
[23:48:03.664] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//phCalibrationFitErr35_C7.dat
[23:48:03.677] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//phCalibrationFitErr35_C8.dat
[23:48:03.691] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//phCalibrationFitErr35_C9.dat
[23:48:03.704] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//phCalibrationFitErr35_C10.dat
[23:48:03.717] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//phCalibrationFitErr35_C11.dat
[23:48:03.731] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//phCalibrationFitErr35_C12.dat
[23:48:03.745] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//phCalibrationFitErr35_C13.dat
[23:48:03.758] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//phCalibrationFitErr35_C14.dat
[23:48:03.771] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//003_Fulltest_p17//phCalibrationFitErr35_C15.dat
[23:48:03.785] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 160 seconds
[23:48:03.785] <TB2> INFO: Decoding statistics:
[23:48:03.785] <TB2> INFO: General information:
[23:48:03.785] <TB2> INFO: 16bit words read: 3322046
[23:48:03.785] <TB2> INFO: valid events total: 332800
[23:48:03.785] <TB2> INFO: empty events: 19
[23:48:03.785] <TB2> INFO: valid events with pixels: 332781
[23:48:03.785] <TB2> INFO: valid pixel hits: 662623
[23:48:03.785] <TB2> INFO: Event errors: 0
[23:48:03.785] <TB2> INFO: start marker: 0
[23:48:03.785] <TB2> INFO: stop marker: 0
[23:48:03.785] <TB2> INFO: overflow: 0
[23:48:03.785] <TB2> INFO: invalid 5bit words: 0
[23:48:03.785] <TB2> INFO: invalid XOR eye diagram: 0
[23:48:03.785] <TB2> INFO: frame (failed synchr.): 0
[23:48:03.785] <TB2> INFO: idle data (no TBM trl): 0
[23:48:03.785] <TB2> INFO: no data (only TBM hdr): 0
[23:48:03.785] <TB2> INFO: TBM errors: 0
[23:48:03.785] <TB2> INFO: flawed TBM headers: 0
[23:48:03.785] <TB2> INFO: flawed TBM trailers: 0
[23:48:03.785] <TB2> INFO: event ID mismatches: 0
[23:48:03.785] <TB2> INFO: ROC errors: 0
[23:48:03.785] <TB2> INFO: missing ROC header(s): 0
[23:48:03.785] <TB2> INFO: misplaced readback start: 0
[23:48:03.785] <TB2> INFO: Pixel decoding errors: 0
[23:48:03.785] <TB2> INFO: pixel data incomplete: 0
[23:48:03.785] <TB2> INFO: pixel address: 0
[23:48:03.785] <TB2> INFO: pulse height fill bit: 0
[23:48:03.785] <TB2> INFO: buffer corruption: 0
[23:48:03.803] <TB2> INFO: Decoding statistics:
[23:48:03.803] <TB2> INFO: General information:
[23:48:03.803] <TB2> INFO: 16bit words read: 3451466
[23:48:03.803] <TB2> INFO: valid events total: 353536
[23:48:03.803] <TB2> INFO: empty events: 18253
[23:48:03.803] <TB2> INFO: valid events with pixels: 335283
[23:48:03.803] <TB2> INFO: valid pixel hits: 665125
[23:48:03.803] <TB2> INFO: Event errors: 0
[23:48:03.803] <TB2> INFO: start marker: 0
[23:48:03.803] <TB2> INFO: stop marker: 0
[23:48:03.803] <TB2> INFO: overflow: 0
[23:48:03.803] <TB2> INFO: invalid 5bit words: 0
[23:48:03.804] <TB2> INFO: invalid XOR eye diagram: 0
[23:48:03.804] <TB2> INFO: frame (failed synchr.): 0
[23:48:03.804] <TB2> INFO: idle data (no TBM trl): 0
[23:48:03.804] <TB2> INFO: no data (only TBM hdr): 0
[23:48:03.804] <TB2> INFO: TBM errors: 0
[23:48:03.804] <TB2> INFO: flawed TBM headers: 0
[23:48:03.804] <TB2> INFO: flawed TBM trailers: 0
[23:48:03.804] <TB2> INFO: event ID mismatches: 0
[23:48:03.804] <TB2> INFO: ROC errors: 0
[23:48:03.804] <TB2> INFO: missing ROC header(s): 0
[23:48:03.804] <TB2> INFO: misplaced readback start: 0
[23:48:03.804] <TB2> INFO: Pixel decoding errors: 0
[23:48:03.804] <TB2> INFO: pixel data incomplete: 0
[23:48:03.804] <TB2> INFO: pixel address: 0
[23:48:03.804] <TB2> INFO: pulse height fill bit: 0
[23:48:03.804] <TB2> INFO: buffer corruption: 0
[23:48:03.804] <TB2> INFO: enter test to run
[23:48:03.804] <TB2> INFO: test: exit no parameter change
[23:48:03.926] <TB2> QUIET: Connection to board 149 closed.
[23:48:03.927] <TB2> INFO: pXar: this is the end, my friend