[20:43:56.599] <TB2> INFO: *** Welcome to pxar ***
[20:43:56.599] <TB2> INFO: *** Today: 2016/10/19
[20:43:56.605] <TB2> INFO: *** Version: c8ba-dirty
[20:43:56.605] <TB2> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters_C15.dat
[20:43:56.605] <TB2> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//tbmParameters_C1b.dat
[20:43:56.605] <TB2> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//defaultMaskFile.dat
[20:43:56.605] <TB2> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//trimParameters_C15.dat
[20:43:56.666] <TB2> INFO: clk: 4
[20:43:56.666] <TB2> INFO: ctr: 4
[20:43:56.666] <TB2> INFO: sda: 19
[20:43:56.666] <TB2> INFO: tin: 9
[20:43:56.666] <TB2> INFO: level: 15
[20:43:56.666] <TB2> INFO: triggerdelay: 0
[20:43:56.666] <TB2> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[20:43:56.666] <TB2> INFO: Log level: INFO
[20:43:56.674] <TB2> INFO: Found DTB DTB_WWXUD2
[20:43:56.681] <TB2> QUIET: Connection to board DTB_WWXUD2 opened.
[20:43:56.683] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 149
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWXUD2
MAC address: 40D855118095
Hostname: pixelDTB149
Comment:
------------------------------------------------------
[20:43:56.685] <TB2> INFO: RPC call hashes of host and DTB match: 486171790
[20:43:58.176] <TB2> INFO: DUT info:
[20:43:58.177] <TB2> INFO: The DUT currently contains the following objects:
[20:43:58.177] <TB2> INFO: 4 TBM Cores tbm10c (4 ON)
[20:43:58.177] <TB2> INFO: TBM Core alpha (0): 7 registers set
[20:43:58.177] <TB2> INFO: TBM Core beta (1): 7 registers set
[20:43:58.177] <TB2> INFO: TBM Core alpha (2): 7 registers set
[20:43:58.177] <TB2> INFO: TBM Core beta (3): 7 registers set
[20:43:58.177] <TB2> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[20:43:58.177] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[20:43:58.177] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[20:43:58.177] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[20:43:58.177] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[20:43:58.177] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[20:43:58.177] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[20:43:58.177] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[20:43:58.177] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[20:43:58.177] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[20:43:58.177] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[20:43:58.177] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[20:43:58.177] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[20:43:58.177] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[20:43:58.177] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[20:43:58.177] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[20:43:58.177] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[20:43:58.578] <TB2> INFO: enter 'restricted' command line mode
[20:43:58.578] <TB2> INFO: enter test to run
[20:43:58.578] <TB2> INFO: test: pretest no parameter change
[20:43:58.578] <TB2> INFO: running: pretest
[20:43:58.583] <TB2> INFO: ######################################################################
[20:43:58.584] <TB2> INFO: PixTestPretest::doTest()
[20:43:58.584] <TB2> INFO: ######################################################################
[20:43:58.585] <TB2> INFO: ----------------------------------------------------------------------
[20:43:58.585] <TB2> INFO: PixTestPretest::programROC()
[20:43:58.585] <TB2> INFO: ----------------------------------------------------------------------
[20:44:16.599] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[20:44:16.599] <TB2> INFO: IA differences per ROC: 19.3 17.7 17.7 21.7 20.1 20.9 19.3 19.3 17.7 17.7 21.7 17.7 20.9 21.7 20.1 19.3
[20:44:16.657] <TB2> INFO: ----------------------------------------------------------------------
[20:44:16.657] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[20:44:16.657] <TB2> INFO: ----------------------------------------------------------------------
[20:44:37.953] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 381 mA = 23.8125 mA/ROC
[20:44:37.953] <TB2> INFO: i(loss) [mA/ROC]: 19.2 20.1 19.2 19.2 19.2 19.2 20.1 19.2 17.6 20.1 19.2 19.2 18.4 19.2 19.2 20.1
[20:44:37.986] <TB2> INFO: ----------------------------------------------------------------------
[20:44:37.986] <TB2> INFO: PixTestPretest::findTiming()
[20:44:37.986] <TB2> INFO: ----------------------------------------------------------------------
[20:44:37.986] <TB2> INFO: PixTestCmd::init()

[20:45:10.245] <TB2> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[20:45:10.245] <TB2> INFO: (success/tries = 100/100), width = 3
[20:45:11.749] <TB2> INFO: ----------------------------------------------------------------------
[20:45:11.749] <TB2> INFO: PixTestPretest::findWorkingPixel()
[20:45:11.749] <TB2> INFO: ----------------------------------------------------------------------
[20:45:11.844] <TB2> INFO: Expecting 231680 events.
[20:45:21.712] <TB2> INFO: 231680 events read in total (9276ms).
[20:45:21.721] <TB2> INFO: Test took 9967ms.
[20:45:21.957] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[20:45:21.989] <TB2> INFO: ----------------------------------------------------------------------
[20:45:21.989] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[20:45:21.989] <TB2> INFO: ----------------------------------------------------------------------
[20:45:22.084] <TB2> INFO: Expecting 231680 events.
[20:45:32.036] <TB2> INFO: 231680 events read in total (9360ms).
[20:45:32.044] <TB2> INFO: Test took 10049ms.
[20:45:32.294] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[20:45:32.294] <TB2> INFO: CalDel: 111 102 104 110 110 103 107 97 122 111 98 92 107 120 94 103
[20:45:32.294] <TB2> INFO: VthrComp: 51 52 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[20:45:32.298] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters_C0.dat
[20:45:32.298] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters_C1.dat
[20:45:32.298] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters_C2.dat
[20:45:32.299] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters_C3.dat
[20:45:32.299] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters_C4.dat
[20:45:32.299] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters_C5.dat
[20:45:32.299] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters_C6.dat
[20:45:32.299] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters_C7.dat
[20:45:32.299] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters_C8.dat
[20:45:32.299] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters_C9.dat
[20:45:32.299] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters_C10.dat
[20:45:32.299] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters_C11.dat
[20:45:32.300] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters_C12.dat
[20:45:32.300] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters_C13.dat
[20:45:32.300] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters_C14.dat
[20:45:32.300] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters_C15.dat
[20:45:32.300] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//tbmParameters_C0a.dat
[20:45:32.300] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//tbmParameters_C0b.dat
[20:45:32.300] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//tbmParameters_C1a.dat
[20:45:32.300] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//tbmParameters_C1b.dat
[20:45:32.300] <TB2> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[20:45:32.350] <TB2> INFO: enter test to run
[20:45:32.350] <TB2> INFO: test: FullTest no parameter change
[20:45:32.350] <TB2> INFO: running: fulltest
[20:45:32.350] <TB2> INFO: ######################################################################
[20:45:32.350] <TB2> INFO: PixTestFullTest::doTest()
[20:45:32.350] <TB2> INFO: ######################################################################
[20:45:32.352] <TB2> INFO: ######################################################################
[20:45:32.352] <TB2> INFO: PixTestAlive::doTest()
[20:45:32.352] <TB2> INFO: ######################################################################
[20:45:32.353] <TB2> INFO: ----------------------------------------------------------------------
[20:45:32.353] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:45:32.353] <TB2> INFO: ----------------------------------------------------------------------
[20:45:32.634] <TB2> INFO: Expecting 41600 events.
[20:45:36.141] <TB2> INFO: 41600 events read in total (2916ms).
[20:45:36.141] <TB2> INFO: Test took 3787ms.
[20:45:36.368] <TB2> INFO: PixTestAlive::aliveTest() done
[20:45:36.368] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:45:36.369] <TB2> INFO: ----------------------------------------------------------------------
[20:45:36.369] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:45:36.369] <TB2> INFO: ----------------------------------------------------------------------
[20:45:36.607] <TB2> INFO: Expecting 41600 events.
[20:45:39.572] <TB2> INFO: 41600 events read in total (2373ms).
[20:45:39.573] <TB2> INFO: Test took 3203ms.
[20:45:39.573] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[20:45:39.818] <TB2> INFO: PixTestAlive::maskTest() done
[20:45:39.818] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:45:39.820] <TB2> INFO: ----------------------------------------------------------------------
[20:45:39.820] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:45:39.820] <TB2> INFO: ----------------------------------------------------------------------
[20:45:40.063] <TB2> INFO: Expecting 41600 events.
[20:45:43.695] <TB2> INFO: 41600 events read in total (3039ms).
[20:45:43.696] <TB2> INFO: Test took 3874ms.
[20:45:43.932] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[20:45:43.932] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:45:43.932] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[20:45:43.932] <TB2> INFO: Decoding statistics:
[20:45:43.932] <TB2> INFO: General information:
[20:45:43.932] <TB2> INFO: 16bit words read: 0
[20:45:43.932] <TB2> INFO: valid events total: 0
[20:45:43.932] <TB2> INFO: empty events: 0
[20:45:43.932] <TB2> INFO: valid events with pixels: 0
[20:45:43.932] <TB2> INFO: valid pixel hits: 0
[20:45:43.932] <TB2> INFO: Event errors: 0
[20:45:43.932] <TB2> INFO: start marker: 0
[20:45:43.932] <TB2> INFO: stop marker: 0
[20:45:43.932] <TB2> INFO: overflow: 0
[20:45:43.932] <TB2> INFO: invalid 5bit words: 0
[20:45:43.932] <TB2> INFO: invalid XOR eye diagram: 0
[20:45:43.932] <TB2> INFO: frame (failed synchr.): 0
[20:45:43.932] <TB2> INFO: idle data (no TBM trl): 0
[20:45:43.932] <TB2> INFO: no data (only TBM hdr): 0
[20:45:43.932] <TB2> INFO: TBM errors: 0
[20:45:43.932] <TB2> INFO: flawed TBM headers: 0
[20:45:43.932] <TB2> INFO: flawed TBM trailers: 0
[20:45:43.933] <TB2> INFO: event ID mismatches: 0
[20:45:43.933] <TB2> INFO: ROC errors: 0
[20:45:43.933] <TB2> INFO: missing ROC header(s): 0
[20:45:43.933] <TB2> INFO: misplaced readback start: 0
[20:45:43.933] <TB2> INFO: Pixel decoding errors: 0
[20:45:43.933] <TB2> INFO: pixel data incomplete: 0
[20:45:43.933] <TB2> INFO: pixel address: 0
[20:45:43.933] <TB2> INFO: pulse height fill bit: 0
[20:45:43.933] <TB2> INFO: buffer corruption: 0
[20:45:43.939] <TB2> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C15.dat
[20:45:43.940] <TB2> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[20:45:43.940] <TB2> INFO: ######################################################################
[20:45:43.940] <TB2> INFO: PixTestReadback::doTest()
[20:45:43.940] <TB2> INFO: ######################################################################
[20:45:43.940] <TB2> INFO: ----------------------------------------------------------------------
[20:45:43.940] <TB2> INFO: PixTestReadback::CalibrateVd()
[20:45:43.940] <TB2> INFO: ----------------------------------------------------------------------
[20:45:53.913] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C0.dat
[20:45:53.913] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C1.dat
[20:45:53.913] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C2.dat
[20:45:53.913] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C3.dat
[20:45:53.913] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C4.dat
[20:45:53.914] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C5.dat
[20:45:53.914] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C6.dat
[20:45:53.914] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C7.dat
[20:45:53.914] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C8.dat
[20:45:53.914] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C9.dat
[20:45:53.914] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C10.dat
[20:45:53.914] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C11.dat
[20:45:53.914] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C12.dat
[20:45:53.914] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C13.dat
[20:45:53.914] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C14.dat
[20:45:53.914] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C15.dat
[20:45:53.947] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[20:45:53.947] <TB2> INFO: ----------------------------------------------------------------------
[20:45:53.947] <TB2> INFO: PixTestReadback::CalibrateVa()
[20:45:53.947] <TB2> INFO: ----------------------------------------------------------------------
[20:46:03.882] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C0.dat
[20:46:03.882] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C1.dat
[20:46:03.882] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C2.dat
[20:46:03.883] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C3.dat
[20:46:03.883] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C4.dat
[20:46:03.883] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C5.dat
[20:46:03.883] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C6.dat
[20:46:03.883] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C7.dat
[20:46:03.883] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C8.dat
[20:46:03.883] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C9.dat
[20:46:03.883] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C10.dat
[20:46:03.883] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C11.dat
[20:46:03.883] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C12.dat
[20:46:03.883] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C13.dat
[20:46:03.883] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C14.dat
[20:46:03.883] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C15.dat
[20:46:03.914] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[20:46:03.914] <TB2> INFO: ----------------------------------------------------------------------
[20:46:03.914] <TB2> INFO: PixTestReadback::readbackVbg()
[20:46:03.914] <TB2> INFO: ----------------------------------------------------------------------
[20:46:11.583] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[20:46:11.583] <TB2> INFO: ----------------------------------------------------------------------
[20:46:11.583] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[20:46:11.583] <TB2> INFO: ----------------------------------------------------------------------
[20:46:11.583] <TB2> INFO: Vbg will be calibrated using Vd calibration
[20:46:11.583] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 152.2calibrated Vbg = 1.18214 :::*/*/*/*/
[20:46:11.583] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 148.7calibrated Vbg = 1.18039 :::*/*/*/*/
[20:46:11.583] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 154.2calibrated Vbg = 1.18128 :::*/*/*/*/
[20:46:11.583] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 157.4calibrated Vbg = 1.17434 :::*/*/*/*/
[20:46:11.583] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 153.9calibrated Vbg = 1.18268 :::*/*/*/*/
[20:46:11.583] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 164.8calibrated Vbg = 1.18179 :::*/*/*/*/
[20:46:11.583] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 161.1calibrated Vbg = 1.18243 :::*/*/*/*/
[20:46:11.583] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 156.9calibrated Vbg = 1.1878 :::*/*/*/*/
[20:46:11.584] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 150calibrated Vbg = 1.17725 :::*/*/*/*/
[20:46:11.584] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 145.1calibrated Vbg = 1.17288 :::*/*/*/*/
[20:46:11.584] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 144.3calibrated Vbg = 1.17086 :::*/*/*/*/
[20:46:11.584] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 152.7calibrated Vbg = 1.16245 :::*/*/*/*/
[20:46:11.584] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 164.1calibrated Vbg = 1.17683 :::*/*/*/*/
[20:46:11.584] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 156.9calibrated Vbg = 1.18285 :::*/*/*/*/
[20:46:11.584] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 155.6calibrated Vbg = 1.17617 :::*/*/*/*/
[20:46:11.584] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 153.4calibrated Vbg = 1.18249 :::*/*/*/*/
[20:46:11.587] <TB2> INFO: ----------------------------------------------------------------------
[20:46:11.587] <TB2> INFO: PixTestReadback::CalibrateIa()
[20:46:11.587] <TB2> INFO: ----------------------------------------------------------------------
[20:48:52.364] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C0.dat
[20:48:52.364] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C1.dat
[20:48:52.364] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C2.dat
[20:48:52.364] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C3.dat
[20:48:52.364] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C4.dat
[20:48:52.364] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C5.dat
[20:48:52.364] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C6.dat
[20:48:52.364] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C7.dat
[20:48:52.364] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C8.dat
[20:48:52.364] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C9.dat
[20:48:52.364] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C10.dat
[20:48:52.364] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C11.dat
[20:48:52.364] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C12.dat
[20:48:52.364] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C13.dat
[20:48:52.364] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C14.dat
[20:48:52.364] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//readbackCal_C15.dat
[20:48:52.393] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[20:48:52.396] <TB2> INFO: PixTestReadback::doTest() done
[20:48:52.396] <TB2> INFO: Decoding statistics:
[20:48:52.396] <TB2> INFO: General information:
[20:48:52.396] <TB2> INFO: 16bit words read: 1536
[20:48:52.396] <TB2> INFO: valid events total: 256
[20:48:52.396] <TB2> INFO: empty events: 256
[20:48:52.396] <TB2> INFO: valid events with pixels: 0
[20:48:52.396] <TB2> INFO: valid pixel hits: 0
[20:48:52.396] <TB2> INFO: Event errors: 0
[20:48:52.396] <TB2> INFO: start marker: 0
[20:48:52.396] <TB2> INFO: stop marker: 0
[20:48:52.396] <TB2> INFO: overflow: 0
[20:48:52.396] <TB2> INFO: invalid 5bit words: 0
[20:48:52.396] <TB2> INFO: invalid XOR eye diagram: 0
[20:48:52.396] <TB2> INFO: frame (failed synchr.): 0
[20:48:52.396] <TB2> INFO: idle data (no TBM trl): 0
[20:48:52.396] <TB2> INFO: no data (only TBM hdr): 0
[20:48:52.396] <TB2> INFO: TBM errors: 0
[20:48:52.396] <TB2> INFO: flawed TBM headers: 0
[20:48:52.396] <TB2> INFO: flawed TBM trailers: 0
[20:48:52.396] <TB2> INFO: event ID mismatches: 0
[20:48:52.396] <TB2> INFO: ROC errors: 0
[20:48:52.396] <TB2> INFO: missing ROC header(s): 0
[20:48:52.396] <TB2> INFO: misplaced readback start: 0
[20:48:52.396] <TB2> INFO: Pixel decoding errors: 0
[20:48:52.396] <TB2> INFO: pixel data incomplete: 0
[20:48:52.396] <TB2> INFO: pixel address: 0
[20:48:52.397] <TB2> INFO: pulse height fill bit: 0
[20:48:52.397] <TB2> INFO: buffer corruption: 0
[20:48:52.447] <TB2> INFO: ######################################################################
[20:48:52.447] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[20:48:52.447] <TB2> INFO: ######################################################################
[20:48:52.449] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[20:48:52.462] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:48:52.462] <TB2> INFO: run 1 of 1
[20:48:52.698] <TB2> INFO: Expecting 3120000 events.
[20:49:23.480] <TB2> INFO: 663475 events read in total (30190ms).











[20:49:53.518] <TB2> INFO: 1322710 events read in total (60228ms).











[20:50:23.247] <TB2> INFO: 1978720 events read in total (89957ms).











[20:50:52.862] <TB2> INFO: 2631730 events read in total (119572ms).











[20:51:14.946] <TB2> INFO: 3120000 events read in total (141656ms).
[20:51:15.011] <TB2> INFO: Test took 142550ms.
[20:51:39.098] <TB2> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 166 seconds
[20:51:39.098] <TB2> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
[20:51:39.098] <TB2> INFO: separation cut (per ROC): 106 105 105 115 104 107 100 111 97 104 101 106 106 106 103 106
[20:51:39.098] <TB2> INFO: Decoding statistics:
[20:51:39.098] <TB2> INFO: General information:
[20:51:39.098] <TB2> INFO: 16bit words read: 0
[20:51:39.099] <TB2> INFO: valid events total: 0
[20:51:39.099] <TB2> INFO: empty events: 0
[20:51:39.099] <TB2> INFO: valid events with pixels: 0
[20:51:39.099] <TB2> INFO: valid pixel hits: 0
[20:51:39.099] <TB2> INFO: Event errors: 0
[20:51:39.099] <TB2> INFO: start marker: 0
[20:51:39.099] <TB2> INFO: stop marker: 0
[20:51:39.099] <TB2> INFO: overflow: 0
[20:51:39.099] <TB2> INFO: invalid 5bit words: 0
[20:51:39.099] <TB2> INFO: invalid XOR eye diagram: 0
[20:51:39.099] <TB2> INFO: frame (failed synchr.): 0
[20:51:39.099] <TB2> INFO: idle data (no TBM trl): 0
[20:51:39.099] <TB2> INFO: no data (only TBM hdr): 0
[20:51:39.099] <TB2> INFO: TBM errors: 0
[20:51:39.099] <TB2> INFO: flawed TBM headers: 0
[20:51:39.099] <TB2> INFO: flawed TBM trailers: 0
[20:51:39.099] <TB2> INFO: event ID mismatches: 0
[20:51:39.099] <TB2> INFO: ROC errors: 0
[20:51:39.099] <TB2> INFO: missing ROC header(s): 0
[20:51:39.099] <TB2> INFO: misplaced readback start: 0
[20:51:39.099] <TB2> INFO: Pixel decoding errors: 0
[20:51:39.099] <TB2> INFO: pixel data incomplete: 0
[20:51:39.099] <TB2> INFO: pixel address: 0
[20:51:39.099] <TB2> INFO: pulse height fill bit: 0
[20:51:39.099] <TB2> INFO: buffer corruption: 0
[20:51:39.145] <TB2> INFO: ######################################################################
[20:51:39.145] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[20:51:39.145] <TB2> INFO: ######################################################################
[20:51:39.145] <TB2> INFO: ----------------------------------------------------------------------
[20:51:39.145] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[20:51:39.145] <TB2> INFO: ----------------------------------------------------------------------
[20:51:39.145] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[20:51:39.160] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[20:51:39.160] <TB2> INFO: run 1 of 1
[20:51:39.427] <TB2> INFO: Expecting 36608000 events.
[20:52:02.947] <TB2> INFO: 668650 events read in total (22928ms).
[20:52:25.594] <TB2> INFO: 1328950 events read in total (45575ms).
[20:52:48.150] <TB2> INFO: 1986950 events read in total (68131ms).
[20:53:10.954] <TB2> INFO: 2644050 events read in total (90935ms).
[20:53:33.759] <TB2> INFO: 3300850 events read in total (113740ms).
[20:53:56.443] <TB2> INFO: 3958950 events read in total (136424ms).
[20:54:19.113] <TB2> INFO: 4616150 events read in total (159094ms).
[20:54:42.038] <TB2> INFO: 5270450 events read in total (182019ms).
[20:55:04.568] <TB2> INFO: 5925650 events read in total (204549ms).
[20:55:27.285] <TB2> INFO: 6580950 events read in total (227266ms).
[20:55:50.055] <TB2> INFO: 7236800 events read in total (250036ms).
[20:56:13.131] <TB2> INFO: 7891500 events read in total (273112ms).
[20:56:35.567] <TB2> INFO: 8545700 events read in total (295548ms).
[20:56:57.949] <TB2> INFO: 9200500 events read in total (317930ms).
[20:57:20.592] <TB2> INFO: 9852400 events read in total (340573ms).
[20:57:43.363] <TB2> INFO: 10506100 events read in total (363344ms).
[20:58:06.045] <TB2> INFO: 11159200 events read in total (386026ms).
[20:58:28.631] <TB2> INFO: 11815200 events read in total (408612ms).
[20:58:51.462] <TB2> INFO: 12469200 events read in total (431443ms).
[20:59:14.042] <TB2> INFO: 13124650 events read in total (454023ms).
[20:59:36.837] <TB2> INFO: 13777700 events read in total (476818ms).
[20:59:59.455] <TB2> INFO: 14431150 events read in total (499436ms).
[21:00:22.015] <TB2> INFO: 15085000 events read in total (521996ms).
[21:00:44.594] <TB2> INFO: 15736150 events read in total (544575ms).
[21:01:07.144] <TB2> INFO: 16388850 events read in total (567125ms).
[21:01:29.579] <TB2> INFO: 17042200 events read in total (589560ms).
[21:01:52.023] <TB2> INFO: 17693600 events read in total (612004ms).
[21:02:14.482] <TB2> INFO: 18343150 events read in total (634463ms).
[21:02:37.395] <TB2> INFO: 18992250 events read in total (657376ms).
[21:03:00.149] <TB2> INFO: 19641500 events read in total (680130ms).
[21:03:22.786] <TB2> INFO: 20290550 events read in total (702767ms).
[21:03:45.554] <TB2> INFO: 20939800 events read in total (725535ms).
[21:04:08.249] <TB2> INFO: 21587800 events read in total (748230ms).
[21:04:30.956] <TB2> INFO: 22236050 events read in total (770937ms).
[21:04:53.687] <TB2> INFO: 22884750 events read in total (793668ms).
[21:05:15.989] <TB2> INFO: 23532800 events read in total (815970ms).
[21:05:38.548] <TB2> INFO: 24180400 events read in total (838529ms).
[21:06:01.279] <TB2> INFO: 24829450 events read in total (861260ms).
[21:06:24.188] <TB2> INFO: 25477250 events read in total (884169ms).
[21:06:46.710] <TB2> INFO: 26123750 events read in total (906691ms).
[21:07:09.176] <TB2> INFO: 26770600 events read in total (929157ms).
[21:07:31.661] <TB2> INFO: 27418650 events read in total (951642ms).
[21:07:54.321] <TB2> INFO: 28067050 events read in total (974302ms).
[21:08:16.940] <TB2> INFO: 28712900 events read in total (996921ms).
[21:08:39.645] <TB2> INFO: 29360800 events read in total (1019626ms).
[21:09:02.326] <TB2> INFO: 30006700 events read in total (1042307ms).
[21:09:25.145] <TB2> INFO: 30654700 events read in total (1065126ms).
[21:09:47.811] <TB2> INFO: 31300700 events read in total (1087792ms).
[21:10:10.479] <TB2> INFO: 31949000 events read in total (1110460ms).
[21:10:33.101] <TB2> INFO: 32596250 events read in total (1133082ms).
[21:10:55.584] <TB2> INFO: 33244150 events read in total (1155565ms).
[21:11:18.310] <TB2> INFO: 33893400 events read in total (1178291ms).
[21:11:41.337] <TB2> INFO: 34540000 events read in total (1201319ms).
[21:12:03.896] <TB2> INFO: 35187000 events read in total (1223877ms).
[21:12:26.727] <TB2> INFO: 35835700 events read in total (1246708ms).
[21:12:50.175] <TB2> INFO: 36493500 events read in total (1270156ms).
[21:12:54.631] <TB2> INFO: 36608000 events read in total (1274612ms).
[21:12:54.716] <TB2> INFO: Test took 1275556ms.
[21:12:55.334] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:12:57.438] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:12:59.319] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:13:01.045] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:13:02.549] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:13:03.990] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:13:05.514] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:13:06.960] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:13:08.856] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:13:10.985] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:13:12.972] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:13:14.949] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:13:17.051] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:13:18.572] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:13:20.135] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:13:21.689] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:13:23.231] <TB2> INFO: PixTestScurves::scurves() done
[21:13:23.231] <TB2> INFO: Vcal mean: 112.49 114.31 100.79 113.16 118.37 113.76 99.24 112.83 107.75 105.35 103.95 107.15 111.31 113.33 109.26 111.22
[21:13:23.231] <TB2> INFO: Vcal RMS: 5.77 5.11 5.45 4.91 5.63 5.23 4.85 4.95 5.03 5.28 5.37 5.01 5.12 5.57 4.74 4.96
[21:13:23.231] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1304 seconds
[21:13:23.231] <TB2> INFO: Decoding statistics:
[21:13:23.231] <TB2> INFO: General information:
[21:13:23.231] <TB2> INFO: 16bit words read: 0
[21:13:23.231] <TB2> INFO: valid events total: 0
[21:13:23.231] <TB2> INFO: empty events: 0
[21:13:23.231] <TB2> INFO: valid events with pixels: 0
[21:13:23.231] <TB2> INFO: valid pixel hits: 0
[21:13:23.231] <TB2> INFO: Event errors: 0
[21:13:23.231] <TB2> INFO: start marker: 0
[21:13:23.231] <TB2> INFO: stop marker: 0
[21:13:23.231] <TB2> INFO: overflow: 0
[21:13:23.231] <TB2> INFO: invalid 5bit words: 0
[21:13:23.231] <TB2> INFO: invalid XOR eye diagram: 0
[21:13:23.231] <TB2> INFO: frame (failed synchr.): 0
[21:13:23.231] <TB2> INFO: idle data (no TBM trl): 0
[21:13:23.231] <TB2> INFO: no data (only TBM hdr): 0
[21:13:23.231] <TB2> INFO: TBM errors: 0
[21:13:23.231] <TB2> INFO: flawed TBM headers: 0
[21:13:23.231] <TB2> INFO: flawed TBM trailers: 0
[21:13:23.231] <TB2> INFO: event ID mismatches: 0
[21:13:23.231] <TB2> INFO: ROC errors: 0
[21:13:23.231] <TB2> INFO: missing ROC header(s): 0
[21:13:23.231] <TB2> INFO: misplaced readback start: 0
[21:13:23.231] <TB2> INFO: Pixel decoding errors: 0
[21:13:23.231] <TB2> INFO: pixel data incomplete: 0
[21:13:23.231] <TB2> INFO: pixel address: 0
[21:13:23.231] <TB2> INFO: pulse height fill bit: 0
[21:13:23.231] <TB2> INFO: buffer corruption: 0
[21:13:23.296] <TB2> INFO: ######################################################################
[21:13:23.296] <TB2> INFO: PixTestTrim::doTest()
[21:13:23.296] <TB2> INFO: ######################################################################
[21:13:23.297] <TB2> INFO: ----------------------------------------------------------------------
[21:13:23.298] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[21:13:23.298] <TB2> INFO: ----------------------------------------------------------------------
[21:13:23.338] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[21:13:23.338] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[21:13:23.350] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:13:23.351] <TB2> INFO: run 1 of 1
[21:13:23.587] <TB2> INFO: Expecting 5025280 events.
[21:13:53.586] <TB2> INFO: 816408 events read in total (29389ms).
[21:14:23.327] <TB2> INFO: 1629824 events read in total (59130ms).
[21:14:52.864] <TB2> INFO: 2441240 events read in total (88668ms).
[21:15:22.876] <TB2> INFO: 3250608 events read in total (118679ms).
[21:15:52.821] <TB2> INFO: 4056440 events read in total (148624ms).
[21:16:23.071] <TB2> INFO: 4859824 events read in total (178874ms).
[21:16:29.573] <TB2> INFO: 5025280 events read in total (185376ms).
[21:16:29.625] <TB2> INFO: Test took 186274ms.
[21:16:50.777] <TB2> INFO: ROC 0 VthrComp = 116
[21:16:50.777] <TB2> INFO: ROC 1 VthrComp = 121
[21:16:50.777] <TB2> INFO: ROC 2 VthrComp = 107
[21:16:50.777] <TB2> INFO: ROC 3 VthrComp = 123
[21:16:50.777] <TB2> INFO: ROC 4 VthrComp = 122
[21:16:50.778] <TB2> INFO: ROC 5 VthrComp = 119
[21:16:50.778] <TB2> INFO: ROC 6 VthrComp = 108
[21:16:50.778] <TB2> INFO: ROC 7 VthrComp = 118
[21:16:50.779] <TB2> INFO: ROC 8 VthrComp = 108
[21:16:50.779] <TB2> INFO: ROC 9 VthrComp = 112
[21:16:50.779] <TB2> INFO: ROC 10 VthrComp = 114
[21:16:50.779] <TB2> INFO: ROC 11 VthrComp = 112
[21:16:50.779] <TB2> INFO: ROC 12 VthrComp = 116
[21:16:50.779] <TB2> INFO: ROC 13 VthrComp = 114
[21:16:50.779] <TB2> INFO: ROC 14 VthrComp = 117
[21:16:50.779] <TB2> INFO: ROC 15 VthrComp = 119
[21:16:51.017] <TB2> INFO: Expecting 41600 events.
[21:16:54.559] <TB2> INFO: 41600 events read in total (2950ms).
[21:16:54.559] <TB2> INFO: Test took 3778ms.
[21:16:54.568] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[21:16:54.569] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[21:16:54.580] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:16:54.580] <TB2> INFO: run 1 of 1
[21:16:54.858] <TB2> INFO: Expecting 5025280 events.
[21:17:21.291] <TB2> INFO: 589000 events read in total (25841ms).
[21:17:47.484] <TB2> INFO: 1177648 events read in total (52034ms).
[21:18:13.016] <TB2> INFO: 1766496 events read in total (77566ms).
[21:18:38.811] <TB2> INFO: 2354776 events read in total (103361ms).
[21:19:04.479] <TB2> INFO: 2941432 events read in total (129029ms).
[21:19:30.378] <TB2> INFO: 3526880 events read in total (154928ms).
[21:19:55.906] <TB2> INFO: 4111592 events read in total (180456ms).
[21:20:21.273] <TB2> INFO: 4695592 events read in total (205823ms).
[21:20:36.846] <TB2> INFO: 5025280 events read in total (221396ms).
[21:20:36.916] <TB2> INFO: Test took 222336ms.
[21:21:01.362] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 59.9047 for pixel 7/16 mean/min/max = 45.9841/31.9658/60.0024
[21:21:01.363] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 58.9762 for pixel 0/5 mean/min/max = 45.2159/31.408/59.0237
[21:21:01.363] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 59.39 for pixel 11/1 mean/min/max = 47.0752/34.6207/59.5297
[21:21:01.363] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 58.6572 for pixel 5/4 mean/min/max = 45.3765/32.0639/58.689
[21:21:01.364] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 60.5808 for pixel 51/12 mean/min/max = 45.9813/31.3137/60.649
[21:21:01.364] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 58.983 for pixel 22/6 mean/min/max = 45.4839/31.6818/59.286
[21:21:01.365] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 57.7327 for pixel 14/35 mean/min/max = 46.1358/34.4144/57.8571
[21:21:01.365] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 58.4997 for pixel 20/74 mean/min/max = 45.163/31.6283/58.6977
[21:21:01.366] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 61.9325 for pixel 30/3 mean/min/max = 48.2306/34.4573/62.0039
[21:21:01.366] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 58.6906 for pixel 17/4 mean/min/max = 45.5683/32.4364/58.7002
[21:21:01.367] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 58.9038 for pixel 12/76 mean/min/max = 45.438/31.9676/58.9083
[21:21:01.367] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 59.4883 for pixel 15/13 mean/min/max = 45.8398/32.1661/59.5135
[21:21:01.367] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 58.6892 for pixel 3/21 mean/min/max = 45.522/31.7566/59.2874
[21:21:01.368] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 60.0399 for pixel 46/74 mean/min/max = 46.1381/32.1739/60.1022
[21:21:01.368] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 58.5039 for pixel 8/0 mean/min/max = 45.2235/31.819/58.628
[21:21:01.369] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 58.3503 for pixel 14/70 mean/min/max = 44.7113/30.9682/58.4545
[21:21:01.369] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:21:01.457] <TB2> INFO: Expecting 411648 events.
[21:21:10.927] <TB2> INFO: 411648 events read in total (8878ms).
[21:21:10.935] <TB2> INFO: Expecting 411648 events.
[21:21:20.371] <TB2> INFO: 411648 events read in total (9033ms).
[21:21:20.382] <TB2> INFO: Expecting 411648 events.
[21:21:29.773] <TB2> INFO: 411648 events read in total (8988ms).
[21:21:29.786] <TB2> INFO: Expecting 411648 events.
[21:21:39.141] <TB2> INFO: 411648 events read in total (8952ms).
[21:21:39.156] <TB2> INFO: Expecting 411648 events.
[21:21:48.499] <TB2> INFO: 411648 events read in total (8940ms).
[21:21:48.522] <TB2> INFO: Expecting 411648 events.
[21:21:57.929] <TB2> INFO: 411648 events read in total (9004ms).
[21:21:57.951] <TB2> INFO: Expecting 411648 events.
[21:22:07.240] <TB2> INFO: 411648 events read in total (8886ms).
[21:22:07.265] <TB2> INFO: Expecting 411648 events.
[21:22:16.592] <TB2> INFO: 411648 events read in total (8924ms).
[21:22:16.619] <TB2> INFO: Expecting 411648 events.
[21:22:25.899] <TB2> INFO: 411648 events read in total (8877ms).
[21:22:25.928] <TB2> INFO: Expecting 411648 events.
[21:22:35.263] <TB2> INFO: 411648 events read in total (8932ms).
[21:22:35.295] <TB2> INFO: Expecting 411648 events.
[21:22:44.515] <TB2> INFO: 411648 events read in total (8817ms).
[21:22:44.559] <TB2> INFO: Expecting 411648 events.
[21:22:53.848] <TB2> INFO: 411648 events read in total (8886ms).
[21:22:53.886] <TB2> INFO: Expecting 411648 events.
[21:23:03.187] <TB2> INFO: 411648 events read in total (8898ms).
[21:23:03.229] <TB2> INFO: Expecting 411648 events.
[21:23:12.491] <TB2> INFO: 411648 events read in total (8859ms).
[21:23:12.548] <TB2> INFO: Expecting 411648 events.
[21:23:21.901] <TB2> INFO: 411648 events read in total (8950ms).
[21:23:21.950] <TB2> INFO: Expecting 411648 events.
[21:23:31.207] <TB2> INFO: 411648 events read in total (8854ms).
[21:23:31.278] <TB2> INFO: Test took 149909ms.
[21:23:32.067] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[21:23:32.081] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:23:32.081] <TB2> INFO: run 1 of 1
[21:23:32.359] <TB2> INFO: Expecting 5025280 events.
[21:23:58.591] <TB2> INFO: 586904 events read in total (25640ms).
[21:24:24.203] <TB2> INFO: 1172560 events read in total (51252ms).
[21:24:49.918] <TB2> INFO: 1756360 events read in total (76967ms).
[21:25:15.774] <TB2> INFO: 2341296 events read in total (102823ms).
[21:25:41.903] <TB2> INFO: 2925424 events read in total (128952ms).
[21:26:07.887] <TB2> INFO: 3509840 events read in total (154936ms).
[21:26:34.019] <TB2> INFO: 4093568 events read in total (181068ms).
[21:26:59.844] <TB2> INFO: 4676928 events read in total (206893ms).
[21:27:15.682] <TB2> INFO: 5025280 events read in total (222731ms).
[21:27:15.827] <TB2> INFO: Test took 223747ms.
[21:27:42.128] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 3.602908 .. 147.341267
[21:27:42.367] <TB2> INFO: Expecting 208000 events.
[21:27:51.956] <TB2> INFO: 208000 events read in total (8998ms).
[21:27:51.957] <TB2> INFO: Test took 9829ms.
[21:27:51.005] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 3 .. 157 (-1/-1) hits flags = 528 (plus default)
[21:27:52.018] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:27:52.018] <TB2> INFO: run 1 of 1
[21:27:52.298] <TB2> INFO: Expecting 5158400 events.
[21:28:18.244] <TB2> INFO: 581088 events read in total (25354ms).
[21:28:44.140] <TB2> INFO: 1161936 events read in total (51250ms).
[21:29:09.896] <TB2> INFO: 1742952 events read in total (77006ms).
[21:29:35.174] <TB2> INFO: 2323984 events read in total (102284ms).
[21:30:00.633] <TB2> INFO: 2904728 events read in total (127743ms).
[21:30:26.129] <TB2> INFO: 3485144 events read in total (153239ms).
[21:30:51.956] <TB2> INFO: 4065432 events read in total (179066ms).
[21:31:17.712] <TB2> INFO: 4645136 events read in total (204822ms).
[21:31:41.594] <TB2> INFO: 5158400 events read in total (228704ms).
[21:31:41.811] <TB2> INFO: Test took 229794ms.
[21:32:07.567] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 28.141038 .. 43.241962
[21:32:07.807] <TB2> INFO: Expecting 208000 events.
[21:32:17.795] <TB2> INFO: 208000 events read in total (9396ms).
[21:32:17.795] <TB2> INFO: Test took 10227ms.
[21:32:17.844] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 18 .. 53 (-1/-1) hits flags = 528 (plus default)
[21:32:17.857] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:32:17.857] <TB2> INFO: run 1 of 1
[21:32:18.135] <TB2> INFO: Expecting 1198080 events.
[21:32:46.802] <TB2> INFO: 662600 events read in total (28075ms).
[21:33:10.022] <TB2> INFO: 1198080 events read in total (51295ms).
[21:33:10.065] <TB2> INFO: Test took 52209ms.
[21:33:23.057] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 25.694296 .. 44.904833
[21:33:23.295] <TB2> INFO: Expecting 208000 events.
[21:33:32.949] <TB2> INFO: 208000 events read in total (9063ms).
[21:33:32.950] <TB2> INFO: Test took 9892ms.
[21:33:32.998] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 15 .. 54 (-1/-1) hits flags = 528 (plus default)
[21:33:33.011] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:33:33.011] <TB2> INFO: run 1 of 1
[21:33:33.288] <TB2> INFO: Expecting 1331200 events.
[21:34:01.551] <TB2> INFO: 671336 events read in total (27671ms).
[21:34:28.963] <TB2> INFO: 1331200 events read in total (55083ms).
[21:34:29.009] <TB2> INFO: Test took 55999ms.
[21:34:43.762] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 23.872498 .. 42.608680
[21:34:43.003] <TB2> INFO: Expecting 208000 events.
[21:34:53.911] <TB2> INFO: 208000 events read in total (9316ms).
[21:34:53.912] <TB2> INFO: Test took 10149ms.
[21:34:53.978] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 13 .. 52 (-1/-1) hits flags = 528 (plus default)
[21:34:53.992] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:34:53.992] <TB2> INFO: run 1 of 1
[21:34:54.270] <TB2> INFO: Expecting 1331200 events.
[21:35:23.025] <TB2> INFO: 688536 events read in total (28163ms).
[21:35:49.370] <TB2> INFO: 1331200 events read in total (54508ms).
[21:35:49.405] <TB2> INFO: Test took 55414ms.
[21:36:02.899] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[21:36:02.899] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[21:36:02.913] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:36:02.913] <TB2> INFO: run 1 of 1
[21:36:03.191] <TB2> INFO: Expecting 1364480 events.
[21:36:31.636] <TB2> INFO: 666792 events read in total (27853ms).
[21:37:00.027] <TB2> INFO: 1333000 events read in total (56245ms).
[21:37:01.740] <TB2> INFO: 1364480 events read in total (57958ms).
[21:37:01.774] <TB2> INFO: Test took 58861ms.
[21:37:19.567] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C0.dat
[21:37:19.567] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C1.dat
[21:37:19.567] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C2.dat
[21:37:19.567] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C3.dat
[21:37:19.567] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C4.dat
[21:37:19.567] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C5.dat
[21:37:19.567] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C6.dat
[21:37:19.567] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C7.dat
[21:37:19.567] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C8.dat
[21:37:19.567] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C9.dat
[21:37:19.568] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C10.dat
[21:37:19.568] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C11.dat
[21:37:19.568] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C12.dat
[21:37:19.568] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C13.dat
[21:37:19.568] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C14.dat
[21:37:19.568] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C15.dat
[21:37:19.568] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//trimParameters35_C0.dat
[21:37:19.573] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//trimParameters35_C1.dat
[21:37:19.578] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//trimParameters35_C2.dat
[21:37:19.583] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//trimParameters35_C3.dat
[21:37:19.587] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//trimParameters35_C4.dat
[21:37:19.592] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//trimParameters35_C5.dat
[21:37:19.597] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//trimParameters35_C6.dat
[21:37:19.602] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//trimParameters35_C7.dat
[21:37:19.608] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//trimParameters35_C8.dat
[21:37:19.613] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//trimParameters35_C9.dat
[21:37:19.618] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//trimParameters35_C10.dat
[21:37:19.623] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//trimParameters35_C11.dat
[21:37:19.628] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//trimParameters35_C12.dat
[21:37:19.632] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//trimParameters35_C13.dat
[21:37:19.637] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//trimParameters35_C14.dat
[21:37:19.642] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//trimParameters35_C15.dat
[21:37:19.646] <TB2> INFO: PixTestTrim::trimTest() done
[21:37:19.646] <TB2> INFO: vtrim: 119 129 113 124 124 146 125 118 132 114 122 122 127 119 126 134
[21:37:19.646] <TB2> INFO: vthrcomp: 116 121 107 123 122 119 108 118 108 112 114 112 116 114 117 119
[21:37:19.646] <TB2> INFO: vcal mean: 34.96 34.97 35.00 34.98 34.93 34.94 34.99 34.91 35.06 34.98 35.01 34.98 34.99 34.99 34.96 34.97
[21:37:19.646] <TB2> INFO: vcal RMS: 0.99 1.04 0.85 1.02 1.23 1.06 0.88 1.10 1.05 0.97 0.94 0.96 0.98 1.07 1.06 1.02
[21:37:19.646] <TB2> INFO: bits mean: 9.46 9.79 8.57 9.69 9.80 10.08 9.33 10.19 8.94 9.52 9.50 9.38 9.67 9.61 9.49 10.09
[21:37:19.647] <TB2> INFO: bits RMS: 2.76 2.69 2.59 2.63 2.59 2.50 2.41 2.44 2.49 2.63 2.71 2.74 2.65 2.61 2.78 2.61
[21:37:19.654] <TB2> INFO: ----------------------------------------------------------------------
[21:37:19.654] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[21:37:19.654] <TB2> INFO: ----------------------------------------------------------------------
[21:37:19.657] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[21:37:19.670] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:37:19.670] <TB2> INFO: run 1 of 1
[21:37:19.907] <TB2> INFO: Expecting 4160000 events.
[21:37:52.202] <TB2> INFO: 736635 events read in total (31703ms).
[21:38:23.961] <TB2> INFO: 1468805 events read in total (63462ms).
[21:38:55.763] <TB2> INFO: 2195930 events read in total (95264ms).
[21:39:27.781] <TB2> INFO: 2918540 events read in total (127282ms).
[21:39:59.581] <TB2> INFO: 3639820 events read in total (159082ms).
[21:40:22.501] <TB2> INFO: 4160000 events read in total (182002ms).
[21:40:22.578] <TB2> INFO: Test took 182909ms.
[21:40:50.348] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 197 (-1/-1) hits flags = 528 (plus default)
[21:40:50.361] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:40:50.361] <TB2> INFO: run 1 of 1
[21:40:50.596] <TB2> INFO: Expecting 4118400 events.
[21:41:22.500] <TB2> INFO: 715870 events read in total (31312ms).
[21:41:53.682] <TB2> INFO: 1427820 events read in total (62494ms).
[21:42:25.031] <TB2> INFO: 2135330 events read in total (93844ms).
[21:42:56.056] <TB2> INFO: 2838490 events read in total (124868ms).
[21:43:27.152] <TB2> INFO: 3540545 events read in total (155964ms).
[21:43:52.859] <TB2> INFO: 4118400 events read in total (181671ms).
[21:43:52.941] <TB2> INFO: Test took 182581ms.
[21:44:26.625] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 181 (-1/-1) hits flags = 528 (plus default)
[21:44:26.637] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:44:26.637] <TB2> INFO: run 1 of 1
[21:44:26.872] <TB2> INFO: Expecting 3785600 events.
[21:44:59.655] <TB2> INFO: 738325 events read in total (32191ms).
[21:45:31.553] <TB2> INFO: 1471905 events read in total (64089ms).
[21:46:03.196] <TB2> INFO: 2199265 events read in total (95732ms).
[21:46:35.062] <TB2> INFO: 2922640 events read in total (127598ms).
[21:47:06.672] <TB2> INFO: 3645555 events read in total (159208ms).
[21:47:13.292] <TB2> INFO: 3785600 events read in total (165828ms).
[21:47:13.441] <TB2> INFO: Test took 166803ms.
[21:47:39.675] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 182 (-1/-1) hits flags = 528 (plus default)
[21:47:39.689] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:47:39.689] <TB2> INFO: run 1 of 1
[21:47:39.927] <TB2> INFO: Expecting 3806400 events.
[21:48:12.010] <TB2> INFO: 736585 events read in total (31491ms).
[21:48:43.557] <TB2> INFO: 1468515 events read in total (63038ms).
[21:49:15.297] <TB2> INFO: 2194505 events read in total (94778ms).
[21:49:46.943] <TB2> INFO: 2916325 events read in total (126424ms).
[21:50:18.359] <TB2> INFO: 3637885 events read in total (157840ms).
[21:50:26.198] <TB2> INFO: 3806400 events read in total (165679ms).
[21:50:26.265] <TB2> INFO: Test took 166576ms.
[21:50:52.870] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 182 (-1/-1) hits flags = 528 (plus default)
[21:50:52.883] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:50:52.883] <TB2> INFO: run 1 of 1
[21:50:53.121] <TB2> INFO: Expecting 3806400 events.
[21:51:25.534] <TB2> INFO: 736600 events read in total (31821ms).
[21:51:57.285] <TB2> INFO: 1468665 events read in total (63572ms).
[21:52:28.983] <TB2> INFO: 2194835 events read in total (95270ms).
[21:53:00.736] <TB2> INFO: 2916580 events read in total (127023ms).
[21:53:32.112] <TB2> INFO: 3638205 events read in total (158399ms).
[21:53:39.637] <TB2> INFO: 3806400 events read in total (165924ms).
[21:53:39.712] <TB2> INFO: Test took 166829ms.
[21:54:06.374] <TB2> INFO: PixTestTrim::trimBitTest() done
[21:54:06.376] <TB2> INFO: PixTestTrim::doTest() done, duration: 2443 seconds
[21:54:06.376] <TB2> INFO: Decoding statistics:
[21:54:06.376] <TB2> INFO: General information:
[21:54:06.376] <TB2> INFO: 16bit words read: 0
[21:54:06.376] <TB2> INFO: valid events total: 0
[21:54:06.376] <TB2> INFO: empty events: 0
[21:54:06.376] <TB2> INFO: valid events with pixels: 0
[21:54:06.376] <TB2> INFO: valid pixel hits: 0
[21:54:06.376] <TB2> INFO: Event errors: 0
[21:54:06.376] <TB2> INFO: start marker: 0
[21:54:06.376] <TB2> INFO: stop marker: 0
[21:54:06.376] <TB2> INFO: overflow: 0
[21:54:06.376] <TB2> INFO: invalid 5bit words: 0
[21:54:06.376] <TB2> INFO: invalid XOR eye diagram: 0
[21:54:06.376] <TB2> INFO: frame (failed synchr.): 0
[21:54:06.376] <TB2> INFO: idle data (no TBM trl): 0
[21:54:06.376] <TB2> INFO: no data (only TBM hdr): 0
[21:54:06.376] <TB2> INFO: TBM errors: 0
[21:54:06.376] <TB2> INFO: flawed TBM headers: 0
[21:54:06.376] <TB2> INFO: flawed TBM trailers: 0
[21:54:06.376] <TB2> INFO: event ID mismatches: 0
[21:54:06.376] <TB2> INFO: ROC errors: 0
[21:54:06.376] <TB2> INFO: missing ROC header(s): 0
[21:54:06.376] <TB2> INFO: misplaced readback start: 0
[21:54:06.376] <TB2> INFO: Pixel decoding errors: 0
[21:54:06.376] <TB2> INFO: pixel data incomplete: 0
[21:54:06.376] <TB2> INFO: pixel address: 0
[21:54:06.376] <TB2> INFO: pulse height fill bit: 0
[21:54:06.376] <TB2> INFO: buffer corruption: 0
[21:54:06.000] <TB2> INFO: ######################################################################
[21:54:06.000] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[21:54:06.000] <TB2> INFO: ######################################################################
[21:54:07.240] <TB2> INFO: Expecting 41600 events.
[21:54:10.849] <TB2> INFO: 41600 events read in total (3018ms).
[21:54:10.850] <TB2> INFO: Test took 3849ms.
[21:54:11.290] <TB2> INFO: Expecting 41600 events.
[21:54:14.846] <TB2> INFO: 41600 events read in total (2964ms).
[21:54:14.847] <TB2> INFO: Test took 3793ms.
[21:54:15.137] <TB2> INFO: Expecting 41600 events.
[21:54:18.685] <TB2> INFO: 41600 events read in total (2956ms).
[21:54:18.686] <TB2> INFO: Test took 3815ms.
[21:54:18.975] <TB2> INFO: Expecting 41600 events.
[21:54:22.482] <TB2> INFO: 41600 events read in total (2914ms).
[21:54:22.483] <TB2> INFO: Test took 3773ms.
[21:54:22.788] <TB2> INFO: Expecting 41600 events.
[21:54:26.282] <TB2> INFO: 41600 events read in total (2902ms).
[21:54:26.283] <TB2> INFO: Test took 3772ms.
[21:54:26.584] <TB2> INFO: Expecting 41600 events.
[21:54:30.070] <TB2> INFO: 41600 events read in total (2894ms).
[21:54:30.070] <TB2> INFO: Test took 3763ms.
[21:54:30.359] <TB2> INFO: Expecting 41600 events.
[21:54:33.968] <TB2> INFO: 41600 events read in total (3017ms).
[21:54:33.969] <TB2> INFO: Test took 3874ms.
[21:54:34.259] <TB2> INFO: Expecting 41600 events.
[21:54:37.866] <TB2> INFO: 41600 events read in total (3016ms).
[21:54:37.867] <TB2> INFO: Test took 3874ms.
[21:54:38.157] <TB2> INFO: Expecting 41600 events.
[21:54:41.775] <TB2> INFO: 41600 events read in total (3026ms).
[21:54:41.776] <TB2> INFO: Test took 3885ms.
[21:54:42.065] <TB2> INFO: Expecting 41600 events.
[21:54:45.572] <TB2> INFO: 41600 events read in total (2915ms).
[21:54:45.573] <TB2> INFO: Test took 3773ms.
[21:54:45.862] <TB2> INFO: Expecting 41600 events.
[21:54:49.357] <TB2> INFO: 41600 events read in total (2904ms).
[21:54:49.358] <TB2> INFO: Test took 3761ms.
[21:54:49.647] <TB2> INFO: Expecting 41600 events.
[21:54:53.163] <TB2> INFO: 41600 events read in total (2924ms).
[21:54:53.164] <TB2> INFO: Test took 3782ms.
[21:54:53.453] <TB2> INFO: Expecting 41600 events.
[21:54:56.941] <TB2> INFO: 41600 events read in total (2896ms).
[21:54:56.942] <TB2> INFO: Test took 3754ms.
[21:54:57.232] <TB2> INFO: Expecting 41600 events.
[21:55:00.759] <TB2> INFO: 41600 events read in total (2930ms).
[21:55:00.760] <TB2> INFO: Test took 3793ms.
[21:55:01.063] <TB2> INFO: Expecting 41600 events.
[21:55:04.611] <TB2> INFO: 41600 events read in total (2956ms).
[21:55:04.612] <TB2> INFO: Test took 3828ms.
[21:55:04.902] <TB2> INFO: Expecting 41600 events.
[21:55:08.423] <TB2> INFO: 41600 events read in total (2930ms).
[21:55:08.424] <TB2> INFO: Test took 3788ms.
[21:55:08.714] <TB2> INFO: Expecting 41600 events.
[21:55:12.305] <TB2> INFO: 41600 events read in total (2999ms).
[21:55:12.306] <TB2> INFO: Test took 3858ms.
[21:55:12.595] <TB2> INFO: Expecting 41600 events.
[21:55:16.118] <TB2> INFO: 41600 events read in total (2931ms).
[21:55:16.119] <TB2> INFO: Test took 3789ms.
[21:55:16.409] <TB2> INFO: Expecting 41600 events.
[21:55:20.008] <TB2> INFO: 41600 events read in total (3007ms).
[21:55:20.009] <TB2> INFO: Test took 3864ms.
[21:55:20.300] <TB2> INFO: Expecting 41600 events.
[21:55:23.894] <TB2> INFO: 41600 events read in total (3002ms).
[21:55:23.895] <TB2> INFO: Test took 3860ms.
[21:55:24.200] <TB2> INFO: Expecting 41600 events.
[21:55:27.680] <TB2> INFO: 41600 events read in total (2888ms).
[21:55:27.681] <TB2> INFO: Test took 3758ms.
[21:55:27.986] <TB2> INFO: Expecting 41600 events.
[21:55:31.463] <TB2> INFO: 41600 events read in total (2885ms).
[21:55:31.464] <TB2> INFO: Test took 3756ms.
[21:55:31.756] <TB2> INFO: Expecting 41600 events.
[21:55:35.250] <TB2> INFO: 41600 events read in total (2903ms).
[21:55:35.251] <TB2> INFO: Test took 3760ms.
[21:55:35.540] <TB2> INFO: Expecting 41600 events.
[21:55:39.022] <TB2> INFO: 41600 events read in total (2890ms).
[21:55:39.023] <TB2> INFO: Test took 3747ms.
[21:55:39.312] <TB2> INFO: Expecting 41600 events.
[21:55:42.864] <TB2> INFO: 41600 events read in total (2960ms).
[21:55:42.865] <TB2> INFO: Test took 3818ms.
[21:55:43.155] <TB2> INFO: Expecting 41600 events.
[21:55:46.618] <TB2> INFO: 41600 events read in total (2872ms).
[21:55:46.619] <TB2> INFO: Test took 3729ms.
[21:55:46.908] <TB2> INFO: Expecting 41600 events.
[21:55:50.386] <TB2> INFO: 41600 events read in total (2886ms).
[21:55:50.387] <TB2> INFO: Test took 3743ms.
[21:55:50.676] <TB2> INFO: Expecting 41600 events.
[21:55:54.235] <TB2> INFO: 41600 events read in total (2967ms).
[21:55:54.236] <TB2> INFO: Test took 3825ms.
[21:55:54.527] <TB2> INFO: Expecting 41600 events.
[21:55:57.992] <TB2> INFO: 41600 events read in total (2873ms).
[21:55:57.993] <TB2> INFO: Test took 3731ms.
[21:55:58.283] <TB2> INFO: Expecting 2560 events.
[21:55:59.170] <TB2> INFO: 2560 events read in total (296ms).
[21:55:59.170] <TB2> INFO: Test took 1164ms.
[21:55:59.479] <TB2> INFO: Expecting 2560 events.
[21:56:00.364] <TB2> INFO: 2560 events read in total (294ms).
[21:56:00.364] <TB2> INFO: Test took 1193ms.
[21:56:00.672] <TB2> INFO: Expecting 2560 events.
[21:56:01.555] <TB2> INFO: 2560 events read in total (291ms).
[21:56:01.555] <TB2> INFO: Test took 1190ms.
[21:56:01.864] <TB2> INFO: Expecting 2560 events.
[21:56:02.763] <TB2> INFO: 2560 events read in total (307ms).
[21:56:02.764] <TB2> INFO: Test took 1208ms.
[21:56:03.070] <TB2> INFO: Expecting 2560 events.
[21:56:03.949] <TB2> INFO: 2560 events read in total (288ms).
[21:56:03.949] <TB2> INFO: Test took 1184ms.
[21:56:04.256] <TB2> INFO: Expecting 2560 events.
[21:56:05.138] <TB2> INFO: 2560 events read in total (290ms).
[21:56:05.138] <TB2> INFO: Test took 1188ms.
[21:56:05.446] <TB2> INFO: Expecting 2560 events.
[21:56:06.334] <TB2> INFO: 2560 events read in total (296ms).
[21:56:06.335] <TB2> INFO: Test took 1196ms.
[21:56:06.642] <TB2> INFO: Expecting 2560 events.
[21:56:07.534] <TB2> INFO: 2560 events read in total (300ms).
[21:56:07.534] <TB2> INFO: Test took 1198ms.
[21:56:07.843] <TB2> INFO: Expecting 2560 events.
[21:56:08.723] <TB2> INFO: 2560 events read in total (288ms).
[21:56:08.724] <TB2> INFO: Test took 1189ms.
[21:56:09.030] <TB2> INFO: Expecting 2560 events.
[21:56:09.921] <TB2> INFO: 2560 events read in total (299ms).
[21:56:09.922] <TB2> INFO: Test took 1197ms.
[21:56:10.230] <TB2> INFO: Expecting 2560 events.
[21:56:11.117] <TB2> INFO: 2560 events read in total (296ms).
[21:56:11.117] <TB2> INFO: Test took 1195ms.
[21:56:11.424] <TB2> INFO: Expecting 2560 events.
[21:56:12.304] <TB2> INFO: 2560 events read in total (288ms).
[21:56:12.305] <TB2> INFO: Test took 1187ms.
[21:56:12.611] <TB2> INFO: Expecting 2560 events.
[21:56:13.495] <TB2> INFO: 2560 events read in total (292ms).
[21:56:13.496] <TB2> INFO: Test took 1191ms.
[21:56:13.803] <TB2> INFO: Expecting 2560 events.
[21:56:14.688] <TB2> INFO: 2560 events read in total (293ms).
[21:56:14.688] <TB2> INFO: Test took 1191ms.
[21:56:14.995] <TB2> INFO: Expecting 2560 events.
[21:56:15.887] <TB2> INFO: 2560 events read in total (300ms).
[21:56:15.888] <TB2> INFO: Test took 1199ms.
[21:56:16.196] <TB2> INFO: Expecting 2560 events.
[21:56:17.090] <TB2> INFO: 2560 events read in total (302ms).
[21:56:17.090] <TB2> INFO: Test took 1202ms.
[21:56:17.093] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:56:17.400] <TB2> INFO: Expecting 655360 events.
[21:56:32.294] <TB2> INFO: 655360 events read in total (14302ms).
[21:56:32.311] <TB2> INFO: Expecting 655360 events.
[21:56:46.987] <TB2> INFO: 655360 events read in total (14273ms).
[21:56:47.011] <TB2> INFO: Expecting 655360 events.
[21:57:01.752] <TB2> INFO: 655360 events read in total (14338ms).
[21:57:01.776] <TB2> INFO: Expecting 655360 events.
[21:57:16.521] <TB2> INFO: 655360 events read in total (14341ms).
[21:57:16.549] <TB2> INFO: Expecting 655360 events.
[21:57:31.292] <TB2> INFO: 655360 events read in total (14340ms).
[21:57:31.324] <TB2> INFO: Expecting 655360 events.
[21:57:46.149] <TB2> INFO: 655360 events read in total (14422ms).
[21:57:46.188] <TB2> INFO: Expecting 655360 events.
[21:58:00.889] <TB2> INFO: 655360 events read in total (14298ms).
[21:58:00.980] <TB2> INFO: Expecting 655360 events.
[21:58:15.858] <TB2> INFO: 655360 events read in total (14475ms).
[21:58:15.916] <TB2> INFO: Expecting 655360 events.
[21:58:30.696] <TB2> INFO: 655360 events read in total (14377ms).
[21:58:30.897] <TB2> INFO: Expecting 655360 events.
[21:58:45.631] <TB2> INFO: 655360 events read in total (14331ms).
[21:58:45.700] <TB2> INFO: Expecting 655360 events.
[21:59:00.320] <TB2> INFO: 655360 events read in total (14217ms).
[21:59:00.450] <TB2> INFO: Expecting 655360 events.
[21:59:15.100] <TB2> INFO: 655360 events read in total (14247ms).
[21:59:15.180] <TB2> INFO: Expecting 655360 events.
[21:59:29.986] <TB2> INFO: 655360 events read in total (14402ms).
[21:59:30.163] <TB2> INFO: Expecting 655360 events.
[21:59:44.725] <TB2> INFO: 655360 events read in total (14159ms).
[21:59:44.842] <TB2> INFO: Expecting 655360 events.
[21:59:59.462] <TB2> INFO: 655360 events read in total (14217ms).
[21:59:59.641] <TB2> INFO: Expecting 655360 events.
[22:00:14.320] <TB2> INFO: 655360 events read in total (14276ms).
[22:00:14.540] <TB2> INFO: Test took 237447ms.
[22:00:14.645] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:00:14.892] <TB2> INFO: Expecting 655360 events.
[22:00:29.848] <TB2> INFO: 655360 events read in total (14364ms).
[22:00:29.862] <TB2> INFO: Expecting 655360 events.
[22:00:44.476] <TB2> INFO: 655360 events read in total (14211ms).
[22:00:44.494] <TB2> INFO: Expecting 655360 events.
[22:00:59.133] <TB2> INFO: 655360 events read in total (14236ms).
[22:00:59.160] <TB2> INFO: Expecting 655360 events.
[22:01:14.047] <TB2> INFO: 655360 events read in total (14484ms).
[22:01:14.074] <TB2> INFO: Expecting 655360 events.
[22:01:28.723] <TB2> INFO: 655360 events read in total (14246ms).
[22:01:28.756] <TB2> INFO: Expecting 655360 events.
[22:01:43.586] <TB2> INFO: 655360 events read in total (14427ms).
[22:01:43.624] <TB2> INFO: Expecting 655360 events.
[22:01:57.995] <TB2> INFO: 655360 events read in total (13968ms).
[22:01:58.038] <TB2> INFO: Expecting 655360 events.
[22:02:12.637] <TB2> INFO: 655360 events read in total (14195ms).
[22:02:12.696] <TB2> INFO: Expecting 655360 events.
[22:02:27.471] <TB2> INFO: 655360 events read in total (14372ms).
[22:02:27.604] <TB2> INFO: Expecting 655360 events.
[22:02:42.429] <TB2> INFO: 655360 events read in total (14422ms).
[22:02:42.586] <TB2> INFO: Expecting 655360 events.
[22:02:57.325] <TB2> INFO: 655360 events read in total (14336ms).
[22:02:57.421] <TB2> INFO: Expecting 655360 events.
[22:03:12.241] <TB2> INFO: 655360 events read in total (14417ms).
[22:03:12.371] <TB2> INFO: Expecting 655360 events.
[22:03:27.105] <TB2> INFO: 655360 events read in total (14331ms).
[22:03:27.240] <TB2> INFO: Expecting 655360 events.
[22:03:41.733] <TB2> INFO: 655360 events read in total (14089ms).
[22:03:41.852] <TB2> INFO: Expecting 655360 events.
[22:03:56.595] <TB2> INFO: 655360 events read in total (14340ms).
[22:03:56.689] <TB2> INFO: Expecting 655360 events.
[22:04:11.308] <TB2> INFO: 655360 events read in total (14216ms).
[22:04:11.424] <TB2> INFO: Test took 236779ms.
[22:04:11.599] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:04:11.607] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:04:11.613] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[22:04:11.619] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[22:04:11.625] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[22:04:11.630] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[22:04:11.636] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:04:11.642] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:04:11.648] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:04:11.654] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:04:11.660] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:04:11.666] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:04:11.671] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:04:11.677] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:04:11.683] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:04:11.689] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:04:11.695] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:04:11.700] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[22:04:11.707] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:04:11.713] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:04:11.718] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:04:11.724] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:04:11.730] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:04:11.736] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:04:11.742] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:04:11.748] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:04:11.783] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C0.dat
[22:04:11.784] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C1.dat
[22:04:11.784] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C2.dat
[22:04:11.784] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C3.dat
[22:04:11.784] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C4.dat
[22:04:11.784] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C5.dat
[22:04:11.785] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C6.dat
[22:04:11.785] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C7.dat
[22:04:11.785] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C8.dat
[22:04:11.785] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C9.dat
[22:04:11.785] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C10.dat
[22:04:11.786] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C11.dat
[22:04:11.786] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C12.dat
[22:04:11.786] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C13.dat
[22:04:11.786] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C14.dat
[22:04:11.786] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//dacParameters35_C15.dat
[22:04:12.047] <TB2> INFO: Expecting 41600 events.
[22:04:15.200] <TB2> INFO: 41600 events read in total (2561ms).
[22:04:15.201] <TB2> INFO: Test took 3410ms.
[22:04:15.679] <TB2> INFO: Expecting 41600 events.
[22:04:18.839] <TB2> INFO: 41600 events read in total (2563ms).
[22:04:18.840] <TB2> INFO: Test took 3425ms.
[22:04:19.298] <TB2> INFO: Expecting 41600 events.
[22:04:22.438] <TB2> INFO: 41600 events read in total (2549ms).
[22:04:22.439] <TB2> INFO: Test took 3385ms.
[22:04:22.659] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:22.749] <TB2> INFO: Expecting 2560 events.
[22:04:23.634] <TB2> INFO: 2560 events read in total (293ms).
[22:04:23.634] <TB2> INFO: Test took 975ms.
[22:04:23.637] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:23.943] <TB2> INFO: Expecting 2560 events.
[22:04:24.829] <TB2> INFO: 2560 events read in total (294ms).
[22:04:24.830] <TB2> INFO: Test took 1193ms.
[22:04:24.834] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:25.137] <TB2> INFO: Expecting 2560 events.
[22:04:26.025] <TB2> INFO: 2560 events read in total (296ms).
[22:04:26.025] <TB2> INFO: Test took 1191ms.
[22:04:26.027] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:26.334] <TB2> INFO: Expecting 2560 events.
[22:04:27.217] <TB2> INFO: 2560 events read in total (291ms).
[22:04:27.218] <TB2> INFO: Test took 1191ms.
[22:04:27.220] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:27.527] <TB2> INFO: Expecting 2560 events.
[22:04:28.418] <TB2> INFO: 2560 events read in total (299ms).
[22:04:28.419] <TB2> INFO: Test took 1199ms.
[22:04:28.422] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:28.726] <TB2> INFO: Expecting 2560 events.
[22:04:29.611] <TB2> INFO: 2560 events read in total (293ms).
[22:04:29.612] <TB2> INFO: Test took 1190ms.
[22:04:29.614] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:29.921] <TB2> INFO: Expecting 2560 events.
[22:04:30.815] <TB2> INFO: 2560 events read in total (303ms).
[22:04:30.815] <TB2> INFO: Test took 1201ms.
[22:04:30.818] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:31.126] <TB2> INFO: Expecting 2560 events.
[22:04:32.023] <TB2> INFO: 2560 events read in total (305ms).
[22:04:32.024] <TB2> INFO: Test took 1206ms.
[22:04:32.027] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:32.332] <TB2> INFO: Expecting 2560 events.
[22:04:33.227] <TB2> INFO: 2560 events read in total (303ms).
[22:04:33.227] <TB2> INFO: Test took 1200ms.
[22:04:33.231] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:33.535] <TB2> INFO: Expecting 2560 events.
[22:04:34.421] <TB2> INFO: 2560 events read in total (294ms).
[22:04:34.421] <TB2> INFO: Test took 1190ms.
[22:04:34.424] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:34.729] <TB2> INFO: Expecting 2560 events.
[22:04:35.618] <TB2> INFO: 2560 events read in total (297ms).
[22:04:35.618] <TB2> INFO: Test took 1194ms.
[22:04:35.622] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:35.932] <TB2> INFO: Expecting 2560 events.
[22:04:36.815] <TB2> INFO: 2560 events read in total (291ms).
[22:04:36.816] <TB2> INFO: Test took 1194ms.
[22:04:36.818] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:37.123] <TB2> INFO: Expecting 2560 events.
[22:04:37.005] <TB2> INFO: 2560 events read in total (290ms).
[22:04:37.006] <TB2> INFO: Test took 1188ms.
[22:04:38.009] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:38.314] <TB2> INFO: Expecting 2560 events.
[22:04:39.201] <TB2> INFO: 2560 events read in total (295ms).
[22:04:39.201] <TB2> INFO: Test took 1192ms.
[22:04:39.204] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:39.509] <TB2> INFO: Expecting 2560 events.
[22:04:40.392] <TB2> INFO: 2560 events read in total (291ms).
[22:04:40.393] <TB2> INFO: Test took 1189ms.
[22:04:40.396] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:40.700] <TB2> INFO: Expecting 2560 events.
[22:04:41.580] <TB2> INFO: 2560 events read in total (288ms).
[22:04:41.580] <TB2> INFO: Test took 1185ms.
[22:04:41.582] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:41.890] <TB2> INFO: Expecting 2560 events.
[22:04:42.776] <TB2> INFO: 2560 events read in total (294ms).
[22:04:42.777] <TB2> INFO: Test took 1195ms.
[22:04:42.780] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:43.085] <TB2> INFO: Expecting 2560 events.
[22:04:43.972] <TB2> INFO: 2560 events read in total (296ms).
[22:04:43.973] <TB2> INFO: Test took 1193ms.
[22:04:43.976] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:44.281] <TB2> INFO: Expecting 2560 events.
[22:04:45.173] <TB2> INFO: 2560 events read in total (300ms).
[22:04:45.174] <TB2> INFO: Test took 1198ms.
[22:04:45.176] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:45.484] <TB2> INFO: Expecting 2560 events.
[22:04:46.375] <TB2> INFO: 2560 events read in total (299ms).
[22:04:46.376] <TB2> INFO: Test took 1200ms.
[22:04:46.378] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:46.685] <TB2> INFO: Expecting 2560 events.
[22:04:47.570] <TB2> INFO: 2560 events read in total (293ms).
[22:04:47.570] <TB2> INFO: Test took 1192ms.
[22:04:47.572] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:47.880] <TB2> INFO: Expecting 2560 events.
[22:04:48.773] <TB2> INFO: 2560 events read in total (301ms).
[22:04:48.773] <TB2> INFO: Test took 1201ms.
[22:04:48.777] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:49.081] <TB2> INFO: Expecting 2560 events.
[22:04:49.976] <TB2> INFO: 2560 events read in total (303ms).
[22:04:49.976] <TB2> INFO: Test took 1199ms.
[22:04:49.978] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:50.286] <TB2> INFO: Expecting 2560 events.
[22:04:51.171] <TB2> INFO: 2560 events read in total (293ms).
[22:04:51.171] <TB2> INFO: Test took 1193ms.
[22:04:51.174] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:51.480] <TB2> INFO: Expecting 2560 events.
[22:04:52.364] <TB2> INFO: 2560 events read in total (292ms).
[22:04:52.364] <TB2> INFO: Test took 1191ms.
[22:04:52.366] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:52.675] <TB2> INFO: Expecting 2560 events.
[22:04:53.563] <TB2> INFO: 2560 events read in total (296ms).
[22:04:53.563] <TB2> INFO: Test took 1197ms.
[22:04:53.566] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:53.874] <TB2> INFO: Expecting 2560 events.
[22:04:54.757] <TB2> INFO: 2560 events read in total (291ms).
[22:04:54.757] <TB2> INFO: Test took 1191ms.
[22:04:54.759] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:55.066] <TB2> INFO: Expecting 2560 events.
[22:04:55.952] <TB2> INFO: 2560 events read in total (294ms).
[22:04:55.953] <TB2> INFO: Test took 1194ms.
[22:04:55.955] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:56.261] <TB2> INFO: Expecting 2560 events.
[22:04:57.149] <TB2> INFO: 2560 events read in total (295ms).
[22:04:57.149] <TB2> INFO: Test took 1195ms.
[22:04:57.152] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:57.458] <TB2> INFO: Expecting 2560 events.
[22:04:58.348] <TB2> INFO: 2560 events read in total (299ms).
[22:04:58.348] <TB2> INFO: Test took 1196ms.
[22:04:58.352] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:58.656] <TB2> INFO: Expecting 2560 events.
[22:04:59.550] <TB2> INFO: 2560 events read in total (302ms).
[22:04:59.550] <TB2> INFO: Test took 1198ms.
[22:04:59.553] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:04:59.862] <TB2> INFO: Expecting 2560 events.
[22:05:00.748] <TB2> INFO: 2560 events read in total (294ms).
[22:05:00.748] <TB2> INFO: Test took 1196ms.
[22:05:01.225] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 654 seconds
[22:05:01.225] <TB2> INFO: PH scale (per ROC): 48 59 69 69 52 48 64 67 47 61 64 48 53 65 61 53
[22:05:01.226] <TB2> INFO: PH offset (per ROC): 112 117 126 118 110 99 113 123 106 134 131 83 97 119 133 131
[22:05:01.235] <TB2> INFO: Decoding statistics:
[22:05:01.235] <TB2> INFO: General information:
[22:05:01.235] <TB2> INFO: 16bit words read: 127880
[22:05:01.235] <TB2> INFO: valid events total: 20480
[22:05:01.235] <TB2> INFO: empty events: 17980
[22:05:01.235] <TB2> INFO: valid events with pixels: 2500
[22:05:01.235] <TB2> INFO: valid pixel hits: 2500
[22:05:01.235] <TB2> INFO: Event errors: 0
[22:05:01.235] <TB2> INFO: start marker: 0
[22:05:01.235] <TB2> INFO: stop marker: 0
[22:05:01.235] <TB2> INFO: overflow: 0
[22:05:01.235] <TB2> INFO: invalid 5bit words: 0
[22:05:01.235] <TB2> INFO: invalid XOR eye diagram: 0
[22:05:01.235] <TB2> INFO: frame (failed synchr.): 0
[22:05:01.235] <TB2> INFO: idle data (no TBM trl): 0
[22:05:01.235] <TB2> INFO: no data (only TBM hdr): 0
[22:05:01.235] <TB2> INFO: TBM errors: 0
[22:05:01.235] <TB2> INFO: flawed TBM headers: 0
[22:05:01.235] <TB2> INFO: flawed TBM trailers: 0
[22:05:01.235] <TB2> INFO: event ID mismatches: 0
[22:05:01.235] <TB2> INFO: ROC errors: 0
[22:05:01.235] <TB2> INFO: missing ROC header(s): 0
[22:05:01.235] <TB2> INFO: misplaced readback start: 0
[22:05:01.235] <TB2> INFO: Pixel decoding errors: 0
[22:05:01.235] <TB2> INFO: pixel data incomplete: 0
[22:05:01.235] <TB2> INFO: pixel address: 0
[22:05:01.235] <TB2> INFO: pulse height fill bit: 0
[22:05:01.235] <TB2> INFO: buffer corruption: 0
[22:05:01.405] <TB2> INFO: ######################################################################
[22:05:01.405] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[22:05:01.405] <TB2> INFO: ######################################################################
[22:05:01.420] <TB2> INFO: scanning low vcal = 10
[22:05:01.660] <TB2> INFO: Expecting 41600 events.
[22:05:05.234] <TB2> INFO: 41600 events read in total (2983ms).
[22:05:05.235] <TB2> INFO: Test took 3815ms.
[22:05:05.237] <TB2> INFO: scanning low vcal = 20
[22:05:05.529] <TB2> INFO: Expecting 41600 events.
[22:05:09.143] <TB2> INFO: 41600 events read in total (3022ms).
[22:05:09.143] <TB2> INFO: Test took 3905ms.
[22:05:09.147] <TB2> INFO: scanning low vcal = 30
[22:05:09.443] <TB2> INFO: Expecting 41600 events.
[22:05:13.127] <TB2> INFO: 41600 events read in total (3092ms).
[22:05:13.131] <TB2> INFO: Test took 3983ms.
[22:05:13.135] <TB2> INFO: scanning low vcal = 40
[22:05:13.412] <TB2> INFO: Expecting 41600 events.
[22:05:20.087] <TB2> INFO: 41600 events read in total (6084ms).
[22:05:20.089] <TB2> INFO: Test took 6954ms.
[22:05:20.092] <TB2> INFO: scanning low vcal = 50
[22:05:20.562] <TB2> INFO: Expecting 41600 events.
[22:05:25.263] <TB2> INFO: 41600 events read in total (4040ms).
[22:05:25.272] <TB2> INFO: Test took 5179ms.
[22:05:25.336] <TB2> INFO: scanning low vcal = 60
[22:05:26.008] <TB2> INFO: Expecting 41600 events.
[22:05:31.630] <TB2> INFO: 41600 events read in total (5030ms).
[22:05:31.632] <TB2> INFO: Test took 6296ms.
[22:05:31.636] <TB2> INFO: scanning low vcal = 70
[22:05:32.054] <TB2> INFO: Expecting 41600 events.
[22:05:51.537] <TB2> INFO: 41600 events read in total (18872ms).
[22:05:51.538] <TB2> INFO: Test took 19902ms.
[22:05:51.541] <TB2> INFO: scanning low vcal = 80
[22:05:51.828] <TB2> INFO: Expecting 41600 events.
[22:06:03.511] <TB2> INFO: 41600 events read in total (11089ms).
[22:06:03.528] <TB2> INFO: Test took 11987ms.
[22:06:03.650] <TB2> INFO: scanning low vcal = 90
[22:06:04.455] <TB2> INFO: Expecting 41600 events.
[22:06:16.066] <TB2> INFO: 41600 events read in total (10907ms).
[22:06:16.067] <TB2> INFO: Test took 12409ms.
[22:06:16.073] <TB2> INFO: scanning low vcal = 100
[22:06:16.418] <TB2> INFO: Expecting 41600 events.
[22:06:20.381] <TB2> INFO: 41600 events read in total (3372ms).
[22:06:20.382] <TB2> INFO: Test took 4307ms.
[22:06:20.386] <TB2> INFO: scanning low vcal = 110
[22:06:20.662] <TB2> INFO: Expecting 41600 events.
[22:06:24.643] <TB2> INFO: 41600 events read in total (3389ms).
[22:06:24.644] <TB2> INFO: Test took 4258ms.
[22:06:24.647] <TB2> INFO: scanning low vcal = 120
[22:06:24.929] <TB2> INFO: Expecting 41600 events.
[22:06:28.883] <TB2> INFO: 41600 events read in total (3362ms).
[22:06:28.884] <TB2> INFO: Test took 4237ms.
[22:06:28.888] <TB2> INFO: scanning low vcal = 130
[22:06:29.167] <TB2> INFO: Expecting 41600 events.
[22:06:33.174] <TB2> INFO: 41600 events read in total (3415ms).
[22:06:33.175] <TB2> INFO: Test took 4286ms.
[22:06:33.178] <TB2> INFO: scanning low vcal = 140
[22:06:33.455] <TB2> INFO: Expecting 41600 events.
[22:06:37.409] <TB2> INFO: 41600 events read in total (3363ms).
[22:06:37.410] <TB2> INFO: Test took 4232ms.
[22:06:37.413] <TB2> INFO: scanning low vcal = 150
[22:06:37.690] <TB2> INFO: Expecting 41600 events.
[22:06:41.684] <TB2> INFO: 41600 events read in total (3402ms).
[22:06:41.685] <TB2> INFO: Test took 4272ms.
[22:06:41.688] <TB2> INFO: scanning low vcal = 160
[22:06:41.964] <TB2> INFO: Expecting 41600 events.
[22:06:47.768] <TB2> INFO: 41600 events read in total (5155ms).
[22:06:47.780] <TB2> INFO: Test took 6092ms.
[22:06:47.915] <TB2> INFO: scanning low vcal = 170
[22:06:48.639] <TB2> INFO: Expecting 41600 events.
[22:06:56.858] <TB2> INFO: 41600 events read in total (7547ms).
[22:06:56.860] <TB2> INFO: Test took 8941ms.
[22:06:56.872] <TB2> INFO: scanning low vcal = 180
[22:06:57.325] <TB2> INFO: Expecting 41600 events.
[22:07:14.786] <TB2> INFO: 41600 events read in total (16804ms).
[22:07:14.787] <TB2> INFO: Test took 17914ms.
[22:07:14.791] <TB2> INFO: scanning low vcal = 190
[22:07:15.410] <TB2> INFO: Expecting 41600 events.
[22:07:19.686] <TB2> INFO: 41600 events read in total (3679ms).
[22:07:19.705] <TB2> INFO: Test took 4912ms.
[22:07:19.831] <TB2> INFO: scanning low vcal = 200
[22:07:20.637] <TB2> INFO: Expecting 41600 events.
[22:07:39.886] <TB2> INFO: 41600 events read in total (18607ms).
[22:07:39.887] <TB2> INFO: Test took 20048ms.
[22:07:39.892] <TB2> INFO: scanning low vcal = 210
[22:07:40.166] <TB2> INFO: Expecting 41600 events.
[22:07:44.140] <TB2> INFO: 41600 events read in total (3382ms).
[22:07:44.140] <TB2> INFO: Test took 4248ms.
[22:07:44.144] <TB2> INFO: scanning low vcal = 220
[22:07:44.420] <TB2> INFO: Expecting 41600 events.
[22:07:48.362] <TB2> INFO: 41600 events read in total (3350ms).
[22:07:48.363] <TB2> INFO: Test took 4219ms.
[22:07:48.366] <TB2> INFO: scanning low vcal = 230
[22:07:48.642] <TB2> INFO: Expecting 41600 events.
[22:07:52.611] <TB2> INFO: 41600 events read in total (3377ms).
[22:07:52.611] <TB2> INFO: Test took 4245ms.
[22:07:52.614] <TB2> INFO: scanning low vcal = 240
[22:07:52.891] <TB2> INFO: Expecting 41600 events.
[22:07:56.862] <TB2> INFO: 41600 events read in total (3379ms).
[22:07:56.863] <TB2> INFO: Test took 4248ms.
[22:07:56.866] <TB2> INFO: scanning low vcal = 250
[22:07:57.143] <TB2> INFO: Expecting 41600 events.
[22:08:01.114] <TB2> INFO: 41600 events read in total (3379ms).
[22:08:01.115] <TB2> INFO: Test took 4248ms.
[22:08:01.119] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[22:08:01.400] <TB2> INFO: Expecting 41600 events.
[22:08:05.376] <TB2> INFO: 41600 events read in total (3384ms).
[22:08:05.377] <TB2> INFO: Test took 4258ms.
[22:08:05.381] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[22:08:05.663] <TB2> INFO: Expecting 41600 events.
[22:08:12.198] <TB2> INFO: 41600 events read in total (5943ms).
[22:08:12.216] <TB2> INFO: Test took 6835ms.
[22:08:12.341] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[22:08:13.227] <TB2> INFO: Expecting 41600 events.
[22:08:20.123] <TB2> INFO: 41600 events read in total (6194ms).
[22:08:20.132] <TB2> INFO: Test took 7781ms.
[22:08:20.212] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[22:08:21.147] <TB2> INFO: Expecting 41600 events.
[22:08:26.012] <TB2> INFO: 41600 events read in total (4244ms).
[22:08:26.016] <TB2> INFO: Test took 5793ms.
[22:08:26.038] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[22:08:26.685] <TB2> INFO: Expecting 41600 events.
[22:08:31.324] <TB2> INFO: 41600 events read in total (4044ms).
[22:08:31.326] <TB2> INFO: Test took 5288ms.
[22:08:33.085] <TB2> INFO: PixTestGainPedestal::measure() done
[22:09:37.284] <TB2> INFO: PixTestGainPedestal::fit() done
[22:09:37.284] <TB2> INFO: non-linearity mean: 0.937 0.982 0.985 0.986 0.961 0.965 0.979 0.986 0.947 0.982 0.982 0.950 0.937 0.987 0.984 0.981
[22:09:37.284] <TB2> INFO: non-linearity RMS: 0.072 0.003 0.003 0.003 0.044 0.015 0.005 0.004 0.142 0.003 0.005 0.045 0.096 0.003 0.004 0.004
[22:09:37.284] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[22:09:37.298] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[22:09:37.310] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[22:09:37.323] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[22:09:37.341] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[22:09:37.364] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[22:09:37.387] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[22:09:37.408] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[22:09:37.422] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[22:09:37.435] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[22:09:37.448] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[22:09:37.462] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[22:09:37.475] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[22:09:37.489] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[22:09:37.502] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[22:09:37.515] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1026_FullQualification_2016-10-19_19h52m_1476899523//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[22:09:37.529] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 276 seconds
[22:09:37.529] <TB2> INFO: Decoding statistics:
[22:09:37.529] <TB2> INFO: General information:
[22:09:37.529] <TB2> INFO: 16bit words read: 3327920
[22:09:37.529] <TB2> INFO: valid events total: 332800
[22:09:37.529] <TB2> INFO: empty events: 0
[22:09:37.529] <TB2> INFO: valid events with pixels: 332800
[22:09:37.529] <TB2> INFO: valid pixel hits: 665560
[22:09:37.529] <TB2> INFO: Event errors: 0
[22:09:37.529] <TB2> INFO: start marker: 0
[22:09:37.529] <TB2> INFO: stop marker: 0
[22:09:37.529] <TB2> INFO: overflow: 0
[22:09:37.529] <TB2> INFO: invalid 5bit words: 0
[22:09:37.529] <TB2> INFO: invalid XOR eye diagram: 0
[22:09:37.529] <TB2> INFO: frame (failed synchr.): 0
[22:09:37.529] <TB2> INFO: idle data (no TBM trl): 0
[22:09:37.529] <TB2> INFO: no data (only TBM hdr): 0
[22:09:37.529] <TB2> INFO: TBM errors: 0
[22:09:37.529] <TB2> INFO: flawed TBM headers: 0
[22:09:37.529] <TB2> INFO: flawed TBM trailers: 0
[22:09:37.529] <TB2> INFO: event ID mismatches: 0
[22:09:37.529] <TB2> INFO: ROC errors: 0
[22:09:37.529] <TB2> INFO: missing ROC header(s): 0
[22:09:37.529] <TB2> INFO: misplaced readback start: 0
[22:09:37.529] <TB2> INFO: Pixel decoding errors: 0
[22:09:37.529] <TB2> INFO: pixel data incomplete: 0
[22:09:37.529] <TB2> INFO: pixel address: 0
[22:09:37.529] <TB2> INFO: pulse height fill bit: 0
[22:09:37.529] <TB2> INFO: buffer corruption: 0
[22:09:37.545] <TB2> INFO: Decoding statistics:
[22:09:37.545] <TB2> INFO: General information:
[22:09:37.546] <TB2> INFO: 16bit words read: 3457336
[22:09:37.546] <TB2> INFO: valid events total: 353536
[22:09:37.546] <TB2> INFO: empty events: 18236
[22:09:37.546] <TB2> INFO: valid events with pixels: 335300
[22:09:37.546] <TB2> INFO: valid pixel hits: 668060
[22:09:37.546] <TB2> INFO: Event errors: 0
[22:09:37.546] <TB2> INFO: start marker: 0
[22:09:37.546] <TB2> INFO: stop marker: 0
[22:09:37.546] <TB2> INFO: overflow: 0
[22:09:37.546] <TB2> INFO: invalid 5bit words: 0
[22:09:37.546] <TB2> INFO: invalid XOR eye diagram: 0
[22:09:37.546] <TB2> INFO: frame (failed synchr.): 0
[22:09:37.546] <TB2> INFO: idle data (no TBM trl): 0
[22:09:37.546] <TB2> INFO: no data (only TBM hdr): 0
[22:09:37.546] <TB2> INFO: TBM errors: 0
[22:09:37.546] <TB2> INFO: flawed TBM headers: 0
[22:09:37.546] <TB2> INFO: flawed TBM trailers: 0
[22:09:37.546] <TB2> INFO: event ID mismatches: 0
[22:09:37.546] <TB2> INFO: ROC errors: 0
[22:09:37.546] <TB2> INFO: missing ROC header(s): 0
[22:09:37.546] <TB2> INFO: misplaced readback start: 0
[22:09:37.546] <TB2> INFO: Pixel decoding errors: 0
[22:09:37.546] <TB2> INFO: pixel data incomplete: 0
[22:09:37.546] <TB2> INFO: pixel address: 0
[22:09:37.546] <TB2> INFO: pulse height fill bit: 0
[22:09:37.546] <TB2> INFO: buffer corruption: 0
[22:09:37.546] <TB2> INFO: enter test to run
[22:09:37.546] <TB2> INFO: test: exit no parameter change
[22:09:37.687] <TB2> QUIET: Connection to board 149 closed.
[22:09:37.689] <TB2> INFO: pXar: this is the end, my friend