[16:39:22.230] <TB1> INFO: *** Welcome to pxar ***
[16:39:22.230] <TB1> INFO: *** Today: 2016/10/19
[16:39:22.236] <TB1> INFO: *** Version: c8ba-dirty
[16:39:22.236] <TB1> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters_C15.dat
[16:39:22.237] <TB1> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//tbmParameters_C1b.dat
[16:39:22.237] <TB1> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//defaultMaskFile.dat
[16:39:22.237] <TB1> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//trimParameters_C15.dat
[16:39:22.300] <TB1> INFO: clk: 4
[16:39:22.300] <TB1> INFO: ctr: 4
[16:39:22.300] <TB1> INFO: sda: 19
[16:39:22.300] <TB1> INFO: tin: 9
[16:39:22.300] <TB1> INFO: level: 15
[16:39:22.300] <TB1> INFO: triggerdelay: 0
[16:39:22.300] <TB1> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[16:39:22.300] <TB1> INFO: Log level: INFO
[16:39:22.309] <TB1> INFO: Found DTB DTB_WXC03A
[16:39:22.321] <TB1> QUIET: Connection to board DTB_WXC03A opened.
[16:39:22.323] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 154
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC03A
MAC address: 40D85511809A
Hostname: pixelDTB154
Comment:
------------------------------------------------------
[16:39:22.324] <TB1> INFO: RPC call hashes of host and DTB match: 486171790
[16:39:23.881] <TB1> INFO: DUT info:
[16:39:23.881] <TB1> INFO: The DUT currently contains the following objects:
[16:39:23.881] <TB1> INFO: 4 TBM Cores tbm10c (4 ON)
[16:39:23.881] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:39:23.882] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:39:23.882] <TB1> INFO: TBM Core alpha (2): 7 registers set
[16:39:23.882] <TB1> INFO: TBM Core beta (3): 7 registers set
[16:39:23.882] <TB1> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[16:39:23.882] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[16:39:23.882] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[16:39:23.882] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[16:39:23.882] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[16:39:23.882] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[16:39:23.882] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[16:39:23.882] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[16:39:23.882] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[16:39:23.882] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[16:39:23.882] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[16:39:23.882] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[16:39:23.882] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[16:39:23.882] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[16:39:23.882] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[16:39:23.882] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[16:39:23.882] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[16:39:24.282] <TB1> INFO: enter 'restricted' command line mode
[16:39:24.282] <TB1> INFO: enter test to run
[16:39:24.282] <TB1> INFO: test: pretest no parameter change
[16:39:24.282] <TB1> INFO: running: pretest
[16:39:24.287] <TB1> INFO: ######################################################################
[16:39:24.287] <TB1> INFO: PixTestPretest::doTest()
[16:39:24.287] <TB1> INFO: ######################################################################
[16:39:24.289] <TB1> INFO: ----------------------------------------------------------------------
[16:39:24.289] <TB1> INFO: PixTestPretest::programROC()
[16:39:24.289] <TB1> INFO: ----------------------------------------------------------------------
[16:39:42.302] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[16:39:42.302] <TB1> INFO: IA differences per ROC: 16.9 16.9 16.9 19.3 16.9 16.9 19.3 20.1 19.3 19.3 17.7 18.5 17.7 22.5 20.1 20.1
[16:39:42.359] <TB1> INFO: ----------------------------------------------------------------------
[16:39:42.359] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[16:39:42.359] <TB1> INFO: ----------------------------------------------------------------------
[16:40:03.657] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 382.7 mA = 23.9187 mA/ROC
[16:40:03.657] <TB1> INFO: i(loss) [mA/ROC]: 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 19.3 20.1 20.9 19.3 20.1 20.1 20.1
[16:40:03.693] <TB1> INFO: ----------------------------------------------------------------------
[16:40:03.693] <TB1> INFO: PixTestPretest::findTiming()
[16:40:03.693] <TB1> INFO: ----------------------------------------------------------------------
[16:40:03.693] <TB1> INFO: PixTestCmd::init()

[16:40:35.434] <TB1> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[16:40:35.434] <TB1> INFO: (success/tries = 100/100), width = 2
[16:40:36.920] <TB1> INFO: ----------------------------------------------------------------------
[16:40:36.920] <TB1> INFO: PixTestPretest::findWorkingPixel()
[16:40:36.920] <TB1> INFO: ----------------------------------------------------------------------
[16:40:37.013] <TB1> INFO: Expecting 231680 events.
[16:40:46.969] <TB1> INFO: 231680 events read in total (9365ms).
[16:40:46.977] <TB1> INFO: Test took 10054ms.
[16:40:47.224] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[16:40:47.258] <TB1> INFO: ----------------------------------------------------------------------
[16:40:47.258] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[16:40:47.258] <TB1> INFO: ----------------------------------------------------------------------
[16:40:47.353] <TB1> INFO: Expecting 231680 events.
[16:40:57.425] <TB1> INFO: 231680 events read in total (9481ms).
[16:40:57.439] <TB1> INFO: Test took 10175ms.
[16:40:57.710] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[16:40:57.710] <TB1> INFO: CalDel: 90 76 89 95 84 83 83 97 87 84 84 71 82 95 76 78
[16:40:57.710] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 52 51 51 51 52
[16:40:57.714] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters_C0.dat
[16:40:57.714] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters_C1.dat
[16:40:57.714] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters_C2.dat
[16:40:57.714] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters_C3.dat
[16:40:57.715] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters_C4.dat
[16:40:57.715] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters_C5.dat
[16:40:57.715] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters_C6.dat
[16:40:57.715] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters_C7.dat
[16:40:57.715] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters_C8.dat
[16:40:57.715] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters_C9.dat
[16:40:57.715] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters_C10.dat
[16:40:57.715] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters_C11.dat
[16:40:57.716] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters_C12.dat
[16:40:57.716] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters_C13.dat
[16:40:57.716] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters_C14.dat
[16:40:57.716] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters_C15.dat
[16:40:57.716] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//tbmParameters_C0a.dat
[16:40:57.716] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//tbmParameters_C0b.dat
[16:40:57.716] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//tbmParameters_C1a.dat
[16:40:57.716] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//tbmParameters_C1b.dat
[16:40:57.716] <TB1> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[16:40:57.769] <TB1> INFO: enter test to run
[16:40:57.769] <TB1> INFO: test: FullTest no parameter change
[16:40:57.769] <TB1> INFO: running: fulltest
[16:40:57.769] <TB1> INFO: ######################################################################
[16:40:57.769] <TB1> INFO: PixTestFullTest::doTest()
[16:40:57.769] <TB1> INFO: ######################################################################
[16:40:57.770] <TB1> INFO: ######################################################################
[16:40:57.770] <TB1> INFO: PixTestAlive::doTest()
[16:40:57.770] <TB1> INFO: ######################################################################
[16:40:57.771] <TB1> INFO: ----------------------------------------------------------------------
[16:40:57.771] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:40:57.771] <TB1> INFO: ----------------------------------------------------------------------
[16:40:58.012] <TB1> INFO: Expecting 41600 events.
[16:41:01.483] <TB1> INFO: 41600 events read in total (2879ms).
[16:41:01.483] <TB1> INFO: Test took 3710ms.
[16:41:01.716] <TB1> INFO: PixTestAlive::aliveTest() done
[16:41:01.716] <TB1> INFO: number of dead pixels (per ROC): 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:41:01.717] <TB1> INFO: ----------------------------------------------------------------------
[16:41:01.718] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:41:01.718] <TB1> INFO: ----------------------------------------------------------------------
[16:41:01.964] <TB1> INFO: Expecting 41600 events.
[16:41:04.948] <TB1> INFO: 41600 events read in total (2393ms).
[16:41:04.948] <TB1> INFO: Test took 3228ms.
[16:41:04.949] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[16:41:05.183] <TB1> INFO: PixTestAlive::maskTest() done
[16:41:05.183] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:41:05.184] <TB1> INFO: ----------------------------------------------------------------------
[16:41:05.184] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:41:05.184] <TB1> INFO: ----------------------------------------------------------------------
[16:41:05.429] <TB1> INFO: Expecting 41600 events.
[16:41:09.061] <TB1> INFO: 41600 events read in total (3040ms).
[16:41:09.062] <TB1> INFO: Test took 3877ms.
[16:41:09.296] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[16:41:09.296] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:41:09.296] <TB1> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[16:41:09.296] <TB1> INFO: Decoding statistics:
[16:41:09.296] <TB1> INFO: General information:
[16:41:09.296] <TB1> INFO: 16bit words read: 0
[16:41:09.296] <TB1> INFO: valid events total: 0
[16:41:09.296] <TB1> INFO: empty events: 0
[16:41:09.297] <TB1> INFO: valid events with pixels: 0
[16:41:09.297] <TB1> INFO: valid pixel hits: 0
[16:41:09.297] <TB1> INFO: Event errors: 0
[16:41:09.297] <TB1> INFO: start marker: 0
[16:41:09.297] <TB1> INFO: stop marker: 0
[16:41:09.297] <TB1> INFO: overflow: 0
[16:41:09.297] <TB1> INFO: invalid 5bit words: 0
[16:41:09.297] <TB1> INFO: invalid XOR eye diagram: 0
[16:41:09.297] <TB1> INFO: frame (failed synchr.): 0
[16:41:09.297] <TB1> INFO: idle data (no TBM trl): 0
[16:41:09.297] <TB1> INFO: no data (only TBM hdr): 0
[16:41:09.297] <TB1> INFO: TBM errors: 0
[16:41:09.297] <TB1> INFO: flawed TBM headers: 0
[16:41:09.297] <TB1> INFO: flawed TBM trailers: 0
[16:41:09.297] <TB1> INFO: event ID mismatches: 0
[16:41:09.297] <TB1> INFO: ROC errors: 0
[16:41:09.297] <TB1> INFO: missing ROC header(s): 0
[16:41:09.297] <TB1> INFO: misplaced readback start: 0
[16:41:09.297] <TB1> INFO: Pixel decoding errors: 0
[16:41:09.297] <TB1> INFO: pixel data incomplete: 0
[16:41:09.297] <TB1> INFO: pixel address: 0
[16:41:09.297] <TB1> INFO: pulse height fill bit: 0
[16:41:09.297] <TB1> INFO: buffer corruption: 0
[16:41:09.304] <TB1> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C15.dat
[16:41:09.304] <TB1> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//phCalibrationFitErr_C15.dat

[16:41:09.304] <TB1> INFO: ######################################################################
[16:41:09.304] <TB1> INFO: PixTestReadback::doTest()
[16:41:09.304] <TB1> INFO: ######################################################################
[16:41:09.304] <TB1> INFO: ----------------------------------------------------------------------
[16:41:09.304] <TB1> INFO: PixTestReadback::CalibrateVd()
[16:41:09.304] <TB1> INFO: ----------------------------------------------------------------------
[16:41:19.284] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C0.dat
[16:41:19.284] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C1.dat
[16:41:19.285] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C2.dat
[16:41:19.285] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C3.dat
[16:41:19.285] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C4.dat
[16:41:19.285] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C5.dat
[16:41:19.285] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C6.dat
[16:41:19.285] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C7.dat
[16:41:19.285] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C8.dat
[16:41:19.285] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C9.dat
[16:41:19.285] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C10.dat
[16:41:19.285] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C11.dat
[16:41:19.285] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C12.dat
[16:41:19.285] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C13.dat
[16:41:19.286] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C14.dat
[16:41:19.286] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C15.dat
[16:41:19.315] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:41:19.315] <TB1> INFO: ----------------------------------------------------------------------
[16:41:19.315] <TB1> INFO: PixTestReadback::CalibrateVa()
[16:41:19.315] <TB1> INFO: ----------------------------------------------------------------------
[16:41:29.260] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C0.dat
[16:41:29.260] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C1.dat
[16:41:29.260] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C2.dat
[16:41:29.260] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C3.dat
[16:41:29.260] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C4.dat
[16:41:29.260] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C5.dat
[16:41:29.260] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C6.dat
[16:41:29.260] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C7.dat
[16:41:29.260] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C8.dat
[16:41:29.260] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C9.dat
[16:41:29.261] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C10.dat
[16:41:29.261] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C11.dat
[16:41:29.261] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C12.dat
[16:41:29.261] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C13.dat
[16:41:29.261] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C14.dat
[16:41:29.261] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C15.dat
[16:41:29.290] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:41:29.290] <TB1> INFO: ----------------------------------------------------------------------
[16:41:29.290] <TB1> INFO: PixTestReadback::readbackVbg()
[16:41:29.290] <TB1> INFO: ----------------------------------------------------------------------
[16:41:36.959] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:41:36.959] <TB1> INFO: ----------------------------------------------------------------------
[16:41:36.959] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[16:41:36.959] <TB1> INFO: ----------------------------------------------------------------------
[16:41:36.959] <TB1> INFO: Vbg will be calibrated using Vd calibration
[16:41:36.959] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 148.8calibrated Vbg = 1.19372 :::*/*/*/*/
[16:41:36.959] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 147.8calibrated Vbg = 1.19298 :::*/*/*/*/
[16:41:36.959] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 152calibrated Vbg = 1.19508 :::*/*/*/*/
[16:41:36.959] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 154.4calibrated Vbg = 1.18751 :::*/*/*/*/
[16:41:36.959] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 149.7calibrated Vbg = 1.19523 :::*/*/*/*/
[16:41:36.959] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 157.4calibrated Vbg = 1.19235 :::*/*/*/*/
[16:41:36.959] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 149.3calibrated Vbg = 1.1966 :::*/*/*/*/
[16:41:36.959] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 165.4calibrated Vbg = 1.19462 :::*/*/*/*/
[16:41:36.959] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 149.4calibrated Vbg = 1.18884 :::*/*/*/*/
[16:41:36.959] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 157.8calibrated Vbg = 1.18369 :::*/*/*/*/
[16:41:36.959] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 151.1calibrated Vbg = 1.18441 :::*/*/*/*/
[16:41:36.959] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 161.6calibrated Vbg = 1.18002 :::*/*/*/*/
[16:41:36.959] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 161.1calibrated Vbg = 1.19114 :::*/*/*/*/
[16:41:36.959] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 151.8calibrated Vbg = 1.18833 :::*/*/*/*/
[16:41:36.959] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 158.9calibrated Vbg = 1.18879 :::*/*/*/*/
[16:41:36.959] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 159.1calibrated Vbg = 1.19309 :::*/*/*/*/
[16:41:36.962] <TB1> INFO: ----------------------------------------------------------------------
[16:41:36.962] <TB1> INFO: PixTestReadback::CalibrateIa()
[16:41:36.962] <TB1> INFO: ----------------------------------------------------------------------


[16:44:17.758] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C0.dat
[16:44:17.758] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C1.dat
[16:44:17.759] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C2.dat
[16:44:17.759] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C3.dat
[16:44:17.759] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C4.dat
[16:44:17.759] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C5.dat
[16:44:17.759] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C6.dat
[16:44:17.759] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C7.dat
[16:44:17.759] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C8.dat
[16:44:17.759] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C9.dat
[16:44:17.759] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C10.dat
[16:44:17.759] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C11.dat
[16:44:17.759] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C12.dat
[16:44:17.759] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C13.dat
[16:44:17.759] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C14.dat
[16:44:17.759] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//readbackCal_C15.dat
[16:44:17.789] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:44:17.791] <TB1> INFO: PixTestReadback::doTest() done
[16:44:17.791] <TB1> INFO: Decoding statistics:
[16:44:17.791] <TB1> INFO: General information:
[16:44:17.791] <TB1> INFO: 16bit words read: 1536
[16:44:17.791] <TB1> INFO: valid events total: 256
[16:44:17.791] <TB1> INFO: empty events: 256
[16:44:17.791] <TB1> INFO: valid events with pixels: 0
[16:44:17.791] <TB1> INFO: valid pixel hits: 0
[16:44:17.791] <TB1> INFO: Event errors: 0
[16:44:17.791] <TB1> INFO: start marker: 0
[16:44:17.791] <TB1> INFO: stop marker: 0
[16:44:17.792] <TB1> INFO: overflow: 0
[16:44:17.792] <TB1> INFO: invalid 5bit words: 0
[16:44:17.792] <TB1> INFO: invalid XOR eye diagram: 0
[16:44:17.792] <TB1> INFO: frame (failed synchr.): 0
[16:44:17.792] <TB1> INFO: idle data (no TBM trl): 0
[16:44:17.792] <TB1> INFO: no data (only TBM hdr): 0
[16:44:17.792] <TB1> INFO: TBM errors: 0
[16:44:17.792] <TB1> INFO: flawed TBM headers: 0
[16:44:17.792] <TB1> INFO: flawed TBM trailers: 0
[16:44:17.792] <TB1> INFO: event ID mismatches: 0
[16:44:17.792] <TB1> INFO: ROC errors: 0
[16:44:17.792] <TB1> INFO: missing ROC header(s): 0
[16:44:17.792] <TB1> INFO: misplaced readback start: 0
[16:44:17.792] <TB1> INFO: Pixel decoding errors: 0
[16:44:17.792] <TB1> INFO: pixel data incomplete: 0
[16:44:17.792] <TB1> INFO: pixel address: 0
[16:44:17.792] <TB1> INFO: pulse height fill bit: 0
[16:44:17.792] <TB1> INFO: buffer corruption: 0
[16:44:17.845] <TB1> INFO: ######################################################################
[16:44:17.845] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[16:44:17.845] <TB1> INFO: ######################################################################
[16:44:17.847] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[16:44:17.862] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[16:44:17.862] <TB1> INFO: run 1 of 1
[16:44:18.132] <TB1> INFO: Expecting 3120000 events.
[16:44:49.114] <TB1> INFO: 670825 events read in total (30390ms).











[16:45:19.297] <TB1> INFO: 1336765 events read in total (60573ms).











[16:45:49.454] <TB1> INFO: 1998685 events read in total (90730ms).











[16:46:19.750] <TB1> INFO: 2660785 events read in total (121026ms).




















[16:46:41.052] <TB1> INFO: 3120000 events read in total (142328ms).
[16:46:41.125] <TB1> INFO: Test took 143264ms.
[16:47:05.733] <TB1> INFO: PixTestBBMap::doTest() done with 1 decoding errors: , duration: 167 seconds
[16:47:05.733] <TB1> INFO: number of dead bumps (per ROC): 0 0 2 0 0 0 0 1 0 0 1 1 0 0 0 0
[16:47:05.733] <TB1> INFO: separation cut (per ROC): 104 106 107 108 102 105 108 104 105 107 106 121 105 121 105 117
[16:47:05.733] <TB1> INFO: Decoding statistics:
[16:47:05.733] <TB1> INFO: General information:
[16:47:05.733] <TB1> INFO: 16bit words read: 0
[16:47:05.733] <TB1> INFO: valid events total: 0
[16:47:05.733] <TB1> INFO: empty events: 0
[16:47:05.733] <TB1> INFO: valid events with pixels: 0
[16:47:05.733] <TB1> INFO: valid pixel hits: 0
[16:47:05.733] <TB1> INFO: Event errors: 0
[16:47:05.733] <TB1> INFO: start marker: 0
[16:47:05.733] <TB1> INFO: stop marker: 0
[16:47:05.733] <TB1> INFO: overflow: 0
[16:47:05.733] <TB1> INFO: invalid 5bit words: 0
[16:47:05.733] <TB1> INFO: invalid XOR eye diagram: 0
[16:47:05.733] <TB1> INFO: frame (failed synchr.): 0
[16:47:05.733] <TB1> INFO: idle data (no TBM trl): 0
[16:47:05.733] <TB1> INFO: no data (only TBM hdr): 0
[16:47:05.733] <TB1> INFO: TBM errors: 0
[16:47:05.733] <TB1> INFO: flawed TBM headers: 0
[16:47:05.733] <TB1> INFO: flawed TBM trailers: 0
[16:47:05.733] <TB1> INFO: event ID mismatches: 0
[16:47:05.733] <TB1> INFO: ROC errors: 0
[16:47:05.733] <TB1> INFO: missing ROC header(s): 0
[16:47:05.733] <TB1> INFO: misplaced readback start: 0
[16:47:05.733] <TB1> INFO: Pixel decoding errors: 0
[16:47:05.733] <TB1> INFO: pixel data incomplete: 0
[16:47:05.733] <TB1> INFO: pixel address: 0
[16:47:05.733] <TB1> INFO: pulse height fill bit: 0
[16:47:05.734] <TB1> INFO: buffer corruption: 0
[16:47:05.770] <TB1> INFO: ######################################################################
[16:47:05.770] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:47:05.770] <TB1> INFO: ######################################################################
[16:47:05.770] <TB1> INFO: ----------------------------------------------------------------------
[16:47:05.770] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:47:05.770] <TB1> INFO: ----------------------------------------------------------------------
[16:47:05.770] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[16:47:05.785] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[16:47:05.785] <TB1> INFO: run 1 of 1
[16:47:06.024] <TB1> INFO: Expecting 36608000 events.
[16:47:29.671] <TB1> INFO: 702500 events read in total (23056ms).
[16:47:53.271] <TB1> INFO: 1386850 events read in total (46656ms).
[16:48:16.485] <TB1> INFO: 2074750 events read in total (69870ms).
[16:48:39.896] <TB1> INFO: 2761300 events read in total (93281ms).
[16:49:02.898] <TB1> INFO: 3445450 events read in total (116283ms).
[16:49:25.694] <TB1> INFO: 4127750 events read in total (139079ms).
[16:49:48.950] <TB1> INFO: 4813150 events read in total (162335ms).
[16:50:12.255] <TB1> INFO: 5497950 events read in total (185640ms).
[16:50:35.974] <TB1> INFO: 6182000 events read in total (209359ms).
[16:50:58.767] <TB1> INFO: 6862400 events read in total (232152ms).
[16:51:21.701] <TB1> INFO: 7542500 events read in total (255086ms).
[16:51:44.933] <TB1> INFO: 8223900 events read in total (278318ms).
[16:52:08.439] <TB1> INFO: 8906350 events read in total (301824ms).
[16:52:31.610] <TB1> INFO: 9589850 events read in total (324995ms).
[16:52:54.652] <TB1> INFO: 10272250 events read in total (348037ms).
[16:53:17.775] <TB1> INFO: 10952400 events read in total (371160ms).
[16:53:41.276] <TB1> INFO: 11631450 events read in total (394661ms).
[16:54:04.427] <TB1> INFO: 12309400 events read in total (417812ms).
[16:54:27.552] <TB1> INFO: 12987350 events read in total (440937ms).
[16:54:50.521] <TB1> INFO: 13665250 events read in total (463906ms).
[16:55:13.499] <TB1> INFO: 14343350 events read in total (486884ms).
[16:55:36.882] <TB1> INFO: 15020450 events read in total (510267ms).
[16:55:59.823] <TB1> INFO: 15697750 events read in total (533208ms).
[16:56:22.937] <TB1> INFO: 16375600 events read in total (556322ms).
[16:56:45.843] <TB1> INFO: 17052250 events read in total (579228ms).
[16:57:08.941] <TB1> INFO: 17729600 events read in total (602326ms).
[16:57:32.067] <TB1> INFO: 18406600 events read in total (625452ms).
[16:57:55.204] <TB1> INFO: 19077750 events read in total (648589ms).
[16:58:18.152] <TB1> INFO: 19748600 events read in total (671537ms).
[16:58:41.192] <TB1> INFO: 20422600 events read in total (694577ms).
[16:59:04.516] <TB1> INFO: 21094250 events read in total (717901ms).
[16:59:27.683] <TB1> INFO: 21767050 events read in total (741068ms).
[16:59:50.606] <TB1> INFO: 22438000 events read in total (763992ms).
[17:00:13.621] <TB1> INFO: 23109600 events read in total (787006ms).
[17:00:36.459] <TB1> INFO: 23780950 events read in total (809844ms).
[17:00:59.661] <TB1> INFO: 24452200 events read in total (833046ms).
[17:01:22.570] <TB1> INFO: 25122600 events read in total (855955ms).
[17:01:45.877] <TB1> INFO: 25793450 events read in total (879262ms).
[17:02:09.090] <TB1> INFO: 26463050 events read in total (902475ms).
[17:02:32.117] <TB1> INFO: 27132650 events read in total (925502ms).
[17:02:55.027] <TB1> INFO: 27802100 events read in total (948412ms).
[17:03:17.850] <TB1> INFO: 28472250 events read in total (971235ms).
[17:03:40.893] <TB1> INFO: 29141850 events read in total (994278ms).
[17:04:03.591] <TB1> INFO: 29809050 events read in total (1016976ms).
[17:04:26.419] <TB1> INFO: 30474850 events read in total (1039804ms).
[17:04:49.418] <TB1> INFO: 31142450 events read in total (1062803ms).
[17:05:12.549] <TB1> INFO: 31811400 events read in total (1085934ms).
[17:05:35.405] <TB1> INFO: 32479000 events read in total (1108790ms).
[17:05:58.764] <TB1> INFO: 33146750 events read in total (1132149ms).
[17:06:21.969] <TB1> INFO: 33814500 events read in total (1155354ms).
[17:06:45.202] <TB1> INFO: 34482450 events read in total (1178587ms).
[17:07:08.035] <TB1> INFO: 35150050 events read in total (1201420ms).
[17:07:30.966] <TB1> INFO: 35818550 events read in total (1224351ms).
[17:07:55.118] <TB1> INFO: 36501250 events read in total (1248503ms).
[17:07:59.099] <TB1> INFO: 36608000 events read in total (1252484ms).
[17:07:59.233] <TB1> INFO: Test took 1253448ms.
[17:07:59.793] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:08:01.714] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:08:04.043] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:08:06.390] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:08:08.352] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:08:10.079] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:08:12.034] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:08:14.034] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:08:15.887] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:08:17.749] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:08:19.732] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:08:21.807] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:08:23.976] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:08:25.844] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:08:27.458] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:08:29.226] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:08:31.351] <TB1> INFO: PixTestScurves::scurves() done
[17:08:31.351] <TB1> INFO: Vcal mean: 119.53 124.00 120.77 122.37 107.08 136.04 128.26 113.01 118.51 117.87 125.44 130.56 122.36 126.63 120.25 124.54
[17:08:31.351] <TB1> INFO: Vcal RMS: 5.87 6.54 6.26 6.18 5.25 6.09 6.10 5.10 6.09 5.97 6.32 5.60 6.56 5.68 6.00 6.16
[17:08:31.351] <TB1> INFO: PixTestScurves::fullTest() done, duration: 1285 seconds
[17:08:31.351] <TB1> INFO: Decoding statistics:
[17:08:31.351] <TB1> INFO: General information:
[17:08:31.351] <TB1> INFO: 16bit words read: 0
[17:08:31.351] <TB1> INFO: valid events total: 0
[17:08:31.351] <TB1> INFO: empty events: 0
[17:08:31.351] <TB1> INFO: valid events with pixels: 0
[17:08:31.351] <TB1> INFO: valid pixel hits: 0
[17:08:31.351] <TB1> INFO: Event errors: 0
[17:08:31.351] <TB1> INFO: start marker: 0
[17:08:31.351] <TB1> INFO: stop marker: 0
[17:08:31.351] <TB1> INFO: overflow: 0
[17:08:31.351] <TB1> INFO: invalid 5bit words: 0
[17:08:31.351] <TB1> INFO: invalid XOR eye diagram: 0
[17:08:31.351] <TB1> INFO: frame (failed synchr.): 0
[17:08:31.352] <TB1> INFO: idle data (no TBM trl): 0
[17:08:31.352] <TB1> INFO: no data (only TBM hdr): 0
[17:08:31.352] <TB1> INFO: TBM errors: 0
[17:08:31.352] <TB1> INFO: flawed TBM headers: 0
[17:08:31.352] <TB1> INFO: flawed TBM trailers: 0
[17:08:31.352] <TB1> INFO: event ID mismatches: 0
[17:08:31.352] <TB1> INFO: ROC errors: 0
[17:08:31.352] <TB1> INFO: missing ROC header(s): 0
[17:08:31.352] <TB1> INFO: misplaced readback start: 0
[17:08:31.352] <TB1> INFO: Pixel decoding errors: 0
[17:08:31.352] <TB1> INFO: pixel data incomplete: 0
[17:08:31.352] <TB1> INFO: pixel address: 0
[17:08:31.352] <TB1> INFO: pulse height fill bit: 0
[17:08:31.352] <TB1> INFO: buffer corruption: 0
[17:08:31.447] <TB1> INFO: ######################################################################
[17:08:31.447] <TB1> INFO: PixTestTrim::doTest()
[17:08:31.447] <TB1> INFO: ######################################################################
[17:08:31.448] <TB1> INFO: ----------------------------------------------------------------------
[17:08:31.448] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[17:08:31.448] <TB1> INFO: ----------------------------------------------------------------------
[17:08:31.517] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[17:08:31.517] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[17:08:31.534] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:08:31.534] <TB1> INFO: run 1 of 1
[17:08:31.858] <TB1> INFO: Expecting 5025280 events.
[17:09:02.983] <TB1> INFO: 830232 events read in total (30527ms).
[17:09:33.389] <TB1> INFO: 1656736 events read in total (60933ms).
[17:10:03.668] <TB1> INFO: 2480216 events read in total (91213ms).
[17:10:33.979] <TB1> INFO: 3299848 events read in total (121523ms).
[17:11:04.286] <TB1> INFO: 4115440 events read in total (151830ms).
[17:11:34.076] <TB1> INFO: 4929160 events read in total (181620ms).
[17:11:37.945] <TB1> INFO: 5025280 events read in total (185489ms).
[17:11:38.004] <TB1> INFO: Test took 186470ms.
[17:11:57.069] <TB1> INFO: ROC 0 VthrComp = 124
[17:11:57.069] <TB1> INFO: ROC 1 VthrComp = 125
[17:11:57.069] <TB1> INFO: ROC 2 VthrComp = 125
[17:11:57.069] <TB1> INFO: ROC 3 VthrComp = 129
[17:11:57.069] <TB1> INFO: ROC 4 VthrComp = 112
[17:11:57.069] <TB1> INFO: ROC 5 VthrComp = 132
[17:11:57.070] <TB1> INFO: ROC 6 VthrComp = 134
[17:11:57.071] <TB1> INFO: ROC 7 VthrComp = 120
[17:11:57.071] <TB1> INFO: ROC 8 VthrComp = 122
[17:11:57.072] <TB1> INFO: ROC 9 VthrComp = 121
[17:11:57.072] <TB1> INFO: ROC 10 VthrComp = 129
[17:11:57.072] <TB1> INFO: ROC 11 VthrComp = 135
[17:11:57.072] <TB1> INFO: ROC 12 VthrComp = 118
[17:11:57.072] <TB1> INFO: ROC 13 VthrComp = 131
[17:11:57.072] <TB1> INFO: ROC 14 VthrComp = 128
[17:11:57.073] <TB1> INFO: ROC 15 VthrComp = 130
[17:11:57.317] <TB1> INFO: Expecting 41600 events.
[17:12:00.764] <TB1> INFO: 41600 events read in total (2855ms).
[17:12:00.765] <TB1> INFO: Test took 3691ms.
[17:12:00.774] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[17:12:00.774] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[17:12:00.786] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:12:00.786] <TB1> INFO: run 1 of 1
[17:12:01.064] <TB1> INFO: Expecting 5025280 events.
[17:12:27.711] <TB1> INFO: 591592 events read in total (26055ms).
[17:12:53.882] <TB1> INFO: 1182432 events read in total (52226ms).
[17:13:19.555] <TB1> INFO: 1772600 events read in total (77899ms).
[17:13:45.773] <TB1> INFO: 2361992 events read in total (104117ms).
[17:14:11.985] <TB1> INFO: 2948720 events read in total (130329ms).
[17:14:37.971] <TB1> INFO: 3534448 events read in total (156315ms).
[17:15:03.435] <TB1> INFO: 4118488 events read in total (181779ms).
[17:15:29.609] <TB1> INFO: 4701576 events read in total (207953ms).
[17:15:44.300] <TB1> INFO: 5025280 events read in total (222644ms).
[17:15:44.371] <TB1> INFO: Test took 223584ms.
[17:16:11.563] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 58.8161 for pixel 51/6 mean/min/max = 45.8677/32.8866/58.8489
[17:16:11.564] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 61.9699 for pixel 12/77 mean/min/max = 46.9447/31.527/62.3624
[17:16:11.564] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 59.8654 for pixel 37/79 mean/min/max = 46.3074/32.6957/59.9191
[17:16:11.565] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 58.41 for pixel 0/7 mean/min/max = 46.2532/34.0411/58.4652
[17:16:11.565] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 58.3066 for pixel 1/0 mean/min/max = 45.9997/33.6338/58.3656
[17:16:11.566] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 64.5366 for pixel 0/10 mean/min/max = 49.4624/34.332/64.5928
[17:16:11.566] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 59.3241 for pixel 4/59 mean/min/max = 46.8242/34.3158/59.3326
[17:16:11.567] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 59.9667 for pixel 15/77 mean/min/max = 46.3236/32.6549/59.9923
[17:16:11.567] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 60.2256 for pixel 11/4 mean/min/max = 46.4123/32.464/60.3606
[17:16:11.568] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 58.9366 for pixel 0/65 mean/min/max = 46.1442/33.2463/59.042
[17:16:11.568] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 60.6461 for pixel 21/10 mean/min/max = 46.221/31.7765/60.6656
[17:16:11.569] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 58.5534 for pixel 0/14 mean/min/max = 46.4191/34.2382/58.6001
[17:16:11.569] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 61.9898 for pixel 20/78 mean/min/max = 47.201/32.3732/62.0288
[17:16:11.570] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 57.035 for pixel 7/25 mean/min/max = 44.8661/32.6454/57.0868
[17:16:11.570] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 57.4429 for pixel 9/63 mean/min/max = 44.7909/32.0353/57.5464
[17:16:11.571] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 59.3777 for pixel 0/48 mean/min/max = 45.8956/32.388/59.4032
[17:16:11.571] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:16:11.660] <TB1> INFO: Expecting 411648 events.
[17:16:21.088] <TB1> INFO: 411648 events read in total (8837ms).
[17:16:21.096] <TB1> INFO: Expecting 411648 events.
[17:16:30.487] <TB1> INFO: 411648 events read in total (8981ms).
[17:16:30.500] <TB1> INFO: Expecting 411648 events.
[17:16:39.937] <TB1> INFO: 411648 events read in total (9034ms).
[17:16:39.951] <TB1> INFO: Expecting 411648 events.
[17:16:49.411] <TB1> INFO: 411648 events read in total (9057ms).
[17:16:49.427] <TB1> INFO: Expecting 411648 events.
[17:16:58.914] <TB1> INFO: 411648 events read in total (9084ms).
[17:16:58.933] <TB1> INFO: Expecting 411648 events.
[17:17:08.300] <TB1> INFO: 411648 events read in total (8957ms).
[17:17:08.321] <TB1> INFO: Expecting 411648 events.
[17:17:17.662] <TB1> INFO: 411648 events read in total (8937ms).
[17:17:17.686] <TB1> INFO: Expecting 411648 events.
[17:17:27.061] <TB1> INFO: 411648 events read in total (8972ms).
[17:17:27.088] <TB1> INFO: Expecting 411648 events.
[17:17:36.526] <TB1> INFO: 411648 events read in total (9035ms).
[17:17:36.558] <TB1> INFO: Expecting 411648 events.
[17:17:45.863] <TB1> INFO: 411648 events read in total (8902ms).
[17:17:45.894] <TB1> INFO: Expecting 411648 events.
[17:17:55.248] <TB1> INFO: 411648 events read in total (8951ms).
[17:17:55.283] <TB1> INFO: Expecting 411648 events.
[17:18:04.663] <TB1> INFO: 411648 events read in total (8977ms).
[17:18:04.725] <TB1> INFO: Expecting 411648 events.
[17:18:14.127] <TB1> INFO: 411648 events read in total (8999ms).
[17:18:14.167] <TB1> INFO: Expecting 411648 events.
[17:18:23.502] <TB1> INFO: 411648 events read in total (8931ms).
[17:18:23.571] <TB1> INFO: Expecting 411648 events.
[17:18:32.871] <TB1> INFO: 411648 events read in total (8897ms).
[17:18:32.925] <TB1> INFO: Expecting 411648 events.
[17:18:42.440] <TB1> INFO: 411648 events read in total (9112ms).
[17:18:42.510] <TB1> INFO: Test took 150939ms.
[17:18:43.218] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[17:18:43.230] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:18:43.230] <TB1> INFO: run 1 of 1
[17:18:43.467] <TB1> INFO: Expecting 5025280 events.
[17:19:10.338] <TB1> INFO: 587280 events read in total (26279ms).
[17:19:36.469] <TB1> INFO: 1173760 events read in total (52410ms).
[17:20:02.554] <TB1> INFO: 1759256 events read in total (78495ms).
[17:20:28.722] <TB1> INFO: 2343496 events read in total (104663ms).
[17:20:55.286] <TB1> INFO: 2926720 events read in total (131227ms).
[17:21:21.293] <TB1> INFO: 3510032 events read in total (157234ms).
[17:21:47.461] <TB1> INFO: 4093536 events read in total (183402ms).
[17:22:13.537] <TB1> INFO: 4677944 events read in total (209478ms).
[17:22:29.449] <TB1> INFO: 5025280 events read in total (225390ms).
[17:22:29.632] <TB1> INFO: Test took 226402ms.
[17:22:58.839] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 12.271033 .. 147.109596
[17:22:59.103] <TB1> INFO: Expecting 208000 events.
[17:23:08.792] <TB1> INFO: 208000 events read in total (9097ms).
[17:23:08.793] <TB1> INFO: Test took 9952ms.
[17:23:08.876] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 2 .. 157 (-1/-1) hits flags = 528 (plus default)
[17:23:08.890] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:23:08.890] <TB1> INFO: run 1 of 1
[17:23:09.172] <TB1> INFO: Expecting 5191680 events.
[17:23:36.010] <TB1> INFO: 583000 events read in total (26247ms).
[17:24:01.592] <TB1> INFO: 1166000 events read in total (51829ms).
[17:24:27.301] <TB1> INFO: 1748976 events read in total (77538ms).
[17:24:53.480] <TB1> INFO: 2332192 events read in total (103718ms).
[17:25:19.771] <TB1> INFO: 2915000 events read in total (130008ms).
[17:25:45.821] <TB1> INFO: 3497520 events read in total (156058ms).
[17:26:11.269] <TB1> INFO: 4079040 events read in total (181506ms).
[17:26:37.361] <TB1> INFO: 4659928 events read in total (207598ms).
[17:27:01.342] <TB1> INFO: 5191680 events read in total (231579ms).
[17:27:01.502] <TB1> INFO: Test took 232612ms.
[17:27:28.527] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 27.961160 .. 45.411597
[17:27:28.799] <TB1> INFO: Expecting 208000 events.
[17:27:38.704] <TB1> INFO: 208000 events read in total (9314ms).
[17:27:38.705] <TB1> INFO: Test took 10176ms.
[17:27:38.760] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 55 (-1/-1) hits flags = 528 (plus default)
[17:27:38.774] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:27:38.774] <TB1> INFO: run 1 of 1
[17:27:39.051] <TB1> INFO: Expecting 1297920 events.
[17:28:07.951] <TB1> INFO: 661616 events read in total (28308ms).
[17:28:35.117] <TB1> INFO: 1297920 events read in total (55474ms).
[17:28:35.169] <TB1> INFO: Test took 56396ms.
[17:28:48.117] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 28.615748 .. 48.256747
[17:28:48.403] <TB1> INFO: Expecting 208000 events.
[17:28:58.364] <TB1> INFO: 208000 events read in total (9369ms).
[17:28:58.365] <TB1> INFO: Test took 10246ms.
[17:28:58.416] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 18 .. 58 (-1/-1) hits flags = 528 (plus default)
[17:28:58.428] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:28:58.429] <TB1> INFO: run 1 of 1
[17:28:58.707] <TB1> INFO: Expecting 1364480 events.
[17:29:26.757] <TB1> INFO: 644832 events read in total (27459ms).
[17:29:54.517] <TB1> INFO: 1288496 events read in total (55220ms).
[17:29:58.266] <TB1> INFO: 1364480 events read in total (58969ms).
[17:29:58.298] <TB1> INFO: Test took 59869ms.
[17:30:12.901] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 26.273613 .. 49.566102
[17:30:13.140] <TB1> INFO: Expecting 208000 events.
[17:30:22.002] <TB1> INFO: 208000 events read in total (9270ms).
[17:30:22.003] <TB1> INFO: Test took 10101ms.
[17:30:23.063] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 16 .. 59 (-1/-1) hits flags = 528 (plus default)
[17:30:23.075] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:30:23.075] <TB1> INFO: run 1 of 1
[17:30:23.353] <TB1> INFO: Expecting 1464320 events.
[17:30:52.101] <TB1> INFO: 650136 events read in total (28156ms).
[17:31:19.742] <TB1> INFO: 1299688 events read in total (55797ms).
[17:31:27.334] <TB1> INFO: 1464320 events read in total (63389ms).
[17:31:27.379] <TB1> INFO: Test took 64304ms.
[17:31:41.228] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[17:31:41.228] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[17:31:41.241] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:31:41.242] <TB1> INFO: run 1 of 1
[17:31:41.508] <TB1> INFO: Expecting 1364480 events.
[17:32:09.672] <TB1> INFO: 668704 events read in total (27572ms).
[17:32:37.884] <TB1> INFO: 1337136 events read in total (55785ms).
[17:32:39.453] <TB1> INFO: 1364480 events read in total (57354ms).
[17:32:39.482] <TB1> INFO: Test took 58241ms.
[17:32:52.478] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C0.dat
[17:32:52.478] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C1.dat
[17:32:52.478] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C2.dat
[17:32:52.479] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C3.dat
[17:32:52.479] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C4.dat
[17:32:52.479] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C5.dat
[17:32:52.479] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C6.dat
[17:32:52.479] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C7.dat
[17:32:52.479] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C8.dat
[17:32:52.479] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C9.dat
[17:32:52.479] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C10.dat
[17:32:52.479] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C11.dat
[17:32:52.479] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C12.dat
[17:32:52.479] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C13.dat
[17:32:52.479] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C14.dat
[17:32:52.479] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C15.dat
[17:32:52.479] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//trimParameters35_C0.dat
[17:32:52.484] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//trimParameters35_C1.dat
[17:32:52.489] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//trimParameters35_C2.dat
[17:32:52.493] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//trimParameters35_C3.dat
[17:32:52.498] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//trimParameters35_C4.dat
[17:32:52.503] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//trimParameters35_C5.dat
[17:32:52.507] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//trimParameters35_C6.dat
[17:32:52.512] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//trimParameters35_C7.dat
[17:32:52.516] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//trimParameters35_C8.dat
[17:32:52.521] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//trimParameters35_C9.dat
[17:32:52.526] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//trimParameters35_C10.dat
[17:32:52.530] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//trimParameters35_C11.dat
[17:32:52.535] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//trimParameters35_C12.dat
[17:32:52.540] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//trimParameters35_C13.dat
[17:32:52.544] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//trimParameters35_C14.dat
[17:32:52.549] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//trimParameters35_C15.dat
[17:32:52.554] <TB1> INFO: PixTestTrim::trimTest() done
[17:32:52.554] <TB1> INFO: vtrim: 118 141 131 121 132 130 133 123 130 111 128 122 121 116 121 136
[17:32:52.554] <TB1> INFO: vthrcomp: 124 125 125 129 112 132 134 120 122 121 129 135 118 131 128 130
[17:32:52.554] <TB1> INFO: vcal mean: 35.11 35.68 35.14 35.04 35.10 35.43 35.06 35.01 35.04 35.05 35.11 35.03 35.24 35.00 34.99 35.02
[17:32:52.554] <TB1> INFO: vcal RMS: 1.09 1.80 1.29 0.99 0.97 1.48 0.98 0.97 1.05 0.97 1.14 1.02 1.42 1.00 1.00 1.03
[17:32:52.554] <TB1> INFO: bits mean: 9.38 10.10 9.43 8.47 9.21 8.37 8.96 9.10 9.31 8.84 9.70 9.11 9.37 9.78 9.55 9.40
[17:32:52.554] <TB1> INFO: bits RMS: 2.69 2.62 2.67 2.84 2.64 2.79 2.54 2.76 2.66 2.80 2.65 2.58 2.76 2.61 2.81 2.74
[17:32:52.561] <TB1> INFO: ----------------------------------------------------------------------
[17:32:52.561] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[17:32:52.561] <TB1> INFO: ----------------------------------------------------------------------
[17:32:52.564] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[17:32:52.577] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:32:52.577] <TB1> INFO: run 1 of 1
[17:32:52.814] <TB1> INFO: Expecting 4160000 events.
[17:33:25.843] <TB1> INFO: 777025 events read in total (32437ms).
[17:33:58.282] <TB1> INFO: 1545500 events read in total (64876ms).
[17:34:30.592] <TB1> INFO: 2307050 events read in total (97186ms).
[17:35:03.115] <TB1> INFO: 3062740 events read in total (129709ms).
[17:35:35.469] <TB1> INFO: 3814345 events read in total (162063ms).
[17:35:50.364] <TB1> INFO: 4160000 events read in total (176958ms).
[17:35:50.453] <TB1> INFO: Test took 177876ms.
[17:36:15.669] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 207 (-1/-1) hits flags = 528 (plus default)
[17:36:15.683] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:36:15.683] <TB1> INFO: run 1 of 1
[17:36:15.923] <TB1> INFO: Expecting 4326400 events.
[17:36:48.298] <TB1> INFO: 738200 events read in total (31783ms).
[17:37:19.947] <TB1> INFO: 1470145 events read in total (63432ms).
[17:37:51.386] <TB1> INFO: 2198300 events read in total (94871ms).
[17:38:23.008] <TB1> INFO: 2920760 events read in total (126493ms).
[17:38:54.656] <TB1> INFO: 3639770 events read in total (158141ms).
[17:39:24.729] <TB1> INFO: 4326400 events read in total (188214ms).
[17:39:24.822] <TB1> INFO: Test took 189139ms.
[17:39:49.961] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[17:39:49.974] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:39:49.974] <TB1> INFO: run 1 of 1
[17:39:50.239] <TB1> INFO: Expecting 4160000 events.
[17:40:23.443] <TB1> INFO: 748970 events read in total (32612ms).
[17:40:55.534] <TB1> INFO: 1492240 events read in total (64703ms).
[17:41:27.421] <TB1> INFO: 2230775 events read in total (96590ms).
[17:41:59.567] <TB1> INFO: 2964105 events read in total (128736ms).
[17:42:31.291] <TB1> INFO: 3693390 events read in total (160460ms).
[17:42:51.845] <TB1> INFO: 4160000 events read in total (181014ms).
[17:42:51.927] <TB1> INFO: Test took 181953ms.
[17:43:21.238] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 200 (-1/-1) hits flags = 528 (plus default)
[17:43:21.251] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:43:21.251] <TB1> INFO: run 1 of 1
[17:43:21.488] <TB1> INFO: Expecting 4180800 events.
[17:43:54.077] <TB1> INFO: 748685 events read in total (31997ms).
[17:44:26.072] <TB1> INFO: 1490955 events read in total (63992ms).
[17:44:57.950] <TB1> INFO: 2228240 events read in total (95870ms).
[17:45:29.701] <TB1> INFO: 2960345 events read in total (127621ms).
[17:46:01.611] <TB1> INFO: 3688985 events read in total (159531ms).
[17:46:22.801] <TB1> INFO: 4180800 events read in total (180721ms).
[17:46:22.885] <TB1> INFO: Test took 181634ms.
[17:46:48.529] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 200 (-1/-1) hits flags = 528 (plus default)
[17:46:48.542] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:46:48.542] <TB1> INFO: run 1 of 1
[17:46:48.778] <TB1> INFO: Expecting 4180800 events.
[17:47:21.200] <TB1> INFO: 747965 events read in total (31830ms).
[17:47:53.006] <TB1> INFO: 1490305 events read in total (63636ms).
[17:48:24.711] <TB1> INFO: 2228305 events read in total (95341ms).
[17:48:57.237] <TB1> INFO: 2960825 events read in total (127867ms).
[17:49:28.754] <TB1> INFO: 3689150 events read in total (159384ms).
[17:49:50.078] <TB1> INFO: 4180800 events read in total (180708ms).
[17:49:50.204] <TB1> INFO: Test took 181662ms.
[17:50:15.278] <TB1> INFO: PixTestTrim::trimBitTest() done
[17:50:15.279] <TB1> INFO: PixTestTrim::doTest() done, duration: 2503 seconds
[17:50:15.279] <TB1> INFO: Decoding statistics:
[17:50:15.279] <TB1> INFO: General information:
[17:50:15.279] <TB1> INFO: 16bit words read: 0
[17:50:15.279] <TB1> INFO: valid events total: 0
[17:50:15.279] <TB1> INFO: empty events: 0
[17:50:15.279] <TB1> INFO: valid events with pixels: 0
[17:50:15.279] <TB1> INFO: valid pixel hits: 0
[17:50:15.279] <TB1> INFO: Event errors: 0
[17:50:15.279] <TB1> INFO: start marker: 0
[17:50:15.279] <TB1> INFO: stop marker: 0
[17:50:15.279] <TB1> INFO: overflow: 0
[17:50:15.279] <TB1> INFO: invalid 5bit words: 0
[17:50:15.279] <TB1> INFO: invalid XOR eye diagram: 0
[17:50:15.279] <TB1> INFO: frame (failed synchr.): 0
[17:50:15.279] <TB1> INFO: idle data (no TBM trl): 0
[17:50:15.279] <TB1> INFO: no data (only TBM hdr): 0
[17:50:15.279] <TB1> INFO: TBM errors: 0
[17:50:15.279] <TB1> INFO: flawed TBM headers: 0
[17:50:15.279] <TB1> INFO: flawed TBM trailers: 0
[17:50:15.279] <TB1> INFO: event ID mismatches: 0
[17:50:15.279] <TB1> INFO: ROC errors: 0
[17:50:15.279] <TB1> INFO: missing ROC header(s): 0
[17:50:15.279] <TB1> INFO: misplaced readback start: 0
[17:50:15.279] <TB1> INFO: Pixel decoding errors: 0
[17:50:15.279] <TB1> INFO: pixel data incomplete: 0
[17:50:15.279] <TB1> INFO: pixel address: 0
[17:50:15.279] <TB1> INFO: pulse height fill bit: 0
[17:50:15.279] <TB1> INFO: buffer corruption: 0
[17:50:16.034] <TB1> INFO: ######################################################################
[17:50:16.034] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[17:50:16.034] <TB1> INFO: ######################################################################
[17:50:16.271] <TB1> INFO: Expecting 41600 events.
[17:50:19.716] <TB1> INFO: 41600 events read in total (2853ms).
[17:50:19.717] <TB1> INFO: Test took 3683ms.
[17:50:20.199] <TB1> INFO: Expecting 41600 events.
[17:50:23.765] <TB1> INFO: 41600 events read in total (2975ms).
[17:50:23.766] <TB1> INFO: Test took 3845ms.
[17:50:24.121] <TB1> INFO: Expecting 41600 events.
[17:50:27.618] <TB1> INFO: 41600 events read in total (2905ms).
[17:50:27.619] <TB1> INFO: Test took 3829ms.
[17:50:27.908] <TB1> INFO: Expecting 41600 events.
[17:50:31.434] <TB1> INFO: 41600 events read in total (2934ms).
[17:50:31.435] <TB1> INFO: Test took 3792ms.
[17:50:31.724] <TB1> INFO: Expecting 41600 events.
[17:50:35.228] <TB1> INFO: 41600 events read in total (2912ms).
[17:50:35.229] <TB1> INFO: Test took 3770ms.
[17:50:35.521] <TB1> INFO: Expecting 41600 events.
[17:50:39.032] <TB1> INFO: 41600 events read in total (2920ms).
[17:50:39.033] <TB1> INFO: Test took 3778ms.
[17:50:39.335] <TB1> INFO: Expecting 41600 events.
[17:50:42.944] <TB1> INFO: 41600 events read in total (3018ms).
[17:50:42.945] <TB1> INFO: Test took 3888ms.
[17:50:43.236] <TB1> INFO: Expecting 41600 events.
[17:50:46.805] <TB1> INFO: 41600 events read in total (2977ms).
[17:50:46.805] <TB1> INFO: Test took 3834ms.
[17:50:47.095] <TB1> INFO: Expecting 41600 events.
[17:50:50.702] <TB1> INFO: 41600 events read in total (3015ms).
[17:50:50.703] <TB1> INFO: Test took 3873ms.
[17:50:50.993] <TB1> INFO: Expecting 41600 events.
[17:50:54.523] <TB1> INFO: 41600 events read in total (2939ms).
[17:50:54.524] <TB1> INFO: Test took 3797ms.
[17:50:54.816] <TB1> INFO: Expecting 41600 events.
[17:50:58.348] <TB1> INFO: 41600 events read in total (2941ms).
[17:50:58.349] <TB1> INFO: Test took 3799ms.
[17:50:58.654] <TB1> INFO: Expecting 41600 events.
[17:51:02.195] <TB1> INFO: 41600 events read in total (2949ms).
[17:51:02.196] <TB1> INFO: Test took 3823ms.
[17:51:02.486] <TB1> INFO: Expecting 41600 events.
[17:51:06.090] <TB1> INFO: 41600 events read in total (3012ms).
[17:51:06.091] <TB1> INFO: Test took 3871ms.
[17:51:06.380] <TB1> INFO: Expecting 41600 events.
[17:51:09.953] <TB1> INFO: 41600 events read in total (2981ms).
[17:51:09.953] <TB1> INFO: Test took 3838ms.
[17:51:10.243] <TB1> INFO: Expecting 41600 events.
[17:51:13.738] <TB1> INFO: 41600 events read in total (2903ms).
[17:51:13.739] <TB1> INFO: Test took 3762ms.
[17:51:14.053] <TB1> INFO: Expecting 41600 events.
[17:51:17.577] <TB1> INFO: 41600 events read in total (2932ms).
[17:51:17.578] <TB1> INFO: Test took 3813ms.
[17:51:17.867] <TB1> INFO: Expecting 41600 events.
[17:51:21.374] <TB1> INFO: 41600 events read in total (2915ms).
[17:51:21.375] <TB1> INFO: Test took 3773ms.
[17:51:21.665] <TB1> INFO: Expecting 41600 events.
[17:51:25.202] <TB1> INFO: 41600 events read in total (2945ms).
[17:51:25.203] <TB1> INFO: Test took 3804ms.
[17:51:25.493] <TB1> INFO: Expecting 41600 events.
[17:51:29.106] <TB1> INFO: 41600 events read in total (3021ms).
[17:51:29.107] <TB1> INFO: Test took 3880ms.
[17:51:29.397] <TB1> INFO: Expecting 41600 events.
[17:51:33.096] <TB1> INFO: 41600 events read in total (3107ms).
[17:51:33.097] <TB1> INFO: Test took 3965ms.
[17:51:33.390] <TB1> INFO: Expecting 41600 events.
[17:51:36.884] <TB1> INFO: 41600 events read in total (2902ms).
[17:51:36.885] <TB1> INFO: Test took 3760ms.
[17:51:37.174] <TB1> INFO: Expecting 41600 events.
[17:51:40.686] <TB1> INFO: 41600 events read in total (2920ms).
[17:51:40.687] <TB1> INFO: Test took 3778ms.
[17:51:40.995] <TB1> INFO: Expecting 41600 events.
[17:51:44.547] <TB1> INFO: 41600 events read in total (2961ms).
[17:51:44.548] <TB1> INFO: Test took 3837ms.
[17:51:44.860] <TB1> INFO: Expecting 41600 events.
[17:51:48.484] <TB1> INFO: 41600 events read in total (3032ms).
[17:51:48.485] <TB1> INFO: Test took 3910ms.
[17:51:48.775] <TB1> INFO: Expecting 41600 events.
[17:51:52.370] <TB1> INFO: 41600 events read in total (3003ms).
[17:51:52.371] <TB1> INFO: Test took 3862ms.
[17:51:52.663] <TB1> INFO: Expecting 41600 events.
[17:51:56.172] <TB1> INFO: 41600 events read in total (2918ms).
[17:51:56.174] <TB1> INFO: Test took 3776ms.
[17:51:56.468] <TB1> INFO: Expecting 41600 events.
[17:52:00.034] <TB1> INFO: 41600 events read in total (2974ms).
[17:52:00.034] <TB1> INFO: Test took 3832ms.
[17:52:00.329] <TB1> INFO: Expecting 41600 events.
[17:52:03.856] <TB1> INFO: 41600 events read in total (2935ms).
[17:52:03.857] <TB1> INFO: Test took 3794ms.
[17:52:04.150] <TB1> INFO: Expecting 2560 events.
[17:52:05.037] <TB1> INFO: 2560 events read in total (295ms).
[17:52:05.037] <TB1> INFO: Test took 1165ms.
[17:52:05.344] <TB1> INFO: Expecting 2560 events.
[17:52:06.233] <TB1> INFO: 2560 events read in total (297ms).
[17:52:06.233] <TB1> INFO: Test took 1194ms.
[17:52:06.542] <TB1> INFO: Expecting 2560 events.
[17:52:07.432] <TB1> INFO: 2560 events read in total (299ms).
[17:52:07.432] <TB1> INFO: Test took 1199ms.
[17:52:07.739] <TB1> INFO: Expecting 2560 events.
[17:52:08.632] <TB1> INFO: 2560 events read in total (301ms).
[17:52:08.632] <TB1> INFO: Test took 1199ms.
[17:52:08.939] <TB1> INFO: Expecting 2560 events.
[17:52:09.818] <TB1> INFO: 2560 events read in total (287ms).
[17:52:09.818] <TB1> INFO: Test took 1185ms.
[17:52:10.126] <TB1> INFO: Expecting 2560 events.
[17:52:11.021] <TB1> INFO: 2560 events read in total (303ms).
[17:52:11.021] <TB1> INFO: Test took 1203ms.
[17:52:11.328] <TB1> INFO: Expecting 2560 events.
[17:52:12.211] <TB1> INFO: 2560 events read in total (292ms).
[17:52:12.211] <TB1> INFO: Test took 1189ms.
[17:52:12.519] <TB1> INFO: Expecting 2560 events.
[17:52:13.400] <TB1> INFO: 2560 events read in total (290ms).
[17:52:13.401] <TB1> INFO: Test took 1189ms.
[17:52:13.709] <TB1> INFO: Expecting 2560 events.
[17:52:14.589] <TB1> INFO: 2560 events read in total (288ms).
[17:52:14.590] <TB1> INFO: Test took 1188ms.
[17:52:14.898] <TB1> INFO: Expecting 2560 events.
[17:52:15.789] <TB1> INFO: 2560 events read in total (299ms).
[17:52:15.789] <TB1> INFO: Test took 1199ms.
[17:52:16.097] <TB1> INFO: Expecting 2560 events.
[17:52:16.978] <TB1> INFO: 2560 events read in total (289ms).
[17:52:16.978] <TB1> INFO: Test took 1188ms.
[17:52:17.285] <TB1> INFO: Expecting 2560 events.
[17:52:18.169] <TB1> INFO: 2560 events read in total (292ms).
[17:52:18.169] <TB1> INFO: Test took 1190ms.
[17:52:18.478] <TB1> INFO: Expecting 2560 events.
[17:52:19.365] <TB1> INFO: 2560 events read in total (295ms).
[17:52:19.366] <TB1> INFO: Test took 1196ms.
[17:52:19.673] <TB1> INFO: Expecting 2560 events.
[17:52:20.565] <TB1> INFO: 2560 events read in total (300ms).
[17:52:20.565] <TB1> INFO: Test took 1199ms.
[17:52:20.873] <TB1> INFO: Expecting 2560 events.
[17:52:21.761] <TB1> INFO: 2560 events read in total (297ms).
[17:52:21.761] <TB1> INFO: Test took 1195ms.
[17:52:22.068] <TB1> INFO: Expecting 2560 events.
[17:52:22.960] <TB1> INFO: 2560 events read in total (300ms).
[17:52:22.961] <TB1> INFO: Test took 1199ms.
[17:52:22.965] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:52:23.269] <TB1> INFO: Expecting 655360 events.
[17:52:38.071] <TB1> INFO: 655360 events read in total (14210ms).
[17:52:38.083] <TB1> INFO: Expecting 655360 events.
[17:52:52.873] <TB1> INFO: 655360 events read in total (14387ms).
[17:52:52.889] <TB1> INFO: Expecting 655360 events.
[17:53:07.583] <TB1> INFO: 655360 events read in total (14291ms).
[17:53:07.604] <TB1> INFO: Expecting 655360 events.
[17:53:22.144] <TB1> INFO: 655360 events read in total (14137ms).
[17:53:22.171] <TB1> INFO: Expecting 655360 events.
[17:53:36.818] <TB1> INFO: 655360 events read in total (14244ms).
[17:53:36.857] <TB1> INFO: Expecting 655360 events.
[17:53:51.566] <TB1> INFO: 655360 events read in total (14306ms).
[17:53:51.599] <TB1> INFO: Expecting 655360 events.
[17:54:06.138] <TB1> INFO: 655360 events read in total (14136ms).
[17:54:06.179] <TB1> INFO: Expecting 655360 events.
[17:54:20.816] <TB1> INFO: 655360 events read in total (14233ms).
[17:54:20.859] <TB1> INFO: Expecting 655360 events.
[17:54:35.541] <TB1> INFO: 655360 events read in total (14279ms).
[17:54:35.590] <TB1> INFO: Expecting 655360 events.
[17:54:50.236] <TB1> INFO: 655360 events read in total (14243ms).
[17:54:50.303] <TB1> INFO: Expecting 655360 events.
[17:55:05.047] <TB1> INFO: 655360 events read in total (14341ms).
[17:55:05.116] <TB1> INFO: Expecting 655360 events.
[17:55:19.766] <TB1> INFO: 655360 events read in total (14247ms).
[17:55:19.863] <TB1> INFO: Expecting 655360 events.
[17:55:34.461] <TB1> INFO: 655360 events read in total (14195ms).
[17:55:34.575] <TB1> INFO: Expecting 655360 events.
[17:55:49.262] <TB1> INFO: 655360 events read in total (14279ms).
[17:55:49.380] <TB1> INFO: Expecting 655360 events.
[17:56:03.960] <TB1> INFO: 655360 events read in total (14177ms).
[17:56:04.053] <TB1> INFO: Expecting 655360 events.
[17:56:18.630] <TB1> INFO: 655360 events read in total (14174ms).
[17:56:18.728] <TB1> INFO: Test took 235763ms.
[17:56:18.828] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:19.085] <TB1> INFO: Expecting 655360 events.
[17:56:33.740] <TB1> INFO: 655360 events read in total (14063ms).
[17:56:33.752] <TB1> INFO: Expecting 655360 events.
[17:56:48.107] <TB1> INFO: 655360 events read in total (13952ms).
[17:56:48.123] <TB1> INFO: Expecting 655360 events.
[17:57:02.538] <TB1> INFO: 655360 events read in total (14012ms).
[17:57:02.564] <TB1> INFO: Expecting 655360 events.
[17:57:17.124] <TB1> INFO: 655360 events read in total (14157ms).
[17:57:17.156] <TB1> INFO: Expecting 655360 events.
[17:57:31.700] <TB1> INFO: 655360 events read in total (14141ms).
[17:57:31.729] <TB1> INFO: Expecting 655360 events.
[17:57:46.225] <TB1> INFO: 655360 events read in total (14093ms).
[17:57:46.259] <TB1> INFO: Expecting 655360 events.
[17:58:00.877] <TB1> INFO: 655360 events read in total (14215ms).
[17:58:00.935] <TB1> INFO: Expecting 655360 events.
[17:58:15.376] <TB1> INFO: 655360 events read in total (14038ms).
[17:58:15.418] <TB1> INFO: Expecting 655360 events.
[17:58:30.057] <TB1> INFO: 655360 events read in total (14235ms).
[17:58:30.107] <TB1> INFO: Expecting 655360 events.
[17:58:44.768] <TB1> INFO: 655360 events read in total (14257ms).
[17:58:44.820] <TB1> INFO: Expecting 655360 events.
[17:58:59.525] <TB1> INFO: 655360 events read in total (14302ms).
[17:58:59.673] <TB1> INFO: Expecting 655360 events.
[17:59:14.513] <TB1> INFO: 655360 events read in total (14437ms).
[17:59:14.594] <TB1> INFO: Expecting 655360 events.
[17:59:29.230] <TB1> INFO: 655360 events read in total (14233ms).
[17:59:29.311] <TB1> INFO: Expecting 655360 events.
[17:59:43.576] <TB1> INFO: 655360 events read in total (13862ms).
[17:59:43.681] <TB1> INFO: Expecting 655360 events.
[17:59:58.031] <TB1> INFO: 655360 events read in total (13947ms).
[17:59:58.122] <TB1> INFO: Expecting 655360 events.
[18:00:12.818] <TB1> INFO: 655360 events read in total (14293ms).
[18:00:12.933] <TB1> INFO: Test took 234105ms.
[18:00:13.105] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:00:13.111] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[18:00:13.117] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[18:00:13.123] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[18:00:13.128] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[18:00:13.134] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:00:13.140] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:00:13.145] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:00:13.151] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:00:13.157] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:00:13.163] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:00:13.169] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[18:00:13.174] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[18:00:13.180] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[18:00:13.186] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[18:00:13.192] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[18:00:13.198] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[18:00:13.203] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:00:13.209] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:00:13.215] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:00:13.221] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[18:00:13.226] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[18:00:13.232] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:00:13.238] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:00:13.244] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:00:13.250] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:00:13.256] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[18:00:13.262] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[18:00:13.268] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[18:00:13.274] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[18:00:13.279] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[18:00:13.285] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[18:00:13.291] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[18:00:13.297] <TB1> INFO: safety margin for low PH: adding 8, margin is now 28
[18:00:13.303] <TB1> INFO: safety margin for low PH: adding 9, margin is now 29
[18:00:13.309] <TB1> INFO: safety margin for low PH: adding 10, margin is now 30
[18:00:13.315] <TB1> INFO: safety margin for low PH: adding 11, margin is now 31
[18:00:13.321] <TB1> INFO: safety margin for low PH: adding 12, margin is now 32
[18:00:13.328] <TB1> INFO: safety margin for low PH: adding 13, margin is now 33
[18:00:13.337] <TB1> INFO: safety margin for low PH: adding 14, margin is now 34
[18:00:13.345] <TB1> INFO: safety margin for low PH: adding 15, margin is now 35
[18:00:13.353] <TB1> INFO: safety margin for low PH: adding 16, margin is now 36
[18:00:13.361] <TB1> INFO: safety margin for low PH: adding 17, margin is now 37
[18:00:13.370] <TB1> INFO: safety margin for low PH: adding 18, margin is now 38
[18:00:13.378] <TB1> INFO: safety margin for low PH: adding 19, margin is now 39
[18:00:13.386] <TB1> INFO: safety margin for low PH: adding 20, margin is now 40
[18:00:13.394] <TB1> INFO: safety margin for low PH: adding 21, margin is now 41
[18:00:13.403] <TB1> INFO: safety margin for low PH: adding 22, margin is now 42
[18:00:13.411] <TB1> INFO: safety margin for low PH: adding 23, margin is now 43
[18:00:13.419] <TB1> INFO: safety margin for low PH: adding 24, margin is now 44
[18:00:13.427] <TB1> INFO: safety margin for low PH: adding 25, margin is now 45
[18:00:13.435] <TB1> INFO: safety margin for low PH: adding 26, margin is now 46
[18:00:13.443] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:00:13.451] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[18:00:13.459] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[18:00:13.467] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:00:13.475] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[18:00:13.483] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[18:00:13.523] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C0.dat
[18:00:13.524] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C1.dat
[18:00:13.524] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C2.dat
[18:00:13.524] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C3.dat
[18:00:13.524] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C4.dat
[18:00:13.524] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C5.dat
[18:00:13.525] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C6.dat
[18:00:13.525] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C7.dat
[18:00:13.525] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C8.dat
[18:00:13.525] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C9.dat
[18:00:13.525] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C10.dat
[18:00:13.526] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C11.dat
[18:00:13.526] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C12.dat
[18:00:13.526] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C13.dat
[18:00:13.526] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C14.dat
[18:00:13.526] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//dacParameters35_C15.dat
[18:00:13.770] <TB1> INFO: Expecting 41600 events.
[18:00:16.907] <TB1> INFO: 41600 events read in total (2545ms).
[18:00:16.908] <TB1> INFO: Test took 3378ms.
[18:00:17.354] <TB1> INFO: Expecting 41600 events.
[18:00:20.443] <TB1> INFO: 41600 events read in total (2498ms).
[18:00:20.444] <TB1> INFO: Test took 3326ms.
[18:00:20.927] <TB1> INFO: Expecting 41600 events.
[18:00:24.109] <TB1> INFO: 41600 events read in total (2590ms).
[18:00:24.110] <TB1> INFO: Test took 3449ms.
[18:00:24.328] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:24.417] <TB1> INFO: Expecting 2560 events.
[18:00:25.311] <TB1> INFO: 2560 events read in total (303ms).
[18:00:25.312] <TB1> INFO: Test took 984ms.
[18:00:25.315] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:25.619] <TB1> INFO: Expecting 2560 events.
[18:00:26.516] <TB1> INFO: 2560 events read in total (305ms).
[18:00:26.516] <TB1> INFO: Test took 1202ms.
[18:00:26.519] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:26.824] <TB1> INFO: Expecting 2560 events.
[18:00:27.720] <TB1> INFO: 2560 events read in total (304ms).
[18:00:27.721] <TB1> INFO: Test took 1202ms.
[18:00:27.724] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:28.028] <TB1> INFO: Expecting 2560 events.
[18:00:28.913] <TB1> INFO: 2560 events read in total (293ms).
[18:00:28.913] <TB1> INFO: Test took 1189ms.
[18:00:28.917] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:29.221] <TB1> INFO: Expecting 2560 events.
[18:00:30.108] <TB1> INFO: 2560 events read in total (296ms).
[18:00:30.108] <TB1> INFO: Test took 1191ms.
[18:00:30.111] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:30.416] <TB1> INFO: Expecting 2560 events.
[18:00:31.313] <TB1> INFO: 2560 events read in total (305ms).
[18:00:31.313] <TB1> INFO: Test took 1202ms.
[18:00:31.316] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:31.622] <TB1> INFO: Expecting 2560 events.
[18:00:32.515] <TB1> INFO: 2560 events read in total (301ms).
[18:00:32.515] <TB1> INFO: Test took 1199ms.
[18:00:32.518] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:32.823] <TB1> INFO: Expecting 2560 events.
[18:00:33.714] <TB1> INFO: 2560 events read in total (299ms).
[18:00:33.715] <TB1> INFO: Test took 1197ms.
[18:00:33.717] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:34.022] <TB1> INFO: Expecting 2560 events.
[18:00:34.914] <TB1> INFO: 2560 events read in total (300ms).
[18:00:34.915] <TB1> INFO: Test took 1198ms.
[18:00:34.917] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:35.223] <TB1> INFO: Expecting 2560 events.
[18:00:36.112] <TB1> INFO: 2560 events read in total (298ms).
[18:00:36.113] <TB1> INFO: Test took 1196ms.
[18:00:36.115] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:36.421] <TB1> INFO: Expecting 2560 events.
[18:00:37.300] <TB1> INFO: 2560 events read in total (288ms).
[18:00:37.300] <TB1> INFO: Test took 1185ms.
[18:00:37.303] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:37.609] <TB1> INFO: Expecting 2560 events.
[18:00:38.502] <TB1> INFO: 2560 events read in total (301ms).
[18:00:38.503] <TB1> INFO: Test took 1200ms.
[18:00:38.507] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:38.811] <TB1> INFO: Expecting 2560 events.
[18:00:39.701] <TB1> INFO: 2560 events read in total (299ms).
[18:00:39.701] <TB1> INFO: Test took 1194ms.
[18:00:39.705] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:40.009] <TB1> INFO: Expecting 2560 events.
[18:00:40.901] <TB1> INFO: 2560 events read in total (300ms).
[18:00:40.901] <TB1> INFO: Test took 1197ms.
[18:00:40.904] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:41.209] <TB1> INFO: Expecting 2560 events.
[18:00:42.091] <TB1> INFO: 2560 events read in total (290ms).
[18:00:42.091] <TB1> INFO: Test took 1187ms.
[18:00:42.093] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:42.400] <TB1> INFO: Expecting 2560 events.
[18:00:43.283] <TB1> INFO: 2560 events read in total (291ms).
[18:00:43.284] <TB1> INFO: Test took 1191ms.
[18:00:43.287] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:43.591] <TB1> INFO: Expecting 2560 events.
[18:00:44.477] <TB1> INFO: 2560 events read in total (294ms).
[18:00:44.478] <TB1> INFO: Test took 1191ms.
[18:00:44.480] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:44.787] <TB1> INFO: Expecting 2560 events.
[18:00:45.675] <TB1> INFO: 2560 events read in total (296ms).
[18:00:45.675] <TB1> INFO: Test took 1195ms.
[18:00:45.678] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:45.984] <TB1> INFO: Expecting 2560 events.
[18:00:46.864] <TB1> INFO: 2560 events read in total (288ms).
[18:00:46.865] <TB1> INFO: Test took 1187ms.
[18:00:46.868] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:47.172] <TB1> INFO: Expecting 2560 events.
[18:00:48.062] <TB1> INFO: 2560 events read in total (298ms).
[18:00:48.062] <TB1> INFO: Test took 1194ms.
[18:00:48.064] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:48.371] <TB1> INFO: Expecting 2560 events.
[18:00:49.261] <TB1> INFO: 2560 events read in total (298ms).
[18:00:49.261] <TB1> INFO: Test took 1197ms.
[18:00:49.266] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:49.569] <TB1> INFO: Expecting 2560 events.
[18:00:50.451] <TB1> INFO: 2560 events read in total (290ms).
[18:00:50.452] <TB1> INFO: Test took 1187ms.
[18:00:50.455] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:50.761] <TB1> INFO: Expecting 2560 events.
[18:00:51.650] <TB1> INFO: 2560 events read in total (297ms).
[18:00:51.651] <TB1> INFO: Test took 1196ms.
[18:00:51.654] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:51.958] <TB1> INFO: Expecting 2560 events.
[18:00:52.838] <TB1> INFO: 2560 events read in total (288ms).
[18:00:52.838] <TB1> INFO: Test took 1184ms.
[18:00:52.842] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:53.147] <TB1> INFO: Expecting 2560 events.
[18:00:54.034] <TB1> INFO: 2560 events read in total (296ms).
[18:00:54.034] <TB1> INFO: Test took 1192ms.
[18:00:54.037] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:54.343] <TB1> INFO: Expecting 2560 events.
[18:00:55.239] <TB1> INFO: 2560 events read in total (304ms).
[18:00:55.240] <TB1> INFO: Test took 1204ms.
[18:00:55.243] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:55.548] <TB1> INFO: Expecting 2560 events.
[18:00:56.441] <TB1> INFO: 2560 events read in total (301ms).
[18:00:56.442] <TB1> INFO: Test took 1199ms.
[18:00:56.444] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:56.750] <TB1> INFO: Expecting 2560 events.
[18:00:57.645] <TB1> INFO: 2560 events read in total (304ms).
[18:00:57.645] <TB1> INFO: Test took 1201ms.
[18:00:57.648] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:57.953] <TB1> INFO: Expecting 2560 events.
[18:00:58.843] <TB1> INFO: 2560 events read in total (299ms).
[18:00:58.844] <TB1> INFO: Test took 1196ms.
[18:00:58.847] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:00:59.150] <TB1> INFO: Expecting 2560 events.
[18:01:00.042] <TB1> INFO: 2560 events read in total (300ms).
[18:01:00.043] <TB1> INFO: Test took 1196ms.
[18:01:00.046] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:01:00.351] <TB1> INFO: Expecting 2560 events.
[18:01:01.246] <TB1> INFO: 2560 events read in total (303ms).
[18:01:01.246] <TB1> INFO: Test took 1200ms.
[18:01:01.250] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:01:01.554] <TB1> INFO: Expecting 2560 events.
[18:01:02.449] <TB1> INFO: 2560 events read in total (303ms).
[18:01:02.449] <TB1> INFO: Test took 1199ms.
[18:01:02.912] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 646 seconds
[18:01:02.912] <TB1> INFO: PH scale (per ROC): 36 37 42 45 57 45 32 49 31 47 42 43 30 51 46 44
[18:01:02.912] <TB1> INFO: PH offset (per ROC): 106 106 91 107 128 105 95 129 97 112 94 103 95 113 99 97
[18:01:02.924] <TB1> INFO: Decoding statistics:
[18:01:02.924] <TB1> INFO: General information:
[18:01:02.924] <TB1> INFO: 16bit words read: 127878
[18:01:02.924] <TB1> INFO: valid events total: 20480
[18:01:02.924] <TB1> INFO: empty events: 17981
[18:01:02.924] <TB1> INFO: valid events with pixels: 2499
[18:01:02.924] <TB1> INFO: valid pixel hits: 2499
[18:01:02.924] <TB1> INFO: Event errors: 0
[18:01:02.924] <TB1> INFO: start marker: 0
[18:01:02.924] <TB1> INFO: stop marker: 0
[18:01:02.924] <TB1> INFO: overflow: 0
[18:01:02.924] <TB1> INFO: invalid 5bit words: 0
[18:01:02.924] <TB1> INFO: invalid XOR eye diagram: 0
[18:01:02.924] <TB1> INFO: frame (failed synchr.): 0
[18:01:02.924] <TB1> INFO: idle data (no TBM trl): 0
[18:01:02.924] <TB1> INFO: no data (only TBM hdr): 0
[18:01:02.924] <TB1> INFO: TBM errors: 0
[18:01:02.924] <TB1> INFO: flawed TBM headers: 0
[18:01:02.924] <TB1> INFO: flawed TBM trailers: 0
[18:01:02.924] <TB1> INFO: event ID mismatches: 0
[18:01:02.924] <TB1> INFO: ROC errors: 0
[18:01:02.924] <TB1> INFO: missing ROC header(s): 0
[18:01:02.924] <TB1> INFO: misplaced readback start: 0
[18:01:02.924] <TB1> INFO: Pixel decoding errors: 0
[18:01:02.924] <TB1> INFO: pixel data incomplete: 0
[18:01:02.924] <TB1> INFO: pixel address: 0
[18:01:02.924] <TB1> INFO: pulse height fill bit: 0
[18:01:02.924] <TB1> INFO: buffer corruption: 0
[18:01:03.084] <TB1> INFO: ######################################################################
[18:01:03.084] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[18:01:03.084] <TB1> INFO: ######################################################################
[18:01:03.099] <TB1> INFO: scanning low vcal = 10
[18:01:03.377] <TB1> INFO: Expecting 41600 events.
[18:01:07.005] <TB1> INFO: 41600 events read in total (3036ms).
[18:01:07.005] <TB1> INFO: Test took 3906ms.
[18:01:07.007] <TB1> INFO: scanning low vcal = 20
[18:01:07.306] <TB1> INFO: Expecting 41600 events.
[18:01:10.902] <TB1> INFO: 41600 events read in total (3003ms).
[18:01:10.903] <TB1> INFO: Test took 3896ms.
[18:01:10.905] <TB1> INFO: scanning low vcal = 30
[18:01:11.197] <TB1> INFO: Expecting 41600 events.
[18:01:14.881] <TB1> INFO: 41600 events read in total (3092ms).
[18:01:14.882] <TB1> INFO: Test took 3977ms.
[18:01:14.884] <TB1> INFO: scanning low vcal = 40
[18:01:15.161] <TB1> INFO: Expecting 41600 events.
[18:01:19.190] <TB1> INFO: 41600 events read in total (3438ms).
[18:01:19.192] <TB1> INFO: Test took 4308ms.
[18:01:19.196] <TB1> INFO: scanning low vcal = 50
[18:01:19.473] <TB1> INFO: Expecting 41600 events.
[18:01:23.499] <TB1> INFO: 41600 events read in total (3435ms).
[18:01:23.500] <TB1> INFO: Test took 4304ms.
[18:01:23.503] <TB1> INFO: scanning low vcal = 60
[18:01:23.780] <TB1> INFO: Expecting 41600 events.
[18:01:27.831] <TB1> INFO: 41600 events read in total (3460ms).
[18:01:27.831] <TB1> INFO: Test took 4328ms.
[18:01:27.834] <TB1> INFO: scanning low vcal = 70
[18:01:28.112] <TB1> INFO: Expecting 41600 events.
[18:01:32.166] <TB1> INFO: 41600 events read in total (3463ms).
[18:01:32.167] <TB1> INFO: Test took 4333ms.
[18:01:32.170] <TB1> INFO: scanning low vcal = 80
[18:01:32.448] <TB1> INFO: Expecting 41600 events.
[18:01:36.466] <TB1> INFO: 41600 events read in total (3427ms).
[18:01:36.468] <TB1> INFO: Test took 4298ms.
[18:01:36.471] <TB1> INFO: scanning low vcal = 90
[18:01:36.749] <TB1> INFO: Expecting 41600 events.
[18:01:40.770] <TB1> INFO: 41600 events read in total (3429ms).
[18:01:40.771] <TB1> INFO: Test took 4299ms.
[18:01:40.776] <TB1> INFO: scanning low vcal = 100
[18:01:41.052] <TB1> INFO: Expecting 41600 events.
[18:01:45.098] <TB1> INFO: 41600 events read in total (3455ms).
[18:01:45.099] <TB1> INFO: Test took 4323ms.
[18:01:45.104] <TB1> INFO: scanning low vcal = 110
[18:01:45.381] <TB1> INFO: Expecting 41600 events.
[18:01:49.443] <TB1> INFO: 41600 events read in total (3470ms).
[18:01:49.444] <TB1> INFO: Test took 4340ms.
[18:01:49.447] <TB1> INFO: scanning low vcal = 120
[18:01:49.724] <TB1> INFO: Expecting 41600 events.
[18:01:53.685] <TB1> INFO: 41600 events read in total (3369ms).
[18:01:53.686] <TB1> INFO: Test took 4238ms.
[18:01:53.689] <TB1> INFO: scanning low vcal = 130
[18:01:53.966] <TB1> INFO: Expecting 41600 events.
[18:01:57.901] <TB1> INFO: 41600 events read in total (3344ms).
[18:01:57.902] <TB1> INFO: Test took 4213ms.
[18:01:57.906] <TB1> INFO: scanning low vcal = 140
[18:01:58.181] <TB1> INFO: Expecting 41600 events.
[18:02:02.133] <TB1> INFO: 41600 events read in total (3360ms).
[18:02:02.133] <TB1> INFO: Test took 4227ms.
[18:02:02.136] <TB1> INFO: scanning low vcal = 150
[18:02:02.413] <TB1> INFO: Expecting 41600 events.
[18:02:06.377] <TB1> INFO: 41600 events read in total (3372ms).
[18:02:06.377] <TB1> INFO: Test took 4241ms.
[18:02:06.380] <TB1> INFO: scanning low vcal = 160
[18:02:06.657] <TB1> INFO: Expecting 41600 events.
[18:02:10.636] <TB1> INFO: 41600 events read in total (3387ms).
[18:02:10.637] <TB1> INFO: Test took 4257ms.
[18:02:10.641] <TB1> INFO: scanning low vcal = 170
[18:02:10.917] <TB1> INFO: Expecting 41600 events.
[18:02:14.891] <TB1> INFO: 41600 events read in total (3382ms).
[18:02:14.892] <TB1> INFO: Test took 4251ms.
[18:02:14.897] <TB1> INFO: scanning low vcal = 180
[18:02:15.172] <TB1> INFO: Expecting 41600 events.
[18:02:19.103] <TB1> INFO: 41600 events read in total (3340ms).
[18:02:19.104] <TB1> INFO: Test took 4206ms.
[18:02:19.107] <TB1> INFO: scanning low vcal = 190
[18:02:19.384] <TB1> INFO: Expecting 41600 events.
[18:02:23.391] <TB1> INFO: 41600 events read in total (3416ms).
[18:02:23.392] <TB1> INFO: Test took 4285ms.
[18:02:23.395] <TB1> INFO: scanning low vcal = 200
[18:02:23.672] <TB1> INFO: Expecting 41600 events.
[18:02:27.700] <TB1> INFO: 41600 events read in total (3437ms).
[18:02:27.701] <TB1> INFO: Test took 4306ms.
[18:02:27.704] <TB1> INFO: scanning low vcal = 210
[18:02:27.000] <TB1> INFO: Expecting 41600 events.
[18:02:32.036] <TB1> INFO: 41600 events read in total (3444ms).
[18:02:32.037] <TB1> INFO: Test took 4333ms.
[18:02:32.041] <TB1> INFO: scanning low vcal = 220
[18:02:32.318] <TB1> INFO: Expecting 41600 events.
[18:02:36.360] <TB1> INFO: 41600 events read in total (3451ms).
[18:02:36.361] <TB1> INFO: Test took 4320ms.
[18:02:36.364] <TB1> INFO: scanning low vcal = 230
[18:02:36.641] <TB1> INFO: Expecting 41600 events.
[18:02:40.652] <TB1> INFO: 41600 events read in total (3419ms).
[18:02:40.653] <TB1> INFO: Test took 4288ms.
[18:02:40.656] <TB1> INFO: scanning low vcal = 240
[18:02:40.933] <TB1> INFO: Expecting 41600 events.
[18:02:44.913] <TB1> INFO: 41600 events read in total (3388ms).
[18:02:44.914] <TB1> INFO: Test took 4258ms.
[18:02:44.917] <TB1> INFO: scanning low vcal = 250
[18:02:45.205] <TB1> INFO: Expecting 41600 events.
[18:02:49.237] <TB1> INFO: 41600 events read in total (3441ms).
[18:02:49.238] <TB1> INFO: Test took 4321ms.
[18:02:49.242] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[18:02:49.538] <TB1> INFO: Expecting 41600 events.
[18:02:53.547] <TB1> INFO: 41600 events read in total (3417ms).
[18:02:53.548] <TB1> INFO: Test took 4306ms.
[18:02:53.551] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[18:02:53.827] <TB1> INFO: Expecting 41600 events.
[18:02:57.778] <TB1> INFO: 41600 events read in total (3359ms).
[18:02:57.779] <TB1> INFO: Test took 4228ms.
[18:02:57.783] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[18:02:58.058] <TB1> INFO: Expecting 41600 events.
[18:03:02.037] <TB1> INFO: 41600 events read in total (3387ms).
[18:03:02.038] <TB1> INFO: Test took 4255ms.
[18:03:02.041] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[18:03:02.317] <TB1> INFO: Expecting 41600 events.
[18:03:06.277] <TB1> INFO: 41600 events read in total (3368ms).
[18:03:06.278] <TB1> INFO: Test took 4237ms.
[18:03:06.281] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[18:03:06.557] <TB1> INFO: Expecting 41600 events.
[18:03:10.548] <TB1> INFO: 41600 events read in total (3399ms).
[18:03:10.549] <TB1> INFO: Test took 4268ms.
[18:03:11.269] <TB1> INFO: PixTestGainPedestal::measure() done
[18:03:44.538] <TB1> INFO: PixTestGainPedestal::fit() done
[18:03:44.538] <TB1> INFO: non-linearity mean: 0.925 0.951 0.941 0.939 0.982 0.957 0.933 0.972 0.904 0.942 0.908 0.935 0.984 0.966 0.944 0.957
[18:03:44.538] <TB1> INFO: non-linearity RMS: 0.118 0.047 0.068 0.064 0.003 0.057 0.158 0.006 0.197 0.064 0.101 0.065 0.203 0.021 0.058 0.031
[18:03:44.538] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//phCalibrationFitErr35_C0.dat
[18:03:44.553] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//phCalibrationFitErr35_C1.dat
[18:03:44.566] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//phCalibrationFitErr35_C2.dat
[18:03:44.579] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//phCalibrationFitErr35_C3.dat
[18:03:44.593] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//phCalibrationFitErr35_C4.dat
[18:03:44.606] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//phCalibrationFitErr35_C5.dat
[18:03:44.620] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//phCalibrationFitErr35_C6.dat
[18:03:44.633] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//phCalibrationFitErr35_C7.dat
[18:03:44.645] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//phCalibrationFitErr35_C8.dat
[18:03:44.659] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//phCalibrationFitErr35_C9.dat
[18:03:44.672] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//phCalibrationFitErr35_C10.dat
[18:03:44.685] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//phCalibrationFitErr35_C11.dat
[18:03:44.698] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//phCalibrationFitErr35_C12.dat
[18:03:44.712] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//phCalibrationFitErr35_C13.dat
[18:03:44.725] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//phCalibrationFitErr35_C14.dat
[18:03:44.738] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//003_Fulltest_p17//phCalibrationFitErr35_C15.dat
[18:03:44.751] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 161 seconds
[18:03:44.751] <TB1> INFO: Decoding statistics:
[18:03:44.751] <TB1> INFO: General information:
[18:03:44.751] <TB1> INFO: 16bit words read: 3303666
[18:03:44.751] <TB1> INFO: valid events total: 332800
[18:03:44.751] <TB1> INFO: empty events: 483
[18:03:44.751] <TB1> INFO: valid events with pixels: 332317
[18:03:44.751] <TB1> INFO: valid pixel hits: 653433
[18:03:44.751] <TB1> INFO: Event errors: 0
[18:03:44.751] <TB1> INFO: start marker: 0
[18:03:44.751] <TB1> INFO: stop marker: 0
[18:03:44.751] <TB1> INFO: overflow: 0
[18:03:44.751] <TB1> INFO: invalid 5bit words: 0
[18:03:44.751] <TB1> INFO: invalid XOR eye diagram: 0
[18:03:44.751] <TB1> INFO: frame (failed synchr.): 0
[18:03:44.751] <TB1> INFO: idle data (no TBM trl): 0
[18:03:44.751] <TB1> INFO: no data (only TBM hdr): 0
[18:03:44.751] <TB1> INFO: TBM errors: 0
[18:03:44.751] <TB1> INFO: flawed TBM headers: 0
[18:03:44.751] <TB1> INFO: flawed TBM trailers: 0
[18:03:44.751] <TB1> INFO: event ID mismatches: 0
[18:03:44.751] <TB1> INFO: ROC errors: 0
[18:03:44.751] <TB1> INFO: missing ROC header(s): 0
[18:03:44.751] <TB1> INFO: misplaced readback start: 0
[18:03:44.751] <TB1> INFO: Pixel decoding errors: 0
[18:03:44.751] <TB1> INFO: pixel data incomplete: 0
[18:03:44.751] <TB1> INFO: pixel address: 0
[18:03:44.751] <TB1> INFO: pulse height fill bit: 0
[18:03:44.751] <TB1> INFO: buffer corruption: 0
[18:03:44.766] <TB1> INFO: Decoding statistics:
[18:03:44.766] <TB1> INFO: General information:
[18:03:44.766] <TB1> INFO: 16bit words read: 3433080
[18:03:44.766] <TB1> INFO: valid events total: 353536
[18:03:44.766] <TB1> INFO: empty events: 18720
[18:03:44.766] <TB1> INFO: valid events with pixels: 334816
[18:03:44.766] <TB1> INFO: valid pixel hits: 655932
[18:03:44.766] <TB1> INFO: Event errors: 0
[18:03:44.766] <TB1> INFO: start marker: 0
[18:03:44.766] <TB1> INFO: stop marker: 0
[18:03:44.766] <TB1> INFO: overflow: 0
[18:03:44.766] <TB1> INFO: invalid 5bit words: 0
[18:03:44.766] <TB1> INFO: invalid XOR eye diagram: 0
[18:03:44.766] <TB1> INFO: frame (failed synchr.): 0
[18:03:44.766] <TB1> INFO: idle data (no TBM trl): 0
[18:03:44.766] <TB1> INFO: no data (only TBM hdr): 0
[18:03:44.766] <TB1> INFO: TBM errors: 0
[18:03:44.767] <TB1> INFO: flawed TBM headers: 0
[18:03:44.767] <TB1> INFO: flawed TBM trailers: 0
[18:03:44.767] <TB1> INFO: event ID mismatches: 0
[18:03:44.767] <TB1> INFO: ROC errors: 0
[18:03:44.767] <TB1> INFO: missing ROC header(s): 0
[18:03:44.767] <TB1> INFO: misplaced readback start: 0
[18:03:44.767] <TB1> INFO: Pixel decoding errors: 0
[18:03:44.767] <TB1> INFO: pixel data incomplete: 0
[18:03:44.767] <TB1> INFO: pixel address: 0
[18:03:44.767] <TB1> INFO: pulse height fill bit: 0
[18:03:44.767] <TB1> INFO: buffer corruption: 0
[18:03:44.767] <TB1> INFO: enter test to run
[18:03:44.767] <TB1> INFO: test: exit no parameter change
[18:03:44.893] <TB1> QUIET: Connection to board 154 closed.
[18:03:44.894] <TB1> INFO: pXar: this is the end, my friend