[15:04:36.176] <TB1> INFO: *** Welcome to pxar ***
[15:04:36.176] <TB1> INFO: *** Today: 2016/10/19
[15:04:36.185] <TB1> INFO: *** Version: c8ba-dirty
[15:04:36.186] <TB1> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters_C15.dat
[15:04:36.186] <TB1> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//tbmParameters_C1b.dat
[15:04:36.186] <TB1> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//defaultMaskFile.dat
[15:04:36.187] <TB1> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//trimParameters_C15.dat
[15:04:36.251] <TB1> INFO: clk: 4
[15:04:36.251] <TB1> INFO: ctr: 4
[15:04:36.251] <TB1> INFO: sda: 19
[15:04:36.251] <TB1> INFO: tin: 9
[15:04:36.251] <TB1> INFO: level: 15
[15:04:36.251] <TB1> INFO: triggerdelay: 0
[15:04:36.251] <TB1> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[15:04:36.251] <TB1> INFO: Log level: INFO
[15:04:36.260] <TB1> INFO: Found DTB DTB_WXC03A
[15:04:36.271] <TB1> QUIET: Connection to board DTB_WXC03A opened.
[15:04:36.273] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 154
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC03A
MAC address: 40D85511809A
Hostname: pixelDTB154
Comment:
------------------------------------------------------
[15:04:36.275] <TB1> INFO: RPC call hashes of host and DTB match: 486171790
[15:04:37.833] <TB1> INFO: DUT info:
[15:04:37.833] <TB1> INFO: The DUT currently contains the following objects:
[15:04:37.833] <TB1> INFO: 4 TBM Cores tbm10c (4 ON)
[15:04:37.833] <TB1> INFO: TBM Core alpha (0): 7 registers set
[15:04:37.833] <TB1> INFO: TBM Core beta (1): 7 registers set
[15:04:37.833] <TB1> INFO: TBM Core alpha (2): 7 registers set
[15:04:37.833] <TB1> INFO: TBM Core beta (3): 7 registers set
[15:04:37.833] <TB1> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[15:04:37.833] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[15:04:37.833] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[15:04:37.833] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[15:04:37.833] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[15:04:37.833] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[15:04:37.833] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[15:04:37.833] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[15:04:37.833] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[15:04:37.833] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[15:04:37.833] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[15:04:37.833] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[15:04:37.833] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[15:04:37.833] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[15:04:37.833] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[15:04:37.833] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[15:04:37.833] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[15:04:38.234] <TB1> INFO: enter 'restricted' command line mode
[15:04:38.234] <TB1> INFO: enter test to run
[15:04:38.234] <TB1> INFO: test: pretest no parameter change
[15:04:38.234] <TB1> INFO: running: pretest
[15:04:38.240] <TB1> INFO: ######################################################################
[15:04:38.240] <TB1> INFO: PixTestPretest::doTest()
[15:04:38.240] <TB1> INFO: ######################################################################
[15:04:38.241] <TB1> INFO: ----------------------------------------------------------------------
[15:04:38.241] <TB1> INFO: PixTestPretest::programROC()
[15:04:38.241] <TB1> INFO: ----------------------------------------------------------------------
[15:04:56.255] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[15:04:56.255] <TB1> INFO: IA differences per ROC: 16.9 16.1 16.9 19.3 16.9 16.9 19.3 19.3 19.3 18.5 17.7 18.5 17.7 22.5 20.9 20.1
[15:04:56.312] <TB1> INFO: ----------------------------------------------------------------------
[15:04:56.312] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[15:04:56.312] <TB1> INFO: ----------------------------------------------------------------------
[15:05:17.604] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 384.3 mA = 24.0187 mA/ROC
[15:05:17.605] <TB1> INFO: i(loss) [mA/ROC]: 19.3 19.3 19.3 20.1 20.1 19.3 20.1 20.1 19.3 20.1 20.1 20.1 19.3 19.3 19.3 18.5
[15:05:17.640] <TB1> INFO: ----------------------------------------------------------------------
[15:05:17.640] <TB1> INFO: PixTestPretest::findTiming()
[15:05:17.640] <TB1> INFO: ----------------------------------------------------------------------
[15:05:17.640] <TB1> INFO: PixTestCmd::init()

[15:05:49.449] <TB1> INFO: TBM phases: 160MHz: 7, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[15:05:49.449] <TB1> INFO: (success/tries = 100/100), width = 3
[15:05:50.957] <TB1> INFO: ----------------------------------------------------------------------
[15:05:50.958] <TB1> INFO: PixTestPretest::findWorkingPixel()
[15:05:50.958] <TB1> INFO: ----------------------------------------------------------------------
[15:05:51.053] <TB1> INFO: Expecting 231680 events.
[15:06:01.155] <TB1> INFO: 231680 events read in total (9510ms).
[15:06:01.163] <TB1> INFO: Test took 10200ms.
[15:06:01.414] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[15:06:01.449] <TB1> INFO: ----------------------------------------------------------------------
[15:06:01.449] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[15:06:01.449] <TB1> INFO: ----------------------------------------------------------------------
[15:06:01.544] <TB1> INFO: Expecting 231680 events.
[15:06:11.563] <TB1> INFO: 231680 events read in total (9427ms).
[15:06:11.573] <TB1> INFO: Test took 10118ms.
[15:06:11.839] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[15:06:11.839] <TB1> INFO: CalDel: 101 86 100 108 96 96 96 108 98 96 97 79 92 108 83 86
[15:06:11.839] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[15:06:11.843] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters_C0.dat
[15:06:11.844] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters_C1.dat
[15:06:11.844] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters_C2.dat
[15:06:11.844] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters_C3.dat
[15:06:11.844] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters_C4.dat
[15:06:11.844] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters_C5.dat
[15:06:11.844] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters_C6.dat
[15:06:11.845] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters_C7.dat
[15:06:11.845] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters_C8.dat
[15:06:11.845] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters_C9.dat
[15:06:11.845] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters_C10.dat
[15:06:11.845] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters_C11.dat
[15:06:11.845] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters_C12.dat
[15:06:11.845] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters_C13.dat
[15:06:11.846] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters_C14.dat
[15:06:11.846] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters_C15.dat
[15:06:11.846] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//tbmParameters_C0a.dat
[15:06:11.846] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//tbmParameters_C0b.dat
[15:06:11.846] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//tbmParameters_C1a.dat
[15:06:11.846] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//tbmParameters_C1b.dat
[15:06:11.846] <TB1> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[15:06:11.899] <TB1> INFO: enter test to run
[15:06:11.899] <TB1> INFO: test: FullTest no parameter change
[15:06:11.899] <TB1> INFO: running: fulltest
[15:06:11.899] <TB1> INFO: ######################################################################
[15:06:11.899] <TB1> INFO: PixTestFullTest::doTest()
[15:06:11.899] <TB1> INFO: ######################################################################
[15:06:11.900] <TB1> INFO: ######################################################################
[15:06:11.900] <TB1> INFO: PixTestAlive::doTest()
[15:06:11.900] <TB1> INFO: ######################################################################
[15:06:11.901] <TB1> INFO: ----------------------------------------------------------------------
[15:06:11.901] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:06:11.901] <TB1> INFO: ----------------------------------------------------------------------
[15:06:12.140] <TB1> INFO: Expecting 41600 events.
[15:06:15.608] <TB1> INFO: 41600 events read in total (2876ms).
[15:06:15.609] <TB1> INFO: Test took 3706ms.
[15:06:15.837] <TB1> INFO: PixTestAlive::aliveTest() done
[15:06:15.838] <TB1> INFO: number of dead pixels (per ROC): 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:06:15.839] <TB1> INFO: ----------------------------------------------------------------------
[15:06:15.839] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:06:15.839] <TB1> INFO: ----------------------------------------------------------------------
[15:06:16.076] <TB1> INFO: Expecting 41600 events.
[15:06:19.038] <TB1> INFO: 41600 events read in total (2370ms).
[15:06:19.038] <TB1> INFO: Test took 3198ms.
[15:06:19.039] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[15:06:19.284] <TB1> INFO: PixTestAlive::maskTest() done
[15:06:19.284] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:06:19.285] <TB1> INFO: ----------------------------------------------------------------------
[15:06:19.285] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:06:19.285] <TB1> INFO: ----------------------------------------------------------------------
[15:06:19.532] <TB1> INFO: Expecting 41600 events.
[15:06:23.102] <TB1> INFO: 41600 events read in total (2978ms).
[15:06:23.103] <TB1> INFO: Test took 3815ms.
[15:06:23.336] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[15:06:23.336] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:06:23.336] <TB1> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[15:06:23.336] <TB1> INFO: Decoding statistics:
[15:06:23.336] <TB1> INFO: General information:
[15:06:23.336] <TB1> INFO: 16bit words read: 0
[15:06:23.336] <TB1> INFO: valid events total: 0
[15:06:23.336] <TB1> INFO: empty events: 0
[15:06:23.336] <TB1> INFO: valid events with pixels: 0
[15:06:23.336] <TB1> INFO: valid pixel hits: 0
[15:06:23.336] <TB1> INFO: Event errors: 0
[15:06:23.336] <TB1> INFO: start marker: 0
[15:06:23.336] <TB1> INFO: stop marker: 0
[15:06:23.336] <TB1> INFO: overflow: 0
[15:06:23.336] <TB1> INFO: invalid 5bit words: 0
[15:06:23.336] <TB1> INFO: invalid XOR eye diagram: 0
[15:06:23.336] <TB1> INFO: frame (failed synchr.): 0
[15:06:23.336] <TB1> INFO: idle data (no TBM trl): 0
[15:06:23.336] <TB1> INFO: no data (only TBM hdr): 0
[15:06:23.336] <TB1> INFO: TBM errors: 0
[15:06:23.337] <TB1> INFO: flawed TBM headers: 0
[15:06:23.337] <TB1> INFO: flawed TBM trailers: 0
[15:06:23.337] <TB1> INFO: event ID mismatches: 0
[15:06:23.337] <TB1> INFO: ROC errors: 0
[15:06:23.337] <TB1> INFO: missing ROC header(s): 0
[15:06:23.337] <TB1> INFO: misplaced readback start: 0
[15:06:23.337] <TB1> INFO: Pixel decoding errors: 0
[15:06:23.337] <TB1> INFO: pixel data incomplete: 0
[15:06:23.337] <TB1> INFO: pixel address: 0
[15:06:23.337] <TB1> INFO: pulse height fill bit: 0
[15:06:23.337] <TB1> INFO: buffer corruption: 0
[15:06:23.346] <TB1> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C15.dat
[15:06:23.347] <TB1> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[15:06:23.347] <TB1> INFO: ######################################################################
[15:06:23.347] <TB1> INFO: PixTestReadback::doTest()
[15:06:23.347] <TB1> INFO: ######################################################################
[15:06:23.347] <TB1> INFO: ----------------------------------------------------------------------
[15:06:23.347] <TB1> INFO: PixTestReadback::CalibrateVd()
[15:06:23.347] <TB1> INFO: ----------------------------------------------------------------------
[15:06:33.317] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C0.dat
[15:06:33.317] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C1.dat
[15:06:33.317] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C2.dat
[15:06:33.317] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C3.dat
[15:06:33.317] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C4.dat
[15:06:33.317] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C5.dat
[15:06:33.317] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C6.dat
[15:06:33.318] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C7.dat
[15:06:33.318] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C8.dat
[15:06:33.318] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C9.dat
[15:06:33.318] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C10.dat
[15:06:33.318] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C11.dat
[15:06:33.318] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C12.dat
[15:06:33.318] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C13.dat
[15:06:33.318] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C14.dat
[15:06:33.318] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C15.dat
[15:06:33.349] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[15:06:33.349] <TB1> INFO: ----------------------------------------------------------------------
[15:06:33.349] <TB1> INFO: PixTestReadback::CalibrateVa()
[15:06:33.349] <TB1> INFO: ----------------------------------------------------------------------
[15:06:43.283] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C0.dat
[15:06:43.283] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C1.dat
[15:06:43.283] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C2.dat
[15:06:43.283] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C3.dat
[15:06:43.283] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C4.dat
[15:06:43.283] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C5.dat
[15:06:43.283] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C6.dat
[15:06:43.283] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C7.dat
[15:06:43.283] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C8.dat
[15:06:43.283] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C9.dat
[15:06:43.283] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C10.dat
[15:06:43.283] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C11.dat
[15:06:43.283] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C12.dat
[15:06:43.283] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C13.dat
[15:06:43.283] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C14.dat
[15:06:43.284] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C15.dat
[15:06:43.311] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[15:06:43.311] <TB1> INFO: ----------------------------------------------------------------------
[15:06:43.311] <TB1> INFO: PixTestReadback::readbackVbg()
[15:06:43.311] <TB1> INFO: ----------------------------------------------------------------------
[15:06:50.982] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[15:06:50.982] <TB1> INFO: ----------------------------------------------------------------------
[15:06:50.982] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[15:06:50.982] <TB1> INFO: ----------------------------------------------------------------------
[15:06:50.982] <TB1> INFO: Vbg will be calibrated using Vd calibration
[15:06:50.982] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 147.6calibrated Vbg = 1.17518 :::*/*/*/*/
[15:06:50.982] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 146.8calibrated Vbg = 1.17649 :::*/*/*/*/
[15:06:50.982] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 150.8calibrated Vbg = 1.17528 :::*/*/*/*/
[15:06:50.983] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 154calibrated Vbg = 1.17086 :::*/*/*/*/
[15:06:50.983] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 148.4calibrated Vbg = 1.1784 :::*/*/*/*/
[15:06:50.983] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 156.8calibrated Vbg = 1.17539 :::*/*/*/*/
[15:06:50.983] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 148calibrated Vbg = 1.18129 :::*/*/*/*/
[15:06:50.983] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 165.9calibrated Vbg = 1.17605 :::*/*/*/*/
[15:06:50.983] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 148.4calibrated Vbg = 1.17426 :::*/*/*/*/
[15:06:50.983] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 157.1calibrated Vbg = 1.16711 :::*/*/*/*/
[15:06:50.983] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150calibrated Vbg = 1.16941 :::*/*/*/*/
[15:06:50.983] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 161.7calibrated Vbg = 1.16709 :::*/*/*/*/
[15:06:50.983] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 161.1calibrated Vbg = 1.17515 :::*/*/*/*/
[15:06:50.983] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 150.8calibrated Vbg = 1.17173 :::*/*/*/*/
[15:06:50.983] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 158.6calibrated Vbg = 1.17196 :::*/*/*/*/
[15:06:50.983] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 159.2calibrated Vbg = 1.17659 :::*/*/*/*/
[15:06:50.985] <TB1> INFO: ----------------------------------------------------------------------
[15:06:50.986] <TB1> INFO: PixTestReadback::CalibrateIa()
[15:06:50.986] <TB1> INFO: ----------------------------------------------------------------------

[15:09:31.803] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C0.dat
[15:09:31.803] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C1.dat
[15:09:31.803] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C2.dat
[15:09:31.803] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C3.dat
[15:09:31.803] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C4.dat
[15:09:31.804] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C5.dat
[15:09:31.804] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C6.dat
[15:09:31.804] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C7.dat
[15:09:31.804] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C8.dat
[15:09:31.804] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C9.dat
[15:09:31.804] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C10.dat
[15:09:31.804] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C11.dat
[15:09:31.804] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C12.dat
[15:09:31.804] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C13.dat
[15:09:31.804] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C14.dat
[15:09:31.804] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//readbackCal_C15.dat
[15:09:31.832] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[15:09:31.833] <TB1> INFO: PixTestReadback::doTest() done
[15:09:31.833] <TB1> INFO: Decoding statistics:
[15:09:31.833] <TB1> INFO: General information:
[15:09:31.833] <TB1> INFO: 16bit words read: 1536
[15:09:31.833] <TB1> INFO: valid events total: 256
[15:09:31.833] <TB1> INFO: empty events: 256
[15:09:31.833] <TB1> INFO: valid events with pixels: 0
[15:09:31.833] <TB1> INFO: valid pixel hits: 0
[15:09:31.833] <TB1> INFO: Event errors: 0
[15:09:31.833] <TB1> INFO: start marker: 0
[15:09:31.833] <TB1> INFO: stop marker: 0
[15:09:31.833] <TB1> INFO: overflow: 0
[15:09:31.833] <TB1> INFO: invalid 5bit words: 0
[15:09:31.833] <TB1> INFO: invalid XOR eye diagram: 0
[15:09:31.833] <TB1> INFO: frame (failed synchr.): 0
[15:09:31.833] <TB1> INFO: idle data (no TBM trl): 0
[15:09:31.833] <TB1> INFO: no data (only TBM hdr): 0
[15:09:31.833] <TB1> INFO: TBM errors: 0
[15:09:31.833] <TB1> INFO: flawed TBM headers: 0
[15:09:31.833] <TB1> INFO: flawed TBM trailers: 0
[15:09:31.833] <TB1> INFO: event ID mismatches: 0
[15:09:31.833] <TB1> INFO: ROC errors: 0
[15:09:31.833] <TB1> INFO: missing ROC header(s): 0
[15:09:31.833] <TB1> INFO: misplaced readback start: 0
[15:09:31.833] <TB1> INFO: Pixel decoding errors: 0
[15:09:31.833] <TB1> INFO: pixel data incomplete: 0
[15:09:31.833] <TB1> INFO: pixel address: 0
[15:09:31.833] <TB1> INFO: pulse height fill bit: 0
[15:09:31.833] <TB1> INFO: buffer corruption: 0
[15:09:31.885] <TB1> INFO: ######################################################################
[15:09:31.885] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[15:09:31.885] <TB1> INFO: ######################################################################
[15:09:31.888] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[15:09:31.903] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[15:09:31.903] <TB1> INFO: run 1 of 1
[15:09:32.162] <TB1> INFO: Expecting 3120000 events.
[15:10:02.868] <TB1> INFO: 659670 events read in total (30114ms).











[15:10:32.746] <TB1> INFO: 1314810 events read in total (59992ms).











[15:11:02.748] <TB1> INFO: 1966800 events read in total (89994ms).











[15:11:32.548] <TB1> INFO: 2619755 events read in total (119794ms).











[15:11:55.719] <TB1> INFO: 3120000 events read in total (142965ms).
[15:11:55.783] <TB1> INFO: Test took 143880ms.
[15:12:24.032] <TB1> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 172 seconds
[15:12:24.032] <TB1> INFO: number of dead bumps (per ROC): 0 0 1 0 0 0 0 1 0 0 1 1 0 0 0 1
[15:12:24.032] <TB1> INFO: separation cut (per ROC): 101 100 101 107 95 104 109 101 106 109 106 113 100 113 105 107
[15:12:24.032] <TB1> INFO: Decoding statistics:
[15:12:24.032] <TB1> INFO: General information:
[15:12:24.032] <TB1> INFO: 16bit words read: 0
[15:12:24.032] <TB1> INFO: valid events total: 0
[15:12:24.032] <TB1> INFO: empty events: 0
[15:12:24.032] <TB1> INFO: valid events with pixels: 0
[15:12:24.032] <TB1> INFO: valid pixel hits: 0
[15:12:24.032] <TB1> INFO: Event errors: 0
[15:12:24.032] <TB1> INFO: start marker: 0
[15:12:24.032] <TB1> INFO: stop marker: 0
[15:12:24.032] <TB1> INFO: overflow: 0
[15:12:24.032] <TB1> INFO: invalid 5bit words: 0
[15:12:24.032] <TB1> INFO: invalid XOR eye diagram: 0
[15:12:24.032] <TB1> INFO: frame (failed synchr.): 0
[15:12:24.032] <TB1> INFO: idle data (no TBM trl): 0
[15:12:24.032] <TB1> INFO: no data (only TBM hdr): 0
[15:12:24.032] <TB1> INFO: TBM errors: 0
[15:12:24.032] <TB1> INFO: flawed TBM headers: 0
[15:12:24.032] <TB1> INFO: flawed TBM trailers: 0
[15:12:24.032] <TB1> INFO: event ID mismatches: 0
[15:12:24.032] <TB1> INFO: ROC errors: 0
[15:12:24.032] <TB1> INFO: missing ROC header(s): 0
[15:12:24.032] <TB1> INFO: misplaced readback start: 0
[15:12:24.032] <TB1> INFO: Pixel decoding errors: 0
[15:12:24.032] <TB1> INFO: pixel data incomplete: 0
[15:12:24.032] <TB1> INFO: pixel address: 0
[15:12:24.032] <TB1> INFO: pulse height fill bit: 0
[15:12:24.032] <TB1> INFO: buffer corruption: 0
[15:12:24.072] <TB1> INFO: ######################################################################
[15:12:24.072] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[15:12:24.072] <TB1> INFO: ######################################################################
[15:12:24.073] <TB1> INFO: ----------------------------------------------------------------------
[15:12:24.073] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[15:12:24.073] <TB1> INFO: ----------------------------------------------------------------------
[15:12:24.073] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[15:12:24.086] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[15:12:24.086] <TB1> INFO: run 1 of 1
[15:12:24.322] <TB1> INFO: Expecting 36608000 events.
[15:12:47.823] <TB1> INFO: 676100 events read in total (22910ms).
[15:13:10.698] <TB1> INFO: 1338850 events read in total (45785ms).
[15:13:33.596] <TB1> INFO: 2004750 events read in total (68683ms).
[15:13:56.561] <TB1> INFO: 2669400 events read in total (91648ms).
[15:14:19.393] <TB1> INFO: 3332400 events read in total (114480ms).
[15:14:42.649] <TB1> INFO: 3993450 events read in total (137737ms).
[15:15:05.591] <TB1> INFO: 4656650 events read in total (160678ms).
[15:15:28.212] <TB1> INFO: 5320400 events read in total (183299ms).
[15:15:51.222] <TB1> INFO: 5982150 events read in total (206309ms).
[15:16:14.237] <TB1> INFO: 6643650 events read in total (229324ms).
[15:16:37.042] <TB1> INFO: 7303350 events read in total (252129ms).
[15:16:59.901] <TB1> INFO: 7963000 events read in total (274988ms).
[15:17:23.314] <TB1> INFO: 8624300 events read in total (298401ms).
[15:17:46.315] <TB1> INFO: 9286600 events read in total (321402ms).
[15:18:09.257] <TB1> INFO: 9948650 events read in total (344344ms).
[15:18:31.002] <TB1> INFO: 10608450 events read in total (367089ms).
[15:18:54.612] <TB1> INFO: 11268250 events read in total (389699ms).
[15:19:17.901] <TB1> INFO: 11925850 events read in total (412988ms).
[15:19:40.895] <TB1> INFO: 12582450 events read in total (435982ms).
[15:20:03.782] <TB1> INFO: 13241500 events read in total (458869ms).
[15:20:26.513] <TB1> INFO: 13899550 events read in total (481600ms).
[15:20:49.552] <TB1> INFO: 14558250 events read in total (504639ms).
[15:21:12.662] <TB1> INFO: 15214700 events read in total (527749ms).
[15:21:35.879] <TB1> INFO: 15872550 events read in total (550966ms).
[15:21:58.943] <TB1> INFO: 16530900 events read in total (574030ms).
[15:22:21.875] <TB1> INFO: 17186550 events read in total (596962ms).
[15:22:45.019] <TB1> INFO: 17844800 events read in total (620106ms).
[15:23:07.971] <TB1> INFO: 18502350 events read in total (643058ms).
[15:23:30.782] <TB1> INFO: 19155300 events read in total (665869ms).
[15:23:53.530] <TB1> INFO: 19807450 events read in total (688617ms).
[15:24:16.529] <TB1> INFO: 20463250 events read in total (711616ms).
[15:24:39.421] <TB1> INFO: 21116850 events read in total (734508ms).
[15:25:02.087] <TB1> INFO: 21769450 events read in total (757174ms).
[15:25:24.880] <TB1> INFO: 22421950 events read in total (779967ms).
[15:25:47.435] <TB1> INFO: 23075550 events read in total (802522ms).
[15:26:10.147] <TB1> INFO: 23728500 events read in total (825234ms).
[15:26:32.930] <TB1> INFO: 24381250 events read in total (848017ms).
[15:26:55.810] <TB1> INFO: 25033350 events read in total (870897ms).
[15:27:18.808] <TB1> INFO: 25686600 events read in total (893895ms).
[15:27:41.840] <TB1> INFO: 26338150 events read in total (916927ms).
[15:28:04.906] <TB1> INFO: 26988800 events read in total (939993ms).
[15:28:27.753] <TB1> INFO: 27640700 events read in total (962840ms).
[15:28:50.577] <TB1> INFO: 28291650 events read in total (985664ms).
[15:29:13.526] <TB1> INFO: 28943900 events read in total (1008613ms).
[15:29:36.271] <TB1> INFO: 29594450 events read in total (1031358ms).
[15:29:59.119] <TB1> INFO: 30242900 events read in total (1054206ms).
[15:30:22.131] <TB1> INFO: 30892550 events read in total (1077218ms).
[15:30:45.280] <TB1> INFO: 31543550 events read in total (1100367ms).
[15:31:08.194] <TB1> INFO: 32193500 events read in total (1123281ms).
[15:31:30.838] <TB1> INFO: 32841900 events read in total (1145925ms).
[15:31:53.451] <TB1> INFO: 33492750 events read in total (1168538ms).
[15:32:16.036] <TB1> INFO: 34143200 events read in total (1191123ms).
[15:32:38.606] <TB1> INFO: 34793650 events read in total (1213693ms).
[15:33:00.912] <TB1> INFO: 35444400 events read in total (1235999ms).
[15:33:23.591] <TB1> INFO: 36099300 events read in total (1258678ms).
[15:33:41.361] <TB1> INFO: 36608000 events read in total (1276448ms).
[15:33:41.426] <TB1> INFO: Test took 1277340ms.
[15:33:41.885] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:33:43.473] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:33:45.464] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:33:47.448] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:33:49.446] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:33:51.167] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:33:52.724] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:33:54.247] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:33:55.901] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:33:57.732] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:33:59.617] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:34:01.361] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:34:02.961] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:34:04.494] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:34:06.094] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:34:07.886] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:34:10.151] <TB1> INFO: PixTestScurves::scurves() done
[15:34:10.151] <TB1> INFO: Vcal mean: 109.32 113.14 108.13 112.28 95.15 123.51 117.13 104.47 106.15 109.70 115.13 116.19 110.49 114.73 109.85 112.91
[15:34:10.151] <TB1> INFO: Vcal RMS: 4.99 5.88 5.45 4.81 5.45 5.92 5.65 5.04 5.38 5.22 5.93 5.05 5.59 4.91 4.82 5.31
[15:34:10.151] <TB1> INFO: PixTestScurves::fullTest() done, duration: 1306 seconds
[15:34:10.151] <TB1> INFO: Decoding statistics:
[15:34:10.151] <TB1> INFO: General information:
[15:34:10.151] <TB1> INFO: 16bit words read: 0
[15:34:10.151] <TB1> INFO: valid events total: 0
[15:34:10.151] <TB1> INFO: empty events: 0
[15:34:10.151] <TB1> INFO: valid events with pixels: 0
[15:34:10.151] <TB1> INFO: valid pixel hits: 0
[15:34:10.151] <TB1> INFO: Event errors: 0
[15:34:10.151] <TB1> INFO: start marker: 0
[15:34:10.151] <TB1> INFO: stop marker: 0
[15:34:10.151] <TB1> INFO: overflow: 0
[15:34:10.151] <TB1> INFO: invalid 5bit words: 0
[15:34:10.151] <TB1> INFO: invalid XOR eye diagram: 0
[15:34:10.151] <TB1> INFO: frame (failed synchr.): 0
[15:34:10.151] <TB1> INFO: idle data (no TBM trl): 0
[15:34:10.151] <TB1> INFO: no data (only TBM hdr): 0
[15:34:10.151] <TB1> INFO: TBM errors: 0
[15:34:10.151] <TB1> INFO: flawed TBM headers: 0
[15:34:10.151] <TB1> INFO: flawed TBM trailers: 0
[15:34:10.151] <TB1> INFO: event ID mismatches: 0
[15:34:10.151] <TB1> INFO: ROC errors: 0
[15:34:10.151] <TB1> INFO: missing ROC header(s): 0
[15:34:10.151] <TB1> INFO: misplaced readback start: 0
[15:34:10.151] <TB1> INFO: Pixel decoding errors: 0
[15:34:10.151] <TB1> INFO: pixel data incomplete: 0
[15:34:10.151] <TB1> INFO: pixel address: 0
[15:34:10.151] <TB1> INFO: pulse height fill bit: 0
[15:34:10.151] <TB1> INFO: buffer corruption: 0
[15:34:10.227] <TB1> INFO: ######################################################################
[15:34:10.227] <TB1> INFO: PixTestTrim::doTest()
[15:34:10.227] <TB1> INFO: ######################################################################
[15:34:10.228] <TB1> INFO: ----------------------------------------------------------------------
[15:34:10.228] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[15:34:10.228] <TB1> INFO: ----------------------------------------------------------------------
[15:34:10.272] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[15:34:10.272] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[15:34:10.285] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[15:34:10.285] <TB1> INFO: run 1 of 1
[15:34:10.540] <TB1> INFO: Expecting 5025280 events.
[15:34:40.927] <TB1> INFO: 818504 events read in total (29786ms).
[15:35:10.982] <TB1> INFO: 1633576 events read in total (59841ms).
[15:35:40.917] <TB1> INFO: 2446608 events read in total (89776ms).
[15:36:10.872] <TB1> INFO: 3255448 events read in total (119731ms).
[15:36:40.656] <TB1> INFO: 4061408 events read in total (149515ms).
[15:37:10.186] <TB1> INFO: 4864112 events read in total (179045ms).
[15:37:16.496] <TB1> INFO: 5025280 events read in total (185355ms).
[15:37:16.545] <TB1> INFO: Test took 186260ms.
[15:37:38.568] <TB1> INFO: ROC 0 VthrComp = 118
[15:37:38.568] <TB1> INFO: ROC 1 VthrComp = 115
[15:37:38.568] <TB1> INFO: ROC 2 VthrComp = 113
[15:37:38.568] <TB1> INFO: ROC 3 VthrComp = 125
[15:37:38.568] <TB1> INFO: ROC 4 VthrComp = 106
[15:37:38.568] <TB1> INFO: ROC 5 VthrComp = 127
[15:37:38.568] <TB1> INFO: ROC 6 VthrComp = 131
[15:37:38.569] <TB1> INFO: ROC 7 VthrComp = 116
[15:37:38.569] <TB1> INFO: ROC 8 VthrComp = 113
[15:37:38.569] <TB1> INFO: ROC 9 VthrComp = 120
[15:37:38.569] <TB1> INFO: ROC 10 VthrComp = 122
[15:37:38.569] <TB1> INFO: ROC 11 VthrComp = 129
[15:37:38.569] <TB1> INFO: ROC 12 VthrComp = 113
[15:37:38.569] <TB1> INFO: ROC 13 VthrComp = 126
[15:37:38.569] <TB1> INFO: ROC 14 VthrComp = 122
[15:37:38.569] <TB1> INFO: ROC 15 VthrComp = 120
[15:37:38.851] <TB1> INFO: Expecting 41600 events.
[15:37:42.415] <TB1> INFO: 41600 events read in total (2973ms).
[15:37:42.416] <TB1> INFO: Test took 3845ms.
[15:37:42.424] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[15:37:42.424] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[15:37:42.435] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[15:37:42.436] <TB1> INFO: run 1 of 1
[15:37:42.714] <TB1> INFO: Expecting 5025280 events.
[15:38:09.237] <TB1> INFO: 590112 events read in total (25932ms).
[15:38:35.339] <TB1> INFO: 1179408 events read in total (52034ms).
[15:39:01.353] <TB1> INFO: 1768720 events read in total (78048ms).
[15:39:26.906] <TB1> INFO: 2356768 events read in total (103601ms).
[15:39:52.766] <TB1> INFO: 2943128 events read in total (129461ms).
[15:40:18.529] <TB1> INFO: 3528440 events read in total (155224ms).
[15:40:44.272] <TB1> INFO: 4112032 events read in total (180967ms).
[15:41:10.470] <TB1> INFO: 4695304 events read in total (207165ms).
[15:41:24.981] <TB1> INFO: 5025280 events read in total (221676ms).
[15:41:25.065] <TB1> INFO: Test took 222629ms.
[15:41:50.944] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 57.8478 for pixel 18/2 mean/min/max = 44.7776/31.6682/57.887
[15:41:50.945] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 62.5391 for pixel 0/4 mean/min/max = 47.1684/31.4296/62.9072
[15:41:50.945] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 59.9896 for pixel 0/1 mean/min/max = 46.2325/32.4087/60.0563
[15:41:50.945] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 56.827 for pixel 39/1 mean/min/max = 44.4386/31.7299/57.1473
[15:41:50.946] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 57.6172 for pixel 4/0 mean/min/max = 45.8281/33.9341/57.722
[15:41:50.946] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 60.7768 for pixel 8/15 mean/min/max = 45.7305/30.6191/60.8418
[15:41:50.946] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 57.2691 for pixel 14/2 mean/min/max = 44.9403/32.4481/57.4326
[15:41:50.947] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 58.7018 for pixel 16/22 mean/min/max = 45.3188/31.9137/58.7239
[15:41:50.947] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 59.2827 for pixel 1/78 mean/min/max = 45.591/31.8542/59.3277
[15:41:50.947] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 58.037 for pixel 0/28 mean/min/max = 45.1568/32.1427/58.171
[15:41:50.948] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 60.5539 for pixel 9/20 mean/min/max = 45.8452/30.8659/60.8245
[15:41:50.948] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 56.9175 for pixel 16/15 mean/min/max = 44.2841/31.6443/56.9239
[15:41:50.949] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 61.0661 for pixel 20/78 mean/min/max = 46.7345/32.3551/61.1139
[15:41:50.949] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 56.1414 for pixel 19/40 mean/min/max = 44.7924/32.767/56.8177
[15:41:50.949] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 57.1108 for pixel 24/23 mean/min/max = 44.707/32.2549/57.1591
[15:41:50.949] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 58.8803 for pixel 14/76 mean/min/max = 45.6095/32.0679/59.151
[15:41:50.950] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:51.039] <TB1> INFO: Expecting 411648 events.
[15:42:00.340] <TB1> INFO: 411648 events read in total (8710ms).
[15:42:00.349] <TB1> INFO: Expecting 411648 events.
[15:42:09.633] <TB1> INFO: 411648 events read in total (8881ms).
[15:42:09.643] <TB1> INFO: Expecting 411648 events.
[15:42:18.966] <TB1> INFO: 411648 events read in total (8920ms).
[15:42:18.980] <TB1> INFO: Expecting 411648 events.
[15:42:28.328] <TB1> INFO: 411648 events read in total (8945ms).
[15:42:28.345] <TB1> INFO: Expecting 411648 events.
[15:42:37.633] <TB1> INFO: 411648 events read in total (8884ms).
[15:42:37.654] <TB1> INFO: Expecting 411648 events.
[15:42:46.979] <TB1> INFO: 411648 events read in total (8922ms).
[15:42:46.001] <TB1> INFO: Expecting 411648 events.
[15:42:56.431] <TB1> INFO: 411648 events read in total (9027ms).
[15:42:56.457] <TB1> INFO: Expecting 411648 events.
[15:43:05.773] <TB1> INFO: 411648 events read in total (8913ms).
[15:43:05.806] <TB1> INFO: Expecting 411648 events.
[15:43:15.132] <TB1> INFO: 411648 events read in total (8923ms).
[15:43:15.164] <TB1> INFO: Expecting 411648 events.
[15:43:24.499] <TB1> INFO: 411648 events read in total (8932ms).
[15:43:24.532] <TB1> INFO: Expecting 411648 events.
[15:43:33.875] <TB1> INFO: 411648 events read in total (8940ms).
[15:43:33.910] <TB1> INFO: Expecting 411648 events.
[15:43:43.219] <TB1> INFO: 411648 events read in total (8906ms).
[15:43:43.257] <TB1> INFO: Expecting 411648 events.
[15:43:52.507] <TB1> INFO: 411648 events read in total (8846ms).
[15:43:52.561] <TB1> INFO: Expecting 411648 events.
[15:44:01.812] <TB1> INFO: 411648 events read in total (8848ms).
[15:44:01.856] <TB1> INFO: Expecting 411648 events.
[15:44:11.161] <TB1> INFO: 411648 events read in total (8902ms).
[15:44:11.210] <TB1> INFO: Expecting 411648 events.
[15:44:20.482] <TB1> INFO: 411648 events read in total (8869ms).
[15:44:20.548] <TB1> INFO: Test took 149598ms.
[15:44:21.456] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[15:44:21.469] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[15:44:21.469] <TB1> INFO: run 1 of 1
[15:44:21.707] <TB1> INFO: Expecting 5025280 events.
[15:44:48.168] <TB1> INFO: 585064 events read in total (25870ms).
[15:45:14.079] <TB1> INFO: 1169024 events read in total (51781ms).
[15:45:40.405] <TB1> INFO: 1751912 events read in total (78108ms).
[15:46:06.601] <TB1> INFO: 2333568 events read in total (104303ms).
[15:46:32.657] <TB1> INFO: 2914416 events read in total (130359ms).
[15:46:58.628] <TB1> INFO: 3495032 events read in total (156330ms).
[15:47:24.634] <TB1> INFO: 4075624 events read in total (182336ms).
[15:47:50.715] <TB1> INFO: 4657008 events read in total (208417ms).
[15:48:07.413] <TB1> INFO: 5025280 events read in total (225115ms).
[15:48:07.558] <TB1> INFO: Test took 226090ms.
[15:48:30.653] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.735054 .. 147.551220
[15:48:30.892] <TB1> INFO: Expecting 208000 events.
[15:48:40.779] <TB1> INFO: 208000 events read in total (9296ms).
[15:48:40.780] <TB1> INFO: Test took 10126ms.
[15:48:40.834] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 157 (-1/-1) hits flags = 528 (plus default)
[15:48:40.848] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[15:48:40.848] <TB1> INFO: run 1 of 1
[15:48:41.127] <TB1> INFO: Expecting 5258240 events.
[15:49:07.518] <TB1> INFO: 584912 events read in total (25800ms).
[15:49:33.910] <TB1> INFO: 1169448 events read in total (52192ms).
[15:49:59.427] <TB1> INFO: 1754352 events read in total (77709ms).
[15:50:25.507] <TB1> INFO: 2339216 events read in total (103789ms).
[15:50:51.185] <TB1> INFO: 2924120 events read in total (129467ms).
[15:51:16.387] <TB1> INFO: 3508328 events read in total (154669ms).
[15:51:42.353] <TB1> INFO: 4092184 events read in total (180635ms).
[15:52:07.260] <TB1> INFO: 4675368 events read in total (205542ms).
[15:52:32.750] <TB1> INFO: 5258240 events read in total (231032ms).
[15:52:32.963] <TB1> INFO: Test took 232114ms.
[15:52:59.501] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 27.873135 .. 47.516031
[15:52:59.757] <TB1> INFO: Expecting 208000 events.
[15:53:09.674] <TB1> INFO: 208000 events read in total (9317ms).
[15:53:09.675] <TB1> INFO: Test took 10173ms.
[15:53:09.727] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 57 (-1/-1) hits flags = 528 (plus default)
[15:53:09.740] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[15:53:09.740] <TB1> INFO: run 1 of 1
[15:53:10.018] <TB1> INFO: Expecting 1364480 events.
[15:53:38.341] <TB1> INFO: 651256 events read in total (27731ms).
[15:54:05.965] <TB1> INFO: 1300752 events read in total (55355ms).
[15:54:08.995] <TB1> INFO: 1364480 events read in total (58385ms).
[15:54:09.026] <TB1> INFO: Test took 59287ms.
[15:54:21.368] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 26.015804 .. 47.438746
[15:54:21.605] <TB1> INFO: Expecting 208000 events.
[15:54:31.521] <TB1> INFO: 208000 events read in total (9324ms).
[15:54:31.522] <TB1> INFO: Test took 10153ms.
[15:54:31.593] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 16 .. 57 (-1/-1) hits flags = 528 (plus default)
[15:54:31.609] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[15:54:31.609] <TB1> INFO: run 1 of 1
[15:54:31.892] <TB1> INFO: Expecting 1397760 events.
[15:55:00.347] <TB1> INFO: 655688 events read in total (27863ms).
[15:55:27.846] <TB1> INFO: 1310368 events read in total (55362ms).
[15:55:32.032] <TB1> INFO: 1397760 events read in total (59548ms).
[15:55:32.061] <TB1> INFO: Test took 60453ms.
[15:55:45.344] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 23.762540 .. 44.703503
[15:55:45.672] <TB1> INFO: Expecting 208000 events.
[15:55:55.406] <TB1> INFO: 208000 events read in total (9142ms).
[15:55:55.407] <TB1> INFO: Test took 10062ms.
[15:55:55.489] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 13 .. 54 (-1/-1) hits flags = 528 (plus default)
[15:55:55.502] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[15:55:55.502] <TB1> INFO: run 1 of 1
[15:55:55.782] <TB1> INFO: Expecting 1397760 events.
[15:56:25.722] <TB1> INFO: 679368 events read in total (29348ms).
[15:56:53.447] <TB1> INFO: 1359040 events read in total (57073ms).
[15:56:55.479] <TB1> INFO: 1397760 events read in total (59106ms).
[15:56:55.506] <TB1> INFO: Test took 60003ms.
[15:57:08.512] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[15:57:08.512] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[15:57:08.525] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[15:57:08.525] <TB1> INFO: run 1 of 1
[15:57:08.779] <TB1> INFO: Expecting 1364480 events.
[15:57:36.602] <TB1> INFO: 666624 events read in total (27231ms).
[15:58:04.316] <TB1> INFO: 1333000 events read in total (54946ms).
[15:58:05.994] <TB1> INFO: 1364480 events read in total (56624ms).
[15:58:06.021] <TB1> INFO: Test took 57495ms.
[15:58:18.233] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C0.dat
[15:58:18.234] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C1.dat
[15:58:18.234] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C2.dat
[15:58:18.234] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C3.dat
[15:58:18.234] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C4.dat
[15:58:18.234] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C5.dat
[15:58:18.234] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C6.dat
[15:58:18.235] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C7.dat
[15:58:18.235] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C8.dat
[15:58:18.235] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C9.dat
[15:58:18.235] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C10.dat
[15:58:18.235] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C11.dat
[15:58:18.235] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C12.dat
[15:58:18.235] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C13.dat
[15:58:18.235] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C14.dat
[15:58:18.235] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C15.dat
[15:58:18.236] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//trimParameters35_C0.dat
[15:58:18.241] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//trimParameters35_C1.dat
[15:58:18.246] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//trimParameters35_C2.dat
[15:58:18.251] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//trimParameters35_C3.dat
[15:58:18.256] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//trimParameters35_C4.dat
[15:58:18.260] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//trimParameters35_C5.dat
[15:58:18.265] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//trimParameters35_C6.dat
[15:58:18.270] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//trimParameters35_C7.dat
[15:58:18.275] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//trimParameters35_C8.dat
[15:58:18.279] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//trimParameters35_C9.dat
[15:58:18.284] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//trimParameters35_C10.dat
[15:58:18.289] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//trimParameters35_C11.dat
[15:58:18.293] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//trimParameters35_C12.dat
[15:58:18.298] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//trimParameters35_C13.dat
[15:58:18.303] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//trimParameters35_C14.dat
[15:58:18.308] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//trimParameters35_C15.dat
[15:58:18.312] <TB1> INFO: PixTestTrim::trimTest() done
[15:58:18.312] <TB1> INFO: vtrim: 125 125 132 138 143 127 129 135 139 115 121 123 123 115 132 131
[15:58:18.312] <TB1> INFO: vthrcomp: 118 115 113 125 106 127 131 116 113 120 122 129 113 126 122 120
[15:58:18.312] <TB1> INFO: vcal mean: 34.95 35.04 34.97 35.00 34.99 34.98 34.98 35.01 34.72 35.00 34.98 34.94 34.97 34.96 34.97 34.82
[15:58:18.312] <TB1> INFO: vcal RMS: 1.04 1.22 1.19 1.08 0.91 1.22 0.95 0.99 0.97 0.95 1.05 1.03 1.01 0.97 0.98 1.00
[15:58:18.312] <TB1> INFO: bits mean: 10.03 9.11 9.39 10.08 9.37 9.89 9.60 9.78 9.68 9.31 9.49 10.11 9.21 9.53 9.82 9.31
[15:58:18.312] <TB1> INFO: bits RMS: 2.56 2.91 2.62 2.53 2.50 2.67 2.62 2.56 2.54 2.78 2.83 2.53 2.71 2.66 2.60 2.78
[15:58:18.320] <TB1> INFO: ----------------------------------------------------------------------
[15:58:18.320] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[15:58:18.320] <TB1> INFO: ----------------------------------------------------------------------
[15:58:18.323] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[15:58:18.336] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[15:58:18.337] <TB1> INFO: run 1 of 1
[15:58:18.573] <TB1> INFO: Expecting 4160000 events.
[15:58:51.647] <TB1> INFO: 746270 events read in total (32483ms).
[15:59:23.143] <TB1> INFO: 1485855 events read in total (63979ms).
[15:59:54.879] <TB1> INFO: 2220905 events read in total (95715ms).
[16:00:26.747] <TB1> INFO: 2951215 events read in total (127583ms).
[16:00:58.693] <TB1> INFO: 3677675 events read in total (159529ms).
[16:01:20.343] <TB1> INFO: 4160000 events read in total (181179ms).
[16:01:20.442] <TB1> INFO: Test took 182105ms.
[16:01:45.889] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 197 (-1/-1) hits flags = 528 (plus default)
[16:01:45.902] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[16:01:45.902] <TB1> INFO: run 1 of 1
[16:01:46.163] <TB1> INFO: Expecting 4118400 events.
[16:02:18.598] <TB1> INFO: 724950 events read in total (31844ms).
[16:02:49.500] <TB1> INFO: 1443365 events read in total (62746ms).
[16:03:20.925] <TB1> INFO: 2157955 events read in total (94171ms).
[16:03:52.362] <TB1> INFO: 2867300 events read in total (125608ms).
[16:04:24.021] <TB1> INFO: 3573610 events read in total (157267ms).
[16:04:48.428] <TB1> INFO: 4118400 events read in total (181674ms).
[16:04:48.545] <TB1> INFO: Test took 182643ms.
[16:05:13.023] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 184 (-1/-1) hits flags = 528 (plus default)
[16:05:13.037] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[16:05:13.037] <TB1> INFO: run 1 of 1
[16:05:13.292] <TB1> INFO: Expecting 3848000 events.
[16:05:46.474] <TB1> INFO: 743840 events read in total (32591ms).
[16:06:18.008] <TB1> INFO: 1480690 events read in total (64125ms).
[16:06:50.013] <TB1> INFO: 2211590 events read in total (96130ms).
[16:07:21.369] <TB1> INFO: 2937685 events read in total (127486ms).
[16:07:53.586] <TB1> INFO: 3660635 events read in total (159703ms).
[16:08:01.939] <TB1> INFO: 3848000 events read in total (168056ms).
[16:08:02.031] <TB1> INFO: Test took 168993ms.
[16:08:25.423] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 184 (-1/-1) hits flags = 528 (plus default)
[16:08:25.436] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[16:08:25.436] <TB1> INFO: run 1 of 1
[16:08:25.674] <TB1> INFO: Expecting 3848000 events.
[16:08:58.281] <TB1> INFO: 744155 events read in total (32015ms).
[16:09:30.560] <TB1> INFO: 1481045 events read in total (64294ms).
[16:10:02.520] <TB1> INFO: 2212335 events read in total (96254ms).
[16:10:34.419] <TB1> INFO: 2938300 events read in total (128153ms).
[16:11:06.325] <TB1> INFO: 3661265 events read in total (160059ms).
[16:11:14.521] <TB1> INFO: 3848000 events read in total (168255ms).
[16:11:14.711] <TB1> INFO: Test took 169275ms.
[16:11:40.469] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 184 (-1/-1) hits flags = 528 (plus default)
[16:11:40.483] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[16:11:40.483] <TB1> INFO: run 1 of 1
[16:11:40.719] <TB1> INFO: Expecting 3848000 events.
[16:12:13.237] <TB1> INFO: 744260 events read in total (31927ms).
[16:12:44.749] <TB1> INFO: 1481660 events read in total (63439ms).
[16:13:16.838] <TB1> INFO: 2213185 events read in total (95528ms).
[16:13:49.127] <TB1> INFO: 2939450 events read in total (127817ms).
[16:14:22.214] <TB1> INFO: 3662785 events read in total (160904ms).
[16:14:30.691] <TB1> INFO: 3848000 events read in total (169381ms).
[16:14:30.784] <TB1> INFO: Test took 170301ms.
[16:14:56.815] <TB1> INFO: PixTestTrim::trimBitTest() done
[16:14:56.816] <TB1> INFO: PixTestTrim::doTest() done, duration: 2446 seconds
[16:14:56.816] <TB1> INFO: Decoding statistics:
[16:14:56.816] <TB1> INFO: General information:
[16:14:56.816] <TB1> INFO: 16bit words read: 0
[16:14:56.816] <TB1> INFO: valid events total: 0
[16:14:56.816] <TB1> INFO: empty events: 0
[16:14:56.816] <TB1> INFO: valid events with pixels: 0
[16:14:56.816] <TB1> INFO: valid pixel hits: 0
[16:14:56.816] <TB1> INFO: Event errors: 0
[16:14:56.816] <TB1> INFO: start marker: 0
[16:14:56.816] <TB1> INFO: stop marker: 0
[16:14:56.817] <TB1> INFO: overflow: 0
[16:14:56.817] <TB1> INFO: invalid 5bit words: 0
[16:14:56.817] <TB1> INFO: invalid XOR eye diagram: 0
[16:14:56.817] <TB1> INFO: frame (failed synchr.): 0
[16:14:56.817] <TB1> INFO: idle data (no TBM trl): 0
[16:14:56.817] <TB1> INFO: no data (only TBM hdr): 0
[16:14:56.817] <TB1> INFO: TBM errors: 0
[16:14:56.817] <TB1> INFO: flawed TBM headers: 0
[16:14:56.817] <TB1> INFO: flawed TBM trailers: 0
[16:14:56.817] <TB1> INFO: event ID mismatches: 0
[16:14:56.817] <TB1> INFO: ROC errors: 0
[16:14:56.817] <TB1> INFO: missing ROC header(s): 0
[16:14:56.817] <TB1> INFO: misplaced readback start: 0
[16:14:56.817] <TB1> INFO: Pixel decoding errors: 0
[16:14:56.817] <TB1> INFO: pixel data incomplete: 0
[16:14:56.817] <TB1> INFO: pixel address: 0
[16:14:56.817] <TB1> INFO: pulse height fill bit: 0
[16:14:56.817] <TB1> INFO: buffer corruption: 0
[16:14:57.439] <TB1> INFO: ######################################################################
[16:14:57.439] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[16:14:57.439] <TB1> INFO: ######################################################################
[16:14:57.703] <TB1> INFO: Expecting 41600 events.
[16:15:01.270] <TB1> INFO: 41600 events read in total (2975ms).
[16:15:01.271] <TB1> INFO: Test took 3831ms.
[16:15:01.712] <TB1> INFO: Expecting 41600 events.
[16:15:05.254] <TB1> INFO: 41600 events read in total (2951ms).
[16:15:05.255] <TB1> INFO: Test took 3782ms.
[16:15:05.544] <TB1> INFO: Expecting 41600 events.
[16:15:09.089] <TB1> INFO: 41600 events read in total (2953ms).
[16:15:09.090] <TB1> INFO: Test took 3811ms.
[16:15:09.394] <TB1> INFO: Expecting 41600 events.
[16:15:12.946] <TB1> INFO: 41600 events read in total (2961ms).
[16:15:12.947] <TB1> INFO: Test took 3832ms.
[16:15:13.236] <TB1> INFO: Expecting 41600 events.
[16:15:16.747] <TB1> INFO: 41600 events read in total (2920ms).
[16:15:16.748] <TB1> INFO: Test took 3777ms.
[16:15:17.037] <TB1> INFO: Expecting 41600 events.
[16:15:20.625] <TB1> INFO: 41600 events read in total (2996ms).
[16:15:20.625] <TB1> INFO: Test took 3853ms.
[16:15:20.914] <TB1> INFO: Expecting 41600 events.
[16:15:24.503] <TB1> INFO: 41600 events read in total (2997ms).
[16:15:24.504] <TB1> INFO: Test took 3854ms.
[16:15:24.793] <TB1> INFO: Expecting 41600 events.
[16:15:28.438] <TB1> INFO: 41600 events read in total (3053ms).
[16:15:28.440] <TB1> INFO: Test took 3912ms.
[16:15:28.731] <TB1> INFO: Expecting 41600 events.
[16:15:32.260] <TB1> INFO: 41600 events read in total (2938ms).
[16:15:32.261] <TB1> INFO: Test took 3796ms.
[16:15:32.576] <TB1> INFO: Expecting 41600 events.
[16:15:36.284] <TB1> INFO: 41600 events read in total (3116ms).
[16:15:36.285] <TB1> INFO: Test took 4000ms.
[16:15:36.646] <TB1> INFO: Expecting 41600 events.
[16:15:40.224] <TB1> INFO: 41600 events read in total (2987ms).
[16:15:40.225] <TB1> INFO: Test took 3911ms.
[16:15:40.514] <TB1> INFO: Expecting 41600 events.
[16:15:44.133] <TB1> INFO: 41600 events read in total (3027ms).
[16:15:44.134] <TB1> INFO: Test took 3885ms.
[16:15:44.439] <TB1> INFO: Expecting 41600 events.
[16:15:48.065] <TB1> INFO: 41600 events read in total (3035ms).
[16:15:48.066] <TB1> INFO: Test took 3905ms.
[16:15:48.355] <TB1> INFO: Expecting 41600 events.
[16:15:51.925] <TB1> INFO: 41600 events read in total (2978ms).
[16:15:51.926] <TB1> INFO: Test took 3836ms.
[16:15:52.215] <TB1> INFO: Expecting 41600 events.
[16:15:55.702] <TB1> INFO: 41600 events read in total (2895ms).
[16:15:55.703] <TB1> INFO: Test took 3752ms.
[16:15:55.992] <TB1> INFO: Expecting 41600 events.
[16:15:59.529] <TB1> INFO: 41600 events read in total (2946ms).
[16:15:59.530] <TB1> INFO: Test took 3803ms.
[16:15:59.819] <TB1> INFO: Expecting 41600 events.
[16:16:03.446] <TB1> INFO: 41600 events read in total (3035ms).
[16:16:03.447] <TB1> INFO: Test took 3893ms.
[16:16:03.737] <TB1> INFO: Expecting 41600 events.
[16:16:07.235] <TB1> INFO: 41600 events read in total (2907ms).
[16:16:07.236] <TB1> INFO: Test took 3765ms.
[16:16:07.525] <TB1> INFO: Expecting 41600 events.
[16:16:11.020] <TB1> INFO: 41600 events read in total (2903ms).
[16:16:11.021] <TB1> INFO: Test took 3761ms.
[16:16:11.310] <TB1> INFO: Expecting 41600 events.
[16:16:14.822] <TB1> INFO: 41600 events read in total (2920ms).
[16:16:14.823] <TB1> INFO: Test took 3778ms.
[16:16:15.112] <TB1> INFO: Expecting 41600 events.
[16:16:18.693] <TB1> INFO: 41600 events read in total (2990ms).
[16:16:18.694] <TB1> INFO: Test took 3847ms.
[16:16:18.983] <TB1> INFO: Expecting 41600 events.
[16:16:22.519] <TB1> INFO: 41600 events read in total (2944ms).
[16:16:22.520] <TB1> INFO: Test took 3802ms.
[16:16:22.810] <TB1> INFO: Expecting 41600 events.
[16:16:26.356] <TB1> INFO: 41600 events read in total (2955ms).
[16:16:26.357] <TB1> INFO: Test took 3812ms.
[16:16:26.646] <TB1> INFO: Expecting 41600 events.
[16:16:30.189] <TB1> INFO: 41600 events read in total (2951ms).
[16:16:30.190] <TB1> INFO: Test took 3809ms.
[16:16:30.480] <TB1> INFO: Expecting 41600 events.
[16:16:34.071] <TB1> INFO: 41600 events read in total (3000ms).
[16:16:34.071] <TB1> INFO: Test took 3857ms.
[16:16:34.361] <TB1> INFO: Expecting 41600 events.
[16:16:37.910] <TB1> INFO: 41600 events read in total (2957ms).
[16:16:37.911] <TB1> INFO: Test took 3815ms.
[16:16:38.200] <TB1> INFO: Expecting 41600 events.
[16:16:41.764] <TB1> INFO: 41600 events read in total (2972ms).
[16:16:41.765] <TB1> INFO: Test took 3830ms.
[16:16:42.055] <TB1> INFO: Expecting 41600 events.
[16:16:45.655] <TB1> INFO: 41600 events read in total (3008ms).
[16:16:45.656] <TB1> INFO: Test took 3867ms.
[16:16:45.946] <TB1> INFO: Expecting 41600 events.
[16:16:49.447] <TB1> INFO: 41600 events read in total (2909ms).
[16:16:49.447] <TB1> INFO: Test took 3766ms.
[16:16:49.742] <TB1> INFO: Expecting 41600 events.
[16:16:53.286] <TB1> INFO: 41600 events read in total (2953ms).
[16:16:53.287] <TB1> INFO: Test took 3804ms.
[16:16:53.577] <TB1> INFO: Expecting 2560 events.
[16:16:54.469] <TB1> INFO: 2560 events read in total (300ms).
[16:16:54.469] <TB1> INFO: Test took 1170ms.
[16:16:54.777] <TB1> INFO: Expecting 2560 events.
[16:16:55.668] <TB1> INFO: 2560 events read in total (299ms).
[16:16:55.669] <TB1> INFO: Test took 1199ms.
[16:16:55.977] <TB1> INFO: Expecting 2560 events.
[16:16:56.872] <TB1> INFO: 2560 events read in total (303ms).
[16:16:56.873] <TB1> INFO: Test took 1204ms.
[16:16:57.180] <TB1> INFO: Expecting 2560 events.
[16:16:58.072] <TB1> INFO: 2560 events read in total (300ms).
[16:16:58.072] <TB1> INFO: Test took 1198ms.
[16:16:58.380] <TB1> INFO: Expecting 2560 events.
[16:16:59.262] <TB1> INFO: 2560 events read in total (291ms).
[16:16:59.263] <TB1> INFO: Test took 1189ms.
[16:16:59.569] <TB1> INFO: Expecting 2560 events.
[16:17:00.458] <TB1> INFO: 2560 events read in total (297ms).
[16:17:00.458] <TB1> INFO: Test took 1195ms.
[16:17:00.765] <TB1> INFO: Expecting 2560 events.
[16:17:01.649] <TB1> INFO: 2560 events read in total (292ms).
[16:17:01.649] <TB1> INFO: Test took 1190ms.
[16:17:01.957] <TB1> INFO: Expecting 2560 events.
[16:17:02.843] <TB1> INFO: 2560 events read in total (294ms).
[16:17:02.844] <TB1> INFO: Test took 1195ms.
[16:17:03.151] <TB1> INFO: Expecting 2560 events.
[16:17:04.032] <TB1> INFO: 2560 events read in total (289ms).
[16:17:04.032] <TB1> INFO: Test took 1187ms.
[16:17:04.340] <TB1> INFO: Expecting 2560 events.
[16:17:05.225] <TB1> INFO: 2560 events read in total (293ms).
[16:17:05.225] <TB1> INFO: Test took 1192ms.
[16:17:05.534] <TB1> INFO: Expecting 2560 events.
[16:17:06.414] <TB1> INFO: 2560 events read in total (289ms).
[16:17:06.414] <TB1> INFO: Test took 1188ms.
[16:17:06.722] <TB1> INFO: Expecting 2560 events.
[16:17:07.609] <TB1> INFO: 2560 events read in total (296ms).
[16:17:07.609] <TB1> INFO: Test took 1194ms.
[16:17:07.918] <TB1> INFO: Expecting 2560 events.
[16:17:08.814] <TB1> INFO: 2560 events read in total (304ms).
[16:17:08.814] <TB1> INFO: Test took 1204ms.
[16:17:09.123] <TB1> INFO: Expecting 2560 events.
[16:17:10.015] <TB1> INFO: 2560 events read in total (301ms).
[16:17:10.015] <TB1> INFO: Test took 1200ms.
[16:17:10.323] <TB1> INFO: Expecting 2560 events.
[16:17:11.206] <TB1> INFO: 2560 events read in total (292ms).
[16:17:11.207] <TB1> INFO: Test took 1191ms.
[16:17:11.515] <TB1> INFO: Expecting 2560 events.
[16:17:12.411] <TB1> INFO: 2560 events read in total (305ms).
[16:17:12.411] <TB1> INFO: Test took 1204ms.
[16:17:12.416] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:17:12.718] <TB1> INFO: Expecting 655360 events.
[16:17:27.461] <TB1> INFO: 655360 events read in total (14151ms).
[16:17:27.479] <TB1> INFO: Expecting 655360 events.
[16:17:42.025] <TB1> INFO: 655360 events read in total (14143ms).
[16:17:42.044] <TB1> INFO: Expecting 655360 events.
[16:17:56.698] <TB1> INFO: 655360 events read in total (14250ms).
[16:17:56.728] <TB1> INFO: Expecting 655360 events.
[16:18:11.577] <TB1> INFO: 655360 events read in total (14446ms).
[16:18:11.605] <TB1> INFO: Expecting 655360 events.
[16:18:26.285] <TB1> INFO: 655360 events read in total (14277ms).
[16:18:26.326] <TB1> INFO: Expecting 655360 events.
[16:18:41.040] <TB1> INFO: 655360 events read in total (14311ms).
[16:18:41.085] <TB1> INFO: Expecting 655360 events.
[16:18:55.605] <TB1> INFO: 655360 events read in total (14117ms).
[16:18:55.644] <TB1> INFO: Expecting 655360 events.
[16:19:10.307] <TB1> INFO: 655360 events read in total (14259ms).
[16:19:10.354] <TB1> INFO: Expecting 655360 events.
[16:19:25.019] <TB1> INFO: 655360 events read in total (14262ms).
[16:19:25.101] <TB1> INFO: Expecting 655360 events.
[16:19:39.874] <TB1> INFO: 655360 events read in total (14370ms).
[16:19:39.941] <TB1> INFO: Expecting 655360 events.
[16:19:54.781] <TB1> INFO: 655360 events read in total (14437ms).
[16:19:54.857] <TB1> INFO: Expecting 655360 events.
[16:20:09.454] <TB1> INFO: 655360 events read in total (14193ms).
[16:20:09.661] <TB1> INFO: Expecting 655360 events.
[16:20:24.432] <TB1> INFO: 655360 events read in total (14368ms).
[16:20:24.510] <TB1> INFO: Expecting 655360 events.
[16:20:39.174] <TB1> INFO: 655360 events read in total (14261ms).
[16:20:39.444] <TB1> INFO: Expecting 655360 events.
[16:20:54.170] <TB1> INFO: 655360 events read in total (14323ms).
[16:20:54.263] <TB1> INFO: Expecting 655360 events.
[16:21:08.906] <TB1> INFO: 655360 events read in total (14240ms).
[16:21:09.031] <TB1> INFO: Test took 236615ms.
[16:21:09.127] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:21:09.386] <TB1> INFO: Expecting 655360 events.
[16:21:24.095] <TB1> INFO: 655360 events read in total (14117ms).
[16:21:24.115] <TB1> INFO: Expecting 655360 events.
[16:21:38.768] <TB1> INFO: 655360 events read in total (14250ms).
[16:21:38.786] <TB1> INFO: Expecting 655360 events.
[16:21:53.204] <TB1> INFO: 655360 events read in total (14015ms).
[16:21:53.234] <TB1> INFO: Expecting 655360 events.
[16:22:07.873] <TB1> INFO: 655360 events read in total (14236ms).
[16:22:07.901] <TB1> INFO: Expecting 655360 events.
[16:22:22.430] <TB1> INFO: 655360 events read in total (14126ms).
[16:22:22.468] <TB1> INFO: Expecting 655360 events.
[16:22:36.654] <TB1> INFO: 655360 events read in total (13783ms).
[16:22:36.691] <TB1> INFO: Expecting 655360 events.
[16:22:51.329] <TB1> INFO: 655360 events read in total (14235ms).
[16:22:51.368] <TB1> INFO: Expecting 655360 events.
[16:23:06.319] <TB1> INFO: 655360 events read in total (14547ms).
[16:23:06.366] <TB1> INFO: Expecting 655360 events.
[16:23:20.941] <TB1> INFO: 655360 events read in total (14172ms).
[16:23:20.998] <TB1> INFO: Expecting 655360 events.
[16:23:35.643] <TB1> INFO: 655360 events read in total (14242ms).
[16:23:35.709] <TB1> INFO: Expecting 655360 events.
[16:23:50.319] <TB1> INFO: 655360 events read in total (14207ms).
[16:23:50.388] <TB1> INFO: Expecting 655360 events.
[16:24:04.799] <TB1> INFO: 655360 events read in total (14008ms).
[16:24:04.876] <TB1> INFO: Expecting 655360 events.
[16:24:19.452] <TB1> INFO: 655360 events read in total (14170ms).
[16:24:19.643] <TB1> INFO: Expecting 655360 events.
[16:24:34.457] <TB1> INFO: 655360 events read in total (14411ms).
[16:24:34.542] <TB1> INFO: Expecting 655360 events.
[16:24:49.372] <TB1> INFO: 655360 events read in total (14427ms).
[16:24:49.523] <TB1> INFO: Expecting 655360 events.
[16:25:04.544] <TB1> INFO: 655360 events read in total (14618ms).
[16:25:04.642] <TB1> INFO: Test took 235515ms.
[16:25:04.815] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:25:04.821] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:25:04.827] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[16:25:04.833] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[16:25:04.839] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[16:25:04.844] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[16:25:04.850] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[16:25:04.856] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[16:25:04.862] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[16:25:04.867] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:25:04.873] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[16:25:04.879] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:25:04.885] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:25:04.890] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:25:04.896] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[16:25:04.902] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[16:25:04.908] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:25:04.914] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:25:04.919] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:25:04.925] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:25:04.931] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:25:04.936] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:25:04.942] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[16:25:04.948] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:25:04.954] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:25:04.959] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[16:25:04.965] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:25:04.971] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:25:05.007] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C0.dat
[16:25:05.007] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C1.dat
[16:25:05.007] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C2.dat
[16:25:05.008] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C3.dat
[16:25:05.008] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C4.dat
[16:25:05.008] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C5.dat
[16:25:05.008] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C6.dat
[16:25:05.008] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C7.dat
[16:25:05.009] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C8.dat
[16:25:05.009] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C9.dat
[16:25:05.009] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C10.dat
[16:25:05.009] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C11.dat
[16:25:05.009] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C12.dat
[16:25:05.010] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C13.dat
[16:25:05.010] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C14.dat
[16:25:05.010] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//dacParameters35_C15.dat
[16:25:05.255] <TB1> INFO: Expecting 41600 events.
[16:25:08.374] <TB1> INFO: 41600 events read in total (2527ms).
[16:25:08.374] <TB1> INFO: Test took 3360ms.
[16:25:08.830] <TB1> INFO: Expecting 41600 events.
[16:25:11.929] <TB1> INFO: 41600 events read in total (2507ms).
[16:25:11.930] <TB1> INFO: Test took 3341ms.
[16:25:12.391] <TB1> INFO: Expecting 41600 events.
[16:25:15.608] <TB1> INFO: 41600 events read in total (2625ms).
[16:25:15.609] <TB1> INFO: Test took 3466ms.
[16:25:15.827] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:15.916] <TB1> INFO: Expecting 2560 events.
[16:25:16.801] <TB1> INFO: 2560 events read in total (293ms).
[16:25:16.801] <TB1> INFO: Test took 974ms.
[16:25:16.804] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:17.110] <TB1> INFO: Expecting 2560 events.
[16:25:18.003] <TB1> INFO: 2560 events read in total (301ms).
[16:25:18.004] <TB1> INFO: Test took 1200ms.
[16:25:18.007] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:18.312] <TB1> INFO: Expecting 2560 events.
[16:25:19.205] <TB1> INFO: 2560 events read in total (301ms).
[16:25:19.205] <TB1> INFO: Test took 1198ms.
[16:25:19.207] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:19.513] <TB1> INFO: Expecting 2560 events.
[16:25:20.397] <TB1> INFO: 2560 events read in total (292ms).
[16:25:20.397] <TB1> INFO: Test took 1190ms.
[16:25:20.400] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:20.704] <TB1> INFO: Expecting 2560 events.
[16:25:21.595] <TB1> INFO: 2560 events read in total (299ms).
[16:25:21.595] <TB1> INFO: Test took 1195ms.
[16:25:21.598] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:21.905] <TB1> INFO: Expecting 2560 events.
[16:25:22.789] <TB1> INFO: 2560 events read in total (293ms).
[16:25:22.790] <TB1> INFO: Test took 1192ms.
[16:25:22.793] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:23.097] <TB1> INFO: Expecting 2560 events.
[16:25:23.982] <TB1> INFO: 2560 events read in total (293ms).
[16:25:23.983] <TB1> INFO: Test took 1190ms.
[16:25:23.986] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:24.290] <TB1> INFO: Expecting 2560 events.
[16:25:25.181] <TB1> INFO: 2560 events read in total (300ms).
[16:25:25.182] <TB1> INFO: Test took 1197ms.
[16:25:25.183] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:25.491] <TB1> INFO: Expecting 2560 events.
[16:25:26.379] <TB1> INFO: 2560 events read in total (296ms).
[16:25:26.380] <TB1> INFO: Test took 1197ms.
[16:25:26.383] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:26.688] <TB1> INFO: Expecting 2560 events.
[16:25:27.568] <TB1> INFO: 2560 events read in total (288ms).
[16:25:27.568] <TB1> INFO: Test took 1186ms.
[16:25:27.571] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:27.878] <TB1> INFO: Expecting 2560 events.
[16:25:28.767] <TB1> INFO: 2560 events read in total (297ms).
[16:25:28.768] <TB1> INFO: Test took 1197ms.
[16:25:28.771] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:29.076] <TB1> INFO: Expecting 2560 events.
[16:25:29.966] <TB1> INFO: 2560 events read in total (298ms).
[16:25:29.966] <TB1> INFO: Test took 1196ms.
[16:25:29.969] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:30.274] <TB1> INFO: Expecting 2560 events.
[16:25:31.155] <TB1> INFO: 2560 events read in total (290ms).
[16:25:31.155] <TB1> INFO: Test took 1186ms.
[16:25:31.157] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:31.464] <TB1> INFO: Expecting 2560 events.
[16:25:32.347] <TB1> INFO: 2560 events read in total (291ms).
[16:25:32.347] <TB1> INFO: Test took 1190ms.
[16:25:32.351] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:32.655] <TB1> INFO: Expecting 2560 events.
[16:25:33.535] <TB1> INFO: 2560 events read in total (288ms).
[16:25:33.536] <TB1> INFO: Test took 1185ms.
[16:25:33.539] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:33.844] <TB1> INFO: Expecting 2560 events.
[16:25:34.731] <TB1> INFO: 2560 events read in total (295ms).
[16:25:34.732] <TB1> INFO: Test took 1193ms.
[16:25:34.735] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:35.040] <TB1> INFO: Expecting 2560 events.
[16:25:35.931] <TB1> INFO: 2560 events read in total (299ms).
[16:25:35.932] <TB1> INFO: Test took 1197ms.
[16:25:35.935] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:36.241] <TB1> INFO: Expecting 2560 events.
[16:25:37.132] <TB1> INFO: 2560 events read in total (299ms).
[16:25:37.133] <TB1> INFO: Test took 1198ms.
[16:25:37.136] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:37.441] <TB1> INFO: Expecting 2560 events.
[16:25:38.323] <TB1> INFO: 2560 events read in total (291ms).
[16:25:38.323] <TB1> INFO: Test took 1188ms.
[16:25:38.327] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:38.630] <TB1> INFO: Expecting 2560 events.
[16:25:39.518] <TB1> INFO: 2560 events read in total (296ms).
[16:25:39.518] <TB1> INFO: Test took 1191ms.
[16:25:39.520] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:39.827] <TB1> INFO: Expecting 2560 events.
[16:25:40.720] <TB1> INFO: 2560 events read in total (301ms).
[16:25:40.720] <TB1> INFO: Test took 1200ms.
[16:25:40.722] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:41.029] <TB1> INFO: Expecting 2560 events.
[16:25:41.922] <TB1> INFO: 2560 events read in total (301ms).
[16:25:41.923] <TB1> INFO: Test took 1201ms.
[16:25:41.925] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:42.231] <TB1> INFO: Expecting 2560 events.
[16:25:43.113] <TB1> INFO: 2560 events read in total (291ms).
[16:25:43.113] <TB1> INFO: Test took 1189ms.
[16:25:43.117] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:43.421] <TB1> INFO: Expecting 2560 events.
[16:25:44.303] <TB1> INFO: 2560 events read in total (290ms).
[16:25:44.303] <TB1> INFO: Test took 1186ms.
[16:25:44.306] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:44.613] <TB1> INFO: Expecting 2560 events.
[16:25:45.501] <TB1> INFO: 2560 events read in total (296ms).
[16:25:45.501] <TB1> INFO: Test took 1195ms.
[16:25:45.503] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:45.810] <TB1> INFO: Expecting 2560 events.
[16:25:46.696] <TB1> INFO: 2560 events read in total (294ms).
[16:25:46.696] <TB1> INFO: Test took 1193ms.
[16:25:46.700] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:47.005] <TB1> INFO: Expecting 2560 events.
[16:25:47.898] <TB1> INFO: 2560 events read in total (301ms).
[16:25:47.898] <TB1> INFO: Test took 1198ms.
[16:25:47.901] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:48.206] <TB1> INFO: Expecting 2560 events.
[16:25:49.094] <TB1> INFO: 2560 events read in total (296ms).
[16:25:49.094] <TB1> INFO: Test took 1193ms.
[16:25:49.099] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:49.401] <TB1> INFO: Expecting 2560 events.
[16:25:50.295] <TB1> INFO: 2560 events read in total (302ms).
[16:25:50.295] <TB1> INFO: Test took 1197ms.
[16:25:50.299] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:50.603] <TB1> INFO: Expecting 2560 events.
[16:25:51.496] <TB1> INFO: 2560 events read in total (302ms).
[16:25:51.497] <TB1> INFO: Test took 1198ms.
[16:25:51.500] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:51.805] <TB1> INFO: Expecting 2560 events.
[16:25:52.696] <TB1> INFO: 2560 events read in total (300ms).
[16:25:52.696] <TB1> INFO: Test took 1197ms.
[16:25:52.700] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:25:53.004] <TB1> INFO: Expecting 2560 events.
[16:25:53.891] <TB1> INFO: 2560 events read in total (296ms).
[16:25:53.891] <TB1> INFO: Test took 1192ms.
[16:25:54.360] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 656 seconds
[16:25:54.360] <TB1> INFO: PH scale (per ROC): 44 48 48 60 67 64 57 59 37 69 50 50 42 55 53 52
[16:25:54.360] <TB1> INFO: PH offset (per ROC): 110 111 96 119 134 122 112 137 102 126 99 108 97 116 105 101
[16:25:54.367] <TB1> INFO: Decoding statistics:
[16:25:54.367] <TB1> INFO: General information:
[16:25:54.367] <TB1> INFO: 16bit words read: 127886
[16:25:54.368] <TB1> INFO: valid events total: 20480
[16:25:54.368] <TB1> INFO: empty events: 17977
[16:25:54.368] <TB1> INFO: valid events with pixels: 2503
[16:25:54.368] <TB1> INFO: valid pixel hits: 2503
[16:25:54.368] <TB1> INFO: Event errors: 0
[16:25:54.368] <TB1> INFO: start marker: 0
[16:25:54.368] <TB1> INFO: stop marker: 0
[16:25:54.368] <TB1> INFO: overflow: 0
[16:25:54.368] <TB1> INFO: invalid 5bit words: 0
[16:25:54.368] <TB1> INFO: invalid XOR eye diagram: 0
[16:25:54.368] <TB1> INFO: frame (failed synchr.): 0
[16:25:54.368] <TB1> INFO: idle data (no TBM trl): 0
[16:25:54.368] <TB1> INFO: no data (only TBM hdr): 0
[16:25:54.368] <TB1> INFO: TBM errors: 0
[16:25:54.368] <TB1> INFO: flawed TBM headers: 0
[16:25:54.368] <TB1> INFO: flawed TBM trailers: 0
[16:25:54.368] <TB1> INFO: event ID mismatches: 0
[16:25:54.368] <TB1> INFO: ROC errors: 0
[16:25:54.368] <TB1> INFO: missing ROC header(s): 0
[16:25:54.368] <TB1> INFO: misplaced readback start: 0
[16:25:54.368] <TB1> INFO: Pixel decoding errors: 0
[16:25:54.368] <TB1> INFO: pixel data incomplete: 0
[16:25:54.368] <TB1> INFO: pixel address: 0
[16:25:54.368] <TB1> INFO: pulse height fill bit: 0
[16:25:54.368] <TB1> INFO: buffer corruption: 0
[16:25:54.528] <TB1> INFO: ######################################################################
[16:25:54.528] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[16:25:54.528] <TB1> INFO: ######################################################################
[16:25:54.547] <TB1> INFO: scanning low vcal = 10
[16:25:54.784] <TB1> INFO: Expecting 41600 events.
[16:25:58.393] <TB1> INFO: 41600 events read in total (3018ms).
[16:25:58.393] <TB1> INFO: Test took 3846ms.
[16:25:58.394] <TB1> INFO: scanning low vcal = 20
[16:25:58.690] <TB1> INFO: Expecting 41600 events.
[16:26:02.262] <TB1> INFO: 41600 events read in total (2980ms).
[16:26:02.263] <TB1> INFO: Test took 3868ms.
[16:26:02.265] <TB1> INFO: scanning low vcal = 30
[16:26:02.558] <TB1> INFO: Expecting 41600 events.
[16:26:06.220] <TB1> INFO: 41600 events read in total (3070ms).
[16:26:06.221] <TB1> INFO: Test took 3956ms.
[16:26:06.224] <TB1> INFO: scanning low vcal = 40
[16:26:06.505] <TB1> INFO: Expecting 41600 events.
[16:26:10.456] <TB1> INFO: 41600 events read in total (3360ms).
[16:26:10.457] <TB1> INFO: Test took 4233ms.
[16:26:10.460] <TB1> INFO: scanning low vcal = 50
[16:26:10.737] <TB1> INFO: Expecting 41600 events.
[16:26:14.745] <TB1> INFO: 41600 events read in total (3416ms).
[16:26:14.746] <TB1> INFO: Test took 4286ms.
[16:26:14.748] <TB1> INFO: scanning low vcal = 60
[16:26:15.026] <TB1> INFO: Expecting 41600 events.
[16:26:19.049] <TB1> INFO: 41600 events read in total (3431ms).
[16:26:19.050] <TB1> INFO: Test took 4301ms.
[16:26:19.052] <TB1> INFO: scanning low vcal = 70
[16:26:19.330] <TB1> INFO: Expecting 41600 events.
[16:26:23.337] <TB1> INFO: 41600 events read in total (3415ms).
[16:26:23.337] <TB1> INFO: Test took 4284ms.
[16:26:23.340] <TB1> INFO: scanning low vcal = 80
[16:26:23.618] <TB1> INFO: Expecting 41600 events.
[16:26:27.651] <TB1> INFO: 41600 events read in total (3441ms).
[16:26:27.652] <TB1> INFO: Test took 4312ms.
[16:26:27.655] <TB1> INFO: scanning low vcal = 90
[16:26:27.932] <TB1> INFO: Expecting 41600 events.
[16:26:31.931] <TB1> INFO: 41600 events read in total (3407ms).
[16:26:31.931] <TB1> INFO: Test took 4276ms.
[16:26:31.935] <TB1> INFO: scanning low vcal = 100
[16:26:32.212] <TB1> INFO: Expecting 41600 events.
[16:26:36.276] <TB1> INFO: 41600 events read in total (3472ms).
[16:26:36.277] <TB1> INFO: Test took 4341ms.
[16:26:36.280] <TB1> INFO: scanning low vcal = 110
[16:26:36.558] <TB1> INFO: Expecting 41600 events.
[16:26:40.567] <TB1> INFO: 41600 events read in total (3418ms).
[16:26:40.567] <TB1> INFO: Test took 4287ms.
[16:26:40.570] <TB1> INFO: scanning low vcal = 120
[16:26:40.848] <TB1> INFO: Expecting 41600 events.
[16:26:44.870] <TB1> INFO: 41600 events read in total (3430ms).
[16:26:44.871] <TB1> INFO: Test took 4300ms.
[16:26:44.874] <TB1> INFO: scanning low vcal = 130
[16:26:45.151] <TB1> INFO: Expecting 41600 events.
[16:26:49.168] <TB1> INFO: 41600 events read in total (3425ms).
[16:26:49.169] <TB1> INFO: Test took 4295ms.
[16:26:49.172] <TB1> INFO: scanning low vcal = 140
[16:26:49.450] <TB1> INFO: Expecting 41600 events.
[16:26:53.512] <TB1> INFO: 41600 events read in total (3470ms).
[16:26:53.513] <TB1> INFO: Test took 4341ms.
[16:26:53.516] <TB1> INFO: scanning low vcal = 150
[16:26:53.798] <TB1> INFO: Expecting 41600 events.
[16:26:57.755] <TB1> INFO: 41600 events read in total (3365ms).
[16:26:57.756] <TB1> INFO: Test took 4240ms.
[16:26:57.759] <TB1> INFO: scanning low vcal = 160
[16:26:58.036] <TB1> INFO: Expecting 41600 events.
[16:27:02.012] <TB1> INFO: 41600 events read in total (3385ms).
[16:27:02.013] <TB1> INFO: Test took 4254ms.
[16:27:02.016] <TB1> INFO: scanning low vcal = 170
[16:27:02.292] <TB1> INFO: Expecting 41600 events.
[16:27:06.228] <TB1> INFO: 41600 events read in total (3344ms).
[16:27:06.229] <TB1> INFO: Test took 4213ms.
[16:27:06.234] <TB1> INFO: scanning low vcal = 180
[16:27:06.508] <TB1> INFO: Expecting 41600 events.
[16:27:10.470] <TB1> INFO: 41600 events read in total (3370ms).
[16:27:10.471] <TB1> INFO: Test took 4236ms.
[16:27:10.474] <TB1> INFO: scanning low vcal = 190
[16:27:10.750] <TB1> INFO: Expecting 41600 events.
[16:27:14.693] <TB1> INFO: 41600 events read in total (3351ms).
[16:27:14.694] <TB1> INFO: Test took 4220ms.
[16:27:14.697] <TB1> INFO: scanning low vcal = 200
[16:27:14.974] <TB1> INFO: Expecting 41600 events.
[16:27:18.930] <TB1> INFO: 41600 events read in total (3365ms).
[16:27:18.931] <TB1> INFO: Test took 4234ms.
[16:27:18.934] <TB1> INFO: scanning low vcal = 210
[16:27:19.210] <TB1> INFO: Expecting 41600 events.
[16:27:23.179] <TB1> INFO: 41600 events read in total (3377ms).
[16:27:23.179] <TB1> INFO: Test took 4245ms.
[16:27:23.182] <TB1> INFO: scanning low vcal = 220
[16:27:23.459] <TB1> INFO: Expecting 41600 events.
[16:27:27.422] <TB1> INFO: 41600 events read in total (3372ms).
[16:27:27.423] <TB1> INFO: Test took 4241ms.
[16:27:27.426] <TB1> INFO: scanning low vcal = 230
[16:27:27.702] <TB1> INFO: Expecting 41600 events.
[16:27:31.671] <TB1> INFO: 41600 events read in total (3377ms).
[16:27:31.673] <TB1> INFO: Test took 4247ms.
[16:27:31.677] <TB1> INFO: scanning low vcal = 240
[16:27:31.952] <TB1> INFO: Expecting 41600 events.
[16:27:35.918] <TB1> INFO: 41600 events read in total (3374ms).
[16:27:35.919] <TB1> INFO: Test took 4242ms.
[16:27:35.922] <TB1> INFO: scanning low vcal = 250
[16:27:36.198] <TB1> INFO: Expecting 41600 events.
[16:27:40.211] <TB1> INFO: 41600 events read in total (3421ms).
[16:27:40.212] <TB1> INFO: Test took 4290ms.
[16:27:40.216] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[16:27:40.511] <TB1> INFO: Expecting 41600 events.
[16:27:44.513] <TB1> INFO: 41600 events read in total (3410ms).
[16:27:44.514] <TB1> INFO: Test took 4298ms.
[16:27:44.517] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[16:27:44.793] <TB1> INFO: Expecting 41600 events.
[16:27:48.751] <TB1> INFO: 41600 events read in total (3366ms).
[16:27:48.752] <TB1> INFO: Test took 4234ms.
[16:27:48.755] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[16:27:49.032] <TB1> INFO: Expecting 41600 events.
[16:27:52.998] <TB1> INFO: 41600 events read in total (3375ms).
[16:27:52.999] <TB1> INFO: Test took 4244ms.
[16:27:52.003] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[16:27:53.279] <TB1> INFO: Expecting 41600 events.
[16:27:57.315] <TB1> INFO: 41600 events read in total (3445ms).
[16:27:57.316] <TB1> INFO: Test took 4313ms.
[16:27:57.318] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[16:27:57.595] <TB1> INFO: Expecting 41600 events.
[16:28:01.574] <TB1> INFO: 41600 events read in total (3387ms).
[16:28:01.575] <TB1> INFO: Test took 4256ms.
[16:28:01.990] <TB1> INFO: PixTestGainPedestal::measure() done
[16:28:33.406] <TB1> INFO: PixTestGainPedestal::fit() done
[16:28:33.406] <TB1> INFO: non-linearity mean: 0.916 0.961 0.944 0.980 0.983 0.986 0.981 0.971 0.893 0.979 0.920 0.937 0.949 0.926 0.945 0.962
[16:28:33.406] <TB1> INFO: non-linearity RMS: 0.120 0.032 0.053 0.003 0.004 0.002 0.004 0.006 0.198 0.004 0.094 0.066 0.184 0.076 0.050 0.026
[16:28:33.406] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[16:28:33.420] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[16:28:33.434] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[16:28:33.448] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[16:28:33.461] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[16:28:33.475] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[16:28:33.489] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[16:28:33.503] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[16:28:33.516] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[16:28:33.530] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[16:28:33.544] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[16:28:33.557] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[16:28:33.570] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[16:28:33.584] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[16:28:33.597] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[16:28:33.610] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1016_FullQualification_2016-10-19_14h13m_1476879208//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[16:28:33.624] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 159 seconds
[16:28:33.624] <TB1> INFO: Decoding statistics:
[16:28:33.624] <TB1> INFO: General information:
[16:28:33.624] <TB1> INFO: 16bit words read: 3327924
[16:28:33.624] <TB1> INFO: valid events total: 332800
[16:28:33.624] <TB1> INFO: empty events: 0
[16:28:33.624] <TB1> INFO: valid events with pixels: 332800
[16:28:33.624] <TB1> INFO: valid pixel hits: 665562
[16:28:33.624] <TB1> INFO: Event errors: 0
[16:28:33.624] <TB1> INFO: start marker: 0
[16:28:33.624] <TB1> INFO: stop marker: 0
[16:28:33.624] <TB1> INFO: overflow: 0
[16:28:33.624] <TB1> INFO: invalid 5bit words: 0
[16:28:33.624] <TB1> INFO: invalid XOR eye diagram: 0
[16:28:33.624] <TB1> INFO: frame (failed synchr.): 0
[16:28:33.624] <TB1> INFO: idle data (no TBM trl): 0
[16:28:33.624] <TB1> INFO: no data (only TBM hdr): 0
[16:28:33.624] <TB1> INFO: TBM errors: 0
[16:28:33.624] <TB1> INFO: flawed TBM headers: 0
[16:28:33.624] <TB1> INFO: flawed TBM trailers: 0
[16:28:33.624] <TB1> INFO: event ID mismatches: 0
[16:28:33.624] <TB1> INFO: ROC errors: 0
[16:28:33.624] <TB1> INFO: missing ROC header(s): 0
[16:28:33.624] <TB1> INFO: misplaced readback start: 0
[16:28:33.624] <TB1> INFO: Pixel decoding errors: 0
[16:28:33.624] <TB1> INFO: pixel data incomplete: 0
[16:28:33.624] <TB1> INFO: pixel address: 0
[16:28:33.624] <TB1> INFO: pulse height fill bit: 0
[16:28:33.624] <TB1> INFO: buffer corruption: 0
[16:28:33.639] <TB1> INFO: Decoding statistics:
[16:28:33.639] <TB1> INFO: General information:
[16:28:33.639] <TB1> INFO: 16bit words read: 3457346
[16:28:33.639] <TB1> INFO: valid events total: 353536
[16:28:33.639] <TB1> INFO: empty events: 18233
[16:28:33.639] <TB1> INFO: valid events with pixels: 335303
[16:28:33.639] <TB1> INFO: valid pixel hits: 668065
[16:28:33.639] <TB1> INFO: Event errors: 0
[16:28:33.639] <TB1> INFO: start marker: 0
[16:28:33.639] <TB1> INFO: stop marker: 0
[16:28:33.639] <TB1> INFO: overflow: 0
[16:28:33.639] <TB1> INFO: invalid 5bit words: 0
[16:28:33.639] <TB1> INFO: invalid XOR eye diagram: 0
[16:28:33.639] <TB1> INFO: frame (failed synchr.): 0
[16:28:33.639] <TB1> INFO: idle data (no TBM trl): 0
[16:28:33.639] <TB1> INFO: no data (only TBM hdr): 0
[16:28:33.639] <TB1> INFO: TBM errors: 0
[16:28:33.639] <TB1> INFO: flawed TBM headers: 0
[16:28:33.639] <TB1> INFO: flawed TBM trailers: 0
[16:28:33.639] <TB1> INFO: event ID mismatches: 0
[16:28:33.639] <TB1> INFO: ROC errors: 0
[16:28:33.639] <TB1> INFO: missing ROC header(s): 0
[16:28:33.639] <TB1> INFO: misplaced readback start: 0
[16:28:33.639] <TB1> INFO: Pixel decoding errors: 0
[16:28:33.639] <TB1> INFO: pixel data incomplete: 0
[16:28:33.639] <TB1> INFO: pixel address: 0
[16:28:33.639] <TB1> INFO: pulse height fill bit: 0
[16:28:33.639] <TB1> INFO: buffer corruption: 0
[16:28:33.639] <TB1> INFO: enter test to run
[16:28:33.640] <TB1> INFO: test: exit no parameter change
[16:28:33.744] <TB1> QUIET: Connection to board 154 closed.
[16:28:33.744] <TB1> INFO: pXar: this is the end, my friend