[12:38:40.087] <TB2> INFO: *** Welcome to pxar ***
[12:38:40.087] <TB2> INFO: *** Today: 2016/10/19
[12:38:40.095] <TB2> INFO: *** Version: c8ba-dirty
[12:38:40.095] <TB2> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters_C15.dat
[12:38:40.096] <TB2> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//tbmParameters_C1b.dat
[12:38:40.096] <TB2> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//defaultMaskFile.dat
[12:38:40.096] <TB2> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//trimParameters_C15.dat
[12:38:40.168] <TB2> INFO: clk: 4
[12:38:40.168] <TB2> INFO: ctr: 4
[12:38:40.168] <TB2> INFO: sda: 19
[12:38:40.168] <TB2> INFO: tin: 9
[12:38:40.168] <TB2> INFO: level: 15
[12:38:40.168] <TB2> INFO: triggerdelay: 0
[12:38:40.168] <TB2> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[12:38:40.168] <TB2> INFO: Log level: INFO
[12:38:40.177] <TB2> INFO: Found DTB DTB_WWXUD2
[12:38:40.184] <TB2> QUIET: Connection to board DTB_WWXUD2 opened.
[12:38:40.186] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 149
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWXUD2
MAC address: 40D855118095
Hostname: pixelDTB149
Comment:
------------------------------------------------------
[12:38:40.188] <TB2> INFO: RPC call hashes of host and DTB match: 486171790
[12:38:41.678] <TB2> INFO: DUT info:
[12:38:41.678] <TB2> INFO: The DUT currently contains the following objects:
[12:38:41.678] <TB2> INFO: 4 TBM Cores tbm10c (4 ON)
[12:38:41.678] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:38:41.678] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:38:41.678] <TB2> INFO: TBM Core alpha (2): 7 registers set
[12:38:41.678] <TB2> INFO: TBM Core beta (3): 7 registers set
[12:38:41.678] <TB2> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[12:38:41.678] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:38:41.678] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:38:41.678] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:38:41.678] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:38:41.678] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:38:41.678] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:38:41.678] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:38:41.678] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:38:41.678] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:38:41.679] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:38:41.679] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:38:41.679] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:38:41.679] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:38:41.679] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:38:41.679] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:38:41.679] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:38:42.080] <TB2> INFO: enter 'restricted' command line mode
[12:38:42.080] <TB2> INFO: enter test to run
[12:38:42.080] <TB2> INFO: test: pretest no parameter change
[12:38:42.080] <TB2> INFO: running: pretest
[12:38:42.085] <TB2> INFO: ######################################################################
[12:38:42.085] <TB2> INFO: PixTestPretest::doTest()
[12:38:42.085] <TB2> INFO: ######################################################################
[12:38:42.086] <TB2> INFO: ----------------------------------------------------------------------
[12:38:42.086] <TB2> INFO: PixTestPretest::programROC()
[12:38:42.086] <TB2> INFO: ----------------------------------------------------------------------
[12:39:00.102] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:39:00.102] <TB2> INFO: IA differences per ROC: 22.5 19.3 20.1 17.7 18.5 18.5 19.3 20.1 19.3 19.3 19.3 20.1 18.5 19.3 17.7 20.9
[12:39:00.173] <TB2> INFO: ----------------------------------------------------------------------
[12:39:00.173] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:39:00.173] <TB2> INFO: ----------------------------------------------------------------------
[12:39:07.280] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 387.5 mA = 24.2188 mA/ROC
[12:39:07.280] <TB2> INFO: i(loss) [mA/ROC]: 19.3 19.3 20.1 18.5 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3
[12:39:07.315] <TB2> INFO: ----------------------------------------------------------------------
[12:39:07.315] <TB2> INFO: PixTestPretest::findTiming()
[12:39:07.315] <TB2> INFO: ----------------------------------------------------------------------
[12:39:07.315] <TB2> INFO: PixTestCmd::init()

[12:39:39.723] <TB2> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[12:39:39.723] <TB2> INFO: (success/tries = 100/100), width = 4
[12:39:41.228] <TB2> INFO: ----------------------------------------------------------------------
[12:39:41.228] <TB2> INFO: PixTestPretest::findWorkingPixel()
[12:39:41.228] <TB2> INFO: ----------------------------------------------------------------------
[12:39:41.320] <TB2> INFO: Expecting 231680 events.
[12:39:51.288] <TB2> INFO: 231680 events read in total (9376ms).
[12:39:51.298] <TB2> INFO: Test took 10067ms.
[12:39:51.546] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:39:51.583] <TB2> INFO: ----------------------------------------------------------------------
[12:39:51.583] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[12:39:51.583] <TB2> INFO: ----------------------------------------------------------------------
[12:39:51.678] <TB2> INFO: Expecting 231680 events.
[12:40:01.756] <TB2> INFO: 231680 events read in total (9486ms).
[12:40:01.765] <TB2> INFO: Test took 10176ms.
[12:40:02.033] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[12:40:02.033] <TB2> INFO: CalDel: 92 84 78 87 89 90 97 85 89 83 101 84 83 84 84 74
[12:40:02.033] <TB2> INFO: VthrComp: 51 51 52 51 51 51 51 51 51 51 51 51 53 52 51 51
[12:40:02.037] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters_C0.dat
[12:40:02.037] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters_C1.dat
[12:40:02.037] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters_C2.dat
[12:40:02.037] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters_C3.dat
[12:40:02.037] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters_C4.dat
[12:40:02.038] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters_C5.dat
[12:40:02.038] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters_C6.dat
[12:40:02.038] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters_C7.dat
[12:40:02.038] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters_C8.dat
[12:40:02.038] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters_C9.dat
[12:40:02.039] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters_C10.dat
[12:40:02.039] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters_C11.dat
[12:40:02.039] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters_C12.dat
[12:40:02.039] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters_C13.dat
[12:40:02.039] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters_C14.dat
[12:40:02.039] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters_C15.dat
[12:40:02.040] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//tbmParameters_C0a.dat
[12:40:02.040] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//tbmParameters_C0b.dat
[12:40:02.040] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//tbmParameters_C1a.dat
[12:40:02.040] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//tbmParameters_C1b.dat
[12:40:02.040] <TB2> INFO: PixTestPretest::doTest() done, duration: 79 seconds
[12:40:02.096] <TB2> INFO: enter test to run
[12:40:02.096] <TB2> INFO: test: FullTest no parameter change
[12:40:02.096] <TB2> INFO: running: fulltest
[12:40:02.096] <TB2> INFO: ######################################################################
[12:40:02.096] <TB2> INFO: PixTestFullTest::doTest()
[12:40:02.096] <TB2> INFO: ######################################################################
[12:40:02.097] <TB2> INFO: ######################################################################
[12:40:02.097] <TB2> INFO: PixTestAlive::doTest()
[12:40:02.097] <TB2> INFO: ######################################################################
[12:40:02.098] <TB2> INFO: ----------------------------------------------------------------------
[12:40:02.098] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:40:02.098] <TB2> INFO: ----------------------------------------------------------------------
[12:40:02.336] <TB2> INFO: Expecting 41600 events.
[12:40:05.851] <TB2> INFO: 41600 events read in total (2923ms).
[12:40:05.851] <TB2> INFO: Test took 3751ms.
[12:40:06.084] <TB2> INFO: PixTestAlive::aliveTest() done
[12:40:06.084] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0
[12:40:06.085] <TB2> INFO: ----------------------------------------------------------------------
[12:40:06.086] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:40:06.086] <TB2> INFO: ----------------------------------------------------------------------
[12:40:06.328] <TB2> INFO: Expecting 41600 events.
[12:40:09.298] <TB2> INFO: 41600 events read in total (2378ms).
[12:40:09.298] <TB2> INFO: Test took 3210ms.
[12:40:09.298] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:40:09.536] <TB2> INFO: PixTestAlive::maskTest() done
[12:40:09.536] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:40:09.537] <TB2> INFO: ----------------------------------------------------------------------
[12:40:09.537] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:40:09.537] <TB2> INFO: ----------------------------------------------------------------------
[12:40:09.774] <TB2> INFO: Expecting 41600 events.
[12:40:13.276] <TB2> INFO: 41600 events read in total (2910ms).
[12:40:13.276] <TB2> INFO: Test took 3737ms.
[12:40:13.511] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[12:40:13.511] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:40:13.511] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[12:40:13.511] <TB2> INFO: Decoding statistics:
[12:40:13.511] <TB2> INFO: General information:
[12:40:13.511] <TB2> INFO: 16bit words read: 0
[12:40:13.511] <TB2> INFO: valid events total: 0
[12:40:13.511] <TB2> INFO: empty events: 0
[12:40:13.511] <TB2> INFO: valid events with pixels: 0
[12:40:13.511] <TB2> INFO: valid pixel hits: 0
[12:40:13.511] <TB2> INFO: Event errors: 0
[12:40:13.511] <TB2> INFO: start marker: 0
[12:40:13.511] <TB2> INFO: stop marker: 0
[12:40:13.511] <TB2> INFO: overflow: 0
[12:40:13.511] <TB2> INFO: invalid 5bit words: 0
[12:40:13.511] <TB2> INFO: invalid XOR eye diagram: 0
[12:40:13.511] <TB2> INFO: frame (failed synchr.): 0
[12:40:13.511] <TB2> INFO: idle data (no TBM trl): 0
[12:40:13.511] <TB2> INFO: no data (only TBM hdr): 0
[12:40:13.512] <TB2> INFO: TBM errors: 0
[12:40:13.512] <TB2> INFO: flawed TBM headers: 0
[12:40:13.512] <TB2> INFO: flawed TBM trailers: 0
[12:40:13.512] <TB2> INFO: event ID mismatches: 0
[12:40:13.512] <TB2> INFO: ROC errors: 0
[12:40:13.512] <TB2> INFO: missing ROC header(s): 0
[12:40:13.512] <TB2> INFO: misplaced readback start: 0
[12:40:13.512] <TB2> INFO: Pixel decoding errors: 0
[12:40:13.512] <TB2> INFO: pixel data incomplete: 0
[12:40:13.512] <TB2> INFO: pixel address: 0
[12:40:13.512] <TB2> INFO: pulse height fill bit: 0
[12:40:13.512] <TB2> INFO: buffer corruption: 0
[12:40:13.516] <TB2> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C15.dat
[12:40:13.516] <TB2> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//phCalibrationFitErr_C15.dat

[12:40:13.516] <TB2> INFO: ######################################################################
[12:40:13.516] <TB2> INFO: PixTestReadback::doTest()
[12:40:13.516] <TB2> INFO: ######################################################################
[12:40:13.516] <TB2> INFO: ----------------------------------------------------------------------
[12:40:13.516] <TB2> INFO: PixTestReadback::CalibrateVd()
[12:40:13.516] <TB2> INFO: ----------------------------------------------------------------------
[12:40:23.489] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C0.dat
[12:40:23.489] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C1.dat
[12:40:23.489] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C2.dat
[12:40:23.489] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C3.dat
[12:40:23.489] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C4.dat
[12:40:23.490] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C5.dat
[12:40:23.490] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C6.dat
[12:40:23.490] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C7.dat
[12:40:23.490] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C8.dat
[12:40:23.490] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C9.dat
[12:40:23.490] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C10.dat
[12:40:23.490] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C11.dat
[12:40:23.490] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C12.dat
[12:40:23.490] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C13.dat
[12:40:23.490] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C14.dat
[12:40:23.491] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C15.dat
[12:40:23.520] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[12:40:23.520] <TB2> INFO: ----------------------------------------------------------------------
[12:40:23.520] <TB2> INFO: PixTestReadback::CalibrateVa()
[12:40:23.520] <TB2> INFO: ----------------------------------------------------------------------
[12:40:33.442] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C0.dat
[12:40:33.442] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C1.dat
[12:40:33.442] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C2.dat
[12:40:33.442] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C3.dat
[12:40:33.442] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C4.dat
[12:40:33.442] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C5.dat
[12:40:33.442] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C6.dat
[12:40:33.442] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C7.dat
[12:40:33.442] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C8.dat
[12:40:33.442] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C9.dat
[12:40:33.442] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C10.dat
[12:40:33.442] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C11.dat
[12:40:33.442] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C12.dat
[12:40:33.443] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C13.dat
[12:40:33.443] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C14.dat
[12:40:33.443] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C15.dat
[12:40:33.470] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[12:40:33.471] <TB2> INFO: ----------------------------------------------------------------------
[12:40:33.471] <TB2> INFO: PixTestReadback::readbackVbg()
[12:40:33.471] <TB2> INFO: ----------------------------------------------------------------------
[12:40:41.140] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[12:40:41.140] <TB2> INFO: ----------------------------------------------------------------------
[12:40:41.140] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[12:40:41.140] <TB2> INFO: ----------------------------------------------------------------------
[12:40:41.140] <TB2> INFO: Vbg will be calibrated using Vd calibration
[12:40:41.140] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 152.1calibrated Vbg = 1.19822 :::*/*/*/*/
[12:40:41.140] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 153.6calibrated Vbg = 1.19983 :::*/*/*/*/
[12:40:41.140] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 155.1calibrated Vbg = 1.18957 :::*/*/*/*/
[12:40:41.140] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 151.5calibrated Vbg = 1.19318 :::*/*/*/*/
[12:40:41.140] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 156.1calibrated Vbg = 1.19203 :::*/*/*/*/
[12:40:41.140] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 159.8calibrated Vbg = 1.19796 :::*/*/*/*/
[12:40:41.140] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 152.1calibrated Vbg = 1.20262 :::*/*/*/*/
[12:40:41.140] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 152.7calibrated Vbg = 1.19926 :::*/*/*/*/
[12:40:41.140] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 151.7calibrated Vbg = 1.19852 :::*/*/*/*/
[12:40:41.140] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 159calibrated Vbg = 1.19035 :::*/*/*/*/
[12:40:41.140] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 156.5calibrated Vbg = 1.19573 :::*/*/*/*/
[12:40:41.140] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 152.6calibrated Vbg = 1.18506 :::*/*/*/*/
[12:40:41.140] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 149.4calibrated Vbg = 1.19055 :::*/*/*/*/
[12:40:41.140] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 157.2calibrated Vbg = 1.19303 :::*/*/*/*/
[12:40:41.140] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 152.8calibrated Vbg = 1.19921 :::*/*/*/*/
[12:40:41.140] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 152.7calibrated Vbg = 1.19794 :::*/*/*/*/
[12:40:41.143] <TB2> INFO: ----------------------------------------------------------------------
[12:40:41.143] <TB2> INFO: PixTestReadback::CalibrateIa()
[12:40:41.143] <TB2> INFO: ----------------------------------------------------------------------
[12:43:21.973] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C0.dat
[12:43:21.973] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C1.dat
[12:43:21.973] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C2.dat
[12:43:21.973] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C3.dat
[12:43:21.973] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C4.dat
[12:43:21.973] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C5.dat
[12:43:21.973] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C6.dat
[12:43:21.973] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C7.dat
[12:43:21.973] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C8.dat
[12:43:21.974] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C9.dat
[12:43:21.974] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C10.dat
[12:43:21.974] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C11.dat
[12:43:21.974] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C12.dat
[12:43:21.974] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C13.dat
[12:43:21.974] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C14.dat
[12:43:21.974] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//readbackCal_C15.dat
[12:43:21.002] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[12:43:22.003] <TB2> INFO: PixTestReadback::doTest() done
[12:43:22.004] <TB2> INFO: Decoding statistics:
[12:43:22.004] <TB2> INFO: General information:
[12:43:22.004] <TB2> INFO: 16bit words read: 1536
[12:43:22.004] <TB2> INFO: valid events total: 256
[12:43:22.004] <TB2> INFO: empty events: 256
[12:43:22.004] <TB2> INFO: valid events with pixels: 0
[12:43:22.004] <TB2> INFO: valid pixel hits: 0
[12:43:22.004] <TB2> INFO: Event errors: 0
[12:43:22.004] <TB2> INFO: start marker: 0
[12:43:22.004] <TB2> INFO: stop marker: 0
[12:43:22.004] <TB2> INFO: overflow: 0
[12:43:22.004] <TB2> INFO: invalid 5bit words: 0
[12:43:22.004] <TB2> INFO: invalid XOR eye diagram: 0
[12:43:22.004] <TB2> INFO: frame (failed synchr.): 0
[12:43:22.004] <TB2> INFO: idle data (no TBM trl): 0
[12:43:22.004] <TB2> INFO: no data (only TBM hdr): 0
[12:43:22.004] <TB2> INFO: TBM errors: 0
[12:43:22.004] <TB2> INFO: flawed TBM headers: 0
[12:43:22.004] <TB2> INFO: flawed TBM trailers: 0
[12:43:22.004] <TB2> INFO: event ID mismatches: 0
[12:43:22.004] <TB2> INFO: ROC errors: 0
[12:43:22.004] <TB2> INFO: missing ROC header(s): 0
[12:43:22.004] <TB2> INFO: misplaced readback start: 0
[12:43:22.004] <TB2> INFO: Pixel decoding errors: 0
[12:43:22.004] <TB2> INFO: pixel data incomplete: 0
[12:43:22.004] <TB2> INFO: pixel address: 0
[12:43:22.004] <TB2> INFO: pulse height fill bit: 0
[12:43:22.004] <TB2> INFO: buffer corruption: 0
[12:43:22.051] <TB2> INFO: ######################################################################
[12:43:22.051] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:43:22.052] <TB2> INFO: ######################################################################
[12:43:22.054] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[12:43:22.067] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[12:43:22.067] <TB2> INFO: run 1 of 1
[12:43:22.303] <TB2> INFO: Expecting 3120000 events.
[12:43:53.698] <TB2> INFO: 675550 events read in total (30803ms).
[12:44:24.032] <TB2> INFO: 1345490 events read in total (61137ms).












[12:44:54.263] <TB2> INFO: 2010710 events read in total (91368ms).





















[12:45:24.165] <TB2> INFO: 2672665 events read in total (121270ms).





















[12:45:44.617] <TB2> INFO: 3120000 events read in total (141722ms).
[12:45:44.687] <TB2> INFO: Test took 142621ms.
[12:46:08.225] <TB2> INFO: PixTestBBMap::doTest() done with 1 decoding errors: , duration: 166 seconds
[12:46:08.225] <TB2> INFO: number of dead bumps (per ROC): 0 3 0 0 2 0 0 0 0 0 0 0 4 23 0 0
[12:46:08.226] <TB2> INFO: separation cut (per ROC): 106 104 112 111 106 106 112 118 103 101 107 109 118 104 104 104
[12:46:08.226] <TB2> INFO: Decoding statistics:
[12:46:08.226] <TB2> INFO: General information:
[12:46:08.226] <TB2> INFO: 16bit words read: 0
[12:46:08.226] <TB2> INFO: valid events total: 0
[12:46:08.226] <TB2> INFO: empty events: 0
[12:46:08.226] <TB2> INFO: valid events with pixels: 0
[12:46:08.226] <TB2> INFO: valid pixel hits: 0
[12:46:08.226] <TB2> INFO: Event errors: 0
[12:46:08.226] <TB2> INFO: start marker: 0
[12:46:08.226] <TB2> INFO: stop marker: 0
[12:46:08.226] <TB2> INFO: overflow: 0
[12:46:08.226] <TB2> INFO: invalid 5bit words: 0
[12:46:08.226] <TB2> INFO: invalid XOR eye diagram: 0
[12:46:08.226] <TB2> INFO: frame (failed synchr.): 0
[12:46:08.226] <TB2> INFO: idle data (no TBM trl): 0
[12:46:08.226] <TB2> INFO: no data (only TBM hdr): 0
[12:46:08.226] <TB2> INFO: TBM errors: 0
[12:46:08.226] <TB2> INFO: flawed TBM headers: 0
[12:46:08.226] <TB2> INFO: flawed TBM trailers: 0
[12:46:08.226] <TB2> INFO: event ID mismatches: 0
[12:46:08.226] <TB2> INFO: ROC errors: 0
[12:46:08.226] <TB2> INFO: missing ROC header(s): 0
[12:46:08.226] <TB2> INFO: misplaced readback start: 0
[12:46:08.226] <TB2> INFO: Pixel decoding errors: 0
[12:46:08.226] <TB2> INFO: pixel data incomplete: 0
[12:46:08.226] <TB2> INFO: pixel address: 0
[12:46:08.226] <TB2> INFO: pulse height fill bit: 0
[12:46:08.226] <TB2> INFO: buffer corruption: 0
[12:46:08.271] <TB2> INFO: ######################################################################
[12:46:08.272] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:46:08.272] <TB2> INFO: ######################################################################
[12:46:08.272] <TB2> INFO: ----------------------------------------------------------------------
[12:46:08.272] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:46:08.272] <TB2> INFO: ----------------------------------------------------------------------
[12:46:08.272] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[12:46:08.286] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[12:46:08.286] <TB2> INFO: run 1 of 1
[12:46:08.558] <TB2> INFO: Expecting 36608000 events.
[12:46:32.434] <TB2> INFO: 692250 events read in total (23285ms).
[12:46:55.600] <TB2> INFO: 1369850 events read in total (46451ms).
[12:47:19.078] <TB2> INFO: 2046750 events read in total (69929ms).
[12:47:42.418] <TB2> INFO: 2721050 events read in total (93269ms).
[12:48:05.950] <TB2> INFO: 3394850 events read in total (116801ms).
[12:48:28.982] <TB2> INFO: 4069100 events read in total (139833ms).
[12:48:52.577] <TB2> INFO: 4740450 events read in total (163428ms).
[12:49:15.654] <TB2> INFO: 5410750 events read in total (186505ms).
[12:49:38.931] <TB2> INFO: 6083550 events read in total (209782ms).
[12:50:02.119] <TB2> INFO: 6755850 events read in total (232970ms).
[12:50:25.477] <TB2> INFO: 7428100 events read in total (256328ms).
[12:50:49.150] <TB2> INFO: 8102700 events read in total (280001ms).
[12:51:12.389] <TB2> INFO: 8775150 events read in total (303240ms).
[12:51:35.589] <TB2> INFO: 9447850 events read in total (326440ms).
[12:51:58.651] <TB2> INFO: 10118500 events read in total (349502ms).
[12:52:21.807] <TB2> INFO: 10789150 events read in total (372658ms).
[12:52:45.171] <TB2> INFO: 11460350 events read in total (396022ms).
[12:53:08.380] <TB2> INFO: 12132100 events read in total (419231ms).
[12:53:31.667] <TB2> INFO: 12803450 events read in total (442518ms).
[12:53:54.938] <TB2> INFO: 13474350 events read in total (465789ms).
[12:54:18.165] <TB2> INFO: 14145050 events read in total (489016ms).
[12:54:41.690] <TB2> INFO: 14815600 events read in total (512541ms).
[12:55:05.045] <TB2> INFO: 15485500 events read in total (535896ms).
[12:55:28.064] <TB2> INFO: 16155050 events read in total (558915ms).
[12:55:51.220] <TB2> INFO: 16824750 events read in total (582071ms).
[12:56:14.599] <TB2> INFO: 17493850 events read in total (605450ms).
[12:56:38.004] <TB2> INFO: 18161800 events read in total (628855ms).
[12:57:00.943] <TB2> INFO: 18829400 events read in total (651794ms).
[12:57:24.104] <TB2> INFO: 19495750 events read in total (674955ms).
[12:57:46.998] <TB2> INFO: 20163450 events read in total (697849ms).
[12:58:09.905] <TB2> INFO: 20830250 events read in total (720756ms).
[12:58:32.900] <TB2> INFO: 21497750 events read in total (743751ms).
[12:58:55.919] <TB2> INFO: 22164850 events read in total (766770ms).
[12:59:18.949] <TB2> INFO: 22830550 events read in total (789800ms).
[12:59:42.213] <TB2> INFO: 23493550 events read in total (813064ms).
[13:00:05.321] <TB2> INFO: 24157700 events read in total (836172ms).
[13:00:28.284] <TB2> INFO: 24823100 events read in total (859135ms).
[13:00:51.641] <TB2> INFO: 25489400 events read in total (882492ms).
[13:01:15.069] <TB2> INFO: 26153100 events read in total (905920ms).
[13:01:37.857] <TB2> INFO: 26818250 events read in total (928708ms).
[13:02:01.120] <TB2> INFO: 27482000 events read in total (951971ms).
[13:02:24.284] <TB2> INFO: 28146900 events read in total (975135ms).
[13:02:47.060] <TB2> INFO: 28809200 events read in total (997911ms).
[13:03:09.922] <TB2> INFO: 29472150 events read in total (1020773ms).
[13:03:32.846] <TB2> INFO: 30135750 events read in total (1043697ms).
[13:03:55.854] <TB2> INFO: 30797850 events read in total (1066705ms).
[13:04:18.914] <TB2> INFO: 31460250 events read in total (1089765ms).
[13:04:41.736] <TB2> INFO: 32123950 events read in total (1112587ms).
[13:05:05.214] <TB2> INFO: 32788200 events read in total (1136065ms).
[13:05:27.984] <TB2> INFO: 33453750 events read in total (1158835ms).
[13:05:50.707] <TB2> INFO: 34118650 events read in total (1181558ms).
[13:06:13.708] <TB2> INFO: 34784000 events read in total (1204559ms).
[13:06:36.536] <TB2> INFO: 35450050 events read in total (1227387ms).
[13:06:59.526] <TB2> INFO: 36120000 events read in total (1250377ms).
[13:07:15.963] <TB2> INFO: 36608000 events read in total (1266814ms).
[13:07:16.042] <TB2> INFO: Test took 1267756ms.
[13:07:16.581] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:18.979] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:20.662] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:22.671] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:24.644] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:26.370] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:27.840] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:29.301] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:30.832] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:32.314] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:33.772] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:35.251] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:36.707] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:38.151] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:39.633] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:41.117] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:42.618] <TB2> INFO: PixTestScurves::scurves() done
[13:07:42.618] <TB2> INFO: Vcal mean: 121.98 110.78 130.10 116.08 114.02 118.60 123.82 123.90 115.91 117.35 123.74 117.65 142.67 126.57 111.70 117.84
[13:07:42.618] <TB2> INFO: Vcal RMS: 6.37 4.73 5.80 5.90 5.69 6.35 5.93 5.36 5.58 5.76 9.02 5.84 6.50 5.86 4.95 5.50
[13:07:42.618] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1294 seconds
[13:07:42.618] <TB2> INFO: Decoding statistics:
[13:07:42.618] <TB2> INFO: General information:
[13:07:42.618] <TB2> INFO: 16bit words read: 0
[13:07:42.618] <TB2> INFO: valid events total: 0
[13:07:42.618] <TB2> INFO: empty events: 0
[13:07:42.618] <TB2> INFO: valid events with pixels: 0
[13:07:42.618] <TB2> INFO: valid pixel hits: 0
[13:07:42.618] <TB2> INFO: Event errors: 0
[13:07:42.618] <TB2> INFO: start marker: 0
[13:07:42.618] <TB2> INFO: stop marker: 0
[13:07:42.618] <TB2> INFO: overflow: 0
[13:07:42.618] <TB2> INFO: invalid 5bit words: 0
[13:07:42.618] <TB2> INFO: invalid XOR eye diagram: 0
[13:07:42.618] <TB2> INFO: frame (failed synchr.): 0
[13:07:42.618] <TB2> INFO: idle data (no TBM trl): 0
[13:07:42.618] <TB2> INFO: no data (only TBM hdr): 0
[13:07:42.618] <TB2> INFO: TBM errors: 0
[13:07:42.618] <TB2> INFO: flawed TBM headers: 0
[13:07:42.618] <TB2> INFO: flawed TBM trailers: 0
[13:07:42.618] <TB2> INFO: event ID mismatches: 0
[13:07:42.618] <TB2> INFO: ROC errors: 0
[13:07:42.618] <TB2> INFO: missing ROC header(s): 0
[13:07:42.618] <TB2> INFO: misplaced readback start: 0
[13:07:42.618] <TB2> INFO: Pixel decoding errors: 0
[13:07:42.618] <TB2> INFO: pixel data incomplete: 0
[13:07:42.618] <TB2> INFO: pixel address: 0
[13:07:42.618] <TB2> INFO: pulse height fill bit: 0
[13:07:42.618] <TB2> INFO: buffer corruption: 0
[13:07:42.703] <TB2> INFO: ######################################################################
[13:07:42.703] <TB2> INFO: PixTestTrim::doTest()
[13:07:42.703] <TB2> INFO: ######################################################################
[13:07:42.704] <TB2> INFO: ----------------------------------------------------------------------
[13:07:42.704] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[13:07:42.704] <TB2> INFO: ----------------------------------------------------------------------
[13:07:42.745] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:07:42.745] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[13:07:42.758] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[13:07:42.758] <TB2> INFO: run 1 of 1
[13:07:42.993] <TB2> INFO: Expecting 5025280 events.
[13:08:14.103] <TB2> INFO: 829800 events read in total (30508ms).
[13:08:44.349] <TB2> INFO: 1656336 events read in total (60755ms).
[13:09:14.577] <TB2> INFO: 2478568 events read in total (90983ms).
[13:09:44.966] <TB2> INFO: 3296656 events read in total (121371ms).
[13:10:15.115] <TB2> INFO: 4110736 events read in total (151521ms).
[13:10:44.707] <TB2> INFO: 4923568 events read in total (181112ms).
[13:10:48.645] <TB2> INFO: 5025280 events read in total (185050ms).
[13:10:48.693] <TB2> INFO: Test took 185934ms.
[13:11:04.788] <TB2> INFO: ROC 0 VthrComp = 123
[13:11:04.788] <TB2> INFO: ROC 1 VthrComp = 113
[13:11:04.789] <TB2> INFO: ROC 2 VthrComp = 130
[13:11:04.789] <TB2> INFO: ROC 3 VthrComp = 113
[13:11:04.789] <TB2> INFO: ROC 4 VthrComp = 116
[13:11:04.789] <TB2> INFO: ROC 5 VthrComp = 120
[13:11:04.789] <TB2> INFO: ROC 6 VthrComp = 123
[13:11:04.789] <TB2> INFO: ROC 7 VthrComp = 130
[13:11:04.790] <TB2> INFO: ROC 8 VthrComp = 123
[13:11:04.790] <TB2> INFO: ROC 9 VthrComp = 119
[13:11:04.790] <TB2> INFO: ROC 10 VthrComp = 118
[13:11:04.790] <TB2> INFO: ROC 11 VthrComp = 128
[13:11:04.790] <TB2> INFO: ROC 12 VthrComp = 131
[13:11:04.791] <TB2> INFO: ROC 13 VthrComp = 128
[13:11:04.791] <TB2> INFO: ROC 14 VthrComp = 121
[13:11:04.791] <TB2> INFO: ROC 15 VthrComp = 133
[13:11:05.028] <TB2> INFO: Expecting 41600 events.
[13:11:08.595] <TB2> INFO: 41600 events read in total (2975ms).
[13:11:08.595] <TB2> INFO: Test took 3803ms.
[13:11:08.605] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:11:08.605] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[13:11:08.616] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[13:11:08.616] <TB2> INFO: run 1 of 1
[13:11:08.895] <TB2> INFO: Expecting 5025280 events.
[13:11:35.078] <TB2> INFO: 589152 events read in total (25591ms).
[13:12:00.856] <TB2> INFO: 1176824 events read in total (51369ms).
[13:12:26.699] <TB2> INFO: 1764528 events read in total (77212ms).
[13:12:52.541] <TB2> INFO: 2352296 events read in total (103054ms).
[13:13:18.552] <TB2> INFO: 2938240 events read in total (129065ms).
[13:13:44.452] <TB2> INFO: 3522504 events read in total (154965ms).
[13:14:09.920] <TB2> INFO: 4106480 events read in total (180433ms).
[13:14:35.474] <TB2> INFO: 4689984 events read in total (205988ms).
[13:14:49.989] <TB2> INFO: 5025280 events read in total (220502ms).
[13:14:50.079] <TB2> INFO: Test took 221463ms.
[13:15:14.529] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 59.4906 for pixel 10/2 mean/min/max = 46.0004/32.1376/59.8633
[13:15:14.529] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 57.8183 for pixel 0/4 mean/min/max = 45.7397/33.6002/57.8792
[13:15:14.529] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 60.3417 for pixel 23/69 mean/min/max = 47.3179/34.2728/60.3629
[13:15:14.530] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 62.4948 for pixel 29/0 mean/min/max = 47.4794/32.3948/62.5639
[13:15:14.530] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 59.2567 for pixel 2/1 mean/min/max = 45.9791/32.3285/59.6297
[13:15:14.530] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 61.4398 for pixel 18/71 mean/min/max = 47.0798/32.6367/61.5229
[13:15:14.531] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 58.8524 for pixel 49/37 mean/min/max = 46.2976/33.5967/58.9985
[13:15:14.531] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 57.6307 for pixel 0/60 mean/min/max = 45.023/31.9954/58.0506
[13:15:14.532] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 58.3413 for pixel 6/2 mean/min/max = 45.1389/31.9267/58.3511
[13:15:14.532] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 57.4914 for pixel 3/2 mean/min/max = 44.9629/32.2277/57.6981
[13:15:14.533] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 69.8178 for pixel 4/2 mean/min/max = 49.1634/28.4817/69.8452
[13:15:14.533] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 57.4667 for pixel 16/62 mean/min/max = 45.0938/32.6127/57.5749
[13:15:14.533] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 71.2088 for pixel 21/8 mean/min/max = 54.9351/37.8944/71.9757
[13:15:14.534] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 60.1392 for pixel 37/10 mean/min/max = 45.9075/31.491/60.324
[13:15:14.534] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 56.3639 for pixel 8/47 mean/min/max = 44.7945/33.0056/56.5835
[13:15:14.535] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 55.8252 for pixel 8/10 mean/min/max = 44.2958/32.4593/56.1323
[13:15:14.536] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:15:14.624] <TB2> INFO: Expecting 411648 events.
[13:15:23.913] <TB2> INFO: 411648 events read in total (8698ms).
[13:15:23.921] <TB2> INFO: Expecting 411648 events.
[13:15:33.025] <TB2> INFO: 411648 events read in total (8701ms).
[13:15:33.035] <TB2> INFO: Expecting 411648 events.
[13:15:42.344] <TB2> INFO: 411648 events read in total (8906ms).
[13:15:42.360] <TB2> INFO: Expecting 411648 events.
[13:15:51.753] <TB2> INFO: 411648 events read in total (8990ms).
[13:15:51.769] <TB2> INFO: Expecting 411648 events.
[13:16:01.275] <TB2> INFO: 411648 events read in total (9103ms).
[13:16:01.293] <TB2> INFO: Expecting 411648 events.
[13:16:10.750] <TB2> INFO: 411648 events read in total (9054ms).
[13:16:10.771] <TB2> INFO: Expecting 411648 events.
[13:16:20.242] <TB2> INFO: 411648 events read in total (9068ms).
[13:16:20.266] <TB2> INFO: Expecting 411648 events.
[13:16:29.660] <TB2> INFO: 411648 events read in total (8991ms).
[13:16:29.697] <TB2> INFO: Expecting 411648 events.
[13:16:39.155] <TB2> INFO: 411648 events read in total (9055ms).
[13:16:39.184] <TB2> INFO: Expecting 411648 events.
[13:16:48.617] <TB2> INFO: 411648 events read in total (9030ms).
[13:16:48.650] <TB2> INFO: Expecting 411648 events.
[13:16:58.072] <TB2> INFO: 411648 events read in total (9019ms).
[13:16:58.108] <TB2> INFO: Expecting 411648 events.
[13:17:07.594] <TB2> INFO: 411648 events read in total (9083ms).
[13:17:07.634] <TB2> INFO: Expecting 411648 events.
[13:17:17.091] <TB2> INFO: 411648 events read in total (9053ms).
[13:17:17.133] <TB2> INFO: Expecting 411648 events.
[13:17:26.523] <TB2> INFO: 411648 events read in total (8987ms).
[13:17:26.568] <TB2> INFO: Expecting 411648 events.
[13:17:35.770] <TB2> INFO: 411648 events read in total (8799ms).
[13:17:35.830] <TB2> INFO: Expecting 411648 events.
[13:17:45.324] <TB2> INFO: 411648 events read in total (9091ms).
[13:17:45.377] <TB2> INFO: Test took 150842ms.
[13:17:46.155] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[13:17:46.168] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[13:17:46.168] <TB2> INFO: run 1 of 1
[13:17:46.407] <TB2> INFO: Expecting 5025280 events.
[13:18:12.813] <TB2> INFO: 584008 events read in total (25815ms).
[13:18:38.790] <TB2> INFO: 1166792 events read in total (51792ms).
[13:19:04.003] <TB2> INFO: 1750288 events read in total (78005ms).
[13:19:30.863] <TB2> INFO: 2333008 events read in total (103865ms).
[13:19:56.798] <TB2> INFO: 2914576 events read in total (129801ms).
[13:20:23.021] <TB2> INFO: 3497016 events read in total (156023ms).
[13:20:49.302] <TB2> INFO: 4079312 events read in total (182304ms).
[13:21:16.236] <TB2> INFO: 4661408 events read in total (209238ms).
[13:21:32.501] <TB2> INFO: 5025280 events read in total (225503ms).
[13:21:32.625] <TB2> INFO: Test took 226459ms.
[13:21:58.017] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 5.662654 .. 147.677007
[13:21:58.256] <TB2> INFO: Expecting 208000 events.
[13:22:07.590] <TB2> INFO: 208000 events read in total (8742ms).
[13:22:07.591] <TB2> INFO: Test took 9573ms.
[13:22:07.638] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 5 .. 157 (-1/-1) hits flags = 528 (plus default)
[13:22:07.652] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[13:22:07.652] <TB2> INFO: run 1 of 1
[13:22:07.930] <TB2> INFO: Expecting 5091840 events.
[13:22:34.349] <TB2> INFO: 578816 events read in total (25828ms).
[13:23:00.243] <TB2> INFO: 1157432 events read in total (51723ms).
[13:23:26.339] <TB2> INFO: 1735944 events read in total (77819ms).
[13:23:52.015] <TB2> INFO: 2314264 events read in total (103494ms).
[13:24:18.062] <TB2> INFO: 2892760 events read in total (129541ms).
[13:24:43.806] <TB2> INFO: 3470568 events read in total (155285ms).
[13:25:09.677] <TB2> INFO: 4047800 events read in total (181156ms).
[13:25:35.032] <TB2> INFO: 4624992 events read in total (206511ms).
[13:25:56.053] <TB2> INFO: 5091840 events read in total (227532ms).
[13:25:56.282] <TB2> INFO: Test took 228631ms.
[13:26:21.645] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 26.240083 .. 55.742854
[13:26:21.952] <TB2> INFO: Expecting 208000 events.
[13:26:31.616] <TB2> INFO: 208000 events read in total (9072ms).
[13:26:31.617] <TB2> INFO: Test took 9971ms.
[13:26:31.686] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 65 (-1/-1) hits flags = 528 (plus default)
[13:26:31.700] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[13:26:31.700] <TB2> INFO: run 1 of 1
[13:26:31.978] <TB2> INFO: Expecting 1664000 events.
[13:26:59.728] <TB2> INFO: 631976 events read in total (27158ms).
[13:27:26.860] <TB2> INFO: 1263120 events read in total (54290ms).
[13:27:44.114] <TB2> INFO: 1664000 events read in total (71544ms).
[13:27:44.152] <TB2> INFO: Test took 72452ms.
[13:27:59.883] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 25.545501 .. 52.161297
[13:28:00.142] <TB2> INFO: Expecting 208000 events.
[13:28:10.089] <TB2> INFO: 208000 events read in total (9355ms).
[13:28:10.090] <TB2> INFO: Test took 10205ms.
[13:28:10.145] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 15 .. 62 (-1/-1) hits flags = 528 (plus default)
[13:28:10.157] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[13:28:10.157] <TB2> INFO: run 1 of 1
[13:28:10.436] <TB2> INFO: Expecting 1597440 events.
[13:28:38.845] <TB2> INFO: 643616 events read in total (27818ms).
[13:29:06.321] <TB2> INFO: 1286664 events read in total (55294ms).
[13:29:19.469] <TB2> INFO: 1597440 events read in total (68442ms).
[13:29:19.506] <TB2> INFO: Test took 69349ms.
[13:29:33.788] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 24.949643 .. 51.447121
[13:29:34.025] <TB2> INFO: Expecting 208000 events.
[13:29:43.932] <TB2> INFO: 208000 events read in total (9315ms).
[13:29:43.933] <TB2> INFO: Test took 10144ms.
[13:29:43.980] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 14 .. 61 (-1/-1) hits flags = 528 (plus default)
[13:29:43.993] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[13:29:43.993] <TB2> INFO: run 1 of 1
[13:29:44.272] <TB2> INFO: Expecting 1597440 events.
[13:30:13.716] <TB2> INFO: 649976 events read in total (28852ms).
[13:30:41.204] <TB2> INFO: 1300208 events read in total (56340ms).
[13:30:53.700] <TB2> INFO: 1597440 events read in total (68836ms).
[13:30:53.744] <TB2> INFO: Test took 69752ms.
[13:31:07.157] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:31:07.157] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[13:31:07.170] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[13:31:07.170] <TB2> INFO: run 1 of 1
[13:31:07.443] <TB2> INFO: Expecting 1364480 events.
[13:31:36.271] <TB2> INFO: 668120 events read in total (28236ms).
[13:32:04.382] <TB2> INFO: 1335712 events read in total (56348ms).
[13:32:05.974] <TB2> INFO: 1364480 events read in total (57940ms).
[13:32:05.001] <TB2> INFO: Test took 58832ms.
[13:32:18.775] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C0.dat
[13:32:18.775] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C1.dat
[13:32:18.775] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C2.dat
[13:32:18.775] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C3.dat
[13:32:18.775] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C4.dat
[13:32:18.775] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C5.dat
[13:32:18.775] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C6.dat
[13:32:18.775] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C7.dat
[13:32:18.776] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C8.dat
[13:32:18.776] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C9.dat
[13:32:18.776] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C10.dat
[13:32:18.776] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C11.dat
[13:32:18.776] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C12.dat
[13:32:18.776] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C13.dat
[13:32:18.776] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C14.dat
[13:32:18.776] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C15.dat
[13:32:18.776] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//trimParameters35_C0.dat
[13:32:18.783] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//trimParameters35_C1.dat
[13:32:18.789] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//trimParameters35_C2.dat
[13:32:18.794] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//trimParameters35_C3.dat
[13:32:18.799] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//trimParameters35_C4.dat
[13:32:18.804] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//trimParameters35_C5.dat
[13:32:18.809] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//trimParameters35_C6.dat
[13:32:18.815] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//trimParameters35_C7.dat
[13:32:18.820] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//trimParameters35_C8.dat
[13:32:18.825] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//trimParameters35_C9.dat
[13:32:18.830] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//trimParameters35_C10.dat
[13:32:18.837] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//trimParameters35_C11.dat
[13:32:18.843] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//trimParameters35_C12.dat
[13:32:18.849] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//trimParameters35_C13.dat
[13:32:18.855] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//trimParameters35_C14.dat
[13:32:18.859] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//trimParameters35_C15.dat
[13:32:18.864] <TB2> INFO: PixTestTrim::trimTest() done
[13:32:18.864] <TB2> INFO: vtrim: 131 113 130 138 116 134 128 112 122 110 143 121 176 140 110 128
[13:32:18.864] <TB2> INFO: vthrcomp: 123 113 130 113 116 120 123 130 123 119 118 128 131 128 121 133
[13:32:18.864] <TB2> INFO: vcal mean: 34.98 35.02 35.22 35.17 35.01 35.05 35.06 34.94 34.94 34.95 35.12 34.98 36.36 35.21 34.95 34.98
[13:32:18.864] <TB2> INFO: vcal RMS: 1.02 1.01 1.28 1.32 1.01 1.09 1.09 1.03 1.17 1.14 1.41 0.94 2.71 1.42 0.94 0.99
[13:32:18.864] <TB2> INFO: bits mean: 9.44 8.70 9.09 9.66 9.52 9.33 9.49 9.23 9.55 9.60 9.39 9.65 8.34 10.10 9.37 10.14
[13:32:18.864] <TB2> INFO: bits RMS: 2.72 2.87 2.54 2.55 2.63 2.65 2.51 2.87 2.74 2.74 2.92 2.54 2.50 2.55 2.65 2.43
[13:32:18.873] <TB2> INFO: ----------------------------------------------------------------------
[13:32:18.873] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[13:32:18.873] <TB2> INFO: ----------------------------------------------------------------------
[13:32:18.876] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[13:32:18.888] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[13:32:18.889] <TB2> INFO: run 1 of 1
[13:32:19.126] <TB2> INFO: Expecting 4160000 events.
[13:32:51.903] <TB2> INFO: 758425 events read in total (32186ms).
[13:33:24.158] <TB2> INFO: 1510950 events read in total (64441ms).
[13:33:56.017] <TB2> INFO: 2259500 events read in total (96300ms).
[13:34:28.118] <TB2> INFO: 3004500 events read in total (128401ms).
[13:35:00.521] <TB2> INFO: 3745675 events read in total (160804ms).
[13:35:18.420] <TB2> INFO: 4160000 events read in total (178703ms).
[13:35:18.509] <TB2> INFO: Test took 179620ms.
[13:35:42.645] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 226 (-1/-1) hits flags = 528 (plus default)
[13:35:42.659] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[13:35:42.659] <TB2> INFO: run 1 of 1
[13:35:42.904] <TB2> INFO: Expecting 4721600 events.
[13:36:14.303] <TB2> INFO: 702425 events read in total (30807ms).
[13:36:45.125] <TB2> INFO: 1401280 events read in total (61629ms).
[13:37:16.117] <TB2> INFO: 2098165 events read in total (92621ms).
[13:37:47.054] <TB2> INFO: 2791630 events read in total (123558ms).
[13:38:18.335] <TB2> INFO: 3483075 events read in total (154839ms).
[13:38:49.526] <TB2> INFO: 4172005 events read in total (186030ms).
[13:39:13.887] <TB2> INFO: 4721600 events read in total (210391ms).
[13:39:13.989] <TB2> INFO: Test took 211330ms.
[13:39:42.897] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 215 (-1/-1) hits flags = 528 (plus default)
[13:39:42.911] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[13:39:42.911] <TB2> INFO: run 1 of 1
[13:39:43.151] <TB2> INFO: Expecting 4492800 events.
[13:40:14.745] <TB2> INFO: 714235 events read in total (31003ms).
[13:40:45.741] <TB2> INFO: 1423880 events read in total (61999ms).
[13:41:16.312] <TB2> INFO: 2131800 events read in total (92570ms).
[13:41:47.286] <TB2> INFO: 2835440 events read in total (123544ms).
[13:42:18.525] <TB2> INFO: 3537370 events read in total (154783ms).
[13:42:49.441] <TB2> INFO: 4238175 events read in total (185699ms).
[13:43:00.737] <TB2> INFO: 4492800 events read in total (196995ms).
[13:43:00.819] <TB2> INFO: Test took 197908ms.
[13:43:25.832] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 217 (-1/-1) hits flags = 528 (plus default)
[13:43:25.845] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[13:43:25.845] <TB2> INFO: run 1 of 1
[13:43:26.097] <TB2> INFO: Expecting 4534400 events.
[13:43:57.971] <TB2> INFO: 712410 events read in total (31283ms).
[13:44:28.898] <TB2> INFO: 1419990 events read in total (62210ms).
[13:44:59.632] <TB2> INFO: 2125930 events read in total (92944ms).
[13:45:30.755] <TB2> INFO: 2828165 events read in total (124067ms).
[13:46:01.317] <TB2> INFO: 3527795 events read in total (154629ms).
[13:46:32.979] <TB2> INFO: 4226425 events read in total (186291ms).
[13:46:46.767] <TB2> INFO: 4534400 events read in total (200079ms).
[13:46:46.883] <TB2> INFO: Test took 201038ms.
[13:47:14.396] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 217 (-1/-1) hits flags = 528 (plus default)
[13:47:14.410] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[13:47:14.410] <TB2> INFO: run 1 of 1
[13:47:14.654] <TB2> INFO: Expecting 4534400 events.
[13:47:46.405] <TB2> INFO: 712555 events read in total (31159ms).
[13:48:17.579] <TB2> INFO: 1420105 events read in total (62333ms).
[13:48:48.953] <TB2> INFO: 2125520 events read in total (93707ms).
[13:49:20.013] <TB2> INFO: 2827645 events read in total (124767ms).
[13:49:50.763] <TB2> INFO: 3527185 events read in total (155517ms).
[13:50:21.668] <TB2> INFO: 4225685 events read in total (186422ms).
[13:50:35.588] <TB2> INFO: 4534400 events read in total (200342ms).
[13:50:35.807] <TB2> INFO: Test took 201396ms.
[13:51:02.187] <TB2> INFO: PixTestTrim::trimBitTest() done
[13:51:02.189] <TB2> INFO: PixTestTrim::doTest() done, duration: 2599 seconds
[13:51:02.189] <TB2> INFO: Decoding statistics:
[13:51:02.189] <TB2> INFO: General information:
[13:51:02.189] <TB2> INFO: 16bit words read: 0
[13:51:02.189] <TB2> INFO: valid events total: 0
[13:51:02.189] <TB2> INFO: empty events: 0
[13:51:02.189] <TB2> INFO: valid events with pixels: 0
[13:51:02.189] <TB2> INFO: valid pixel hits: 0
[13:51:02.189] <TB2> INFO: Event errors: 0
[13:51:02.189] <TB2> INFO: start marker: 0
[13:51:02.189] <TB2> INFO: stop marker: 0
[13:51:02.189] <TB2> INFO: overflow: 0
[13:51:02.189] <TB2> INFO: invalid 5bit words: 0
[13:51:02.189] <TB2> INFO: invalid XOR eye diagram: 0
[13:51:02.189] <TB2> INFO: frame (failed synchr.): 0
[13:51:02.189] <TB2> INFO: idle data (no TBM trl): 0
[13:51:02.189] <TB2> INFO: no data (only TBM hdr): 0
[13:51:02.189] <TB2> INFO: TBM errors: 0
[13:51:02.189] <TB2> INFO: flawed TBM headers: 0
[13:51:02.189] <TB2> INFO: flawed TBM trailers: 0
[13:51:02.189] <TB2> INFO: event ID mismatches: 0
[13:51:02.189] <TB2> INFO: ROC errors: 0
[13:51:02.189] <TB2> INFO: missing ROC header(s): 0
[13:51:02.189] <TB2> INFO: misplaced readback start: 0
[13:51:02.189] <TB2> INFO: Pixel decoding errors: 0
[13:51:02.189] <TB2> INFO: pixel data incomplete: 0
[13:51:02.189] <TB2> INFO: pixel address: 0
[13:51:02.189] <TB2> INFO: pulse height fill bit: 0
[13:51:02.189] <TB2> INFO: buffer corruption: 0
[13:51:02.961] <TB2> INFO: ######################################################################
[13:51:02.961] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:51:02.961] <TB2> INFO: ######################################################################
[13:51:03.199] <TB2> INFO: Expecting 41600 events.
[13:51:06.753] <TB2> INFO: 41600 events read in total (2962ms).
[13:51:06.754] <TB2> INFO: Test took 3792ms.
[13:51:07.193] <TB2> INFO: Expecting 41600 events.
[13:51:10.812] <TB2> INFO: 41600 events read in total (3027ms).
[13:51:10.813] <TB2> INFO: Test took 3856ms.
[13:51:11.105] <TB2> INFO: Expecting 41600 events.
[13:51:14.656] <TB2> INFO: 41600 events read in total (2959ms).
[13:51:14.656] <TB2> INFO: Test took 3816ms.
[13:51:14.948] <TB2> INFO: Expecting 41600 events.
[13:51:18.567] <TB2> INFO: 41600 events read in total (3027ms).
[13:51:18.568] <TB2> INFO: Test took 3886ms.
[13:51:18.858] <TB2> INFO: Expecting 41600 events.
[13:51:22.487] <TB2> INFO: 41600 events read in total (3038ms).
[13:51:22.488] <TB2> INFO: Test took 3895ms.
[13:51:22.777] <TB2> INFO: Expecting 41600 events.
[13:51:26.306] <TB2> INFO: 41600 events read in total (2937ms).
[13:51:26.307] <TB2> INFO: Test took 3795ms.
[13:51:26.596] <TB2> INFO: Expecting 41600 events.
[13:51:30.140] <TB2> INFO: 41600 events read in total (2953ms).
[13:51:30.141] <TB2> INFO: Test took 3810ms.
[13:51:30.433] <TB2> INFO: Expecting 41600 events.
[13:51:33.943] <TB2> INFO: 41600 events read in total (2919ms).
[13:51:33.944] <TB2> INFO: Test took 3777ms.
[13:51:34.232] <TB2> INFO: Expecting 41600 events.
[13:51:37.787] <TB2> INFO: 41600 events read in total (2963ms).
[13:51:37.788] <TB2> INFO: Test took 3820ms.
[13:51:38.078] <TB2> INFO: Expecting 41600 events.
[13:51:41.634] <TB2> INFO: 41600 events read in total (2964ms).
[13:51:41.635] <TB2> INFO: Test took 3822ms.
[13:51:41.925] <TB2> INFO: Expecting 41600 events.
[13:51:45.448] <TB2> INFO: 41600 events read in total (2931ms).
[13:51:45.449] <TB2> INFO: Test took 3790ms.
[13:51:45.739] <TB2> INFO: Expecting 41600 events.
[13:51:49.232] <TB2> INFO: 41600 events read in total (2901ms).
[13:51:49.232] <TB2> INFO: Test took 3758ms.
[13:51:49.540] <TB2> INFO: Expecting 41600 events.
[13:51:53.146] <TB2> INFO: 41600 events read in total (3014ms).
[13:51:53.146] <TB2> INFO: Test took 3890ms.
[13:51:53.457] <TB2> INFO: Expecting 41600 events.
[13:51:56.957] <TB2> INFO: 41600 events read in total (2908ms).
[13:51:56.958] <TB2> INFO: Test took 3787ms.
[13:51:57.268] <TB2> INFO: Expecting 41600 events.
[13:52:00.833] <TB2> INFO: 41600 events read in total (2973ms).
[13:52:00.834] <TB2> INFO: Test took 3852ms.
[13:52:01.124] <TB2> INFO: Expecting 41600 events.
[13:52:04.658] <TB2> INFO: 41600 events read in total (2942ms).
[13:52:04.660] <TB2> INFO: Test took 3801ms.
[13:52:04.956] <TB2> INFO: Expecting 41600 events.
[13:52:08.475] <TB2> INFO: 41600 events read in total (2927ms).
[13:52:08.476] <TB2> INFO: Test took 3791ms.
[13:52:08.767] <TB2> INFO: Expecting 41600 events.
[13:52:12.329] <TB2> INFO: 41600 events read in total (2971ms).
[13:52:12.330] <TB2> INFO: Test took 3829ms.
[13:52:12.620] <TB2> INFO: Expecting 41600 events.
[13:52:16.127] <TB2> INFO: 41600 events read in total (2916ms).
[13:52:16.128] <TB2> INFO: Test took 3774ms.
[13:52:16.420] <TB2> INFO: Expecting 41600 events.
[13:52:20.007] <TB2> INFO: 41600 events read in total (2995ms).
[13:52:20.008] <TB2> INFO: Test took 3853ms.
[13:52:20.298] <TB2> INFO: Expecting 41600 events.
[13:52:23.924] <TB2> INFO: 41600 events read in total (3034ms).
[13:52:23.924] <TB2> INFO: Test took 3891ms.
[13:52:24.213] <TB2> INFO: Expecting 41600 events.
[13:52:27.709] <TB2> INFO: 41600 events read in total (2904ms).
[13:52:27.710] <TB2> INFO: Test took 3761ms.
[13:52:27.999] <TB2> INFO: Expecting 41600 events.
[13:52:31.530] <TB2> INFO: 41600 events read in total (2939ms).
[13:52:31.530] <TB2> INFO: Test took 3796ms.
[13:52:31.820] <TB2> INFO: Expecting 41600 events.
[13:52:35.417] <TB2> INFO: 41600 events read in total (3006ms).
[13:52:35.418] <TB2> INFO: Test took 3864ms.
[13:52:35.707] <TB2> INFO: Expecting 41600 events.
[13:52:39.277] <TB2> INFO: 41600 events read in total (2978ms).
[13:52:39.278] <TB2> INFO: Test took 3836ms.
[13:52:39.569] <TB2> INFO: Expecting 41600 events.
[13:52:43.138] <TB2> INFO: 41600 events read in total (2977ms).
[13:52:43.139] <TB2> INFO: Test took 3835ms.
[13:52:43.433] <TB2> INFO: Expecting 2560 events.
[13:52:44.324] <TB2> INFO: 2560 events read in total (300ms).
[13:52:44.324] <TB2> INFO: Test took 1169ms.
[13:52:44.632] <TB2> INFO: Expecting 2560 events.
[13:52:45.525] <TB2> INFO: 2560 events read in total (302ms).
[13:52:45.526] <TB2> INFO: Test took 1201ms.
[13:52:45.833] <TB2> INFO: Expecting 2560 events.
[13:52:46.716] <TB2> INFO: 2560 events read in total (291ms).
[13:52:46.717] <TB2> INFO: Test took 1190ms.
[13:52:47.025] <TB2> INFO: Expecting 2560 events.
[13:52:47.909] <TB2> INFO: 2560 events read in total (292ms).
[13:52:47.909] <TB2> INFO: Test took 1192ms.
[13:52:48.218] <TB2> INFO: Expecting 2560 events.
[13:52:49.098] <TB2> INFO: 2560 events read in total (289ms).
[13:52:49.099] <TB2> INFO: Test took 1189ms.
[13:52:49.406] <TB2> INFO: Expecting 2560 events.
[13:52:50.295] <TB2> INFO: 2560 events read in total (297ms).
[13:52:50.296] <TB2> INFO: Test took 1197ms.
[13:52:50.604] <TB2> INFO: Expecting 2560 events.
[13:52:51.494] <TB2> INFO: 2560 events read in total (299ms).
[13:52:51.494] <TB2> INFO: Test took 1198ms.
[13:52:51.801] <TB2> INFO: Expecting 2560 events.
[13:52:52.692] <TB2> INFO: 2560 events read in total (300ms).
[13:52:52.692] <TB2> INFO: Test took 1197ms.
[13:52:52.000] <TB2> INFO: Expecting 2560 events.
[13:52:53.880] <TB2> INFO: 2560 events read in total (288ms).
[13:52:53.880] <TB2> INFO: Test took 1188ms.
[13:52:54.188] <TB2> INFO: Expecting 2560 events.
[13:52:55.066] <TB2> INFO: 2560 events read in total (287ms).
[13:52:55.067] <TB2> INFO: Test took 1186ms.
[13:52:55.374] <TB2> INFO: Expecting 2560 events.
[13:52:56.254] <TB2> INFO: 2560 events read in total (288ms).
[13:52:56.254] <TB2> INFO: Test took 1187ms.
[13:52:56.562] <TB2> INFO: Expecting 2560 events.
[13:52:57.445] <TB2> INFO: 2560 events read in total (291ms).
[13:52:57.445] <TB2> INFO: Test took 1190ms.
[13:52:57.753] <TB2> INFO: Expecting 2560 events.
[13:52:58.642] <TB2> INFO: 2560 events read in total (297ms).
[13:52:58.643] <TB2> INFO: Test took 1198ms.
[13:52:58.951] <TB2> INFO: Expecting 2560 events.
[13:52:59.835] <TB2> INFO: 2560 events read in total (292ms).
[13:52:59.835] <TB2> INFO: Test took 1192ms.
[13:53:00.144] <TB2> INFO: Expecting 2560 events.
[13:53:01.028] <TB2> INFO: 2560 events read in total (292ms).
[13:53:01.028] <TB2> INFO: Test took 1192ms.
[13:53:01.336] <TB2> INFO: Expecting 2560 events.
[13:53:02.228] <TB2> INFO: 2560 events read in total (300ms).
[13:53:02.228] <TB2> INFO: Test took 1199ms.
[13:53:02.231] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:53:02.538] <TB2> INFO: Expecting 655360 events.
[13:53:17.308] <TB2> INFO: 655360 events read in total (14179ms).
[13:53:17.321] <TB2> INFO: Expecting 655360 events.
[13:53:31.801] <TB2> INFO: 655360 events read in total (14077ms).
[13:53:31.818] <TB2> INFO: Expecting 655360 events.
[13:53:46.374] <TB2> INFO: 655360 events read in total (14153ms).
[13:53:46.394] <TB2> INFO: Expecting 655360 events.
[13:54:00.887] <TB2> INFO: 655360 events read in total (14090ms).
[13:54:00.913] <TB2> INFO: Expecting 655360 events.
[13:54:15.334] <TB2> INFO: 655360 events read in total (14018ms).
[13:54:15.368] <TB2> INFO: Expecting 655360 events.
[13:54:29.900] <TB2> INFO: 655360 events read in total (14129ms).
[13:54:29.950] <TB2> INFO: Expecting 655360 events.
[13:54:44.423] <TB2> INFO: 655360 events read in total (14070ms).
[13:54:44.464] <TB2> INFO: Expecting 655360 events.
[13:54:59.021] <TB2> INFO: 655360 events read in total (14154ms).
[13:54:59.078] <TB2> INFO: Expecting 655360 events.
[13:55:13.624] <TB2> INFO: 655360 events read in total (14143ms).
[13:55:13.698] <TB2> INFO: Expecting 655360 events.
[13:55:28.199] <TB2> INFO: 655360 events read in total (14098ms).
[13:55:28.265] <TB2> INFO: Expecting 655360 events.
[13:55:42.844] <TB2> INFO: 655360 events read in total (14176ms).
[13:55:42.937] <TB2> INFO: Expecting 655360 events.
[13:55:57.348] <TB2> INFO: 655360 events read in total (14008ms).
[13:55:57.425] <TB2> INFO: Expecting 655360 events.
[13:56:11.888] <TB2> INFO: 655360 events read in total (14059ms).
[13:56:12.107] <TB2> INFO: Expecting 655360 events.
[13:56:26.583] <TB2> INFO: 655360 events read in total (14073ms).
[13:56:26.704] <TB2> INFO: Expecting 655360 events.
[13:56:41.290] <TB2> INFO: 655360 events read in total (14183ms).
[13:56:41.404] <TB2> INFO: Expecting 655360 events.
[13:56:56.040] <TB2> INFO: 655360 events read in total (14233ms).
[13:56:56.238] <TB2> INFO: Test took 234007ms.
[13:56:56.340] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:56:56.594] <TB2> INFO: Expecting 655360 events.
[13:57:11.235] <TB2> INFO: 655360 events read in total (14050ms).
[13:57:11.247] <TB2> INFO: Expecting 655360 events.
[13:57:25.532] <TB2> INFO: 655360 events read in total (13882ms).
[13:57:25.553] <TB2> INFO: Expecting 655360 events.
[13:57:39.972] <TB2> INFO: 655360 events read in total (14016ms).
[13:57:39.993] <TB2> INFO: Expecting 655360 events.
[13:57:54.115] <TB2> INFO: 655360 events read in total (13719ms).
[13:57:54.147] <TB2> INFO: Expecting 655360 events.
[13:58:08.629] <TB2> INFO: 655360 events read in total (14079ms).
[13:58:08.658] <TB2> INFO: Expecting 655360 events.
[13:58:23.232] <TB2> INFO: 655360 events read in total (14170ms).
[13:58:23.269] <TB2> INFO: Expecting 655360 events.
[13:58:37.600] <TB2> INFO: 655360 events read in total (13928ms).
[13:58:37.649] <TB2> INFO: Expecting 655360 events.
[13:58:51.806] <TB2> INFO: 655360 events read in total (13754ms).
[13:58:51.879] <TB2> INFO: Expecting 655360 events.
[13:59:05.976] <TB2> INFO: 655360 events read in total (13694ms).
[13:59:06.037] <TB2> INFO: Expecting 655360 events.
[13:59:20.555] <TB2> INFO: 655360 events read in total (14115ms).
[13:59:20.623] <TB2> INFO: Expecting 655360 events.
[13:59:35.414] <TB2> INFO: 655360 events read in total (14387ms).
[13:59:35.482] <TB2> INFO: Expecting 655360 events.
[13:59:50.485] <TB2> INFO: 655360 events read in total (14600ms).
[13:59:50.561] <TB2> INFO: Expecting 655360 events.
[14:00:05.466] <TB2> INFO: 655360 events read in total (14502ms).
[14:00:05.735] <TB2> INFO: Expecting 655360 events.
[14:00:20.550] <TB2> INFO: 655360 events read in total (14412ms).
[14:00:20.664] <TB2> INFO: Expecting 655360 events.
[14:00:35.436] <TB2> INFO: 655360 events read in total (14369ms).
[14:00:35.649] <TB2> INFO: Expecting 655360 events.
[14:00:50.509] <TB2> INFO: 655360 events read in total (14457ms).
[14:00:50.625] <TB2> INFO: Test took 234285ms.
[14:00:50.813] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:50.819] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:50.825] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:50.831] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:50.837] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:00:50.842] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[14:00:50.848] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[14:00:50.854] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[14:00:50.860] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:50.866] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:50.871] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:50.877] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:50.883] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:00:50.888] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[14:00:50.895] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[14:00:50.902] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[14:00:50.907] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[14:00:50.913] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[14:00:50.919] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[14:00:50.925] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[14:00:50.931] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[14:00:50.937] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:50.943] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:00:50.948] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[14:00:50.954] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[14:00:50.960] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[14:00:50.966] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[14:00:50.971] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[14:00:50.977] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[14:00:50.983] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:50.989] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:00:50.995] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[14:00:50.000] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[14:00:51.006] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[14:00:51.012] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[14:00:51.017] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[14:00:51.023] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[14:00:51.029] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[14:00:51.035] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[14:00:51.040] <TB2> INFO: safety margin for low PH: adding 10, margin is now 30
[14:00:51.046] <TB2> INFO: safety margin for low PH: adding 11, margin is now 31
[14:00:51.052] <TB2> INFO: safety margin for low PH: adding 12, margin is now 32
[14:00:51.058] <TB2> INFO: safety margin for low PH: adding 13, margin is now 33
[14:00:51.063] <TB2> INFO: safety margin for low PH: adding 14, margin is now 34
[14:00:51.069] <TB2> INFO: safety margin for low PH: adding 15, margin is now 35
[14:00:51.075] <TB2> INFO: safety margin for low PH: adding 16, margin is now 36
[14:00:51.080] <TB2> INFO: safety margin for low PH: adding 17, margin is now 37
[14:00:51.086] <TB2> INFO: safety margin for low PH: adding 18, margin is now 38
[14:00:51.092] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:51.098] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:51.103] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:51.109] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:51.115] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:51.120] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:00:51.126] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:51.160] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C0.dat
[14:00:51.160] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C1.dat
[14:00:51.160] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C2.dat
[14:00:51.160] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C3.dat
[14:00:51.160] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C4.dat
[14:00:51.160] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C5.dat
[14:00:51.160] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C6.dat
[14:00:51.161] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C7.dat
[14:00:51.161] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C8.dat
[14:00:51.161] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C9.dat
[14:00:51.161] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C10.dat
[14:00:51.161] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C11.dat
[14:00:51.161] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C12.dat
[14:00:51.161] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C13.dat
[14:00:51.161] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C14.dat
[14:00:51.161] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//dacParameters35_C15.dat
[14:00:51.402] <TB2> INFO: Expecting 41600 events.
[14:00:54.558] <TB2> INFO: 41600 events read in total (2564ms).
[14:00:54.559] <TB2> INFO: Test took 3395ms.
[14:00:55.008] <TB2> INFO: Expecting 41600 events.
[14:00:58.111] <TB2> INFO: 41600 events read in total (2511ms).
[14:00:58.112] <TB2> INFO: Test took 3341ms.
[14:00:58.570] <TB2> INFO: Expecting 41600 events.
[14:01:01.762] <TB2> INFO: 41600 events read in total (2600ms).
[14:01:01.762] <TB2> INFO: Test took 3435ms.
[14:01:01.981] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:02.070] <TB2> INFO: Expecting 2560 events.
[14:01:02.965] <TB2> INFO: 2560 events read in total (303ms).
[14:01:02.965] <TB2> INFO: Test took 984ms.
[14:01:02.968] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:03.275] <TB2> INFO: Expecting 2560 events.
[14:01:04.163] <TB2> INFO: 2560 events read in total (297ms).
[14:01:04.163] <TB2> INFO: Test took 1195ms.
[14:01:04.166] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:04.473] <TB2> INFO: Expecting 2560 events.
[14:01:05.369] <TB2> INFO: 2560 events read in total (304ms).
[14:01:05.370] <TB2> INFO: Test took 1204ms.
[14:01:05.373] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:05.678] <TB2> INFO: Expecting 2560 events.
[14:01:06.568] <TB2> INFO: 2560 events read in total (298ms).
[14:01:06.569] <TB2> INFO: Test took 1196ms.
[14:01:06.572] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:06.878] <TB2> INFO: Expecting 2560 events.
[14:01:07.765] <TB2> INFO: 2560 events read in total (295ms).
[14:01:07.765] <TB2> INFO: Test took 1193ms.
[14:01:07.768] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:08.073] <TB2> INFO: Expecting 2560 events.
[14:01:08.967] <TB2> INFO: 2560 events read in total (302ms).
[14:01:08.967] <TB2> INFO: Test took 1199ms.
[14:01:08.971] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:09.275] <TB2> INFO: Expecting 2560 events.
[14:01:10.170] <TB2> INFO: 2560 events read in total (303ms).
[14:01:10.171] <TB2> INFO: Test took 1201ms.
[14:01:10.173] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:10.479] <TB2> INFO: Expecting 2560 events.
[14:01:11.373] <TB2> INFO: 2560 events read in total (302ms).
[14:01:11.374] <TB2> INFO: Test took 1201ms.
[14:01:11.378] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:11.681] <TB2> INFO: Expecting 2560 events.
[14:01:12.569] <TB2> INFO: 2560 events read in total (296ms).
[14:01:12.569] <TB2> INFO: Test took 1191ms.
[14:01:12.574] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:12.879] <TB2> INFO: Expecting 2560 events.
[14:01:13.769] <TB2> INFO: 2560 events read in total (299ms).
[14:01:13.769] <TB2> INFO: Test took 1195ms.
[14:01:13.773] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:14.078] <TB2> INFO: Expecting 2560 events.
[14:01:14.968] <TB2> INFO: 2560 events read in total (298ms).
[14:01:14.968] <TB2> INFO: Test took 1195ms.
[14:01:14.971] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:15.276] <TB2> INFO: Expecting 2560 events.
[14:01:16.159] <TB2> INFO: 2560 events read in total (291ms).
[14:01:16.160] <TB2> INFO: Test took 1189ms.
[14:01:16.162] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:16.469] <TB2> INFO: Expecting 2560 events.
[14:01:17.358] <TB2> INFO: 2560 events read in total (298ms).
[14:01:17.358] <TB2> INFO: Test took 1196ms.
[14:01:17.362] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:17.667] <TB2> INFO: Expecting 2560 events.
[14:01:18.557] <TB2> INFO: 2560 events read in total (299ms).
[14:01:18.558] <TB2> INFO: Test took 1196ms.
[14:01:18.562] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:18.865] <TB2> INFO: Expecting 2560 events.
[14:01:19.754] <TB2> INFO: 2560 events read in total (297ms).
[14:01:19.754] <TB2> INFO: Test took 1193ms.
[14:01:19.759] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:20.062] <TB2> INFO: Expecting 2560 events.
[14:01:20.955] <TB2> INFO: 2560 events read in total (301ms).
[14:01:20.955] <TB2> INFO: Test took 1196ms.
[14:01:20.958] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:21.264] <TB2> INFO: Expecting 2560 events.
[14:01:22.156] <TB2> INFO: 2560 events read in total (301ms).
[14:01:22.156] <TB2> INFO: Test took 1198ms.
[14:01:22.159] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:22.464] <TB2> INFO: Expecting 2560 events.
[14:01:23.354] <TB2> INFO: 2560 events read in total (298ms).
[14:01:23.355] <TB2> INFO: Test took 1196ms.
[14:01:23.358] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:23.664] <TB2> INFO: Expecting 2560 events.
[14:01:24.552] <TB2> INFO: 2560 events read in total (297ms).
[14:01:24.553] <TB2> INFO: Test took 1195ms.
[14:01:24.556] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:24.860] <TB2> INFO: Expecting 2560 events.
[14:01:25.742] <TB2> INFO: 2560 events read in total (290ms).
[14:01:25.742] <TB2> INFO: Test took 1186ms.
[14:01:25.745] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:26.051] <TB2> INFO: Expecting 2560 events.
[14:01:26.943] <TB2> INFO: 2560 events read in total (300ms).
[14:01:26.943] <TB2> INFO: Test took 1198ms.
[14:01:26.948] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:27.251] <TB2> INFO: Expecting 2560 events.
[14:01:28.143] <TB2> INFO: 2560 events read in total (300ms).
[14:01:28.143] <TB2> INFO: Test took 1196ms.
[14:01:28.147] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:28.451] <TB2> INFO: Expecting 2560 events.
[14:01:29.331] <TB2> INFO: 2560 events read in total (289ms).
[14:01:29.331] <TB2> INFO: Test took 1184ms.
[14:01:29.334] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:29.640] <TB2> INFO: Expecting 2560 events.
[14:01:30.528] <TB2> INFO: 2560 events read in total (297ms).
[14:01:30.529] <TB2> INFO: Test took 1195ms.
[14:01:30.532] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:30.838] <TB2> INFO: Expecting 2560 events.
[14:01:31.732] <TB2> INFO: 2560 events read in total (302ms).
[14:01:31.733] <TB2> INFO: Test took 1202ms.
[14:01:31.737] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:32.041] <TB2> INFO: Expecting 2560 events.
[14:01:32.933] <TB2> INFO: 2560 events read in total (300ms).
[14:01:32.934] <TB2> INFO: Test took 1197ms.
[14:01:32.937] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:33.241] <TB2> INFO: Expecting 2560 events.
[14:01:34.128] <TB2> INFO: 2560 events read in total (295ms).
[14:01:34.128] <TB2> INFO: Test took 1191ms.
[14:01:34.131] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:34.438] <TB2> INFO: Expecting 2560 events.
[14:01:35.331] <TB2> INFO: 2560 events read in total (301ms).
[14:01:35.332] <TB2> INFO: Test took 1201ms.
[14:01:35.335] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:35.639] <TB2> INFO: Expecting 2560 events.
[14:01:36.532] <TB2> INFO: 2560 events read in total (301ms).
[14:01:36.533] <TB2> INFO: Test took 1199ms.
[14:01:36.536] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:36.840] <TB2> INFO: Expecting 2560 events.
[14:01:37.730] <TB2> INFO: 2560 events read in total (299ms).
[14:01:37.731] <TB2> INFO: Test took 1195ms.
[14:01:37.733] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:38.039] <TB2> INFO: Expecting 2560 events.
[14:01:38.933] <TB2> INFO: 2560 events read in total (302ms).
[14:01:38.933] <TB2> INFO: Test took 1200ms.
[14:01:38.937] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:39.241] <TB2> INFO: Expecting 2560 events.
[14:01:40.136] <TB2> INFO: 2560 events read in total (303ms).
[14:01:40.136] <TB2> INFO: Test took 1199ms.
[14:01:40.621] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 637 seconds
[14:01:40.621] <TB2> INFO: PH scale (per ROC): 37 32 50 35 43 59 39 42 37 38 38 47 52 41 40 43
[14:01:40.621] <TB2> INFO: PH offset (per ROC): 95 100 129 99 110 129 104 112 98 112 106 105 116 111 81 102
[14:01:40.631] <TB2> INFO: Decoding statistics:
[14:01:40.631] <TB2> INFO: General information:
[14:01:40.631] <TB2> INFO: 16bit words read: 127886
[14:01:40.631] <TB2> INFO: valid events total: 20480
[14:01:40.631] <TB2> INFO: empty events: 17977
[14:01:40.631] <TB2> INFO: valid events with pixels: 2503
[14:01:40.631] <TB2> INFO: valid pixel hits: 2503
[14:01:40.631] <TB2> INFO: Event errors: 0
[14:01:40.631] <TB2> INFO: start marker: 0
[14:01:40.631] <TB2> INFO: stop marker: 0
[14:01:40.631] <TB2> INFO: overflow: 0
[14:01:40.631] <TB2> INFO: invalid 5bit words: 0
[14:01:40.631] <TB2> INFO: invalid XOR eye diagram: 0
[14:01:40.631] <TB2> INFO: frame (failed synchr.): 0
[14:01:40.631] <TB2> INFO: idle data (no TBM trl): 0
[14:01:40.631] <TB2> INFO: no data (only TBM hdr): 0
[14:01:40.631] <TB2> INFO: TBM errors: 0
[14:01:40.631] <TB2> INFO: flawed TBM headers: 0
[14:01:40.631] <TB2> INFO: flawed TBM trailers: 0
[14:01:40.631] <TB2> INFO: event ID mismatches: 0
[14:01:40.631] <TB2> INFO: ROC errors: 0
[14:01:40.631] <TB2> INFO: missing ROC header(s): 0
[14:01:40.631] <TB2> INFO: misplaced readback start: 0
[14:01:40.631] <TB2> INFO: Pixel decoding errors: 0
[14:01:40.631] <TB2> INFO: pixel data incomplete: 0
[14:01:40.631] <TB2> INFO: pixel address: 0
[14:01:40.631] <TB2> INFO: pulse height fill bit: 0
[14:01:40.631] <TB2> INFO: buffer corruption: 0
[14:01:40.794] <TB2> INFO: ######################################################################
[14:01:40.794] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:01:40.794] <TB2> INFO: ######################################################################
[14:01:40.808] <TB2> INFO: scanning low vcal = 10
[14:01:41.089] <TB2> INFO: Expecting 41600 events.
[14:01:44.712] <TB2> INFO: 41600 events read in total (3032ms).
[14:01:44.712] <TB2> INFO: Test took 3904ms.
[14:01:44.714] <TB2> INFO: scanning low vcal = 20
[14:01:45.005] <TB2> INFO: Expecting 41600 events.
[14:01:48.643] <TB2> INFO: 41600 events read in total (3046ms).
[14:01:48.643] <TB2> INFO: Test took 3929ms.
[14:01:48.645] <TB2> INFO: scanning low vcal = 30
[14:01:48.937] <TB2> INFO: Expecting 41600 events.
[14:01:52.626] <TB2> INFO: 41600 events read in total (3097ms).
[14:01:52.627] <TB2> INFO: Test took 3982ms.
[14:01:52.630] <TB2> INFO: scanning low vcal = 40
[14:01:52.907] <TB2> INFO: Expecting 41600 events.
[14:01:56.916] <TB2> INFO: 41600 events read in total (3417ms).
[14:01:56.917] <TB2> INFO: Test took 4287ms.
[14:01:56.920] <TB2> INFO: scanning low vcal = 50
[14:01:57.197] <TB2> INFO: Expecting 41600 events.
[14:02:01.255] <TB2> INFO: 41600 events read in total (3466ms).
[14:02:01.256] <TB2> INFO: Test took 4336ms.
[14:02:01.259] <TB2> INFO: scanning low vcal = 60
[14:02:01.536] <TB2> INFO: Expecting 41600 events.
[14:02:05.481] <TB2> INFO: 41600 events read in total (3353ms).
[14:02:05.482] <TB2> INFO: Test took 4223ms.
[14:02:05.485] <TB2> INFO: scanning low vcal = 70
[14:02:05.762] <TB2> INFO: Expecting 41600 events.
[14:02:09.709] <TB2> INFO: 41600 events read in total (3356ms).
[14:02:09.709] <TB2> INFO: Test took 4224ms.
[14:02:09.712] <TB2> INFO: scanning low vcal = 80
[14:02:09.989] <TB2> INFO: Expecting 41600 events.
[14:02:13.937] <TB2> INFO: 41600 events read in total (3356ms).
[14:02:13.938] <TB2> INFO: Test took 4225ms.
[14:02:13.941] <TB2> INFO: scanning low vcal = 90
[14:02:14.218] <TB2> INFO: Expecting 41600 events.
[14:02:18.186] <TB2> INFO: 41600 events read in total (3377ms).
[14:02:18.187] <TB2> INFO: Test took 4245ms.
[14:02:18.191] <TB2> INFO: scanning low vcal = 100
[14:02:18.467] <TB2> INFO: Expecting 41600 events.
[14:02:22.500] <TB2> INFO: 41600 events read in total (3441ms).
[14:02:22.501] <TB2> INFO: Test took 4309ms.
[14:02:22.505] <TB2> INFO: scanning low vcal = 110
[14:02:22.830] <TB2> INFO: Expecting 41600 events.
[14:02:26.825] <TB2> INFO: 41600 events read in total (3403ms).
[14:02:26.826] <TB2> INFO: Test took 4321ms.
[14:02:26.829] <TB2> INFO: scanning low vcal = 120
[14:02:27.106] <TB2> INFO: Expecting 41600 events.
[14:02:31.099] <TB2> INFO: 41600 events read in total (3401ms).
[14:02:31.100] <TB2> INFO: Test took 4270ms.
[14:02:31.103] <TB2> INFO: scanning low vcal = 130
[14:02:31.380] <TB2> INFO: Expecting 41600 events.
[14:02:35.385] <TB2> INFO: 41600 events read in total (3413ms).
[14:02:35.386] <TB2> INFO: Test took 4282ms.
[14:02:35.390] <TB2> INFO: scanning low vcal = 140
[14:02:35.666] <TB2> INFO: Expecting 41600 events.
[14:02:39.675] <TB2> INFO: 41600 events read in total (3418ms).
[14:02:39.676] <TB2> INFO: Test took 4286ms.
[14:02:39.679] <TB2> INFO: scanning low vcal = 150
[14:02:39.955] <TB2> INFO: Expecting 41600 events.
[14:02:43.947] <TB2> INFO: 41600 events read in total (3400ms).
[14:02:43.948] <TB2> INFO: Test took 4269ms.
[14:02:43.951] <TB2> INFO: scanning low vcal = 160
[14:02:44.228] <TB2> INFO: Expecting 41600 events.
[14:02:48.213] <TB2> INFO: 41600 events read in total (3394ms).
[14:02:48.214] <TB2> INFO: Test took 4263ms.
[14:02:48.218] <TB2> INFO: scanning low vcal = 170
[14:02:48.515] <TB2> INFO: Expecting 41600 events.
[14:02:52.519] <TB2> INFO: 41600 events read in total (3412ms).
[14:02:52.520] <TB2> INFO: Test took 4302ms.
[14:02:52.525] <TB2> INFO: scanning low vcal = 180
[14:02:52.800] <TB2> INFO: Expecting 41600 events.
[14:02:56.783] <TB2> INFO: 41600 events read in total (3391ms).
[14:02:56.783] <TB2> INFO: Test took 4257ms.
[14:02:56.786] <TB2> INFO: scanning low vcal = 190
[14:02:57.101] <TB2> INFO: Expecting 41600 events.
[14:03:01.103] <TB2> INFO: 41600 events read in total (3410ms).
[14:03:01.104] <TB2> INFO: Test took 4317ms.
[14:03:01.107] <TB2> INFO: scanning low vcal = 200
[14:03:01.422] <TB2> INFO: Expecting 41600 events.
[14:03:05.420] <TB2> INFO: 41600 events read in total (3406ms).
[14:03:05.421] <TB2> INFO: Test took 4314ms.
[14:03:05.424] <TB2> INFO: scanning low vcal = 210
[14:03:05.738] <TB2> INFO: Expecting 41600 events.
[14:03:09.738] <TB2> INFO: 41600 events read in total (3409ms).
[14:03:09.738] <TB2> INFO: Test took 4314ms.
[14:03:09.741] <TB2> INFO: scanning low vcal = 220
[14:03:10.018] <TB2> INFO: Expecting 41600 events.
[14:03:14.073] <TB2> INFO: 41600 events read in total (3464ms).
[14:03:14.074] <TB2> INFO: Test took 4333ms.
[14:03:14.077] <TB2> INFO: scanning low vcal = 230
[14:03:14.392] <TB2> INFO: Expecting 41600 events.
[14:03:18.424] <TB2> INFO: 41600 events read in total (3440ms).
[14:03:18.425] <TB2> INFO: Test took 4348ms.
[14:03:18.428] <TB2> INFO: scanning low vcal = 240
[14:03:18.742] <TB2> INFO: Expecting 41600 events.
[14:03:22.701] <TB2> INFO: 41600 events read in total (3368ms).
[14:03:22.702] <TB2> INFO: Test took 4273ms.
[14:03:22.705] <TB2> INFO: scanning low vcal = 250
[14:03:23.020] <TB2> INFO: Expecting 41600 events.
[14:03:26.975] <TB2> INFO: 41600 events read in total (3364ms).
[14:03:26.976] <TB2> INFO: Test took 4271ms.
[14:03:26.980] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[14:03:27.256] <TB2> INFO: Expecting 41600 events.
[14:03:31.225] <TB2> INFO: 41600 events read in total (3377ms).
[14:03:31.226] <TB2> INFO: Test took 4246ms.
[14:03:31.229] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[14:03:31.506] <TB2> INFO: Expecting 41600 events.
[14:03:35.465] <TB2> INFO: 41600 events read in total (3367ms).
[14:03:35.466] <TB2> INFO: Test took 4237ms.
[14:03:35.470] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[14:03:35.746] <TB2> INFO: Expecting 41600 events.
[14:03:39.705] <TB2> INFO: 41600 events read in total (3367ms).
[14:03:39.706] <TB2> INFO: Test took 4236ms.
[14:03:39.709] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[14:03:39.986] <TB2> INFO: Expecting 41600 events.
[14:03:43.946] <TB2> INFO: 41600 events read in total (3368ms).
[14:03:43.946] <TB2> INFO: Test took 4237ms.
[14:03:43.950] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:03:44.227] <TB2> INFO: Expecting 41600 events.
[14:03:48.185] <TB2> INFO: 41600 events read in total (3367ms).
[14:03:48.186] <TB2> INFO: Test took 4236ms.
[14:03:48.592] <TB2> INFO: PixTestGainPedestal::measure() done
[14:04:19.864] <TB2> INFO: PixTestGainPedestal::fit() done
[14:04:19.864] <TB2> INFO: non-linearity mean: 0.905 0.922 0.979 0.935 0.949 0.984 0.950 0.944 0.931 0.952 0.941 0.955 0.984 0.953 0.927 0.923
[14:04:19.864] <TB2> INFO: non-linearity RMS: 0.098 0.144 0.004 0.131 0.050 0.003 0.060 0.045 0.146 0.036 0.039 0.034 0.003 0.155 0.089 0.066
[14:04:19.864] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//phCalibrationFitErr35_C0.dat
[14:04:19.878] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//phCalibrationFitErr35_C1.dat
[14:04:19.892] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//phCalibrationFitErr35_C2.dat
[14:04:19.905] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//phCalibrationFitErr35_C3.dat
[14:04:19.919] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//phCalibrationFitErr35_C4.dat
[14:04:19.932] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//phCalibrationFitErr35_C5.dat
[14:04:19.945] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//phCalibrationFitErr35_C6.dat
[14:04:19.959] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//phCalibrationFitErr35_C7.dat
[14:04:19.973] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//phCalibrationFitErr35_C8.dat
[14:04:19.986] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//phCalibrationFitErr35_C9.dat
[14:04:19.000] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//phCalibrationFitErr35_C10.dat
[14:04:20.013] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//phCalibrationFitErr35_C11.dat
[14:04:20.027] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//phCalibrationFitErr35_C12.dat
[14:04:20.040] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//phCalibrationFitErr35_C13.dat
[14:04:20.054] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//phCalibrationFitErr35_C14.dat
[14:04:20.067] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1013_FullQualification_2016-10-19_09h44m_1476863092//003_Fulltest_p17//phCalibrationFitErr35_C15.dat
[14:04:20.080] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 159 seconds
[14:04:20.080] <TB2> INFO: Decoding statistics:
[14:04:20.080] <TB2> INFO: General information:
[14:04:20.080] <TB2> INFO: 16bit words read: 3316806
[14:04:20.080] <TB2> INFO: valid events total: 332800
[14:04:20.080] <TB2> INFO: empty events: 143
[14:04:20.080] <TB2> INFO: valid events with pixels: 332657
[14:04:20.080] <TB2> INFO: valid pixel hits: 660003
[14:04:20.080] <TB2> INFO: Event errors: 0
[14:04:20.080] <TB2> INFO: start marker: 0
[14:04:20.080] <TB2> INFO: stop marker: 0
[14:04:20.080] <TB2> INFO: overflow: 0
[14:04:20.080] <TB2> INFO: invalid 5bit words: 0
[14:04:20.080] <TB2> INFO: invalid XOR eye diagram: 0
[14:04:20.080] <TB2> INFO: frame (failed synchr.): 0
[14:04:20.080] <TB2> INFO: idle data (no TBM trl): 0
[14:04:20.080] <TB2> INFO: no data (only TBM hdr): 0
[14:04:20.080] <TB2> INFO: TBM errors: 0
[14:04:20.081] <TB2> INFO: flawed TBM headers: 0
[14:04:20.081] <TB2> INFO: flawed TBM trailers: 0
[14:04:20.081] <TB2> INFO: event ID mismatches: 0
[14:04:20.081] <TB2> INFO: ROC errors: 0
[14:04:20.081] <TB2> INFO: missing ROC header(s): 0
[14:04:20.081] <TB2> INFO: misplaced readback start: 0
[14:04:20.081] <TB2> INFO: Pixel decoding errors: 0
[14:04:20.081] <TB2> INFO: pixel data incomplete: 0
[14:04:20.081] <TB2> INFO: pixel address: 0
[14:04:20.081] <TB2> INFO: pulse height fill bit: 0
[14:04:20.081] <TB2> INFO: buffer corruption: 0
[14:04:20.096] <TB2> INFO: Decoding statistics:
[14:04:20.096] <TB2> INFO: General information:
[14:04:20.096] <TB2> INFO: 16bit words read: 3446228
[14:04:20.096] <TB2> INFO: valid events total: 353536
[14:04:20.096] <TB2> INFO: empty events: 18376
[14:04:20.096] <TB2> INFO: valid events with pixels: 335160
[14:04:20.096] <TB2> INFO: valid pixel hits: 662506
[14:04:20.096] <TB2> INFO: Event errors: 0
[14:04:20.096] <TB2> INFO: start marker: 0
[14:04:20.096] <TB2> INFO: stop marker: 0
[14:04:20.096] <TB2> INFO: overflow: 0
[14:04:20.096] <TB2> INFO: invalid 5bit words: 0
[14:04:20.097] <TB2> INFO: invalid XOR eye diagram: 0
[14:04:20.097] <TB2> INFO: frame (failed synchr.): 0
[14:04:20.097] <TB2> INFO: idle data (no TBM trl): 0
[14:04:20.097] <TB2> INFO: no data (only TBM hdr): 0
[14:04:20.097] <TB2> INFO: TBM errors: 0
[14:04:20.097] <TB2> INFO: flawed TBM headers: 0
[14:04:20.097] <TB2> INFO: flawed TBM trailers: 0
[14:04:20.097] <TB2> INFO: event ID mismatches: 0
[14:04:20.097] <TB2> INFO: ROC errors: 0
[14:04:20.097] <TB2> INFO: missing ROC header(s): 0
[14:04:20.097] <TB2> INFO: misplaced readback start: 0
[14:04:20.097] <TB2> INFO: Pixel decoding errors: 0
[14:04:20.097] <TB2> INFO: pixel data incomplete: 0
[14:04:20.097] <TB2> INFO: pixel address: 0
[14:04:20.097] <TB2> INFO: pulse height fill bit: 0
[14:04:20.097] <TB2> INFO: buffer corruption: 0
[14:04:20.097] <TB2> INFO: enter test to run
[14:04:20.097] <TB2> INFO: test: exit no parameter change
[14:04:20.218] <TB2> QUIET: Connection to board 149 closed.
[14:04:20.219] <TB2> INFO: pXar: this is the end, my friend