[11:02:57.327] <TB1> INFO: *** Welcome to pxar ***
[11:02:57.327] <TB1> INFO: *** Today: 2016/10/19
[11:02:57.333] <TB1> INFO: *** Version: c8ba-dirty
[11:02:57.333] <TB1> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters_C15.dat
[11:02:57.333] <TB1> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//tbmParameters_C1b.dat
[11:02:57.334] <TB1> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//defaultMaskFile.dat
[11:02:57.334] <TB1> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//trimParameters_C15.dat
[11:02:57.395] <TB1> INFO: clk: 4
[11:02:57.395] <TB1> INFO: ctr: 4
[11:02:57.395] <TB1> INFO: sda: 19
[11:02:57.395] <TB1> INFO: tin: 9
[11:02:57.395] <TB1> INFO: level: 15
[11:02:57.395] <TB1> INFO: triggerdelay: 0
[11:02:57.395] <TB1> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[11:02:57.395] <TB1> INFO: Log level: INFO
[11:02:57.403] <TB1> INFO: Found DTB DTB_WXC03A
[11:02:57.414] <TB1> QUIET: Connection to board DTB_WXC03A opened.
[11:02:57.416] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 154
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC03A
MAC address: 40D85511809A
Hostname: pixelDTB154
Comment:
------------------------------------------------------
[11:02:57.418] <TB1> INFO: RPC call hashes of host and DTB match: 486171790
[11:02:58.911] <TB1> INFO: DUT info:
[11:02:58.911] <TB1> INFO: The DUT currently contains the following objects:
[11:02:58.911] <TB1> INFO: 4 TBM Cores tbm10c (4 ON)
[11:02:58.911] <TB1> INFO: TBM Core alpha (0): 7 registers set
[11:02:58.911] <TB1> INFO: TBM Core beta (1): 7 registers set
[11:02:58.911] <TB1> INFO: TBM Core alpha (2): 7 registers set
[11:02:58.911] <TB1> INFO: TBM Core beta (3): 7 registers set
[11:02:58.911] <TB1> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[11:02:58.911] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:02:58.911] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:02:58.911] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:02:58.911] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:02:58.911] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:02:58.911] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:02:58.911] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:02:58.911] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:02:58.911] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:02:58.911] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:02:58.911] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:02:58.911] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:02:58.911] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:02:58.911] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:02:58.911] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:02:58.911] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:02:59.312] <TB1> INFO: enter 'restricted' command line mode
[11:02:59.312] <TB1> INFO: enter test to run
[11:02:59.312] <TB1> INFO: test: pretest no parameter change
[11:02:59.312] <TB1> INFO: running: pretest
[11:02:59.318] <TB1> INFO: ######################################################################
[11:02:59.319] <TB1> INFO: PixTestPretest::doTest()
[11:02:59.319] <TB1> INFO: ######################################################################
[11:02:59.320] <TB1> INFO: ----------------------------------------------------------------------
[11:02:59.320] <TB1> INFO: PixTestPretest::programROC()
[11:02:59.320] <TB1> INFO: ----------------------------------------------------------------------
[11:03:17.333] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:03:17.333] <TB1> INFO: IA differences per ROC: 16.9 16.9 19.3 19.3 16.1 17.7 18.5 20.1 18.5 20.9 18.5 20.1 17.7 19.3 19.3 16.9
[11:03:17.395] <TB1> INFO: ----------------------------------------------------------------------
[11:03:17.395] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:03:17.395] <TB1> INFO: ----------------------------------------------------------------------
[11:03:38.692] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 389.9 mA = 24.3688 mA/ROC
[11:03:38.693] <TB1> INFO: i(loss) [mA/ROC]: 20.1 20.1 20.1 20.1 19.3 19.3 20.1 20.1 19.3 20.1 19.3 19.3 19.3 20.1 20.1 19.3
[11:03:38.728] <TB1> INFO: ----------------------------------------------------------------------
[11:03:38.728] <TB1> INFO: PixTestPretest::findTiming()
[11:03:38.728] <TB1> INFO: ----------------------------------------------------------------------
[11:03:38.728] <TB1> INFO: PixTestCmd::init()

[11:04:10.932] <TB1> INFO: TBM phases: 160MHz: 7, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[11:04:10.932] <TB1> INFO: (success/tries = 100/100), width = 4
[11:04:12.433] <TB1> INFO: ----------------------------------------------------------------------
[11:04:12.433] <TB1> INFO: PixTestPretest::findWorkingPixel()
[11:04:12.433] <TB1> INFO: ----------------------------------------------------------------------
[11:04:12.528] <TB1> INFO: Expecting 231680 events.
[11:04:22.447] <TB1> INFO: 231680 events read in total (9327ms).
[11:04:22.455] <TB1> INFO: Test took 10017ms.
[11:04:22.698] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:04:22.733] <TB1> INFO: ----------------------------------------------------------------------
[11:04:22.733] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[11:04:22.733] <TB1> INFO: ----------------------------------------------------------------------
[11:04:22.827] <TB1> INFO: Expecting 231680 events.
[11:04:32.784] <TB1> INFO: 231680 events read in total (9364ms).
[11:04:32.796] <TB1> INFO: Test took 10058ms.
[11:04:33.071] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[11:04:33.071] <TB1> INFO: CalDel: 75 99 105 108 75 101 86 88 104 96 93 103 94 103 110 92
[11:04:33.071] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 53
[11:04:33.075] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters_C0.dat
[11:04:33.075] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters_C1.dat
[11:04:33.075] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters_C2.dat
[11:04:33.075] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters_C3.dat
[11:04:33.075] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters_C4.dat
[11:04:33.076] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters_C5.dat
[11:04:33.076] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters_C6.dat
[11:04:33.076] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters_C7.dat
[11:04:33.076] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters_C8.dat
[11:04:33.076] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters_C9.dat
[11:04:33.077] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters_C10.dat
[11:04:33.077] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters_C11.dat
[11:04:33.077] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters_C12.dat
[11:04:33.077] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters_C13.dat
[11:04:33.077] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters_C14.dat
[11:04:33.077] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters_C15.dat
[11:04:33.078] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//tbmParameters_C0a.dat
[11:04:33.078] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//tbmParameters_C0b.dat
[11:04:33.078] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//tbmParameters_C1a.dat
[11:04:33.078] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//tbmParameters_C1b.dat
[11:04:33.078] <TB1> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[11:04:33.130] <TB1> INFO: enter test to run
[11:04:33.130] <TB1> INFO: test: FullTest no parameter change
[11:04:33.130] <TB1> INFO: running: fulltest
[11:04:33.130] <TB1> INFO: ######################################################################
[11:04:33.130] <TB1> INFO: PixTestFullTest::doTest()
[11:04:33.130] <TB1> INFO: ######################################################################
[11:04:33.131] <TB1> INFO: ######################################################################
[11:04:33.131] <TB1> INFO: PixTestAlive::doTest()
[11:04:33.131] <TB1> INFO: ######################################################################
[11:04:33.132] <TB1> INFO: ----------------------------------------------------------------------
[11:04:33.132] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:04:33.132] <TB1> INFO: ----------------------------------------------------------------------
[11:04:33.372] <TB1> INFO: Expecting 41600 events.
[11:04:36.875] <TB1> INFO: 41600 events read in total (2911ms).
[11:04:36.876] <TB1> INFO: Test took 3743ms.
[11:04:37.112] <TB1> INFO: PixTestAlive::aliveTest() done
[11:04:37.112] <TB1> INFO: number of dead pixels (per ROC): 1 1 0 0 1 0 0 0 0 0 1 0 0 0 0 1
[11:04:37.113] <TB1> INFO: ----------------------------------------------------------------------
[11:04:37.113] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:04:37.113] <TB1> INFO: ----------------------------------------------------------------------
[11:04:37.356] <TB1> INFO: Expecting 41600 events.
[11:04:40.307] <TB1> INFO: 41600 events read in total (2359ms).
[11:04:40.308] <TB1> INFO: Test took 3191ms.
[11:04:40.308] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:04:40.545] <TB1> INFO: PixTestAlive::maskTest() done
[11:04:40.545] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:04:40.547] <TB1> INFO: ----------------------------------------------------------------------
[11:04:40.547] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:04:40.547] <TB1> INFO: ----------------------------------------------------------------------
[11:04:40.791] <TB1> INFO: Expecting 41600 events.
[11:04:44.318] <TB1> INFO: 41600 events read in total (2935ms).
[11:04:44.319] <TB1> INFO: Test took 3769ms.
[11:04:44.557] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[11:04:44.557] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:04:44.557] <TB1> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[11:04:44.557] <TB1> INFO: Decoding statistics:
[11:04:44.557] <TB1> INFO: General information:
[11:04:44.557] <TB1> INFO: 16bit words read: 0
[11:04:44.557] <TB1> INFO: valid events total: 0
[11:04:44.557] <TB1> INFO: empty events: 0
[11:04:44.557] <TB1> INFO: valid events with pixels: 0
[11:04:44.557] <TB1> INFO: valid pixel hits: 0
[11:04:44.557] <TB1> INFO: Event errors: 0
[11:04:44.557] <TB1> INFO: start marker: 0
[11:04:44.557] <TB1> INFO: stop marker: 0
[11:04:44.557] <TB1> INFO: overflow: 0
[11:04:44.557] <TB1> INFO: invalid 5bit words: 0
[11:04:44.557] <TB1> INFO: invalid XOR eye diagram: 0
[11:04:44.557] <TB1> INFO: frame (failed synchr.): 0
[11:04:44.557] <TB1> INFO: idle data (no TBM trl): 0
[11:04:44.557] <TB1> INFO: no data (only TBM hdr): 0
[11:04:44.557] <TB1> INFO: TBM errors: 0
[11:04:44.557] <TB1> INFO: flawed TBM headers: 0
[11:04:44.557] <TB1> INFO: flawed TBM trailers: 0
[11:04:44.557] <TB1> INFO: event ID mismatches: 0
[11:04:44.557] <TB1> INFO: ROC errors: 0
[11:04:44.557] <TB1> INFO: missing ROC header(s): 0
[11:04:44.557] <TB1> INFO: misplaced readback start: 0
[11:04:44.557] <TB1> INFO: Pixel decoding errors: 0
[11:04:44.558] <TB1> INFO: pixel data incomplete: 0
[11:04:44.558] <TB1> INFO: pixel address: 0
[11:04:44.558] <TB1> INFO: pulse height fill bit: 0
[11:04:44.558] <TB1> INFO: buffer corruption: 0
[11:04:44.564] <TB1> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C15.dat
[11:04:44.564] <TB1> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[11:04:44.564] <TB1> INFO: ######################################################################
[11:04:44.564] <TB1> INFO: PixTestReadback::doTest()
[11:04:44.564] <TB1> INFO: ######################################################################
[11:04:44.564] <TB1> INFO: ----------------------------------------------------------------------
[11:04:44.564] <TB1> INFO: PixTestReadback::CalibrateVd()
[11:04:44.564] <TB1> INFO: ----------------------------------------------------------------------
[11:04:54.538] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C0.dat
[11:04:54.538] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C1.dat
[11:04:54.539] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C2.dat
[11:04:54.539] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C3.dat
[11:04:54.539] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C4.dat
[11:04:54.539] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C5.dat
[11:04:54.539] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C6.dat
[11:04:54.539] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C7.dat
[11:04:54.539] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C8.dat
[11:04:54.539] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C9.dat
[11:04:54.539] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C10.dat
[11:04:54.539] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C11.dat
[11:04:54.539] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C12.dat
[11:04:54.539] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C13.dat
[11:04:54.539] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C14.dat
[11:04:54.540] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C15.dat
[11:04:54.569] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[11:04:54.569] <TB1> INFO: ----------------------------------------------------------------------
[11:04:54.569] <TB1> INFO: PixTestReadback::CalibrateVa()
[11:04:54.569] <TB1> INFO: ----------------------------------------------------------------------
[11:05:04.514] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C0.dat
[11:05:04.514] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C1.dat
[11:05:04.514] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C2.dat
[11:05:04.514] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C3.dat
[11:05:04.514] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C4.dat
[11:05:04.515] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C5.dat
[11:05:04.515] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C6.dat
[11:05:04.515] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C7.dat
[11:05:04.515] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C8.dat
[11:05:04.515] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C9.dat
[11:05:04.515] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C10.dat
[11:05:04.515] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C11.dat
[11:05:04.515] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C12.dat
[11:05:04.515] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C13.dat
[11:05:04.515] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C14.dat
[11:05:04.515] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C15.dat
[11:05:04.546] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[11:05:04.546] <TB1> INFO: ----------------------------------------------------------------------
[11:05:04.546] <TB1> INFO: PixTestReadback::readbackVbg()
[11:05:04.546] <TB1> INFO: ----------------------------------------------------------------------
[11:05:12.219] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[11:05:12.219] <TB1> INFO: ----------------------------------------------------------------------
[11:05:12.219] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[11:05:12.219] <TB1> INFO: ----------------------------------------------------------------------
[11:05:12.219] <TB1> INFO: Vbg will be calibrated using Vd calibration
[11:05:12.219] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 141calibrated Vbg = 1.16766 :::*/*/*/*/
[11:05:12.219] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 145calibrated Vbg = 1.17108 :::*/*/*/*/
[11:05:12.219] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 155.6calibrated Vbg = 1.17028 :::*/*/*/*/
[11:05:12.219] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 147.6calibrated Vbg = 1.16948 :::*/*/*/*/
[11:05:12.219] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 154.3calibrated Vbg = 1.17793 :::*/*/*/*/
[11:05:12.219] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 160.7calibrated Vbg = 1.18359 :::*/*/*/*/
[11:05:12.219] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 159calibrated Vbg = 1.17716 :::*/*/*/*/
[11:05:12.219] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 147.8calibrated Vbg = 1.17315 :::*/*/*/*/
[11:05:12.219] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 143.2calibrated Vbg = 1.16549 :::*/*/*/*/
[11:05:12.219] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 154.7calibrated Vbg = 1.16978 :::*/*/*/*/
[11:05:12.219] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 154.5calibrated Vbg = 1.16861 :::*/*/*/*/
[11:05:12.220] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 150.4calibrated Vbg = 1.16435 :::*/*/*/*/
[11:05:12.220] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 155.5calibrated Vbg = 1.16978 :::*/*/*/*/
[11:05:12.220] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 155calibrated Vbg = 1.16454 :::*/*/*/*/
[11:05:12.220] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 156.6calibrated Vbg = 1.17441 :::*/*/*/*/
[11:05:12.220] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 154.1calibrated Vbg = 1.17216 :::*/*/*/*/
[11:05:12.222] <TB1> INFO: ----------------------------------------------------------------------
[11:05:12.222] <TB1> INFO: PixTestReadback::CalibrateIa()
[11:05:12.222] <TB1> INFO: ----------------------------------------------------------------------
[11:07:53.088] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C0.dat
[11:07:53.088] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C1.dat
[11:07:53.088] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C2.dat
[11:07:53.089] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C3.dat
[11:07:53.089] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C4.dat
[11:07:53.089] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C5.dat
[11:07:53.089] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C6.dat
[11:07:53.089] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C7.dat
[11:07:53.089] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C8.dat
[11:07:53.089] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C9.dat
[11:07:53.089] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C10.dat
[11:07:53.089] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C11.dat
[11:07:53.089] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C12.dat
[11:07:53.089] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C13.dat
[11:07:53.089] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C14.dat
[11:07:53.089] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//readbackCal_C15.dat
[11:07:53.120] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[11:07:53.122] <TB1> INFO: PixTestReadback::doTest() done
[11:07:53.123] <TB1> INFO: Decoding statistics:
[11:07:53.123] <TB1> INFO: General information:
[11:07:53.123] <TB1> INFO: 16bit words read: 1536
[11:07:53.123] <TB1> INFO: valid events total: 256
[11:07:53.123] <TB1> INFO: empty events: 256
[11:07:53.123] <TB1> INFO: valid events with pixels: 0
[11:07:53.123] <TB1> INFO: valid pixel hits: 0
[11:07:53.123] <TB1> INFO: Event errors: 0
[11:07:53.123] <TB1> INFO: start marker: 0
[11:07:53.123] <TB1> INFO: stop marker: 0
[11:07:53.123] <TB1> INFO: overflow: 0
[11:07:53.123] <TB1> INFO: invalid 5bit words: 0
[11:07:53.123] <TB1> INFO: invalid XOR eye diagram: 0
[11:07:53.123] <TB1> INFO: frame (failed synchr.): 0
[11:07:53.123] <TB1> INFO: idle data (no TBM trl): 0
[11:07:53.123] <TB1> INFO: no data (only TBM hdr): 0
[11:07:53.123] <TB1> INFO: TBM errors: 0
[11:07:53.123] <TB1> INFO: flawed TBM headers: 0
[11:07:53.123] <TB1> INFO: flawed TBM trailers: 0
[11:07:53.123] <TB1> INFO: event ID mismatches: 0
[11:07:53.123] <TB1> INFO: ROC errors: 0
[11:07:53.123] <TB1> INFO: missing ROC header(s): 0
[11:07:53.123] <TB1> INFO: misplaced readback start: 0
[11:07:53.123] <TB1> INFO: Pixel decoding errors: 0
[11:07:53.123] <TB1> INFO: pixel data incomplete: 0
[11:07:53.123] <TB1> INFO: pixel address: 0
[11:07:53.123] <TB1> INFO: pulse height fill bit: 0
[11:07:53.123] <TB1> INFO: buffer corruption: 0
[11:07:53.173] <TB1> INFO: ######################################################################
[11:07:53.173] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:07:53.173] <TB1> INFO: ######################################################################
[11:07:53.176] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[11:07:53.229] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[11:07:53.229] <TB1> INFO: run 1 of 1
[11:07:53.485] <TB1> INFO: Expecting 3120000 events.
[11:08:24.501] <TB1> INFO: 658560 events read in total (30424ms).











[11:08:54.768] <TB1> INFO: 1310215 events read in total (60691ms).











[11:09:24.907] <TB1> INFO: 1956810 events read in total (90830ms).











[11:09:54.958] <TB1> INFO: 2600825 events read in total (120881ms).











[11:10:18.809] <TB1> INFO: 3120000 events read in total (144732ms).
[11:10:18.876] <TB1> INFO: Test took 145647ms.
[11:10:44.201] <TB1> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 171 seconds
[11:10:44.201] <TB1> INFO: number of dead bumps (per ROC): 9 6 0 0 0 0 0 0 1 0 0 1 30 8 4 39
[11:10:44.201] <TB1> INFO: separation cut (per ROC): 106 104 106 96 103 106 112 108 102 102 103 117 91 106 103 99
[11:10:44.201] <TB1> INFO: Decoding statistics:
[11:10:44.201] <TB1> INFO: General information:
[11:10:44.201] <TB1> INFO: 16bit words read: 0
[11:10:44.201] <TB1> INFO: valid events total: 0
[11:10:44.201] <TB1> INFO: empty events: 0
[11:10:44.201] <TB1> INFO: valid events with pixels: 0
[11:10:44.201] <TB1> INFO: valid pixel hits: 0
[11:10:44.201] <TB1> INFO: Event errors: 0
[11:10:44.201] <TB1> INFO: start marker: 0
[11:10:44.201] <TB1> INFO: stop marker: 0
[11:10:44.201] <TB1> INFO: overflow: 0
[11:10:44.201] <TB1> INFO: invalid 5bit words: 0
[11:10:44.201] <TB1> INFO: invalid XOR eye diagram: 0
[11:10:44.201] <TB1> INFO: frame (failed synchr.): 0
[11:10:44.201] <TB1> INFO: idle data (no TBM trl): 0
[11:10:44.201] <TB1> INFO: no data (only TBM hdr): 0
[11:10:44.201] <TB1> INFO: TBM errors: 0
[11:10:44.201] <TB1> INFO: flawed TBM headers: 0
[11:10:44.201] <TB1> INFO: flawed TBM trailers: 0
[11:10:44.201] <TB1> INFO: event ID mismatches: 0
[11:10:44.201] <TB1> INFO: ROC errors: 0
[11:10:44.201] <TB1> INFO: missing ROC header(s): 0
[11:10:44.201] <TB1> INFO: misplaced readback start: 0
[11:10:44.201] <TB1> INFO: Pixel decoding errors: 0
[11:10:44.201] <TB1> INFO: pixel data incomplete: 0
[11:10:44.201] <TB1> INFO: pixel address: 0
[11:10:44.201] <TB1> INFO: pulse height fill bit: 0
[11:10:44.201] <TB1> INFO: buffer corruption: 0
[11:10:44.241] <TB1> INFO: ######################################################################
[11:10:44.241] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:10:44.241] <TB1> INFO: ######################################################################
[11:10:44.241] <TB1> INFO: ----------------------------------------------------------------------
[11:10:44.241] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:10:44.241] <TB1> INFO: ----------------------------------------------------------------------
[11:10:44.241] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[11:10:44.254] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[11:10:44.254] <TB1> INFO: run 1 of 1
[11:10:44.524] <TB1> INFO: Expecting 36608000 events.
[11:11:07.788] <TB1> INFO: 676150 events read in total (22672ms).
[11:11:30.873] <TB1> INFO: 1342300 events read in total (45757ms).
[11:11:53.940] <TB1> INFO: 2004350 events read in total (68824ms).
[11:12:16.824] <TB1> INFO: 2666800 events read in total (91708ms).
[11:12:39.666] <TB1> INFO: 3330000 events read in total (114550ms).
[11:13:02.899] <TB1> INFO: 3993600 events read in total (137783ms).
[11:13:25.901] <TB1> INFO: 4656150 events read in total (160785ms).
[11:13:48.804] <TB1> INFO: 5318800 events read in total (183688ms).
[11:14:11.996] <TB1> INFO: 5981550 events read in total (206880ms).
[11:14:34.871] <TB1> INFO: 6643600 events read in total (229755ms).
[11:14:57.965] <TB1> INFO: 7305400 events read in total (252849ms).
[11:15:20.684] <TB1> INFO: 7968450 events read in total (275568ms).
[11:15:43.581] <TB1> INFO: 8631350 events read in total (298465ms).
[11:16:06.656] <TB1> INFO: 9292450 events read in total (321540ms).
[11:16:29.514] <TB1> INFO: 9954000 events read in total (344398ms).
[11:16:52.424] <TB1> INFO: 10616900 events read in total (367308ms).
[11:17:15.401] <TB1> INFO: 11278800 events read in total (390285ms).
[11:17:38.329] <TB1> INFO: 11939700 events read in total (413213ms).
[11:18:01.289] <TB1> INFO: 12599200 events read in total (436173ms).
[11:18:24.161] <TB1> INFO: 13259900 events read in total (459045ms).
[11:18:46.984] <TB1> INFO: 13919800 events read in total (481868ms).
[11:19:10.111] <TB1> INFO: 14579700 events read in total (504995ms).
[11:19:33.161] <TB1> INFO: 15239500 events read in total (528045ms).
[11:19:56.184] <TB1> INFO: 15898500 events read in total (551068ms).
[11:20:18.946] <TB1> INFO: 16559000 events read in total (573830ms).
[11:20:41.746] <TB1> INFO: 17218700 events read in total (596630ms).
[11:21:04.738] <TB1> INFO: 17878000 events read in total (619622ms).
[11:21:27.930] <TB1> INFO: 18536350 events read in total (642814ms).
[11:21:50.673] <TB1> INFO: 19192550 events read in total (665557ms).
[11:22:13.500] <TB1> INFO: 19848400 events read in total (688384ms).
[11:22:36.456] <TB1> INFO: 20503600 events read in total (711340ms).
[11:22:59.304] <TB1> INFO: 21159800 events read in total (734188ms).
[11:23:22.174] <TB1> INFO: 21813300 events read in total (757058ms).
[11:23:44.791] <TB1> INFO: 22465450 events read in total (779675ms).
[11:24:07.322] <TB1> INFO: 23121600 events read in total (802206ms).
[11:24:29.928] <TB1> INFO: 23775500 events read in total (824812ms).
[11:24:52.492] <TB1> INFO: 24429850 events read in total (847376ms).
[11:25:15.180] <TB1> INFO: 25083400 events read in total (870064ms).
[11:25:38.153] <TB1> INFO: 25736650 events read in total (893037ms).
[11:26:01.020] <TB1> INFO: 26390700 events read in total (915904ms).
[11:26:23.598] <TB1> INFO: 27045700 events read in total (938482ms).
[11:26:46.924] <TB1> INFO: 27699950 events read in total (961808ms).
[11:27:09.529] <TB1> INFO: 28352650 events read in total (984413ms).
[11:27:32.336] <TB1> INFO: 29004900 events read in total (1007220ms).
[11:27:54.834] <TB1> INFO: 29657350 events read in total (1029718ms).
[11:28:17.481] <TB1> INFO: 30309250 events read in total (1052365ms).
[11:28:40.129] <TB1> INFO: 30960650 events read in total (1075013ms).
[11:29:02.931] <TB1> INFO: 31612300 events read in total (1097815ms).
[11:29:25.672] <TB1> INFO: 32264200 events read in total (1120556ms).
[11:29:48.461] <TB1> INFO: 32916800 events read in total (1143345ms).
[11:30:10.001] <TB1> INFO: 33569350 events read in total (1165885ms).
[11:30:33.742] <TB1> INFO: 34222550 events read in total (1188626ms).
[11:30:56.346] <TB1> INFO: 34875700 events read in total (1211230ms).
[11:31:19.207] <TB1> INFO: 35529100 events read in total (1234091ms).
[11:31:41.934] <TB1> INFO: 36189400 events read in total (1256818ms).
[11:31:56.506] <TB1> INFO: 36608000 events read in total (1271390ms).
[11:31:56.631] <TB1> INFO: Test took 1272378ms.
[11:31:57.229] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:31:58.856] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:32:00.890] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:32:02.914] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:32:04.708] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:32:06.485] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:32:08.195] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:32:09.858] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:32:11.489] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:32:13.016] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:32:15.086] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:32:17.601] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:32:19.950] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:32:22.029] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:32:24.382] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:32:26.015] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:32:27.648] <TB1> INFO: PixTestScurves::scurves() done
[11:32:27.648] <TB1> INFO: Vcal mean: 113.60 104.57 119.69 100.94 109.67 113.21 123.19 108.10 111.11 111.38 111.27 124.88 109.43 110.76 106.88 116.79
[11:32:27.648] <TB1> INFO: Vcal RMS: 5.57 5.65 6.08 4.72 5.48 5.25 6.43 4.38 4.76 5.70 5.09 6.57 5.09 4.50 5.40 6.70
[11:32:27.648] <TB1> INFO: PixTestScurves::fullTest() done, duration: 1303 seconds
[11:32:27.648] <TB1> INFO: Decoding statistics:
[11:32:27.648] <TB1> INFO: General information:
[11:32:27.648] <TB1> INFO: 16bit words read: 0
[11:32:27.648] <TB1> INFO: valid events total: 0
[11:32:27.648] <TB1> INFO: empty events: 0
[11:32:27.648] <TB1> INFO: valid events with pixels: 0
[11:32:27.648] <TB1> INFO: valid pixel hits: 0
[11:32:27.648] <TB1> INFO: Event errors: 0
[11:32:27.648] <TB1> INFO: start marker: 0
[11:32:27.648] <TB1> INFO: stop marker: 0
[11:32:27.648] <TB1> INFO: overflow: 0
[11:32:27.648] <TB1> INFO: invalid 5bit words: 0
[11:32:27.648] <TB1> INFO: invalid XOR eye diagram: 0
[11:32:27.648] <TB1> INFO: frame (failed synchr.): 0
[11:32:27.648] <TB1> INFO: idle data (no TBM trl): 0
[11:32:27.648] <TB1> INFO: no data (only TBM hdr): 0
[11:32:27.648] <TB1> INFO: TBM errors: 0
[11:32:27.648] <TB1> INFO: flawed TBM headers: 0
[11:32:27.648] <TB1> INFO: flawed TBM trailers: 0
[11:32:27.648] <TB1> INFO: event ID mismatches: 0
[11:32:27.648] <TB1> INFO: ROC errors: 0
[11:32:27.648] <TB1> INFO: missing ROC header(s): 0
[11:32:27.648] <TB1> INFO: misplaced readback start: 0
[11:32:27.648] <TB1> INFO: Pixel decoding errors: 0
[11:32:27.648] <TB1> INFO: pixel data incomplete: 0
[11:32:27.648] <TB1> INFO: pixel address: 0
[11:32:27.649] <TB1> INFO: pulse height fill bit: 0
[11:32:27.649] <TB1> INFO: buffer corruption: 0
[11:32:27.717] <TB1> INFO: ######################################################################
[11:32:27.717] <TB1> INFO: PixTestTrim::doTest()
[11:32:27.717] <TB1> INFO: ######################################################################
[11:32:27.719] <TB1> INFO: ----------------------------------------------------------------------
[11:32:27.719] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[11:32:27.719] <TB1> INFO: ----------------------------------------------------------------------
[11:32:27.774] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:32:27.774] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:32:27.788] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:32:27.788] <TB1> INFO: run 1 of 1
[11:32:28.054] <TB1> INFO: Expecting 5025280 events.
[11:32:58.209] <TB1> INFO: 814368 events read in total (29550ms).
[11:33:28.552] <TB1> INFO: 1628872 events read in total (59894ms).
[11:33:58.658] <TB1> INFO: 2442032 events read in total (90000ms).
[11:34:28.826] <TB1> INFO: 3252952 events read in total (120167ms).
[11:34:58.762] <TB1> INFO: 4061992 events read in total (150104ms).
[11:35:28.282] <TB1> INFO: 4869744 events read in total (179623ms).
[11:35:34.271] <TB1> INFO: 5025280 events read in total (185612ms).
[11:35:34.320] <TB1> INFO: Test took 186532ms.
[11:35:51.854] <TB1> INFO: ROC 0 VthrComp = 128
[11:35:51.854] <TB1> INFO: ROC 1 VthrComp = 111
[11:35:51.855] <TB1> INFO: ROC 2 VthrComp = 130
[11:35:51.855] <TB1> INFO: ROC 3 VthrComp = 113
[11:35:51.855] <TB1> INFO: ROC 4 VthrComp = 117
[11:35:51.857] <TB1> INFO: ROC 5 VthrComp = 118
[11:35:51.857] <TB1> INFO: ROC 6 VthrComp = 132
[11:35:51.857] <TB1> INFO: ROC 7 VthrComp = 124
[11:35:51.857] <TB1> INFO: ROC 8 VthrComp = 120
[11:35:51.857] <TB1> INFO: ROC 9 VthrComp = 113
[11:35:51.857] <TB1> INFO: ROC 10 VthrComp = 119
[11:35:51.858] <TB1> INFO: ROC 11 VthrComp = 131
[11:35:51.858] <TB1> INFO: ROC 12 VthrComp = 115
[11:35:51.858] <TB1> INFO: ROC 13 VthrComp = 125
[11:35:51.858] <TB1> INFO: ROC 14 VthrComp = 113
[11:35:51.858] <TB1> INFO: ROC 15 VthrComp = 124
[11:35:52.109] <TB1> INFO: Expecting 41600 events.
[11:35:55.568] <TB1> INFO: 41600 events read in total (2867ms).
[11:35:55.569] <TB1> INFO: Test took 3709ms.
[11:35:55.579] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:35:55.579] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:35:55.591] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:35:55.591] <TB1> INFO: run 1 of 1
[11:35:55.869] <TB1> INFO: Expecting 5025280 events.
[11:36:22.794] <TB1> INFO: 588056 events read in total (26333ms).
[11:36:48.548] <TB1> INFO: 1175384 events read in total (52087ms).
[11:37:14.155] <TB1> INFO: 1764016 events read in total (77694ms).
[11:37:40.090] <TB1> INFO: 2350896 events read in total (103629ms).
[11:38:05.797] <TB1> INFO: 2936496 events read in total (129336ms).
[11:38:31.485] <TB1> INFO: 3521568 events read in total (155024ms).
[11:38:57.147] <TB1> INFO: 4105792 events read in total (180686ms).
[11:39:22.583] <TB1> INFO: 4689128 events read in total (206122ms).
[11:39:37.866] <TB1> INFO: 5025280 events read in total (221405ms).
[11:39:37.945] <TB1> INFO: Test took 222354ms.
[11:40:00.837] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 58.2766 for pixel 16/8 mean/min/max = 45.4457/32.4742/58.4173
[11:40:00.838] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 59.8854 for pixel 17/77 mean/min/max = 47.0144/33.7763/60.2525
[11:40:00.838] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 60.4636 for pixel 15/11 mean/min/max = 45.5949/30.7082/60.4815
[11:40:00.838] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 55.6901 for pixel 2/8 mean/min/max = 44.2931/32.6799/55.9064
[11:40:00.839] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 58.6242 for pixel 11/70 mean/min/max = 45.1473/31.6514/58.6431
[11:40:00.839] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 60.3994 for pixel 12/79 mean/min/max = 46.0372/31.4223/60.6521
[11:40:00.839] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 61.5653 for pixel 13/0 mean/min/max = 47.6296/33.493/61.7662
[11:40:00.840] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 55.0142 for pixel 10/1 mean/min/max = 43.5163/31.4735/55.5592
[11:40:00.840] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 58.0748 for pixel 45/77 mean/min/max = 45.5859/33.0146/58.1572
[11:40:00.840] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 62.2798 for pixel 5/78 mean/min/max = 47.0645/31.8442/62.2848
[11:40:00.841] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 57.8804 for pixel 7/53 mean/min/max = 44.9033/31.8476/57.9591
[11:40:00.841] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 61.0224 for pixel 5/4 mean/min/max = 47.1333/33.1241/61.1424
[11:40:00.841] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 58.906 for pixel 17/31 mean/min/max = 45.5585/32.1078/59.0092
[11:40:00.842] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 55.8198 for pixel 15/79 mean/min/max = 43.794/31.6707/55.9174
[11:40:00.842] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 58.8792 for pixel 12/1 mean/min/max = 45.7443/32.6033/58.8854
[11:40:00.842] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 60.4277 for pixel 0/3 mean/min/max = 45.7023/30.4664/60.9382
[11:40:00.843] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:40:00.931] <TB1> INFO: Expecting 411648 events.
[11:40:10.327] <TB1> INFO: 411648 events read in total (8804ms).
[11:40:10.337] <TB1> INFO: Expecting 411648 events.
[11:40:19.570] <TB1> INFO: 411648 events read in total (8830ms).
[11:40:19.582] <TB1> INFO: Expecting 411648 events.
[11:40:28.706] <TB1> INFO: 411648 events read in total (8721ms).
[11:40:28.720] <TB1> INFO: Expecting 411648 events.
[11:40:38.123] <TB1> INFO: 411648 events read in total (9000ms).
[11:40:38.140] <TB1> INFO: Expecting 411648 events.
[11:40:47.696] <TB1> INFO: 411648 events read in total (9153ms).
[11:40:47.717] <TB1> INFO: Expecting 411648 events.
[11:40:57.238] <TB1> INFO: 411648 events read in total (9118ms).
[11:40:57.260] <TB1> INFO: Expecting 411648 events.
[11:41:06.886] <TB1> INFO: 411648 events read in total (9222ms).
[11:41:06.912] <TB1> INFO: Expecting 411648 events.
[11:41:16.586] <TB1> INFO: 411648 events read in total (9271ms).
[11:41:16.618] <TB1> INFO: Expecting 411648 events.
[11:41:26.190] <TB1> INFO: 411648 events read in total (9169ms).
[11:41:26.255] <TB1> INFO: Expecting 411648 events.
[11:41:35.768] <TB1> INFO: 411648 events read in total (9110ms).
[11:41:35.813] <TB1> INFO: Expecting 411648 events.
[11:41:45.342] <TB1> INFO: 411648 events read in total (9126ms).
[11:41:45.423] <TB1> INFO: Expecting 411648 events.
[11:41:54.903] <TB1> INFO: 411648 events read in total (9077ms).
[11:41:55.119] <TB1> INFO: Expecting 411648 events.
[11:42:04.677] <TB1> INFO: 411648 events read in total (9155ms).
[11:42:04.753] <TB1> INFO: Expecting 411648 events.
[11:42:14.368] <TB1> INFO: 411648 events read in total (9212ms).
[11:42:14.427] <TB1> INFO: Expecting 411648 events.
[11:42:23.861] <TB1> INFO: 411648 events read in total (9031ms).
[11:42:23.917] <TB1> INFO: Expecting 411648 events.
[11:42:33.218] <TB1> INFO: 411648 events read in total (8898ms).
[11:42:33.381] <TB1> INFO: Test took 152538ms.
[11:42:34.217] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[11:42:34.231] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:42:34.231] <TB1> INFO: run 1 of 1
[11:42:34.477] <TB1> INFO: Expecting 5025280 events.
[11:43:00.873] <TB1> INFO: 583280 events read in total (25804ms).
[11:43:26.816] <TB1> INFO: 1165400 events read in total (51748ms).
[11:43:52.876] <TB1> INFO: 1749016 events read in total (77807ms).
[11:44:19.065] <TB1> INFO: 2331480 events read in total (103996ms).
[11:44:45.423] <TB1> INFO: 2913496 events read in total (130354ms).
[11:45:11.383] <TB1> INFO: 3497256 events read in total (156314ms).
[11:45:37.485] <TB1> INFO: 4079240 events read in total (182416ms).
[11:46:03.609] <TB1> INFO: 4662056 events read in total (208540ms).
[11:46:19.881] <TB1> INFO: 5025280 events read in total (224812ms).
[11:46:20.012] <TB1> INFO: Test took 225780ms.
[11:46:44.511] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 2.500000 .. 139.977005
[11:46:44.795] <TB1> INFO: Expecting 208000 events.
[11:46:54.965] <TB1> INFO: 208000 events read in total (9579ms).
[11:46:54.967] <TB1> INFO: Test took 10454ms.
[11:46:55.015] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 2 .. 149 (-1/-1) hits flags = 528 (plus default)
[11:46:55.029] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:46:55.029] <TB1> INFO: run 1 of 1
[11:46:55.307] <TB1> INFO: Expecting 4925440 events.
[11:47:21.630] <TB1> INFO: 585448 events read in total (25732ms).
[11:47:46.746] <TB1> INFO: 1170664 events read in total (50848ms).
[11:48:12.133] <TB1> INFO: 1755760 events read in total (76235ms).
[11:48:37.555] <TB1> INFO: 2341208 events read in total (101657ms).
[11:49:03.474] <TB1> INFO: 2926136 events read in total (127576ms).
[11:49:29.420] <TB1> INFO: 3510544 events read in total (153522ms).
[11:49:55.114] <TB1> INFO: 4094552 events read in total (179216ms).
[11:50:20.281] <TB1> INFO: 4678536 events read in total (204383ms).
[11:50:31.524] <TB1> INFO: 4925440 events read in total (215626ms).
[11:50:31.602] <TB1> INFO: Test took 216573ms.
[11:50:54.687] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 27.114241 .. 46.390362
[11:50:54.925] <TB1> INFO: Expecting 208000 events.
[11:51:04.761] <TB1> INFO: 208000 events read in total (9245ms).
[11:51:04.762] <TB1> INFO: Test took 10074ms.
[11:51:04.842] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 56 (-1/-1) hits flags = 528 (plus default)
[11:51:04.855] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:51:04.855] <TB1> INFO: run 1 of 1
[11:51:05.134] <TB1> INFO: Expecting 1331200 events.
[11:51:32.988] <TB1> INFO: 654064 events read in total (27263ms).
[11:52:00.419] <TB1> INFO: 1306864 events read in total (54695ms).
[11:52:01.833] <TB1> INFO: 1331200 events read in total (56108ms).
[11:52:01.861] <TB1> INFO: Test took 57005ms.
[11:52:15.501] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 26.417246 .. 44.914127
[11:52:15.739] <TB1> INFO: Expecting 208000 events.
[11:52:25.833] <TB1> INFO: 208000 events read in total (9503ms).
[11:52:25.835] <TB1> INFO: Test took 10333ms.
[11:52:25.906] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 16 .. 54 (-1/-1) hits flags = 528 (plus default)
[11:52:25.920] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:52:25.920] <TB1> INFO: run 1 of 1
[11:52:26.223] <TB1> INFO: Expecting 1297920 events.
[11:52:54.636] <TB1> INFO: 667352 events read in total (27822ms).
[11:53:20.819] <TB1> INFO: 1297920 events read in total (54006ms).
[11:53:20.856] <TB1> INFO: Test took 54937ms.
[11:53:33.464] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 25.405511 .. 42.466495
[11:53:33.742] <TB1> INFO: Expecting 208000 events.
[11:53:43.468] <TB1> INFO: 208000 events read in total (9135ms).
[11:53:43.469] <TB1> INFO: Test took 10003ms.
[11:53:43.517] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 52 (-1/-1) hits flags = 528 (plus default)
[11:53:43.530] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:53:43.530] <TB1> INFO: run 1 of 1
[11:53:43.808] <TB1> INFO: Expecting 1264640 events.
[11:54:12.784] <TB1> INFO: 681128 events read in total (28384ms).
[11:54:37.081] <TB1> INFO: 1264640 events read in total (52681ms).
[11:54:37.109] <TB1> INFO: Test took 53579ms.
[11:54:51.051] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:54:51.051] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[11:54:51.065] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:54:51.065] <TB1> INFO: run 1 of 1
[11:54:51.331] <TB1> INFO: Expecting 1364480 events.
[11:55:19.915] <TB1> INFO: 667096 events read in total (27992ms).
[11:55:47.675] <TB1> INFO: 1333792 events read in total (55752ms).
[11:55:49.370] <TB1> INFO: 1364480 events read in total (57447ms).
[11:55:49.396] <TB1> INFO: Test took 58331ms.
[11:56:03.269] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C0.dat
[11:56:03.275] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C1.dat
[11:56:03.276] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C2.dat
[11:56:03.277] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C3.dat
[11:56:03.277] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C4.dat
[11:56:03.278] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C5.dat
[11:56:03.278] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C6.dat
[11:56:03.278] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C7.dat
[11:56:03.278] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C8.dat
[11:56:03.278] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C9.dat
[11:56:03.278] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C10.dat
[11:56:03.279] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C11.dat
[11:56:03.279] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C12.dat
[11:56:03.279] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C13.dat
[11:56:03.279] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C14.dat
[11:56:03.279] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C15.dat
[11:56:03.279] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//trimParameters35_C0.dat
[11:56:03.287] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//trimParameters35_C1.dat
[11:56:03.294] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//trimParameters35_C2.dat
[11:56:03.302] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//trimParameters35_C3.dat
[11:56:03.309] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//trimParameters35_C4.dat
[11:56:03.317] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//trimParameters35_C5.dat
[11:56:03.324] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//trimParameters35_C6.dat
[11:56:03.331] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//trimParameters35_C7.dat
[11:56:03.339] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//trimParameters35_C8.dat
[11:56:03.346] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//trimParameters35_C9.dat
[11:56:03.354] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//trimParameters35_C10.dat
[11:56:03.361] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//trimParameters35_C11.dat
[11:56:03.368] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//trimParameters35_C12.dat
[11:56:03.376] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//trimParameters35_C13.dat
[11:56:03.383] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//trimParameters35_C14.dat
[11:56:03.391] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//trimParameters35_C15.dat
[11:56:03.398] <TB1> INFO: PixTestTrim::trimTest() done
[11:56:03.398] <TB1> INFO: vtrim: 129 140 148 136 126 115 166 128 135 153 122 135 140 127 129 115
[11:56:03.398] <TB1> INFO: vthrcomp: 128 111 130 113 117 118 132 124 120 113 119 131 115 125 113 124
[11:56:03.398] <TB1> INFO: vcal mean: 34.97 34.99 34.91 34.98 34.94 34.98 34.98 34.95 34.93 34.97 34.96 35.03 34.98 34.98 34.96 34.94
[11:56:03.398] <TB1> INFO: vcal RMS: 1.12 1.10 1.10 0.90 1.23 1.05 1.08 0.93 0.99 1.06 1.12 1.06 1.03 0.98 0.99 1.24
[11:56:03.398] <TB1> INFO: bits mean: 9.44 8.51 9.87 9.55 9.43 9.56 9.18 10.12 9.52 9.37 9.38 9.23 9.79 10.01 9.76 9.17
[11:56:03.398] <TB1> INFO: bits RMS: 2.67 2.74 2.66 2.66 2.80 2.71 2.51 2.59 2.55 2.70 2.78 2.55 2.52 2.65 2.53 3.00
[11:56:03.407] <TB1> INFO: ----------------------------------------------------------------------
[11:56:03.407] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[11:56:03.407] <TB1> INFO: ----------------------------------------------------------------------
[11:56:03.409] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[11:56:03.423] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[11:56:03.423] <TB1> INFO: run 1 of 1
[11:56:03.668] <TB1> INFO: Expecting 4160000 events.
[11:56:36.220] <TB1> INFO: 744420 events read in total (31960ms).
[11:57:07.786] <TB1> INFO: 1484335 events read in total (63526ms).
[11:57:39.513] <TB1> INFO: 2220765 events read in total (95253ms).
[11:58:11.236] <TB1> INFO: 2951910 events read in total (126976ms).
[11:58:42.702] <TB1> INFO: 3680615 events read in total (158442ms).
[11:59:03.588] <TB1> INFO: 4160000 events read in total (179328ms).
[11:59:03.687] <TB1> INFO: Test took 180263ms.
[11:59:30.070] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 198 (-1/-1) hits flags = 528 (plus default)
[11:59:30.083] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[11:59:30.083] <TB1> INFO: run 1 of 1
[11:59:30.319] <TB1> INFO: Expecting 4139200 events.
[12:00:03.022] <TB1> INFO: 723495 events read in total (32111ms).
[12:00:34.988] <TB1> INFO: 1443030 events read in total (64077ms).
[12:01:06.688] <TB1> INFO: 2158935 events read in total (95777ms).
[12:01:38.137] <TB1> INFO: 2869140 events read in total (127226ms).
[12:02:09.747] <TB1> INFO: 3577420 events read in total (158836ms).
[12:02:35.057] <TB1> INFO: 4139200 events read in total (184146ms).
[12:02:35.137] <TB1> INFO: Test took 185054ms.
[12:03:03.345] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 184 (-1/-1) hits flags = 528 (plus default)
[12:03:03.359] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[12:03:03.359] <TB1> INFO: run 1 of 1
[12:03:03.595] <TB1> INFO: Expecting 3848000 events.
[12:03:35.991] <TB1> INFO: 743765 events read in total (31805ms).
[12:04:08.070] <TB1> INFO: 1483280 events read in total (63884ms).
[12:04:40.067] <TB1> INFO: 2217445 events read in total (95881ms).
[12:05:12.185] <TB1> INFO: 2946215 events read in total (127999ms).
[12:05:44.651] <TB1> INFO: 3672280 events read in total (160465ms).
[12:05:52.656] <TB1> INFO: 3848000 events read in total (168470ms).
[12:05:52.714] <TB1> INFO: Test took 169355ms.
[12:06:16.251] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 185 (-1/-1) hits flags = 528 (plus default)
[12:06:16.265] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[12:06:16.265] <TB1> INFO: run 1 of 1
[12:06:16.526] <TB1> INFO: Expecting 3868800 events.
[12:06:49.424] <TB1> INFO: 742745 events read in total (32306ms).
[12:07:20.543] <TB1> INFO: 1480630 events read in total (63425ms).
[12:07:52.527] <TB1> INFO: 2213645 events read in total (95409ms).
[12:08:24.189] <TB1> INFO: 2941175 events read in total (127071ms).
[12:08:55.770] <TB1> INFO: 3665970 events read in total (158652ms).
[12:09:04.887] <TB1> INFO: 3868800 events read in total (167769ms).
[12:09:04.942] <TB1> INFO: Test took 168676ms.
[12:09:28.147] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 185 (-1/-1) hits flags = 528 (plus default)
[12:09:28.161] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[12:09:28.161] <TB1> INFO: run 1 of 1
[12:09:28.438] <TB1> INFO: Expecting 3868800 events.
[12:10:01.238] <TB1> INFO: 742695 events read in total (32209ms).
[12:10:32.705] <TB1> INFO: 1480585 events read in total (63676ms).
[12:11:04.543] <TB1> INFO: 2213685 events read in total (95515ms).
[12:11:36.052] <TB1> INFO: 2941295 events read in total (127023ms).
[12:12:07.846] <TB1> INFO: 3666310 events read in total (158817ms).
[12:12:16.854] <TB1> INFO: 3868800 events read in total (167825ms).
[12:12:16.908] <TB1> INFO: Test took 168747ms.
[12:12:40.639] <TB1> INFO: PixTestTrim::trimBitTest() done
[12:12:40.640] <TB1> INFO: PixTestTrim::doTest() done, duration: 2412 seconds
[12:12:40.640] <TB1> INFO: Decoding statistics:
[12:12:40.640] <TB1> INFO: General information:
[12:12:40.640] <TB1> INFO: 16bit words read: 0
[12:12:40.640] <TB1> INFO: valid events total: 0
[12:12:40.640] <TB1> INFO: empty events: 0
[12:12:40.640] <TB1> INFO: valid events with pixels: 0
[12:12:40.640] <TB1> INFO: valid pixel hits: 0
[12:12:40.640] <TB1> INFO: Event errors: 0
[12:12:40.640] <TB1> INFO: start marker: 0
[12:12:40.640] <TB1> INFO: stop marker: 0
[12:12:40.640] <TB1> INFO: overflow: 0
[12:12:40.640] <TB1> INFO: invalid 5bit words: 0
[12:12:40.640] <TB1> INFO: invalid XOR eye diagram: 0
[12:12:40.640] <TB1> INFO: frame (failed synchr.): 0
[12:12:40.640] <TB1> INFO: idle data (no TBM trl): 0
[12:12:40.640] <TB1> INFO: no data (only TBM hdr): 0
[12:12:40.640] <TB1> INFO: TBM errors: 0
[12:12:40.640] <TB1> INFO: flawed TBM headers: 0
[12:12:40.640] <TB1> INFO: flawed TBM trailers: 0
[12:12:40.640] <TB1> INFO: event ID mismatches: 0
[12:12:40.640] <TB1> INFO: ROC errors: 0
[12:12:40.640] <TB1> INFO: missing ROC header(s): 0
[12:12:40.640] <TB1> INFO: misplaced readback start: 0
[12:12:40.640] <TB1> INFO: Pixel decoding errors: 0
[12:12:40.640] <TB1> INFO: pixel data incomplete: 0
[12:12:40.640] <TB1> INFO: pixel address: 0
[12:12:40.640] <TB1> INFO: pulse height fill bit: 0
[12:12:40.640] <TB1> INFO: buffer corruption: 0
[12:12:41.323] <TB1> INFO: ######################################################################
[12:12:41.323] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:12:41.323] <TB1> INFO: ######################################################################
[12:12:41.569] <TB1> INFO: Expecting 41600 events.
[12:12:45.096] <TB1> INFO: 41600 events read in total (2936ms).
[12:12:45.097] <TB1> INFO: Test took 3773ms.
[12:12:45.575] <TB1> INFO: Expecting 41600 events.
[12:12:49.115] <TB1> INFO: 41600 events read in total (2948ms).
[12:12:49.115] <TB1> INFO: Test took 3814ms.
[12:12:49.408] <TB1> INFO: Expecting 41600 events.
[12:12:52.941] <TB1> INFO: 41600 events read in total (2941ms).
[12:12:52.942] <TB1> INFO: Test took 3802ms.
[12:12:53.234] <TB1> INFO: Expecting 41600 events.
[12:12:56.756] <TB1> INFO: 41600 events read in total (2931ms).
[12:12:56.757] <TB1> INFO: Test took 3788ms.
[12:12:57.046] <TB1> INFO: Expecting 41600 events.
[12:13:00.617] <TB1> INFO: 41600 events read in total (2979ms).
[12:13:00.617] <TB1> INFO: Test took 3836ms.
[12:13:00.907] <TB1> INFO: Expecting 41600 events.
[12:13:04.517] <TB1> INFO: 41600 events read in total (3018ms).
[12:13:04.518] <TB1> INFO: Test took 3876ms.
[12:13:04.806] <TB1> INFO: Expecting 41600 events.
[12:13:08.299] <TB1> INFO: 41600 events read in total (2901ms).
[12:13:08.299] <TB1> INFO: Test took 3757ms.
[12:13:08.588] <TB1> INFO: Expecting 41600 events.
[12:13:12.162] <TB1> INFO: 41600 events read in total (2983ms).
[12:13:12.163] <TB1> INFO: Test took 3840ms.
[12:13:12.454] <TB1> INFO: Expecting 41600 events.
[12:13:15.957] <TB1> INFO: 41600 events read in total (2912ms).
[12:13:15.958] <TB1> INFO: Test took 3769ms.
[12:13:16.250] <TB1> INFO: Expecting 41600 events.
[12:13:19.998] <TB1> INFO: 41600 events read in total (3156ms).
[12:13:19.999] <TB1> INFO: Test took 4014ms.
[12:13:20.289] <TB1> INFO: Expecting 41600 events.
[12:13:23.872] <TB1> INFO: 41600 events read in total (2991ms).
[12:13:23.874] <TB1> INFO: Test took 3851ms.
[12:13:24.165] <TB1> INFO: Expecting 41600 events.
[12:13:27.647] <TB1> INFO: 41600 events read in total (2890ms).
[12:13:27.648] <TB1> INFO: Test took 3748ms.
[12:13:27.990] <TB1> INFO: Expecting 41600 events.
[12:13:31.502] <TB1> INFO: 41600 events read in total (2920ms).
[12:13:31.503] <TB1> INFO: Test took 3828ms.
[12:13:31.792] <TB1> INFO: Expecting 41600 events.
[12:13:35.293] <TB1> INFO: 41600 events read in total (2909ms).
[12:13:35.294] <TB1> INFO: Test took 3766ms.
[12:13:35.583] <TB1> INFO: Expecting 41600 events.
[12:13:39.066] <TB1> INFO: 41600 events read in total (2891ms).
[12:13:39.067] <TB1> INFO: Test took 3749ms.
[12:13:39.356] <TB1> INFO: Expecting 41600 events.
[12:13:42.912] <TB1> INFO: 41600 events read in total (2964ms).
[12:13:42.913] <TB1> INFO: Test took 3822ms.
[12:13:43.202] <TB1> INFO: Expecting 41600 events.
[12:13:46.660] <TB1> INFO: 41600 events read in total (2867ms).
[12:13:46.661] <TB1> INFO: Test took 3724ms.
[12:13:46.954] <TB1> INFO: Expecting 41600 events.
[12:13:50.523] <TB1> INFO: 41600 events read in total (2974ms).
[12:13:50.524] <TB1> INFO: Test took 3835ms.
[12:13:50.813] <TB1> INFO: Expecting 41600 events.
[12:13:54.453] <TB1> INFO: 41600 events read in total (3048ms).
[12:13:54.454] <TB1> INFO: Test took 3905ms.
[12:13:54.780] <TB1> INFO: Expecting 41600 events.
[12:13:58.297] <TB1> INFO: 41600 events read in total (2925ms).
[12:13:58.298] <TB1> INFO: Test took 3819ms.
[12:13:58.589] <TB1> INFO: Expecting 41600 events.
[12:14:02.055] <TB1> INFO: 41600 events read in total (2875ms).
[12:14:02.057] <TB1> INFO: Test took 3733ms.
[12:14:02.348] <TB1> INFO: Expecting 41600 events.
[12:14:05.904] <TB1> INFO: 41600 events read in total (2963ms).
[12:14:05.905] <TB1> INFO: Test took 3822ms.
[12:14:06.197] <TB1> INFO: Expecting 41600 events.
[12:14:09.678] <TB1> INFO: 41600 events read in total (2890ms).
[12:14:09.678] <TB1> INFO: Test took 3748ms.
[12:14:09.968] <TB1> INFO: Expecting 41600 events.
[12:14:13.467] <TB1> INFO: 41600 events read in total (2908ms).
[12:14:13.468] <TB1> INFO: Test took 3765ms.
[12:14:13.757] <TB1> INFO: Expecting 41600 events.
[12:14:17.262] <TB1> INFO: 41600 events read in total (2914ms).
[12:14:17.262] <TB1> INFO: Test took 3770ms.
[12:14:17.553] <TB1> INFO: Expecting 41600 events.
[12:14:21.089] <TB1> INFO: 41600 events read in total (2944ms).
[12:14:21.090] <TB1> INFO: Test took 3801ms.
[12:14:21.380] <TB1> INFO: Expecting 41600 events.
[12:14:24.991] <TB1> INFO: 41600 events read in total (3019ms).
[12:14:24.992] <TB1> INFO: Test took 3877ms.
[12:14:25.284] <TB1> INFO: Expecting 41600 events.
[12:14:28.912] <TB1> INFO: 41600 events read in total (3036ms).
[12:14:28.912] <TB1> INFO: Test took 3893ms.
[12:14:29.204] <TB1> INFO: Expecting 41600 events.
[12:14:32.762] <TB1> INFO: 41600 events read in total (2966ms).
[12:14:32.762] <TB1> INFO: Test took 3823ms.
[12:14:33.052] <TB1> INFO: Expecting 2560 events.
[12:14:33.936] <TB1> INFO: 2560 events read in total (292ms).
[12:14:33.937] <TB1> INFO: Test took 1162ms.
[12:14:34.245] <TB1> INFO: Expecting 2560 events.
[12:14:35.132] <TB1> INFO: 2560 events read in total (295ms).
[12:14:35.132] <TB1> INFO: Test took 1194ms.
[12:14:35.440] <TB1> INFO: Expecting 2560 events.
[12:14:36.330] <TB1> INFO: 2560 events read in total (298ms).
[12:14:36.330] <TB1> INFO: Test took 1198ms.
[12:14:36.638] <TB1> INFO: Expecting 2560 events.
[12:14:37.522] <TB1> INFO: 2560 events read in total (292ms).
[12:14:37.522] <TB1> INFO: Test took 1191ms.
[12:14:37.829] <TB1> INFO: Expecting 2560 events.
[12:14:38.715] <TB1> INFO: 2560 events read in total (294ms).
[12:14:38.715] <TB1> INFO: Test took 1192ms.
[12:14:39.024] <TB1> INFO: Expecting 2560 events.
[12:14:39.912] <TB1> INFO: 2560 events read in total (296ms).
[12:14:39.913] <TB1> INFO: Test took 1197ms.
[12:14:40.220] <TB1> INFO: Expecting 2560 events.
[12:14:41.105] <TB1> INFO: 2560 events read in total (293ms).
[12:14:41.105] <TB1> INFO: Test took 1192ms.
[12:14:41.413] <TB1> INFO: Expecting 2560 events.
[12:14:42.295] <TB1> INFO: 2560 events read in total (290ms).
[12:14:42.295] <TB1> INFO: Test took 1189ms.
[12:14:42.602] <TB1> INFO: Expecting 2560 events.
[12:14:43.490] <TB1> INFO: 2560 events read in total (297ms).
[12:14:43.491] <TB1> INFO: Test took 1195ms.
[12:14:43.797] <TB1> INFO: Expecting 2560 events.
[12:14:44.684] <TB1> INFO: 2560 events read in total (295ms).
[12:14:44.684] <TB1> INFO: Test took 1192ms.
[12:14:44.991] <TB1> INFO: Expecting 2560 events.
[12:14:45.876] <TB1> INFO: 2560 events read in total (293ms).
[12:14:45.877] <TB1> INFO: Test took 1192ms.
[12:14:46.184] <TB1> INFO: Expecting 2560 events.
[12:14:47.071] <TB1> INFO: 2560 events read in total (296ms).
[12:14:47.071] <TB1> INFO: Test took 1193ms.
[12:14:47.378] <TB1> INFO: Expecting 2560 events.
[12:14:48.262] <TB1> INFO: 2560 events read in total (292ms).
[12:14:48.262] <TB1> INFO: Test took 1190ms.
[12:14:48.570] <TB1> INFO: Expecting 2560 events.
[12:14:49.453] <TB1> INFO: 2560 events read in total (291ms).
[12:14:49.453] <TB1> INFO: Test took 1190ms.
[12:14:49.762] <TB1> INFO: Expecting 2560 events.
[12:14:50.647] <TB1> INFO: 2560 events read in total (293ms).
[12:14:50.647] <TB1> INFO: Test took 1194ms.
[12:14:50.956] <TB1> INFO: Expecting 2560 events.
[12:14:51.844] <TB1> INFO: 2560 events read in total (296ms).
[12:14:51.844] <TB1> INFO: Test took 1196ms.
[12:14:51.847] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:14:52.153] <TB1> INFO: Expecting 655360 events.
[12:15:07.192] <TB1> INFO: 655360 events read in total (14448ms).
[12:15:07.208] <TB1> INFO: Expecting 655360 events.
[12:15:21.986] <TB1> INFO: 655360 events read in total (14375ms).
[12:15:22.006] <TB1> INFO: Expecting 655360 events.
[12:15:36.897] <TB1> INFO: 655360 events read in total (14488ms).
[12:15:36.921] <TB1> INFO: Expecting 655360 events.
[12:15:51.939] <TB1> INFO: 655360 events read in total (14615ms).
[12:15:51.967] <TB1> INFO: Expecting 655360 events.
[12:16:06.966] <TB1> INFO: 655360 events read in total (14596ms).
[12:16:06.000] <TB1> INFO: Expecting 655360 events.
[12:16:21.979] <TB1> INFO: 655360 events read in total (14576ms).
[12:16:22.024] <TB1> INFO: Expecting 655360 events.
[12:16:36.764] <TB1> INFO: 655360 events read in total (14337ms).
[12:16:36.891] <TB1> INFO: Expecting 655360 events.
[12:16:51.409] <TB1> INFO: 655360 events read in total (14115ms).
[12:16:51.451] <TB1> INFO: Expecting 655360 events.
[12:17:06.034] <TB1> INFO: 655360 events read in total (14180ms).
[12:17:06.082] <TB1> INFO: Expecting 655360 events.
[12:17:20.603] <TB1> INFO: 655360 events read in total (14118ms).
[12:17:20.693] <TB1> INFO: Expecting 655360 events.
[12:17:35.384] <TB1> INFO: 655360 events read in total (14288ms).
[12:17:35.456] <TB1> INFO: Expecting 655360 events.
[12:17:50.233] <TB1> INFO: 655360 events read in total (14373ms).
[12:17:50.311] <TB1> INFO: Expecting 655360 events.
[12:18:04.984] <TB1> INFO: 655360 events read in total (14270ms).
[12:18:05.063] <TB1> INFO: Expecting 655360 events.
[12:18:19.710] <TB1> INFO: 655360 events read in total (14244ms).
[12:18:19.895] <TB1> INFO: Expecting 655360 events.
[12:18:34.565] <TB1> INFO: 655360 events read in total (14267ms).
[12:18:34.754] <TB1> INFO: Expecting 655360 events.
[12:18:49.270] <TB1> INFO: 655360 events read in total (14113ms).
[12:18:49.469] <TB1> INFO: Test took 237622ms.
[12:18:49.598] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:49.853] <TB1> INFO: Expecting 655360 events.
[12:19:04.595] <TB1> INFO: 655360 events read in total (14150ms).
[12:19:04.610] <TB1> INFO: Expecting 655360 events.
[12:19:19.259] <TB1> INFO: 655360 events read in total (14246ms).
[12:19:19.279] <TB1> INFO: Expecting 655360 events.
[12:19:33.590] <TB1> INFO: 655360 events read in total (13908ms).
[12:19:33.615] <TB1> INFO: Expecting 655360 events.
[12:19:48.104] <TB1> INFO: 655360 events read in total (14086ms).
[12:19:48.141] <TB1> INFO: Expecting 655360 events.
[12:20:02.474] <TB1> INFO: 655360 events read in total (13930ms).
[12:20:02.504] <TB1> INFO: Expecting 655360 events.
[12:20:16.625] <TB1> INFO: 655360 events read in total (13718ms).
[12:20:16.664] <TB1> INFO: Expecting 655360 events.
[12:20:31.340] <TB1> INFO: 655360 events read in total (14273ms).
[12:20:31.388] <TB1> INFO: Expecting 655360 events.
[12:20:45.918] <TB1> INFO: 655360 events read in total (14127ms).
[12:20:45.959] <TB1> INFO: Expecting 655360 events.
[12:21:00.447] <TB1> INFO: 655360 events read in total (14085ms).
[12:21:00.493] <TB1> INFO: Expecting 655360 events.
[12:21:15.218] <TB1> INFO: 655360 events read in total (14322ms).
[12:21:15.362] <TB1> INFO: Expecting 655360 events.
[12:21:30.201] <TB1> INFO: 655360 events read in total (14436ms).
[12:21:30.279] <TB1> INFO: Expecting 655360 events.
[12:21:44.959] <TB1> INFO: 655360 events read in total (14277ms).
[12:21:45.046] <TB1> INFO: Expecting 655360 events.
[12:21:59.675] <TB1> INFO: 655360 events read in total (14225ms).
[12:21:59.754] <TB1> INFO: Expecting 655360 events.
[12:22:14.275] <TB1> INFO: 655360 events read in total (14118ms).
[12:22:14.489] <TB1> INFO: Expecting 655360 events.
[12:22:28.801] <TB1> INFO: 655360 events read in total (13909ms).
[12:22:28.899] <TB1> INFO: Expecting 655360 events.
[12:22:43.374] <TB1> INFO: 655360 events read in total (14072ms).
[12:22:43.471] <TB1> INFO: Test took 233875ms.
[12:22:43.646] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:22:43.652] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:22:43.658] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:22:43.664] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:22:43.669] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:22:43.676] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:22:43.682] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[12:22:43.690] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:22:43.697] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:22:43.704] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:22:43.710] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:22:43.716] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[12:22:43.722] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:22:43.728] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[12:22:43.734] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[12:22:43.740] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[12:22:43.746] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:22:43.752] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:22:43.758] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:22:43.764] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:22:43.770] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[12:22:43.777] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[12:22:43.783] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:22:43.820] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C0.dat
[12:22:43.821] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C1.dat
[12:22:43.821] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C2.dat
[12:22:43.821] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C3.dat
[12:22:43.821] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C4.dat
[12:22:43.821] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C5.dat
[12:22:43.821] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C6.dat
[12:22:43.821] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C7.dat
[12:22:43.821] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C8.dat
[12:22:43.821] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C9.dat
[12:22:43.822] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C10.dat
[12:22:43.822] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C11.dat
[12:22:43.822] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C12.dat
[12:22:43.822] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C13.dat
[12:22:43.822] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C14.dat
[12:22:43.822] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//dacParameters35_C15.dat
[12:22:44.063] <TB1> INFO: Expecting 41600 events.
[12:22:47.180] <TB1> INFO: 41600 events read in total (2525ms).
[12:22:47.180] <TB1> INFO: Test took 3355ms.
[12:22:47.634] <TB1> INFO: Expecting 41600 events.
[12:22:50.636] <TB1> INFO: 41600 events read in total (2410ms).
[12:22:50.637] <TB1> INFO: Test took 3246ms.
[12:22:51.086] <TB1> INFO: Expecting 41600 events.
[12:22:54.229] <TB1> INFO: 41600 events read in total (2552ms).
[12:22:54.229] <TB1> INFO: Test took 3382ms.
[12:22:54.452] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:54.541] <TB1> INFO: Expecting 2560 events.
[12:22:55.431] <TB1> INFO: 2560 events read in total (298ms).
[12:22:55.431] <TB1> INFO: Test took 979ms.
[12:22:55.434] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:55.740] <TB1> INFO: Expecting 2560 events.
[12:22:56.632] <TB1> INFO: 2560 events read in total (301ms).
[12:22:56.632] <TB1> INFO: Test took 1198ms.
[12:22:56.634] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:56.939] <TB1> INFO: Expecting 2560 events.
[12:22:57.828] <TB1> INFO: 2560 events read in total (297ms).
[12:22:57.828] <TB1> INFO: Test took 1194ms.
[12:22:57.830] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:58.137] <TB1> INFO: Expecting 2560 events.
[12:22:59.025] <TB1> INFO: 2560 events read in total (296ms).
[12:22:59.025] <TB1> INFO: Test took 1195ms.
[12:22:59.028] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:59.333] <TB1> INFO: Expecting 2560 events.
[12:23:00.225] <TB1> INFO: 2560 events read in total (300ms).
[12:23:00.226] <TB1> INFO: Test took 1198ms.
[12:23:00.228] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:00.534] <TB1> INFO: Expecting 2560 events.
[12:23:01.429] <TB1> INFO: 2560 events read in total (303ms).
[12:23:01.429] <TB1> INFO: Test took 1201ms.
[12:23:01.432] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:01.737] <TB1> INFO: Expecting 2560 events.
[12:23:02.630] <TB1> INFO: 2560 events read in total (301ms).
[12:23:02.631] <TB1> INFO: Test took 1199ms.
[12:23:02.634] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:02.939] <TB1> INFO: Expecting 2560 events.
[12:23:03.833] <TB1> INFO: 2560 events read in total (303ms).
[12:23:03.834] <TB1> INFO: Test took 1200ms.
[12:23:03.836] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:04.141] <TB1> INFO: Expecting 2560 events.
[12:23:05.023] <TB1> INFO: 2560 events read in total (291ms).
[12:23:05.024] <TB1> INFO: Test took 1188ms.
[12:23:05.027] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:05.330] <TB1> INFO: Expecting 2560 events.
[12:23:06.213] <TB1> INFO: 2560 events read in total (291ms).
[12:23:06.214] <TB1> INFO: Test took 1187ms.
[12:23:06.215] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:06.522] <TB1> INFO: Expecting 2560 events.
[12:23:07.407] <TB1> INFO: 2560 events read in total (293ms).
[12:23:07.407] <TB1> INFO: Test took 1192ms.
[12:23:07.410] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:07.716] <TB1> INFO: Expecting 2560 events.
[12:23:08.603] <TB1> INFO: 2560 events read in total (296ms).
[12:23:08.604] <TB1> INFO: Test took 1194ms.
[12:23:08.607] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:08.912] <TB1> INFO: Expecting 2560 events.
[12:23:09.797] <TB1> INFO: 2560 events read in total (293ms).
[12:23:09.798] <TB1> INFO: Test took 1191ms.
[12:23:09.800] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:10.106] <TB1> INFO: Expecting 2560 events.
[12:23:10.986] <TB1> INFO: 2560 events read in total (289ms).
[12:23:10.986] <TB1> INFO: Test took 1186ms.
[12:23:10.988] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:11.295] <TB1> INFO: Expecting 2560 events.
[12:23:12.175] <TB1> INFO: 2560 events read in total (288ms).
[12:23:12.175] <TB1> INFO: Test took 1187ms.
[12:23:12.177] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:12.484] <TB1> INFO: Expecting 2560 events.
[12:23:13.372] <TB1> INFO: 2560 events read in total (297ms).
[12:23:13.372] <TB1> INFO: Test took 1195ms.
[12:23:13.376] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:13.679] <TB1> INFO: Expecting 2560 events.
[12:23:14.571] <TB1> INFO: 2560 events read in total (300ms).
[12:23:14.572] <TB1> INFO: Test took 1196ms.
[12:23:14.575] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:14.880] <TB1> INFO: Expecting 2560 events.
[12:23:15.768] <TB1> INFO: 2560 events read in total (297ms).
[12:23:15.768] <TB1> INFO: Test took 1193ms.
[12:23:15.771] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:16.076] <TB1> INFO: Expecting 2560 events.
[12:23:16.961] <TB1> INFO: 2560 events read in total (293ms).
[12:23:16.961] <TB1> INFO: Test took 1190ms.
[12:23:16.964] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:17.269] <TB1> INFO: Expecting 2560 events.
[12:23:18.152] <TB1> INFO: 2560 events read in total (291ms).
[12:23:18.152] <TB1> INFO: Test took 1188ms.
[12:23:18.155] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:18.460] <TB1> INFO: Expecting 2560 events.
[12:23:19.349] <TB1> INFO: 2560 events read in total (297ms).
[12:23:19.349] <TB1> INFO: Test took 1194ms.
[12:23:19.352] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:19.657] <TB1> INFO: Expecting 2560 events.
[12:23:20.536] <TB1> INFO: 2560 events read in total (287ms).
[12:23:20.536] <TB1> INFO: Test took 1185ms.
[12:23:20.538] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:20.845] <TB1> INFO: Expecting 2560 events.
[12:23:21.725] <TB1> INFO: 2560 events read in total (288ms).
[12:23:21.725] <TB1> INFO: Test took 1187ms.
[12:23:21.727] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:22.034] <TB1> INFO: Expecting 2560 events.
[12:23:22.921] <TB1> INFO: 2560 events read in total (295ms).
[12:23:22.921] <TB1> INFO: Test took 1194ms.
[12:23:22.924] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:23.230] <TB1> INFO: Expecting 2560 events.
[12:23:24.116] <TB1> INFO: 2560 events read in total (294ms).
[12:23:24.117] <TB1> INFO: Test took 1193ms.
[12:23:24.119] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:24.426] <TB1> INFO: Expecting 2560 events.
[12:23:25.311] <TB1> INFO: 2560 events read in total (293ms).
[12:23:25.312] <TB1> INFO: Test took 1194ms.
[12:23:25.315] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:25.620] <TB1> INFO: Expecting 2560 events.
[12:23:26.502] <TB1> INFO: 2560 events read in total (290ms).
[12:23:26.502] <TB1> INFO: Test took 1187ms.
[12:23:26.504] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:26.810] <TB1> INFO: Expecting 2560 events.
[12:23:27.697] <TB1> INFO: 2560 events read in total (295ms).
[12:23:27.697] <TB1> INFO: Test took 1193ms.
[12:23:27.700] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:28.006] <TB1> INFO: Expecting 2560 events.
[12:23:28.889] <TB1> INFO: 2560 events read in total (292ms).
[12:23:28.890] <TB1> INFO: Test took 1190ms.
[12:23:28.893] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:29.197] <TB1> INFO: Expecting 2560 events.
[12:23:30.083] <TB1> INFO: 2560 events read in total (294ms).
[12:23:30.083] <TB1> INFO: Test took 1190ms.
[12:23:30.085] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:30.392] <TB1> INFO: Expecting 2560 events.
[12:23:31.283] <TB1> INFO: 2560 events read in total (300ms).
[12:23:31.283] <TB1> INFO: Test took 1198ms.
[12:23:31.286] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:23:31.592] <TB1> INFO: Expecting 2560 events.
[12:23:32.481] <TB1> INFO: 2560 events read in total (297ms).
[12:23:32.481] <TB1> INFO: Test took 1195ms.
[12:23:32.951] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 651 seconds
[12:23:32.951] <TB1> INFO: PH scale (per ROC): 61 61 51 58 71 56 39 66 50 50 48 39 54 75 47 46
[12:23:32.951] <TB1> INFO: PH offset (per ROC): 121 126 99 126 127 102 102 121 122 124 107 107 139 117 102 98
[12:23:32.961] <TB1> INFO: Decoding statistics:
[12:23:32.961] <TB1> INFO: General information:
[12:23:32.961] <TB1> INFO: 16bit words read: 127886
[12:23:32.961] <TB1> INFO: valid events total: 20480
[12:23:32.961] <TB1> INFO: empty events: 17977
[12:23:32.961] <TB1> INFO: valid events with pixels: 2503
[12:23:32.961] <TB1> INFO: valid pixel hits: 2503
[12:23:32.961] <TB1> INFO: Event errors: 0
[12:23:32.961] <TB1> INFO: start marker: 0
[12:23:32.961] <TB1> INFO: stop marker: 0
[12:23:32.961] <TB1> INFO: overflow: 0
[12:23:32.961] <TB1> INFO: invalid 5bit words: 0
[12:23:32.961] <TB1> INFO: invalid XOR eye diagram: 0
[12:23:32.961] <TB1> INFO: frame (failed synchr.): 0
[12:23:32.961] <TB1> INFO: idle data (no TBM trl): 0
[12:23:32.961] <TB1> INFO: no data (only TBM hdr): 0
[12:23:32.961] <TB1> INFO: TBM errors: 0
[12:23:32.961] <TB1> INFO: flawed TBM headers: 0
[12:23:32.961] <TB1> INFO: flawed TBM trailers: 0
[12:23:32.961] <TB1> INFO: event ID mismatches: 0
[12:23:32.961] <TB1> INFO: ROC errors: 0
[12:23:32.961] <TB1> INFO: missing ROC header(s): 0
[12:23:32.961] <TB1> INFO: misplaced readback start: 0
[12:23:32.961] <TB1> INFO: Pixel decoding errors: 0
[12:23:32.961] <TB1> INFO: pixel data incomplete: 0
[12:23:32.961] <TB1> INFO: pixel address: 0
[12:23:32.961] <TB1> INFO: pulse height fill bit: 0
[12:23:32.962] <TB1> INFO: buffer corruption: 0
[12:23:33.123] <TB1> INFO: ######################################################################
[12:23:33.123] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[12:23:33.123] <TB1> INFO: ######################################################################
[12:23:33.138] <TB1> INFO: scanning low vcal = 10
[12:23:33.402] <TB1> INFO: Expecting 41600 events.
[12:23:36.965] <TB1> INFO: 41600 events read in total (2971ms).
[12:23:36.965] <TB1> INFO: Test took 3827ms.
[12:23:36.967] <TB1> INFO: scanning low vcal = 20
[12:23:37.266] <TB1> INFO: Expecting 41600 events.
[12:23:40.851] <TB1> INFO: 41600 events read in total (2993ms).
[12:23:40.851] <TB1> INFO: Test took 3884ms.
[12:23:40.854] <TB1> INFO: scanning low vcal = 30
[12:23:41.152] <TB1> INFO: Expecting 41600 events.
[12:23:44.815] <TB1> INFO: 41600 events read in total (3072ms).
[12:23:44.816] <TB1> INFO: Test took 3961ms.
[12:23:44.819] <TB1> INFO: scanning low vcal = 40
[12:23:45.096] <TB1> INFO: Expecting 41600 events.
[12:23:49.078] <TB1> INFO: 41600 events read in total (3391ms).
[12:23:49.080] <TB1> INFO: Test took 4261ms.
[12:23:49.083] <TB1> INFO: scanning low vcal = 50
[12:23:49.366] <TB1> INFO: Expecting 41600 events.
[12:23:53.350] <TB1> INFO: 41600 events read in total (3393ms).
[12:23:53.351] <TB1> INFO: Test took 4268ms.
[12:23:53.354] <TB1> INFO: scanning low vcal = 60
[12:23:53.631] <TB1> INFO: Expecting 41600 events.
[12:23:57.598] <TB1> INFO: 41600 events read in total (3375ms).
[12:23:57.599] <TB1> INFO: Test took 4245ms.
[12:23:57.603] <TB1> INFO: scanning low vcal = 70
[12:23:57.880] <TB1> INFO: Expecting 41600 events.
[12:24:01.887] <TB1> INFO: 41600 events read in total (3416ms).
[12:24:01.888] <TB1> INFO: Test took 4285ms.
[12:24:01.891] <TB1> INFO: scanning low vcal = 80
[12:24:02.169] <TB1> INFO: Expecting 41600 events.
[12:24:06.123] <TB1> INFO: 41600 events read in total (3362ms).
[12:24:06.124] <TB1> INFO: Test took 4233ms.
[12:24:06.127] <TB1> INFO: scanning low vcal = 90
[12:24:06.404] <TB1> INFO: Expecting 41600 events.
[12:24:10.408] <TB1> INFO: 41600 events read in total (3413ms).
[12:24:10.409] <TB1> INFO: Test took 4282ms.
[12:24:10.412] <TB1> INFO: scanning low vcal = 100
[12:24:10.688] <TB1> INFO: Expecting 41600 events.
[12:24:14.675] <TB1> INFO: 41600 events read in total (3395ms).
[12:24:14.676] <TB1> INFO: Test took 4263ms.
[12:24:14.679] <TB1> INFO: scanning low vcal = 110
[12:24:14.957] <TB1> INFO: Expecting 41600 events.
[12:24:18.994] <TB1> INFO: 41600 events read in total (3445ms).
[12:24:18.994] <TB1> INFO: Test took 4315ms.
[12:24:18.997] <TB1> INFO: scanning low vcal = 120
[12:24:19.275] <TB1> INFO: Expecting 41600 events.
[12:24:23.330] <TB1> INFO: 41600 events read in total (3464ms).
[12:24:23.330] <TB1> INFO: Test took 4333ms.
[12:24:23.333] <TB1> INFO: scanning low vcal = 130
[12:24:23.610] <TB1> INFO: Expecting 41600 events.
[12:24:27.614] <TB1> INFO: 41600 events read in total (3412ms).
[12:24:27.615] <TB1> INFO: Test took 4282ms.
[12:24:27.617] <TB1> INFO: scanning low vcal = 140
[12:24:27.895] <TB1> INFO: Expecting 41600 events.
[12:24:31.924] <TB1> INFO: 41600 events read in total (3437ms).
[12:24:31.925] <TB1> INFO: Test took 4307ms.
[12:24:31.928] <TB1> INFO: scanning low vcal = 150
[12:24:32.206] <TB1> INFO: Expecting 41600 events.
[12:24:36.235] <TB1> INFO: 41600 events read in total (3438ms).
[12:24:36.236] <TB1> INFO: Test took 4307ms.
[12:24:36.239] <TB1> INFO: scanning low vcal = 160
[12:24:36.516] <TB1> INFO: Expecting 41600 events.
[12:24:40.592] <TB1> INFO: 41600 events read in total (3484ms).
[12:24:40.593] <TB1> INFO: Test took 4354ms.
[12:24:40.596] <TB1> INFO: scanning low vcal = 170
[12:24:40.878] <TB1> INFO: Expecting 41600 events.
[12:24:44.951] <TB1> INFO: 41600 events read in total (3481ms).
[12:24:44.952] <TB1> INFO: Test took 4356ms.
[12:24:44.957] <TB1> INFO: scanning low vcal = 180
[12:24:45.232] <TB1> INFO: Expecting 41600 events.
[12:24:49.291] <TB1> INFO: 41600 events read in total (3467ms).
[12:24:49.291] <TB1> INFO: Test took 4333ms.
[12:24:49.294] <TB1> INFO: scanning low vcal = 190
[12:24:49.572] <TB1> INFO: Expecting 41600 events.
[12:24:53.669] <TB1> INFO: 41600 events read in total (3506ms).
[12:24:53.670] <TB1> INFO: Test took 4376ms.
[12:24:53.673] <TB1> INFO: scanning low vcal = 200
[12:24:53.955] <TB1> INFO: Expecting 41600 events.
[12:24:57.998] <TB1> INFO: 41600 events read in total (3451ms).
[12:24:57.999] <TB1> INFO: Test took 4326ms.
[12:24:57.002] <TB1> INFO: scanning low vcal = 210
[12:24:58.280] <TB1> INFO: Expecting 41600 events.
[12:25:02.324] <TB1> INFO: 41600 events read in total (3453ms).
[12:25:02.325] <TB1> INFO: Test took 4323ms.
[12:25:02.328] <TB1> INFO: scanning low vcal = 220
[12:25:02.605] <TB1> INFO: Expecting 41600 events.
[12:25:06.651] <TB1> INFO: 41600 events read in total (3454ms).
[12:25:06.651] <TB1> INFO: Test took 4323ms.
[12:25:06.654] <TB1> INFO: scanning low vcal = 230
[12:25:06.932] <TB1> INFO: Expecting 41600 events.
[12:25:10.971] <TB1> INFO: 41600 events read in total (3447ms).
[12:25:10.972] <TB1> INFO: Test took 4317ms.
[12:25:10.975] <TB1> INFO: scanning low vcal = 240
[12:25:11.252] <TB1> INFO: Expecting 41600 events.
[12:25:15.265] <TB1> INFO: 41600 events read in total (3421ms).
[12:25:15.266] <TB1> INFO: Test took 4291ms.
[12:25:15.269] <TB1> INFO: scanning low vcal = 250
[12:25:15.547] <TB1> INFO: Expecting 41600 events.
[12:25:19.566] <TB1> INFO: 41600 events read in total (3428ms).
[12:25:19.567] <TB1> INFO: Test took 4298ms.
[12:25:19.571] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[12:25:19.848] <TB1> INFO: Expecting 41600 events.
[12:25:23.869] <TB1> INFO: 41600 events read in total (3429ms).
[12:25:23.870] <TB1> INFO: Test took 4298ms.
[12:25:23.873] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[12:25:24.150] <TB1> INFO: Expecting 41600 events.
[12:25:28.170] <TB1> INFO: 41600 events read in total (3428ms).
[12:25:28.171] <TB1> INFO: Test took 4298ms.
[12:25:28.174] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[12:25:28.451] <TB1> INFO: Expecting 41600 events.
[12:25:32.499] <TB1> INFO: 41600 events read in total (3457ms).
[12:25:32.500] <TB1> INFO: Test took 4326ms.
[12:25:32.504] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[12:25:32.780] <TB1> INFO: Expecting 41600 events.
[12:25:36.778] <TB1> INFO: 41600 events read in total (3406ms).
[12:25:36.779] <TB1> INFO: Test took 4275ms.
[12:25:36.782] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:25:37.058] <TB1> INFO: Expecting 41600 events.
[12:25:41.060] <TB1> INFO: 41600 events read in total (3410ms).
[12:25:41.061] <TB1> INFO: Test took 4279ms.
[12:25:41.522] <TB1> INFO: PixTestGainPedestal::measure() done
[12:26:13.461] <TB1> INFO: PixTestGainPedestal::fit() done
[12:26:13.461] <TB1> INFO: non-linearity mean: 0.982 0.975 0.962 0.978 0.985 0.949 0.896 0.981 0.978 0.975 0.934 0.915 0.976 0.982 0.920 0.937
[12:26:13.461] <TB1> INFO: non-linearity RMS: 0.004 0.005 0.015 0.007 0.002 0.067 0.098 0.004 0.004 0.005 0.071 0.177 0.007 0.004 0.094 0.148
[12:26:13.461] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[12:26:13.477] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[12:26:13.490] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[12:26:13.503] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[12:26:13.517] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[12:26:13.530] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[12:26:13.544] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[12:26:13.557] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[12:26:13.570] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[12:26:13.584] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[12:26:13.597] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[12:26:13.610] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[12:26:13.624] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[12:26:13.637] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[12:26:13.651] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[12:26:13.664] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1011_FullQualification_2016-10-19_09h44m_1476863092//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[12:26:13.678] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 160 seconds
[12:26:13.678] <TB1> INFO: Decoding statistics:
[12:26:13.678] <TB1> INFO: General information:
[12:26:13.678] <TB1> INFO: 16bit words read: 3327742
[12:26:13.678] <TB1> INFO: valid events total: 332800
[12:26:13.678] <TB1> INFO: empty events: 0
[12:26:13.678] <TB1> INFO: valid events with pixels: 332800
[12:26:13.678] <TB1> INFO: valid pixel hits: 665471
[12:26:13.678] <TB1> INFO: Event errors: 0
[12:26:13.678] <TB1> INFO: start marker: 0
[12:26:13.678] <TB1> INFO: stop marker: 0
[12:26:13.678] <TB1> INFO: overflow: 0
[12:26:13.678] <TB1> INFO: invalid 5bit words: 0
[12:26:13.678] <TB1> INFO: invalid XOR eye diagram: 0
[12:26:13.678] <TB1> INFO: frame (failed synchr.): 0
[12:26:13.678] <TB1> INFO: idle data (no TBM trl): 0
[12:26:13.678] <TB1> INFO: no data (only TBM hdr): 0
[12:26:13.678] <TB1> INFO: TBM errors: 0
[12:26:13.678] <TB1> INFO: flawed TBM headers: 0
[12:26:13.678] <TB1> INFO: flawed TBM trailers: 0
[12:26:13.678] <TB1> INFO: event ID mismatches: 0
[12:26:13.678] <TB1> INFO: ROC errors: 0
[12:26:13.678] <TB1> INFO: missing ROC header(s): 0
[12:26:13.678] <TB1> INFO: misplaced readback start: 0
[12:26:13.678] <TB1> INFO: Pixel decoding errors: 0
[12:26:13.678] <TB1> INFO: pixel data incomplete: 0
[12:26:13.678] <TB1> INFO: pixel address: 0
[12:26:13.678] <TB1> INFO: pulse height fill bit: 0
[12:26:13.678] <TB1> INFO: buffer corruption: 0
[12:26:13.693] <TB1> INFO: Decoding statistics:
[12:26:13.693] <TB1> INFO: General information:
[12:26:13.693] <TB1> INFO: 16bit words read: 3457164
[12:26:13.693] <TB1> INFO: valid events total: 353536
[12:26:13.693] <TB1> INFO: empty events: 18233
[12:26:13.693] <TB1> INFO: valid events with pixels: 335303
[12:26:13.693] <TB1> INFO: valid pixel hits: 667974
[12:26:13.693] <TB1> INFO: Event errors: 0
[12:26:13.693] <TB1> INFO: start marker: 0
[12:26:13.693] <TB1> INFO: stop marker: 0
[12:26:13.693] <TB1> INFO: overflow: 0
[12:26:13.693] <TB1> INFO: invalid 5bit words: 0
[12:26:13.693] <TB1> INFO: invalid XOR eye diagram: 0
[12:26:13.693] <TB1> INFO: frame (failed synchr.): 0
[12:26:13.693] <TB1> INFO: idle data (no TBM trl): 0
[12:26:13.693] <TB1> INFO: no data (only TBM hdr): 0
[12:26:13.693] <TB1> INFO: TBM errors: 0
[12:26:13.693] <TB1> INFO: flawed TBM headers: 0
[12:26:13.693] <TB1> INFO: flawed TBM trailers: 0
[12:26:13.693] <TB1> INFO: event ID mismatches: 0
[12:26:13.693] <TB1> INFO: ROC errors: 0
[12:26:13.693] <TB1> INFO: missing ROC header(s): 0
[12:26:13.693] <TB1> INFO: misplaced readback start: 0
[12:26:13.693] <TB1> INFO: Pixel decoding errors: 0
[12:26:13.693] <TB1> INFO: pixel data incomplete: 0
[12:26:13.693] <TB1> INFO: pixel address: 0
[12:26:13.693] <TB1> INFO: pulse height fill bit: 0
[12:26:13.693] <TB1> INFO: buffer corruption: 0
[12:26:13.693] <TB1> INFO: enter test to run
[12:26:13.693] <TB1> INFO: test: exit no parameter change
[12:26:13.820] <TB1> QUIET: Connection to board 154 closed.
[12:26:13.821] <TB1> INFO: pXar: this is the end, my friend