[16:27:20.010] <TB1> INFO: *** Welcome to pxar ***
[16:27:20.010] <TB1> INFO: *** Today: 2016/10/17
[16:27:20.017] <TB1> INFO: *** Version: c8ba-dirty
[16:27:20.017] <TB1> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters_C15.dat
[16:27:20.018] <TB1> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//tbmParameters_C1b.dat
[16:27:20.018] <TB1> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//defaultMaskFile.dat
[16:27:20.019] <TB1> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//trimParameters_C15.dat
[16:27:20.115] <TB1> INFO: clk: 4
[16:27:20.115] <TB1> INFO: ctr: 4
[16:27:20.115] <TB1> INFO: sda: 19
[16:27:20.115] <TB1> INFO: tin: 9
[16:27:20.115] <TB1> INFO: level: 15
[16:27:20.115] <TB1> INFO: triggerdelay: 0
[16:27:20.115] <TB1> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[16:27:20.115] <TB1> INFO: Log level: INFO
[16:27:20.124] <TB1> INFO: Found DTB DTB_WXC03A
[16:27:20.135] <TB1> QUIET: Connection to board DTB_WXC03A opened.
[16:27:20.137] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 154
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC03A
MAC address: 40D85511809A
Hostname: pixelDTB154
Comment:
------------------------------------------------------
[16:27:20.139] <TB1> INFO: RPC call hashes of host and DTB match: 486171790
[16:27:21.630] <TB1> INFO: DUT info:
[16:27:21.630] <TB1> INFO: The DUT currently contains the following objects:
[16:27:21.630] <TB1> INFO: 4 TBM Cores tbm10c (4 ON)
[16:27:21.631] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:27:21.631] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:27:21.631] <TB1> INFO: TBM Core alpha (2): 7 registers set
[16:27:21.631] <TB1> INFO: TBM Core beta (3): 7 registers set
[16:27:21.631] <TB1> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[16:27:21.631] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.631] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.631] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.631] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.631] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.631] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.631] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.631] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.631] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.631] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.631] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.631] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.631] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.631] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.631] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.631] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:22.032] <TB1> INFO: enter 'restricted' command line mode
[16:27:22.032] <TB1> INFO: enter test to run
[16:27:22.032] <TB1> INFO: test: pretest no parameter change
[16:27:22.032] <TB1> INFO: running: pretest
[16:27:22.038] <TB1> INFO: ######################################################################
[16:27:22.038] <TB1> INFO: PixTestPretest::doTest()
[16:27:22.038] <TB1> INFO: ######################################################################
[16:27:22.039] <TB1> INFO: ----------------------------------------------------------------------
[16:27:22.039] <TB1> INFO: PixTestPretest::programROC()
[16:27:22.039] <TB1> INFO: ----------------------------------------------------------------------
[16:27:40.053] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[16:27:40.054] <TB1> INFO: IA differences per ROC: 19.3 18.5 17.7 18.5 20.1 19.3 18.5 16.9 20.1 19.3 20.1 18.5 19.3 17.7 18.5 20.1
[16:27:40.119] <TB1> INFO: ----------------------------------------------------------------------
[16:27:40.119] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[16:27:40.119] <TB1> INFO: ----------------------------------------------------------------------
[16:28:01.417] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 382.7 mA = 23.9187 mA/ROC
[16:28:01.417] <TB1> INFO: i(loss) [mA/ROC]: 19.3 18.5 18.5 19.3 19.3 19.3 20.1 19.3 19.3 19.3 18.5 18.5 19.3 18.5 17.7 19.3
[16:28:01.451] <TB1> INFO: ----------------------------------------------------------------------
[16:28:01.451] <TB1> INFO: PixTestPretest::findTiming()
[16:28:01.451] <TB1> INFO: ----------------------------------------------------------------------
[16:28:01.451] <TB1> INFO: PixTestCmd::init()

[16:28:33.681] <TB1> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[16:28:33.681] <TB1> INFO: (success/tries = 100/100), width = 4
[16:28:35.185] <TB1> INFO: ----------------------------------------------------------------------
[16:28:35.185] <TB1> INFO: PixTestPretest::findWorkingPixel()
[16:28:35.185] <TB1> INFO: ----------------------------------------------------------------------
[16:28:35.280] <TB1> INFO: Expecting 231680 events.
[16:28:45.146] <TB1> INFO: 231680 events read in total (9274ms).
[16:28:45.155] <TB1> INFO: Test took 9965ms.
[16:28:45.406] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[16:28:45.441] <TB1> INFO: ----------------------------------------------------------------------
[16:28:45.441] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[16:28:45.442] <TB1> INFO: ----------------------------------------------------------------------
[16:28:45.536] <TB1> INFO: Expecting 231680 events.
[16:28:55.489] <TB1> INFO: 231680 events read in total (9361ms).
[16:28:55.502] <TB1> INFO: Test took 10055ms.
[16:28:55.768] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[16:28:55.768] <TB1> INFO: CalDel: 97 89 100 79 108 100 105 108 99 92 72 100 83 79 89 92
[16:28:55.768] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[16:28:55.772] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters_C0.dat
[16:28:55.772] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters_C1.dat
[16:28:55.772] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters_C2.dat
[16:28:55.772] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters_C3.dat
[16:28:55.772] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters_C4.dat
[16:28:55.773] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters_C5.dat
[16:28:55.773] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters_C6.dat
[16:28:55.773] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters_C7.dat
[16:28:55.773] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters_C8.dat
[16:28:55.773] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters_C9.dat
[16:28:55.773] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters_C10.dat
[16:28:55.773] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters_C11.dat
[16:28:55.774] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters_C12.dat
[16:28:55.774] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters_C13.dat
[16:28:55.774] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters_C14.dat
[16:28:55.774] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters_C15.dat
[16:28:55.774] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//tbmParameters_C0a.dat
[16:28:55.774] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//tbmParameters_C0b.dat
[16:28:55.774] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//tbmParameters_C1a.dat
[16:28:55.774] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//tbmParameters_C1b.dat
[16:28:55.774] <TB1> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[16:28:55.830] <TB1> INFO: enter test to run
[16:28:55.830] <TB1> INFO: test: FullTest no parameter change
[16:28:55.830] <TB1> INFO: running: fulltest
[16:28:55.830] <TB1> INFO: ######################################################################
[16:28:55.830] <TB1> INFO: PixTestFullTest::doTest()
[16:28:55.830] <TB1> INFO: ######################################################################
[16:28:55.831] <TB1> INFO: ######################################################################
[16:28:55.831] <TB1> INFO: PixTestAlive::doTest()
[16:28:55.831] <TB1> INFO: ######################################################################
[16:28:55.832] <TB1> INFO: ----------------------------------------------------------------------
[16:28:55.832] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:28:55.832] <TB1> INFO: ----------------------------------------------------------------------
[16:28:56.118] <TB1> INFO: Expecting 41600 events.
[16:28:59.605] <TB1> INFO: 41600 events read in total (2895ms).
[16:28:59.606] <TB1> INFO: Test took 3772ms.
[16:28:59.837] <TB1> INFO: PixTestAlive::aliveTest() done
[16:28:59.837] <TB1> INFO: number of dead pixels (per ROC): 0 0 1 0 0 0 1 1 0 0 0 0 0 0 0 0
[16:28:59.838] <TB1> INFO: ----------------------------------------------------------------------
[16:28:59.838] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:28:59.838] <TB1> INFO: ----------------------------------------------------------------------
[16:29:00.081] <TB1> INFO: Expecting 41600 events.
[16:29:03.093] <TB1> INFO: 41600 events read in total (2420ms).
[16:29:03.093] <TB1> INFO: Test took 3253ms.
[16:29:03.094] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[16:29:03.327] <TB1> INFO: PixTestAlive::maskTest() done
[16:29:03.327] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:29:03.328] <TB1> INFO: ----------------------------------------------------------------------
[16:29:03.328] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:29:03.328] <TB1> INFO: ----------------------------------------------------------------------
[16:29:03.568] <TB1> INFO: Expecting 41600 events.
[16:29:07.075] <TB1> INFO: 41600 events read in total (2915ms).
[16:29:07.075] <TB1> INFO: Test took 3745ms.
[16:29:07.311] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[16:29:07.311] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:29:07.311] <TB1> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[16:29:07.311] <TB1> INFO: Decoding statistics:
[16:29:07.312] <TB1> INFO: General information:
[16:29:07.312] <TB1> INFO: 16bit words read: 0
[16:29:07.312] <TB1> INFO: valid events total: 0
[16:29:07.312] <TB1> INFO: empty events: 0
[16:29:07.312] <TB1> INFO: valid events with pixels: 0
[16:29:07.312] <TB1> INFO: valid pixel hits: 0
[16:29:07.312] <TB1> INFO: Event errors: 0
[16:29:07.312] <TB1> INFO: start marker: 0
[16:29:07.312] <TB1> INFO: stop marker: 0
[16:29:07.312] <TB1> INFO: overflow: 0
[16:29:07.312] <TB1> INFO: invalid 5bit words: 0
[16:29:07.312] <TB1> INFO: invalid XOR eye diagram: 0
[16:29:07.312] <TB1> INFO: frame (failed synchr.): 0
[16:29:07.312] <TB1> INFO: idle data (no TBM trl): 0
[16:29:07.312] <TB1> INFO: no data (only TBM hdr): 0
[16:29:07.312] <TB1> INFO: TBM errors: 0
[16:29:07.312] <TB1> INFO: flawed TBM headers: 0
[16:29:07.312] <TB1> INFO: flawed TBM trailers: 0
[16:29:07.312] <TB1> INFO: event ID mismatches: 0
[16:29:07.312] <TB1> INFO: ROC errors: 0
[16:29:07.312] <TB1> INFO: missing ROC header(s): 0
[16:29:07.312] <TB1> INFO: misplaced readback start: 0
[16:29:07.312] <TB1> INFO: Pixel decoding errors: 0
[16:29:07.312] <TB1> INFO: pixel data incomplete: 0
[16:29:07.312] <TB1> INFO: pixel address: 0
[16:29:07.312] <TB1> INFO: pulse height fill bit: 0
[16:29:07.312] <TB1> INFO: buffer corruption: 0
[16:29:07.319] <TB1> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C15.dat
[16:29:07.319] <TB1> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//phCalibrationFitErr_C15.dat

[16:29:07.319] <TB1> INFO: ######################################################################
[16:29:07.319] <TB1> INFO: PixTestReadback::doTest()
[16:29:07.319] <TB1> INFO: ######################################################################
[16:29:07.319] <TB1> INFO: ----------------------------------------------------------------------
[16:29:07.319] <TB1> INFO: PixTestReadback::CalibrateVd()
[16:29:07.319] <TB1> INFO: ----------------------------------------------------------------------
[16:29:17.265] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C0.dat
[16:29:17.266] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C1.dat
[16:29:17.266] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C2.dat
[16:29:17.266] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C3.dat
[16:29:17.266] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C4.dat
[16:29:17.266] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C5.dat
[16:29:17.266] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C6.dat
[16:29:17.266] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C7.dat
[16:29:17.266] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C8.dat
[16:29:17.266] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C9.dat
[16:29:17.266] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C10.dat
[16:29:17.266] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C11.dat
[16:29:17.266] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C12.dat
[16:29:17.266] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C13.dat
[16:29:17.266] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C14.dat
[16:29:17.266] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C15.dat
[16:29:17.296] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:29:17.296] <TB1> INFO: ----------------------------------------------------------------------
[16:29:17.296] <TB1> INFO: PixTestReadback::CalibrateVa()
[16:29:17.296] <TB1> INFO: ----------------------------------------------------------------------
[16:29:27.229] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C0.dat
[16:29:27.229] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C1.dat
[16:29:27.229] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C2.dat
[16:29:27.229] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C3.dat
[16:29:27.229] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C4.dat
[16:29:27.229] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C5.dat
[16:29:27.229] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C6.dat
[16:29:27.229] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C7.dat
[16:29:27.229] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C8.dat
[16:29:27.229] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C9.dat
[16:29:27.229] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C10.dat
[16:29:27.229] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C11.dat
[16:29:27.230] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C12.dat
[16:29:27.230] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C13.dat
[16:29:27.230] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C14.dat
[16:29:27.230] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C15.dat
[16:29:27.259] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:29:27.259] <TB1> INFO: ----------------------------------------------------------------------
[16:29:27.259] <TB1> INFO: PixTestReadback::readbackVbg()
[16:29:27.259] <TB1> INFO: ----------------------------------------------------------------------
[16:29:34.929] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:29:34.929] <TB1> INFO: ----------------------------------------------------------------------
[16:29:34.930] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[16:29:34.930] <TB1> INFO: ----------------------------------------------------------------------
[16:29:34.930] <TB1> INFO: Vbg will be calibrated using Vd calibration
[16:29:34.930] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 152calibrated Vbg = 1.20036 :::*/*/*/*/
[16:29:34.930] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 154.8calibrated Vbg = 1.19301 :::*/*/*/*/
[16:29:34.930] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 156calibrated Vbg = 1.19674 :::*/*/*/*/
[16:29:34.930] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 154.7calibrated Vbg = 1.1947 :::*/*/*/*/
[16:29:34.930] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 151.4calibrated Vbg = 1.18947 :::*/*/*/*/
[16:29:34.930] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 159.3calibrated Vbg = 1.19949 :::*/*/*/*/
[16:29:34.930] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 153.2calibrated Vbg = 1.1972 :::*/*/*/*/
[16:29:34.930] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 152.6calibrated Vbg = 1.19635 :::*/*/*/*/
[16:29:34.930] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 159.4calibrated Vbg = 1.18944 :::*/*/*/*/
[16:29:34.930] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 150.5calibrated Vbg = 1.1885 :::*/*/*/*/
[16:29:34.930] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 153.2calibrated Vbg = 1.18192 :::*/*/*/*/
[16:29:34.930] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 156.1calibrated Vbg = 1.18228 :::*/*/*/*/
[16:29:34.930] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 159.2calibrated Vbg = 1.18701 :::*/*/*/*/
[16:29:34.930] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 147.6calibrated Vbg = 1.1923 :::*/*/*/*/
[16:29:34.930] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 157.8calibrated Vbg = 1.20056 :::*/*/*/*/
[16:29:34.930] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 158.5calibrated Vbg = 1.20101 :::*/*/*/*/
[16:29:34.932] <TB1> INFO: ----------------------------------------------------------------------
[16:29:34.932] <TB1> INFO: PixTestReadback::CalibrateIa()
[16:29:34.932] <TB1> INFO: ----------------------------------------------------------------------
[16:32:15.768] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C0.dat
[16:32:15.768] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C1.dat
[16:32:15.768] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C2.dat
[16:32:15.769] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C3.dat
[16:32:15.769] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C4.dat
[16:32:15.769] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C5.dat
[16:32:15.769] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C6.dat
[16:32:15.769] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C7.dat
[16:32:15.769] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C8.dat
[16:32:15.769] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C9.dat
[16:32:15.769] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C10.dat
[16:32:15.769] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C11.dat
[16:32:15.769] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C12.dat
[16:32:15.769] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C13.dat
[16:32:15.769] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C14.dat
[16:32:15.769] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//readbackCal_C15.dat
[16:32:15.795] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:32:15.797] <TB1> INFO: PixTestReadback::doTest() done
[16:32:15.797] <TB1> INFO: Decoding statistics:
[16:32:15.797] <TB1> INFO: General information:
[16:32:15.797] <TB1> INFO: 16bit words read: 1536
[16:32:15.797] <TB1> INFO: valid events total: 256
[16:32:15.797] <TB1> INFO: empty events: 256
[16:32:15.797] <TB1> INFO: valid events with pixels: 0
[16:32:15.797] <TB1> INFO: valid pixel hits: 0
[16:32:15.797] <TB1> INFO: Event errors: 0
[16:32:15.797] <TB1> INFO: start marker: 0
[16:32:15.797] <TB1> INFO: stop marker: 0
[16:32:15.797] <TB1> INFO: overflow: 0
[16:32:15.797] <TB1> INFO: invalid 5bit words: 0
[16:32:15.797] <TB1> INFO: invalid XOR eye diagram: 0
[16:32:15.797] <TB1> INFO: frame (failed synchr.): 0
[16:32:15.797] <TB1> INFO: idle data (no TBM trl): 0
[16:32:15.797] <TB1> INFO: no data (only TBM hdr): 0
[16:32:15.797] <TB1> INFO: TBM errors: 0
[16:32:15.797] <TB1> INFO: flawed TBM headers: 0
[16:32:15.797] <TB1> INFO: flawed TBM trailers: 0
[16:32:15.797] <TB1> INFO: event ID mismatches: 0
[16:32:15.797] <TB1> INFO: ROC errors: 0
[16:32:15.797] <TB1> INFO: missing ROC header(s): 0
[16:32:15.797] <TB1> INFO: misplaced readback start: 0
[16:32:15.797] <TB1> INFO: Pixel decoding errors: 0
[16:32:15.797] <TB1> INFO: pixel data incomplete: 0
[16:32:15.797] <TB1> INFO: pixel address: 0
[16:32:15.797] <TB1> INFO: pulse height fill bit: 0
[16:32:15.797] <TB1> INFO: buffer corruption: 0
[16:32:15.859] <TB1> INFO: ######################################################################
[16:32:15.859] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[16:32:15.859] <TB1> INFO: ######################################################################
[16:32:15.862] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[16:32:15.876] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[16:32:15.876] <TB1> INFO: run 1 of 1
[16:32:16.145] <TB1> INFO: Expecting 3120000 events.
[16:32:47.435] <TB1> INFO: 667730 events read in total (30698ms).











[16:33:17.929] <TB1> INFO: 1328995 events read in total (61192ms).











[16:33:48.099] <TB1> INFO: 1987730 events read in total (91362ms).











[16:34:18.735] <TB1> INFO: 2647015 events read in total (121998ms).











[16:34:40.027] <TB1> INFO: 3120000 events read in total (143290ms).
[16:34:40.109] <TB1> INFO: Test took 144234ms.
[16:35:07.800] <TB1> INFO: PixTestBBMap::doTest() done with 1 decoding errors: , duration: 171 seconds
[16:35:07.800] <TB1> INFO: number of dead bumps (per ROC): 1 2 0 0 1 0 0 0 0 0 0 14 28 27 0 1
[16:35:07.800] <TB1> INFO: separation cut (per ROC): 100 109 95 109 102 105 104 98 104 106 106 85 101 95 106 106
[16:35:07.800] <TB1> INFO: Decoding statistics:
[16:35:07.800] <TB1> INFO: General information:
[16:35:07.800] <TB1> INFO: 16bit words read: 0
[16:35:07.800] <TB1> INFO: valid events total: 0
[16:35:07.800] <TB1> INFO: empty events: 0
[16:35:07.800] <TB1> INFO: valid events with pixels: 0
[16:35:07.800] <TB1> INFO: valid pixel hits: 0
[16:35:07.800] <TB1> INFO: Event errors: 0
[16:35:07.800] <TB1> INFO: start marker: 0
[16:35:07.800] <TB1> INFO: stop marker: 0
[16:35:07.800] <TB1> INFO: overflow: 0
[16:35:07.800] <TB1> INFO: invalid 5bit words: 0
[16:35:07.800] <TB1> INFO: invalid XOR eye diagram: 0
[16:35:07.800] <TB1> INFO: frame (failed synchr.): 0
[16:35:07.800] <TB1> INFO: idle data (no TBM trl): 0
[16:35:07.800] <TB1> INFO: no data (only TBM hdr): 0
[16:35:07.800] <TB1> INFO: TBM errors: 0
[16:35:07.800] <TB1> INFO: flawed TBM headers: 0
[16:35:07.800] <TB1> INFO: flawed TBM trailers: 0
[16:35:07.800] <TB1> INFO: event ID mismatches: 0
[16:35:07.800] <TB1> INFO: ROC errors: 0
[16:35:07.800] <TB1> INFO: missing ROC header(s): 0
[16:35:07.800] <TB1> INFO: misplaced readback start: 0
[16:35:07.800] <TB1> INFO: Pixel decoding errors: 0
[16:35:07.800] <TB1> INFO: pixel data incomplete: 0
[16:35:07.800] <TB1> INFO: pixel address: 0
[16:35:07.800] <TB1> INFO: pulse height fill bit: 0
[16:35:07.800] <TB1> INFO: buffer corruption: 0
[16:35:07.838] <TB1> INFO: ######################################################################
[16:35:07.838] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:35:07.838] <TB1> INFO: ######################################################################
[16:35:07.838] <TB1> INFO: ----------------------------------------------------------------------
[16:35:07.838] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:35:07.838] <TB1> INFO: ----------------------------------------------------------------------
[16:35:07.838] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[16:35:07.853] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[16:35:07.853] <TB1> INFO: run 1 of 1
[16:35:08.100] <TB1> INFO: Expecting 36608000 events.
[16:35:31.310] <TB1> INFO: 674450 events read in total (22618ms).
[16:35:53.670] <TB1> INFO: 1336200 events read in total (44978ms).
[16:36:16.304] <TB1> INFO: 1995600 events read in total (67612ms).
[16:36:38.822] <TB1> INFO: 2654400 events read in total (90130ms).
[16:37:01.385] <TB1> INFO: 3313900 events read in total (112693ms).
[16:37:23.823] <TB1> INFO: 3971000 events read in total (135131ms).
[16:37:46.501] <TB1> INFO: 4630350 events read in total (157809ms).
[16:38:08.735] <TB1> INFO: 5290000 events read in total (180043ms).
[16:38:31.310] <TB1> INFO: 5949000 events read in total (202618ms).
[16:38:54.040] <TB1> INFO: 6610200 events read in total (225348ms).
[16:39:16.569] <TB1> INFO: 7268550 events read in total (247877ms).
[16:39:39.182] <TB1> INFO: 7926900 events read in total (270490ms).
[16:40:01.672] <TB1> INFO: 8585400 events read in total (292980ms).
[16:40:24.224] <TB1> INFO: 9243750 events read in total (315532ms).
[16:40:46.763] <TB1> INFO: 9898450 events read in total (338071ms).
[16:41:09.671] <TB1> INFO: 10553700 events read in total (360979ms).
[16:41:32.083] <TB1> INFO: 11208000 events read in total (383391ms).
[16:41:54.643] <TB1> INFO: 11861400 events read in total (405951ms).
[16:42:17.335] <TB1> INFO: 12513500 events read in total (428643ms).
[16:42:40.042] <TB1> INFO: 13168000 events read in total (451350ms).
[16:43:02.797] <TB1> INFO: 13821650 events read in total (474105ms).
[16:43:25.424] <TB1> INFO: 14475450 events read in total (496732ms).
[16:43:48.121] <TB1> INFO: 15129750 events read in total (519429ms).
[16:44:10.662] <TB1> INFO: 15782700 events read in total (541970ms).
[16:44:33.529] <TB1> INFO: 16435900 events read in total (564837ms).
[16:44:56.303] <TB1> INFO: 17088900 events read in total (587611ms).
[16:45:18.943] <TB1> INFO: 17742850 events read in total (610251ms).
[16:45:41.521] <TB1> INFO: 18394300 events read in total (632829ms).
[16:46:03.943] <TB1> INFO: 19042800 events read in total (655251ms).
[16:46:26.500] <TB1> INFO: 19691850 events read in total (677808ms).
[16:46:49.080] <TB1> INFO: 20341150 events read in total (700388ms).
[16:47:11.668] <TB1> INFO: 20989500 events read in total (722976ms).
[16:47:34.124] <TB1> INFO: 21637650 events read in total (745432ms).
[16:47:56.714] <TB1> INFO: 22286750 events read in total (768022ms).
[16:48:19.345] <TB1> INFO: 22936350 events read in total (790653ms).
[16:48:41.814] <TB1> INFO: 23585150 events read in total (813122ms).
[16:49:04.248] <TB1> INFO: 24234350 events read in total (835556ms).
[16:49:26.615] <TB1> INFO: 24882850 events read in total (857923ms).
[16:49:48.960] <TB1> INFO: 25529600 events read in total (880268ms).
[16:50:11.280] <TB1> INFO: 26178050 events read in total (902588ms).
[16:50:33.702] <TB1> INFO: 26825200 events read in total (925010ms).
[16:50:56.182] <TB1> INFO: 27470250 events read in total (947490ms).
[16:51:18.693] <TB1> INFO: 28115400 events read in total (970001ms).
[16:51:40.829] <TB1> INFO: 28759050 events read in total (992137ms).
[16:52:03.317] <TB1> INFO: 29404350 events read in total (1014625ms).
[16:52:25.785] <TB1> INFO: 30048900 events read in total (1037093ms).
[16:52:48.011] <TB1> INFO: 30692700 events read in total (1059319ms).
[16:53:10.348] <TB1> INFO: 31336900 events read in total (1081656ms).
[16:53:32.636] <TB1> INFO: 31981650 events read in total (1103944ms).
[16:53:54.789] <TB1> INFO: 32626250 events read in total (1126097ms).
[16:54:16.765] <TB1> INFO: 33270450 events read in total (1148073ms).
[16:54:38.952] <TB1> INFO: 33916100 events read in total (1170260ms).
[16:55:01.426] <TB1> INFO: 34562050 events read in total (1192734ms).
[16:55:23.744] <TB1> INFO: 35206650 events read in total (1215052ms).
[16:55:45.929] <TB1> INFO: 35852750 events read in total (1237237ms).
[16:56:08.725] <TB1> INFO: 36510550 events read in total (1260033ms).
[16:56:12.400] <TB1> INFO: 36608000 events read in total (1263708ms).
[16:56:12.477] <TB1> INFO: Test took 1264624ms.
[16:56:12.930] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:56:14.483] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:56:15.979] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:56:17.639] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:56:19.101] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:56:20.542] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:56:22.341] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:56:24.707] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:56:26.778] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:56:28.799] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:56:30.847] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:56:32.875] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:56:34.590] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:56:36.380] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:56:38.345] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:56:39.840] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:56:41.344] <TB1> INFO: PixTestScurves::scurves() done
[16:56:41.344] <TB1> INFO: Vcal mean: 113.85 123.19 110.50 122.69 115.66 117.49 116.52 108.10 112.01 119.04 107.00 103.97 130.46 109.94 110.35 108.65
[16:56:41.344] <TB1> INFO: Vcal RMS: 5.33 6.02 5.90 5.75 4.82 5.91 5.39 5.00 4.89 5.68 4.88 6.56 6.68 4.94 4.94 6.19
[16:56:41.344] <TB1> INFO: PixTestScurves::fullTest() done, duration: 1293 seconds
[16:56:41.344] <TB1> INFO: Decoding statistics:
[16:56:41.344] <TB1> INFO: General information:
[16:56:41.344] <TB1> INFO: 16bit words read: 0
[16:56:41.344] <TB1> INFO: valid events total: 0
[16:56:41.344] <TB1> INFO: empty events: 0
[16:56:41.344] <TB1> INFO: valid events with pixels: 0
[16:56:41.344] <TB1> INFO: valid pixel hits: 0
[16:56:41.344] <TB1> INFO: Event errors: 0
[16:56:41.344] <TB1> INFO: start marker: 0
[16:56:41.344] <TB1> INFO: stop marker: 0
[16:56:41.344] <TB1> INFO: overflow: 0
[16:56:41.344] <TB1> INFO: invalid 5bit words: 0
[16:56:41.344] <TB1> INFO: invalid XOR eye diagram: 0
[16:56:41.344] <TB1> INFO: frame (failed synchr.): 0
[16:56:41.344] <TB1> INFO: idle data (no TBM trl): 0
[16:56:41.344] <TB1> INFO: no data (only TBM hdr): 0
[16:56:41.344] <TB1> INFO: TBM errors: 0
[16:56:41.344] <TB1> INFO: flawed TBM headers: 0
[16:56:41.344] <TB1> INFO: flawed TBM trailers: 0
[16:56:41.344] <TB1> INFO: event ID mismatches: 0
[16:56:41.344] <TB1> INFO: ROC errors: 0
[16:56:41.344] <TB1> INFO: missing ROC header(s): 0
[16:56:41.344] <TB1> INFO: misplaced readback start: 0
[16:56:41.344] <TB1> INFO: Pixel decoding errors: 0
[16:56:41.344] <TB1> INFO: pixel data incomplete: 0
[16:56:41.344] <TB1> INFO: pixel address: 0
[16:56:41.344] <TB1> INFO: pulse height fill bit: 0
[16:56:41.344] <TB1> INFO: buffer corruption: 0
[16:56:41.410] <TB1> INFO: ######################################################################
[16:56:41.410] <TB1> INFO: PixTestTrim::doTest()
[16:56:41.410] <TB1> INFO: ######################################################################
[16:56:41.411] <TB1> INFO: ----------------------------------------------------------------------
[16:56:41.411] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[16:56:41.411] <TB1> INFO: ----------------------------------------------------------------------
[16:56:41.459] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[16:56:41.459] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[16:56:41.474] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[16:56:41.474] <TB1> INFO: run 1 of 1
[16:56:41.712] <TB1> INFO: Expecting 5025280 events.
[16:57:12.113] <TB1> INFO: 823392 events read in total (29798ms).
[16:57:41.785] <TB1> INFO: 1643120 events read in total (59470ms).
[16:58:11.626] <TB1> INFO: 2459672 events read in total (89311ms).
[16:58:41.474] <TB1> INFO: 3270288 events read in total (119159ms).
[16:59:11.936] <TB1> INFO: 4077280 events read in total (149621ms).
[16:59:41.620] <TB1> INFO: 4881432 events read in total (179305ms).
[16:59:47.730] <TB1> INFO: 5025280 events read in total (185415ms).
[16:59:47.785] <TB1> INFO: Test took 186311ms.
[17:00:05.170] <TB1> INFO: ROC 0 VthrComp = 120
[17:00:05.170] <TB1> INFO: ROC 1 VthrComp = 130
[17:00:05.170] <TB1> INFO: ROC 2 VthrComp = 107
[17:00:05.170] <TB1> INFO: ROC 3 VthrComp = 130
[17:00:05.170] <TB1> INFO: ROC 4 VthrComp = 119
[17:00:05.170] <TB1> INFO: ROC 5 VthrComp = 121
[17:00:05.170] <TB1> INFO: ROC 6 VthrComp = 125
[17:00:05.170] <TB1> INFO: ROC 7 VthrComp = 111
[17:00:05.171] <TB1> INFO: ROC 8 VthrComp = 115
[17:00:05.171] <TB1> INFO: ROC 9 VthrComp = 121
[17:00:05.171] <TB1> INFO: ROC 10 VthrComp = 119
[17:00:05.171] <TB1> INFO: ROC 11 VthrComp = 104
[17:00:05.171] <TB1> INFO: ROC 12 VthrComp = 131
[17:00:05.171] <TB1> INFO: ROC 13 VthrComp = 112
[17:00:05.171] <TB1> INFO: ROC 14 VthrComp = 116
[17:00:05.172] <TB1> INFO: ROC 15 VthrComp = 116
[17:00:05.172] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[17:00:05.172] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[17:00:05.187] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:00:05.187] <TB1> INFO: run 1 of 1
[17:00:05.430] <TB1> INFO: Expecting 5025280 events.
[17:00:31.706] <TB1> INFO: 592312 events read in total (25684ms).
[17:00:57.380] <TB1> INFO: 1183056 events read in total (51358ms).
[17:01:23.255] <TB1> INFO: 1773680 events read in total (77233ms).
[17:01:49.542] <TB1> INFO: 2364232 events read in total (103520ms).
[17:02:15.396] <TB1> INFO: 2952768 events read in total (129374ms).
[17:02:41.107] <TB1> INFO: 3538152 events read in total (155085ms).
[17:03:06.462] <TB1> INFO: 4123336 events read in total (180440ms).
[17:03:32.043] <TB1> INFO: 4706760 events read in total (206021ms).
[17:03:46.098] <TB1> INFO: 5025280 events read in total (220076ms).
[17:03:46.191] <TB1> INFO: Test took 221005ms.
[17:04:13.823] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 60.8224 for pixel 3/61 mean/min/max = 47.0567/33.1666/60.9468
[17:04:13.823] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 59.7202 for pixel 16/71 mean/min/max = 45.8461/31.9568/59.7355
[17:04:13.823] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 66.1069 for pixel 16/0 mean/min/max = 50.3492/34.2494/66.4491
[17:04:13.824] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 59.5249 for pixel 2/17 mean/min/max = 46.2803/32.9941/59.5665
[17:04:13.824] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 59.9703 for pixel 22/2 mean/min/max = 46.3451/32.7015/59.9888
[17:04:13.824] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 62.3398 for pixel 11/9 mean/min/max = 47.1022/31.8474/62.3571
[17:04:13.825] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 59.6383 for pixel 50/9 mean/min/max = 45.5564/31.437/59.6759
[17:04:13.825] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 60.3907 for pixel 6/79 mean/min/max = 47.7364/34.9683/60.5046
[17:04:13.825] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 60.062 for pixel 2/4 mean/min/max = 46.3732/32.6809/60.0656
[17:04:13.826] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 59.3099 for pixel 5/79 mean/min/max = 46.5429/33.7531/59.3327
[17:04:13.826] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 56.5014 for pixel 10/71 mean/min/max = 44.1112/31.6884/56.534
[17:04:13.827] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 65.9921 for pixel 26/1 mean/min/max = 49.6557/33.264/66.0474
[17:04:13.827] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 61.469 for pixel 17/7 mean/min/max = 46.3512/31.2281/61.4744
[17:04:13.827] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 57.5288 for pixel 1/51 mean/min/max = 45.3925/33.0879/57.6971
[17:04:13.827] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 58.8745 for pixel 0/5 mean/min/max = 45.659/32.251/59.0671
[17:04:13.828] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 62.2103 for pixel 7/3 mean/min/max = 46.943/31.2716/62.6145
[17:04:13.828] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:04:13.918] <TB1> INFO: Expecting 411648 events.
[17:04:23.404] <TB1> INFO: 411648 events read in total (8895ms).
[17:04:23.411] <TB1> INFO: Expecting 411648 events.
[17:04:32.797] <TB1> INFO: 411648 events read in total (8983ms).
[17:04:32.807] <TB1> INFO: Expecting 411648 events.
[17:04:42.284] <TB1> INFO: 411648 events read in total (9074ms).
[17:04:42.297] <TB1> INFO: Expecting 411648 events.
[17:04:51.637] <TB1> INFO: 411648 events read in total (8936ms).
[17:04:51.654] <TB1> INFO: Expecting 411648 events.
[17:05:01.099] <TB1> INFO: 411648 events read in total (9042ms).
[17:05:01.119] <TB1> INFO: Expecting 411648 events.
[17:05:10.443] <TB1> INFO: 411648 events read in total (8921ms).
[17:05:10.466] <TB1> INFO: Expecting 411648 events.
[17:05:19.829] <TB1> INFO: 411648 events read in total (8960ms).
[17:05:19.855] <TB1> INFO: Expecting 411648 events.
[17:05:29.128] <TB1> INFO: 411648 events read in total (8870ms).
[17:05:29.157] <TB1> INFO: Expecting 411648 events.
[17:05:38.443] <TB1> INFO: 411648 events read in total (8883ms).
[17:05:38.473] <TB1> INFO: Expecting 411648 events.
[17:05:47.719] <TB1> INFO: 411648 events read in total (8843ms).
[17:05:47.752] <TB1> INFO: Expecting 411648 events.
[17:05:57.056] <TB1> INFO: 411648 events read in total (8901ms).
[17:05:57.093] <TB1> INFO: Expecting 411648 events.
[17:06:06.271] <TB1> INFO: 411648 events read in total (8775ms).
[17:06:06.312] <TB1> INFO: Expecting 411648 events.
[17:06:15.591] <TB1> INFO: 411648 events read in total (8876ms).
[17:06:15.699] <TB1> INFO: Expecting 411648 events.
[17:06:25.016] <TB1> INFO: 411648 events read in total (8913ms).
[17:06:25.067] <TB1> INFO: Expecting 411648 events.
[17:06:34.243] <TB1> INFO: 411648 events read in total (8773ms).
[17:06:34.316] <TB1> INFO: Expecting 411648 events.
[17:06:43.787] <TB1> INFO: 411648 events read in total (9068ms).
[17:06:43.852] <TB1> INFO: Test took 150024ms.
[17:06:44.660] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[17:06:44.674] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:06:44.674] <TB1> INFO: run 1 of 1
[17:06:44.910] <TB1> INFO: Expecting 5025280 events.
[17:07:11.612] <TB1> INFO: 587336 events read in total (26110ms).
[17:07:37.105] <TB1> INFO: 1172792 events read in total (51603ms).
[17:08:02.980] <TB1> INFO: 1758328 events read in total (77478ms).
[17:08:28.799] <TB1> INFO: 2343088 events read in total (103297ms).
[17:08:54.654] <TB1> INFO: 2926088 events read in total (129152ms).
[17:09:20.943] <TB1> INFO: 3508608 events read in total (155441ms).
[17:09:47.770] <TB1> INFO: 4092144 events read in total (182268ms).
[17:10:13.835] <TB1> INFO: 4676640 events read in total (208333ms).
[17:10:29.816] <TB1> INFO: 5025280 events read in total (224314ms).
[17:10:29.939] <TB1> INFO: Test took 225266ms.
[17:10:55.143] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 12.217700 .. 146.739901
[17:10:55.387] <TB1> INFO: Expecting 208000 events.
[17:11:04.950] <TB1> INFO: 208000 events read in total (8971ms).
[17:11:04.951] <TB1> INFO: Test took 9807ms.
[17:11:04.001] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 2 .. 156 (-1/-1) hits flags = 528 (plus default)
[17:11:05.015] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:11:05.015] <TB1> INFO: run 1 of 1
[17:11:05.293] <TB1> INFO: Expecting 5158400 events.
[17:11:31.365] <TB1> INFO: 582880 events read in total (25480ms).
[17:11:56.963] <TB1> INFO: 1165952 events read in total (51078ms).
[17:12:23.023] <TB1> INFO: 1749312 events read in total (77138ms).
[17:12:48.820] <TB1> INFO: 2331792 events read in total (102935ms).
[17:13:14.479] <TB1> INFO: 2914832 events read in total (128594ms).
[17:13:40.153] <TB1> INFO: 3497080 events read in total (154268ms).
[17:14:05.539] <TB1> INFO: 4078872 events read in total (179654ms).
[17:14:31.380] <TB1> INFO: 4659608 events read in total (205495ms).
[17:14:53.140] <TB1> INFO: 5158400 events read in total (227255ms).
[17:14:53.224] <TB1> INFO: Test took 228210ms.
[17:15:22.119] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 27.938732 .. 47.451323
[17:15:22.373] <TB1> INFO: Expecting 208000 events.
[17:15:32.390] <TB1> INFO: 208000 events read in total (9426ms).
[17:15:32.391] <TB1> INFO: Test took 10270ms.
[17:15:32.440] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 57 (-1/-1) hits flags = 528 (plus default)
[17:15:32.454] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:15:32.454] <TB1> INFO: run 1 of 1
[17:15:32.733] <TB1> INFO: Expecting 1364480 events.
[17:16:01.850] <TB1> INFO: 652368 events read in total (28525ms).
[17:16:29.638] <TB1> INFO: 1303712 events read in total (56313ms).
[17:16:32.653] <TB1> INFO: 1364480 events read in total (59328ms).
[17:16:32.687] <TB1> INFO: Test took 60233ms.
[17:16:46.683] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 26.754602 .. 47.039542
[17:16:46.968] <TB1> INFO: Expecting 208000 events.
[17:16:57.033] <TB1> INFO: 208000 events read in total (9473ms).
[17:16:57.033] <TB1> INFO: Test took 10349ms.
[17:16:57.081] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 16 .. 57 (-1/-1) hits flags = 528 (plus default)
[17:16:57.095] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:16:57.095] <TB1> INFO: run 1 of 1
[17:16:57.373] <TB1> INFO: Expecting 1397760 events.
[17:17:25.410] <TB1> INFO: 656640 events read in total (27445ms).
[17:17:53.025] <TB1> INFO: 1313256 events read in total (55060ms).
[17:17:56.905] <TB1> INFO: 1397760 events read in total (58940ms).
[17:17:56.935] <TB1> INFO: Test took 59841ms.
[17:18:12.531] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 25.015256 .. 46.096514
[17:18:12.769] <TB1> INFO: Expecting 208000 events.
[17:18:22.549] <TB1> INFO: 208000 events read in total (9188ms).
[17:18:22.550] <TB1> INFO: Test took 10017ms.
[17:18:22.601] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 56 (-1/-1) hits flags = 528 (plus default)
[17:18:22.616] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:18:22.616] <TB1> INFO: run 1 of 1
[17:18:22.907] <TB1> INFO: Expecting 1397760 events.
[17:18:50.872] <TB1> INFO: 664016 events read in total (27373ms).
[17:19:18.845] <TB1> INFO: 1328072 events read in total (55346ms).
[17:19:22.103] <TB1> INFO: 1397760 events read in total (58604ms).
[17:19:22.140] <TB1> INFO: Test took 59524ms.
[17:19:35.633] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[17:19:35.633] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[17:19:35.647] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:19:35.647] <TB1> INFO: run 1 of 1
[17:19:35.921] <TB1> INFO: Expecting 1364480 events.
[17:20:04.062] <TB1> INFO: 668424 events read in total (27549ms).
[17:20:31.764] <TB1> INFO: 1336456 events read in total (55252ms).
[17:20:33.343] <TB1> INFO: 1364480 events read in total (56831ms).
[17:20:33.371] <TB1> INFO: Test took 57725ms.
[17:20:48.702] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C0.dat
[17:20:48.703] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C1.dat
[17:20:48.703] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C2.dat
[17:20:48.703] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C3.dat
[17:20:48.703] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C4.dat
[17:20:48.703] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C5.dat
[17:20:48.703] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C6.dat
[17:20:48.703] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C7.dat
[17:20:48.703] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C8.dat
[17:20:48.703] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C9.dat
[17:20:48.703] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C10.dat
[17:20:48.703] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C11.dat
[17:20:48.703] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C12.dat
[17:20:48.704] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C13.dat
[17:20:48.704] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C14.dat
[17:20:48.704] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C15.dat
[17:20:48.704] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//trimParameters35_C0.dat
[17:20:48.710] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//trimParameters35_C1.dat
[17:20:48.717] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//trimParameters35_C2.dat
[17:20:48.723] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//trimParameters35_C3.dat
[17:20:48.728] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//trimParameters35_C4.dat
[17:20:48.732] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//trimParameters35_C5.dat
[17:20:48.737] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//trimParameters35_C6.dat
[17:20:48.742] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//trimParameters35_C7.dat
[17:20:48.747] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//trimParameters35_C8.dat
[17:20:48.752] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//trimParameters35_C9.dat
[17:20:48.756] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//trimParameters35_C10.dat
[17:20:48.761] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//trimParameters35_C11.dat
[17:20:48.766] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//trimParameters35_C12.dat
[17:20:48.771] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//trimParameters35_C13.dat
[17:20:48.775] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//trimParameters35_C14.dat
[17:20:48.780] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//trimParameters35_C15.dat
[17:20:48.785] <TB1> INFO: PixTestTrim::trimTest() done
[17:20:48.785] <TB1> INFO: vtrim: 142 138 143 141 127 145 140 120 118 116 133 134 141 106 117 140
[17:20:48.785] <TB1> INFO: vthrcomp: 120 130 107 130 119 121 125 111 115 121 119 104 131 112 116 116
[17:20:48.785] <TB1> INFO: vcal mean: 34.97 34.99 35.02 34.85 34.99 34.98 34.97 35.01 34.98 35.03 34.96 35.06 35.05 35.00 34.99 34.97
[17:20:48.785] <TB1> INFO: vcal RMS: 1.00 1.09 1.26 1.01 1.04 1.03 1.14 1.10 0.98 1.02 0.91 1.15 1.13 1.02 0.97 0.97
[17:20:48.785] <TB1> INFO: bits mean: 9.07 9.51 8.20 9.45 9.32 9.66 9.86 8.34 9.18 8.73 9.79 8.55 9.47 9.29 9.11 9.27
[17:20:48.785] <TB1> INFO: bits RMS: 2.69 2.78 2.62 2.64 2.74 2.57 2.68 2.68 2.78 2.78 2.73 2.65 2.80 2.77 2.91 2.87
[17:20:48.793] <TB1> INFO: ----------------------------------------------------------------------
[17:20:48.793] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[17:20:48.793] <TB1> INFO: ----------------------------------------------------------------------
[17:20:48.797] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[17:20:48.812] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:20:48.812] <TB1> INFO: run 1 of 1
[17:20:49.052] <TB1> INFO: Expecting 4160000 events.
[17:21:21.189] <TB1> INFO: 738800 events read in total (31545ms).
[17:21:52.909] <TB1> INFO: 1470350 events read in total (63266ms).
[17:22:24.129] <TB1> INFO: 2196970 events read in total (94485ms).
[17:22:55.114] <TB1> INFO: 2918650 events read in total (125470ms).
[17:23:26.029] <TB1> INFO: 3635665 events read in total (156385ms).
[17:23:48.560] <TB1> INFO: 4160000 events read in total (178916ms).
[17:23:48.849] <TB1> INFO: Test took 180038ms.
[17:24:17.108] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 211 (-1/-1) hits flags = 528 (plus default)
[17:24:17.122] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:24:17.122] <TB1> INFO: run 1 of 1
[17:24:17.358] <TB1> INFO: Expecting 4409600 events.
[17:24:48.775] <TB1> INFO: 702840 events read in total (30825ms).
[17:25:19.880] <TB1> INFO: 1401315 events read in total (61930ms).
[17:25:50.603] <TB1> INFO: 2095415 events read in total (92653ms).
[17:26:21.059] <TB1> INFO: 2785475 events read in total (123109ms).
[17:26:51.314] <TB1> INFO: 3472745 events read in total (153364ms).
[17:27:21.625] <TB1> INFO: 4157880 events read in total (183675ms).
[17:27:33.391] <TB1> INFO: 4409600 events read in total (195441ms).
[17:27:33.505] <TB1> INFO: Test took 196383ms.
[17:28:01.720] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 196 (-1/-1) hits flags = 528 (plus default)
[17:28:01.734] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:28:01.734] <TB1> INFO: run 1 of 1
[17:28:01.973] <TB1> INFO: Expecting 4097600 events.
[17:28:33.634] <TB1> INFO: 720875 events read in total (31069ms).
[17:29:04.479] <TB1> INFO: 1435395 events read in total (61914ms).
[17:29:35.459] <TB1> INFO: 2145880 events read in total (92894ms).
[17:30:06.346] <TB1> INFO: 2851355 events read in total (123781ms).
[17:30:36.767] <TB1> INFO: 3552680 events read in total (154202ms).
[17:31:00.553] <TB1> INFO: 4097600 events read in total (177988ms).
[17:31:00.643] <TB1> INFO: Test took 178910ms.
[17:31:27.641] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 198 (-1/-1) hits flags = 528 (plus default)
[17:31:27.654] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:31:27.654] <TB1> INFO: run 1 of 1
[17:31:27.891] <TB1> INFO: Expecting 4139200 events.
[17:31:59.696] <TB1> INFO: 718575 events read in total (31213ms).
[17:32:30.447] <TB1> INFO: 1430745 events read in total (61964ms).
[17:33:01.437] <TB1> INFO: 2138950 events read in total (92954ms).
[17:33:32.437] <TB1> INFO: 2842560 events read in total (123954ms).
[17:34:03.687] <TB1> INFO: 3542365 events read in total (155204ms).
[17:34:29.603] <TB1> INFO: 4139200 events read in total (181120ms).
[17:34:29.699] <TB1> INFO: Test took 182045ms.
[17:34:58.721] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 196 (-1/-1) hits flags = 528 (plus default)
[17:34:58.734] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:34:58.734] <TB1> INFO: run 1 of 1
[17:34:58.977] <TB1> INFO: Expecting 4097600 events.
[17:35:30.637] <TB1> INFO: 721465 events read in total (31068ms).
[17:36:01.544] <TB1> INFO: 1436095 events read in total (61975ms).
[17:36:32.417] <TB1> INFO: 2146395 events read in total (92848ms).
[17:37:03.235] <TB1> INFO: 2852385 events read in total (123666ms).
[17:37:34.056] <TB1> INFO: 3554185 events read in total (154487ms).
[17:37:58.027] <TB1> INFO: 4097600 events read in total (178458ms).
[17:37:58.197] <TB1> INFO: Test took 179463ms.
[17:38:24.937] <TB1> INFO: PixTestTrim::trimBitTest() done
[17:38:24.938] <TB1> INFO: PixTestTrim::doTest() done, duration: 2503 seconds
[17:38:24.938] <TB1> INFO: Decoding statistics:
[17:38:24.938] <TB1> INFO: General information:
[17:38:24.938] <TB1> INFO: 16bit words read: 0
[17:38:24.938] <TB1> INFO: valid events total: 0
[17:38:24.938] <TB1> INFO: empty events: 0
[17:38:24.938] <TB1> INFO: valid events with pixels: 0
[17:38:24.938] <TB1> INFO: valid pixel hits: 0
[17:38:24.938] <TB1> INFO: Event errors: 0
[17:38:24.938] <TB1> INFO: start marker: 0
[17:38:24.938] <TB1> INFO: stop marker: 0
[17:38:24.938] <TB1> INFO: overflow: 0
[17:38:24.938] <TB1> INFO: invalid 5bit words: 0
[17:38:24.938] <TB1> INFO: invalid XOR eye diagram: 0
[17:38:24.938] <TB1> INFO: frame (failed synchr.): 0
[17:38:24.938] <TB1> INFO: idle data (no TBM trl): 0
[17:38:24.938] <TB1> INFO: no data (only TBM hdr): 0
[17:38:24.938] <TB1> INFO: TBM errors: 0
[17:38:24.938] <TB1> INFO: flawed TBM headers: 0
[17:38:24.938] <TB1> INFO: flawed TBM trailers: 0
[17:38:24.938] <TB1> INFO: event ID mismatches: 0
[17:38:24.938] <TB1> INFO: ROC errors: 0
[17:38:24.938] <TB1> INFO: missing ROC header(s): 0
[17:38:24.938] <TB1> INFO: misplaced readback start: 0
[17:38:24.938] <TB1> INFO: Pixel decoding errors: 0
[17:38:24.938] <TB1> INFO: pixel data incomplete: 0
[17:38:24.938] <TB1> INFO: pixel address: 0
[17:38:24.938] <TB1> INFO: pulse height fill bit: 0
[17:38:24.938] <TB1> INFO: buffer corruption: 0
[17:38:25.545] <TB1> INFO: ######################################################################
[17:38:25.545] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[17:38:25.545] <TB1> INFO: ######################################################################
[17:38:25.786] <TB1> INFO: Expecting 41600 events.
[17:38:29.368] <TB1> INFO: 41600 events read in total (2990ms).
[17:38:29.369] <TB1> INFO: Test took 3823ms.
[17:38:29.818] <TB1> INFO: Expecting 41600 events.
[17:38:33.329] <TB1> INFO: 41600 events read in total (2920ms).
[17:38:33.329] <TB1> INFO: Test took 3757ms.
[17:38:33.619] <TB1> INFO: Expecting 41600 events.
[17:38:37.169] <TB1> INFO: 41600 events read in total (2958ms).
[17:38:37.170] <TB1> INFO: Test took 3816ms.
[17:38:37.462] <TB1> INFO: Expecting 41600 events.
[17:38:41.056] <TB1> INFO: 41600 events read in total (3002ms).
[17:38:41.056] <TB1> INFO: Test took 3860ms.
[17:38:41.346] <TB1> INFO: Expecting 41600 events.
[17:38:44.961] <TB1> INFO: 41600 events read in total (3023ms).
[17:38:44.962] <TB1> INFO: Test took 3882ms.
[17:38:45.255] <TB1> INFO: Expecting 41600 events.
[17:38:48.890] <TB1> INFO: 41600 events read in total (3043ms).
[17:38:48.891] <TB1> INFO: Test took 3902ms.
[17:38:49.181] <TB1> INFO: Expecting 41600 events.
[17:38:52.720] <TB1> INFO: 41600 events read in total (2948ms).
[17:38:52.721] <TB1> INFO: Test took 3806ms.
[17:38:53.031] <TB1> INFO: Expecting 41600 events.
[17:38:56.643] <TB1> INFO: 41600 events read in total (3020ms).
[17:38:56.643] <TB1> INFO: Test took 3898ms.
[17:38:56.933] <TB1> INFO: Expecting 41600 events.
[17:39:00.462] <TB1> INFO: 41600 events read in total (2937ms).
[17:39:00.462] <TB1> INFO: Test took 3795ms.
[17:39:00.752] <TB1> INFO: Expecting 41600 events.
[17:39:04.327] <TB1> INFO: 41600 events read in total (2984ms).
[17:39:04.328] <TB1> INFO: Test took 3842ms.
[17:39:04.620] <TB1> INFO: Expecting 41600 events.
[17:39:08.297] <TB1> INFO: 41600 events read in total (3085ms).
[17:39:08.298] <TB1> INFO: Test took 3943ms.
[17:39:08.590] <TB1> INFO: Expecting 41600 events.
[17:39:12.196] <TB1> INFO: 41600 events read in total (3014ms).
[17:39:12.197] <TB1> INFO: Test took 3872ms.
[17:39:12.488] <TB1> INFO: Expecting 41600 events.
[17:39:16.012] <TB1> INFO: 41600 events read in total (2932ms).
[17:39:16.013] <TB1> INFO: Test took 3791ms.
[17:39:16.306] <TB1> INFO: Expecting 41600 events.
[17:39:19.876] <TB1> INFO: 41600 events read in total (2979ms).
[17:39:19.877] <TB1> INFO: Test took 3837ms.
[17:39:20.167] <TB1> INFO: Expecting 41600 events.
[17:39:23.719] <TB1> INFO: 41600 events read in total (2961ms).
[17:39:23.720] <TB1> INFO: Test took 3819ms.
[17:39:24.009] <TB1> INFO: Expecting 41600 events.
[17:39:27.548] <TB1> INFO: 41600 events read in total (2947ms).
[17:39:27.548] <TB1> INFO: Test took 3804ms.
[17:39:27.838] <TB1> INFO: Expecting 41600 events.
[17:39:31.370] <TB1> INFO: 41600 events read in total (2940ms).
[17:39:31.370] <TB1> INFO: Test took 3798ms.
[17:39:31.686] <TB1> INFO: Expecting 41600 events.
[17:39:35.258] <TB1> INFO: 41600 events read in total (2980ms).
[17:39:35.258] <TB1> INFO: Test took 3861ms.
[17:39:35.551] <TB1> INFO: Expecting 41600 events.
[17:39:39.089] <TB1> INFO: 41600 events read in total (2946ms).
[17:39:39.089] <TB1> INFO: Test took 3804ms.
[17:39:39.379] <TB1> INFO: Expecting 41600 events.
[17:39:42.907] <TB1> INFO: 41600 events read in total (2936ms).
[17:39:42.907] <TB1> INFO: Test took 3793ms.
[17:39:43.198] <TB1> INFO: Expecting 41600 events.
[17:39:46.802] <TB1> INFO: 41600 events read in total (3012ms).
[17:39:46.803] <TB1> INFO: Test took 3871ms.
[17:39:47.093] <TB1> INFO: Expecting 41600 events.
[17:39:50.608] <TB1> INFO: 41600 events read in total (2920ms).
[17:39:50.609] <TB1> INFO: Test took 3782ms.
[17:39:50.899] <TB1> INFO: Expecting 41600 events.
[17:39:54.483] <TB1> INFO: 41600 events read in total (2993ms).
[17:39:54.484] <TB1> INFO: Test took 3851ms.
[17:39:54.774] <TB1> INFO: Expecting 41600 events.
[17:39:58.302] <TB1> INFO: 41600 events read in total (2936ms).
[17:39:58.303] <TB1> INFO: Test took 3795ms.
[17:39:58.596] <TB1> INFO: Expecting 41600 events.
[17:40:02.120] <TB1> INFO: 41600 events read in total (2933ms).
[17:40:02.121] <TB1> INFO: Test took 3791ms.
[17:40:02.416] <TB1> INFO: Expecting 41600 events.
[17:40:05.914] <TB1> INFO: 41600 events read in total (2906ms).
[17:40:05.915] <TB1> INFO: Test took 3770ms.
[17:40:06.207] <TB1> INFO: Expecting 41600 events.
[17:40:09.814] <TB1> INFO: 41600 events read in total (3015ms).
[17:40:09.815] <TB1> INFO: Test took 3874ms.
[17:40:10.110] <TB1> INFO: Expecting 41600 events.
[17:40:13.748] <TB1> INFO: 41600 events read in total (3046ms).
[17:40:13.748] <TB1> INFO: Test took 3904ms.
[17:40:14.042] <TB1> INFO: Expecting 2560 events.
[17:40:14.932] <TB1> INFO: 2560 events read in total (298ms).
[17:40:14.933] <TB1> INFO: Test took 1169ms.
[17:40:15.240] <TB1> INFO: Expecting 2560 events.
[17:40:16.133] <TB1> INFO: 2560 events read in total (301ms).
[17:40:16.134] <TB1> INFO: Test took 1201ms.
[17:40:16.443] <TB1> INFO: Expecting 2560 events.
[17:40:17.333] <TB1> INFO: 2560 events read in total (298ms).
[17:40:17.334] <TB1> INFO: Test took 1200ms.
[17:40:17.640] <TB1> INFO: Expecting 2560 events.
[17:40:18.532] <TB1> INFO: 2560 events read in total (300ms).
[17:40:18.532] <TB1> INFO: Test took 1197ms.
[17:40:18.840] <TB1> INFO: Expecting 2560 events.
[17:40:19.719] <TB1> INFO: 2560 events read in total (287ms).
[17:40:19.720] <TB1> INFO: Test took 1188ms.
[17:40:20.026] <TB1> INFO: Expecting 2560 events.
[17:40:20.911] <TB1> INFO: 2560 events read in total (293ms).
[17:40:20.912] <TB1> INFO: Test took 1192ms.
[17:40:21.220] <TB1> INFO: Expecting 2560 events.
[17:40:22.108] <TB1> INFO: 2560 events read in total (296ms).
[17:40:22.108] <TB1> INFO: Test took 1196ms.
[17:40:22.415] <TB1> INFO: Expecting 2560 events.
[17:40:23.297] <TB1> INFO: 2560 events read in total (290ms).
[17:40:23.298] <TB1> INFO: Test took 1189ms.
[17:40:23.604] <TB1> INFO: Expecting 2560 events.
[17:40:24.495] <TB1> INFO: 2560 events read in total (299ms).
[17:40:24.496] <TB1> INFO: Test took 1198ms.
[17:40:24.803] <TB1> INFO: Expecting 2560 events.
[17:40:25.689] <TB1> INFO: 2560 events read in total (294ms).
[17:40:25.689] <TB1> INFO: Test took 1193ms.
[17:40:25.997] <TB1> INFO: Expecting 2560 events.
[17:40:26.879] <TB1> INFO: 2560 events read in total (290ms).
[17:40:26.879] <TB1> INFO: Test took 1189ms.
[17:40:27.188] <TB1> INFO: Expecting 2560 events.
[17:40:28.074] <TB1> INFO: 2560 events read in total (294ms).
[17:40:28.074] <TB1> INFO: Test took 1194ms.
[17:40:28.381] <TB1> INFO: Expecting 2560 events.
[17:40:29.270] <TB1> INFO: 2560 events read in total (297ms).
[17:40:29.271] <TB1> INFO: Test took 1196ms.
[17:40:29.578] <TB1> INFO: Expecting 2560 events.
[17:40:30.462] <TB1> INFO: 2560 events read in total (293ms).
[17:40:30.462] <TB1> INFO: Test took 1191ms.
[17:40:30.770] <TB1> INFO: Expecting 2560 events.
[17:40:31.659] <TB1> INFO: 2560 events read in total (297ms).
[17:40:31.660] <TB1> INFO: Test took 1197ms.
[17:40:31.968] <TB1> INFO: Expecting 2560 events.
[17:40:32.855] <TB1> INFO: 2560 events read in total (295ms).
[17:40:32.855] <TB1> INFO: Test took 1195ms.
[17:40:32.860] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:40:33.164] <TB1> INFO: Expecting 655360 events.
[17:40:47.920] <TB1> INFO: 655360 events read in total (14165ms).
[17:40:47.935] <TB1> INFO: Expecting 655360 events.
[17:41:02.765] <TB1> INFO: 655360 events read in total (14426ms).
[17:41:02.785] <TB1> INFO: Expecting 655360 events.
[17:41:17.582] <TB1> INFO: 655360 events read in total (14394ms).
[17:41:17.607] <TB1> INFO: Expecting 655360 events.
[17:41:32.410] <TB1> INFO: 655360 events read in total (14400ms).
[17:41:32.439] <TB1> INFO: Expecting 655360 events.
[17:41:47.213] <TB1> INFO: 655360 events read in total (14371ms).
[17:41:47.245] <TB1> INFO: Expecting 655360 events.
[17:42:01.987] <TB1> INFO: 655360 events read in total (14339ms).
[17:42:02.022] <TB1> INFO: Expecting 655360 events.
[17:42:16.772] <TB1> INFO: 655360 events read in total (14347ms).
[17:42:16.812] <TB1> INFO: Expecting 655360 events.
[17:42:31.532] <TB1> INFO: 655360 events read in total (14317ms).
[17:42:31.584] <TB1> INFO: Expecting 655360 events.
[17:42:46.147] <TB1> INFO: 655360 events read in total (14160ms).
[17:42:46.209] <TB1> INFO: Expecting 655360 events.
[17:43:00.791] <TB1> INFO: 655360 events read in total (14179ms).
[17:43:00.900] <TB1> INFO: Expecting 655360 events.
[17:43:15.473] <TB1> INFO: 655360 events read in total (14170ms).
[17:43:15.548] <TB1> INFO: Expecting 655360 events.
[17:43:30.228] <TB1> INFO: 655360 events read in total (14277ms).
[17:43:30.306] <TB1> INFO: Expecting 655360 events.
[17:43:44.878] <TB1> INFO: 655360 events read in total (14169ms).
[17:43:44.957] <TB1> INFO: Expecting 655360 events.
[17:43:59.696] <TB1> INFO: 655360 events read in total (14336ms).
[17:43:59.815] <TB1> INFO: Expecting 655360 events.
[17:44:14.325] <TB1> INFO: 655360 events read in total (14107ms).
[17:44:14.419] <TB1> INFO: Expecting 655360 events.
[17:44:29.040] <TB1> INFO: 655360 events read in total (14218ms).
[17:44:29.141] <TB1> INFO: Test took 236281ms.
[17:44:29.241] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:44:29.493] <TB1> INFO: Expecting 655360 events.
[17:44:44.061] <TB1> INFO: 655360 events read in total (13976ms).
[17:44:44.078] <TB1> INFO: Expecting 655360 events.
[17:44:58.505] <TB1> INFO: 655360 events read in total (14023ms).
[17:44:58.528] <TB1> INFO: Expecting 655360 events.
[17:45:12.996] <TB1> INFO: 655360 events read in total (14065ms).
[17:45:13.019] <TB1> INFO: Expecting 655360 events.
[17:45:27.520] <TB1> INFO: 655360 events read in total (14098ms).
[17:45:27.547] <TB1> INFO: Expecting 655360 events.
[17:45:42.072] <TB1> INFO: 655360 events read in total (14121ms).
[17:45:42.105] <TB1> INFO: Expecting 655360 events.
[17:45:56.585] <TB1> INFO: 655360 events read in total (14077ms).
[17:45:56.630] <TB1> INFO: Expecting 655360 events.
[17:46:11.181] <TB1> INFO: 655360 events read in total (14148ms).
[17:46:11.228] <TB1> INFO: Expecting 655360 events.
[17:46:25.427] <TB1> INFO: 655360 events read in total (13796ms).
[17:46:25.479] <TB1> INFO: Expecting 655360 events.
[17:46:39.746] <TB1> INFO: 655360 events read in total (13864ms).
[17:46:39.818] <TB1> INFO: Expecting 655360 events.
[17:46:54.126] <TB1> INFO: 655360 events read in total (13905ms).
[17:46:54.202] <TB1> INFO: Expecting 655360 events.
[17:47:08.821] <TB1> INFO: 655360 events read in total (14216ms).
[17:47:08.891] <TB1> INFO: Expecting 655360 events.
[17:47:23.510] <TB1> INFO: 655360 events read in total (14216ms).
[17:47:23.606] <TB1> INFO: Expecting 655360 events.
[17:47:37.672] <TB1> INFO: 655360 events read in total (13663ms).
[17:47:37.752] <TB1> INFO: Expecting 655360 events.
[17:47:52.426] <TB1> INFO: 655360 events read in total (14271ms).
[17:47:52.513] <TB1> INFO: Expecting 655360 events.
[17:48:07.268] <TB1> INFO: 655360 events read in total (14352ms).
[17:48:07.361] <TB1> INFO: Expecting 655360 events.
[17:48:22.028] <TB1> INFO: 655360 events read in total (14264ms).
[17:48:22.125] <TB1> INFO: Test took 232884ms.
[17:48:22.302] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:48:22.308] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:48:22.314] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[17:48:22.320] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[17:48:22.326] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:48:22.332] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[17:48:22.338] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[17:48:22.344] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[17:48:22.351] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[17:48:22.357] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:48:22.363] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[17:48:22.369] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[17:48:22.375] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[17:48:22.381] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:48:22.387] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:48:22.393] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:48:22.399] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:48:22.405] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:48:22.411] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[17:48:22.417] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[17:48:22.423] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[17:48:22.429] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:48:22.435] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:48:22.440] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:48:22.446] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:48:22.455] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:48:22.463] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:48:22.471] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:48:22.509] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C0.dat
[17:48:22.509] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C1.dat
[17:48:22.509] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C2.dat
[17:48:22.509] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C3.dat
[17:48:22.509] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C4.dat
[17:48:22.509] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C5.dat
[17:48:22.510] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C6.dat
[17:48:22.510] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C7.dat
[17:48:22.510] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C8.dat
[17:48:22.510] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C9.dat
[17:48:22.510] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C10.dat
[17:48:22.510] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C11.dat
[17:48:22.510] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C12.dat
[17:48:22.510] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C13.dat
[17:48:22.511] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C14.dat
[17:48:22.511] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//dacParameters35_C15.dat
[17:48:22.757] <TB1> INFO: Expecting 41600 events.
[17:48:25.915] <TB1> INFO: 41600 events read in total (2566ms).
[17:48:25.916] <TB1> INFO: Test took 3402ms.
[17:48:26.364] <TB1> INFO: Expecting 41600 events.
[17:48:29.424] <TB1> INFO: 41600 events read in total (2469ms).
[17:48:29.425] <TB1> INFO: Test took 3299ms.
[17:48:29.961] <TB1> INFO: Expecting 41600 events.
[17:48:33.101] <TB1> INFO: 41600 events read in total (2548ms).
[17:48:33.102] <TB1> INFO: Test took 3463ms.
[17:48:33.318] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:33.407] <TB1> INFO: Expecting 2560 events.
[17:48:34.296] <TB1> INFO: 2560 events read in total (297ms).
[17:48:34.297] <TB1> INFO: Test took 979ms.
[17:48:34.299] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:34.605] <TB1> INFO: Expecting 2560 events.
[17:48:35.489] <TB1> INFO: 2560 events read in total (292ms).
[17:48:35.489] <TB1> INFO: Test took 1190ms.
[17:48:35.491] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:35.798] <TB1> INFO: Expecting 2560 events.
[17:48:36.687] <TB1> INFO: 2560 events read in total (297ms).
[17:48:36.687] <TB1> INFO: Test took 1197ms.
[17:48:36.689] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:36.996] <TB1> INFO: Expecting 2560 events.
[17:48:37.884] <TB1> INFO: 2560 events read in total (296ms).
[17:48:37.885] <TB1> INFO: Test took 1196ms.
[17:48:37.887] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:38.194] <TB1> INFO: Expecting 2560 events.
[17:48:39.080] <TB1> INFO: 2560 events read in total (294ms).
[17:48:39.080] <TB1> INFO: Test took 1193ms.
[17:48:39.082] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:39.389] <TB1> INFO: Expecting 2560 events.
[17:48:40.280] <TB1> INFO: 2560 events read in total (299ms).
[17:48:40.281] <TB1> INFO: Test took 1199ms.
[17:48:40.283] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:40.588] <TB1> INFO: Expecting 2560 events.
[17:48:41.474] <TB1> INFO: 2560 events read in total (294ms).
[17:48:41.475] <TB1> INFO: Test took 1192ms.
[17:48:41.477] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:41.783] <TB1> INFO: Expecting 2560 events.
[17:48:42.675] <TB1> INFO: 2560 events read in total (300ms).
[17:48:42.676] <TB1> INFO: Test took 1199ms.
[17:48:42.678] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:42.984] <TB1> INFO: Expecting 2560 events.
[17:48:43.866] <TB1> INFO: 2560 events read in total (291ms).
[17:48:43.867] <TB1> INFO: Test took 1189ms.
[17:48:43.869] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:44.176] <TB1> INFO: Expecting 2560 events.
[17:48:45.057] <TB1> INFO: 2560 events read in total (289ms).
[17:48:45.057] <TB1> INFO: Test took 1188ms.
[17:48:45.059] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:45.366] <TB1> INFO: Expecting 2560 events.
[17:48:46.252] <TB1> INFO: 2560 events read in total (294ms).
[17:48:46.253] <TB1> INFO: Test took 1194ms.
[17:48:46.255] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:46.560] <TB1> INFO: Expecting 2560 events.
[17:48:47.446] <TB1> INFO: 2560 events read in total (294ms).
[17:48:47.447] <TB1> INFO: Test took 1192ms.
[17:48:47.449] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:47.755] <TB1> INFO: Expecting 2560 events.
[17:48:48.651] <TB1> INFO: 2560 events read in total (304ms).
[17:48:48.652] <TB1> INFO: Test took 1203ms.
[17:48:48.655] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:48.960] <TB1> INFO: Expecting 2560 events.
[17:48:49.855] <TB1> INFO: 2560 events read in total (303ms).
[17:48:49.855] <TB1> INFO: Test took 1201ms.
[17:48:49.858] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:50.165] <TB1> INFO: Expecting 2560 events.
[17:48:51.053] <TB1> INFO: 2560 events read in total (296ms).
[17:48:51.054] <TB1> INFO: Test took 1196ms.
[17:48:51.058] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:51.362] <TB1> INFO: Expecting 2560 events.
[17:48:52.253] <TB1> INFO: 2560 events read in total (299ms).
[17:48:52.254] <TB1> INFO: Test took 1196ms.
[17:48:52.257] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:52.561] <TB1> INFO: Expecting 2560 events.
[17:48:53.450] <TB1> INFO: 2560 events read in total (297ms).
[17:48:53.451] <TB1> INFO: Test took 1194ms.
[17:48:53.454] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:53.758] <TB1> INFO: Expecting 2560 events.
[17:48:54.648] <TB1> INFO: 2560 events read in total (298ms).
[17:48:54.649] <TB1> INFO: Test took 1195ms.
[17:48:54.652] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:54.957] <TB1> INFO: Expecting 2560 events.
[17:48:55.851] <TB1> INFO: 2560 events read in total (303ms).
[17:48:55.852] <TB1> INFO: Test took 1200ms.
[17:48:55.856] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:56.160] <TB1> INFO: Expecting 2560 events.
[17:48:57.051] <TB1> INFO: 2560 events read in total (299ms).
[17:48:57.051] <TB1> INFO: Test took 1195ms.
[17:48:57.055] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:57.359] <TB1> INFO: Expecting 2560 events.
[17:48:58.239] <TB1> INFO: 2560 events read in total (289ms).
[17:48:58.239] <TB1> INFO: Test took 1184ms.
[17:48:58.243] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:58.546] <TB1> INFO: Expecting 2560 events.
[17:48:59.441] <TB1> INFO: 2560 events read in total (303ms).
[17:48:59.441] <TB1> INFO: Test took 1198ms.
[17:48:59.443] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:59.750] <TB1> INFO: Expecting 2560 events.
[17:49:00.640] <TB1> INFO: 2560 events read in total (298ms).
[17:49:00.641] <TB1> INFO: Test took 1198ms.
[17:49:00.644] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:49:00.949] <TB1> INFO: Expecting 2560 events.
[17:49:01.838] <TB1> INFO: 2560 events read in total (298ms).
[17:49:01.839] <TB1> INFO: Test took 1195ms.
[17:49:01.843] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:49:02.147] <TB1> INFO: Expecting 2560 events.
[17:49:03.033] <TB1> INFO: 2560 events read in total (294ms).
[17:49:03.033] <TB1> INFO: Test took 1190ms.
[17:49:03.036] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:49:03.341] <TB1> INFO: Expecting 2560 events.
[17:49:04.233] <TB1> INFO: 2560 events read in total (300ms).
[17:49:04.234] <TB1> INFO: Test took 1198ms.
[17:49:04.238] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:49:04.542] <TB1> INFO: Expecting 2560 events.
[17:49:05.431] <TB1> INFO: 2560 events read in total (297ms).
[17:49:05.432] <TB1> INFO: Test took 1194ms.
[17:49:05.435] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:49:05.740] <TB1> INFO: Expecting 2560 events.
[17:49:06.629] <TB1> INFO: 2560 events read in total (297ms).
[17:49:06.630] <TB1> INFO: Test took 1195ms.
[17:49:06.632] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:49:06.939] <TB1> INFO: Expecting 2560 events.
[17:49:07.833] <TB1> INFO: 2560 events read in total (302ms).
[17:49:07.833] <TB1> INFO: Test took 1201ms.
[17:49:07.836] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:49:08.142] <TB1> INFO: Expecting 2560 events.
[17:49:09.035] <TB1> INFO: 2560 events read in total (301ms).
[17:49:09.035] <TB1> INFO: Test took 1199ms.
[17:49:09.037] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:49:09.344] <TB1> INFO: Expecting 2560 events.
[17:49:10.232] <TB1> INFO: 2560 events read in total (296ms).
[17:49:10.233] <TB1> INFO: Test took 1196ms.
[17:49:10.235] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:49:10.541] <TB1> INFO: Expecting 2560 events.
[17:49:11.432] <TB1> INFO: 2560 events read in total (299ms).
[17:49:11.433] <TB1> INFO: Test took 1198ms.
[17:49:11.922] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 646 seconds
[17:49:11.922] <TB1> INFO: PH scale (per ROC): 36 38 36 47 44 48 37 45 48 42 37 53 33 48 38 38
[17:49:11.922] <TB1> INFO: PH offset (per ROC): 94 93 104 99 96 102 97 87 108 82 94 108 94 132 93 97
[17:49:11.933] <TB1> INFO: Decoding statistics:
[17:49:11.933] <TB1> INFO: General information:
[17:49:11.933] <TB1> INFO: 16bit words read: 127888
[17:49:11.933] <TB1> INFO: valid events total: 20480
[17:49:11.934] <TB1> INFO: empty events: 17976
[17:49:11.934] <TB1> INFO: valid events with pixels: 2504
[17:49:11.934] <TB1> INFO: valid pixel hits: 2504
[17:49:11.934] <TB1> INFO: Event errors: 0
[17:49:11.934] <TB1> INFO: start marker: 0
[17:49:11.934] <TB1> INFO: stop marker: 0
[17:49:11.934] <TB1> INFO: overflow: 0
[17:49:11.934] <TB1> INFO: invalid 5bit words: 0
[17:49:11.934] <TB1> INFO: invalid XOR eye diagram: 0
[17:49:11.934] <TB1> INFO: frame (failed synchr.): 0
[17:49:11.934] <TB1> INFO: idle data (no TBM trl): 0
[17:49:11.934] <TB1> INFO: no data (only TBM hdr): 0
[17:49:11.934] <TB1> INFO: TBM errors: 0
[17:49:11.934] <TB1> INFO: flawed TBM headers: 0
[17:49:11.934] <TB1> INFO: flawed TBM trailers: 0
[17:49:11.934] <TB1> INFO: event ID mismatches: 0
[17:49:11.934] <TB1> INFO: ROC errors: 0
[17:49:11.934] <TB1> INFO: missing ROC header(s): 0
[17:49:11.934] <TB1> INFO: misplaced readback start: 0
[17:49:11.934] <TB1> INFO: Pixel decoding errors: 0
[17:49:11.934] <TB1> INFO: pixel data incomplete: 0
[17:49:11.934] <TB1> INFO: pixel address: 0
[17:49:11.934] <TB1> INFO: pulse height fill bit: 0
[17:49:11.934] <TB1> INFO: buffer corruption: 0
[17:49:12.094] <TB1> INFO: ######################################################################
[17:49:12.094] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[17:49:12.094] <TB1> INFO: ######################################################################
[17:49:12.109] <TB1> INFO: scanning low vcal = 10
[17:49:12.347] <TB1> INFO: Expecting 41600 events.
[17:49:15.935] <TB1> INFO: 41600 events read in total (2996ms).
[17:49:15.935] <TB1> INFO: Test took 3826ms.
[17:49:15.937] <TB1> INFO: scanning low vcal = 20
[17:49:16.232] <TB1> INFO: Expecting 41600 events.
[17:49:19.837] <TB1> INFO: 41600 events read in total (3014ms).
[17:49:19.837] <TB1> INFO: Test took 3900ms.
[17:49:19.839] <TB1> INFO: scanning low vcal = 30
[17:49:20.132] <TB1> INFO: Expecting 41600 events.
[17:49:23.797] <TB1> INFO: 41600 events read in total (3073ms).
[17:49:23.798] <TB1> INFO: Test took 3959ms.
[17:49:23.800] <TB1> INFO: scanning low vcal = 40
[17:49:24.077] <TB1> INFO: Expecting 41600 events.
[17:49:28.084] <TB1> INFO: 41600 events read in total (3415ms).
[17:49:28.085] <TB1> INFO: Test took 4285ms.
[17:49:28.089] <TB1> INFO: scanning low vcal = 50
[17:49:28.366] <TB1> INFO: Expecting 41600 events.
[17:49:32.381] <TB1> INFO: 41600 events read in total (3423ms).
[17:49:32.382] <TB1> INFO: Test took 4293ms.
[17:49:32.385] <TB1> INFO: scanning low vcal = 60
[17:49:32.662] <TB1> INFO: Expecting 41600 events.
[17:49:36.688] <TB1> INFO: 41600 events read in total (3434ms).
[17:49:36.689] <TB1> INFO: Test took 4304ms.
[17:49:36.692] <TB1> INFO: scanning low vcal = 70
[17:49:36.970] <TB1> INFO: Expecting 41600 events.
[17:49:40.960] <TB1> INFO: 41600 events read in total (3398ms).
[17:49:40.961] <TB1> INFO: Test took 4269ms.
[17:49:40.964] <TB1> INFO: scanning low vcal = 80
[17:49:41.242] <TB1> INFO: Expecting 41600 events.
[17:49:45.247] <TB1> INFO: 41600 events read in total (3414ms).
[17:49:45.248] <TB1> INFO: Test took 4283ms.
[17:49:45.251] <TB1> INFO: scanning low vcal = 90
[17:49:45.529] <TB1> INFO: Expecting 41600 events.
[17:49:49.552] <TB1> INFO: 41600 events read in total (3432ms).
[17:49:49.553] <TB1> INFO: Test took 4302ms.
[17:49:49.557] <TB1> INFO: scanning low vcal = 100
[17:49:49.833] <TB1> INFO: Expecting 41600 events.
[17:49:53.817] <TB1> INFO: 41600 events read in total (3392ms).
[17:49:53.818] <TB1> INFO: Test took 4261ms.
[17:49:53.821] <TB1> INFO: scanning low vcal = 110
[17:49:54.098] <TB1> INFO: Expecting 41600 events.
[17:49:58.095] <TB1> INFO: 41600 events read in total (3405ms).
[17:49:58.095] <TB1> INFO: Test took 4274ms.
[17:49:58.098] <TB1> INFO: scanning low vcal = 120
[17:49:58.375] <TB1> INFO: Expecting 41600 events.
[17:50:02.421] <TB1> INFO: 41600 events read in total (3454ms).
[17:50:02.422] <TB1> INFO: Test took 4324ms.
[17:50:02.425] <TB1> INFO: scanning low vcal = 130
[17:50:02.701] <TB1> INFO: Expecting 41600 events.
[17:50:06.689] <TB1> INFO: 41600 events read in total (3396ms).
[17:50:06.690] <TB1> INFO: Test took 4265ms.
[17:50:06.693] <TB1> INFO: scanning low vcal = 140
[17:50:06.970] <TB1> INFO: Expecting 41600 events.
[17:50:10.974] <TB1> INFO: 41600 events read in total (3413ms).
[17:50:10.975] <TB1> INFO: Test took 4282ms.
[17:50:10.978] <TB1> INFO: scanning low vcal = 150
[17:50:11.255] <TB1> INFO: Expecting 41600 events.
[17:50:15.250] <TB1> INFO: 41600 events read in total (3404ms).
[17:50:15.250] <TB1> INFO: Test took 4272ms.
[17:50:15.253] <TB1> INFO: scanning low vcal = 160
[17:50:15.530] <TB1> INFO: Expecting 41600 events.
[17:50:19.542] <TB1> INFO: 41600 events read in total (3420ms).
[17:50:19.543] <TB1> INFO: Test took 4289ms.
[17:50:19.546] <TB1> INFO: scanning low vcal = 170
[17:50:19.827] <TB1> INFO: Expecting 41600 events.
[17:50:23.812] <TB1> INFO: 41600 events read in total (3393ms).
[17:50:23.813] <TB1> INFO: Test took 4267ms.
[17:50:23.818] <TB1> INFO: scanning low vcal = 180
[17:50:24.093] <TB1> INFO: Expecting 41600 events.
[17:50:28.072] <TB1> INFO: 41600 events read in total (3387ms).
[17:50:28.072] <TB1> INFO: Test took 4253ms.
[17:50:28.075] <TB1> INFO: scanning low vcal = 190
[17:50:28.353] <TB1> INFO: Expecting 41600 events.
[17:50:32.324] <TB1> INFO: 41600 events read in total (3380ms).
[17:50:32.324] <TB1> INFO: Test took 4248ms.
[17:50:32.327] <TB1> INFO: scanning low vcal = 200
[17:50:32.605] <TB1> INFO: Expecting 41600 events.
[17:50:36.588] <TB1> INFO: 41600 events read in total (3391ms).
[17:50:36.588] <TB1> INFO: Test took 4260ms.
[17:50:36.591] <TB1> INFO: scanning low vcal = 210
[17:50:36.868] <TB1> INFO: Expecting 41600 events.
[17:50:40.813] <TB1> INFO: 41600 events read in total (3353ms).
[17:50:40.814] <TB1> INFO: Test took 4223ms.
[17:50:40.817] <TB1> INFO: scanning low vcal = 220
[17:50:41.093] <TB1> INFO: Expecting 41600 events.
[17:50:45.074] <TB1> INFO: 41600 events read in total (3389ms).
[17:50:45.075] <TB1> INFO: Test took 4258ms.
[17:50:45.078] <TB1> INFO: scanning low vcal = 230
[17:50:45.355] <TB1> INFO: Expecting 41600 events.
[17:50:49.313] <TB1> INFO: 41600 events read in total (3367ms).
[17:50:49.314] <TB1> INFO: Test took 4236ms.
[17:50:49.318] <TB1> INFO: scanning low vcal = 240
[17:50:49.594] <TB1> INFO: Expecting 41600 events.
[17:50:53.548] <TB1> INFO: 41600 events read in total (3362ms).
[17:50:53.548] <TB1> INFO: Test took 4230ms.
[17:50:53.552] <TB1> INFO: scanning low vcal = 250
[17:50:53.828] <TB1> INFO: Expecting 41600 events.
[17:50:57.776] <TB1> INFO: 41600 events read in total (3356ms).
[17:50:57.777] <TB1> INFO: Test took 4225ms.
[17:50:57.782] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[17:50:58.057] <TB1> INFO: Expecting 41600 events.
[17:51:02.046] <TB1> INFO: 41600 events read in total (3397ms).
[17:51:02.046] <TB1> INFO: Test took 4264ms.
[17:51:02.050] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[17:51:02.326] <TB1> INFO: Expecting 41600 events.
[17:51:06.270] <TB1> INFO: 41600 events read in total (3352ms).
[17:51:06.271] <TB1> INFO: Test took 4221ms.
[17:51:06.274] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[17:51:06.550] <TB1> INFO: Expecting 41600 events.
[17:51:10.515] <TB1> INFO: 41600 events read in total (3373ms).
[17:51:10.516] <TB1> INFO: Test took 4242ms.
[17:51:10.520] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[17:51:10.796] <TB1> INFO: Expecting 41600 events.
[17:51:14.820] <TB1> INFO: 41600 events read in total (3433ms).
[17:51:14.821] <TB1> INFO: Test took 4301ms.
[17:51:14.824] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[17:51:15.122] <TB1> INFO: Expecting 41600 events.
[17:51:19.124] <TB1> INFO: 41600 events read in total (3410ms).
[17:51:19.124] <TB1> INFO: Test took 4301ms.
[17:51:19.544] <TB1> INFO: PixTestGainPedestal::measure() done
[17:51:52.237] <TB1> INFO: PixTestGainPedestal::fit() done
[17:51:52.237] <TB1> INFO: non-linearity mean: 0.916 0.915 0.934 0.932 0.916 0.933 0.930 0.934 0.973 0.941 0.892 0.974 0.938 0.976 0.945 0.899
[17:51:52.237] <TB1> INFO: non-linearity RMS: 0.083 0.109 0.058 0.107 0.108 0.068 0.146 0.080 0.009 0.104 0.131 0.011 0.170 0.004 0.180 0.132
[17:51:52.238] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//phCalibrationFitErr35_C0.dat
[17:51:52.251] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//phCalibrationFitErr35_C1.dat
[17:51:52.266] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//phCalibrationFitErr35_C2.dat
[17:51:52.281] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//phCalibrationFitErr35_C3.dat
[17:51:52.294] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//phCalibrationFitErr35_C4.dat
[17:51:52.307] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//phCalibrationFitErr35_C5.dat
[17:51:52.320] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//phCalibrationFitErr35_C6.dat
[17:51:52.333] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//phCalibrationFitErr35_C7.dat
[17:51:52.346] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//phCalibrationFitErr35_C8.dat
[17:51:52.359] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//phCalibrationFitErr35_C9.dat
[17:51:52.372] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//phCalibrationFitErr35_C10.dat
[17:51:52.385] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//phCalibrationFitErr35_C11.dat
[17:51:52.398] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//phCalibrationFitErr35_C12.dat
[17:51:52.411] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//phCalibrationFitErr35_C13.dat
[17:51:52.424] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//phCalibrationFitErr35_C14.dat
[17:51:52.438] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1010_FullQualification_2016-10-17_13h57m_1476705426//003_Fulltest_p17//phCalibrationFitErr35_C15.dat
[17:51:52.451] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 160 seconds
[17:51:52.451] <TB1> INFO: Decoding statistics:
[17:51:52.451] <TB1> INFO: General information:
[17:51:52.451] <TB1> INFO: 16bit words read: 3320246
[17:51:52.451] <TB1> INFO: valid events total: 332800
[17:51:52.451] <TB1> INFO: empty events: 54
[17:51:52.451] <TB1> INFO: valid events with pixels: 332746
[17:51:52.451] <TB1> INFO: valid pixel hits: 661723
[17:51:52.451] <TB1> INFO: Event errors: 0
[17:51:52.451] <TB1> INFO: start marker: 0
[17:51:52.451] <TB1> INFO: stop marker: 0
[17:51:52.451] <TB1> INFO: overflow: 0
[17:51:52.451] <TB1> INFO: invalid 5bit words: 0
[17:51:52.451] <TB1> INFO: invalid XOR eye diagram: 0
[17:51:52.451] <TB1> INFO: frame (failed synchr.): 0
[17:51:52.451] <TB1> INFO: idle data (no TBM trl): 0
[17:51:52.451] <TB1> INFO: no data (only TBM hdr): 0
[17:51:52.451] <TB1> INFO: TBM errors: 0
[17:51:52.451] <TB1> INFO: flawed TBM headers: 0
[17:51:52.451] <TB1> INFO: flawed TBM trailers: 0
[17:51:52.451] <TB1> INFO: event ID mismatches: 0
[17:51:52.451] <TB1> INFO: ROC errors: 0
[17:51:52.451] <TB1> INFO: missing ROC header(s): 0
[17:51:52.451] <TB1> INFO: misplaced readback start: 0
[17:51:52.451] <TB1> INFO: Pixel decoding errors: 0
[17:51:52.451] <TB1> INFO: pixel data incomplete: 0
[17:51:52.451] <TB1> INFO: pixel address: 0
[17:51:52.451] <TB1> INFO: pulse height fill bit: 0
[17:51:52.451] <TB1> INFO: buffer corruption: 0
[17:51:52.467] <TB1> INFO: Decoding statistics:
[17:51:52.467] <TB1> INFO: General information:
[17:51:52.467] <TB1> INFO: 16bit words read: 3449670
[17:51:52.467] <TB1> INFO: valid events total: 353536
[17:51:52.467] <TB1> INFO: empty events: 18286
[17:51:52.467] <TB1> INFO: valid events with pixels: 335250
[17:51:52.467] <TB1> INFO: valid pixel hits: 664227
[17:51:52.467] <TB1> INFO: Event errors: 0
[17:51:52.467] <TB1> INFO: start marker: 0
[17:51:52.467] <TB1> INFO: stop marker: 0
[17:51:52.467] <TB1> INFO: overflow: 0
[17:51:52.467] <TB1> INFO: invalid 5bit words: 0
[17:51:52.467] <TB1> INFO: invalid XOR eye diagram: 0
[17:51:52.467] <TB1> INFO: frame (failed synchr.): 0
[17:51:52.467] <TB1> INFO: idle data (no TBM trl): 0
[17:51:52.467] <TB1> INFO: no data (only TBM hdr): 0
[17:51:52.467] <TB1> INFO: TBM errors: 0
[17:51:52.467] <TB1> INFO: flawed TBM headers: 0
[17:51:52.467] <TB1> INFO: flawed TBM trailers: 0
[17:51:52.467] <TB1> INFO: event ID mismatches: 0
[17:51:52.467] <TB1> INFO: ROC errors: 0
[17:51:52.467] <TB1> INFO: missing ROC header(s): 0
[17:51:52.467] <TB1> INFO: misplaced readback start: 0
[17:51:52.467] <TB1> INFO: Pixel decoding errors: 0
[17:51:52.467] <TB1> INFO: pixel data incomplete: 0
[17:51:52.467] <TB1> INFO: pixel address: 0
[17:51:52.467] <TB1> INFO: pulse height fill bit: 0
[17:51:52.467] <TB1> INFO: buffer corruption: 0
[17:51:52.468] <TB1> INFO: enter test to run
[17:51:52.468] <TB1> INFO: test: exit no parameter change
[17:51:52.601] <TB1> QUIET: Connection to board 154 closed.
[17:51:52.603] <TB1> INFO: pXar: this is the end, my friend