[12:57:52.526] <TB3> INFO: *** Welcome to pxar ***
[12:57:52.526] <TB3> INFO: *** Today: 2016/10/16
[12:57:52.535] <TB3> INFO: *** Version: c8ba-dirty
[12:57:52.535] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters_C15.dat
[12:57:52.536] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//tbmParameters_C1b.dat
[12:57:52.536] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//defaultMaskFile.dat
[12:57:52.536] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//trimParameters_C15.dat
[12:57:52.598] <TB3> INFO: clk: 4
[12:57:52.598] <TB3> INFO: ctr: 4
[12:57:52.598] <TB3> INFO: sda: 19
[12:57:52.598] <TB3> INFO: tin: 9
[12:57:52.598] <TB3> INFO: level: 15
[12:57:52.598] <TB3> INFO: triggerdelay: 0
[12:57:52.598] <TB3> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[12:57:52.598] <TB3> INFO: Log level: INFO
[12:57:52.607] <TB3> INFO: Found DTB DTB_WWVASW
[12:57:52.615] <TB3> QUIET: Connection to board DTB_WWVASW opened.
[12:57:52.617] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[12:57:52.619] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[12:57:54.111] <TB3> INFO: DUT info:
[12:57:54.111] <TB3> INFO: The DUT currently contains the following objects:
[12:57:54.111] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[12:57:54.111] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:57:54.111] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:57:54.111] <TB3> INFO: TBM Core alpha (2): 7 registers set
[12:57:54.111] <TB3> INFO: TBM Core beta (3): 7 registers set
[12:57:54.111] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[12:57:54.111] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:57:54.111] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:57:54.111] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:57:54.112] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:57:54.112] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:57:54.112] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:57:54.112] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:57:54.112] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:57:54.112] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:57:54.112] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:57:54.112] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:57:54.112] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:57:54.112] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:57:54.112] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:57:54.112] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:57:54.112] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:57:54.513] <TB3> INFO: enter 'restricted' command line mode
[12:57:54.513] <TB3> INFO: enter test to run
[12:57:54.514] <TB3> INFO: test: pretest no parameter change
[12:57:54.514] <TB3> INFO: running: pretest
[12:57:54.522] <TB3> INFO: ######################################################################
[12:57:54.522] <TB3> INFO: PixTestPretest::doTest()
[12:57:54.522] <TB3> INFO: ######################################################################
[12:57:54.524] <TB3> INFO: ----------------------------------------------------------------------
[12:57:54.524] <TB3> INFO: PixTestPretest::programROC()
[12:57:54.524] <TB3> INFO: ----------------------------------------------------------------------
[12:58:12.538] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:58:12.538] <TB3> INFO: IA differences per ROC: 19.3 17.7 19.3 19.3 18.5 18.5 20.1 20.1 18.5 23.3 20.9 20.9 19.3 20.1 19.3 18.5
[12:58:12.601] <TB3> INFO: ----------------------------------------------------------------------
[12:58:12.601] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:58:12.601] <TB3> INFO: ----------------------------------------------------------------------
[12:58:18.598] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 377.8 mA = 23.6125 mA/ROC
[12:58:18.598] <TB3> INFO: i(loss) [mA/ROC]: 19.3 19.3 19.3 18.5 19.3 19.3 20.1 19.3 19.3 19.3 19.3 18.5 19.3 19.3 19.3 19.3
[12:58:18.633] <TB3> INFO: ----------------------------------------------------------------------
[12:58:18.633] <TB3> INFO: PixTestPretest::findTiming()
[12:58:18.633] <TB3> INFO: ----------------------------------------------------------------------
[12:58:18.634] <TB3> INFO: PixTestCmd::init()

[12:58:50.810] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[12:58:50.810] <TB3> INFO: (success/tries = 100/100), width = 4
[12:58:52.315] <TB3> INFO: ----------------------------------------------------------------------
[12:58:52.315] <TB3> INFO: PixTestPretest::findWorkingPixel()
[12:58:52.315] <TB3> INFO: ----------------------------------------------------------------------
[12:58:52.411] <TB3> INFO: Expecting 231680 events.
[12:59:02.420] <TB3> INFO: 231680 events read in total (9418ms).
[12:59:02.428] <TB3> INFO: Test took 10108ms.
[12:59:02.679] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:59:02.715] <TB3> INFO: ----------------------------------------------------------------------
[12:59:02.715] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[12:59:02.715] <TB3> INFO: ----------------------------------------------------------------------
[12:59:02.810] <TB3> INFO: Expecting 231680 events.
[12:59:12.920] <TB3> INFO: 231680 events read in total (9518ms).
[12:59:12.930] <TB3> INFO: Test took 10210ms.
[12:59:13.195] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[12:59:13.195] <TB3> INFO: CalDel: 85 81 83 87 102 92 82 100 92 93 109 97 101 99 103 88
[12:59:13.196] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 52 51 51 51 51 51
[12:59:13.199] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters_C0.dat
[12:59:13.199] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters_C1.dat
[12:59:13.199] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters_C2.dat
[12:59:13.200] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters_C3.dat
[12:59:13.200] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters_C4.dat
[12:59:13.200] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters_C5.dat
[12:59:13.200] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters_C6.dat
[12:59:13.200] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters_C7.dat
[12:59:13.201] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters_C8.dat
[12:59:13.201] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters_C9.dat
[12:59:13.201] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters_C10.dat
[12:59:13.201] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters_C11.dat
[12:59:13.201] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters_C12.dat
[12:59:13.202] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters_C13.dat
[12:59:13.202] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters_C14.dat
[12:59:13.202] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters_C15.dat
[12:59:13.202] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//tbmParameters_C0a.dat
[12:59:13.202] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//tbmParameters_C0b.dat
[12:59:13.202] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//tbmParameters_C1a.dat
[12:59:13.203] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//tbmParameters_C1b.dat
[12:59:13.203] <TB3> INFO: PixTestPretest::doTest() done, duration: 78 seconds
[12:59:13.256] <TB3> INFO: enter test to run
[12:59:13.256] <TB3> INFO: test: FullTest no parameter change
[12:59:13.256] <TB3> INFO: running: fulltest
[12:59:13.256] <TB3> INFO: ######################################################################
[12:59:13.256] <TB3> INFO: PixTestFullTest::doTest()
[12:59:13.256] <TB3> INFO: ######################################################################
[12:59:13.257] <TB3> INFO: ######################################################################
[12:59:13.257] <TB3> INFO: PixTestAlive::doTest()
[12:59:13.257] <TB3> INFO: ######################################################################
[12:59:13.259] <TB3> INFO: ----------------------------------------------------------------------
[12:59:13.259] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:59:13.259] <TB3> INFO: ----------------------------------------------------------------------
[12:59:13.496] <TB3> INFO: Expecting 41600 events.
[12:59:17.014] <TB3> INFO: 41600 events read in total (2926ms).
[12:59:17.015] <TB3> INFO: Test took 3755ms.
[12:59:17.243] <TB3> INFO: PixTestAlive::aliveTest() done
[12:59:17.243] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:59:17.244] <TB3> INFO: ----------------------------------------------------------------------
[12:59:17.244] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:59:17.244] <TB3> INFO: ----------------------------------------------------------------------
[12:59:17.485] <TB3> INFO: Expecting 41600 events.
[12:59:20.495] <TB3> INFO: 41600 events read in total (2418ms).
[12:59:20.495] <TB3> INFO: Test took 3249ms.
[12:59:20.496] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:59:20.736] <TB3> INFO: PixTestAlive::maskTest() done
[12:59:20.736] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:59:20.737] <TB3> INFO: ----------------------------------------------------------------------
[12:59:20.737] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:59:20.737] <TB3> INFO: ----------------------------------------------------------------------
[12:59:20.975] <TB3> INFO: Expecting 41600 events.
[12:59:24.659] <TB3> INFO: 41600 events read in total (3092ms).
[12:59:24.660] <TB3> INFO: Test took 3921ms.
[12:59:24.899] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[12:59:24.899] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:59:24.899] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[12:59:24.899] <TB3> INFO: Decoding statistics:
[12:59:24.899] <TB3> INFO: General information:
[12:59:24.899] <TB3> INFO: 16bit words read: 0
[12:59:24.899] <TB3> INFO: valid events total: 0
[12:59:24.899] <TB3> INFO: empty events: 0
[12:59:24.899] <TB3> INFO: valid events with pixels: 0
[12:59:24.899] <TB3> INFO: valid pixel hits: 0
[12:59:24.899] <TB3> INFO: Event errors: 0
[12:59:24.899] <TB3> INFO: start marker: 0
[12:59:24.899] <TB3> INFO: stop marker: 0
[12:59:24.899] <TB3> INFO: overflow: 0
[12:59:24.899] <TB3> INFO: invalid 5bit words: 0
[12:59:24.899] <TB3> INFO: invalid XOR eye diagram: 0
[12:59:24.899] <TB3> INFO: frame (failed synchr.): 0
[12:59:24.899] <TB3> INFO: idle data (no TBM trl): 0
[12:59:24.899] <TB3> INFO: no data (only TBM hdr): 0
[12:59:24.899] <TB3> INFO: TBM errors: 0
[12:59:24.899] <TB3> INFO: flawed TBM headers: 0
[12:59:24.899] <TB3> INFO: flawed TBM trailers: 0
[12:59:24.899] <TB3> INFO: event ID mismatches: 0
[12:59:24.899] <TB3> INFO: ROC errors: 0
[12:59:24.900] <TB3> INFO: missing ROC header(s): 0
[12:59:24.900] <TB3> INFO: misplaced readback start: 0
[12:59:24.900] <TB3> INFO: Pixel decoding errors: 0
[12:59:24.900] <TB3> INFO: pixel data incomplete: 0
[12:59:24.900] <TB3> INFO: pixel address: 0
[12:59:24.900] <TB3> INFO: pulse height fill bit: 0
[12:59:24.900] <TB3> INFO: buffer corruption: 0
[12:59:24.905] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C15.dat
[12:59:24.905] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//phCalibrationFitErr_C15.dat

[12:59:24.906] <TB3> INFO: ######################################################################
[12:59:24.906] <TB3> INFO: PixTestReadback::doTest()
[12:59:24.906] <TB3> INFO: ######################################################################
[12:59:24.906] <TB3> INFO: ----------------------------------------------------------------------
[12:59:24.906] <TB3> INFO: PixTestReadback::CalibrateVd()
[12:59:24.906] <TB3> INFO: ----------------------------------------------------------------------
[12:59:34.886] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C0.dat
[12:59:34.886] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C1.dat
[12:59:34.886] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C2.dat
[12:59:34.887] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C3.dat
[12:59:34.887] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C4.dat
[12:59:34.887] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C5.dat
[12:59:34.887] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C6.dat
[12:59:34.887] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C7.dat
[12:59:34.887] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C8.dat
[12:59:34.887] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C9.dat
[12:59:34.887] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C10.dat
[12:59:34.887] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C11.dat
[12:59:34.887] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C12.dat
[12:59:34.887] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C13.dat
[12:59:34.888] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C14.dat
[12:59:34.888] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C15.dat
[12:59:34.919] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:59:34.919] <TB3> INFO: ----------------------------------------------------------------------
[12:59:34.919] <TB3> INFO: PixTestReadback::CalibrateVa()
[12:59:34.919] <TB3> INFO: ----------------------------------------------------------------------
[12:59:44.859] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C0.dat
[12:59:44.860] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C1.dat
[12:59:44.860] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C2.dat
[12:59:44.860] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C3.dat
[12:59:44.860] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C4.dat
[12:59:44.860] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C5.dat
[12:59:44.860] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C6.dat
[12:59:44.860] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C7.dat
[12:59:44.860] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C8.dat
[12:59:44.860] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C9.dat
[12:59:44.860] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C10.dat
[12:59:44.860] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C11.dat
[12:59:44.860] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C12.dat
[12:59:44.860] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C13.dat
[12:59:44.861] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C14.dat
[12:59:44.861] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C15.dat
[12:59:44.890] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:59:44.890] <TB3> INFO: ----------------------------------------------------------------------
[12:59:44.890] <TB3> INFO: PixTestReadback::readbackVbg()
[12:59:44.890] <TB3> INFO: ----------------------------------------------------------------------
[12:59:52.566] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:59:52.566] <TB3> INFO: ----------------------------------------------------------------------
[12:59:52.566] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[12:59:52.566] <TB3> INFO: ----------------------------------------------------------------------
[12:59:52.566] <TB3> INFO: Vbg will be calibrated using Vd calibration
[12:59:52.566] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 150calibrated Vbg = 1.20866 :::*/*/*/*/
[12:59:52.566] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 156.6calibrated Vbg = 1.2088 :::*/*/*/*/
[12:59:52.566] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 154.9calibrated Vbg = 1.21047 :::*/*/*/*/
[12:59:52.566] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 159.8calibrated Vbg = 1.20303 :::*/*/*/*/
[12:59:52.566] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 151.6calibrated Vbg = 1.2017 :::*/*/*/*/
[12:59:52.566] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 153.4calibrated Vbg = 1.21375 :::*/*/*/*/
[12:59:52.566] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 153.1calibrated Vbg = 1.21325 :::*/*/*/*/
[12:59:52.566] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 157.1calibrated Vbg = 1.21562 :::*/*/*/*/
[12:59:52.566] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 151.5calibrated Vbg = 1.21003 :::*/*/*/*/
[12:59:52.566] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 150.1calibrated Vbg = 1.20626 :::*/*/*/*/
[12:59:52.566] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 158.8calibrated Vbg = 1.20536 :::*/*/*/*/
[12:59:52.566] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 154.6calibrated Vbg = 1.19876 :::*/*/*/*/
[12:59:52.566] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 150.2calibrated Vbg = 1.2019 :::*/*/*/*/
[12:59:52.566] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 153.7calibrated Vbg = 1.2099 :::*/*/*/*/
[12:59:52.566] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 157.1calibrated Vbg = 1.20681 :::*/*/*/*/
[12:59:52.567] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 160calibrated Vbg = 1.20785 :::*/*/*/*/
[12:59:52.569] <TB3> INFO: ----------------------------------------------------------------------
[12:59:52.569] <TB3> INFO: PixTestReadback::CalibrateIa()
[12:59:52.569] <TB3> INFO: ----------------------------------------------------------------------
[13:02:33.379] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C0.dat
[13:02:33.379] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C1.dat
[13:02:33.379] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C2.dat
[13:02:33.379] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C3.dat
[13:02:33.379] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C4.dat
[13:02:33.379] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C5.dat
[13:02:33.379] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C6.dat
[13:02:33.379] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C7.dat
[13:02:33.380] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C8.dat
[13:02:33.380] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C9.dat
[13:02:33.380] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C10.dat
[13:02:33.380] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C11.dat
[13:02:33.380] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C12.dat
[13:02:33.380] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C13.dat
[13:02:33.380] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C14.dat
[13:02:33.380] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//readbackCal_C15.dat
[13:02:33.410] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[13:02:33.411] <TB3> INFO: PixTestReadback::doTest() done
[13:02:33.411] <TB3> INFO: Decoding statistics:
[13:02:33.411] <TB3> INFO: General information:
[13:02:33.411] <TB3> INFO: 16bit words read: 1536
[13:02:33.411] <TB3> INFO: valid events total: 256
[13:02:33.411] <TB3> INFO: empty events: 256
[13:02:33.411] <TB3> INFO: valid events with pixels: 0
[13:02:33.411] <TB3> INFO: valid pixel hits: 0
[13:02:33.411] <TB3> INFO: Event errors: 0
[13:02:33.411] <TB3> INFO: start marker: 0
[13:02:33.411] <TB3> INFO: stop marker: 0
[13:02:33.411] <TB3> INFO: overflow: 0
[13:02:33.411] <TB3> INFO: invalid 5bit words: 0
[13:02:33.411] <TB3> INFO: invalid XOR eye diagram: 0
[13:02:33.411] <TB3> INFO: frame (failed synchr.): 0
[13:02:33.411] <TB3> INFO: idle data (no TBM trl): 0
[13:02:33.411] <TB3> INFO: no data (only TBM hdr): 0
[13:02:33.411] <TB3> INFO: TBM errors: 0
[13:02:33.411] <TB3> INFO: flawed TBM headers: 0
[13:02:33.411] <TB3> INFO: flawed TBM trailers: 0
[13:02:33.411] <TB3> INFO: event ID mismatches: 0
[13:02:33.411] <TB3> INFO: ROC errors: 0
[13:02:33.411] <TB3> INFO: missing ROC header(s): 0
[13:02:33.411] <TB3> INFO: misplaced readback start: 0
[13:02:33.411] <TB3> INFO: Pixel decoding errors: 0
[13:02:33.411] <TB3> INFO: pixel data incomplete: 0
[13:02:33.411] <TB3> INFO: pixel address: 0
[13:02:33.411] <TB3> INFO: pulse height fill bit: 0
[13:02:33.411] <TB3> INFO: buffer corruption: 0
[13:02:33.459] <TB3> INFO: ######################################################################
[13:02:33.459] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[13:02:33.459] <TB3> INFO: ######################################################################
[13:02:33.461] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[13:02:33.476] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:02:33.476] <TB3> INFO: run 1 of 1
[13:02:33.720] <TB3> INFO: Expecting 3120000 events.
[13:03:05.198] <TB3> INFO: 685955 events read in total (30886ms).











[13:03:35.756] <TB3> INFO: 1366950 events read in total (61444ms).











[13:04:06.347] <TB3> INFO: 2046415 events read in total (92035ms).











[13:04:37.705] <TB3> INFO: 2726605 events read in total (123394ms).











[13:04:55.616] <TB3> INFO: 3120000 events read in total (141304ms).
[13:04:55.682] <TB3> INFO: Test took 142207ms.
[13:05:18.948] <TB3> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 165 seconds
[13:05:18.948] <TB3> INFO: number of dead bumps (per ROC): 1 0 0 0 0 0 2 10 8 1 1 0 0 0 0 0
[13:05:18.948] <TB3> INFO: separation cut (per ROC): 108 101 105 103 114 119 109 121 104 133 125 126 110 104 116 105
[13:05:18.948] <TB3> INFO: Decoding statistics:
[13:05:18.949] <TB3> INFO: General information:
[13:05:18.949] <TB3> INFO: 16bit words read: 0
[13:05:18.949] <TB3> INFO: valid events total: 0
[13:05:18.949] <TB3> INFO: empty events: 0
[13:05:18.949] <TB3> INFO: valid events with pixels: 0
[13:05:18.949] <TB3> INFO: valid pixel hits: 0
[13:05:18.949] <TB3> INFO: Event errors: 0
[13:05:18.949] <TB3> INFO: start marker: 0
[13:05:18.949] <TB3> INFO: stop marker: 0
[13:05:18.949] <TB3> INFO: overflow: 0
[13:05:18.949] <TB3> INFO: invalid 5bit words: 0
[13:05:18.949] <TB3> INFO: invalid XOR eye diagram: 0
[13:05:18.949] <TB3> INFO: frame (failed synchr.): 0
[13:05:18.949] <TB3> INFO: idle data (no TBM trl): 0
[13:05:18.949] <TB3> INFO: no data (only TBM hdr): 0
[13:05:18.949] <TB3> INFO: TBM errors: 0
[13:05:18.949] <TB3> INFO: flawed TBM headers: 0
[13:05:18.949] <TB3> INFO: flawed TBM trailers: 0
[13:05:18.949] <TB3> INFO: event ID mismatches: 0
[13:05:18.949] <TB3> INFO: ROC errors: 0
[13:05:18.949] <TB3> INFO: missing ROC header(s): 0
[13:05:18.949] <TB3> INFO: misplaced readback start: 0
[13:05:18.949] <TB3> INFO: Pixel decoding errors: 0
[13:05:18.949] <TB3> INFO: pixel data incomplete: 0
[13:05:18.949] <TB3> INFO: pixel address: 0
[13:05:18.949] <TB3> INFO: pulse height fill bit: 0
[13:05:18.949] <TB3> INFO: buffer corruption: 0
[13:05:19.004] <TB3> INFO: ######################################################################
[13:05:19.004] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[13:05:19.004] <TB3> INFO: ######################################################################
[13:05:19.004] <TB3> INFO: ----------------------------------------------------------------------
[13:05:19.004] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[13:05:19.004] <TB3> INFO: ----------------------------------------------------------------------
[13:05:19.004] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[13:05:19.018] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[13:05:19.018] <TB3> INFO: run 1 of 1
[13:05:19.343] <TB3> INFO: Expecting 36608000 events.
[13:05:43.461] <TB3> INFO: 698150 events read in total (23526ms).
[13:06:06.923] <TB3> INFO: 1378600 events read in total (46988ms).
[13:06:30.392] <TB3> INFO: 2060500 events read in total (70457ms).
[13:06:53.525] <TB3> INFO: 2740400 events read in total (93590ms).
[13:07:16.736] <TB3> INFO: 3422100 events read in total (116801ms).
[13:07:39.954] <TB3> INFO: 4100950 events read in total (140019ms).
[13:08:03.134] <TB3> INFO: 4783100 events read in total (163199ms).
[13:08:26.473] <TB3> INFO: 5460650 events read in total (186538ms).
[13:08:49.287] <TB3> INFO: 6137750 events read in total (209352ms).
[13:09:11.974] <TB3> INFO: 6812600 events read in total (232039ms).
[13:09:34.889] <TB3> INFO: 7490700 events read in total (254954ms).
[13:09:58.087] <TB3> INFO: 8169100 events read in total (278152ms).
[13:10:20.792] <TB3> INFO: 8848050 events read in total (300857ms).
[13:10:44.122] <TB3> INFO: 9524900 events read in total (324187ms).
[13:11:06.973] <TB3> INFO: 10198700 events read in total (347038ms).
[13:11:29.001] <TB3> INFO: 10874550 events read in total (370066ms).
[13:11:53.204] <TB3> INFO: 11549050 events read in total (393269ms).
[13:12:16.288] <TB3> INFO: 12222300 events read in total (416353ms).
[13:12:39.239] <TB3> INFO: 12896750 events read in total (439304ms).
[13:13:02.326] <TB3> INFO: 13571200 events read in total (462391ms).
[13:13:25.348] <TB3> INFO: 14245500 events read in total (485413ms).
[13:13:48.532] <TB3> INFO: 14919650 events read in total (508597ms).
[13:14:11.832] <TB3> INFO: 15590800 events read in total (531897ms).
[13:14:35.006] <TB3> INFO: 16262700 events read in total (555071ms).
[13:14:58.205] <TB3> INFO: 16936700 events read in total (578270ms).
[13:15:21.234] <TB3> INFO: 17608150 events read in total (601299ms).
[13:15:44.233] <TB3> INFO: 18278500 events read in total (624298ms).
[13:16:07.670] <TB3> INFO: 18951500 events read in total (647735ms).
[13:16:30.634] <TB3> INFO: 19620400 events read in total (670699ms).
[13:16:53.649] <TB3> INFO: 20289800 events read in total (693714ms).
[13:17:16.737] <TB3> INFO: 20957150 events read in total (716802ms).
[13:17:40.061] <TB3> INFO: 21626400 events read in total (740126ms).
[13:18:03.271] <TB3> INFO: 22295450 events read in total (763336ms).
[13:18:26.350] <TB3> INFO: 22963600 events read in total (786415ms).
[13:18:49.284] <TB3> INFO: 23632350 events read in total (809349ms).
[13:19:12.279] <TB3> INFO: 24299900 events read in total (832344ms).
[13:19:35.191] <TB3> INFO: 24968150 events read in total (855256ms).
[13:19:58.008] <TB3> INFO: 25636650 events read in total (878073ms).
[13:20:21.141] <TB3> INFO: 26306300 events read in total (901206ms).
[13:20:44.262] <TB3> INFO: 26973450 events read in total (924327ms).
[13:21:07.357] <TB3> INFO: 27640950 events read in total (947422ms).
[13:21:30.493] <TB3> INFO: 28308000 events read in total (970558ms).
[13:21:53.588] <TB3> INFO: 28974700 events read in total (993653ms).
[13:22:16.701] <TB3> INFO: 29640450 events read in total (1016767ms).
[13:22:39.338] <TB3> INFO: 30306050 events read in total (1039403ms).
[13:23:02.303] <TB3> INFO: 30971700 events read in total (1062368ms).
[13:23:25.205] <TB3> INFO: 31637050 events read in total (1085270ms).
[13:23:48.076] <TB3> INFO: 32304300 events read in total (1108141ms).
[13:24:11.127] <TB3> INFO: 32971500 events read in total (1131192ms).
[13:24:34.170] <TB3> INFO: 33640150 events read in total (1154235ms).
[13:24:57.111] <TB3> INFO: 34310100 events read in total (1177176ms).
[13:25:20.282] <TB3> INFO: 34979800 events read in total (1200347ms).
[13:25:43.658] <TB3> INFO: 35652100 events read in total (1223723ms).
[13:26:06.866] <TB3> INFO: 36333950 events read in total (1246931ms).
[13:26:16.675] <TB3> INFO: 36608000 events read in total (1256740ms).
[13:26:16.749] <TB3> INFO: Test took 1257731ms.
[13:26:17.272] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:26:19.248] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:26:21.403] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:26:23.228] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:26:24.881] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:26:26.512] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:26:27.928] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:26:29.339] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:26:30.733] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:26:32.129] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:26:33.504] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:26:34.897] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:26:36.308] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:26:37.708] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:26:39.097] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:26:40.986] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:26:42.787] <TB3> INFO: PixTestScurves::scurves() done
[13:26:42.787] <TB3> INFO: Vcal mean: 122.66 117.70 121.81 119.96 116.17 120.45 125.83 124.95 116.15 124.24 126.41 121.17 124.88 117.46 118.29 115.00
[13:26:42.787] <TB3> INFO: Vcal RMS: 6.25 5.43 6.10 5.98 5.23 6.05 5.65 6.52 5.67 6.38 6.49 6.26 6.26 5.14 6.47 5.21
[13:26:42.787] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1283 seconds
[13:26:42.787] <TB3> INFO: Decoding statistics:
[13:26:42.787] <TB3> INFO: General information:
[13:26:42.787] <TB3> INFO: 16bit words read: 0
[13:26:42.787] <TB3> INFO: valid events total: 0
[13:26:42.787] <TB3> INFO: empty events: 0
[13:26:42.787] <TB3> INFO: valid events with pixels: 0
[13:26:42.787] <TB3> INFO: valid pixel hits: 0
[13:26:42.787] <TB3> INFO: Event errors: 0
[13:26:42.787] <TB3> INFO: start marker: 0
[13:26:42.787] <TB3> INFO: stop marker: 0
[13:26:42.787] <TB3> INFO: overflow: 0
[13:26:42.787] <TB3> INFO: invalid 5bit words: 0
[13:26:42.787] <TB3> INFO: invalid XOR eye diagram: 0
[13:26:42.787] <TB3> INFO: frame (failed synchr.): 0
[13:26:42.787] <TB3> INFO: idle data (no TBM trl): 0
[13:26:42.788] <TB3> INFO: no data (only TBM hdr): 0
[13:26:42.788] <TB3> INFO: TBM errors: 0
[13:26:42.788] <TB3> INFO: flawed TBM headers: 0
[13:26:42.788] <TB3> INFO: flawed TBM trailers: 0
[13:26:42.788] <TB3> INFO: event ID mismatches: 0
[13:26:42.788] <TB3> INFO: ROC errors: 0
[13:26:42.788] <TB3> INFO: missing ROC header(s): 0
[13:26:42.788] <TB3> INFO: misplaced readback start: 0
[13:26:42.788] <TB3> INFO: Pixel decoding errors: 0
[13:26:42.788] <TB3> INFO: pixel data incomplete: 0
[13:26:42.788] <TB3> INFO: pixel address: 0
[13:26:42.788] <TB3> INFO: pulse height fill bit: 0
[13:26:42.788] <TB3> INFO: buffer corruption: 0
[13:26:42.855] <TB3> INFO: ######################################################################
[13:26:42.855] <TB3> INFO: PixTestTrim::doTest()
[13:26:42.855] <TB3> INFO: ######################################################################
[13:26:42.856] <TB3> INFO: ----------------------------------------------------------------------
[13:26:42.856] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[13:26:42.856] <TB3> INFO: ----------------------------------------------------------------------
[13:26:42.902] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:26:42.902] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[13:26:42.915] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:26:42.915] <TB3> INFO: run 1 of 1
[13:26:43.154] <TB3> INFO: Expecting 5025280 events.
[13:27:14.332] <TB3> INFO: 832880 events read in total (30586ms).
[13:27:44.463] <TB3> INFO: 1661992 events read in total (60717ms).
[13:28:15.023] <TB3> INFO: 2488256 events read in total (91278ms).
[13:28:45.340] <TB3> INFO: 3311632 events read in total (121594ms).
[13:29:16.020] <TB3> INFO: 4132144 events read in total (152274ms).
[13:29:47.135] <TB3> INFO: 4951912 events read in total (183389ms).
[13:29:50.295] <TB3> INFO: 5025280 events read in total (186549ms).
[13:29:50.343] <TB3> INFO: Test took 187428ms.
[13:30:07.319] <TB3> INFO: ROC 0 VthrComp = 119
[13:30:07.319] <TB3> INFO: ROC 1 VthrComp = 117
[13:30:07.319] <TB3> INFO: ROC 2 VthrComp = 120
[13:30:07.319] <TB3> INFO: ROC 3 VthrComp = 112
[13:30:07.319] <TB3> INFO: ROC 4 VthrComp = 112
[13:30:07.319] <TB3> INFO: ROC 5 VthrComp = 116
[13:30:07.320] <TB3> INFO: ROC 6 VthrComp = 127
[13:30:07.320] <TB3> INFO: ROC 7 VthrComp = 127
[13:30:07.320] <TB3> INFO: ROC 8 VthrComp = 108
[13:30:07.320] <TB3> INFO: ROC 9 VthrComp = 122
[13:30:07.320] <TB3> INFO: ROC 10 VthrComp = 121
[13:30:07.320] <TB3> INFO: ROC 11 VthrComp = 119
[13:30:07.320] <TB3> INFO: ROC 12 VthrComp = 114
[13:30:07.320] <TB3> INFO: ROC 13 VthrComp = 117
[13:30:07.320] <TB3> INFO: ROC 14 VthrComp = 112
[13:30:07.320] <TB3> INFO: ROC 15 VthrComp = 115
[13:30:07.320] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:30:07.320] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[13:30:07.335] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:30:07.335] <TB3> INFO: run 1 of 1
[13:30:07.612] <TB3> INFO: Expecting 5025280 events.
[13:30:34.117] <TB3> INFO: 591872 events read in total (25913ms).
[13:31:00.236] <TB3> INFO: 1182136 events read in total (52032ms).
[13:31:26.022] <TB3> INFO: 1773192 events read in total (77818ms).
[13:31:52.179] <TB3> INFO: 2363408 events read in total (103975ms).
[13:32:17.728] <TB3> INFO: 2951288 events read in total (129524ms).
[13:32:43.488] <TB3> INFO: 3538256 events read in total (155284ms).
[13:33:09.709] <TB3> INFO: 4124512 events read in total (181505ms).
[13:33:36.234] <TB3> INFO: 4709952 events read in total (208030ms).
[13:33:50.347] <TB3> INFO: 5025280 events read in total (222143ms).
[13:33:50.416] <TB3> INFO: Test took 223081ms.
[13:34:12.860] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 60.8395 for pixel 20/3 mean/min/max = 46.3491/31.7209/60.9774
[13:34:12.861] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 59.2503 for pixel 21/0 mean/min/max = 46.134/32.991/59.2771
[13:34:12.861] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 62.5239 for pixel 14/73 mean/min/max = 47.3547/32.0998/62.6096
[13:34:12.861] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 63.3574 for pixel 18/5 mean/min/max = 47.8523/32.3462/63.3585
[13:34:12.862] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 60.3768 for pixel 12/10 mean/min/max = 46.8853/33.3594/60.4112
[13:34:12.862] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 59.7343 for pixel 0/1 mean/min/max = 46.2371/32.61/59.8641
[13:34:12.862] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 60.8734 for pixel 3/2 mean/min/max = 47.1648/33.3448/60.9848
[13:34:12.863] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 58.789 for pixel 0/42 mean/min/max = 44.7477/30.6822/58.8133
[13:34:12.864] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 68.0778 for pixel 7/21 mean/min/max = 51.2308/34.358/68.1035
[13:34:12.864] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 61.8322 for pixel 2/79 mean/min/max = 47.4343/33.0279/61.8407
[13:34:12.865] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 63.7332 for pixel 18/1 mean/min/max = 47.8862/32.0272/63.7451
[13:34:12.865] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 61.1327 for pixel 0/57 mean/min/max = 46.5824/32.0204/61.1443
[13:34:12.866] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 61.7703 for pixel 20/62 mean/min/max = 47.3987/32.8422/61.9552
[13:34:12.866] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 58.4278 for pixel 51/3 mean/min/max = 45.7476/32.8692/58.6259
[13:34:12.867] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 61.8668 for pixel 28/72 mean/min/max = 47.7239/33.4437/62.0041
[13:34:12.867] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 59.3608 for pixel 6/7 mean/min/max = 45.8563/32.3337/59.3789
[13:34:12.868] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:34:12.957] <TB3> INFO: Expecting 411648 events.
[13:34:22.702] <TB3> INFO: 411648 events read in total (9153ms).
[13:34:22.711] <TB3> INFO: Expecting 411648 events.
[13:34:32.167] <TB3> INFO: 411648 events read in total (9053ms).
[13:34:32.177] <TB3> INFO: Expecting 411648 events.
[13:34:41.640] <TB3> INFO: 411648 events read in total (9061ms).
[13:34:41.655] <TB3> INFO: Expecting 411648 events.
[13:34:51.092] <TB3> INFO: 411648 events read in total (9034ms).
[13:34:51.108] <TB3> INFO: Expecting 411648 events.
[13:35:00.616] <TB3> INFO: 411648 events read in total (9105ms).
[13:35:00.640] <TB3> INFO: Expecting 411648 events.
[13:35:10.039] <TB3> INFO: 411648 events read in total (8996ms).
[13:35:10.059] <TB3> INFO: Expecting 411648 events.
[13:35:19.555] <TB3> INFO: 411648 events read in total (9093ms).
[13:35:19.586] <TB3> INFO: Expecting 411648 events.
[13:35:28.982] <TB3> INFO: 411648 events read in total (8992ms).
[13:35:29.011] <TB3> INFO: Expecting 411648 events.
[13:35:38.490] <TB3> INFO: 411648 events read in total (9076ms).
[13:35:38.519] <TB3> INFO: Expecting 411648 events.
[13:35:47.888] <TB3> INFO: 411648 events read in total (8965ms).
[13:35:47.919] <TB3> INFO: Expecting 411648 events.
[13:35:57.328] <TB3> INFO: 411648 events read in total (9006ms).
[13:35:57.362] <TB3> INFO: Expecting 411648 events.
[13:36:06.509] <TB3> INFO: 411648 events read in total (8744ms).
[13:36:06.545] <TB3> INFO: Expecting 411648 events.
[13:36:15.809] <TB3> INFO: 411648 events read in total (8861ms).
[13:36:15.848] <TB3> INFO: Expecting 411648 events.
[13:36:25.366] <TB3> INFO: 411648 events read in total (9115ms).
[13:36:25.407] <TB3> INFO: Expecting 411648 events.
[13:36:34.626] <TB3> INFO: 411648 events read in total (8816ms).
[13:36:34.680] <TB3> INFO: Expecting 411648 events.
[13:36:43.877] <TB3> INFO: 411648 events read in total (8794ms).
[13:36:43.924] <TB3> INFO: Test took 151056ms.
[13:36:44.608] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[13:36:44.621] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:36:44.621] <TB3> INFO: run 1 of 1
[13:36:44.858] <TB3> INFO: Expecting 5025280 events.
[13:37:11.703] <TB3> INFO: 592816 events read in total (26253ms).
[13:37:37.824] <TB3> INFO: 1185280 events read in total (52375ms).
[13:38:04.194] <TB3> INFO: 1776368 events read in total (78744ms).
[13:38:31.097] <TB3> INFO: 2366488 events read in total (105647ms).
[13:38:57.245] <TB3> INFO: 2956640 events read in total (131795ms).
[13:39:23.453] <TB3> INFO: 3549824 events read in total (158003ms).
[13:39:49.414] <TB3> INFO: 4141288 events read in total (183964ms).
[13:40:16.029] <TB3> INFO: 4735016 events read in total (210579ms).
[13:40:29.457] <TB3> INFO: 5025280 events read in total (224007ms).
[13:40:29.603] <TB3> INFO: Test took 224983ms.
[13:40:49.962] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 9.731882 .. 145.839882
[13:40:50.218] <TB3> INFO: Expecting 208000 events.
[13:40:59.752] <TB3> INFO: 208000 events read in total (8943ms).
[13:40:59.753] <TB3> INFO: Test took 9790ms.
[13:40:59.802] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 9 .. 155 (-1/-1) hits flags = 528 (plus default)
[13:40:59.815] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:40:59.815] <TB3> INFO: run 1 of 1
[13:41:00.094] <TB3> INFO: Expecting 4892160 events.
[13:41:26.191] <TB3> INFO: 573832 events read in total (25505ms).
[13:41:52.269] <TB3> INFO: 1147992 events read in total (51584ms).
[13:42:18.034] <TB3> INFO: 1721912 events read in total (77348ms).
[13:42:43.812] <TB3> INFO: 2296184 events read in total (103126ms).
[13:43:09.815] <TB3> INFO: 2869944 events read in total (129129ms).
[13:43:35.751] <TB3> INFO: 3443512 events read in total (155065ms).
[13:44:01.797] <TB3> INFO: 4017208 events read in total (181111ms).
[13:44:28.689] <TB3> INFO: 4590624 events read in total (208003ms).
[13:44:42.304] <TB3> INFO: 4892160 events read in total (221618ms).
[13:44:42.413] <TB3> INFO: Test took 222597ms.
[13:45:07.574] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 27.165337 .. 46.552323
[13:45:07.853] <TB3> INFO: Expecting 208000 events.
[13:45:17.548] <TB3> INFO: 208000 events read in total (9103ms).
[13:45:17.549] <TB3> INFO: Test took 9974ms.
[13:45:17.598] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 56 (-1/-1) hits flags = 528 (plus default)
[13:45:17.611] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:45:17.611] <TB3> INFO: run 1 of 1
[13:45:17.889] <TB3> INFO: Expecting 1331200 events.
[13:45:46.270] <TB3> INFO: 657936 events read in total (27789ms).
[13:46:14.499] <TB3> INFO: 1313936 events read in total (56019ms).
[13:46:15.820] <TB3> INFO: 1331200 events read in total (57339ms).
[13:46:15.861] <TB3> INFO: Test took 58251ms.
[13:46:30.809] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 27.993459 .. 48.777037
[13:46:31.048] <TB3> INFO: Expecting 208000 events.
[13:46:40.706] <TB3> INFO: 208000 events read in total (9066ms).
[13:46:40.707] <TB3> INFO: Test took 9896ms.
[13:46:40.754] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 17 .. 58 (-1/-1) hits flags = 528 (plus default)
[13:46:40.768] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:46:40.768] <TB3> INFO: run 1 of 1
[13:46:41.046] <TB3> INFO: Expecting 1397760 events.
[13:47:09.079] <TB3> INFO: 649816 events read in total (27441ms).
[13:47:36.881] <TB3> INFO: 1298912 events read in total (55243ms).
[13:47:41.420] <TB3> INFO: 1397760 events read in total (59783ms).
[13:47:41.451] <TB3> INFO: Test took 60684ms.
[13:47:54.799] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 27.147866 .. 50.174783
[13:47:55.036] <TB3> INFO: Expecting 208000 events.
[13:48:04.753] <TB3> INFO: 208000 events read in total (9125ms).
[13:48:04.754] <TB3> INFO: Test took 9953ms.
[13:48:04.802] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 17 .. 60 (-1/-1) hits flags = 528 (plus default)
[13:48:04.815] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:48:04.815] <TB3> INFO: run 1 of 1
[13:48:05.094] <TB3> INFO: Expecting 1464320 events.
[13:48:33.128] <TB3> INFO: 641960 events read in total (27442ms).
[13:49:00.635] <TB3> INFO: 1283664 events read in total (54949ms).
[13:49:08.960] <TB3> INFO: 1464320 events read in total (63274ms).
[13:49:08.991] <TB3> INFO: Test took 64177ms.
[13:49:23.624] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:49:23.624] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[13:49:23.637] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:49:23.637] <TB3> INFO: run 1 of 1
[13:49:23.876] <TB3> INFO: Expecting 1364480 events.
[13:49:52.931] <TB3> INFO: 668432 events read in total (28464ms).
[13:50:20.928] <TB3> INFO: 1336320 events read in total (56462ms).
[13:50:22.601] <TB3> INFO: 1364480 events read in total (58135ms).
[13:50:22.637] <TB3> INFO: Test took 59000ms.
[13:50:36.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C0.dat
[13:50:36.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C1.dat
[13:50:36.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C2.dat
[13:50:36.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C3.dat
[13:50:36.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C4.dat
[13:50:36.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C5.dat
[13:50:36.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C6.dat
[13:50:36.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C7.dat
[13:50:36.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C8.dat
[13:50:36.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C9.dat
[13:50:36.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C10.dat
[13:50:36.538] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C11.dat
[13:50:36.539] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C12.dat
[13:50:36.539] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C13.dat
[13:50:36.539] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C14.dat
[13:50:36.539] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C15.dat
[13:50:36.539] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//trimParameters35_C0.dat
[13:50:36.546] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//trimParameters35_C1.dat
[13:50:36.552] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//trimParameters35_C2.dat
[13:50:36.559] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//trimParameters35_C3.dat
[13:50:36.566] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//trimParameters35_C4.dat
[13:50:36.572] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//trimParameters35_C5.dat
[13:50:36.579] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//trimParameters35_C6.dat
[13:50:36.585] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//trimParameters35_C7.dat
[13:50:36.591] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//trimParameters35_C8.dat
[13:50:36.598] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//trimParameters35_C9.dat
[13:50:36.604] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//trimParameters35_C10.dat
[13:50:36.611] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//trimParameters35_C11.dat
[13:50:36.618] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//trimParameters35_C12.dat
[13:50:36.623] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//trimParameters35_C13.dat
[13:50:36.628] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//trimParameters35_C14.dat
[13:50:36.633] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//trimParameters35_C15.dat
[13:50:36.638] <TB3> INFO: PixTestTrim::trimTest() done
[13:50:36.638] <TB3> INFO: vtrim: 123 122 135 131 119 115 143 105 154 112 142 116 125 114 130 111
[13:50:36.638] <TB3> INFO: vthrcomp: 119 117 120 112 112 116 127 127 108 122 121 119 114 117 112 115
[13:50:36.638] <TB3> INFO: vcal mean: 35.06 35.01 35.29 35.60 35.02 35.06 35.03 34.93 35.70 35.07 35.20 35.10 35.20 35.08 35.11 35.02
[13:50:36.638] <TB3> INFO: vcal RMS: 1.19 1.09 1.45 1.82 1.09 1.08 1.04 1.13 1.95 1.08 1.39 1.17 1.31 1.13 1.26 1.04
[13:50:36.638] <TB3> INFO: bits mean: 9.74 9.54 9.56 9.95 9.51 9.27 9.20 9.41 8.94 9.10 9.78 9.10 9.38 9.63 9.32 9.66
[13:50:36.638] <TB3> INFO: bits RMS: 2.65 2.60 2.68 2.50 2.52 2.73 2.62 3.04 2.58 2.66 2.51 2.89 2.69 2.71 2.52 2.62
[13:50:36.645] <TB3> INFO: ----------------------------------------------------------------------
[13:50:36.645] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[13:50:36.645] <TB3> INFO: ----------------------------------------------------------------------
[13:50:36.649] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[13:50:36.663] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:50:36.663] <TB3> INFO: run 1 of 1
[13:50:36.905] <TB3> INFO: Expecting 4160000 events.
[13:51:10.104] <TB3> INFO: 771875 events read in total (32608ms).
[13:51:42.184] <TB3> INFO: 1535685 events read in total (64688ms).
[13:52:14.477] <TB3> INFO: 2293645 events read in total (96981ms).
[13:52:46.488] <TB3> INFO: 3047580 events read in total (128992ms).
[13:53:18.994] <TB3> INFO: 3798880 events read in total (161498ms).
[13:53:34.377] <TB3> INFO: 4160000 events read in total (176881ms).
[13:53:34.430] <TB3> INFO: Test took 177767ms.
[13:54:01.253] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 201 (-1/-1) hits flags = 528 (plus default)
[13:54:01.265] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:54:01.266] <TB3> INFO: run 1 of 1
[13:54:01.501] <TB3> INFO: Expecting 4201600 events.
[13:54:33.949] <TB3> INFO: 742440 events read in total (31856ms).
[13:55:05.679] <TB3> INFO: 1478165 events read in total (63586ms).
[13:55:37.445] <TB3> INFO: 2210185 events read in total (95352ms).
[13:56:09.022] <TB3> INFO: 2937395 events read in total (126929ms).
[13:56:40.876] <TB3> INFO: 3662885 events read in total (158783ms).
[13:57:05.004] <TB3> INFO: 4201600 events read in total (182911ms).
[13:57:05.067] <TB3> INFO: Test took 183801ms.
[13:57:34.355] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 191 (-1/-1) hits flags = 528 (plus default)
[13:57:34.368] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:57:34.368] <TB3> INFO: run 1 of 1
[13:57:34.604] <TB3> INFO: Expecting 3993600 events.
[13:58:07.192] <TB3> INFO: 758235 events read in total (31997ms).
[13:58:39.048] <TB3> INFO: 1509330 events read in total (63852ms).
[13:59:11.228] <TB3> INFO: 2255725 events read in total (96032ms).
[13:59:43.110] <TB3> INFO: 2997795 events read in total (127914ms).
[14:00:15.357] <TB3> INFO: 3738120 events read in total (160161ms).
[14:00:26.593] <TB3> INFO: 3993600 events read in total (171397ms).
[14:00:26.643] <TB3> INFO: Test took 172276ms.
[14:00:49.861] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 191 (-1/-1) hits flags = 528 (plus default)
[14:00:49.875] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:00:49.875] <TB3> INFO: run 1 of 1
[14:00:50.129] <TB3> INFO: Expecting 3993600 events.
[14:01:22.650] <TB3> INFO: 758440 events read in total (31929ms).
[14:01:55.254] <TB3> INFO: 1510045 events read in total (64533ms).
[14:02:27.343] <TB3> INFO: 2256850 events read in total (96622ms).
[14:02:59.358] <TB3> INFO: 2999335 events read in total (128637ms).
[14:03:31.402] <TB3> INFO: 3739970 events read in total (160681ms).
[14:03:42.401] <TB3> INFO: 3993600 events read in total (171680ms).
[14:03:42.464] <TB3> INFO: Test took 172589ms.
[14:04:07.351] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 189 (-1/-1) hits flags = 528 (plus default)
[14:04:07.364] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:04:07.364] <TB3> INFO: run 1 of 1
[14:04:07.601] <TB3> INFO: Expecting 3952000 events.
[14:04:40.426] <TB3> INFO: 762160 events read in total (32233ms).
[14:05:11.893] <TB3> INFO: 1517040 events read in total (63700ms).
[14:05:43.805] <TB3> INFO: 2266485 events read in total (95612ms).
[14:06:15.757] <TB3> INFO: 3012135 events read in total (127564ms).
[14:06:47.453] <TB3> INFO: 3756510 events read in total (159260ms).
[14:06:56.042] <TB3> INFO: 3952000 events read in total (167849ms).
[14:06:56.101] <TB3> INFO: Test took 168737ms.
[14:07:21.675] <TB3> INFO: PixTestTrim::trimBitTest() done
[14:07:21.676] <TB3> INFO: PixTestTrim::doTest() done, duration: 2438 seconds
[14:07:21.676] <TB3> INFO: Decoding statistics:
[14:07:21.676] <TB3> INFO: General information:
[14:07:21.676] <TB3> INFO: 16bit words read: 0
[14:07:21.676] <TB3> INFO: valid events total: 0
[14:07:21.676] <TB3> INFO: empty events: 0
[14:07:21.676] <TB3> INFO: valid events with pixels: 0
[14:07:21.676] <TB3> INFO: valid pixel hits: 0
[14:07:21.676] <TB3> INFO: Event errors: 0
[14:07:21.676] <TB3> INFO: start marker: 0
[14:07:21.677] <TB3> INFO: stop marker: 0
[14:07:21.677] <TB3> INFO: overflow: 0
[14:07:21.677] <TB3> INFO: invalid 5bit words: 0
[14:07:21.677] <TB3> INFO: invalid XOR eye diagram: 0
[14:07:21.677] <TB3> INFO: frame (failed synchr.): 0
[14:07:21.677] <TB3> INFO: idle data (no TBM trl): 0
[14:07:21.677] <TB3> INFO: no data (only TBM hdr): 0
[14:07:21.677] <TB3> INFO: TBM errors: 0
[14:07:21.677] <TB3> INFO: flawed TBM headers: 0
[14:07:21.677] <TB3> INFO: flawed TBM trailers: 0
[14:07:21.677] <TB3> INFO: event ID mismatches: 0
[14:07:21.677] <TB3> INFO: ROC errors: 0
[14:07:21.677] <TB3> INFO: missing ROC header(s): 0
[14:07:21.677] <TB3> INFO: misplaced readback start: 0
[14:07:21.677] <TB3> INFO: Pixel decoding errors: 0
[14:07:21.677] <TB3> INFO: pixel data incomplete: 0
[14:07:21.677] <TB3> INFO: pixel address: 0
[14:07:21.677] <TB3> INFO: pulse height fill bit: 0
[14:07:21.677] <TB3> INFO: buffer corruption: 0
[14:07:22.453] <TB3> INFO: ######################################################################
[14:07:22.454] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:07:22.454] <TB3> INFO: ######################################################################
[14:07:22.731] <TB3> INFO: Expecting 41600 events.
[14:07:26.217] <TB3> INFO: 41600 events read in total (2895ms).
[14:07:26.218] <TB3> INFO: Test took 3763ms.
[14:07:26.695] <TB3> INFO: Expecting 41600 events.
[14:07:30.299] <TB3> INFO: 41600 events read in total (3012ms).
[14:07:30.300] <TB3> INFO: Test took 3878ms.
[14:07:30.593] <TB3> INFO: Expecting 41600 events.
[14:07:34.189] <TB3> INFO: 41600 events read in total (3004ms).
[14:07:34.190] <TB3> INFO: Test took 3862ms.
[14:07:34.479] <TB3> INFO: Expecting 41600 events.
[14:07:38.064] <TB3> INFO: 41600 events read in total (2993ms).
[14:07:38.065] <TB3> INFO: Test took 3850ms.
[14:07:38.363] <TB3> INFO: Expecting 41600 events.
[14:07:41.908] <TB3> INFO: 41600 events read in total (2953ms).
[14:07:41.909] <TB3> INFO: Test took 3816ms.
[14:07:42.201] <TB3> INFO: Expecting 41600 events.
[14:07:45.742] <TB3> INFO: 41600 events read in total (2950ms).
[14:07:45.744] <TB3> INFO: Test took 3809ms.
[14:07:46.038] <TB3> INFO: Expecting 41600 events.
[14:07:49.609] <TB3> INFO: 41600 events read in total (2980ms).
[14:07:49.610] <TB3> INFO: Test took 3842ms.
[14:07:49.903] <TB3> INFO: Expecting 41600 events.
[14:07:53.381] <TB3> INFO: 41600 events read in total (2887ms).
[14:07:53.381] <TB3> INFO: Test took 3747ms.
[14:07:53.732] <TB3> INFO: Expecting 41600 events.
[14:07:57.227] <TB3> INFO: 41600 events read in total (2903ms).
[14:07:57.228] <TB3> INFO: Test took 3819ms.
[14:07:57.517] <TB3> INFO: Expecting 41600 events.
[14:08:01.040] <TB3> INFO: 41600 events read in total (2931ms).
[14:08:01.041] <TB3> INFO: Test took 3789ms.
[14:08:01.347] <TB3> INFO: Expecting 41600 events.
[14:08:04.881] <TB3> INFO: 41600 events read in total (2942ms).
[14:08:04.881] <TB3> INFO: Test took 3813ms.
[14:08:05.170] <TB3> INFO: Expecting 41600 events.
[14:08:08.754] <TB3> INFO: 41600 events read in total (2992ms).
[14:08:08.755] <TB3> INFO: Test took 3849ms.
[14:08:09.044] <TB3> INFO: Expecting 41600 events.
[14:08:12.706] <TB3> INFO: 41600 events read in total (3070ms).
[14:08:12.707] <TB3> INFO: Test took 3928ms.
[14:08:13.009] <TB3> INFO: Expecting 41600 events.
[14:08:16.498] <TB3> INFO: 41600 events read in total (2898ms).
[14:08:16.498] <TB3> INFO: Test took 3765ms.
[14:08:16.787] <TB3> INFO: Expecting 41600 events.
[14:08:20.360] <TB3> INFO: 41600 events read in total (2982ms).
[14:08:20.361] <TB3> INFO: Test took 3839ms.
[14:08:20.652] <TB3> INFO: Expecting 41600 events.
[14:08:24.203] <TB3> INFO: 41600 events read in total (2959ms).
[14:08:24.204] <TB3> INFO: Test took 3817ms.
[14:08:24.493] <TB3> INFO: Expecting 41600 events.
[14:08:28.009] <TB3> INFO: 41600 events read in total (2925ms).
[14:08:28.010] <TB3> INFO: Test took 3782ms.
[14:08:28.298] <TB3> INFO: Expecting 41600 events.
[14:08:31.884] <TB3> INFO: 41600 events read in total (2994ms).
[14:08:31.885] <TB3> INFO: Test took 3851ms.
[14:08:32.175] <TB3> INFO: Expecting 41600 events.
[14:08:35.727] <TB3> INFO: 41600 events read in total (2960ms).
[14:08:35.728] <TB3> INFO: Test took 3818ms.
[14:08:36.018] <TB3> INFO: Expecting 41600 events.
[14:08:39.601] <TB3> INFO: 41600 events read in total (2992ms).
[14:08:39.601] <TB3> INFO: Test took 3848ms.
[14:08:39.907] <TB3> INFO: Expecting 41600 events.
[14:08:43.479] <TB3> INFO: 41600 events read in total (2981ms).
[14:08:43.480] <TB3> INFO: Test took 3852ms.
[14:08:43.769] <TB3> INFO: Expecting 41600 events.
[14:08:47.303] <TB3> INFO: 41600 events read in total (2942ms).
[14:08:47.303] <TB3> INFO: Test took 3798ms.
[14:08:47.592] <TB3> INFO: Expecting 41600 events.
[14:08:51.117] <TB3> INFO: 41600 events read in total (2933ms).
[14:08:51.118] <TB3> INFO: Test took 3790ms.
[14:08:51.432] <TB3> INFO: Expecting 41600 events.
[14:08:55.005] <TB3> INFO: 41600 events read in total (2981ms).
[14:08:55.005] <TB3> INFO: Test took 3862ms.
[14:08:55.294] <TB3> INFO: Expecting 41600 events.
[14:08:58.821] <TB3> INFO: 41600 events read in total (2935ms).
[14:08:58.822] <TB3> INFO: Test took 3793ms.
[14:08:59.112] <TB3> INFO: Expecting 41600 events.
[14:09:02.670] <TB3> INFO: 41600 events read in total (2966ms).
[14:09:02.670] <TB3> INFO: Test took 3824ms.
[14:09:02.960] <TB3> INFO: Expecting 41600 events.
[14:09:06.550] <TB3> INFO: 41600 events read in total (2999ms).
[14:09:06.551] <TB3> INFO: Test took 3856ms.
[14:09:06.865] <TB3> INFO: Expecting 41600 events.
[14:09:10.429] <TB3> INFO: 41600 events read in total (2973ms).
[14:09:10.430] <TB3> INFO: Test took 3850ms.
[14:09:10.735] <TB3> INFO: Expecting 41600 events.
[14:09:14.414] <TB3> INFO: 41600 events read in total (3087ms).
[14:09:14.415] <TB3> INFO: Test took 3960ms.
[14:09:14.709] <TB3> INFO: Expecting 41600 events.
[14:09:18.320] <TB3> INFO: 41600 events read in total (3019ms).
[14:09:18.321] <TB3> INFO: Test took 3877ms.
[14:09:18.610] <TB3> INFO: Expecting 2560 events.
[14:09:19.505] <TB3> INFO: 2560 events read in total (303ms).
[14:09:19.505] <TB3> INFO: Test took 1171ms.
[14:09:19.814] <TB3> INFO: Expecting 2560 events.
[14:09:20.707] <TB3> INFO: 2560 events read in total (301ms).
[14:09:20.707] <TB3> INFO: Test took 1201ms.
[14:09:21.015] <TB3> INFO: Expecting 2560 events.
[14:09:21.901] <TB3> INFO: 2560 events read in total (294ms).
[14:09:21.901] <TB3> INFO: Test took 1193ms.
[14:09:22.210] <TB3> INFO: Expecting 2560 events.
[14:09:23.099] <TB3> INFO: 2560 events read in total (297ms).
[14:09:23.099] <TB3> INFO: Test took 1198ms.
[14:09:23.407] <TB3> INFO: Expecting 2560 events.
[14:09:24.297] <TB3> INFO: 2560 events read in total (298ms).
[14:09:24.297] <TB3> INFO: Test took 1197ms.
[14:09:24.604] <TB3> INFO: Expecting 2560 events.
[14:09:25.493] <TB3> INFO: 2560 events read in total (297ms).
[14:09:25.493] <TB3> INFO: Test took 1195ms.
[14:09:25.799] <TB3> INFO: Expecting 2560 events.
[14:09:26.689] <TB3> INFO: 2560 events read in total (298ms).
[14:09:26.689] <TB3> INFO: Test took 1195ms.
[14:09:26.998] <TB3> INFO: Expecting 2560 events.
[14:09:27.889] <TB3> INFO: 2560 events read in total (299ms).
[14:09:27.889] <TB3> INFO: Test took 1199ms.
[14:09:28.197] <TB3> INFO: Expecting 2560 events.
[14:09:29.080] <TB3> INFO: 2560 events read in total (291ms).
[14:09:29.080] <TB3> INFO: Test took 1191ms.
[14:09:29.388] <TB3> INFO: Expecting 2560 events.
[14:09:30.269] <TB3> INFO: 2560 events read in total (290ms).
[14:09:30.269] <TB3> INFO: Test took 1188ms.
[14:09:30.577] <TB3> INFO: Expecting 2560 events.
[14:09:31.468] <TB3> INFO: 2560 events read in total (299ms).
[14:09:31.468] <TB3> INFO: Test took 1198ms.
[14:09:31.776] <TB3> INFO: Expecting 2560 events.
[14:09:32.666] <TB3> INFO: 2560 events read in total (298ms).
[14:09:32.666] <TB3> INFO: Test took 1197ms.
[14:09:32.974] <TB3> INFO: Expecting 2560 events.
[14:09:33.867] <TB3> INFO: 2560 events read in total (301ms).
[14:09:33.867] <TB3> INFO: Test took 1201ms.
[14:09:34.176] <TB3> INFO: Expecting 2560 events.
[14:09:35.069] <TB3> INFO: 2560 events read in total (302ms).
[14:09:35.069] <TB3> INFO: Test took 1201ms.
[14:09:35.377] <TB3> INFO: Expecting 2560 events.
[14:09:36.268] <TB3> INFO: 2560 events read in total (299ms).
[14:09:36.268] <TB3> INFO: Test took 1198ms.
[14:09:36.575] <TB3> INFO: Expecting 2560 events.
[14:09:37.460] <TB3> INFO: 2560 events read in total (293ms).
[14:09:37.460] <TB3> INFO: Test took 1191ms.
[14:09:37.464] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:09:37.768] <TB3> INFO: Expecting 655360 events.
[14:09:52.684] <TB3> INFO: 655360 events read in total (14324ms).
[14:09:52.698] <TB3> INFO: Expecting 655360 events.
[14:10:07.396] <TB3> INFO: 655360 events read in total (14295ms).
[14:10:07.420] <TB3> INFO: Expecting 655360 events.
[14:10:22.124] <TB3> INFO: 655360 events read in total (14301ms).
[14:10:22.144] <TB3> INFO: Expecting 655360 events.
[14:10:36.908] <TB3> INFO: 655360 events read in total (14360ms).
[14:10:36.933] <TB3> INFO: Expecting 655360 events.
[14:10:51.789] <TB3> INFO: 655360 events read in total (14453ms).
[14:10:51.824] <TB3> INFO: Expecting 655360 events.
[14:11:06.692] <TB3> INFO: 655360 events read in total (14465ms).
[14:11:06.726] <TB3> INFO: Expecting 655360 events.
[14:11:21.404] <TB3> INFO: 655360 events read in total (14275ms).
[14:11:21.442] <TB3> INFO: Expecting 655360 events.
[14:11:36.124] <TB3> INFO: 655360 events read in total (14279ms).
[14:11:36.168] <TB3> INFO: Expecting 655360 events.
[14:11:50.843] <TB3> INFO: 655360 events read in total (14272ms).
[14:11:50.890] <TB3> INFO: Expecting 655360 events.
[14:12:05.565] <TB3> INFO: 655360 events read in total (14272ms).
[14:12:05.618] <TB3> INFO: Expecting 655360 events.
[14:12:20.246] <TB3> INFO: 655360 events read in total (14226ms).
[14:12:20.319] <TB3> INFO: Expecting 655360 events.
[14:12:34.995] <TB3> INFO: 655360 events read in total (14272ms).
[14:12:35.064] <TB3> INFO: Expecting 655360 events.
[14:12:49.797] <TB3> INFO: 655360 events read in total (14330ms).
[14:12:49.870] <TB3> INFO: Expecting 655360 events.
[14:13:04.538] <TB3> INFO: 655360 events read in total (14265ms).
[14:13:04.631] <TB3> INFO: Expecting 655360 events.
[14:13:19.404] <TB3> INFO: 655360 events read in total (14370ms).
[14:13:19.484] <TB3> INFO: Expecting 655360 events.
[14:13:33.988] <TB3> INFO: 655360 events read in total (14101ms).
[14:13:34.092] <TB3> INFO: Test took 236629ms.
[14:13:34.195] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:13:34.454] <TB3> INFO: Expecting 655360 events.
[14:13:48.002] <TB3> INFO: 655360 events read in total (13957ms).
[14:13:49.014] <TB3> INFO: Expecting 655360 events.
[14:14:03.721] <TB3> INFO: 655360 events read in total (14304ms).
[14:14:03.737] <TB3> INFO: Expecting 655360 events.
[14:14:18.181] <TB3> INFO: 655360 events read in total (14041ms).
[14:14:18.207] <TB3> INFO: Expecting 655360 events.
[14:14:32.901] <TB3> INFO: 655360 events read in total (14291ms).
[14:14:32.927] <TB3> INFO: Expecting 655360 events.
[14:14:47.547] <TB3> INFO: 655360 events read in total (14217ms).
[14:14:47.576] <TB3> INFO: Expecting 655360 events.
[14:15:02.294] <TB3> INFO: 655360 events read in total (14315ms).
[14:15:02.327] <TB3> INFO: Expecting 655360 events.
[14:15:16.794] <TB3> INFO: 655360 events read in total (14064ms).
[14:15:16.832] <TB3> INFO: Expecting 655360 events.
[14:15:31.454] <TB3> INFO: 655360 events read in total (14219ms).
[14:15:31.496] <TB3> INFO: Expecting 655360 events.
[14:15:46.087] <TB3> INFO: 655360 events read in total (14188ms).
[14:15:46.141] <TB3> INFO: Expecting 655360 events.
[14:16:00.666] <TB3> INFO: 655360 events read in total (14122ms).
[14:16:00.719] <TB3> INFO: Expecting 655360 events.
[14:16:15.309] <TB3> INFO: 655360 events read in total (14187ms).
[14:16:15.367] <TB3> INFO: Expecting 655360 events.
[14:16:29.789] <TB3> INFO: 655360 events read in total (14019ms).
[14:16:29.850] <TB3> INFO: Expecting 655360 events.
[14:16:43.624] <TB3> INFO: 655360 events read in total (13371ms).
[14:16:43.696] <TB3> INFO: Expecting 655360 events.
[14:16:57.599] <TB3> INFO: 655360 events read in total (13500ms).
[14:16:57.670] <TB3> INFO: Expecting 655360 events.
[14:17:11.992] <TB3> INFO: 655360 events read in total (13919ms).
[14:17:12.066] <TB3> INFO: Expecting 655360 events.
[14:17:26.817] <TB3> INFO: 655360 events read in total (14348ms).
[14:17:26.929] <TB3> INFO: Test took 232734ms.
[14:17:27.188] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:17:27.193] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:17:27.199] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:17:27.205] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:17:27.210] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:17:27.216] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:17:27.222] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[14:17:27.228] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:17:27.234] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:17:27.239] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:17:27.245] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:17:27.251] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:17:27.256] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[14:17:27.262] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[14:17:27.268] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[14:17:27.274] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[14:17:27.280] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[14:17:27.286] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[14:17:27.292] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:17:27.298] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:17:27.304] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:17:27.310] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:17:27.316] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:17:27.322] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:17:27.328] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:17:27.334] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:17:27.340] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:17:27.346] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:17:27.352] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:17:27.358] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[14:17:27.364] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:17:27.370] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:17:27.406] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C0.dat
[14:17:27.406] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C1.dat
[14:17:27.406] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C2.dat
[14:17:27.406] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C3.dat
[14:17:27.406] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C4.dat
[14:17:27.406] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C5.dat
[14:17:27.406] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C6.dat
[14:17:27.406] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C7.dat
[14:17:27.406] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C8.dat
[14:17:27.406] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C9.dat
[14:17:27.406] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C10.dat
[14:17:27.406] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C11.dat
[14:17:27.407] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C12.dat
[14:17:27.407] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C13.dat
[14:17:27.407] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C14.dat
[14:17:27.407] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//dacParameters35_C15.dat
[14:17:27.648] <TB3> INFO: Expecting 41600 events.
[14:17:30.842] <TB3> INFO: 41600 events read in total (2602ms).
[14:17:30.843] <TB3> INFO: Test took 3432ms.
[14:17:31.295] <TB3> INFO: Expecting 41600 events.
[14:17:34.379] <TB3> INFO: 41600 events read in total (2492ms).
[14:17:34.380] <TB3> INFO: Test took 3322ms.
[14:17:34.835] <TB3> INFO: Expecting 41600 events.
[14:17:37.987] <TB3> INFO: 41600 events read in total (2561ms).
[14:17:37.987] <TB3> INFO: Test took 3393ms.
[14:17:38.204] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:38.293] <TB3> INFO: Expecting 2560 events.
[14:17:39.182] <TB3> INFO: 2560 events read in total (297ms).
[14:17:39.182] <TB3> INFO: Test took 978ms.
[14:17:39.184] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:39.490] <TB3> INFO: Expecting 2560 events.
[14:17:40.384] <TB3> INFO: 2560 events read in total (302ms).
[14:17:40.384] <TB3> INFO: Test took 1200ms.
[14:17:40.387] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:40.692] <TB3> INFO: Expecting 2560 events.
[14:17:41.582] <TB3> INFO: 2560 events read in total (298ms).
[14:17:41.582] <TB3> INFO: Test took 1195ms.
[14:17:41.585] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:41.890] <TB3> INFO: Expecting 2560 events.
[14:17:42.785] <TB3> INFO: 2560 events read in total (303ms).
[14:17:42.786] <TB3> INFO: Test took 1202ms.
[14:17:42.788] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:43.094] <TB3> INFO: Expecting 2560 events.
[14:17:43.983] <TB3> INFO: 2560 events read in total (297ms).
[14:17:43.983] <TB3> INFO: Test took 1195ms.
[14:17:43.986] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:44.292] <TB3> INFO: Expecting 2560 events.
[14:17:45.187] <TB3> INFO: 2560 events read in total (303ms).
[14:17:45.187] <TB3> INFO: Test took 1201ms.
[14:17:45.189] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:45.494] <TB3> INFO: Expecting 2560 events.
[14:17:46.388] <TB3> INFO: 2560 events read in total (302ms).
[14:17:46.388] <TB3> INFO: Test took 1199ms.
[14:17:46.391] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:46.696] <TB3> INFO: Expecting 2560 events.
[14:17:47.585] <TB3> INFO: 2560 events read in total (298ms).
[14:17:47.585] <TB3> INFO: Test took 1194ms.
[14:17:47.587] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:47.893] <TB3> INFO: Expecting 2560 events.
[14:17:48.785] <TB3> INFO: 2560 events read in total (300ms).
[14:17:48.785] <TB3> INFO: Test took 1198ms.
[14:17:48.787] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:49.093] <TB3> INFO: Expecting 2560 events.
[14:17:49.978] <TB3> INFO: 2560 events read in total (294ms).
[14:17:49.979] <TB3> INFO: Test took 1192ms.
[14:17:49.982] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:50.287] <TB3> INFO: Expecting 2560 events.
[14:17:51.171] <TB3> INFO: 2560 events read in total (293ms).
[14:17:51.171] <TB3> INFO: Test took 1189ms.
[14:17:51.174] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:51.480] <TB3> INFO: Expecting 2560 events.
[14:17:52.369] <TB3> INFO: 2560 events read in total (297ms).
[14:17:52.370] <TB3> INFO: Test took 1196ms.
[14:17:52.372] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:52.677] <TB3> INFO: Expecting 2560 events.
[14:17:53.560] <TB3> INFO: 2560 events read in total (292ms).
[14:17:53.561] <TB3> INFO: Test took 1189ms.
[14:17:53.564] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:53.869] <TB3> INFO: Expecting 2560 events.
[14:17:54.755] <TB3> INFO: 2560 events read in total (294ms).
[14:17:54.756] <TB3> INFO: Test took 1192ms.
[14:17:54.758] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:55.063] <TB3> INFO: Expecting 2560 events.
[14:17:55.948] <TB3> INFO: 2560 events read in total (293ms).
[14:17:55.948] <TB3> INFO: Test took 1190ms.
[14:17:55.951] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:56.256] <TB3> INFO: Expecting 2560 events.
[14:17:57.147] <TB3> INFO: 2560 events read in total (300ms).
[14:17:57.147] <TB3> INFO: Test took 1197ms.
[14:17:57.150] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:57.455] <TB3> INFO: Expecting 2560 events.
[14:17:58.341] <TB3> INFO: 2560 events read in total (295ms).
[14:17:58.341] <TB3> INFO: Test took 1191ms.
[14:17:58.344] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:58.649] <TB3> INFO: Expecting 2560 events.
[14:17:59.534] <TB3> INFO: 2560 events read in total (293ms).
[14:17:59.534] <TB3> INFO: Test took 1190ms.
[14:17:59.537] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:59.843] <TB3> INFO: Expecting 2560 events.
[14:18:00.729] <TB3> INFO: 2560 events read in total (295ms).
[14:18:00.730] <TB3> INFO: Test took 1194ms.
[14:18:00.733] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:18:01.037] <TB3> INFO: Expecting 2560 events.
[14:18:01.923] <TB3> INFO: 2560 events read in total (294ms).
[14:18:01.924] <TB3> INFO: Test took 1192ms.
[14:18:01.926] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:18:02.232] <TB3> INFO: Expecting 2560 events.
[14:18:03.118] <TB3> INFO: 2560 events read in total (294ms).
[14:18:03.118] <TB3> INFO: Test took 1192ms.
[14:18:03.121] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:18:03.426] <TB3> INFO: Expecting 2560 events.
[14:18:04.311] <TB3> INFO: 2560 events read in total (294ms).
[14:18:04.312] <TB3> INFO: Test took 1191ms.
[14:18:04.315] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:18:04.620] <TB3> INFO: Expecting 2560 events.
[14:18:05.509] <TB3> INFO: 2560 events read in total (297ms).
[14:18:05.509] <TB3> INFO: Test took 1195ms.
[14:18:05.511] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:18:05.818] <TB3> INFO: Expecting 2560 events.
[14:18:06.701] <TB3> INFO: 2560 events read in total (292ms).
[14:18:06.701] <TB3> INFO: Test took 1190ms.
[14:18:06.704] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:18:07.009] <TB3> INFO: Expecting 2560 events.
[14:18:07.899] <TB3> INFO: 2560 events read in total (298ms).
[14:18:07.899] <TB3> INFO: Test took 1195ms.
[14:18:07.902] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:18:08.207] <TB3> INFO: Expecting 2560 events.
[14:18:09.096] <TB3> INFO: 2560 events read in total (297ms).
[14:18:09.097] <TB3> INFO: Test took 1195ms.
[14:18:09.099] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:18:09.405] <TB3> INFO: Expecting 2560 events.
[14:18:10.299] <TB3> INFO: 2560 events read in total (302ms).
[14:18:10.300] <TB3> INFO: Test took 1201ms.
[14:18:10.303] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:18:10.607] <TB3> INFO: Expecting 2560 events.
[14:18:11.496] <TB3> INFO: 2560 events read in total (298ms).
[14:18:11.497] <TB3> INFO: Test took 1194ms.
[14:18:11.499] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:18:11.805] <TB3> INFO: Expecting 2560 events.
[14:18:12.698] <TB3> INFO: 2560 events read in total (301ms).
[14:18:12.698] <TB3> INFO: Test took 1199ms.
[14:18:12.701] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:18:13.007] <TB3> INFO: Expecting 2560 events.
[14:18:13.893] <TB3> INFO: 2560 events read in total (295ms).
[14:18:13.893] <TB3> INFO: Test took 1192ms.
[14:18:13.896] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:18:14.201] <TB3> INFO: Expecting 2560 events.
[14:18:15.093] <TB3> INFO: 2560 events read in total (300ms).
[14:18:15.093] <TB3> INFO: Test took 1197ms.
[14:18:15.095] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:18:15.402] <TB3> INFO: Expecting 2560 events.
[14:18:16.292] <TB3> INFO: 2560 events read in total (298ms).
[14:18:16.293] <TB3> INFO: Test took 1198ms.
[14:18:16.767] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 654 seconds
[14:18:16.767] <TB3> INFO: PH scale (per ROC): 37 34 44 36 35 34 32 37 48 44 33 36 60 37 42 35
[14:18:16.767] <TB3> INFO: PH offset (per ROC): 96 101 128 109 111 86 103 108 124 94 99 117 127 98 101 95
[14:18:16.774] <TB3> INFO: Decoding statistics:
[14:18:16.774] <TB3> INFO: General information:
[14:18:16.774] <TB3> INFO: 16bit words read: 127882
[14:18:16.774] <TB3> INFO: valid events total: 20480
[14:18:16.774] <TB3> INFO: empty events: 17979
[14:18:16.774] <TB3> INFO: valid events with pixels: 2501
[14:18:16.774] <TB3> INFO: valid pixel hits: 2501
[14:18:16.774] <TB3> INFO: Event errors: 0
[14:18:16.774] <TB3> INFO: start marker: 0
[14:18:16.774] <TB3> INFO: stop marker: 0
[14:18:16.774] <TB3> INFO: overflow: 0
[14:18:16.774] <TB3> INFO: invalid 5bit words: 0
[14:18:16.774] <TB3> INFO: invalid XOR eye diagram: 0
[14:18:16.774] <TB3> INFO: frame (failed synchr.): 0
[14:18:16.774] <TB3> INFO: idle data (no TBM trl): 0
[14:18:16.774] <TB3> INFO: no data (only TBM hdr): 0
[14:18:16.774] <TB3> INFO: TBM errors: 0
[14:18:16.774] <TB3> INFO: flawed TBM headers: 0
[14:18:16.774] <TB3> INFO: flawed TBM trailers: 0
[14:18:16.774] <TB3> INFO: event ID mismatches: 0
[14:18:16.774] <TB3> INFO: ROC errors: 0
[14:18:16.774] <TB3> INFO: missing ROC header(s): 0
[14:18:16.774] <TB3> INFO: misplaced readback start: 0
[14:18:16.774] <TB3> INFO: Pixel decoding errors: 0
[14:18:16.774] <TB3> INFO: pixel data incomplete: 0
[14:18:16.774] <TB3> INFO: pixel address: 0
[14:18:16.774] <TB3> INFO: pulse height fill bit: 0
[14:18:16.775] <TB3> INFO: buffer corruption: 0
[14:18:16.933] <TB3> INFO: ######################################################################
[14:18:16.933] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:18:16.933] <TB3> INFO: ######################################################################
[14:18:16.949] <TB3> INFO: scanning low vcal = 10
[14:18:17.249] <TB3> INFO: Expecting 41600 events.
[14:18:20.863] <TB3> INFO: 41600 events read in total (3023ms).
[14:18:20.863] <TB3> INFO: Test took 3914ms.
[14:18:20.865] <TB3> INFO: scanning low vcal = 20
[14:18:21.164] <TB3> INFO: Expecting 41600 events.
[14:18:24.787] <TB3> INFO: 41600 events read in total (3031ms).
[14:18:24.788] <TB3> INFO: Test took 3923ms.
[14:18:24.790] <TB3> INFO: scanning low vcal = 30
[14:18:25.085] <TB3> INFO: Expecting 41600 events.
[14:18:28.779] <TB3> INFO: 41600 events read in total (3103ms).
[14:18:28.781] <TB3> INFO: Test took 3991ms.
[14:18:28.785] <TB3> INFO: scanning low vcal = 40
[14:18:29.061] <TB3> INFO: Expecting 41600 events.
[14:18:33.048] <TB3> INFO: 41600 events read in total (3395ms).
[14:18:33.049] <TB3> INFO: Test took 4264ms.
[14:18:33.052] <TB3> INFO: scanning low vcal = 50
[14:18:33.329] <TB3> INFO: Expecting 41600 events.
[14:18:37.339] <TB3> INFO: 41600 events read in total (3419ms).
[14:18:37.340] <TB3> INFO: Test took 4288ms.
[14:18:37.343] <TB3> INFO: scanning low vcal = 60
[14:18:37.619] <TB3> INFO: Expecting 41600 events.
[14:18:41.617] <TB3> INFO: 41600 events read in total (3406ms).
[14:18:41.619] <TB3> INFO: Test took 4276ms.
[14:18:41.623] <TB3> INFO: scanning low vcal = 70
[14:18:41.900] <TB3> INFO: Expecting 41600 events.
[14:18:45.913] <TB3> INFO: 41600 events read in total (3422ms).
[14:18:45.913] <TB3> INFO: Test took 4290ms.
[14:18:45.916] <TB3> INFO: scanning low vcal = 80
[14:18:46.193] <TB3> INFO: Expecting 41600 events.
[14:18:50.195] <TB3> INFO: 41600 events read in total (3410ms).
[14:18:50.196] <TB3> INFO: Test took 4280ms.
[14:18:50.199] <TB3> INFO: scanning low vcal = 90
[14:18:50.475] <TB3> INFO: Expecting 41600 events.
[14:18:54.459] <TB3> INFO: 41600 events read in total (3392ms).
[14:18:54.460] <TB3> INFO: Test took 4261ms.
[14:18:54.464] <TB3> INFO: scanning low vcal = 100
[14:18:54.740] <TB3> INFO: Expecting 41600 events.
[14:18:58.729] <TB3> INFO: 41600 events read in total (3397ms).
[14:18:58.730] <TB3> INFO: Test took 4266ms.
[14:18:58.734] <TB3> INFO: scanning low vcal = 110
[14:18:59.026] <TB3> INFO: Expecting 41600 events.
[14:19:03.045] <TB3> INFO: 41600 events read in total (3427ms).
[14:19:03.045] <TB3> INFO: Test took 4311ms.
[14:19:03.048] <TB3> INFO: scanning low vcal = 120
[14:19:03.349] <TB3> INFO: Expecting 41600 events.
[14:19:07.362] <TB3> INFO: 41600 events read in total (3422ms).
[14:19:07.363] <TB3> INFO: Test took 4315ms.
[14:19:07.365] <TB3> INFO: scanning low vcal = 130
[14:19:07.642] <TB3> INFO: Expecting 41600 events.
[14:19:11.631] <TB3> INFO: 41600 events read in total (3397ms).
[14:19:11.632] <TB3> INFO: Test took 4266ms.
[14:19:11.635] <TB3> INFO: scanning low vcal = 140
[14:19:11.911] <TB3> INFO: Expecting 41600 events.
[14:19:15.903] <TB3> INFO: 41600 events read in total (3400ms).
[14:19:15.904] <TB3> INFO: Test took 4269ms.
[14:19:15.906] <TB3> INFO: scanning low vcal = 150
[14:19:16.183] <TB3> INFO: Expecting 41600 events.
[14:19:20.166] <TB3> INFO: 41600 events read in total (3391ms).
[14:19:20.167] <TB3> INFO: Test took 4260ms.
[14:19:20.170] <TB3> INFO: scanning low vcal = 160
[14:19:20.446] <TB3> INFO: Expecting 41600 events.
[14:19:24.478] <TB3> INFO: 41600 events read in total (3440ms).
[14:19:24.478] <TB3> INFO: Test took 4308ms.
[14:19:24.481] <TB3> INFO: scanning low vcal = 170
[14:19:24.758] <TB3> INFO: Expecting 41600 events.
[14:19:28.787] <TB3> INFO: 41600 events read in total (3437ms).
[14:19:28.788] <TB3> INFO: Test took 4307ms.
[14:19:28.793] <TB3> INFO: scanning low vcal = 180
[14:19:29.067] <TB3> INFO: Expecting 41600 events.
[14:19:33.063] <TB3> INFO: 41600 events read in total (3404ms).
[14:19:33.064] <TB3> INFO: Test took 4271ms.
[14:19:33.067] <TB3> INFO: scanning low vcal = 190
[14:19:33.344] <TB3> INFO: Expecting 41600 events.
[14:19:37.377] <TB3> INFO: 41600 events read in total (3442ms).
[14:19:37.378] <TB3> INFO: Test took 4311ms.
[14:19:37.381] <TB3> INFO: scanning low vcal = 200
[14:19:37.658] <TB3> INFO: Expecting 41600 events.
[14:19:41.677] <TB3> INFO: 41600 events read in total (3427ms).
[14:19:41.678] <TB3> INFO: Test took 4296ms.
[14:19:41.681] <TB3> INFO: scanning low vcal = 210
[14:19:41.958] <TB3> INFO: Expecting 41600 events.
[14:19:45.998] <TB3> INFO: 41600 events read in total (3448ms).
[14:19:45.998] <TB3> INFO: Test took 4317ms.
[14:19:45.001] <TB3> INFO: scanning low vcal = 220
[14:19:46.278] <TB3> INFO: Expecting 41600 events.
[14:19:50.309] <TB3> INFO: 41600 events read in total (3439ms).
[14:19:50.309] <TB3> INFO: Test took 4308ms.
[14:19:50.313] <TB3> INFO: scanning low vcal = 230
[14:19:50.589] <TB3> INFO: Expecting 41600 events.
[14:19:54.590] <TB3> INFO: 41600 events read in total (3409ms).
[14:19:54.590] <TB3> INFO: Test took 4277ms.
[14:19:54.593] <TB3> INFO: scanning low vcal = 240
[14:19:54.883] <TB3> INFO: Expecting 41600 events.
[14:19:58.910] <TB3> INFO: 41600 events read in total (3435ms).
[14:19:58.910] <TB3> INFO: Test took 4317ms.
[14:19:58.914] <TB3> INFO: scanning low vcal = 250
[14:19:59.218] <TB3> INFO: Expecting 41600 events.
[14:20:03.216] <TB3> INFO: 41600 events read in total (3407ms).
[14:20:03.216] <TB3> INFO: Test took 4302ms.
[14:20:03.221] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[14:20:03.512] <TB3> INFO: Expecting 41600 events.
[14:20:07.524] <TB3> INFO: 41600 events read in total (3420ms).
[14:20:07.525] <TB3> INFO: Test took 4304ms.
[14:20:07.528] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[14:20:07.805] <TB3> INFO: Expecting 41600 events.
[14:20:11.820] <TB3> INFO: 41600 events read in total (3424ms).
[14:20:11.821] <TB3> INFO: Test took 4293ms.
[14:20:11.824] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[14:20:12.100] <TB3> INFO: Expecting 41600 events.
[14:20:16.160] <TB3> INFO: 41600 events read in total (3468ms).
[14:20:16.161] <TB3> INFO: Test took 4337ms.
[14:20:16.164] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[14:20:16.441] <TB3> INFO: Expecting 41600 events.
[14:20:20.425] <TB3> INFO: 41600 events read in total (3393ms).
[14:20:20.425] <TB3> INFO: Test took 4260ms.
[14:20:20.429] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:20:20.705] <TB3> INFO: Expecting 41600 events.
[14:20:24.765] <TB3> INFO: 41600 events read in total (3468ms).
[14:20:24.766] <TB3> INFO: Test took 4337ms.
[14:20:25.468] <TB3> INFO: PixTestGainPedestal::measure() done
[14:20:58.765] <TB3> INFO: PixTestGainPedestal::fit() done
[14:20:58.765] <TB3> INFO: non-linearity mean: 0.928 0.936 0.980 0.930 0.915 1.016 0.934 0.953 0.983 0.962 0.934 0.947 0.986 0.926 0.926 0.845
[14:20:58.765] <TB3> INFO: non-linearity RMS: 0.120 0.162 0.003 0.126 0.118 0.161 0.152 0.043 0.003 0.035 0.137 0.056 0.003 0.138 0.073 0.120
[14:20:58.765] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//phCalibrationFitErr35_C0.dat
[14:20:58.787] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//phCalibrationFitErr35_C1.dat
[14:20:58.810] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//phCalibrationFitErr35_C2.dat
[14:20:58.832] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//phCalibrationFitErr35_C3.dat
[14:20:58.854] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//phCalibrationFitErr35_C4.dat
[14:20:58.876] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//phCalibrationFitErr35_C5.dat
[14:20:58.898] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//phCalibrationFitErr35_C6.dat
[14:20:58.921] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//phCalibrationFitErr35_C7.dat
[14:20:58.944] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//phCalibrationFitErr35_C8.dat
[14:20:58.966] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//phCalibrationFitErr35_C9.dat
[14:20:58.989] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//phCalibrationFitErr35_C10.dat
[14:20:59.011] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//phCalibrationFitErr35_C11.dat
[14:20:59.034] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//phCalibrationFitErr35_C12.dat
[14:20:59.056] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//phCalibrationFitErr35_C13.dat
[14:20:59.078] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//phCalibrationFitErr35_C14.dat
[14:20:59.101] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//003_Fulltest_p17//phCalibrationFitErr35_C15.dat
[14:20:59.123] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 162 seconds
[14:20:59.124] <TB3> INFO: Decoding statistics:
[14:20:59.124] <TB3> INFO: General information:
[14:20:59.124] <TB3> INFO: 16bit words read: 3317816
[14:20:59.124] <TB3> INFO: valid events total: 332800
[14:20:59.124] <TB3> INFO: empty events: 39
[14:20:59.124] <TB3> INFO: valid events with pixels: 332761
[14:20:59.124] <TB3> INFO: valid pixel hits: 660508
[14:20:59.124] <TB3> INFO: Event errors: 0
[14:20:59.124] <TB3> INFO: start marker: 0
[14:20:59.124] <TB3> INFO: stop marker: 0
[14:20:59.124] <TB3> INFO: overflow: 0
[14:20:59.124] <TB3> INFO: invalid 5bit words: 0
[14:20:59.124] <TB3> INFO: invalid XOR eye diagram: 0
[14:20:59.124] <TB3> INFO: frame (failed synchr.): 0
[14:20:59.124] <TB3> INFO: idle data (no TBM trl): 0
[14:20:59.124] <TB3> INFO: no data (only TBM hdr): 0
[14:20:59.124] <TB3> INFO: TBM errors: 0
[14:20:59.124] <TB3> INFO: flawed TBM headers: 0
[14:20:59.124] <TB3> INFO: flawed TBM trailers: 0
[14:20:59.124] <TB3> INFO: event ID mismatches: 0
[14:20:59.124] <TB3> INFO: ROC errors: 0
[14:20:59.124] <TB3> INFO: missing ROC header(s): 0
[14:20:59.124] <TB3> INFO: misplaced readback start: 0
[14:20:59.124] <TB3> INFO: Pixel decoding errors: 0
[14:20:59.124] <TB3> INFO: pixel data incomplete: 0
[14:20:59.124] <TB3> INFO: pixel address: 0
[14:20:59.124] <TB3> INFO: pulse height fill bit: 0
[14:20:59.124] <TB3> INFO: buffer corruption: 0
[14:20:59.149] <TB3> INFO: Decoding statistics:
[14:20:59.149] <TB3> INFO: General information:
[14:20:59.149] <TB3> INFO: 16bit words read: 3447234
[14:20:59.149] <TB3> INFO: valid events total: 353536
[14:20:59.149] <TB3> INFO: empty events: 18274
[14:20:59.149] <TB3> INFO: valid events with pixels: 335262
[14:20:59.149] <TB3> INFO: valid pixel hits: 663009
[14:20:59.149] <TB3> INFO: Event errors: 0
[14:20:59.149] <TB3> INFO: start marker: 0
[14:20:59.149] <TB3> INFO: stop marker: 0
[14:20:59.149] <TB3> INFO: overflow: 0
[14:20:59.149] <TB3> INFO: invalid 5bit words: 0
[14:20:59.149] <TB3> INFO: invalid XOR eye diagram: 0
[14:20:59.149] <TB3> INFO: frame (failed synchr.): 0
[14:20:59.149] <TB3> INFO: idle data (no TBM trl): 0
[14:20:59.149] <TB3> INFO: no data (only TBM hdr): 0
[14:20:59.149] <TB3> INFO: TBM errors: 0
[14:20:59.149] <TB3> INFO: flawed TBM headers: 0
[14:20:59.149] <TB3> INFO: flawed TBM trailers: 0
[14:20:59.149] <TB3> INFO: event ID mismatches: 0
[14:20:59.149] <TB3> INFO: ROC errors: 0
[14:20:59.149] <TB3> INFO: missing ROC header(s): 0
[14:20:59.149] <TB3> INFO: misplaced readback start: 0
[14:20:59.149] <TB3> INFO: Pixel decoding errors: 0
[14:20:59.149] <TB3> INFO: pixel data incomplete: 0
[14:20:59.149] <TB3> INFO: pixel address: 0
[14:20:59.149] <TB3> INFO: pulse height fill bit: 0
[14:20:59.149] <TB3> INFO: buffer corruption: 0
[14:20:59.149] <TB3> INFO: enter test to run
[14:20:59.149] <TB3> INFO: test: exit no parameter change
[14:20:59.275] <TB3> QUIET: Connection to board 126 closed.
[14:20:59.277] <TB3> INFO: pXar: this is the end, my friend