[11:20:05.768] <TB3> INFO: *** Welcome to pxar ***
[11:20:05.768] <TB3> INFO: *** Today: 2016/10/16
[11:20:05.776] <TB3> INFO: *** Version: c8ba-dirty
[11:20:05.776] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters_C15.dat
[11:20:05.777] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//tbmParameters_C1b.dat
[11:20:05.777] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//defaultMaskFile.dat
[11:20:05.777] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//trimParameters_C15.dat
[11:20:05.842] <TB3> INFO: clk: 4
[11:20:05.842] <TB3> INFO: ctr: 4
[11:20:05.842] <TB3> INFO: sda: 19
[11:20:05.842] <TB3> INFO: tin: 9
[11:20:05.842] <TB3> INFO: level: 15
[11:20:05.842] <TB3> INFO: triggerdelay: 0
[11:20:05.842] <TB3> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[11:20:05.842] <TB3> INFO: Log level: INFO
[11:20:05.851] <TB3> INFO: Found DTB DTB_WWVASW
[11:20:05.866] <TB3> QUIET: Connection to board DTB_WWVASW opened.
[11:20:05.868] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[11:20:05.870] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[11:20:07.409] <TB3> INFO: DUT info:
[11:20:07.409] <TB3> INFO: The DUT currently contains the following objects:
[11:20:07.409] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[11:20:07.409] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:20:07.409] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:20:07.409] <TB3> INFO: TBM Core alpha (2): 7 registers set
[11:20:07.409] <TB3> INFO: TBM Core beta (3): 7 registers set
[11:20:07.409] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[11:20:07.409] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:20:07.409] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:20:07.409] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:20:07.409] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:20:07.409] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:20:07.409] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:20:07.409] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:20:07.409] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:20:07.409] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:20:07.409] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:20:07.409] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:20:07.410] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:20:07.410] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:20:07.410] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:20:07.410] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:20:07.410] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:20:07.811] <TB3> INFO: enter 'restricted' command line mode
[11:20:07.811] <TB3> INFO: enter test to run
[11:20:07.811] <TB3> INFO: test: pretest no parameter change
[11:20:07.811] <TB3> INFO: running: pretest
[11:20:07.817] <TB3> INFO: ######################################################################
[11:20:07.817] <TB3> INFO: PixTestPretest::doTest()
[11:20:07.817] <TB3> INFO: ######################################################################
[11:20:07.818] <TB3> INFO: ----------------------------------------------------------------------
[11:20:07.819] <TB3> INFO: PixTestPretest::programROC()
[11:20:07.819] <TB3> INFO: ----------------------------------------------------------------------
[11:20:25.833] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:20:25.833] <TB3> INFO: IA differences per ROC: 19.3 17.7 18.5 20.1 18.5 18.5 19.3 20.9 18.5 23.3 20.9 20.9 18.5 19.3 19.3 17.7
[11:20:25.901] <TB3> INFO: ----------------------------------------------------------------------
[11:20:25.901] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:20:25.901] <TB3> INFO: ----------------------------------------------------------------------
[11:20:33.007] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 381.9 mA = 23.8688 mA/ROC
[11:20:33.007] <TB3> INFO: i(loss) [mA/ROC]: 18.5 19.3 18.5 19.3 20.1 19.3 18.5 18.5 18.5 18.5 18.5 18.5 19.3 18.5 18.5 19.3
[11:20:33.043] <TB3> INFO: ----------------------------------------------------------------------
[11:20:33.043] <TB3> INFO: PixTestPretest::findTiming()
[11:20:33.043] <TB3> INFO: ----------------------------------------------------------------------
[11:20:33.043] <TB3> INFO: PixTestCmd::init()

[11:21:05.215] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[11:21:05.215] <TB3> INFO: (success/tries = 100/100), width = 4
[11:21:06.727] <TB3> INFO: ----------------------------------------------------------------------
[11:21:06.728] <TB3> INFO: PixTestPretest::findWorkingPixel()
[11:21:06.728] <TB3> INFO: ----------------------------------------------------------------------
[11:21:06.824] <TB3> INFO: Expecting 231680 events.
[11:21:16.820] <TB3> INFO: 231680 events read in total (9404ms).
[11:21:16.827] <TB3> INFO: Test took 10093ms.
[11:21:17.075] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:21:17.106] <TB3> INFO: ----------------------------------------------------------------------
[11:21:17.106] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[11:21:17.106] <TB3> INFO: ----------------------------------------------------------------------
[11:21:17.199] <TB3> INFO: Expecting 231680 events.
[11:21:27.313] <TB3> INFO: 231680 events read in total (9522ms).
[11:21:27.322] <TB3> INFO: Test took 10211ms.
[11:21:27.572] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[11:21:27.572] <TB3> INFO: CalDel: 95 90 94 99 111 100 91 111 102 101 118 108 111 111 113 97
[11:21:27.572] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[11:21:27.576] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters_C0.dat
[11:21:27.577] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters_C1.dat
[11:21:27.577] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters_C2.dat
[11:21:27.577] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters_C3.dat
[11:21:27.577] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters_C4.dat
[11:21:27.577] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters_C5.dat
[11:21:27.578] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters_C6.dat
[11:21:27.578] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters_C7.dat
[11:21:27.578] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters_C8.dat
[11:21:27.578] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters_C9.dat
[11:21:27.578] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters_C10.dat
[11:21:27.579] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters_C11.dat
[11:21:27.579] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters_C12.dat
[11:21:27.579] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters_C13.dat
[11:21:27.579] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters_C14.dat
[11:21:27.579] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters_C15.dat
[11:21:27.579] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//tbmParameters_C0a.dat
[11:21:27.580] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//tbmParameters_C0b.dat
[11:21:27.580] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//tbmParameters_C1a.dat
[11:21:27.580] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//tbmParameters_C1b.dat
[11:21:27.580] <TB3> INFO: PixTestPretest::doTest() done, duration: 79 seconds
[11:21:27.632] <TB3> INFO: enter test to run
[11:21:27.632] <TB3> INFO: test: FullTest no parameter change
[11:21:27.632] <TB3> INFO: running: fulltest
[11:21:27.632] <TB3> INFO: ######################################################################
[11:21:27.632] <TB3> INFO: PixTestFullTest::doTest()
[11:21:27.632] <TB3> INFO: ######################################################################
[11:21:27.633] <TB3> INFO: ######################################################################
[11:21:27.633] <TB3> INFO: PixTestAlive::doTest()
[11:21:27.633] <TB3> INFO: ######################################################################
[11:21:27.634] <TB3> INFO: ----------------------------------------------------------------------
[11:21:27.634] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:21:27.634] <TB3> INFO: ----------------------------------------------------------------------
[11:21:27.872] <TB3> INFO: Expecting 41600 events.
[11:21:31.367] <TB3> INFO: 41600 events read in total (2903ms).
[11:21:31.368] <TB3> INFO: Test took 3732ms.
[11:21:31.601] <TB3> INFO: PixTestAlive::aliveTest() done
[11:21:31.601] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:21:31.603] <TB3> INFO: ----------------------------------------------------------------------
[11:21:31.603] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:21:31.603] <TB3> INFO: ----------------------------------------------------------------------
[11:21:31.849] <TB3> INFO: Expecting 41600 events.
[11:21:34.807] <TB3> INFO: 41600 events read in total (2367ms).
[11:21:34.807] <TB3> INFO: Test took 3201ms.
[11:21:34.808] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:21:35.043] <TB3> INFO: PixTestAlive::maskTest() done
[11:21:35.043] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:21:35.045] <TB3> INFO: ----------------------------------------------------------------------
[11:21:35.045] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:21:35.045] <TB3> INFO: ----------------------------------------------------------------------
[11:21:35.282] <TB3> INFO: Expecting 41600 events.
[11:21:38.976] <TB3> INFO: 41600 events read in total (3102ms).
[11:21:38.977] <TB3> INFO: Test took 3931ms.
[11:21:39.214] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[11:21:39.214] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:21:39.214] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[11:21:39.214] <TB3> INFO: Decoding statistics:
[11:21:39.214] <TB3> INFO: General information:
[11:21:39.214] <TB3> INFO: 16bit words read: 0
[11:21:39.214] <TB3> INFO: valid events total: 0
[11:21:39.214] <TB3> INFO: empty events: 0
[11:21:39.214] <TB3> INFO: valid events with pixels: 0
[11:21:39.214] <TB3> INFO: valid pixel hits: 0
[11:21:39.214] <TB3> INFO: Event errors: 0
[11:21:39.214] <TB3> INFO: start marker: 0
[11:21:39.214] <TB3> INFO: stop marker: 0
[11:21:39.215] <TB3> INFO: overflow: 0
[11:21:39.215] <TB3> INFO: invalid 5bit words: 0
[11:21:39.215] <TB3> INFO: invalid XOR eye diagram: 0
[11:21:39.215] <TB3> INFO: frame (failed synchr.): 0
[11:21:39.215] <TB3> INFO: idle data (no TBM trl): 0
[11:21:39.215] <TB3> INFO: no data (only TBM hdr): 0
[11:21:39.215] <TB3> INFO: TBM errors: 0
[11:21:39.215] <TB3> INFO: flawed TBM headers: 0
[11:21:39.215] <TB3> INFO: flawed TBM trailers: 0
[11:21:39.215] <TB3> INFO: event ID mismatches: 0
[11:21:39.215] <TB3> INFO: ROC errors: 0
[11:21:39.215] <TB3> INFO: missing ROC header(s): 0
[11:21:39.215] <TB3> INFO: misplaced readback start: 0
[11:21:39.215] <TB3> INFO: Pixel decoding errors: 0
[11:21:39.215] <TB3> INFO: pixel data incomplete: 0
[11:21:39.215] <TB3> INFO: pixel address: 0
[11:21:39.215] <TB3> INFO: pulse height fill bit: 0
[11:21:39.215] <TB3> INFO: buffer corruption: 0
[11:21:39.223] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C15.dat
[11:21:39.223] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[11:21:39.223] <TB3> INFO: ######################################################################
[11:21:39.223] <TB3> INFO: PixTestReadback::doTest()
[11:21:39.223] <TB3> INFO: ######################################################################
[11:21:39.223] <TB3> INFO: ----------------------------------------------------------------------
[11:21:39.223] <TB3> INFO: PixTestReadback::CalibrateVd()
[11:21:39.223] <TB3> INFO: ----------------------------------------------------------------------
[11:21:49.196] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C0.dat
[11:21:49.196] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C1.dat
[11:21:49.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C2.dat
[11:21:49.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C3.dat
[11:21:49.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C4.dat
[11:21:49.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C5.dat
[11:21:49.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C6.dat
[11:21:49.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C7.dat
[11:21:49.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C8.dat
[11:21:49.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C9.dat
[11:21:49.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C10.dat
[11:21:49.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C11.dat
[11:21:49.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C12.dat
[11:21:49.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C13.dat
[11:21:49.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C14.dat
[11:21:49.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C15.dat
[11:21:49.227] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:21:49.227] <TB3> INFO: ----------------------------------------------------------------------
[11:21:49.227] <TB3> INFO: PixTestReadback::CalibrateVa()
[11:21:49.227] <TB3> INFO: ----------------------------------------------------------------------
[11:21:59.165] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C0.dat
[11:21:59.165] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C1.dat
[11:21:59.165] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C2.dat
[11:21:59.165] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C3.dat
[11:21:59.165] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C4.dat
[11:21:59.165] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C5.dat
[11:21:59.165] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C6.dat
[11:21:59.165] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C7.dat
[11:21:59.165] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C8.dat
[11:21:59.165] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C9.dat
[11:21:59.165] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C10.dat
[11:21:59.165] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C11.dat
[11:21:59.165] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C12.dat
[11:21:59.166] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C13.dat
[11:21:59.166] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C14.dat
[11:21:59.166] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C15.dat
[11:21:59.198] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:21:59.198] <TB3> INFO: ----------------------------------------------------------------------
[11:21:59.198] <TB3> INFO: PixTestReadback::readbackVbg()
[11:21:59.198] <TB3> INFO: ----------------------------------------------------------------------
[11:22:06.873] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:22:06.873] <TB3> INFO: ----------------------------------------------------------------------
[11:22:06.873] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[11:22:06.873] <TB3> INFO: ----------------------------------------------------------------------
[11:22:06.873] <TB3> INFO: Vbg will be calibrated using Vd calibration
[11:22:06.873] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 148.9calibrated Vbg = 1.19117 :::*/*/*/*/
[11:22:06.873] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 156calibrated Vbg = 1.19326 :::*/*/*/*/
[11:22:06.873] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 154.7calibrated Vbg = 1.19077 :::*/*/*/*/
[11:22:06.873] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 159.5calibrated Vbg = 1.18421 :::*/*/*/*/
[11:22:06.873] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 150.7calibrated Vbg = 1.18793 :::*/*/*/*/
[11:22:06.873] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 152.7calibrated Vbg = 1.19947 :::*/*/*/*/
[11:22:06.873] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 152.3calibrated Vbg = 1.1939 :::*/*/*/*/
[11:22:06.873] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 157calibrated Vbg = 1.19471 :::*/*/*/*/
[11:22:06.874] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 150.4calibrated Vbg = 1.19302 :::*/*/*/*/
[11:22:06.874] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 149.8calibrated Vbg = 1.19051 :::*/*/*/*/
[11:22:06.874] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 159calibrated Vbg = 1.18742 :::*/*/*/*/
[11:22:06.874] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 153.9calibrated Vbg = 1.18088 :::*/*/*/*/
[11:22:06.874] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 148.6calibrated Vbg = 1.18324 :::*/*/*/*/
[11:22:06.874] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 152.2calibrated Vbg = 1.18941 :::*/*/*/*/
[11:22:06.874] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 157calibrated Vbg = 1.18847 :::*/*/*/*/
[11:22:06.874] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 160.1calibrated Vbg = 1.19205 :::*/*/*/*/
[11:22:06.877] <TB3> INFO: ----------------------------------------------------------------------
[11:22:06.877] <TB3> INFO: PixTestReadback::CalibrateIa()
[11:22:06.877] <TB3> INFO: ----------------------------------------------------------------------
[11:24:47.705] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C0.dat
[11:24:47.706] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C1.dat
[11:24:47.706] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C2.dat
[11:24:47.706] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C3.dat
[11:24:47.706] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C4.dat
[11:24:47.706] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C5.dat
[11:24:47.706] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C6.dat
[11:24:47.706] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C7.dat
[11:24:47.706] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C8.dat
[11:24:47.706] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C9.dat
[11:24:47.706] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C10.dat
[11:24:47.706] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C11.dat
[11:24:47.706] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C12.dat
[11:24:47.706] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C13.dat
[11:24:47.706] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C14.dat
[11:24:47.706] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//readbackCal_C15.dat
[11:24:47.734] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:24:47.735] <TB3> INFO: PixTestReadback::doTest() done
[11:24:47.735] <TB3> INFO: Decoding statistics:
[11:24:47.735] <TB3> INFO: General information:
[11:24:47.735] <TB3> INFO: 16bit words read: 1536
[11:24:47.735] <TB3> INFO: valid events total: 256
[11:24:47.735] <TB3> INFO: empty events: 256
[11:24:47.735] <TB3> INFO: valid events with pixels: 0
[11:24:47.735] <TB3> INFO: valid pixel hits: 0
[11:24:47.735] <TB3> INFO: Event errors: 0
[11:24:47.735] <TB3> INFO: start marker: 0
[11:24:47.735] <TB3> INFO: stop marker: 0
[11:24:47.735] <TB3> INFO: overflow: 0
[11:24:47.735] <TB3> INFO: invalid 5bit words: 0
[11:24:47.735] <TB3> INFO: invalid XOR eye diagram: 0
[11:24:47.735] <TB3> INFO: frame (failed synchr.): 0
[11:24:47.735] <TB3> INFO: idle data (no TBM trl): 0
[11:24:47.735] <TB3> INFO: no data (only TBM hdr): 0
[11:24:47.735] <TB3> INFO: TBM errors: 0
[11:24:47.735] <TB3> INFO: flawed TBM headers: 0
[11:24:47.735] <TB3> INFO: flawed TBM trailers: 0
[11:24:47.735] <TB3> INFO: event ID mismatches: 0
[11:24:47.735] <TB3> INFO: ROC errors: 0
[11:24:47.735] <TB3> INFO: missing ROC header(s): 0
[11:24:47.735] <TB3> INFO: misplaced readback start: 0
[11:24:47.735] <TB3> INFO: Pixel decoding errors: 0
[11:24:47.735] <TB3> INFO: pixel data incomplete: 0
[11:24:47.735] <TB3> INFO: pixel address: 0
[11:24:47.735] <TB3> INFO: pulse height fill bit: 0
[11:24:47.735] <TB3> INFO: buffer corruption: 0
[11:24:47.787] <TB3> INFO: ######################################################################
[11:24:47.787] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:24:47.787] <TB3> INFO: ######################################################################
[11:24:47.789] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[11:24:47.804] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:24:47.804] <TB3> INFO: run 1 of 1
[11:24:48.044] <TB3> INFO: Expecting 3120000 events.
[11:25:19.095] <TB3> INFO: 674325 events read in total (30459ms).











[11:25:49.162] <TB3> INFO: 1343455 events read in total (60526ms).











[11:26:19.101] <TB3> INFO: 2011130 events read in total (90466ms).











[11:26:49.176] <TB3> INFO: 2680295 events read in total (120540ms).
[11:27:08.937] <TB3> INFO: 3120000 events read in total (140301ms).
[11:27:08.002] <TB3> INFO: Test took 141199ms.
[11:27:34.642] <TB3> INFO: PixTestBBMap::doTest() done, duration: 166 seconds
[11:27:34.642] <TB3> INFO: number of dead bumps (per ROC): 1 0 0 0 0 0 4 11 8 1 1 0 0 0 0 0
[11:27:34.642] <TB3> INFO: separation cut (per ROC): 104 105 102 104 105 112 105 113 104 129 120 118 105 103 107 105
[11:27:34.642] <TB3> INFO: Decoding statistics:
[11:27:34.642] <TB3> INFO: General information:
[11:27:34.642] <TB3> INFO: 16bit words read: 0
[11:27:34.642] <TB3> INFO: valid events total: 0
[11:27:34.642] <TB3> INFO: empty events: 0
[11:27:34.642] <TB3> INFO: valid events with pixels: 0
[11:27:34.642] <TB3> INFO: valid pixel hits: 0
[11:27:34.642] <TB3> INFO: Event errors: 0
[11:27:34.642] <TB3> INFO: start marker: 0
[11:27:34.642] <TB3> INFO: stop marker: 0
[11:27:34.642] <TB3> INFO: overflow: 0
[11:27:34.642] <TB3> INFO: invalid 5bit words: 0
[11:27:34.642] <TB3> INFO: invalid XOR eye diagram: 0
[11:27:34.642] <TB3> INFO: frame (failed synchr.): 0
[11:27:34.642] <TB3> INFO: idle data (no TBM trl): 0
[11:27:34.642] <TB3> INFO: no data (only TBM hdr): 0
[11:27:34.642] <TB3> INFO: TBM errors: 0
[11:27:34.642] <TB3> INFO: flawed TBM headers: 0
[11:27:34.642] <TB3> INFO: flawed TBM trailers: 0
[11:27:34.642] <TB3> INFO: event ID mismatches: 0
[11:27:34.642] <TB3> INFO: ROC errors: 0
[11:27:34.642] <TB3> INFO: missing ROC header(s): 0
[11:27:34.642] <TB3> INFO: misplaced readback start: 0
[11:27:34.642] <TB3> INFO: Pixel decoding errors: 0
[11:27:34.642] <TB3> INFO: pixel data incomplete: 0
[11:27:34.642] <TB3> INFO: pixel address: 0
[11:27:34.642] <TB3> INFO: pulse height fill bit: 0
[11:27:34.642] <TB3> INFO: buffer corruption: 0
[11:27:34.681] <TB3> INFO: ######################################################################
[11:27:34.681] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:27:34.681] <TB3> INFO: ######################################################################
[11:27:34.681] <TB3> INFO: ----------------------------------------------------------------------
[11:27:34.681] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:27:34.681] <TB3> INFO: ----------------------------------------------------------------------
[11:27:34.681] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[11:27:34.695] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[11:27:34.695] <TB3> INFO: run 1 of 1
[11:27:34.934] <TB3> INFO: Expecting 36608000 events.
[11:27:58.102] <TB3> INFO: 670450 events read in total (22577ms).
[11:28:20.635] <TB3> INFO: 1328050 events read in total (45110ms).
[11:28:43.176] <TB3> INFO: 1988600 events read in total (67651ms).
[11:29:06.161] <TB3> INFO: 2647600 events read in total (90636ms).
[11:29:29.144] <TB3> INFO: 3306850 events read in total (113619ms).
[11:29:51.938] <TB3> INFO: 3965350 events read in total (136413ms).
[11:30:15.073] <TB3> INFO: 4623850 events read in total (159548ms).
[11:30:38.064] <TB3> INFO: 5282350 events read in total (182539ms).
[11:31:00.627] <TB3> INFO: 5938750 events read in total (205102ms).
[11:31:23.417] <TB3> INFO: 6595800 events read in total (227892ms).
[11:31:46.156] <TB3> INFO: 7252050 events read in total (250631ms).
[11:32:09.068] <TB3> INFO: 7910450 events read in total (273543ms).
[11:32:31.634] <TB3> INFO: 8568200 events read in total (296109ms).
[11:32:54.434] <TB3> INFO: 9227050 events read in total (318909ms).
[11:33:16.983] <TB3> INFO: 9881600 events read in total (341458ms).
[11:33:39.789] <TB3> INFO: 10538300 events read in total (364264ms).
[11:34:02.589] <TB3> INFO: 11191550 events read in total (387064ms).
[11:34:25.693] <TB3> INFO: 11846600 events read in total (410168ms).
[11:34:48.747] <TB3> INFO: 12501300 events read in total (433222ms).
[11:35:11.547] <TB3> INFO: 13155900 events read in total (456022ms).
[11:35:34.275] <TB3> INFO: 13811750 events read in total (478750ms).
[11:35:57.152] <TB3> INFO: 14466750 events read in total (501627ms).
[11:36:20.026] <TB3> INFO: 15120800 events read in total (524501ms).
[11:36:42.971] <TB3> INFO: 15774650 events read in total (547446ms).
[11:37:06.057] <TB3> INFO: 16428850 events read in total (570532ms).
[11:37:28.831] <TB3> INFO: 17084700 events read in total (593306ms).
[11:37:51.739] <TB3> INFO: 17738850 events read in total (616214ms).
[11:38:14.474] <TB3> INFO: 18390950 events read in total (638949ms).
[11:38:37.375] <TB3> INFO: 19044000 events read in total (661850ms).
[11:39:00.017] <TB3> INFO: 19694850 events read in total (684492ms).
[11:39:22.517] <TB3> INFO: 20346950 events read in total (706992ms).
[11:39:45.100] <TB3> INFO: 20995800 events read in total (729575ms).
[11:40:07.845] <TB3> INFO: 21647750 events read in total (752320ms).
[11:40:30.714] <TB3> INFO: 22299600 events read in total (775189ms).
[11:40:53.243] <TB3> INFO: 22950250 events read in total (797718ms).
[11:41:15.899] <TB3> INFO: 23601850 events read in total (820374ms).
[11:41:38.423] <TB3> INFO: 24252450 events read in total (842898ms).
[11:42:01.419] <TB3> INFO: 24903750 events read in total (865894ms).
[11:42:24.128] <TB3> INFO: 25555800 events read in total (888603ms).
[11:42:46.801] <TB3> INFO: 26208750 events read in total (911276ms).
[11:43:09.732] <TB3> INFO: 26858950 events read in total (934207ms).
[11:43:32.551] <TB3> INFO: 27509950 events read in total (957026ms).
[11:43:55.108] <TB3> INFO: 28159950 events read in total (979583ms).
[11:44:18.085] <TB3> INFO: 28809750 events read in total (1002560ms).
[11:44:40.630] <TB3> INFO: 29459000 events read in total (1025105ms).
[11:45:03.255] <TB3> INFO: 30108300 events read in total (1047730ms).
[11:45:25.738] <TB3> INFO: 30756150 events read in total (1070213ms).
[11:45:48.269] <TB3> INFO: 31405950 events read in total (1092744ms).
[11:46:10.921] <TB3> INFO: 32056850 events read in total (1115396ms).
[11:46:33.644] <TB3> INFO: 32708050 events read in total (1138119ms).
[11:46:56.282] <TB3> INFO: 33359550 events read in total (1160757ms).
[11:47:18.907] <TB3> INFO: 34011850 events read in total (1183382ms).
[11:47:41.538] <TB3> INFO: 34666900 events read in total (1206013ms).
[11:48:04.385] <TB3> INFO: 35319450 events read in total (1228860ms).
[11:48:27.768] <TB3> INFO: 35975600 events read in total (1252243ms).
[11:48:49.367] <TB3> INFO: 36608000 events read in total (1273842ms).
[11:48:49.438] <TB3> INFO: Test took 1274743ms.
[11:48:49.911] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:48:51.576] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:48:53.284] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:48:55.622] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:48:57.705] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:48:59.953] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:49:01.841] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:49:03.512] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:49:05.151] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:49:06.748] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:49:08.342] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:49:09.962] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:49:11.664] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:49:13.262] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:49:14.915] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:49:16.497] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:49:18.187] <TB3> INFO: PixTestScurves::scurves() done
[11:49:18.187] <TB3> INFO: Vcal mean: 111.26 108.56 109.30 111.96 103.72 111.16 111.68 113.76 105.06 113.73 117.69 109.40 112.02 107.54 107.63 106.21
[11:49:18.188] <TB3> INFO: Vcal RMS: 4.86 4.68 5.19 5.29 4.99 4.76 4.52 5.37 5.52 5.51 6.18 5.34 4.91 4.46 5.47 5.05
[11:49:18.188] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1303 seconds
[11:49:18.188] <TB3> INFO: Decoding statistics:
[11:49:18.188] <TB3> INFO: General information:
[11:49:18.188] <TB3> INFO: 16bit words read: 0
[11:49:18.188] <TB3> INFO: valid events total: 0
[11:49:18.188] <TB3> INFO: empty events: 0
[11:49:18.188] <TB3> INFO: valid events with pixels: 0
[11:49:18.188] <TB3> INFO: valid pixel hits: 0
[11:49:18.188] <TB3> INFO: Event errors: 0
[11:49:18.188] <TB3> INFO: start marker: 0
[11:49:18.188] <TB3> INFO: stop marker: 0
[11:49:18.188] <TB3> INFO: overflow: 0
[11:49:18.188] <TB3> INFO: invalid 5bit words: 0
[11:49:18.188] <TB3> INFO: invalid XOR eye diagram: 0
[11:49:18.188] <TB3> INFO: frame (failed synchr.): 0
[11:49:18.188] <TB3> INFO: idle data (no TBM trl): 0
[11:49:18.188] <TB3> INFO: no data (only TBM hdr): 0
[11:49:18.188] <TB3> INFO: TBM errors: 0
[11:49:18.188] <TB3> INFO: flawed TBM headers: 0
[11:49:18.188] <TB3> INFO: flawed TBM trailers: 0
[11:49:18.189] <TB3> INFO: event ID mismatches: 0
[11:49:18.189] <TB3> INFO: ROC errors: 0
[11:49:18.189] <TB3> INFO: missing ROC header(s): 0
[11:49:18.189] <TB3> INFO: misplaced readback start: 0
[11:49:18.189] <TB3> INFO: Pixel decoding errors: 0
[11:49:18.189] <TB3> INFO: pixel data incomplete: 0
[11:49:18.189] <TB3> INFO: pixel address: 0
[11:49:18.189] <TB3> INFO: pulse height fill bit: 0
[11:49:18.189] <TB3> INFO: buffer corruption: 0
[11:49:18.259] <TB3> INFO: ######################################################################
[11:49:18.259] <TB3> INFO: PixTestTrim::doTest()
[11:49:18.259] <TB3> INFO: ######################################################################
[11:49:18.260] <TB3> INFO: ----------------------------------------------------------------------
[11:49:18.260] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[11:49:18.260] <TB3> INFO: ----------------------------------------------------------------------
[11:49:18.304] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:49:18.304] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:49:18.316] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:49:18.316] <TB3> INFO: run 1 of 1
[11:49:18.556] <TB3> INFO: Expecting 5025280 events.
[11:49:49.432] <TB3> INFO: 822384 events read in total (30273ms).
[11:50:20.059] <TB3> INFO: 1642072 events read in total (60901ms).
[11:50:50.559] <TB3> INFO: 2458664 events read in total (91400ms).
[11:51:20.756] <TB3> INFO: 3272624 events read in total (121597ms).
[11:51:51.141] <TB3> INFO: 4084048 events read in total (151983ms).
[11:52:22.565] <TB3> INFO: 4893232 events read in total (183406ms).
[11:52:27.852] <TB3> INFO: 5025280 events read in total (188693ms).
[11:52:27.907] <TB3> INFO: Test took 189590ms.
[11:52:46.423] <TB3> INFO: ROC 0 VthrComp = 112
[11:52:46.423] <TB3> INFO: ROC 1 VthrComp = 115
[11:52:46.423] <TB3> INFO: ROC 2 VthrComp = 110
[11:52:46.424] <TB3> INFO: ROC 3 VthrComp = 112
[11:52:46.424] <TB3> INFO: ROC 4 VthrComp = 106
[11:52:46.424] <TB3> INFO: ROC 5 VthrComp = 112
[11:52:46.424] <TB3> INFO: ROC 6 VthrComp = 118
[11:52:46.424] <TB3> INFO: ROC 7 VthrComp = 121
[11:52:46.425] <TB3> INFO: ROC 8 VthrComp = 101
[11:52:46.435] <TB3> INFO: ROC 9 VthrComp = 119
[11:52:46.435] <TB3> INFO: ROC 10 VthrComp = 117
[11:52:46.435] <TB3> INFO: ROC 11 VthrComp = 111
[11:52:46.435] <TB3> INFO: ROC 12 VthrComp = 109
[11:52:46.435] <TB3> INFO: ROC 13 VthrComp = 111
[11:52:46.435] <TB3> INFO: ROC 14 VthrComp = 107
[11:52:46.436] <TB3> INFO: ROC 15 VthrComp = 110
[11:52:46.436] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:52:46.436] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:52:46.451] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:52:46.451] <TB3> INFO: run 1 of 1
[11:52:46.759] <TB3> INFO: Expecting 5025280 events.
[11:53:13.024] <TB3> INFO: 590576 events read in total (25673ms).
[11:53:38.490] <TB3> INFO: 1179352 events read in total (51139ms).
[11:54:03.932] <TB3> INFO: 1769064 events read in total (76581ms).
[11:54:29.496] <TB3> INFO: 2357792 events read in total (102145ms).
[11:54:55.196] <TB3> INFO: 2944864 events read in total (127845ms).
[11:55:20.716] <TB3> INFO: 3531072 events read in total (153365ms).
[11:55:46.187] <TB3> INFO: 4116912 events read in total (178836ms).
[11:56:12.149] <TB3> INFO: 4702352 events read in total (204798ms).
[11:56:26.586] <TB3> INFO: 5025280 events read in total (219235ms).
[11:56:26.690] <TB3> INFO: Test took 220240ms.
[11:56:54.495] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 60.8141 for pixel 34/3 mean/min/max = 46.7081/32.576/60.8402
[11:56:54.495] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 58.1601 for pixel 45/11 mean/min/max = 45.2716/32.3412/58.202
[11:56:54.496] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 63.9178 for pixel 14/73 mean/min/max = 48.8506/33.7297/63.9715
[11:56:54.497] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 61.6811 for pixel 18/72 mean/min/max = 46.602/31.4861/61.7178
[11:56:54.497] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 60.8238 for pixel 8/10 mean/min/max = 47.8989/34.9513/60.8465
[11:56:54.498] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 59.2186 for pixel 3/21 mean/min/max = 46.0263/32.8255/59.2272
[11:56:54.498] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 59.1842 for pixel 14/3 mean/min/max = 45.8334/32.3158/59.351
[11:56:54.499] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 58.318 for pixel 18/10 mean/min/max = 45.1158/31.5224/58.7093
[11:56:54.499] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 65.1518 for pixel 7/8 mean/min/max = 48.7167/32.1965/65.237
[11:56:54.500] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 60.0265 for pixel 1/1 mean/min/max = 45.724/31.3766/60.0714
[11:56:54.500] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 62.6304 for pixel 25/11 mean/min/max = 46.851/30.9566/62.7454
[11:56:54.501] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 63.077 for pixel 27/76 mean/min/max = 48.5369/33.9415/63.1324
[11:56:54.501] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 63.0944 for pixel 11/13 mean/min/max = 49.1371/35.0633/63.2109
[11:56:54.502] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 59.5616 for pixel 5/5 mean/min/max = 47.3192/35.0238/59.6147
[11:56:54.502] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 61.9965 for pixel 19/70 mean/min/max = 48.1651/34.2309/62.0992
[11:56:54.503] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 60.1901 for pixel 51/6 mean/min/max = 47.2514/34.2395/60.2632
[11:56:54.503] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:56:54.593] <TB3> INFO: Expecting 411648 events.
[11:57:04.215] <TB3> INFO: 411648 events read in total (9030ms).
[11:57:04.222] <TB3> INFO: Expecting 411648 events.
[11:57:13.789] <TB3> INFO: 411648 events read in total (9164ms).
[11:57:13.800] <TB3> INFO: Expecting 411648 events.
[11:57:23.310] <TB3> INFO: 411648 events read in total (9107ms).
[11:57:23.330] <TB3> INFO: Expecting 411648 events.
[11:57:32.749] <TB3> INFO: 411648 events read in total (9016ms).
[11:57:32.768] <TB3> INFO: Expecting 411648 events.
[11:57:42.222] <TB3> INFO: 411648 events read in total (9050ms).
[11:57:42.246] <TB3> INFO: Expecting 411648 events.
[11:57:51.717] <TB3> INFO: 411648 events read in total (9068ms).
[11:57:51.740] <TB3> INFO: Expecting 411648 events.
[11:58:01.136] <TB3> INFO: 411648 events read in total (8993ms).
[11:58:01.160] <TB3> INFO: Expecting 411648 events.
[11:58:10.536] <TB3> INFO: 411648 events read in total (8973ms).
[11:58:10.563] <TB3> INFO: Expecting 411648 events.
[11:58:19.972] <TB3> INFO: 411648 events read in total (9006ms).
[11:58:20.010] <TB3> INFO: Expecting 411648 events.
[11:58:29.396] <TB3> INFO: 411648 events read in total (8983ms).
[11:58:29.428] <TB3> INFO: Expecting 411648 events.
[11:58:38.830] <TB3> INFO: 411648 events read in total (8999ms).
[11:58:38.865] <TB3> INFO: Expecting 411648 events.
[11:58:48.314] <TB3> INFO: 411648 events read in total (9046ms).
[11:58:48.363] <TB3> INFO: Expecting 411648 events.
[11:58:57.744] <TB3> INFO: 411648 events read in total (8978ms).
[11:58:57.796] <TB3> INFO: Expecting 411648 events.
[11:59:07.039] <TB3> INFO: 411648 events read in total (8840ms).
[11:59:07.085] <TB3> INFO: Expecting 411648 events.
[11:59:16.264] <TB3> INFO: 411648 events read in total (8776ms).
[11:59:16.321] <TB3> INFO: Expecting 411648 events.
[11:59:25.535] <TB3> INFO: 411648 events read in total (8811ms).
[11:59:25.598] <TB3> INFO: Test took 151095ms.
[11:59:26.382] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[11:59:26.400] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:59:26.400] <TB3> INFO: run 1 of 1
[11:59:26.638] <TB3> INFO: Expecting 5025280 events.
[11:59:53.366] <TB3> INFO: 590024 events read in total (26135ms).
[12:00:19.120] <TB3> INFO: 1179240 events read in total (51889ms).
[12:00:44.937] <TB3> INFO: 1767288 events read in total (77706ms).
[12:01:10.904] <TB3> INFO: 2355328 events read in total (103673ms).
[12:01:36.841] <TB3> INFO: 2941856 events read in total (129610ms).
[12:02:02.686] <TB3> INFO: 3528296 events read in total (155455ms).
[12:02:28.544] <TB3> INFO: 4113968 events read in total (181313ms).
[12:02:54.649] <TB3> INFO: 4698936 events read in total (207418ms).
[12:03:09.301] <TB3> INFO: 5025280 events read in total (222071ms).
[12:03:09.423] <TB3> INFO: Test took 223023ms.
[12:03:33.862] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 1.896160 .. 147.154244
[12:03:34.100] <TB3> INFO: Expecting 208000 events.
[12:03:43.650] <TB3> INFO: 208000 events read in total (8958ms).
[12:03:43.652] <TB3> INFO: Test took 9788ms.
[12:03:43.727] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 157 (-1/-1) hits flags = 528 (plus default)
[12:03:43.741] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:03:43.741] <TB3> INFO: run 1 of 1
[12:03:44.020] <TB3> INFO: Expecting 5224960 events.
[12:04:10.278] <TB3> INFO: 583448 events read in total (25667ms).
[12:04:35.884] <TB3> INFO: 1167176 events read in total (51273ms).
[12:05:01.209] <TB3> INFO: 1750848 events read in total (76598ms).
[12:05:27.499] <TB3> INFO: 2334632 events read in total (102889ms).
[12:05:53.427] <TB3> INFO: 2918528 events read in total (128816ms).
[12:06:19.228] <TB3> INFO: 3501512 events read in total (154617ms).
[12:06:44.795] <TB3> INFO: 4085288 events read in total (180184ms).
[12:07:10.828] <TB3> INFO: 4668296 events read in total (206217ms).
[12:07:34.915] <TB3> INFO: 5224960 events read in total (230304ms).
[12:07:35.025] <TB3> INFO: Test took 231283ms.
[12:08:00.312] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 27.957251 .. 46.000297
[12:08:00.554] <TB3> INFO: Expecting 208000 events.
[12:08:10.219] <TB3> INFO: 208000 events read in total (9073ms).
[12:08:10.219] <TB3> INFO: Test took 9907ms.
[12:08:10.267] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 56 (-1/-1) hits flags = 528 (plus default)
[12:08:10.279] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:08:10.279] <TB3> INFO: run 1 of 1
[12:08:10.559] <TB3> INFO: Expecting 1331200 events.
[12:08:38.565] <TB3> INFO: 654864 events read in total (27414ms).
[12:09:06.268] <TB3> INFO: 1308648 events read in total (55118ms).
[12:09:07.725] <TB3> INFO: 1331200 events read in total (56575ms).
[12:09:07.754] <TB3> INFO: Test took 57475ms.
[12:09:22.273] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 26.442864 .. 46.427505
[12:09:22.510] <TB3> INFO: Expecting 208000 events.
[12:09:32.315] <TB3> INFO: 208000 events read in total (9213ms).
[12:09:32.316] <TB3> INFO: Test took 10042ms.
[12:09:32.363] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 16 .. 56 (-1/-1) hits flags = 528 (plus default)
[12:09:32.378] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:09:32.378] <TB3> INFO: run 1 of 1
[12:09:32.656] <TB3> INFO: Expecting 1364480 events.
[12:10:00.906] <TB3> INFO: 658656 events read in total (27658ms).
[12:10:28.592] <TB3> INFO: 1317016 events read in total (55344ms).
[12:10:30.993] <TB3> INFO: 1364480 events read in total (57746ms).
[12:10:31.022] <TB3> INFO: Test took 58644ms.
[12:10:43.641] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 23.965728 .. 43.766237
[12:10:43.881] <TB3> INFO: Expecting 208000 events.
[12:10:53.716] <TB3> INFO: 208000 events read in total (9244ms).
[12:10:53.716] <TB3> INFO: Test took 10073ms.
[12:10:53.766] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 13 .. 53 (-1/-1) hits flags = 528 (plus default)
[12:10:53.778] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:10:53.778] <TB3> INFO: run 1 of 1
[12:10:54.059] <TB3> INFO: Expecting 1364480 events.
[12:11:22.538] <TB3> INFO: 683856 events read in total (27886ms).
[12:11:51.068] <TB3> INFO: 1364480 events read in total (56416ms).
[12:11:51.104] <TB3> INFO: Test took 57326ms.
[12:12:03.534] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:12:03.534] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[12:12:03.547] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:12:03.547] <TB3> INFO: run 1 of 1
[12:12:03.790] <TB3> INFO: Expecting 1364480 events.
[12:12:31.880] <TB3> INFO: 666792 events read in total (27498ms).
[12:13:00.050] <TB3> INFO: 1333392 events read in total (55669ms).
[12:13:01.823] <TB3> INFO: 1364480 events read in total (57442ms).
[12:13:01.850] <TB3> INFO: Test took 58304ms.
[12:13:14.126] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C0.dat
[12:13:14.126] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C1.dat
[12:13:14.126] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C2.dat
[12:13:14.126] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C3.dat
[12:13:14.126] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C4.dat
[12:13:14.127] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C5.dat
[12:13:14.127] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C6.dat
[12:13:14.127] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C7.dat
[12:13:14.127] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C8.dat
[12:13:14.127] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C9.dat
[12:13:14.127] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C10.dat
[12:13:14.127] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C11.dat
[12:13:14.127] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C12.dat
[12:13:14.127] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C13.dat
[12:13:14.127] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C14.dat
[12:13:14.127] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C15.dat
[12:13:14.128] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//trimParameters35_C0.dat
[12:13:14.134] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//trimParameters35_C1.dat
[12:13:14.140] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//trimParameters35_C2.dat
[12:13:14.147] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//trimParameters35_C3.dat
[12:13:14.153] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//trimParameters35_C4.dat
[12:13:14.159] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//trimParameters35_C5.dat
[12:13:14.164] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//trimParameters35_C6.dat
[12:13:14.168] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//trimParameters35_C7.dat
[12:13:14.173] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//trimParameters35_C8.dat
[12:13:14.178] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//trimParameters35_C9.dat
[12:13:14.183] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//trimParameters35_C10.dat
[12:13:14.188] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//trimParameters35_C11.dat
[12:13:14.193] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//trimParameters35_C12.dat
[12:13:14.198] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//trimParameters35_C13.dat
[12:13:14.203] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//trimParameters35_C14.dat
[12:13:14.207] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//trimParameters35_C15.dat
[12:13:14.212] <TB3> INFO: PixTestTrim::trimTest() done
[12:13:14.212] <TB3> INFO: vtrim: 126 121 153 133 115 124 129 125 140 114 141 143 145 122 129 103
[12:13:14.212] <TB3> INFO: vthrcomp: 112 115 110 112 106 112 118 121 101 119 117 111 109 111 107 110
[12:13:14.212] <TB3> INFO: vcal mean: 34.92 34.93 35.04 34.98 35.00 34.97 35.00 34.98 35.08 34.98 34.98 35.04 35.00 35.01 35.05 35.15
[12:13:14.212] <TB3> INFO: vcal RMS: 1.01 1.00 1.12 1.12 0.94 1.00 0.98 1.07 1.21 1.02 1.12 1.04 1.04 1.00 1.02 0.96
[12:13:14.212] <TB3> INFO: bits mean: 9.52 9.49 9.34 9.79 8.45 9.44 9.21 9.98 9.07 9.70 9.82 9.08 8.97 8.71 8.73 8.27
[12:13:14.212] <TB3> INFO: bits RMS: 2.58 2.70 2.37 2.58 2.60 2.58 2.84 2.58 2.73 2.64 2.61 2.42 2.35 2.58 2.54 2.80
[12:13:14.220] <TB3> INFO: ----------------------------------------------------------------------
[12:13:14.220] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[12:13:14.220] <TB3> INFO: ----------------------------------------------------------------------
[12:13:14.222] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[12:13:14.234] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:13:14.234] <TB3> INFO: run 1 of 1
[12:13:14.477] <TB3> INFO: Expecting 4160000 events.
[12:13:46.908] <TB3> INFO: 743270 events read in total (31839ms).
[12:14:18.589] <TB3> INFO: 1480065 events read in total (63520ms).
[12:14:50.096] <TB3> INFO: 2213675 events read in total (95027ms).
[12:15:21.709] <TB3> INFO: 2942980 events read in total (126640ms).
[12:15:52.960] <TB3> INFO: 3670860 events read in total (157891ms).
[12:16:14.529] <TB3> INFO: 4160000 events read in total (179460ms).
[12:16:14.615] <TB3> INFO: Test took 180380ms.
[12:16:41.113] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 193 (-1/-1) hits flags = 528 (plus default)
[12:16:41.126] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:16:41.126] <TB3> INFO: run 1 of 1
[12:16:41.363] <TB3> INFO: Expecting 4035200 events.
[12:17:13.685] <TB3> INFO: 726085 events read in total (31730ms).
[12:17:45.086] <TB3> INFO: 1445665 events read in total (63131ms).
[12:18:16.418] <TB3> INFO: 2161905 events read in total (94463ms).
[12:18:47.712] <TB3> INFO: 2874320 events read in total (125757ms).
[12:19:18.945] <TB3> INFO: 3585005 events read in total (156990ms).
[12:19:39.020] <TB3> INFO: 4035200 events read in total (177065ms).
[12:19:39.096] <TB3> INFO: Test took 177970ms.
[12:20:07.821] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 182 (-1/-1) hits flags = 528 (plus default)
[12:20:07.835] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:20:07.835] <TB3> INFO: run 1 of 1
[12:20:08.110] <TB3> INFO: Expecting 3806400 events.
[12:20:40.725] <TB3> INFO: 742615 events read in total (32024ms).
[12:21:12.613] <TB3> INFO: 1478460 events read in total (63912ms).
[12:21:44.102] <TB3> INFO: 2208705 events read in total (95401ms).
[12:22:15.833] <TB3> INFO: 2936025 events read in total (127132ms).
[12:22:47.175] <TB3> INFO: 3663225 events read in total (158474ms).
[12:22:53.643] <TB3> INFO: 3806400 events read in total (164942ms).
[12:22:53.708] <TB3> INFO: Test took 165873ms.
[12:23:19.279] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 180 (-1/-1) hits flags = 528 (plus default)
[12:23:19.294] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:23:19.294] <TB3> INFO: run 1 of 1
[12:23:19.576] <TB3> INFO: Expecting 3764800 events.
[12:23:52.138] <TB3> INFO: 746425 events read in total (31970ms).
[12:24:23.878] <TB3> INFO: 1485440 events read in total (63710ms).
[12:24:55.529] <TB3> INFO: 2218760 events read in total (95361ms).
[12:25:27.021] <TB3> INFO: 2949265 events read in total (126853ms).
[12:25:58.483] <TB3> INFO: 3680520 events read in total (158315ms).
[12:26:02.362] <TB3> INFO: 3764800 events read in total (162194ms).
[12:26:02.442] <TB3> INFO: Test took 163148ms.
[12:26:27.744] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 182 (-1/-1) hits flags = 528 (plus default)
[12:26:27.758] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:26:27.758] <TB3> INFO: run 1 of 1
[12:26:28.040] <TB3> INFO: Expecting 3806400 events.
[12:27:00.064] <TB3> INFO: 743170 events read in total (31429ms).
[12:27:31.766] <TB3> INFO: 1479365 events read in total (63131ms).
[12:28:03.048] <TB3> INFO: 2210055 events read in total (94413ms).
[12:28:34.187] <TB3> INFO: 2938075 events read in total (125552ms).
[12:29:06.016] <TB3> INFO: 3665465 events read in total (157381ms).
[12:29:12.452] <TB3> INFO: 3806400 events read in total (163817ms).
[12:29:12.583] <TB3> INFO: Test took 164824ms.
[12:29:39.563] <TB3> INFO: PixTestTrim::trimBitTest() done
[12:29:39.564] <TB3> INFO: PixTestTrim::doTest() done, duration: 2421 seconds
[12:29:39.564] <TB3> INFO: Decoding statistics:
[12:29:39.564] <TB3> INFO: General information:
[12:29:39.564] <TB3> INFO: 16bit words read: 0
[12:29:39.564] <TB3> INFO: valid events total: 0
[12:29:39.564] <TB3> INFO: empty events: 0
[12:29:39.564] <TB3> INFO: valid events with pixels: 0
[12:29:39.564] <TB3> INFO: valid pixel hits: 0
[12:29:39.564] <TB3> INFO: Event errors: 0
[12:29:39.564] <TB3> INFO: start marker: 0
[12:29:39.564] <TB3> INFO: stop marker: 0
[12:29:39.564] <TB3> INFO: overflow: 0
[12:29:39.564] <TB3> INFO: invalid 5bit words: 0
[12:29:39.564] <TB3> INFO: invalid XOR eye diagram: 0
[12:29:39.564] <TB3> INFO: frame (failed synchr.): 0
[12:29:39.564] <TB3> INFO: idle data (no TBM trl): 0
[12:29:39.564] <TB3> INFO: no data (only TBM hdr): 0
[12:29:39.564] <TB3> INFO: TBM errors: 0
[12:29:39.564] <TB3> INFO: flawed TBM headers: 0
[12:29:39.564] <TB3> INFO: flawed TBM trailers: 0
[12:29:39.564] <TB3> INFO: event ID mismatches: 0
[12:29:39.564] <TB3> INFO: ROC errors: 0
[12:29:39.564] <TB3> INFO: missing ROC header(s): 0
[12:29:39.564] <TB3> INFO: misplaced readback start: 0
[12:29:39.564] <TB3> INFO: Pixel decoding errors: 0
[12:29:39.564] <TB3> INFO: pixel data incomplete: 0
[12:29:39.564] <TB3> INFO: pixel address: 0
[12:29:39.564] <TB3> INFO: pulse height fill bit: 0
[12:29:39.564] <TB3> INFO: buffer corruption: 0
[12:29:40.177] <TB3> INFO: ######################################################################
[12:29:40.177] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:29:40.177] <TB3> INFO: ######################################################################
[12:29:40.414] <TB3> INFO: Expecting 41600 events.
[12:29:43.859] <TB3> INFO: 41600 events read in total (2853ms).
[12:29:43.861] <TB3> INFO: Test took 3683ms.
[12:29:44.305] <TB3> INFO: Expecting 41600 events.
[12:29:47.822] <TB3> INFO: 41600 events read in total (2926ms).
[12:29:47.823] <TB3> INFO: Test took 3758ms.
[12:29:48.112] <TB3> INFO: Expecting 41600 events.
[12:29:51.715] <TB3> INFO: 41600 events read in total (3012ms).
[12:29:51.716] <TB3> INFO: Test took 3869ms.
[12:29:52.008] <TB3> INFO: Expecting 41600 events.
[12:29:55.619] <TB3> INFO: 41600 events read in total (3020ms).
[12:29:55.620] <TB3> INFO: Test took 3877ms.
[12:29:55.909] <TB3> INFO: Expecting 41600 events.
[12:29:59.433] <TB3> INFO: 41600 events read in total (2932ms).
[12:29:59.434] <TB3> INFO: Test took 3790ms.
[12:29:59.723] <TB3> INFO: Expecting 41600 events.
[12:30:03.186] <TB3> INFO: 41600 events read in total (2871ms).
[12:30:03.187] <TB3> INFO: Test took 3728ms.
[12:30:03.476] <TB3> INFO: Expecting 41600 events.
[12:30:07.024] <TB3> INFO: 41600 events read in total (2957ms).
[12:30:07.025] <TB3> INFO: Test took 3814ms.
[12:30:07.314] <TB3> INFO: Expecting 41600 events.
[12:30:10.789] <TB3> INFO: 41600 events read in total (2883ms).
[12:30:10.790] <TB3> INFO: Test took 3740ms.
[12:30:11.079] <TB3> INFO: Expecting 41600 events.
[12:30:14.550] <TB3> INFO: 41600 events read in total (2880ms).
[12:30:14.551] <TB3> INFO: Test took 3737ms.
[12:30:14.840] <TB3> INFO: Expecting 41600 events.
[12:30:18.319] <TB3> INFO: 41600 events read in total (2888ms).
[12:30:18.320] <TB3> INFO: Test took 3745ms.
[12:30:18.609] <TB3> INFO: Expecting 41600 events.
[12:30:22.109] <TB3> INFO: 41600 events read in total (2908ms).
[12:30:22.110] <TB3> INFO: Test took 3766ms.
[12:30:22.399] <TB3> INFO: Expecting 41600 events.
[12:30:25.920] <TB3> INFO: 41600 events read in total (2929ms).
[12:30:25.921] <TB3> INFO: Test took 3787ms.
[12:30:26.213] <TB3> INFO: Expecting 41600 events.
[12:30:29.713] <TB3> INFO: 41600 events read in total (2908ms).
[12:30:29.714] <TB3> INFO: Test took 3767ms.
[12:30:30.007] <TB3> INFO: Expecting 41600 events.
[12:30:33.538] <TB3> INFO: 41600 events read in total (2939ms).
[12:30:33.539] <TB3> INFO: Test took 3798ms.
[12:30:33.852] <TB3> INFO: Expecting 41600 events.
[12:30:37.431] <TB3> INFO: 41600 events read in total (2988ms).
[12:30:37.432] <TB3> INFO: Test took 3869ms.
[12:30:37.727] <TB3> INFO: Expecting 41600 events.
[12:30:41.338] <TB3> INFO: 41600 events read in total (3020ms).
[12:30:41.339] <TB3> INFO: Test took 3878ms.
[12:30:41.633] <TB3> INFO: Expecting 41600 events.
[12:30:45.153] <TB3> INFO: 41600 events read in total (2928ms).
[12:30:45.154] <TB3> INFO: Test took 3786ms.
[12:30:45.446] <TB3> INFO: Expecting 41600 events.
[12:30:48.951] <TB3> INFO: 41600 events read in total (2913ms).
[12:30:48.951] <TB3> INFO: Test took 3770ms.
[12:30:49.241] <TB3> INFO: Expecting 41600 events.
[12:30:52.771] <TB3> INFO: 41600 events read in total (2938ms).
[12:30:52.772] <TB3> INFO: Test took 3796ms.
[12:30:53.100] <TB3> INFO: Expecting 41600 events.
[12:30:56.639] <TB3> INFO: 41600 events read in total (2947ms).
[12:30:56.640] <TB3> INFO: Test took 3839ms.
[12:30:56.932] <TB3> INFO: Expecting 41600 events.
[12:31:00.712] <TB3> INFO: 41600 events read in total (3188ms).
[12:31:00.713] <TB3> INFO: Test took 4046ms.
[12:31:01.005] <TB3> INFO: Expecting 41600 events.
[12:31:04.514] <TB3> INFO: 41600 events read in total (2917ms).
[12:31:04.515] <TB3> INFO: Test took 3775ms.
[12:31:04.805] <TB3> INFO: Expecting 41600 events.
[12:31:08.309] <TB3> INFO: 41600 events read in total (2912ms).
[12:31:08.309] <TB3> INFO: Test took 3769ms.
[12:31:08.599] <TB3> INFO: Expecting 41600 events.
[12:31:12.186] <TB3> INFO: 41600 events read in total (2996ms).
[12:31:12.188] <TB3> INFO: Test took 3854ms.
[12:31:12.477] <TB3> INFO: Expecting 41600 events.
[12:31:16.187] <TB3> INFO: 41600 events read in total (3118ms).
[12:31:16.188] <TB3> INFO: Test took 3976ms.
[12:31:16.477] <TB3> INFO: Expecting 41600 events.
[12:31:20.060] <TB3> INFO: 41600 events read in total (2991ms).
[12:31:20.061] <TB3> INFO: Test took 3849ms.
[12:31:20.354] <TB3> INFO: Expecting 41600 events.
[12:31:23.899] <TB3> INFO: 41600 events read in total (2953ms).
[12:31:23.899] <TB3> INFO: Test took 3809ms.
[12:31:24.189] <TB3> INFO: Expecting 41600 events.
[12:31:27.762] <TB3> INFO: 41600 events read in total (2981ms).
[12:31:27.763] <TB3> INFO: Test took 3839ms.
[12:31:28.053] <TB3> INFO: Expecting 41600 events.
[12:31:31.714] <TB3> INFO: 41600 events read in total (3069ms).
[12:31:31.714] <TB3> INFO: Test took 3926ms.
[12:31:32.004] <TB3> INFO: Expecting 41600 events.
[12:31:35.532] <TB3> INFO: 41600 events read in total (2937ms).
[12:31:35.533] <TB3> INFO: Test took 3795ms.
[12:31:35.825] <TB3> INFO: Expecting 41600 events.
[12:31:39.360] <TB3> INFO: 41600 events read in total (2943ms).
[12:31:39.361] <TB3> INFO: Test took 3802ms.
[12:31:39.655] <TB3> INFO: Expecting 2560 events.
[12:31:40.548] <TB3> INFO: 2560 events read in total (301ms).
[12:31:40.548] <TB3> INFO: Test took 1170ms.
[12:31:40.857] <TB3> INFO: Expecting 2560 events.
[12:31:41.750] <TB3> INFO: 2560 events read in total (301ms).
[12:31:41.751] <TB3> INFO: Test took 1202ms.
[12:31:42.058] <TB3> INFO: Expecting 2560 events.
[12:31:42.944] <TB3> INFO: 2560 events read in total (294ms).
[12:31:42.945] <TB3> INFO: Test took 1194ms.
[12:31:43.251] <TB3> INFO: Expecting 2560 events.
[12:31:44.144] <TB3> INFO: 2560 events read in total (301ms).
[12:31:44.144] <TB3> INFO: Test took 1199ms.
[12:31:44.451] <TB3> INFO: Expecting 2560 events.
[12:31:45.332] <TB3> INFO: 2560 events read in total (289ms).
[12:31:45.332] <TB3> INFO: Test took 1187ms.
[12:31:45.640] <TB3> INFO: Expecting 2560 events.
[12:31:46.526] <TB3> INFO: 2560 events read in total (294ms).
[12:31:46.526] <TB3> INFO: Test took 1193ms.
[12:31:46.835] <TB3> INFO: Expecting 2560 events.
[12:31:47.726] <TB3> INFO: 2560 events read in total (299ms).
[12:31:47.727] <TB3> INFO: Test took 1199ms.
[12:31:48.035] <TB3> INFO: Expecting 2560 events.
[12:31:48.928] <TB3> INFO: 2560 events read in total (302ms).
[12:31:48.928] <TB3> INFO: Test took 1201ms.
[12:31:49.236] <TB3> INFO: Expecting 2560 events.
[12:31:50.119] <TB3> INFO: 2560 events read in total (292ms).
[12:31:50.119] <TB3> INFO: Test took 1190ms.
[12:31:50.428] <TB3> INFO: Expecting 2560 events.
[12:31:51.308] <TB3> INFO: 2560 events read in total (288ms).
[12:31:51.309] <TB3> INFO: Test took 1189ms.
[12:31:51.617] <TB3> INFO: Expecting 2560 events.
[12:31:52.504] <TB3> INFO: 2560 events read in total (296ms).
[12:31:52.504] <TB3> INFO: Test took 1195ms.
[12:31:52.812] <TB3> INFO: Expecting 2560 events.
[12:31:53.693] <TB3> INFO: 2560 events read in total (290ms).
[12:31:53.693] <TB3> INFO: Test took 1188ms.
[12:31:53.999] <TB3> INFO: Expecting 2560 events.
[12:31:54.892] <TB3> INFO: 2560 events read in total (301ms).
[12:31:54.892] <TB3> INFO: Test took 1198ms.
[12:31:55.200] <TB3> INFO: Expecting 2560 events.
[12:31:56.093] <TB3> INFO: 2560 events read in total (301ms).
[12:31:56.093] <TB3> INFO: Test took 1201ms.
[12:31:56.401] <TB3> INFO: Expecting 2560 events.
[12:31:57.292] <TB3> INFO: 2560 events read in total (300ms).
[12:31:57.293] <TB3> INFO: Test took 1199ms.
[12:31:57.599] <TB3> INFO: Expecting 2560 events.
[12:31:58.484] <TB3> INFO: 2560 events read in total (293ms).
[12:31:58.485] <TB3> INFO: Test took 1191ms.
[12:31:58.488] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:58.792] <TB3> INFO: Expecting 655360 events.
[12:32:13.520] <TB3> INFO: 655360 events read in total (14136ms).
[12:32:13.538] <TB3> INFO: Expecting 655360 events.
[12:32:28.335] <TB3> INFO: 655360 events read in total (14394ms).
[12:32:28.355] <TB3> INFO: Expecting 655360 events.
[12:32:42.917] <TB3> INFO: 655360 events read in total (14159ms).
[12:32:42.945] <TB3> INFO: Expecting 655360 events.
[12:32:57.374] <TB3> INFO: 655360 events read in total (14026ms).
[12:32:57.402] <TB3> INFO: Expecting 655360 events.
[12:33:11.850] <TB3> INFO: 655360 events read in total (14045ms).
[12:33:11.883] <TB3> INFO: Expecting 655360 events.
[12:33:26.510] <TB3> INFO: 655360 events read in total (14223ms).
[12:33:26.557] <TB3> INFO: Expecting 655360 events.
[12:33:41.127] <TB3> INFO: 655360 events read in total (14167ms).
[12:33:41.169] <TB3> INFO: Expecting 655360 events.
[12:33:55.796] <TB3> INFO: 655360 events read in total (14224ms).
[12:33:55.842] <TB3> INFO: Expecting 655360 events.
[12:34:10.625] <TB3> INFO: 655360 events read in total (14380ms).
[12:34:10.675] <TB3> INFO: Expecting 655360 events.
[12:34:25.125] <TB3> INFO: 655360 events read in total (14047ms).
[12:34:25.188] <TB3> INFO: Expecting 655360 events.
[12:34:39.595] <TB3> INFO: 655360 events read in total (14004ms).
[12:34:39.685] <TB3> INFO: Expecting 655360 events.
[12:34:54.211] <TB3> INFO: 655360 events read in total (14123ms).
[12:34:54.296] <TB3> INFO: Expecting 655360 events.
[12:35:08.891] <TB3> INFO: 655360 events read in total (14191ms).
[12:35:08.969] <TB3> INFO: Expecting 655360 events.
[12:35:23.545] <TB3> INFO: 655360 events read in total (14173ms).
[12:35:23.625] <TB3> INFO: Expecting 655360 events.
[12:35:38.175] <TB3> INFO: 655360 events read in total (14146ms).
[12:35:38.297] <TB3> INFO: Expecting 655360 events.
[12:35:52.708] <TB3> INFO: 655360 events read in total (14008ms).
[12:35:52.799] <TB3> INFO: Test took 234311ms.
[12:35:52.891] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:35:53.151] <TB3> INFO: Expecting 655360 events.
[12:36:07.729] <TB3> INFO: 655360 events read in total (13986ms).
[12:36:07.744] <TB3> INFO: Expecting 655360 events.
[12:36:21.859] <TB3> INFO: 655360 events read in total (13712ms).
[12:36:21.878] <TB3> INFO: Expecting 655360 events.
[12:36:36.323] <TB3> INFO: 655360 events read in total (14042ms).
[12:36:36.348] <TB3> INFO: Expecting 655360 events.
[12:36:50.715] <TB3> INFO: 655360 events read in total (13964ms).
[12:36:50.750] <TB3> INFO: Expecting 655360 events.
[12:37:05.147] <TB3> INFO: 655360 events read in total (13994ms).
[12:37:05.189] <TB3> INFO: Expecting 655360 events.
[12:37:19.387] <TB3> INFO: 655360 events read in total (13795ms).
[12:37:19.423] <TB3> INFO: Expecting 655360 events.
[12:37:33.864] <TB3> INFO: 655360 events read in total (14038ms).
[12:37:33.905] <TB3> INFO: Expecting 655360 events.
[12:37:48.330] <TB3> INFO: 655360 events read in total (14022ms).
[12:37:48.376] <TB3> INFO: Expecting 655360 events.
[12:38:02.706] <TB3> INFO: 655360 events read in total (13927ms).
[12:38:02.755] <TB3> INFO: Expecting 655360 events.
[12:38:17.129] <TB3> INFO: 655360 events read in total (13971ms).
[12:38:17.195] <TB3> INFO: Expecting 655360 events.
[12:38:31.480] <TB3> INFO: 655360 events read in total (13882ms).
[12:38:31.550] <TB3> INFO: Expecting 655360 events.
[12:38:45.906] <TB3> INFO: 655360 events read in total (13953ms).
[12:38:45.983] <TB3> INFO: Expecting 655360 events.
[12:39:00.213] <TB3> INFO: 655360 events read in total (13827ms).
[12:39:00.297] <TB3> INFO: Expecting 655360 events.
[12:39:14.699] <TB3> INFO: 655360 events read in total (13999ms).
[12:39:14.784] <TB3> INFO: Expecting 655360 events.
[12:39:29.406] <TB3> INFO: 655360 events read in total (14219ms).
[12:39:29.498] <TB3> INFO: Expecting 655360 events.
[12:39:44.146] <TB3> INFO: 655360 events read in total (14245ms).
[12:39:44.315] <TB3> INFO: Test took 231424ms.
[12:39:44.480] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:39:44.486] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:39:44.492] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:39:44.498] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:39:44.503] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:39:44.509] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[12:39:44.515] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:39:44.520] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:39:44.526] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:39:44.532] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:39:44.538] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:39:44.544] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:39:44.549] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[12:39:44.555] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:39:44.561] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:39:44.566] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:39:44.572] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:39:44.578] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:39:44.583] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:39:44.589] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:39:44.595] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:39:44.600] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:39:44.606] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:39:44.613] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:39:44.619] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:39:44.662] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C0.dat
[12:39:44.662] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C1.dat
[12:39:44.662] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C2.dat
[12:39:44.662] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C3.dat
[12:39:44.662] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C4.dat
[12:39:44.662] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C5.dat
[12:39:44.663] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C6.dat
[12:39:44.663] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C7.dat
[12:39:44.663] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C8.dat
[12:39:44.663] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C9.dat
[12:39:44.663] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C10.dat
[12:39:44.663] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C11.dat
[12:39:44.664] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C12.dat
[12:39:44.664] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C13.dat
[12:39:44.664] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C14.dat
[12:39:44.664] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//dacParameters35_C15.dat
[12:39:44.911] <TB3> INFO: Expecting 41600 events.
[12:39:48.083] <TB3> INFO: 41600 events read in total (2580ms).
[12:39:48.084] <TB3> INFO: Test took 3415ms.
[12:39:48.580] <TB3> INFO: Expecting 41600 events.
[12:39:51.687] <TB3> INFO: 41600 events read in total (2515ms).
[12:39:51.688] <TB3> INFO: Test took 3391ms.
[12:39:52.148] <TB3> INFO: Expecting 41600 events.
[12:39:55.339] <TB3> INFO: 41600 events read in total (2599ms).
[12:39:55.340] <TB3> INFO: Test took 3436ms.
[12:39:55.559] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:55.649] <TB3> INFO: Expecting 2560 events.
[12:39:56.548] <TB3> INFO: 2560 events read in total (307ms).
[12:39:56.548] <TB3> INFO: Test took 989ms.
[12:39:56.551] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:56.856] <TB3> INFO: Expecting 2560 events.
[12:39:57.746] <TB3> INFO: 2560 events read in total (298ms).
[12:39:57.746] <TB3> INFO: Test took 1195ms.
[12:39:57.750] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:58.055] <TB3> INFO: Expecting 2560 events.
[12:39:58.952] <TB3> INFO: 2560 events read in total (305ms).
[12:39:58.953] <TB3> INFO: Test took 1203ms.
[12:39:58.956] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:59.261] <TB3> INFO: Expecting 2560 events.
[12:40:00.157] <TB3> INFO: 2560 events read in total (305ms).
[12:40:00.158] <TB3> INFO: Test took 1202ms.
[12:40:00.163] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:00.466] <TB3> INFO: Expecting 2560 events.
[12:40:01.360] <TB3> INFO: 2560 events read in total (303ms).
[12:40:01.361] <TB3> INFO: Test took 1198ms.
[12:40:01.364] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:01.669] <TB3> INFO: Expecting 2560 events.
[12:40:02.563] <TB3> INFO: 2560 events read in total (302ms).
[12:40:02.563] <TB3> INFO: Test took 1199ms.
[12:40:02.567] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:02.871] <TB3> INFO: Expecting 2560 events.
[12:40:03.762] <TB3> INFO: 2560 events read in total (300ms).
[12:40:03.763] <TB3> INFO: Test took 1197ms.
[12:40:03.765] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:04.070] <TB3> INFO: Expecting 2560 events.
[12:40:04.964] <TB3> INFO: 2560 events read in total (302ms).
[12:40:04.964] <TB3> INFO: Test took 1199ms.
[12:40:04.967] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:05.272] <TB3> INFO: Expecting 2560 events.
[12:40:06.159] <TB3> INFO: 2560 events read in total (295ms).
[12:40:06.159] <TB3> INFO: Test took 1192ms.
[12:40:06.161] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:06.467] <TB3> INFO: Expecting 2560 events.
[12:40:07.357] <TB3> INFO: 2560 events read in total (298ms).
[12:40:07.358] <TB3> INFO: Test took 1197ms.
[12:40:07.360] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:07.665] <TB3> INFO: Expecting 2560 events.
[12:40:08.551] <TB3> INFO: 2560 events read in total (294ms).
[12:40:08.552] <TB3> INFO: Test took 1192ms.
[12:40:08.555] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:08.860] <TB3> INFO: Expecting 2560 events.
[12:40:09.746] <TB3> INFO: 2560 events read in total (294ms).
[12:40:09.747] <TB3> INFO: Test took 1192ms.
[12:40:09.749] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:10.056] <TB3> INFO: Expecting 2560 events.
[12:40:10.942] <TB3> INFO: 2560 events read in total (294ms).
[12:40:10.943] <TB3> INFO: Test took 1194ms.
[12:40:10.946] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:11.250] <TB3> INFO: Expecting 2560 events.
[12:40:12.136] <TB3> INFO: 2560 events read in total (295ms).
[12:40:12.137] <TB3> INFO: Test took 1191ms.
[12:40:12.140] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:12.445] <TB3> INFO: Expecting 2560 events.
[12:40:13.335] <TB3> INFO: 2560 events read in total (298ms).
[12:40:13.335] <TB3> INFO: Test took 1196ms.
[12:40:13.339] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:13.644] <TB3> INFO: Expecting 2560 events.
[12:40:14.535] <TB3> INFO: 2560 events read in total (299ms).
[12:40:14.536] <TB3> INFO: Test took 1197ms.
[12:40:14.540] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:14.844] <TB3> INFO: Expecting 2560 events.
[12:40:15.734] <TB3> INFO: 2560 events read in total (299ms).
[12:40:15.734] <TB3> INFO: Test took 1194ms.
[12:40:15.738] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:16.043] <TB3> INFO: Expecting 2560 events.
[12:40:16.935] <TB3> INFO: 2560 events read in total (301ms).
[12:40:16.935] <TB3> INFO: Test took 1197ms.
[12:40:16.940] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:17.244] <TB3> INFO: Expecting 2560 events.
[12:40:18.134] <TB3> INFO: 2560 events read in total (298ms).
[12:40:18.134] <TB3> INFO: Test took 1194ms.
[12:40:18.136] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:18.443] <TB3> INFO: Expecting 2560 events.
[12:40:19.324] <TB3> INFO: 2560 events read in total (290ms).
[12:40:19.324] <TB3> INFO: Test took 1188ms.
[12:40:19.328] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:19.632] <TB3> INFO: Expecting 2560 events.
[12:40:20.513] <TB3> INFO: 2560 events read in total (289ms).
[12:40:20.513] <TB3> INFO: Test took 1186ms.
[12:40:20.517] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:20.821] <TB3> INFO: Expecting 2560 events.
[12:40:21.702] <TB3> INFO: 2560 events read in total (289ms).
[12:40:21.703] <TB3> INFO: Test took 1186ms.
[12:40:21.707] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:22.011] <TB3> INFO: Expecting 2560 events.
[12:40:22.896] <TB3> INFO: 2560 events read in total (293ms).
[12:40:22.896] <TB3> INFO: Test took 1190ms.
[12:40:22.900] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:23.205] <TB3> INFO: Expecting 2560 events.
[12:40:24.087] <TB3> INFO: 2560 events read in total (290ms).
[12:40:24.087] <TB3> INFO: Test took 1187ms.
[12:40:24.092] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:24.395] <TB3> INFO: Expecting 2560 events.
[12:40:25.282] <TB3> INFO: 2560 events read in total (295ms).
[12:40:25.284] <TB3> INFO: Test took 1193ms.
[12:40:25.288] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:25.591] <TB3> INFO: Expecting 2560 events.
[12:40:26.485] <TB3> INFO: 2560 events read in total (302ms).
[12:40:26.486] <TB3> INFO: Test took 1199ms.
[12:40:26.490] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:26.792] <TB3> INFO: Expecting 2560 events.
[12:40:27.681] <TB3> INFO: 2560 events read in total (297ms).
[12:40:27.682] <TB3> INFO: Test took 1192ms.
[12:40:27.685] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:27.990] <TB3> INFO: Expecting 2560 events.
[12:40:28.882] <TB3> INFO: 2560 events read in total (300ms).
[12:40:28.882] <TB3> INFO: Test took 1197ms.
[12:40:28.887] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:29.190] <TB3> INFO: Expecting 2560 events.
[12:40:30.082] <TB3> INFO: 2560 events read in total (300ms).
[12:40:30.082] <TB3> INFO: Test took 1197ms.
[12:40:30.085] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:30.392] <TB3> INFO: Expecting 2560 events.
[12:40:31.276] <TB3> INFO: 2560 events read in total (292ms).
[12:40:31.277] <TB3> INFO: Test took 1192ms.
[12:40:31.280] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:31.586] <TB3> INFO: Expecting 2560 events.
[12:40:32.483] <TB3> INFO: 2560 events read in total (305ms).
[12:40:32.483] <TB3> INFO: Test took 1203ms.
[12:40:32.487] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:40:32.792] <TB3> INFO: Expecting 2560 events.
[12:40:33.687] <TB3> INFO: 2560 events read in total (303ms).
[12:40:33.687] <TB3> INFO: Test took 1200ms.
[12:40:34.161] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 653 seconds
[12:40:34.161] <TB3> INFO: PH scale (per ROC): 47 62 48 45 60 43 39 52 54 51 58 52 69 46 48 45
[12:40:34.161] <TB3> INFO: PH offset (per ROC): 100 114 134 113 129 92 110 121 132 97 118 130 133 102 108 99
[12:40:34.171] <TB3> INFO: Decoding statistics:
[12:40:34.171] <TB3> INFO: General information:
[12:40:34.171] <TB3> INFO: 16bit words read: 127886
[12:40:34.171] <TB3> INFO: valid events total: 20480
[12:40:34.171] <TB3> INFO: empty events: 17977
[12:40:34.171] <TB3> INFO: valid events with pixels: 2503
[12:40:34.171] <TB3> INFO: valid pixel hits: 2503
[12:40:34.171] <TB3> INFO: Event errors: 0
[12:40:34.171] <TB3> INFO: start marker: 0
[12:40:34.171] <TB3> INFO: stop marker: 0
[12:40:34.171] <TB3> INFO: overflow: 0
[12:40:34.171] <TB3> INFO: invalid 5bit words: 0
[12:40:34.171] <TB3> INFO: invalid XOR eye diagram: 0
[12:40:34.171] <TB3> INFO: frame (failed synchr.): 0
[12:40:34.171] <TB3> INFO: idle data (no TBM trl): 0
[12:40:34.171] <TB3> INFO: no data (only TBM hdr): 0
[12:40:34.171] <TB3> INFO: TBM errors: 0
[12:40:34.171] <TB3> INFO: flawed TBM headers: 0
[12:40:34.171] <TB3> INFO: flawed TBM trailers: 0
[12:40:34.171] <TB3> INFO: event ID mismatches: 0
[12:40:34.171] <TB3> INFO: ROC errors: 0
[12:40:34.171] <TB3> INFO: missing ROC header(s): 0
[12:40:34.172] <TB3> INFO: misplaced readback start: 0
[12:40:34.172] <TB3> INFO: Pixel decoding errors: 0
[12:40:34.172] <TB3> INFO: pixel data incomplete: 0
[12:40:34.172] <TB3> INFO: pixel address: 0
[12:40:34.172] <TB3> INFO: pulse height fill bit: 0
[12:40:34.172] <TB3> INFO: buffer corruption: 0
[12:40:34.361] <TB3> INFO: ######################################################################
[12:40:34.361] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[12:40:34.361] <TB3> INFO: ######################################################################
[12:40:34.377] <TB3> INFO: scanning low vcal = 10
[12:40:34.613] <TB3> INFO: Expecting 41600 events.
[12:40:38.221] <TB3> INFO: 41600 events read in total (3016ms).
[12:40:38.222] <TB3> INFO: Test took 3845ms.
[12:40:38.224] <TB3> INFO: scanning low vcal = 20
[12:40:38.522] <TB3> INFO: Expecting 41600 events.
[12:40:42.124] <TB3> INFO: 41600 events read in total (3010ms).
[12:40:42.124] <TB3> INFO: Test took 3900ms.
[12:40:42.126] <TB3> INFO: scanning low vcal = 30
[12:40:42.419] <TB3> INFO: Expecting 41600 events.
[12:40:46.179] <TB3> INFO: 41600 events read in total (3168ms).
[12:40:46.180] <TB3> INFO: Test took 4054ms.
[12:40:46.182] <TB3> INFO: scanning low vcal = 40
[12:40:46.460] <TB3> INFO: Expecting 41600 events.
[12:40:50.437] <TB3> INFO: 41600 events read in total (3385ms).
[12:40:50.438] <TB3> INFO: Test took 4256ms.
[12:40:50.441] <TB3> INFO: scanning low vcal = 50
[12:40:50.718] <TB3> INFO: Expecting 41600 events.
[12:40:54.729] <TB3> INFO: 41600 events read in total (3419ms).
[12:40:54.730] <TB3> INFO: Test took 4289ms.
[12:40:54.733] <TB3> INFO: scanning low vcal = 60
[12:40:55.010] <TB3> INFO: Expecting 41600 events.
[12:40:59.052] <TB3> INFO: 41600 events read in total (3451ms).
[12:40:59.053] <TB3> INFO: Test took 4320ms.
[12:40:59.056] <TB3> INFO: scanning low vcal = 70
[12:40:59.334] <TB3> INFO: Expecting 41600 events.
[12:41:03.358] <TB3> INFO: 41600 events read in total (3432ms).
[12:41:03.359] <TB3> INFO: Test took 4303ms.
[12:41:03.362] <TB3> INFO: scanning low vcal = 80
[12:41:03.639] <TB3> INFO: Expecting 41600 events.
[12:41:07.627] <TB3> INFO: 41600 events read in total (3397ms).
[12:41:07.628] <TB3> INFO: Test took 4266ms.
[12:41:07.631] <TB3> INFO: scanning low vcal = 90
[12:41:07.908] <TB3> INFO: Expecting 41600 events.
[12:41:11.907] <TB3> INFO: 41600 events read in total (3407ms).
[12:41:11.908] <TB3> INFO: Test took 4277ms.
[12:41:11.912] <TB3> INFO: scanning low vcal = 100
[12:41:12.188] <TB3> INFO: Expecting 41600 events.
[12:41:16.259] <TB3> INFO: 41600 events read in total (3479ms).
[12:41:16.260] <TB3> INFO: Test took 4348ms.
[12:41:16.263] <TB3> INFO: scanning low vcal = 110
[12:41:16.541] <TB3> INFO: Expecting 41600 events.
[12:41:20.534] <TB3> INFO: 41600 events read in total (3402ms).
[12:41:20.534] <TB3> INFO: Test took 4271ms.
[12:41:20.537] <TB3> INFO: scanning low vcal = 120
[12:41:20.815] <TB3> INFO: Expecting 41600 events.
[12:41:24.812] <TB3> INFO: 41600 events read in total (3405ms).
[12:41:24.812] <TB3> INFO: Test took 4275ms.
[12:41:24.815] <TB3> INFO: scanning low vcal = 130
[12:41:25.093] <TB3> INFO: Expecting 41600 events.
[12:41:29.090] <TB3> INFO: 41600 events read in total (3405ms).
[12:41:29.090] <TB3> INFO: Test took 4276ms.
[12:41:29.094] <TB3> INFO: scanning low vcal = 140
[12:41:29.372] <TB3> INFO: Expecting 41600 events.
[12:41:33.362] <TB3> INFO: 41600 events read in total (3399ms).
[12:41:33.364] <TB3> INFO: Test took 4270ms.
[12:41:33.368] <TB3> INFO: scanning low vcal = 150
[12:41:33.644] <TB3> INFO: Expecting 41600 events.
[12:41:37.639] <TB3> INFO: 41600 events read in total (3403ms).
[12:41:37.640] <TB3> INFO: Test took 4272ms.
[12:41:37.643] <TB3> INFO: scanning low vcal = 160
[12:41:37.920] <TB3> INFO: Expecting 41600 events.
[12:41:41.954] <TB3> INFO: 41600 events read in total (3442ms).
[12:41:41.955] <TB3> INFO: Test took 4312ms.
[12:41:41.958] <TB3> INFO: scanning low vcal = 170
[12:41:42.236] <TB3> INFO: Expecting 41600 events.
[12:41:46.287] <TB3> INFO: 41600 events read in total (3459ms).
[12:41:46.288] <TB3> INFO: Test took 4330ms.
[12:41:46.294] <TB3> INFO: scanning low vcal = 180
[12:41:46.577] <TB3> INFO: Expecting 41600 events.
[12:41:50.629] <TB3> INFO: 41600 events read in total (3460ms).
[12:41:50.629] <TB3> INFO: Test took 4335ms.
[12:41:50.632] <TB3> INFO: scanning low vcal = 190
[12:41:50.910] <TB3> INFO: Expecting 41600 events.
[12:41:54.951] <TB3> INFO: 41600 events read in total (3450ms).
[12:41:54.952] <TB3> INFO: Test took 4320ms.
[12:41:54.955] <TB3> INFO: scanning low vcal = 200
[12:41:55.232] <TB3> INFO: Expecting 41600 events.
[12:41:59.327] <TB3> INFO: 41600 events read in total (3503ms).
[12:41:59.328] <TB3> INFO: Test took 4373ms.
[12:41:59.331] <TB3> INFO: scanning low vcal = 210
[12:41:59.609] <TB3> INFO: Expecting 41600 events.
[12:42:03.683] <TB3> INFO: 41600 events read in total (3483ms).
[12:42:03.684] <TB3> INFO: Test took 4353ms.
[12:42:03.687] <TB3> INFO: scanning low vcal = 220
[12:42:03.965] <TB3> INFO: Expecting 41600 events.
[12:42:08.022] <TB3> INFO: 41600 events read in total (3466ms).
[12:42:08.022] <TB3> INFO: Test took 4335ms.
[12:42:08.025] <TB3> INFO: scanning low vcal = 230
[12:42:08.303] <TB3> INFO: Expecting 41600 events.
[12:42:12.334] <TB3> INFO: 41600 events read in total (3440ms).
[12:42:12.335] <TB3> INFO: Test took 4310ms.
[12:42:12.338] <TB3> INFO: scanning low vcal = 240
[12:42:12.615] <TB3> INFO: Expecting 41600 events.
[12:42:16.597] <TB3> INFO: 41600 events read in total (3390ms).
[12:42:16.598] <TB3> INFO: Test took 4260ms.
[12:42:16.601] <TB3> INFO: scanning low vcal = 250
[12:42:16.878] <TB3> INFO: Expecting 41600 events.
[12:42:20.833] <TB3> INFO: 41600 events read in total (3364ms).
[12:42:20.834] <TB3> INFO: Test took 4233ms.
[12:42:20.838] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[12:42:21.114] <TB3> INFO: Expecting 41600 events.
[12:42:25.071] <TB3> INFO: 41600 events read in total (3365ms).
[12:42:25.072] <TB3> INFO: Test took 4234ms.
[12:42:25.076] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[12:42:25.354] <TB3> INFO: Expecting 41600 events.
[12:42:29.296] <TB3> INFO: 41600 events read in total (3350ms).
[12:42:29.297] <TB3> INFO: Test took 4221ms.
[12:42:29.300] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[12:42:29.576] <TB3> INFO: Expecting 41600 events.
[12:42:33.507] <TB3> INFO: 41600 events read in total (3339ms).
[12:42:33.507] <TB3> INFO: Test took 4207ms.
[12:42:33.511] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[12:42:33.841] <TB3> INFO: Expecting 41600 events.
[12:42:37.768] <TB3> INFO: 41600 events read in total (3335ms).
[12:42:37.769] <TB3> INFO: Test took 4258ms.
[12:42:37.772] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:42:38.058] <TB3> INFO: Expecting 41600 events.
[12:42:42.007] <TB3> INFO: 41600 events read in total (3358ms).
[12:42:42.008] <TB3> INFO: Test took 4235ms.
[12:42:42.471] <TB3> INFO: PixTestGainPedestal::measure() done
[12:43:18.521] <TB3> INFO: PixTestGainPedestal::fit() done
[12:43:18.521] <TB3> INFO: non-linearity mean: 0.926 0.983 0.978 0.928 0.985 1.003 0.930 0.981 0.985 0.968 0.981 0.981 0.986 0.923 0.929 0.831
[12:43:18.521] <TB3> INFO: non-linearity RMS: 0.101 0.004 0.003 0.117 0.003 0.163 0.124 0.003 0.003 0.020 0.002 0.004 0.003 0.130 0.063 0.136
[12:43:18.521] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[12:43:18.534] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[12:43:18.547] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[12:43:18.561] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[12:43:18.574] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[12:43:18.588] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[12:43:18.602] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[12:43:18.615] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[12:43:18.628] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[12:43:18.642] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[12:43:18.655] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[12:43:18.669] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[12:43:18.683] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[12:43:18.696] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[12:43:18.709] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[12:43:18.723] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1008_FullQualification_2016-10-16_10h29m_1476606561//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[12:43:18.737] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 164 seconds
[12:43:18.737] <TB3> INFO: Decoding statistics:
[12:43:18.737] <TB3> INFO: General information:
[12:43:18.737] <TB3> INFO: 16bit words read: 3327910
[12:43:18.737] <TB3> INFO: valid events total: 332800
[12:43:18.737] <TB3> INFO: empty events: 0
[12:43:18.737] <TB3> INFO: valid events with pixels: 332800
[12:43:18.737] <TB3> INFO: valid pixel hits: 665555
[12:43:18.737] <TB3> INFO: Event errors: 0
[12:43:18.737] <TB3> INFO: start marker: 0
[12:43:18.737] <TB3> INFO: stop marker: 0
[12:43:18.737] <TB3> INFO: overflow: 0
[12:43:18.737] <TB3> INFO: invalid 5bit words: 0
[12:43:18.737] <TB3> INFO: invalid XOR eye diagram: 0
[12:43:18.737] <TB3> INFO: frame (failed synchr.): 0
[12:43:18.737] <TB3> INFO: idle data (no TBM trl): 0
[12:43:18.737] <TB3> INFO: no data (only TBM hdr): 0
[12:43:18.737] <TB3> INFO: TBM errors: 0
[12:43:18.737] <TB3> INFO: flawed TBM headers: 0
[12:43:18.737] <TB3> INFO: flawed TBM trailers: 0
[12:43:18.737] <TB3> INFO: event ID mismatches: 0
[12:43:18.737] <TB3> INFO: ROC errors: 0
[12:43:18.737] <TB3> INFO: missing ROC header(s): 0
[12:43:18.737] <TB3> INFO: misplaced readback start: 0
[12:43:18.737] <TB3> INFO: Pixel decoding errors: 0
[12:43:18.737] <TB3> INFO: pixel data incomplete: 0
[12:43:18.737] <TB3> INFO: pixel address: 0
[12:43:18.737] <TB3> INFO: pulse height fill bit: 0
[12:43:18.737] <TB3> INFO: buffer corruption: 0
[12:43:18.755] <TB3> INFO: Decoding statistics:
[12:43:18.755] <TB3> INFO: General information:
[12:43:18.755] <TB3> INFO: 16bit words read: 3457332
[12:43:18.755] <TB3> INFO: valid events total: 353536
[12:43:18.755] <TB3> INFO: empty events: 18233
[12:43:18.755] <TB3> INFO: valid events with pixels: 335303
[12:43:18.755] <TB3> INFO: valid pixel hits: 668058
[12:43:18.755] <TB3> INFO: Event errors: 0
[12:43:18.755] <TB3> INFO: start marker: 0
[12:43:18.755] <TB3> INFO: stop marker: 0
[12:43:18.755] <TB3> INFO: overflow: 0
[12:43:18.755] <TB3> INFO: invalid 5bit words: 0
[12:43:18.755] <TB3> INFO: invalid XOR eye diagram: 0
[12:43:18.755] <TB3> INFO: frame (failed synchr.): 0
[12:43:18.755] <TB3> INFO: idle data (no TBM trl): 0
[12:43:18.755] <TB3> INFO: no data (only TBM hdr): 0
[12:43:18.755] <TB3> INFO: TBM errors: 0
[12:43:18.755] <TB3> INFO: flawed TBM headers: 0
[12:43:18.755] <TB3> INFO: flawed TBM trailers: 0
[12:43:18.755] <TB3> INFO: event ID mismatches: 0
[12:43:18.755] <TB3> INFO: ROC errors: 0
[12:43:18.755] <TB3> INFO: missing ROC header(s): 0
[12:43:18.755] <TB3> INFO: misplaced readback start: 0
[12:43:18.755] <TB3> INFO: Pixel decoding errors: 0
[12:43:18.755] <TB3> INFO: pixel data incomplete: 0
[12:43:18.755] <TB3> INFO: pixel address: 0
[12:43:18.755] <TB3> INFO: pulse height fill bit: 0
[12:43:18.755] <TB3> INFO: buffer corruption: 0
[12:43:18.755] <TB3> INFO: enter test to run
[12:43:18.755] <TB3> INFO: test: exit no parameter change
[12:43:18.898] <TB3> QUIET: Connection to board 126 closed.
[12:43:18.900] <TB3> INFO: pXar: this is the end, my friend