[10:10:24.773] <TB1> INFO: *** Welcome to pxar ***
[10:10:24.773] <TB1> INFO: *** Today: 2016/11/14
[10:10:24.782] <TB1> INFO: *** Version: c8ba-dirty
[10:10:24.782] <TB1> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters_C15.dat
[10:10:24.783] <TB1> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//tbmParameters_C1b.dat
[10:10:24.783] <TB1> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//defaultMaskFile.dat
[10:10:24.783] <TB1> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//trimParameters_C15.dat
[10:10:24.847] <TB1> INFO: clk: 4
[10:10:24.847] <TB1> INFO: ctr: 4
[10:10:24.847] <TB1> INFO: sda: 19
[10:10:24.847] <TB1> INFO: tin: 9
[10:10:24.847] <TB1> INFO: level: 15
[10:10:24.847] <TB1> INFO: triggerdelay: 0
[10:10:24.847] <TB1> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[10:10:24.847] <TB1> INFO: Log level: INFO
[10:10:24.856] <TB1> INFO: Found DTB DTB_WXC03A
[10:10:24.879] <TB1> QUIET: Connection to board DTB_WXC03A opened.
[10:10:24.881] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 154
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC03A
MAC address: 40D85511809A
Hostname: pixelDTB154
Comment:
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[10:10:24.883] <TB1> INFO: RPC call hashes of host and DTB match: 486171790
[10:10:26.444] <TB1> INFO: DUT info:
[10:10:26.444] <TB1> INFO: The DUT currently contains the following objects:
[10:10:26.444] <TB1> INFO: 4 TBM Cores tbm10c (4 ON)
[10:10:26.444] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:10:26.444] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:10:26.444] <TB1> INFO: TBM Core alpha (2): 7 registers set
[10:10:26.444] <TB1> INFO: TBM Core beta (3): 7 registers set
[10:10:26.444] <TB1> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[10:10:26.444] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[10:10:26.444] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[10:10:26.444] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[10:10:26.444] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[10:10:26.444] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[10:10:26.444] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[10:10:26.444] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[10:10:26.444] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[10:10:26.444] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[10:10:26.444] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[10:10:26.444] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[10:10:26.444] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[10:10:26.444] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[10:10:26.444] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[10:10:26.444] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[10:10:26.445] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[10:10:26.845] <TB1> INFO: enter 'restricted' command line mode
[10:10:26.845] <TB1> INFO: enter test to run
[10:10:26.845] <TB1> INFO: test: pretest no parameter change
[10:10:26.845] <TB1> INFO: running: pretest
[10:10:26.850] <TB1> INFO: ######################################################################
[10:10:26.850] <TB1> INFO: PixTestPretest::doTest()
[10:10:26.850] <TB1> INFO: ######################################################################
[10:10:26.851] <TB1> INFO: ----------------------------------------------------------------------
[10:10:26.851] <TB1> INFO: PixTestPretest::programROC()
[10:10:26.851] <TB1> INFO: ----------------------------------------------------------------------
[10:10:44.865] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[10:10:44.865] <TB1> INFO: IA differences per ROC: 16.9 20.1 18.5 16.9 17.7 16.9 19.3 20.1 20.9 20.1 21.7 17.7 20.1 20.1 16.9 20.1
[10:10:44.931] <TB1> INFO: ----------------------------------------------------------------------
[10:10:44.931] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[10:10:44.931] <TB1> INFO: ----------------------------------------------------------------------
[10:11:06.231] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 385.1 mA = 24.0688 mA/ROC
[10:11:06.231] <TB1> INFO: i(loss) [mA/ROC]: 20.9 20.1 19.3 20.1 19.3 20.1 19.3 19.3 19.3 20.1 18.5 19.3 20.1 20.1 19.3 20.1
[10:11:06.266] <TB1> INFO: ----------------------------------------------------------------------
[10:11:06.266] <TB1> INFO: PixTestPretest::findTiming()
[10:11:06.266] <TB1> INFO: ----------------------------------------------------------------------
[10:11:06.266] <TB1> INFO: PixTestCmd::init()

[10:11:38.387] <TB1> INFO: TBM phases: 160MHz: 7, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[10:11:38.387] <TB1> INFO: (success/tries = 100/100), width = 3
[10:11:39.891] <TB1> INFO: ----------------------------------------------------------------------
[10:11:39.891] <TB1> INFO: PixTestPretest::findWorkingPixel()
[10:11:39.891] <TB1> INFO: ----------------------------------------------------------------------
[10:11:39.986] <TB1> INFO: Expecting 231680 events.
[10:11:49.822] <TB1> INFO: 231680 events read in total (9244ms).
[10:11:49.832] <TB1> INFO: Test took 9936ms.
[10:11:50.088] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[10:11:50.123] <TB1> INFO: ----------------------------------------------------------------------
[10:11:50.124] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[10:11:50.124] <TB1> INFO: ----------------------------------------------------------------------
[10:11:50.226] <TB1> INFO: Expecting 231680 events.
[10:12:00.031] <TB1> INFO: 231680 events read in total (9213ms).
[10:12:00.039] <TB1> INFO: Test took 9909ms.
[10:12:00.297] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[10:12:00.297] <TB1> INFO: CalDel: 94 111 91 102 94 95 91 111 123 106 101 85 108 120 102 110
[10:12:00.297] <TB1> INFO: VthrComp: 51 53 51 51 51 53 51 51 51 52 51 51 51 56 51 52
[10:12:00.301] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters_C0.dat
[10:12:00.301] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters_C1.dat
[10:12:00.301] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters_C2.dat
[10:12:00.301] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters_C3.dat
[10:12:00.302] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters_C4.dat
[10:12:00.302] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters_C5.dat
[10:12:00.302] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters_C6.dat
[10:12:00.302] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters_C7.dat
[10:12:00.302] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters_C8.dat
[10:12:00.303] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters_C9.dat
[10:12:00.303] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters_C10.dat
[10:12:00.303] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters_C11.dat
[10:12:00.303] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters_C12.dat
[10:12:00.303] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters_C13.dat
[10:12:00.303] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters_C14.dat
[10:12:00.304] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters_C15.dat
[10:12:00.304] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//tbmParameters_C0a.dat
[10:12:00.304] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//tbmParameters_C0b.dat
[10:12:00.304] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//tbmParameters_C1a.dat
[10:12:00.304] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//tbmParameters_C1b.dat
[10:12:00.304] <TB1> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[10:12:00.357] <TB1> INFO: enter test to run
[10:12:00.357] <TB1> INFO: test: FullTest no parameter change
[10:12:00.357] <TB1> INFO: running: fulltest
[10:12:00.357] <TB1> INFO: ######################################################################
[10:12:00.357] <TB1> INFO: PixTestFullTest::doTest()
[10:12:00.357] <TB1> INFO: ######################################################################
[10:12:00.358] <TB1> INFO: ######################################################################
[10:12:00.358] <TB1> INFO: PixTestAlive::doTest()
[10:12:00.358] <TB1> INFO: ######################################################################
[10:12:00.359] <TB1> INFO: ----------------------------------------------------------------------
[10:12:00.359] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:12:00.359] <TB1> INFO: ----------------------------------------------------------------------
[10:12:00.599] <TB1> INFO: Expecting 41600 events.
[10:12:04.227] <TB1> INFO: 41600 events read in total (3036ms).
[10:12:04.227] <TB1> INFO: Test took 3866ms.
[10:12:04.463] <TB1> INFO: PixTestAlive::aliveTest() done
[10:12:04.463] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0
[10:12:04.464] <TB1> INFO: ----------------------------------------------------------------------
[10:12:04.465] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:12:04.465] <TB1> INFO: ----------------------------------------------------------------------
[10:12:04.708] <TB1> INFO: Expecting 41600 events.
[10:12:07.771] <TB1> INFO: 41600 events read in total (2471ms).
[10:12:07.771] <TB1> INFO: Test took 3305ms.
[10:12:07.772] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[10:12:08.015] <TB1> INFO: PixTestAlive::maskTest() done
[10:12:08.015] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:12:08.016] <TB1> INFO: ----------------------------------------------------------------------
[10:12:08.016] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:12:08.016] <TB1> INFO: ----------------------------------------------------------------------
[10:12:08.259] <TB1> INFO: Expecting 41600 events.
[10:12:11.812] <TB1> INFO: 41600 events read in total (2961ms).
[10:12:11.812] <TB1> INFO: Test took 3791ms.
[10:12:12.046] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[10:12:12.046] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:12:12.046] <TB1> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[10:12:12.046] <TB1> INFO: Decoding statistics:
[10:12:12.046] <TB1> INFO: General information:
[10:12:12.046] <TB1> INFO: 16bit words read: 0
[10:12:12.046] <TB1> INFO: valid events total: 0
[10:12:12.047] <TB1> INFO: empty events: 0
[10:12:12.047] <TB1> INFO: valid events with pixels: 0
[10:12:12.047] <TB1> INFO: valid pixel hits: 0
[10:12:12.047] <TB1> INFO: Event errors: 0
[10:12:12.047] <TB1> INFO: start marker: 0
[10:12:12.047] <TB1> INFO: stop marker: 0
[10:12:12.047] <TB1> INFO: overflow: 0
[10:12:12.047] <TB1> INFO: invalid 5bit words: 0
[10:12:12.047] <TB1> INFO: invalid XOR eye diagram: 0
[10:12:12.047] <TB1> INFO: frame (failed synchr.): 0
[10:12:12.047] <TB1> INFO: idle data (no TBM trl): 0
[10:12:12.047] <TB1> INFO: no data (only TBM hdr): 0
[10:12:12.047] <TB1> INFO: TBM errors: 0
[10:12:12.047] <TB1> INFO: flawed TBM headers: 0
[10:12:12.047] <TB1> INFO: flawed TBM trailers: 0
[10:12:12.047] <TB1> INFO: event ID mismatches: 0
[10:12:12.047] <TB1> INFO: ROC errors: 0
[10:12:12.047] <TB1> INFO: missing ROC header(s): 0
[10:12:12.047] <TB1> INFO: misplaced readback start: 0
[10:12:12.047] <TB1> INFO: Pixel decoding errors: 0
[10:12:12.047] <TB1> INFO: pixel data incomplete: 0
[10:12:12.047] <TB1> INFO: pixel address: 0
[10:12:12.047] <TB1> INFO: pulse height fill bit: 0
[10:12:12.047] <TB1> INFO: buffer corruption: 0
[10:12:12.057] <TB1> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C15.dat
[10:12:12.058] <TB1> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//phCalibrationFitErr_C15.dat

[10:12:12.058] <TB1> INFO: ######################################################################
[10:12:12.058] <TB1> INFO: PixTestReadback::doTest()
[10:12:12.058] <TB1> INFO: ######################################################################
[10:12:12.058] <TB1> INFO: ----------------------------------------------------------------------
[10:12:12.058] <TB1> INFO: PixTestReadback::CalibrateVd()
[10:12:12.058] <TB1> INFO: ----------------------------------------------------------------------
[10:12:22.024] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C0.dat
[10:12:22.025] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C1.dat
[10:12:22.025] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C2.dat
[10:12:22.025] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C3.dat
[10:12:22.025] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C4.dat
[10:12:22.025] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C5.dat
[10:12:22.025] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C6.dat
[10:12:22.025] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C7.dat
[10:12:22.025] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C8.dat
[10:12:22.025] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C9.dat
[10:12:22.025] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C10.dat
[10:12:22.025] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C11.dat
[10:12:22.026] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C12.dat
[10:12:22.026] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C13.dat
[10:12:22.026] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C14.dat
[10:12:22.026] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C15.dat
[10:12:22.059] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:12:22.059] <TB1> INFO: ----------------------------------------------------------------------
[10:12:22.060] <TB1> INFO: PixTestReadback::CalibrateVa()
[10:12:22.060] <TB1> INFO: ----------------------------------------------------------------------
[10:12:31.981] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C0.dat
[10:12:31.981] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C1.dat
[10:12:31.981] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C2.dat
[10:12:31.981] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C3.dat
[10:12:31.981] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C4.dat
[10:12:31.981] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C5.dat
[10:12:31.981] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C6.dat
[10:12:31.981] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C7.dat
[10:12:31.981] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C8.dat
[10:12:31.982] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C9.dat
[10:12:31.982] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C10.dat
[10:12:31.982] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C11.dat
[10:12:31.982] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C12.dat
[10:12:31.982] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C13.dat
[10:12:31.982] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C14.dat
[10:12:31.982] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C15.dat
[10:12:32.011] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:12:32.011] <TB1> INFO: ----------------------------------------------------------------------
[10:12:32.012] <TB1> INFO: PixTestReadback::readbackVbg()
[10:12:32.012] <TB1> INFO: ----------------------------------------------------------------------
[10:12:39.687] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:12:39.687] <TB1> INFO: ----------------------------------------------------------------------
[10:12:39.687] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[10:12:39.687] <TB1> INFO: ----------------------------------------------------------------------
[10:12:39.687] <TB1> INFO: Vbg will be calibrated using Vd calibration
[10:12:39.687] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 158.2calibrated Vbg = 1.1806 :::*/*/*/*/
[10:12:39.687] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 162.8calibrated Vbg = 1.17715 :::*/*/*/*/
[10:12:39.687] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 153.6calibrated Vbg = 1.17793 :::*/*/*/*/
[10:12:39.687] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 158.4calibrated Vbg = 1.16977 :::*/*/*/*/
[10:12:39.687] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 156.7calibrated Vbg = 1.17082 :::*/*/*/*/
[10:12:39.687] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 155.3calibrated Vbg = 1.17485 :::*/*/*/*/
[10:12:39.687] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 158.3calibrated Vbg = 1.18266 :::*/*/*/*/
[10:12:39.687] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 150.2calibrated Vbg = 1.1819 :::*/*/*/*/
[10:12:39.687] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 157.3calibrated Vbg = 1.17219 :::*/*/*/*/
[10:12:39.687] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 163.6calibrated Vbg = 1.17366 :::*/*/*/*/
[10:12:39.687] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 162.8calibrated Vbg = 1.16934 :::*/*/*/*/
[10:12:39.687] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 158.9calibrated Vbg = 1.16293 :::*/*/*/*/
[10:12:39.687] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 158.4calibrated Vbg = 1.17767 :::*/*/*/*/
[10:12:39.687] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 159calibrated Vbg = 1.17323 :::*/*/*/*/
[10:12:39.687] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 159.5calibrated Vbg = 1.18279 :::*/*/*/*/
[10:12:39.687] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 159.5calibrated Vbg = 1.17408 :::*/*/*/*/
[10:12:39.689] <TB1> INFO: ----------------------------------------------------------------------
[10:12:39.689] <TB1> INFO: PixTestReadback::CalibrateIa()
[10:12:39.689] <TB1> INFO: ----------------------------------------------------------------------
[10:15:20.545] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C0.dat
[10:15:20.545] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C1.dat
[10:15:20.546] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C2.dat
[10:15:20.546] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C3.dat
[10:15:20.546] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C4.dat
[10:15:20.546] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C5.dat
[10:15:20.546] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C6.dat
[10:15:20.546] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C7.dat
[10:15:20.546] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C8.dat
[10:15:20.546] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C9.dat
[10:15:20.546] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C10.dat
[10:15:20.546] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C11.dat
[10:15:20.546] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C12.dat
[10:15:20.546] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C13.dat
[10:15:20.546] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C14.dat
[10:15:20.546] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//readbackCal_C15.dat
[10:15:20.575] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:15:20.577] <TB1> INFO: PixTestReadback::doTest() done
[10:15:20.577] <TB1> INFO: Decoding statistics:
[10:15:20.577] <TB1> INFO: General information:
[10:15:20.577] <TB1> INFO: 16bit words read: 1536
[10:15:20.577] <TB1> INFO: valid events total: 256
[10:15:20.577] <TB1> INFO: empty events: 256
[10:15:20.577] <TB1> INFO: valid events with pixels: 0
[10:15:20.577] <TB1> INFO: valid pixel hits: 0
[10:15:20.577] <TB1> INFO: Event errors: 0
[10:15:20.578] <TB1> INFO: start marker: 0
[10:15:20.578] <TB1> INFO: stop marker: 0
[10:15:20.578] <TB1> INFO: overflow: 0
[10:15:20.578] <TB1> INFO: invalid 5bit words: 0
[10:15:20.578] <TB1> INFO: invalid XOR eye diagram: 0
[10:15:20.578] <TB1> INFO: frame (failed synchr.): 0
[10:15:20.578] <TB1> INFO: idle data (no TBM trl): 0
[10:15:20.578] <TB1> INFO: no data (only TBM hdr): 0
[10:15:20.578] <TB1> INFO: TBM errors: 0
[10:15:20.578] <TB1> INFO: flawed TBM headers: 0
[10:15:20.578] <TB1> INFO: flawed TBM trailers: 0
[10:15:20.578] <TB1> INFO: event ID mismatches: 0
[10:15:20.578] <TB1> INFO: ROC errors: 0
[10:15:20.578] <TB1> INFO: missing ROC header(s): 0
[10:15:20.578] <TB1> INFO: misplaced readback start: 0
[10:15:20.578] <TB1> INFO: Pixel decoding errors: 0
[10:15:20.578] <TB1> INFO: pixel data incomplete: 0
[10:15:20.578] <TB1> INFO: pixel address: 0
[10:15:20.578] <TB1> INFO: pulse height fill bit: 0
[10:15:20.578] <TB1> INFO: buffer corruption: 0
[10:15:20.630] <TB1> INFO: ######################################################################
[10:15:20.630] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[10:15:20.630] <TB1> INFO: ######################################################################
[10:15:20.632] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[10:15:20.670] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[10:15:20.670] <TB1> INFO: run 1 of 1
[10:15:20.909] <TB1> INFO: Expecting 3120000 events.
[10:15:51.972] <TB1> INFO: 661995 events read in total (30471ms).











[10:16:22.144] <TB1> INFO: 1317540 events read in total (60643ms).
[10:16:52.254] <TB1> INFO: 1970815 events read in total (90753ms).
[10:17:22.168] <TB1> INFO: 2626170 events read in total (120667ms).





















[10:17:44.598] <TB1> INFO: 3120000 events read in total (143097ms).
[10:17:44.684] <TB1> INFO: Test took 144015ms.
[10:18:07.194] <TB1> INFO: PixTestBBMap::doTest() done with 1 decoding errors: , duration: 166 seconds
[10:18:07.194] <TB1> INFO: number of dead bumps (per ROC): 12 7 1 0 1 0 0 0 1 3 0 1 0 0 4 20
[10:18:07.194] <TB1> INFO: separation cut (per ROC): 88 109 109 104 100 106 106 88 108 114 115 111 110 106 107 108
[10:18:07.194] <TB1> INFO: Decoding statistics:
[10:18:07.194] <TB1> INFO: General information:
[10:18:07.194] <TB1> INFO: 16bit words read: 0
[10:18:07.194] <TB1> INFO: valid events total: 0
[10:18:07.194] <TB1> INFO: empty events: 0
[10:18:07.194] <TB1> INFO: valid events with pixels: 0
[10:18:07.194] <TB1> INFO: valid pixel hits: 0
[10:18:07.194] <TB1> INFO: Event errors: 0
[10:18:07.194] <TB1> INFO: start marker: 0
[10:18:07.194] <TB1> INFO: stop marker: 0
[10:18:07.194] <TB1> INFO: overflow: 0
[10:18:07.194] <TB1> INFO: invalid 5bit words: 0
[10:18:07.194] <TB1> INFO: invalid XOR eye diagram: 0
[10:18:07.194] <TB1> INFO: frame (failed synchr.): 0
[10:18:07.194] <TB1> INFO: idle data (no TBM trl): 0
[10:18:07.194] <TB1> INFO: no data (only TBM hdr): 0
[10:18:07.194] <TB1> INFO: TBM errors: 0
[10:18:07.194] <TB1> INFO: flawed TBM headers: 0
[10:18:07.194] <TB1> INFO: flawed TBM trailers: 0
[10:18:07.194] <TB1> INFO: event ID mismatches: 0
[10:18:07.194] <TB1> INFO: ROC errors: 0
[10:18:07.194] <TB1> INFO: missing ROC header(s): 0
[10:18:07.194] <TB1> INFO: misplaced readback start: 0
[10:18:07.194] <TB1> INFO: Pixel decoding errors: 0
[10:18:07.194] <TB1> INFO: pixel data incomplete: 0
[10:18:07.194] <TB1> INFO: pixel address: 0
[10:18:07.194] <TB1> INFO: pulse height fill bit: 0
[10:18:07.194] <TB1> INFO: buffer corruption: 0
[10:18:07.235] <TB1> INFO: ######################################################################
[10:18:07.235] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[10:18:07.235] <TB1> INFO: ######################################################################
[10:18:07.235] <TB1> INFO: ----------------------------------------------------------------------
[10:18:07.235] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[10:18:07.235] <TB1> INFO: ----------------------------------------------------------------------
[10:18:07.235] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[10:18:07.250] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[10:18:07.250] <TB1> INFO: run 1 of 1
[10:18:07.488] <TB1> INFO: Expecting 36608000 events.
[10:18:31.022] <TB1> INFO: 679050 events read in total (22943ms).
[10:18:53.899] <TB1> INFO: 1346450 events read in total (45820ms).
[10:19:16.740] <TB1> INFO: 2013700 events read in total (68661ms).
[10:19:39.260] <TB1> INFO: 2680250 events read in total (91181ms).
[10:20:02.410] <TB1> INFO: 3346150 events read in total (114331ms).
[10:20:25.494] <TB1> INFO: 4011900 events read in total (137415ms).
[10:20:48.487] <TB1> INFO: 4678150 events read in total (160408ms).
[10:21:11.699] <TB1> INFO: 5343450 events read in total (183620ms).
[10:21:34.581] <TB1> INFO: 6008500 events read in total (206502ms).
[10:21:58.115] <TB1> INFO: 6675100 events read in total (230036ms).
[10:22:21.058] <TB1> INFO: 7339450 events read in total (252979ms).
[10:22:43.754] <TB1> INFO: 8004900 events read in total (275675ms).
[10:23:06.790] <TB1> INFO: 8670050 events read in total (298711ms).
[10:23:29.860] <TB1> INFO: 9334800 events read in total (321781ms).
[10:23:52.790] <TB1> INFO: 9999900 events read in total (344711ms).
[10:24:15.760] <TB1> INFO: 10662400 events read in total (367681ms).
[10:24:39.053] <TB1> INFO: 11325050 events read in total (390974ms).
[10:25:02.008] <TB1> INFO: 11987900 events read in total (413929ms).
[10:25:24.986] <TB1> INFO: 12651900 events read in total (436907ms).
[10:25:47.964] <TB1> INFO: 13314150 events read in total (459885ms).
[10:26:11.205] <TB1> INFO: 13976550 events read in total (483126ms).
[10:26:34.143] <TB1> INFO: 14639300 events read in total (506064ms).
[10:26:56.948] <TB1> INFO: 15301050 events read in total (528869ms).
[10:27:19.741] <TB1> INFO: 15962000 events read in total (551662ms).
[10:27:42.728] <TB1> INFO: 16623550 events read in total (574649ms).
[10:28:05.418] <TB1> INFO: 17284450 events read in total (597340ms).
[10:28:28.306] <TB1> INFO: 17943550 events read in total (620227ms).
[10:28:51.232] <TB1> INFO: 18604100 events read in total (643153ms).
[10:29:13.846] <TB1> INFO: 19263550 events read in total (665767ms).
[10:29:36.860] <TB1> INFO: 19923050 events read in total (688781ms).
[10:29:59.488] <TB1> INFO: 20581350 events read in total (711409ms).
[10:30:22.403] <TB1> INFO: 21239550 events read in total (734324ms).
[10:30:45.365] <TB1> INFO: 21895950 events read in total (757286ms).
[10:31:08.206] <TB1> INFO: 22553500 events read in total (780127ms).
[10:31:31.181] <TB1> INFO: 23212500 events read in total (803102ms).
[10:31:53.909] <TB1> INFO: 23870850 events read in total (825830ms).
[10:32:16.577] <TB1> INFO: 24528300 events read in total (848498ms).
[10:32:39.233] <TB1> INFO: 25186550 events read in total (871154ms).
[10:33:02.236] <TB1> INFO: 25845450 events read in total (894157ms).
[10:33:24.770] <TB1> INFO: 26504450 events read in total (916691ms).
[10:33:47.680] <TB1> INFO: 27163300 events read in total (939601ms).
[10:34:10.434] <TB1> INFO: 27822000 events read in total (962355ms).
[10:34:33.243] <TB1> INFO: 28480050 events read in total (985164ms).
[10:34:56.205] <TB1> INFO: 29137800 events read in total (1008126ms).
[10:35:19.133] <TB1> INFO: 29796800 events read in total (1031054ms).
[10:35:41.942] <TB1> INFO: 30454500 events read in total (1053863ms).
[10:36:04.564] <TB1> INFO: 31114050 events read in total (1076485ms).
[10:36:27.033] <TB1> INFO: 31772100 events read in total (1098954ms).
[10:36:49.433] <TB1> INFO: 32431700 events read in total (1121354ms).
[10:37:12.386] <TB1> INFO: 33090800 events read in total (1144307ms).
[10:37:35.143] <TB1> INFO: 33751750 events read in total (1167064ms).
[10:37:57.473] <TB1> INFO: 34410400 events read in total (1189394ms).
[10:38:20.050] <TB1> INFO: 35071050 events read in total (1211971ms).
[10:38:42.587] <TB1> INFO: 35730700 events read in total (1234508ms).
[10:39:05.522] <TB1> INFO: 36401450 events read in total (1257443ms).
[10:39:12.733] <TB1> INFO: 36608000 events read in total (1264654ms).
[10:39:12.806] <TB1> INFO: Test took 1265555ms.
[10:39:13.191] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[10:39:15.170] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[10:39:16.895] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[10:39:18.385] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[10:39:20.041] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[10:39:21.837] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[10:39:23.775] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[10:39:25.514] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[10:39:27.121] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[10:39:28.727] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[10:39:30.309] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[10:39:31.930] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[10:39:33.474] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[10:39:35.036] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[10:39:36.585] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[10:39:38.503] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[10:39:40.606] <TB1> INFO: PixTestScurves::scurves() done
[10:39:40.606] <TB1> INFO: Vcal mean: 115.58 121.60 123.17 111.80 100.85 120.86 119.22 108.68 120.98 127.20 123.14 122.86 124.71 120.14 123.50 121.45
[10:39:40.606] <TB1> INFO: Vcal RMS: 5.53 6.50 6.65 5.33 5.29 5.99 5.89 5.54 6.56 6.62 5.92 6.45 6.44 6.17 6.32 6.19
[10:39:40.606] <TB1> INFO: PixTestScurves::fullTest() done, duration: 1293 seconds
[10:39:40.606] <TB1> INFO: Decoding statistics:
[10:39:40.606] <TB1> INFO: General information:
[10:39:40.606] <TB1> INFO: 16bit words read: 0
[10:39:40.606] <TB1> INFO: valid events total: 0
[10:39:40.606] <TB1> INFO: empty events: 0
[10:39:40.606] <TB1> INFO: valid events with pixels: 0
[10:39:40.606] <TB1> INFO: valid pixel hits: 0
[10:39:40.606] <TB1> INFO: Event errors: 0
[10:39:40.606] <TB1> INFO: start marker: 0
[10:39:40.606] <TB1> INFO: stop marker: 0
[10:39:40.606] <TB1> INFO: overflow: 0
[10:39:40.606] <TB1> INFO: invalid 5bit words: 0
[10:39:40.606] <TB1> INFO: invalid XOR eye diagram: 0
[10:39:40.606] <TB1> INFO: frame (failed synchr.): 0
[10:39:40.606] <TB1> INFO: idle data (no TBM trl): 0
[10:39:40.606] <TB1> INFO: no data (only TBM hdr): 0
[10:39:40.606] <TB1> INFO: TBM errors: 0
[10:39:40.606] <TB1> INFO: flawed TBM headers: 0
[10:39:40.606] <TB1> INFO: flawed TBM trailers: 0
[10:39:40.606] <TB1> INFO: event ID mismatches: 0
[10:39:40.606] <TB1> INFO: ROC errors: 0
[10:39:40.606] <TB1> INFO: missing ROC header(s): 0
[10:39:40.606] <TB1> INFO: misplaced readback start: 0
[10:39:40.606] <TB1> INFO: Pixel decoding errors: 0
[10:39:40.606] <TB1> INFO: pixel data incomplete: 0
[10:39:40.606] <TB1> INFO: pixel address: 0
[10:39:40.606] <TB1> INFO: pulse height fill bit: 0
[10:39:40.606] <TB1> INFO: buffer corruption: 0
[10:39:40.680] <TB1> INFO: ######################################################################
[10:39:40.680] <TB1> INFO: PixTestTrim::doTest()
[10:39:40.680] <TB1> INFO: ######################################################################
[10:39:40.681] <TB1> INFO: ----------------------------------------------------------------------
[10:39:40.682] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[10:39:40.682] <TB1> INFO: ----------------------------------------------------------------------
[10:39:40.723] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[10:39:40.723] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[10:39:40.736] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[10:39:40.736] <TB1> INFO: run 1 of 1
[10:39:40.974] <TB1> INFO: Expecting 5025280 events.
[10:40:12.561] <TB1> INFO: 829624 events read in total (30984ms).
[10:40:43.051] <TB1> INFO: 1656976 events read in total (61475ms).
[10:41:13.283] <TB1> INFO: 2481024 events read in total (91706ms).
[10:41:43.883] <TB1> INFO: 3302320 events read in total (122306ms).
[10:42:14.165] <TB1> INFO: 4121296 events read in total (152588ms).
[10:42:44.418] <TB1> INFO: 4938312 events read in total (182841ms).
[10:42:47.932] <TB1> INFO: 5025280 events read in total (186355ms).
[10:42:48.003] <TB1> INFO: Test took 187268ms.
[10:43:05.246] <TB1> INFO: ROC 0 VthrComp = 116
[10:43:05.246] <TB1> INFO: ROC 1 VthrComp = 126
[10:43:05.246] <TB1> INFO: ROC 2 VthrComp = 123
[10:43:05.246] <TB1> INFO: ROC 3 VthrComp = 114
[10:43:05.246] <TB1> INFO: ROC 4 VthrComp = 103
[10:43:05.246] <TB1> INFO: ROC 5 VthrComp = 124
[10:43:05.246] <TB1> INFO: ROC 6 VthrComp = 122
[10:43:05.247] <TB1> INFO: ROC 7 VthrComp = 107
[10:43:05.247] <TB1> INFO: ROC 8 VthrComp = 121
[10:43:05.247] <TB1> INFO: ROC 9 VthrComp = 130
[10:43:05.247] <TB1> INFO: ROC 10 VthrComp = 127
[10:43:05.247] <TB1> INFO: ROC 11 VthrComp = 121
[10:43:05.247] <TB1> INFO: ROC 12 VthrComp = 128
[10:43:05.247] <TB1> INFO: ROC 13 VthrComp = 123
[10:43:05.247] <TB1> INFO: ROC 14 VthrComp = 121
[10:43:05.247] <TB1> INFO: ROC 15 VthrComp = 123
[10:43:05.574] <TB1> INFO: Expecting 41600 events.
[10:43:09.086] <TB1> INFO: 41600 events read in total (2920ms).
[10:43:09.087] <TB1> INFO: Test took 3838ms.
[10:43:09.098] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[10:43:09.099] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[10:43:09.112] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[10:43:09.112] <TB1> INFO: run 1 of 1
[10:43:09.391] <TB1> INFO: Expecting 5025280 events.
[10:43:36.477] <TB1> INFO: 590640 events read in total (26494ms).
[10:44:02.968] <TB1> INFO: 1179648 events read in total (52985ms).
[10:44:29.572] <TB1> INFO: 1769136 events read in total (79589ms).
[10:44:55.920] <TB1> INFO: 2358376 events read in total (105937ms).
[10:45:22.235] <TB1> INFO: 2946592 events read in total (132253ms).
[10:45:48.789] <TB1> INFO: 3533960 events read in total (158806ms).
[10:46:15.288] <TB1> INFO: 4120880 events read in total (185305ms).
[10:46:41.238] <TB1> INFO: 4707008 events read in total (211255ms).
[10:46:55.177] <TB1> INFO: 5025280 events read in total (225194ms).
[10:46:55.282] <TB1> INFO: Test took 226170ms.
[10:47:20.272] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 62.5944 for pixel 18/0 mean/min/max = 46.9165/30.9822/62.8507
[10:47:20.273] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 62.5959 for pixel 11/8 mean/min/max = 47.1556/31.6835/62.6278
[10:47:20.273] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 62.2457 for pixel 0/68 mean/min/max = 46.8553/31.4497/62.2609
[10:47:20.273] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 62.4238 for pixel 2/14 mean/min/max = 46.8431/31.2575/62.4286
[10:47:20.274] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 61.1948 for pixel 47/5 mean/min/max = 47.4933/33.7309/61.2558
[10:47:20.274] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 61.1053 for pixel 37/56 mean/min/max = 46.287/31.3151/61.2588
[10:47:20.274] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 61.0213 for pixel 13/7 mean/min/max = 45.776/30.52/61.032
[10:47:20.275] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 65.6844 for pixel 12/31 mean/min/max = 49.89/34.0593/65.7208
[10:47:20.275] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 62.8753 for pixel 17/7 mean/min/max = 47.5618/32.2222/62.9014
[10:47:20.275] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 65.212 for pixel 18/0 mean/min/max = 47.9829/30.4782/65.4876
[10:47:20.276] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 62.9351 for pixel 6/7 mean/min/max = 47.4714/31.9155/63.0274
[10:47:20.276] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 64.8953 for pixel 39/5 mean/min/max = 47.6609/30.4191/64.9028
[10:47:20.276] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 60.0009 for pixel 10/79 mean/min/max = 45.5466/31.0214/60.0718
[10:47:20.277] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 63.025 for pixel 18/0 mean/min/max = 46.7099/30.3668/63.0531
[10:47:20.277] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 62.9561 for pixel 4/11 mean/min/max = 47.0607/30.6599/63.4614
[10:47:20.277] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 63.1756 for pixel 21/2 mean/min/max = 47.2956/31.405/63.1862
[10:47:20.278] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:47:20.367] <TB1> INFO: Expecting 411648 events.
[10:47:29.718] <TB1> INFO: 411648 events read in total (8759ms).
[10:47:29.725] <TB1> INFO: Expecting 411648 events.
[10:47:39.071] <TB1> INFO: 411648 events read in total (8943ms).
[10:47:39.082] <TB1> INFO: Expecting 411648 events.
[10:47:48.218] <TB1> INFO: 411648 events read in total (8733ms).
[10:47:48.233] <TB1> INFO: Expecting 411648 events.
[10:47:57.499] <TB1> INFO: 411648 events read in total (8864ms).
[10:47:57.515] <TB1> INFO: Expecting 411648 events.
[10:48:06.891] <TB1> INFO: 411648 events read in total (8973ms).
[10:48:06.917] <TB1> INFO: Expecting 411648 events.
[10:48:16.223] <TB1> INFO: 411648 events read in total (8903ms).
[10:48:16.246] <TB1> INFO: Expecting 411648 events.
[10:48:25.590] <TB1> INFO: 411648 events read in total (8941ms).
[10:48:25.627] <TB1> INFO: Expecting 411648 events.
[10:48:34.963] <TB1> INFO: 411648 events read in total (8933ms).
[10:48:34.990] <TB1> INFO: Expecting 411648 events.
[10:48:44.309] <TB1> INFO: 411648 events read in total (8916ms).
[10:48:44.430] <TB1> INFO: Expecting 411648 events.
[10:48:53.761] <TB1> INFO: 411648 events read in total (8928ms).
[10:48:53.805] <TB1> INFO: Expecting 411648 events.
[10:49:03.140] <TB1> INFO: 411648 events read in total (8932ms).
[10:49:03.198] <TB1> INFO: Expecting 411648 events.
[10:49:12.439] <TB1> INFO: 411648 events read in total (8838ms).
[10:49:12.567] <TB1> INFO: Expecting 411648 events.
[10:49:21.861] <TB1> INFO: 411648 events read in total (8890ms).
[10:49:21.919] <TB1> INFO: Expecting 411648 events.
[10:49:31.211] <TB1> INFO: 411648 events read in total (8889ms).
[10:49:31.325] <TB1> INFO: Expecting 411648 events.
[10:49:40.667] <TB1> INFO: 411648 events read in total (8939ms).
[10:49:40.727] <TB1> INFO: Expecting 411648 events.
[10:49:49.001] <TB1> INFO: 411648 events read in total (8871ms).
[10:49:50.071] <TB1> INFO: Test took 149793ms.
[10:49:50.823] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[10:49:50.837] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[10:49:50.837] <TB1> INFO: run 1 of 1
[10:49:51.079] <TB1> INFO: Expecting 5025280 events.
[10:50:17.829] <TB1> INFO: 592536 events read in total (26158ms).
[10:50:44.713] <TB1> INFO: 1186856 events read in total (53042ms).
[10:51:11.142] <TB1> INFO: 1779072 events read in total (79471ms).
[10:51:37.563] <TB1> INFO: 2370144 events read in total (105892ms).
[10:52:03.917] <TB1> INFO: 2963704 events read in total (132247ms).
[10:52:30.369] <TB1> INFO: 3559776 events read in total (158698ms).
[10:52:57.137] <TB1> INFO: 4156016 events read in total (185466ms).
[10:53:23.868] <TB1> INFO: 4747600 events read in total (212197ms).
[10:53:36.446] <TB1> INFO: 5025280 events read in total (224775ms).
[10:53:36.621] <TB1> INFO: Test took 225785ms.
[10:53:59.531] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.666530 .. 145.231604
[10:53:59.770] <TB1> INFO: Expecting 208000 events.
[10:54:09.260] <TB1> INFO: 208000 events read in total (8898ms).
[10:54:09.261] <TB1> INFO: Test took 9729ms.
[10:54:09.317] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 155 (-1/-1) hits flags = 528 (plus default)
[10:54:09.330] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[10:54:09.330] <TB1> INFO: run 1 of 1
[10:54:09.608] <TB1> INFO: Expecting 5191680 events.
[10:54:35.699] <TB1> INFO: 585864 events read in total (25499ms).
[10:55:01.810] <TB1> INFO: 1171632 events read in total (51610ms).
[10:55:27.880] <TB1> INFO: 1757624 events read in total (77680ms).
[10:55:54.084] <TB1> INFO: 2343528 events read in total (103885ms).
[10:56:20.131] <TB1> INFO: 2928840 events read in total (129931ms).
[10:56:46.107] <TB1> INFO: 3514768 events read in total (155907ms).
[10:57:12.343] <TB1> INFO: 4100184 events read in total (182143ms).
[10:57:38.385] <TB1> INFO: 4684936 events read in total (208185ms).
[10:58:00.784] <TB1> INFO: 5191680 events read in total (230584ms).
[10:58:00.897] <TB1> INFO: Test took 231567ms.
[10:58:27.236] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 28.228522 .. 49.471825
[10:58:27.473] <TB1> INFO: Expecting 208000 events.
[10:58:37.384] <TB1> INFO: 208000 events read in total (9319ms).
[10:58:37.385] <TB1> INFO: Test took 10148ms.
[10:58:37.433] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 18 .. 59 (-1/-1) hits flags = 528 (plus default)
[10:58:37.450] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[10:58:37.450] <TB1> INFO: run 1 of 1
[10:58:37.729] <TB1> INFO: Expecting 1397760 events.
[10:59:06.010] <TB1> INFO: 641104 events read in total (27689ms).
[10:59:33.314] <TB1> INFO: 1279808 events read in total (54993ms).
[10:59:38.977] <TB1> INFO: 1397760 events read in total (60656ms).
[10:59:39.021] <TB1> INFO: Test took 61571ms.
[10:59:53.115] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 27.657287 .. 47.231225
[10:59:53.357] <TB1> INFO: Expecting 208000 events.
[11:00:03.113] <TB1> INFO: 208000 events read in total (9156ms).
[11:00:03.115] <TB1> INFO: Test took 9998ms.
[11:00:03.163] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 17 .. 57 (-1/-1) hits flags = 528 (plus default)
[11:00:03.176] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:00:03.177] <TB1> INFO: run 1 of 1
[11:00:03.455] <TB1> INFO: Expecting 1364480 events.
[11:00:33.309] <TB1> INFO: 651584 events read in total (29262ms).
[11:01:01.287] <TB1> INFO: 1300840 events read in total (57240ms).
[11:01:04.523] <TB1> INFO: 1364480 events read in total (60476ms).
[11:01:04.561] <TB1> INFO: Test took 61384ms.
[11:01:18.364] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 23.091102 .. 45.528978
[11:01:18.602] <TB1> INFO: Expecting 208000 events.
[11:01:28.324] <TB1> INFO: 208000 events read in total (9130ms).
[11:01:28.325] <TB1> INFO: Test took 9960ms.
[11:01:28.380] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 13 .. 55 (-1/-1) hits flags = 528 (plus default)
[11:01:28.394] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:01:28.395] <TB1> INFO: run 1 of 1
[11:01:28.673] <TB1> INFO: Expecting 1431040 events.
[11:01:57.878] <TB1> INFO: 672512 events read in total (28614ms).
[11:02:25.677] <TB1> INFO: 1346680 events read in total (56413ms).
[11:02:29.740] <TB1> INFO: 1431040 events read in total (60476ms).
[11:02:29.777] <TB1> INFO: Test took 61382ms.
[11:02:42.468] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:02:42.468] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[11:02:42.481] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[11:02:42.481] <TB1> INFO: run 1 of 1
[11:02:42.718] <TB1> INFO: Expecting 1364480 events.
[11:03:11.103] <TB1> INFO: 666776 events read in total (27793ms).
[11:03:39.674] <TB1> INFO: 1333272 events read in total (56364ms).
[11:03:41.350] <TB1> INFO: 1364480 events read in total (58041ms).
[11:03:41.380] <TB1> INFO: Test took 58899ms.
[11:03:54.188] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C0.dat
[11:03:54.188] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C1.dat
[11:03:54.188] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C2.dat
[11:03:54.188] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C3.dat
[11:03:54.188] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C4.dat
[11:03:54.188] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C5.dat
[11:03:54.188] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C6.dat
[11:03:54.188] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C7.dat
[11:03:54.188] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C8.dat
[11:03:54.188] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C9.dat
[11:03:54.188] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C10.dat
[11:03:54.188] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C11.dat
[11:03:54.189] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C12.dat
[11:03:54.189] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C13.dat
[11:03:54.189] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C14.dat
[11:03:54.189] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C15.dat
[11:03:54.189] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//trimParameters35_C0.dat
[11:03:54.197] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//trimParameters35_C1.dat
[11:03:54.203] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//trimParameters35_C2.dat
[11:03:54.208] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//trimParameters35_C3.dat
[11:03:54.212] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//trimParameters35_C4.dat
[11:03:54.217] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//trimParameters35_C5.dat
[11:03:54.222] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//trimParameters35_C6.dat
[11:03:54.227] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//trimParameters35_C7.dat
[11:03:54.234] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//trimParameters35_C8.dat
[11:03:54.240] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//trimParameters35_C9.dat
[11:03:54.246] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//trimParameters35_C10.dat
[11:03:54.252] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//trimParameters35_C11.dat
[11:03:54.258] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//trimParameters35_C12.dat
[11:03:54.265] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//trimParameters35_C13.dat
[11:03:54.271] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//trimParameters35_C14.dat
[11:03:54.278] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//trimParameters35_C15.dat
[11:03:54.284] <TB1> INFO: PixTestTrim::trimTest() done
[11:03:54.284] <TB1> INFO: vtrim: 125 150 120 144 138 120 131 131 136 153 140 147 120 140 146 136
[11:03:54.284] <TB1> INFO: vthrcomp: 116 126 123 114 103 124 122 107 121 130 127 121 128 123 121 123
[11:03:54.284] <TB1> INFO: vcal mean: 34.96 35.02 34.93 34.97 34.99 34.95 35.37 35.02 34.96 34.97 34.97 35.26 34.94 34.90 35.03 34.96
[11:03:54.284] <TB1> INFO: vcal RMS: 1.18 1.12 1.09 1.12 0.97 1.17 1.15 1.09 1.09 1.13 1.06 1.57 1.17 1.41 1.33 1.06
[11:03:54.284] <TB1> INFO: bits mean: 9.36 9.58 8.94 9.76 9.11 9.77 10.24 8.37 8.97 9.44 9.37 9.98 9.89 9.69 9.78 9.35
[11:03:54.284] <TB1> INFO: bits RMS: 2.79 2.61 2.91 2.60 2.56 2.63 2.51 2.59 2.78 2.77 2.70 2.63 2.66 2.73 2.64 2.72
[11:03:54.292] <TB1> INFO: ----------------------------------------------------------------------
[11:03:54.292] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[11:03:54.292] <TB1> INFO: ----------------------------------------------------------------------
[11:03:54.295] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[11:03:54.308] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[11:03:54.308] <TB1> INFO: run 1 of 1
[11:03:54.568] <TB1> INFO: Expecting 4160000 events.
[11:04:27.207] <TB1> INFO: 756710 events read in total (32047ms).
[11:04:58.927] <TB1> INFO: 1507860 events read in total (63767ms).
[11:05:30.629] <TB1> INFO: 2254175 events read in total (95469ms).
[11:06:02.350] <TB1> INFO: 2996640 events read in total (127190ms).
[11:06:34.413] <TB1> INFO: 3738945 events read in total (159253ms).
[11:06:52.916] <TB1> INFO: 4160000 events read in total (177756ms).
[11:06:52.000] <TB1> INFO: Test took 178691ms.
[11:07:17.688] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[11:07:17.702] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[11:07:17.702] <TB1> INFO: run 1 of 1
[11:07:17.937] <TB1> INFO: Expecting 4243200 events.
[11:07:50.011] <TB1> INFO: 723745 events read in total (31482ms).
[11:08:21.325] <TB1> INFO: 1443510 events read in total (62796ms).
[11:08:52.510] <TB1> INFO: 2160030 events read in total (93981ms).
[11:09:23.522] <TB1> INFO: 2873435 events read in total (124993ms).
[11:09:54.719] <TB1> INFO: 3586570 events read in total (156190ms).
[11:10:23.310] <TB1> INFO: 4243200 events read in total (184781ms).
[11:10:23.446] <TB1> INFO: Test took 185745ms.
[11:10:52.221] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 188 (-1/-1) hits flags = 528 (plus default)
[11:10:52.234] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[11:10:52.234] <TB1> INFO: run 1 of 1
[11:10:52.517] <TB1> INFO: Expecting 3931200 events.
[11:11:25.064] <TB1> INFO: 745415 events read in total (31955ms).
[11:11:57.103] <TB1> INFO: 1485665 events read in total (63994ms).
[11:12:28.464] <TB1> INFO: 2221635 events read in total (95355ms).
[11:13:00.082] <TB1> INFO: 2954960 events read in total (126973ms).
[11:13:31.875] <TB1> INFO: 3688725 events read in total (158766ms).
[11:13:42.365] <TB1> INFO: 3931200 events read in total (169256ms).
[11:13:42.439] <TB1> INFO: Test took 170206ms.
[11:14:09.823] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 191 (-1/-1) hits flags = 528 (plus default)
[11:14:09.835] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[11:14:09.835] <TB1> INFO: run 1 of 1
[11:14:10.072] <TB1> INFO: Expecting 3993600 events.
[11:14:42.138] <TB1> INFO: 740910 events read in total (31474ms).
[11:15:13.312] <TB1> INFO: 1477305 events read in total (62648ms).
[11:15:44.711] <TB1> INFO: 2208875 events read in total (94047ms).
[11:16:16.076] <TB1> INFO: 2938015 events read in total (125412ms).
[11:16:47.431] <TB1> INFO: 3667185 events read in total (156767ms).
[11:17:02.089] <TB1> INFO: 3993600 events read in total (171425ms).
[11:17:02.182] <TB1> INFO: Test took 172346ms.
[11:17:26.312] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 190 (-1/-1) hits flags = 528 (plus default)
[11:17:26.325] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[11:17:26.325] <TB1> INFO: run 1 of 1
[11:17:26.561] <TB1> INFO: Expecting 3972800 events.
[11:17:59.231] <TB1> INFO: 742235 events read in total (32079ms).
[11:18:30.692] <TB1> INFO: 1480040 events read in total (63540ms).
[11:19:02.672] <TB1> INFO: 2213090 events read in total (95520ms).
[11:19:34.070] <TB1> INFO: 2943505 events read in total (126918ms).
[11:20:05.502] <TB1> INFO: 3674560 events read in total (158350ms).
[11:20:18.214] <TB1> INFO: 3972800 events read in total (171062ms).
[11:20:18.331] <TB1> INFO: Test took 172006ms.
[11:20:41.942] <TB1> INFO: PixTestTrim::trimBitTest() done
[11:20:41.943] <TB1> INFO: PixTestTrim::doTest() done, duration: 2461 seconds
[11:20:41.943] <TB1> INFO: Decoding statistics:
[11:20:41.943] <TB1> INFO: General information:
[11:20:41.943] <TB1> INFO: 16bit words read: 0
[11:20:41.943] <TB1> INFO: valid events total: 0
[11:20:41.943] <TB1> INFO: empty events: 0
[11:20:41.943] <TB1> INFO: valid events with pixels: 0
[11:20:41.943] <TB1> INFO: valid pixel hits: 0
[11:20:41.943] <TB1> INFO: Event errors: 0
[11:20:41.943] <TB1> INFO: start marker: 0
[11:20:41.943] <TB1> INFO: stop marker: 0
[11:20:41.943] <TB1> INFO: overflow: 0
[11:20:41.943] <TB1> INFO: invalid 5bit words: 0
[11:20:41.943] <TB1> INFO: invalid XOR eye diagram: 0
[11:20:41.943] <TB1> INFO: frame (failed synchr.): 0
[11:20:41.943] <TB1> INFO: idle data (no TBM trl): 0
[11:20:41.943] <TB1> INFO: no data (only TBM hdr): 0
[11:20:41.944] <TB1> INFO: TBM errors: 0
[11:20:41.944] <TB1> INFO: flawed TBM headers: 0
[11:20:41.944] <TB1> INFO: flawed TBM trailers: 0
[11:20:41.944] <TB1> INFO: event ID mismatches: 0
[11:20:41.944] <TB1> INFO: ROC errors: 0
[11:20:41.944] <TB1> INFO: missing ROC header(s): 0
[11:20:41.944] <TB1> INFO: misplaced readback start: 0
[11:20:41.944] <TB1> INFO: Pixel decoding errors: 0
[11:20:41.944] <TB1> INFO: pixel data incomplete: 0
[11:20:41.944] <TB1> INFO: pixel address: 0
[11:20:41.944] <TB1> INFO: pulse height fill bit: 0
[11:20:41.944] <TB1> INFO: buffer corruption: 0
[11:20:42.607] <TB1> INFO: ######################################################################
[11:20:42.607] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[11:20:42.607] <TB1> INFO: ######################################################################
[11:20:42.887] <TB1> INFO: Expecting 41600 events.
[11:20:46.341] <TB1> INFO: 41600 events read in total (2863ms).
[11:20:46.341] <TB1> INFO: Test took 3732ms.
[11:20:46.811] <TB1> INFO: Expecting 41600 events.
[11:20:50.356] <TB1> INFO: 41600 events read in total (2953ms).
[11:20:50.357] <TB1> INFO: Test took 3812ms.
[11:20:50.645] <TB1> INFO: Expecting 41600 events.
[11:20:54.222] <TB1> INFO: 41600 events read in total (2985ms).
[11:20:54.223] <TB1> INFO: Test took 3856ms.
[11:20:54.511] <TB1> INFO: Expecting 41600 events.
[11:20:57.986] <TB1> INFO: 41600 events read in total (2884ms).
[11:20:57.987] <TB1> INFO: Test took 3754ms.
[11:20:58.277] <TB1> INFO: Expecting 41600 events.
[11:21:01.766] <TB1> INFO: 41600 events read in total (2897ms).
[11:21:01.767] <TB1> INFO: Test took 3768ms.
[11:21:02.057] <TB1> INFO: Expecting 41600 events.
[11:21:05.569] <TB1> INFO: 41600 events read in total (2920ms).
[11:21:05.570] <TB1> INFO: Test took 3791ms.
[11:21:05.902] <TB1> INFO: Expecting 41600 events.
[11:21:09.382] <TB1> INFO: 41600 events read in total (2888ms).
[11:21:09.383] <TB1> INFO: Test took 3799ms.
[11:21:09.670] <TB1> INFO: Expecting 41600 events.
[11:21:13.189] <TB1> INFO: 41600 events read in total (2927ms).
[11:21:13.190] <TB1> INFO: Test took 3797ms.
[11:21:13.477] <TB1> INFO: Expecting 41600 events.
[11:21:16.935] <TB1> INFO: 41600 events read in total (2866ms).
[11:21:16.936] <TB1> INFO: Test took 3736ms.
[11:21:17.225] <TB1> INFO: Expecting 41600 events.
[11:21:20.700] <TB1> INFO: 41600 events read in total (2883ms).
[11:21:20.701] <TB1> INFO: Test took 3754ms.
[11:21:20.989] <TB1> INFO: Expecting 41600 events.
[11:21:24.495] <TB1> INFO: 41600 events read in total (2915ms).
[11:21:24.496] <TB1> INFO: Test took 3785ms.
[11:21:24.794] <TB1> INFO: Expecting 41600 events.
[11:21:28.303] <TB1> INFO: 41600 events read in total (2917ms).
[11:21:28.304] <TB1> INFO: Test took 3794ms.
[11:21:28.595] <TB1> INFO: Expecting 41600 events.
[11:21:32.184] <TB1> INFO: 41600 events read in total (2998ms).
[11:21:32.184] <TB1> INFO: Test took 3867ms.
[11:21:32.474] <TB1> INFO: Expecting 41600 events.
[11:21:36.017] <TB1> INFO: 41600 events read in total (2951ms).
[11:21:36.017] <TB1> INFO: Test took 3820ms.
[11:21:36.305] <TB1> INFO: Expecting 41600 events.
[11:21:39.787] <TB1> INFO: 41600 events read in total (2890ms).
[11:21:39.788] <TB1> INFO: Test took 3761ms.
[11:21:40.076] <TB1> INFO: Expecting 41600 events.
[11:21:43.654] <TB1> INFO: 41600 events read in total (2986ms).
[11:21:43.655] <TB1> INFO: Test took 3857ms.
[11:21:43.946] <TB1> INFO: Expecting 41600 events.
[11:21:47.560] <TB1> INFO: 41600 events read in total (3022ms).
[11:21:47.561] <TB1> INFO: Test took 3894ms.
[11:21:47.849] <TB1> INFO: Expecting 41600 events.
[11:21:51.368] <TB1> INFO: 41600 events read in total (2927ms).
[11:21:51.369] <TB1> INFO: Test took 3798ms.
[11:21:51.657] <TB1> INFO: Expecting 41600 events.
[11:21:55.147] <TB1> INFO: 41600 events read in total (2898ms).
[11:21:55.148] <TB1> INFO: Test took 3769ms.
[11:21:55.161] <TB1> INFO: Max pixel from chip 0 is [14 ,29] phvalue 120
[11:21:55.161] <TB1> INFO: Max pixel from chip 1 is [4 ,29] phvalue 48
[11:21:55.161] <TB1> INFO: Max pixel from chip 2 is [6 ,49] phvalue 25
[11:21:55.162] <TB1> INFO: Max pixel from chip 3 is [10 ,71] phvalue 115
[11:21:55.162] <TB1> INFO: Max pixel from chip 4 is [18 ,5] phvalue 127
[11:21:55.162] <TB1> INFO: Max pixel from chip 5 is [20 ,21] phvalue 80
[11:21:55.162] <TB1> INFO: Max pixel from chip 6 is [25 ,52] phvalue 235
[11:21:55.162] <TB1> INFO: Max pixel from chip 7 is [8 ,8] phvalue 26
[11:21:55.162] <TB1> INFO: Max pixel from chip 8 is [23 ,8] phvalue 108
[11:21:55.163] <TB1> INFO: Max pixel from chip 9 is [4 ,24] phvalue 116
[11:21:55.163] <TB1> INFO: Max pixel from chip 10 is [4 ,33] phvalue 163
[11:21:55.163] <TB1> INFO: Max pixel from chip 11 is [9 ,25] phvalue 69
[11:21:55.163] <TB1> INFO: Max pixel from chip 12 is [22 ,6] phvalue 53
[11:21:55.163] <TB1> INFO: Max pixel from chip 13 is [4 ,9] phvalue 106
[11:21:55.163] <TB1> INFO: Max pixel from chip 14 is [3 ,12] phvalue 46
[11:21:55.164] <TB1> INFO: Max pixel from chip 15 is [4 ,14] phvalue 47
[11:21:55.443] <TB1> INFO: Expecting 41600 events.
[11:21:58.986] <TB1> INFO: 41600 events read in total (2951ms).
[11:21:58.987] <TB1> INFO: Test took 3809ms.
[11:21:58.997] <TB1> INFO: Min pixel from chip 0 is [3 ,5] phvalue 255
[11:21:58.997] <TB1> INFO: Min pixel from chip 1 is [19 ,59] phvalue 236
[11:21:58.998] <TB1> INFO: Min pixel from chip 2 is [5 ,15] phvalue 238
[11:21:58.998] <TB1> INFO: Min pixel from chip 3 is [3 ,5] phvalue 255
[11:21:58.998] <TB1> INFO: Min pixel from chip 4 is [3 ,5] phvalue 255
[11:21:58.998] <TB1> INFO: Min pixel from chip 5 is [37 ,44] phvalue 244
[11:21:58.998] <TB1> INFO: Min pixel from chip 6 is [3 ,5] phvalue 255
[11:21:58.998] <TB1> INFO: Min pixel from chip 7 is [11 ,29] phvalue 237
[11:21:58.998] <TB1> INFO: Min pixel from chip 8 is [3 ,5] phvalue 255
[11:21:58.998] <TB1> INFO: Min pixel from chip 9 is [26 ,28] phvalue 251
[11:21:58.998] <TB1> INFO: Min pixel from chip 10 is [3 ,5] phvalue 255
[11:21:58.999] <TB1> INFO: Min pixel from chip 11 is [3 ,5] phvalue 255
[11:21:58.999] <TB1> INFO: Min pixel from chip 12 is [3 ,5] phvalue 255
[11:21:58.999] <TB1> INFO: Min pixel from chip 13 is [3 ,5] phvalue 255
[11:21:58.999] <TB1> INFO: Min pixel from chip 14 is [25 ,7] phvalue 230
[11:21:58.999] <TB1> INFO: Min pixel from chip 15 is [5 ,62] phvalue 231
[11:21:59.277] <TB1> INFO: Expecting 2560 events.
[11:22:00.169] <TB1> INFO: 2560 events read in total (300ms).
[11:22:00.169] <TB1> INFO: Test took 1167ms.
[11:22:00.477] <TB1> INFO: Expecting 2560 events.
[11:22:01.360] <TB1> INFO: 2560 events read in total (291ms).
[11:22:01.360] <TB1> INFO: Test took 1190ms.
[11:22:01.669] <TB1> INFO: Expecting 2560 events.
[11:22:02.557] <TB1> INFO: 2560 events read in total (296ms).
[11:22:02.558] <TB1> INFO: Test took 1197ms.
[11:22:02.865] <TB1> INFO: Expecting 2560 events.
[11:22:03.750] <TB1> INFO: 2560 events read in total (293ms).
[11:22:03.751] <TB1> INFO: Test took 1193ms.
[11:22:04.057] <TB1> INFO: Expecting 2560 events.
[11:22:04.937] <TB1> INFO: 2560 events read in total (288ms).
[11:22:04.937] <TB1> INFO: Test took 1186ms.
[11:22:05.245] <TB1> INFO: Expecting 2560 events.
[11:22:06.124] <TB1> INFO: 2560 events read in total (287ms).
[11:22:06.124] <TB1> INFO: Test took 1187ms.
[11:22:06.432] <TB1> INFO: Expecting 2560 events.
[11:22:07.322] <TB1> INFO: 2560 events read in total (298ms).
[11:22:07.322] <TB1> INFO: Test took 1197ms.
[11:22:07.630] <TB1> INFO: Expecting 2560 events.
[11:22:08.511] <TB1> INFO: 2560 events read in total (289ms).
[11:22:08.512] <TB1> INFO: Test took 1189ms.
[11:22:08.820] <TB1> INFO: Expecting 2560 events.
[11:22:09.699] <TB1> INFO: 2560 events read in total (288ms).
[11:22:09.700] <TB1> INFO: Test took 1188ms.
[11:22:10.008] <TB1> INFO: Expecting 2560 events.
[11:22:10.890] <TB1> INFO: 2560 events read in total (290ms).
[11:22:10.890] <TB1> INFO: Test took 1190ms.
[11:22:11.198] <TB1> INFO: Expecting 2560 events.
[11:22:12.087] <TB1> INFO: 2560 events read in total (298ms).
[11:22:12.087] <TB1> INFO: Test took 1196ms.
[11:22:12.396] <TB1> INFO: Expecting 2560 events.
[11:22:13.284] <TB1> INFO: 2560 events read in total (296ms).
[11:22:13.285] <TB1> INFO: Test took 1197ms.
[11:22:13.593] <TB1> INFO: Expecting 2560 events.
[11:22:14.476] <TB1> INFO: 2560 events read in total (292ms).
[11:22:14.476] <TB1> INFO: Test took 1191ms.
[11:22:14.784] <TB1> INFO: Expecting 2560 events.
[11:22:15.670] <TB1> INFO: 2560 events read in total (294ms).
[11:22:15.670] <TB1> INFO: Test took 1193ms.
[11:22:15.980] <TB1> INFO: Expecting 2560 events.
[11:22:16.869] <TB1> INFO: 2560 events read in total (297ms).
[11:22:16.869] <TB1> INFO: Test took 1198ms.
[11:22:17.177] <TB1> INFO: Expecting 2560 events.
[11:22:18.061] <TB1> INFO: 2560 events read in total (292ms).
[11:22:18.062] <TB1> INFO: Test took 1192ms.
[11:22:18.065] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:22:18.370] <TB1> INFO: Expecting 655360 events.
[11:22:32.832] <TB1> INFO: 655360 events read in total (13870ms).
[11:22:32.850] <TB1> INFO: Expecting 655360 events.
[11:22:47.403] <TB1> INFO: 655360 events read in total (14150ms).
[11:22:47.429] <TB1> INFO: Expecting 655360 events.
[11:23:02.178] <TB1> INFO: 655360 events read in total (14346ms).
[11:23:02.202] <TB1> INFO: Expecting 655360 events.
[11:23:16.932] <TB1> INFO: 655360 events read in total (14326ms).
[11:23:16.960] <TB1> INFO: Expecting 655360 events.
[11:23:31.527] <TB1> INFO: 655360 events read in total (14164ms).
[11:23:31.561] <TB1> INFO: Expecting 655360 events.
[11:23:46.151] <TB1> INFO: 655360 events read in total (14187ms).
[11:23:46.195] <TB1> INFO: Expecting 655360 events.
[11:24:00.665] <TB1> INFO: 655360 events read in total (14066ms).
[11:24:00.715] <TB1> INFO: Expecting 655360 events.
[11:24:15.469] <TB1> INFO: 655360 events read in total (14351ms).
[11:24:15.523] <TB1> INFO: Expecting 655360 events.
[11:24:29.982] <TB1> INFO: 655360 events read in total (14056ms).
[11:24:30.031] <TB1> INFO: Expecting 655360 events.
[11:24:44.607] <TB1> INFO: 655360 events read in total (14173ms).
[11:24:44.695] <TB1> INFO: Expecting 655360 events.
[11:24:59.240] <TB1> INFO: 655360 events read in total (14141ms).
[11:24:59.299] <TB1> INFO: Expecting 655360 events.
[11:25:13.970] <TB1> INFO: 655360 events read in total (14268ms).
[11:25:14.047] <TB1> INFO: Expecting 655360 events.
[11:25:28.711] <TB1> INFO: 655360 events read in total (14261ms).
[11:25:28.779] <TB1> INFO: Expecting 655360 events.
[11:25:43.374] <TB1> INFO: 655360 events read in total (14192ms).
[11:25:43.489] <TB1> INFO: Expecting 655360 events.
[11:25:58.019] <TB1> INFO: 655360 events read in total (14126ms).
[11:25:58.111] <TB1> INFO: Expecting 655360 events.
[11:26:12.645] <TB1> INFO: 655360 events read in total (14131ms).
[11:26:12.779] <TB1> INFO: Test took 234714ms.
[11:26:12.878] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:26:13.132] <TB1> INFO: Expecting 655360 events.
[11:26:27.639] <TB1> INFO: 655360 events read in total (13915ms).
[11:26:27.650] <TB1> INFO: Expecting 655360 events.
[11:26:42.027] <TB1> INFO: 655360 events read in total (13973ms).
[11:26:42.048] <TB1> INFO: Expecting 655360 events.
[11:26:56.376] <TB1> INFO: 655360 events read in total (13925ms).
[11:26:56.396] <TB1> INFO: Expecting 655360 events.
[11:27:10.840] <TB1> INFO: 655360 events read in total (14041ms).
[11:27:10.865] <TB1> INFO: Expecting 655360 events.
[11:27:25.232] <TB1> INFO: 655360 events read in total (13963ms).
[11:27:25.262] <TB1> INFO: Expecting 655360 events.
[11:27:39.656] <TB1> INFO: 655360 events read in total (13991ms).
[11:27:39.697] <TB1> INFO: Expecting 655360 events.
[11:27:54.166] <TB1> INFO: 655360 events read in total (14066ms).
[11:27:54.209] <TB1> INFO: Expecting 655360 events.
[11:28:08.641] <TB1> INFO: 655360 events read in total (14029ms).
[11:28:08.731] <TB1> INFO: Expecting 655360 events.
[11:28:23.247] <TB1> INFO: 655360 events read in total (14113ms).
[11:28:23.295] <TB1> INFO: Expecting 655360 events.
[11:28:37.794] <TB1> INFO: 655360 events read in total (14096ms).
[11:28:37.892] <TB1> INFO: Expecting 655360 events.
[11:28:52.412] <TB1> INFO: 655360 events read in total (14117ms).
[11:28:52.471] <TB1> INFO: Expecting 655360 events.
[11:29:07.157] <TB1> INFO: 655360 events read in total (14283ms).
[11:29:07.234] <TB1> INFO: Expecting 655360 events.
[11:29:21.333] <TB1> INFO: 655360 events read in total (13696ms).
[11:29:21.425] <TB1> INFO: Expecting 655360 events.
[11:29:36.013] <TB1> INFO: 655360 events read in total (14185ms).
[11:29:36.111] <TB1> INFO: Expecting 655360 events.
[11:29:50.590] <TB1> INFO: 655360 events read in total (14076ms).
[11:29:50.690] <TB1> INFO: Expecting 655360 events.
[11:30:05.056] <TB1> INFO: 655360 events read in total (13963ms).
[11:30:05.189] <TB1> INFO: Test took 232311ms.
[11:30:05.421] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:30:05.430] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:30:05.439] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:30:05.447] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[11:30:05.455] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:30:05.463] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:30:05.471] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[11:30:05.479] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:30:05.487] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:30:05.495] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[11:30:05.503] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:30:05.511] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:30:05.519] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:30:05.527] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:30:05.535] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[11:30:05.544] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:30:05.552] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:30:05.560] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[11:30:05.568] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[11:30:05.574] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[11:30:05.580] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[11:30:05.585] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:30:05.591] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[11:30:05.597] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[11:30:05.603] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[11:30:05.608] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[11:30:05.614] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:30:05.620] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:30:05.653] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C0.dat
[11:30:05.653] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C1.dat
[11:30:05.654] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C2.dat
[11:30:05.654] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C3.dat
[11:30:05.654] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C4.dat
[11:30:05.654] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C5.dat
[11:30:05.654] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C6.dat
[11:30:05.654] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C7.dat
[11:30:05.654] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C8.dat
[11:30:05.654] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C9.dat
[11:30:05.654] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C10.dat
[11:30:05.654] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C11.dat
[11:30:05.654] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C12.dat
[11:30:05.654] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C13.dat
[11:30:05.654] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C14.dat
[11:30:05.654] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//dacParameters35_C15.dat
[11:30:05.906] <TB1> INFO: Expecting 41600 events.
[11:30:09.089] <TB1> INFO: 41600 events read in total (2591ms).
[11:30:09.090] <TB1> INFO: Test took 3426ms.
[11:30:09.544] <TB1> INFO: Expecting 41600 events.
[11:30:12.628] <TB1> INFO: 41600 events read in total (2492ms).
[11:30:12.629] <TB1> INFO: Test took 3327ms.
[11:30:13.082] <TB1> INFO: Expecting 41600 events.
[11:30:16.249] <TB1> INFO: 41600 events read in total (2575ms).
[11:30:16.250] <TB1> INFO: Test took 3409ms.
[11:30:16.466] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:16.555] <TB1> INFO: Expecting 2560 events.
[11:30:17.442] <TB1> INFO: 2560 events read in total (296ms).
[11:30:17.443] <TB1> INFO: Test took 977ms.
[11:30:17.445] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:17.750] <TB1> INFO: Expecting 2560 events.
[11:30:18.641] <TB1> INFO: 2560 events read in total (299ms).
[11:30:18.642] <TB1> INFO: Test took 1197ms.
[11:30:18.645] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:18.950] <TB1> INFO: Expecting 2560 events.
[11:30:19.844] <TB1> INFO: 2560 events read in total (302ms).
[11:30:19.845] <TB1> INFO: Test took 1200ms.
[11:30:19.849] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:20.153] <TB1> INFO: Expecting 2560 events.
[11:30:21.044] <TB1> INFO: 2560 events read in total (299ms).
[11:30:21.044] <TB1> INFO: Test took 1195ms.
[11:30:21.047] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:21.353] <TB1> INFO: Expecting 2560 events.
[11:30:22.248] <TB1> INFO: 2560 events read in total (303ms).
[11:30:22.249] <TB1> INFO: Test took 1202ms.
[11:30:22.251] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:22.557] <TB1> INFO: Expecting 2560 events.
[11:30:23.461] <TB1> INFO: 2560 events read in total (312ms).
[11:30:23.461] <TB1> INFO: Test took 1210ms.
[11:30:23.467] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:23.769] <TB1> INFO: Expecting 2560 events.
[11:30:24.664] <TB1> INFO: 2560 events read in total (303ms).
[11:30:24.665] <TB1> INFO: Test took 1198ms.
[11:30:24.668] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:24.972] <TB1> INFO: Expecting 2560 events.
[11:30:25.863] <TB1> INFO: 2560 events read in total (299ms).
[11:30:25.863] <TB1> INFO: Test took 1195ms.
[11:30:25.865] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:26.176] <TB1> INFO: Expecting 2560 events.
[11:30:27.059] <TB1> INFO: 2560 events read in total (291ms).
[11:30:27.060] <TB1> INFO: Test took 1195ms.
[11:30:27.063] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:27.368] <TB1> INFO: Expecting 2560 events.
[11:30:28.256] <TB1> INFO: 2560 events read in total (296ms).
[11:30:28.256] <TB1> INFO: Test took 1193ms.
[11:30:28.258] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:28.564] <TB1> INFO: Expecting 2560 events.
[11:30:29.452] <TB1> INFO: 2560 events read in total (296ms).
[11:30:29.453] <TB1> INFO: Test took 1195ms.
[11:30:29.455] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:29.760] <TB1> INFO: Expecting 2560 events.
[11:30:30.641] <TB1> INFO: 2560 events read in total (290ms).
[11:30:30.641] <TB1> INFO: Test took 1186ms.
[11:30:30.643] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:30.950] <TB1> INFO: Expecting 2560 events.
[11:30:31.840] <TB1> INFO: 2560 events read in total (298ms).
[11:30:31.841] <TB1> INFO: Test took 1198ms.
[11:30:31.844] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:32.156] <TB1> INFO: Expecting 2560 events.
[11:30:33.042] <TB1> INFO: 2560 events read in total (294ms).
[11:30:33.043] <TB1> INFO: Test took 1199ms.
[11:30:33.045] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:33.350] <TB1> INFO: Expecting 2560 events.
[11:30:34.241] <TB1> INFO: 2560 events read in total (299ms).
[11:30:34.241] <TB1> INFO: Test took 1196ms.
[11:30:34.244] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:34.548] <TB1> INFO: Expecting 2560 events.
[11:30:35.438] <TB1> INFO: 2560 events read in total (298ms).
[11:30:35.438] <TB1> INFO: Test took 1194ms.
[11:30:35.440] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:35.747] <TB1> INFO: Expecting 2560 events.
[11:30:36.637] <TB1> INFO: 2560 events read in total (298ms).
[11:30:36.637] <TB1> INFO: Test took 1197ms.
[11:30:36.640] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:36.946] <TB1> INFO: Expecting 2560 events.
[11:30:37.835] <TB1> INFO: 2560 events read in total (297ms).
[11:30:37.835] <TB1> INFO: Test took 1195ms.
[11:30:37.841] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:38.144] <TB1> INFO: Expecting 2560 events.
[11:30:39.025] <TB1> INFO: 2560 events read in total (289ms).
[11:30:39.026] <TB1> INFO: Test took 1186ms.
[11:30:39.029] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:39.334] <TB1> INFO: Expecting 2560 events.
[11:30:40.220] <TB1> INFO: 2560 events read in total (294ms).
[11:30:40.220] <TB1> INFO: Test took 1192ms.
[11:30:40.224] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:40.529] <TB1> INFO: Expecting 2560 events.
[11:30:41.418] <TB1> INFO: 2560 events read in total (298ms).
[11:30:41.418] <TB1> INFO: Test took 1194ms.
[11:30:41.424] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:41.726] <TB1> INFO: Expecting 2560 events.
[11:30:42.619] <TB1> INFO: 2560 events read in total (296ms).
[11:30:42.620] <TB1> INFO: Test took 1196ms.
[11:30:42.622] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:42.927] <TB1> INFO: Expecting 2560 events.
[11:30:43.811] <TB1> INFO: 2560 events read in total (292ms).
[11:30:43.812] <TB1> INFO: Test took 1190ms.
[11:30:43.815] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:44.118] <TB1> INFO: Expecting 2560 events.
[11:30:44.999] <TB1> INFO: 2560 events read in total (289ms).
[11:30:44.999] <TB1> INFO: Test took 1185ms.
[11:30:44.002] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:45.309] <TB1> INFO: Expecting 2560 events.
[11:30:46.195] <TB1> INFO: 2560 events read in total (294ms).
[11:30:46.196] <TB1> INFO: Test took 1194ms.
[11:30:46.198] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:46.505] <TB1> INFO: Expecting 2560 events.
[11:30:47.396] <TB1> INFO: 2560 events read in total (299ms).
[11:30:47.396] <TB1> INFO: Test took 1198ms.
[11:30:47.399] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:47.704] <TB1> INFO: Expecting 2560 events.
[11:30:48.597] <TB1> INFO: 2560 events read in total (301ms).
[11:30:48.597] <TB1> INFO: Test took 1198ms.
[11:30:48.599] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:48.906] <TB1> INFO: Expecting 2560 events.
[11:30:49.805] <TB1> INFO: 2560 events read in total (308ms).
[11:30:49.805] <TB1> INFO: Test took 1206ms.
[11:30:49.809] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:50.113] <TB1> INFO: Expecting 2560 events.
[11:30:51.007] <TB1> INFO: 2560 events read in total (302ms).
[11:30:51.007] <TB1> INFO: Test took 1199ms.
[11:30:51.010] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:51.316] <TB1> INFO: Expecting 2560 events.
[11:30:52.199] <TB1> INFO: 2560 events read in total (291ms).
[11:30:52.199] <TB1> INFO: Test took 1190ms.
[11:30:52.202] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:52.509] <TB1> INFO: Expecting 2560 events.
[11:30:53.403] <TB1> INFO: 2560 events read in total (303ms).
[11:30:53.404] <TB1> INFO: Test took 1202ms.
[11:30:53.407] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:30:53.712] <TB1> INFO: Expecting 2560 events.
[11:30:54.598] <TB1> INFO: 2560 events read in total (294ms).
[11:30:54.599] <TB1> INFO: Test took 1192ms.
[11:30:55.076] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 612 seconds
[11:30:55.076] <TB1> INFO: PH scale (per ROC): 49 61 55 59 47 64 48 55 60 64 49 46 52 51 60 66
[11:30:55.076] <TB1> INFO: PH offset (per ROC): 104 130 134 111 98 123 75 134 112 116 94 114 116 111 130 132
[11:30:55.085] <TB1> INFO: Decoding statistics:
[11:30:55.085] <TB1> INFO: General information:
[11:30:55.085] <TB1> INFO: 16bit words read: 127876
[11:30:55.085] <TB1> INFO: valid events total: 20480
[11:30:55.085] <TB1> INFO: empty events: 17982
[11:30:55.085] <TB1> INFO: valid events with pixels: 2498
[11:30:55.085] <TB1> INFO: valid pixel hits: 2498
[11:30:55.085] <TB1> INFO: Event errors: 0
[11:30:55.085] <TB1> INFO: start marker: 0
[11:30:55.085] <TB1> INFO: stop marker: 0
[11:30:55.085] <TB1> INFO: overflow: 0
[11:30:55.085] <TB1> INFO: invalid 5bit words: 0
[11:30:55.085] <TB1> INFO: invalid XOR eye diagram: 0
[11:30:55.086] <TB1> INFO: frame (failed synchr.): 0
[11:30:55.086] <TB1> INFO: idle data (no TBM trl): 0
[11:30:55.086] <TB1> INFO: no data (only TBM hdr): 0
[11:30:55.086] <TB1> INFO: TBM errors: 0
[11:30:55.086] <TB1> INFO: flawed TBM headers: 0
[11:30:55.086] <TB1> INFO: flawed TBM trailers: 0
[11:30:55.086] <TB1> INFO: event ID mismatches: 0
[11:30:55.086] <TB1> INFO: ROC errors: 0
[11:30:55.086] <TB1> INFO: missing ROC header(s): 0
[11:30:55.086] <TB1> INFO: misplaced readback start: 0
[11:30:55.086] <TB1> INFO: Pixel decoding errors: 0
[11:30:55.086] <TB1> INFO: pixel data incomplete: 0
[11:30:55.086] <TB1> INFO: pixel address: 0
[11:30:55.086] <TB1> INFO: pulse height fill bit: 0
[11:30:55.086] <TB1> INFO: buffer corruption: 0
[11:30:55.249] <TB1> INFO: ######################################################################
[11:30:55.249] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[11:30:55.249] <TB1> INFO: ######################################################################
[11:30:55.267] <TB1> INFO: scanning low vcal = 10
[11:30:55.505] <TB1> INFO: Expecting 41600 events.
[11:30:59.126] <TB1> INFO: 41600 events read in total (3029ms).
[11:30:59.126] <TB1> INFO: Test took 3859ms.
[11:30:59.128] <TB1> INFO: scanning low vcal = 20
[11:30:59.421] <TB1> INFO: Expecting 41600 events.
[11:31:03.028] <TB1> INFO: 41600 events read in total (3015ms).
[11:31:03.028] <TB1> INFO: Test took 3900ms.
[11:31:03.030] <TB1> INFO: scanning low vcal = 30
[11:31:03.325] <TB1> INFO: Expecting 41600 events.
[11:31:07.011] <TB1> INFO: 41600 events read in total (3094ms).
[11:31:07.011] <TB1> INFO: Test took 3981ms.
[11:31:07.014] <TB1> INFO: scanning low vcal = 40
[11:31:07.291] <TB1> INFO: Expecting 41600 events.
[11:31:11.262] <TB1> INFO: 41600 events read in total (3379ms).
[11:31:11.263] <TB1> INFO: Test took 4249ms.
[11:31:11.266] <TB1> INFO: scanning low vcal = 50
[11:31:11.543] <TB1> INFO: Expecting 41600 events.
[11:31:15.594] <TB1> INFO: 41600 events read in total (3459ms).
[11:31:15.595] <TB1> INFO: Test took 4329ms.
[11:31:15.598] <TB1> INFO: scanning low vcal = 60
[11:31:15.881] <TB1> INFO: Expecting 41600 events.
[11:31:19.964] <TB1> INFO: 41600 events read in total (3491ms).
[11:31:19.965] <TB1> INFO: Test took 4366ms.
[11:31:19.968] <TB1> INFO: scanning low vcal = 70
[11:31:20.246] <TB1> INFO: Expecting 41600 events.
[11:31:24.292] <TB1> INFO: 41600 events read in total (3454ms).
[11:31:24.293] <TB1> INFO: Test took 4325ms.
[11:31:24.296] <TB1> INFO: scanning low vcal = 80
[11:31:24.576] <TB1> INFO: Expecting 41600 events.
[11:31:28.624] <TB1> INFO: 41600 events read in total (3456ms).
[11:31:28.624] <TB1> INFO: Test took 4328ms.
[11:31:28.627] <TB1> INFO: scanning low vcal = 90
[11:31:28.905] <TB1> INFO: Expecting 41600 events.
[11:31:32.956] <TB1> INFO: 41600 events read in total (3460ms).
[11:31:32.957] <TB1> INFO: Test took 4329ms.
[11:31:32.960] <TB1> INFO: scanning low vcal = 100
[11:31:33.237] <TB1> INFO: Expecting 41600 events.
[11:31:37.274] <TB1> INFO: 41600 events read in total (3445ms).
[11:31:37.274] <TB1> INFO: Test took 4313ms.
[11:31:37.277] <TB1> INFO: scanning low vcal = 110
[11:31:37.554] <TB1> INFO: Expecting 41600 events.
[11:31:41.608] <TB1> INFO: 41600 events read in total (3462ms).
[11:31:41.609] <TB1> INFO: Test took 4332ms.
[11:31:41.612] <TB1> INFO: scanning low vcal = 120
[11:31:41.889] <TB1> INFO: Expecting 41600 events.
[11:31:45.921] <TB1> INFO: 41600 events read in total (3440ms).
[11:31:45.922] <TB1> INFO: Test took 4310ms.
[11:31:45.925] <TB1> INFO: scanning low vcal = 130
[11:31:46.202] <TB1> INFO: Expecting 41600 events.
[11:31:50.262] <TB1> INFO: 41600 events read in total (3466ms).
[11:31:50.263] <TB1> INFO: Test took 4338ms.
[11:31:50.266] <TB1> INFO: scanning low vcal = 140
[11:31:50.543] <TB1> INFO: Expecting 41600 events.
[11:31:54.592] <TB1> INFO: 41600 events read in total (3457ms).
[11:31:54.593] <TB1> INFO: Test took 4327ms.
[11:31:54.596] <TB1> INFO: scanning low vcal = 150
[11:31:54.874] <TB1> INFO: Expecting 41600 events.
[11:31:58.866] <TB1> INFO: 41600 events read in total (3400ms).
[11:31:58.867] <TB1> INFO: Test took 4270ms.
[11:31:58.871] <TB1> INFO: scanning low vcal = 160
[11:31:59.147] <TB1> INFO: Expecting 41600 events.
[11:32:03.098] <TB1> INFO: 41600 events read in total (3351ms).
[11:32:03.099] <TB1> INFO: Test took 4228ms.
[11:32:03.101] <TB1> INFO: scanning low vcal = 170
[11:32:03.379] <TB1> INFO: Expecting 41600 events.
[11:32:07.336] <TB1> INFO: 41600 events read in total (3365ms).
[11:32:07.337] <TB1> INFO: Test took 4235ms.
[11:32:07.342] <TB1> INFO: scanning low vcal = 180
[11:32:07.619] <TB1> INFO: Expecting 41600 events.
[11:32:11.598] <TB1> INFO: 41600 events read in total (3387ms).
[11:32:11.598] <TB1> INFO: Test took 4257ms.
[11:32:11.602] <TB1> INFO: scanning low vcal = 190
[11:32:11.878] <TB1> INFO: Expecting 41600 events.
[11:32:15.961] <TB1> INFO: 41600 events read in total (3487ms).
[11:32:15.961] <TB1> INFO: Test took 4359ms.
[11:32:15.965] <TB1> INFO: scanning low vcal = 200
[11:32:16.241] <TB1> INFO: Expecting 41600 events.
[11:32:20.213] <TB1> INFO: 41600 events read in total (3381ms).
[11:32:20.214] <TB1> INFO: Test took 4248ms.
[11:32:20.217] <TB1> INFO: scanning low vcal = 210
[11:32:20.495] <TB1> INFO: Expecting 41600 events.
[11:32:24.448] <TB1> INFO: 41600 events read in total (3362ms).
[11:32:24.449] <TB1> INFO: Test took 4232ms.
[11:32:24.452] <TB1> INFO: scanning low vcal = 220
[11:32:24.732] <TB1> INFO: Expecting 41600 events.
[11:32:28.692] <TB1> INFO: 41600 events read in total (3367ms).
[11:32:28.693] <TB1> INFO: Test took 4241ms.
[11:32:28.696] <TB1> INFO: scanning low vcal = 230
[11:32:28.973] <TB1> INFO: Expecting 41600 events.
[11:32:32.940] <TB1> INFO: 41600 events read in total (3376ms).
[11:32:32.940] <TB1> INFO: Test took 4244ms.
[11:32:32.944] <TB1> INFO: scanning low vcal = 240
[11:32:33.221] <TB1> INFO: Expecting 41600 events.
[11:32:37.229] <TB1> INFO: 41600 events read in total (3416ms).
[11:32:37.230] <TB1> INFO: Test took 4286ms.
[11:32:37.233] <TB1> INFO: scanning low vcal = 250
[11:32:37.510] <TB1> INFO: Expecting 41600 events.
[11:32:41.540] <TB1> INFO: 41600 events read in total (3438ms).
[11:32:41.540] <TB1> INFO: Test took 4306ms.
[11:32:41.544] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[11:32:41.820] <TB1> INFO: Expecting 41600 events.
[11:32:45.832] <TB1> INFO: 41600 events read in total (3420ms).
[11:32:45.833] <TB1> INFO: Test took 4289ms.
[11:32:45.836] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[11:32:46.132] <TB1> INFO: Expecting 41600 events.
[11:32:50.110] <TB1> INFO: 41600 events read in total (3386ms).
[11:32:50.111] <TB1> INFO: Test took 4275ms.
[11:32:50.114] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[11:32:50.391] <TB1> INFO: Expecting 41600 events.
[11:32:54.359] <TB1> INFO: 41600 events read in total (3377ms).
[11:32:54.359] <TB1> INFO: Test took 4244ms.
[11:32:54.363] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[11:32:54.639] <TB1> INFO: Expecting 41600 events.
[11:32:58.651] <TB1> INFO: 41600 events read in total (3421ms).
[11:32:58.652] <TB1> INFO: Test took 4289ms.
[11:32:58.655] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[11:32:58.934] <TB1> INFO: Expecting 41600 events.
[11:33:02.951] <TB1> INFO: 41600 events read in total (3426ms).
[11:33:02.952] <TB1> INFO: Test took 4297ms.
[11:33:03.462] <TB1> INFO: PixTestGainPedestal::measure() done
[11:33:40.240] <TB1> INFO: PixTestGainPedestal::fit() done
[11:33:40.240] <TB1> INFO: non-linearity mean: 0.942 0.980 0.978 0.968 0.933 0.985 0.929 0.981 0.977 0.985 0.951 0.946 0.940 0.961 0.983 0.983
[11:33:40.240] <TB1> INFO: non-linearity RMS: 0.077 0.005 0.005 0.032 0.149 0.003 0.098 0.005 0.006 0.003 0.047 0.087 0.097 0.027 0.004 0.004
[11:33:40.240] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//phCalibrationFitErr35_C0.dat
[11:33:40.254] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//phCalibrationFitErr35_C1.dat
[11:33:40.268] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//phCalibrationFitErr35_C2.dat
[11:33:40.281] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//phCalibrationFitErr35_C3.dat
[11:33:40.294] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//phCalibrationFitErr35_C4.dat
[11:33:40.307] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//phCalibrationFitErr35_C5.dat
[11:33:40.320] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//phCalibrationFitErr35_C6.dat
[11:33:40.334] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//phCalibrationFitErr35_C7.dat
[11:33:40.347] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//phCalibrationFitErr35_C8.dat
[11:33:40.359] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//phCalibrationFitErr35_C9.dat
[11:33:40.372] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//phCalibrationFitErr35_C10.dat
[11:33:40.385] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//phCalibrationFitErr35_C11.dat
[11:33:40.398] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//phCalibrationFitErr35_C12.dat
[11:33:40.411] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//phCalibrationFitErr35_C13.dat
[11:33:40.424] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//phCalibrationFitErr35_C14.dat
[11:33:40.437] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1007_FullQualification_2016-11-14_09h59m_1479113999//000_Fulltest_m20//phCalibrationFitErr35_C15.dat
[11:33:40.450] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 165 seconds
[11:33:40.450] <TB1> INFO: Decoding statistics:
[11:33:40.450] <TB1> INFO: General information:
[11:33:40.450] <TB1> INFO: 16bit words read: 3328082
[11:33:40.450] <TB1> INFO: valid events total: 332800
[11:33:40.450] <TB1> INFO: empty events: 1
[11:33:40.450] <TB1> INFO: valid events with pixels: 332799
[11:33:40.450] <TB1> INFO: valid pixel hits: 665641
[11:33:40.450] <TB1> INFO: Event errors: 0
[11:33:40.450] <TB1> INFO: start marker: 0
[11:33:40.450] <TB1> INFO: stop marker: 0
[11:33:40.450] <TB1> INFO: overflow: 0
[11:33:40.450] <TB1> INFO: invalid 5bit words: 0
[11:33:40.450] <TB1> INFO: invalid XOR eye diagram: 0
[11:33:40.450] <TB1> INFO: frame (failed synchr.): 0
[11:33:40.450] <TB1> INFO: idle data (no TBM trl): 0
[11:33:40.450] <TB1> INFO: no data (only TBM hdr): 0
[11:33:40.450] <TB1> INFO: TBM errors: 0
[11:33:40.450] <TB1> INFO: flawed TBM headers: 0
[11:33:40.450] <TB1> INFO: flawed TBM trailers: 0
[11:33:40.450] <TB1> INFO: event ID mismatches: 0
[11:33:40.450] <TB1> INFO: ROC errors: 0
[11:33:40.450] <TB1> INFO: missing ROC header(s): 0
[11:33:40.450] <TB1> INFO: misplaced readback start: 0
[11:33:40.450] <TB1> INFO: Pixel decoding errors: 0
[11:33:40.450] <TB1> INFO: pixel data incomplete: 0
[11:33:40.450] <TB1> INFO: pixel address: 0
[11:33:40.450] <TB1> INFO: pulse height fill bit: 0
[11:33:40.450] <TB1> INFO: buffer corruption: 0
[11:33:40.465] <TB1> INFO: Decoding statistics:
[11:33:40.465] <TB1> INFO: General information:
[11:33:40.465] <TB1> INFO: 16bit words read: 3457494
[11:33:40.465] <TB1> INFO: valid events total: 353536
[11:33:40.465] <TB1> INFO: empty events: 18239
[11:33:40.465] <TB1> INFO: valid events with pixels: 335297
[11:33:40.465] <TB1> INFO: valid pixel hits: 668139
[11:33:40.465] <TB1> INFO: Event errors: 0
[11:33:40.465] <TB1> INFO: start marker: 0
[11:33:40.465] <TB1> INFO: stop marker: 0
[11:33:40.465] <TB1> INFO: overflow: 0
[11:33:40.465] <TB1> INFO: invalid 5bit words: 0
[11:33:40.465] <TB1> INFO: invalid XOR eye diagram: 0
[11:33:40.465] <TB1> INFO: frame (failed synchr.): 0
[11:33:40.465] <TB1> INFO: idle data (no TBM trl): 0
[11:33:40.465] <TB1> INFO: no data (only TBM hdr): 0
[11:33:40.465] <TB1> INFO: TBM errors: 0
[11:33:40.465] <TB1> INFO: flawed TBM headers: 0
[11:33:40.465] <TB1> INFO: flawed TBM trailers: 0
[11:33:40.465] <TB1> INFO: event ID mismatches: 0
[11:33:40.465] <TB1> INFO: ROC errors: 0
[11:33:40.465] <TB1> INFO: missing ROC header(s): 0
[11:33:40.465] <TB1> INFO: misplaced readback start: 0
[11:33:40.465] <TB1> INFO: Pixel decoding errors: 0
[11:33:40.465] <TB1> INFO: pixel data incomplete: 0
[11:33:40.465] <TB1> INFO: pixel address: 0
[11:33:40.465] <TB1> INFO: pulse height fill bit: 0
[11:33:40.465] <TB1> INFO: buffer corruption: 0
[11:33:40.465] <TB1> INFO: enter test to run
[11:33:40.465] <TB1> INFO: test: exit no parameter change
[11:33:40.586] <TB1> QUIET: Connection to board 154 closed.
[11:33:40.587] <TB1> INFO: pXar: this is the end, my friend