[11:45:29.985] <TB0> INFO: *** Welcome to pxar ***
[11:45:29.985] <TB0> INFO: *** Today: 2016/11/14
[11:45:29.991] <TB0> INFO: *** Version: c8ba-dirty
[11:45:29.991] <TB0> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C15.dat
[11:45:29.991] <TB0> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//tbmParameters_C1b.dat
[11:45:29.991] <TB0> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//defaultMaskFile.dat
[11:45:29.991] <TB0> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters_C15.dat
[11:45:30.052] <TB0> INFO: clk: 4
[11:45:30.052] <TB0> INFO: ctr: 4
[11:45:30.052] <TB0> INFO: sda: 19
[11:45:30.052] <TB0> INFO: tin: 9
[11:45:30.052] <TB0> INFO: level: 15
[11:45:30.052] <TB0> INFO: triggerdelay: 0
[11:45:30.052] <TB0> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[11:45:30.052] <TB0> INFO: Log level: INFO
[11:45:30.061] <TB0> INFO: Found DTB DTB_WRQ4OZ
[11:45:30.071] <TB0> QUIET: Connection to board DTB_WRQ4OZ opened.
[11:45:30.073] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 71
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WRQ4OZ
MAC address: 40D855118047
Hostname: pixelDTB071
Comment:
------------------------------------------------------
[11:45:30.075] <TB0> INFO: RPC call hashes of host and DTB match: 486171790
[11:45:31.565] <TB0> INFO: DUT info:
[11:45:31.565] <TB0> INFO: The DUT currently contains the following objects:
[11:45:31.565] <TB0> INFO: 4 TBM Cores tbm10c (4 ON)
[11:45:31.565] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:45:31.565] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:45:31.565] <TB0> INFO: TBM Core alpha (2): 7 registers set
[11:45:31.565] <TB0> INFO: TBM Core beta (3): 7 registers set
[11:45:31.565] <TB0> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[11:45:31.565] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:45:31.565] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:45:31.565] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:45:31.565] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:45:31.565] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:45:31.565] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:45:31.565] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:45:31.565] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:45:31.565] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:45:31.565] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:45:31.565] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:45:31.565] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:45:31.565] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:45:31.566] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:45:31.566] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:45:31.566] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:45:31.966] <TB0> INFO: enter 'restricted' command line mode
[11:45:31.966] <TB0> INFO: enter test to run
[11:45:31.966] <TB0> INFO: test: pretest no parameter change
[11:45:31.966] <TB0> INFO: running: pretest
[11:45:31.971] <TB0> INFO: ######################################################################
[11:45:31.971] <TB0> INFO: PixTestPretest::doTest()
[11:45:31.971] <TB0> INFO: ######################################################################
[11:45:31.972] <TB0> INFO: ----------------------------------------------------------------------
[11:45:31.972] <TB0> INFO: PixTestPretest::programROC()
[11:45:31.972] <TB0> INFO: ----------------------------------------------------------------------
[11:45:49.986] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:45:49.986] <TB0> INFO: IA differences per ROC: 20.9 20.9 20.9 16.9 18.5 16.9 18.5 17.7 16.9 19.3 16.9 20.1 16.9 18.5 19.3 18.5
[11:45:50.065] <TB0> INFO: ----------------------------------------------------------------------
[11:45:50.065] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:45:50.065] <TB0> INFO: ----------------------------------------------------------------------
[11:46:11.342] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 384.3 mA = 24.0187 mA/ROC
[11:46:11.342] <TB0> INFO: i(loss) [mA/ROC]: 19.3 19.3 20.1 19.3 20.1 19.3 19.3 19.3 20.1 19.3 19.3 18.5 18.5 19.3 19.3 20.1
[11:46:11.377] <TB0> INFO: ----------------------------------------------------------------------
[11:46:11.377] <TB0> INFO: PixTestPretest::findTiming()
[11:46:11.377] <TB0> INFO: ----------------------------------------------------------------------
[11:46:11.377] <TB0> INFO: PixTestCmd::init()

[11:46:43.874] <TB0> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[11:46:43.874] <TB0> INFO: (success/tries = 100/100), width = 4
[11:46:45.380] <TB0> INFO: ----------------------------------------------------------------------
[11:46:45.380] <TB0> INFO: PixTestPretest::findWorkingPixel()
[11:46:45.380] <TB0> INFO: ----------------------------------------------------------------------
[11:46:45.476] <TB0> INFO: Expecting 231680 events.
[11:46:56.036] <TB0> INFO: 231680 events read in total (9969ms).
[11:46:56.044] <TB0> INFO: Test took 10659ms.
[11:46:56.297] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:46:56.333] <TB0> INFO: ----------------------------------------------------------------------
[11:46:56.333] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[11:46:56.333] <TB0> INFO: ----------------------------------------------------------------------
[11:46:56.427] <TB0> INFO: Expecting 231680 events.
[11:47:06.210] <TB0> INFO: 231680 events read in total (9191ms).
[11:47:06.220] <TB0> INFO: Test took 9882ms.
[11:47:06.487] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[11:47:06.487] <TB0> INFO: CalDel: 78 70 81 80 93 88 63 84 82 83 75 86 75 80 106 95
[11:47:06.487] <TB0> INFO: VthrComp: 51 52 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[11:47:06.492] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C0.dat
[11:47:06.492] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C1.dat
[11:47:06.492] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C2.dat
[11:47:06.492] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C3.dat
[11:47:06.493] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C4.dat
[11:47:06.493] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C5.dat
[11:47:06.493] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C6.dat
[11:47:06.493] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C7.dat
[11:47:06.493] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C8.dat
[11:47:06.494] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C9.dat
[11:47:06.494] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C10.dat
[11:47:06.494] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C11.dat
[11:47:06.494] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C12.dat
[11:47:06.494] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C13.dat
[11:47:06.495] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C14.dat
[11:47:06.495] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C15.dat
[11:47:06.495] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//tbmParameters_C0a.dat
[11:47:06.495] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//tbmParameters_C0b.dat
[11:47:06.495] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//tbmParameters_C1a.dat
[11:47:06.495] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//tbmParameters_C1b.dat
[11:47:06.496] <TB0> INFO: PixTestPretest::doTest() done, duration: 94 seconds
[11:47:06.553] <TB0> INFO: enter test to run
[11:47:06.554] <TB0> INFO: test: FullTest no parameter change
[11:47:06.554] <TB0> INFO: running: fulltest
[11:47:06.554] <TB0> INFO: ######################################################################
[11:47:06.554] <TB0> INFO: PixTestFullTest::doTest()
[11:47:06.554] <TB0> INFO: ######################################################################
[11:47:06.555] <TB0> INFO: ######################################################################
[11:47:06.555] <TB0> INFO: PixTestAlive::doTest()
[11:47:06.555] <TB0> INFO: ######################################################################
[11:47:06.556] <TB0> INFO: ----------------------------------------------------------------------
[11:47:06.556] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:47:06.556] <TB0> INFO: ----------------------------------------------------------------------
[11:47:06.833] <TB0> INFO: Expecting 41600 events.
[11:47:10.366] <TB0> INFO: 41600 events read in total (2941ms).
[11:47:10.367] <TB0> INFO: Test took 3810ms.
[11:47:10.598] <TB0> INFO: PixTestAlive::aliveTest() done
[11:47:10.599] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0
[11:47:10.600] <TB0> INFO: ----------------------------------------------------------------------
[11:47:10.600] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:47:10.600] <TB0> INFO: ----------------------------------------------------------------------
[11:47:10.843] <TB0> INFO: Expecting 41600 events.
[11:47:13.834] <TB0> INFO: 41600 events read in total (2399ms).
[11:47:13.834] <TB0> INFO: Test took 3232ms.
[11:47:13.834] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:47:14.074] <TB0> INFO: PixTestAlive::maskTest() done
[11:47:14.074] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:47:14.075] <TB0> INFO: ----------------------------------------------------------------------
[11:47:14.076] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:47:14.076] <TB0> INFO: ----------------------------------------------------------------------
[11:47:14.349] <TB0> INFO: Expecting 41600 events.
[11:47:17.902] <TB0> INFO: 41600 events read in total (2961ms).
[11:47:17.903] <TB0> INFO: Test took 3826ms.
[11:47:18.136] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[11:47:18.136] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:47:18.136] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[11:47:18.136] <TB0> INFO: Decoding statistics:
[11:47:18.136] <TB0> INFO: General information:
[11:47:18.136] <TB0> INFO: 16bit words read: 0
[11:47:18.137] <TB0> INFO: valid events total: 0
[11:47:18.137] <TB0> INFO: empty events: 0
[11:47:18.137] <TB0> INFO: valid events with pixels: 0
[11:47:18.137] <TB0> INFO: valid pixel hits: 0
[11:47:18.137] <TB0> INFO: Event errors: 0
[11:47:18.137] <TB0> INFO: start marker: 0
[11:47:18.137] <TB0> INFO: stop marker: 0
[11:47:18.137] <TB0> INFO: overflow: 0
[11:47:18.137] <TB0> INFO: invalid 5bit words: 0
[11:47:18.137] <TB0> INFO: invalid XOR eye diagram: 0
[11:47:18.137] <TB0> INFO: frame (failed synchr.): 0
[11:47:18.137] <TB0> INFO: idle data (no TBM trl): 0
[11:47:18.137] <TB0> INFO: no data (only TBM hdr): 0
[11:47:18.137] <TB0> INFO: TBM errors: 0
[11:47:18.137] <TB0> INFO: flawed TBM headers: 0
[11:47:18.137] <TB0> INFO: flawed TBM trailers: 0
[11:47:18.137] <TB0> INFO: event ID mismatches: 0
[11:47:18.137] <TB0> INFO: ROC errors: 0
[11:47:18.137] <TB0> INFO: missing ROC header(s): 0
[11:47:18.137] <TB0> INFO: misplaced readback start: 0
[11:47:18.137] <TB0> INFO: Pixel decoding errors: 0
[11:47:18.137] <TB0> INFO: pixel data incomplete: 0
[11:47:18.137] <TB0> INFO: pixel address: 0
[11:47:18.137] <TB0> INFO: pulse height fill bit: 0
[11:47:18.137] <TB0> INFO: buffer corruption: 0
[11:47:18.144] <TB0> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C15.dat
[11:47:18.144] <TB0> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr_C15.dat

[11:47:18.144] <TB0> INFO: ######################################################################
[11:47:18.144] <TB0> INFO: PixTestReadback::doTest()
[11:47:18.145] <TB0> INFO: ######################################################################
[11:47:18.145] <TB0> INFO: ----------------------------------------------------------------------
[11:47:18.145] <TB0> INFO: PixTestReadback::CalibrateVd()
[11:47:18.145] <TB0> INFO: ----------------------------------------------------------------------
[11:47:28.108] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C0.dat
[11:47:28.108] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C1.dat
[11:47:28.109] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C2.dat
[11:47:28.109] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C3.dat
[11:47:28.109] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C4.dat
[11:47:28.109] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C5.dat
[11:47:28.109] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C6.dat
[11:47:28.109] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C7.dat
[11:47:28.109] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C8.dat
[11:47:28.109] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C9.dat
[11:47:28.109] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C10.dat
[11:47:28.109] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C11.dat
[11:47:28.109] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C12.dat
[11:47:28.109] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C13.dat
[11:47:28.110] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C14.dat
[11:47:28.110] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C15.dat
[11:47:28.142] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:47:28.142] <TB0> INFO: ----------------------------------------------------------------------
[11:47:28.142] <TB0> INFO: PixTestReadback::CalibrateVa()
[11:47:28.142] <TB0> INFO: ----------------------------------------------------------------------
[11:47:38.073] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C0.dat
[11:47:38.074] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C1.dat
[11:47:38.074] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C2.dat
[11:47:38.074] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C3.dat
[11:47:38.074] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C4.dat
[11:47:38.074] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C5.dat
[11:47:38.074] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C6.dat
[11:47:38.074] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C7.dat
[11:47:38.074] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C8.dat
[11:47:38.074] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C9.dat
[11:47:38.074] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C10.dat
[11:47:38.074] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C11.dat
[11:47:38.074] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C12.dat
[11:47:38.074] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C13.dat
[11:47:38.074] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C14.dat
[11:47:38.074] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C15.dat
[11:47:38.104] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:47:38.104] <TB0> INFO: ----------------------------------------------------------------------
[11:47:38.104] <TB0> INFO: PixTestReadback::readbackVbg()
[11:47:38.104] <TB0> INFO: ----------------------------------------------------------------------
[11:47:45.776] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:47:45.776] <TB0> INFO: ----------------------------------------------------------------------
[11:47:45.776] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[11:47:45.776] <TB0> INFO: ----------------------------------------------------------------------
[11:47:45.776] <TB0> INFO: Vbg will be calibrated using Vd calibration
[11:47:45.776] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 156calibrated Vbg = 1.1839 :::*/*/*/*/
[11:47:45.776] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 146.7calibrated Vbg = 1.17486 :::*/*/*/*/
[11:47:45.776] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 168.4calibrated Vbg = 1.18165 :::*/*/*/*/
[11:47:45.776] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 150.1calibrated Vbg = 1.16551 :::*/*/*/*/
[11:47:45.777] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 153.5calibrated Vbg = 1.18393 :::*/*/*/*/
[11:47:45.777] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 155.9calibrated Vbg = 1.18404 :::*/*/*/*/
[11:47:45.777] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 163.6calibrated Vbg = 1.18441 :::*/*/*/*/
[11:47:45.777] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 161.6calibrated Vbg = 1.19152 :::*/*/*/*/
[11:47:45.777] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 155calibrated Vbg = 1.18326 :::*/*/*/*/
[11:47:45.777] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 153.1calibrated Vbg = 1.16776 :::*/*/*/*/
[11:47:45.777] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150.2calibrated Vbg = 1.17309 :::*/*/*/*/
[11:47:45.777] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 150.8calibrated Vbg = 1.17288 :::*/*/*/*/
[11:47:45.777] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 155calibrated Vbg = 1.17927 :::*/*/*/*/
[11:47:45.777] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 150calibrated Vbg = 1.18056 :::*/*/*/*/
[11:47:45.777] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 161.1calibrated Vbg = 1.18194 :::*/*/*/*/
[11:47:45.777] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 160.2calibrated Vbg = 1.17991 :::*/*/*/*/
[11:47:45.779] <TB0> INFO: ----------------------------------------------------------------------
[11:47:45.779] <TB0> INFO: PixTestReadback::CalibrateIa()
[11:47:45.780] <TB0> INFO: ----------------------------------------------------------------------
[11:50:26.611] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C0.dat
[11:50:26.611] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C1.dat
[11:50:26.611] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C2.dat
[11:50:26.611] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C3.dat
[11:50:26.611] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C4.dat
[11:50:26.611] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C5.dat
[11:50:26.611] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C6.dat
[11:50:26.611] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C7.dat
[11:50:26.611] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C8.dat
[11:50:26.611] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C9.dat
[11:50:26.612] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C10.dat
[11:50:26.612] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C11.dat
[11:50:26.612] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C12.dat
[11:50:26.612] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C13.dat
[11:50:26.612] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C14.dat
[11:50:26.612] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C15.dat
[11:50:26.643] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:50:26.646] <TB0> INFO: PixTestReadback::doTest() done
[11:50:26.646] <TB0> INFO: Decoding statistics:
[11:50:26.646] <TB0> INFO: General information:
[11:50:26.646] <TB0> INFO: 16bit words read: 1536
[11:50:26.646] <TB0> INFO: valid events total: 256
[11:50:26.646] <TB0> INFO: empty events: 256
[11:50:26.646] <TB0> INFO: valid events with pixels: 0
[11:50:26.646] <TB0> INFO: valid pixel hits: 0
[11:50:26.646] <TB0> INFO: Event errors: 0
[11:50:26.646] <TB0> INFO: start marker: 0
[11:50:26.646] <TB0> INFO: stop marker: 0
[11:50:26.646] <TB0> INFO: overflow: 0
[11:50:26.646] <TB0> INFO: invalid 5bit words: 0
[11:50:26.647] <TB0> INFO: invalid XOR eye diagram: 0
[11:50:26.647] <TB0> INFO: frame (failed synchr.): 0
[11:50:26.647] <TB0> INFO: idle data (no TBM trl): 0
[11:50:26.647] <TB0> INFO: no data (only TBM hdr): 0
[11:50:26.647] <TB0> INFO: TBM errors: 0
[11:50:26.647] <TB0> INFO: flawed TBM headers: 0
[11:50:26.647] <TB0> INFO: flawed TBM trailers: 0
[11:50:26.647] <TB0> INFO: event ID mismatches: 0
[11:50:26.647] <TB0> INFO: ROC errors: 0
[11:50:26.647] <TB0> INFO: missing ROC header(s): 0
[11:50:26.647] <TB0> INFO: misplaced readback start: 0
[11:50:26.647] <TB0> INFO: Pixel decoding errors: 0
[11:50:26.647] <TB0> INFO: pixel data incomplete: 0
[11:50:26.647] <TB0> INFO: pixel address: 0
[11:50:26.647] <TB0> INFO: pulse height fill bit: 0
[11:50:26.647] <TB0> INFO: buffer corruption: 0
[11:50:26.695] <TB0> INFO: ######################################################################
[11:50:26.695] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:50:26.695] <TB0> INFO: ######################################################################
[11:50:26.698] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[11:50:26.990] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:50:26.990] <TB0> INFO: run 1 of 1
[11:50:27.227] <TB0> INFO: Expecting 3120000 events.
[11:50:59.610] <TB0> INFO: 671855 events read in total (31791ms).











[11:51:30.277] <TB0> INFO: 1337550 events read in total (62458ms).





















[11:52:01.058] <TB0> INFO: 1997985 events read in total (93239ms).











[11:52:31.737] <TB0> INFO: 2655100 events read in total (123918ms).











[11:52:53.182] <TB0> INFO: 3120000 events read in total (145363ms).
[11:52:53.262] <TB0> INFO: Test took 146272ms.
[11:53:20.637] <TB0> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 173 seconds
[11:53:20.637] <TB0> INFO: number of dead bumps (per ROC): 1 0 0 5 0 0 2 0 0 2 0 8 24 1 3 1
[11:53:20.637] <TB0> INFO: separation cut (per ROC): 105 106 121 107 106 108 107 104 105 108 107 110 104 104 108 111
[11:53:20.637] <TB0> INFO: Decoding statistics:
[11:53:20.637] <TB0> INFO: General information:
[11:53:20.637] <TB0> INFO: 16bit words read: 0
[11:53:20.637] <TB0> INFO: valid events total: 0
[11:53:20.637] <TB0> INFO: empty events: 0
[11:53:20.637] <TB0> INFO: valid events with pixels: 0
[11:53:20.637] <TB0> INFO: valid pixel hits: 0
[11:53:20.637] <TB0> INFO: Event errors: 0
[11:53:20.637] <TB0> INFO: start marker: 0
[11:53:20.637] <TB0> INFO: stop marker: 0
[11:53:20.637] <TB0> INFO: overflow: 0
[11:53:20.637] <TB0> INFO: invalid 5bit words: 0
[11:53:20.637] <TB0> INFO: invalid XOR eye diagram: 0
[11:53:20.637] <TB0> INFO: frame (failed synchr.): 0
[11:53:20.637] <TB0> INFO: idle data (no TBM trl): 0
[11:53:20.637] <TB0> INFO: no data (only TBM hdr): 0
[11:53:20.637] <TB0> INFO: TBM errors: 0
[11:53:20.637] <TB0> INFO: flawed TBM headers: 0
[11:53:20.637] <TB0> INFO: flawed TBM trailers: 0
[11:53:20.637] <TB0> INFO: event ID mismatches: 0
[11:53:20.637] <TB0> INFO: ROC errors: 0
[11:53:20.637] <TB0> INFO: missing ROC header(s): 0
[11:53:20.637] <TB0> INFO: misplaced readback start: 0
[11:53:20.637] <TB0> INFO: Pixel decoding errors: 0
[11:53:20.637] <TB0> INFO: pixel data incomplete: 0
[11:53:20.637] <TB0> INFO: pixel address: 0
[11:53:20.637] <TB0> INFO: pulse height fill bit: 0
[11:53:20.637] <TB0> INFO: buffer corruption: 0
[11:53:20.676] <TB0> INFO: ######################################################################
[11:53:20.676] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:53:20.676] <TB0> INFO: ######################################################################
[11:53:20.676] <TB0> INFO: ----------------------------------------------------------------------
[11:53:20.676] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:53:20.676] <TB0> INFO: ----------------------------------------------------------------------
[11:53:20.676] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[11:53:20.689] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[11:53:20.689] <TB0> INFO: run 1 of 1
[11:53:20.966] <TB0> INFO: Expecting 36608000 events.
[11:53:45.145] <TB0> INFO: 697100 events read in total (23587ms).
[11:54:08.613] <TB0> INFO: 1378300 events read in total (47055ms).
[11:54:31.889] <TB0> INFO: 2058500 events read in total (70331ms).
[11:54:54.935] <TB0> INFO: 2739950 events read in total (93377ms).
[11:55:18.281] <TB0> INFO: 3419050 events read in total (116723ms).
[11:55:41.501] <TB0> INFO: 4097450 events read in total (139943ms).
[11:56:04.609] <TB0> INFO: 4774500 events read in total (163051ms).
[11:56:28.029] <TB0> INFO: 5449550 events read in total (186471ms).
[11:56:51.101] <TB0> INFO: 6129000 events read in total (209543ms).
[11:57:14.456] <TB0> INFO: 6807500 events read in total (232898ms).
[11:57:37.575] <TB0> INFO: 7485000 events read in total (256017ms).
[11:58:01.215] <TB0> INFO: 8163450 events read in total (279657ms).
[11:58:24.363] <TB0> INFO: 8841300 events read in total (302805ms).
[11:58:47.291] <TB0> INFO: 9517350 events read in total (325733ms).
[11:59:10.366] <TB0> INFO: 10193100 events read in total (348808ms).
[11:59:33.536] <TB0> INFO: 10868050 events read in total (371978ms).
[11:59:56.756] <TB0> INFO: 11543900 events read in total (395198ms).
[12:00:19.755] <TB0> INFO: 12218300 events read in total (418197ms).
[12:00:42.767] <TB0> INFO: 12890700 events read in total (441209ms).
[12:01:05.829] <TB0> INFO: 13564600 events read in total (464271ms).
[12:01:28.874] <TB0> INFO: 14236050 events read in total (487316ms).
[12:01:52.060] <TB0> INFO: 14909750 events read in total (510502ms).
[12:02:15.548] <TB0> INFO: 15582050 events read in total (533990ms).
[12:02:38.545] <TB0> INFO: 16252950 events read in total (556987ms).
[12:03:01.698] <TB0> INFO: 16925150 events read in total (580140ms).
[12:03:24.656] <TB0> INFO: 17594900 events read in total (603098ms).
[12:03:47.789] <TB0> INFO: 18263250 events read in total (626231ms).
[12:04:11.173] <TB0> INFO: 18932900 events read in total (649615ms).
[12:04:34.114] <TB0> INFO: 19599900 events read in total (672556ms).
[12:04:57.373] <TB0> INFO: 20267350 events read in total (695815ms).
[12:05:20.443] <TB0> INFO: 20933800 events read in total (718885ms).
[12:05:43.731] <TB0> INFO: 21601650 events read in total (742173ms).
[12:06:06.774] <TB0> INFO: 22268500 events read in total (765216ms).
[12:06:29.900] <TB0> INFO: 22933700 events read in total (788342ms).
[12:06:52.801] <TB0> INFO: 23599150 events read in total (811243ms).
[12:07:15.948] <TB0> INFO: 24263350 events read in total (834390ms).
[12:07:38.987] <TB0> INFO: 24928850 events read in total (857429ms).
[12:08:02.103] <TB0> INFO: 25593650 events read in total (880545ms).
[12:08:25.528] <TB0> INFO: 26256850 events read in total (903970ms).
[12:08:48.935] <TB0> INFO: 26919700 events read in total (927377ms).
[12:09:12.190] <TB0> INFO: 27585650 events read in total (950632ms).
[12:09:35.272] <TB0> INFO: 28249050 events read in total (973714ms).
[12:09:58.532] <TB0> INFO: 28913850 events read in total (996974ms).
[12:10:21.660] <TB0> INFO: 29576050 events read in total (1020102ms).
[12:10:44.805] <TB0> INFO: 30237900 events read in total (1043247ms).
[12:11:07.998] <TB0> INFO: 30901900 events read in total (1066440ms).
[12:11:30.894] <TB0> INFO: 31563700 events read in total (1089336ms).
[12:11:53.827] <TB0> INFO: 32225550 events read in total (1112269ms).
[12:12:17.132] <TB0> INFO: 32889200 events read in total (1135574ms).
[12:12:40.096] <TB0> INFO: 33551600 events read in total (1158538ms).
[12:13:03.013] <TB0> INFO: 34214350 events read in total (1181455ms).
[12:13:26.008] <TB0> INFO: 34879600 events read in total (1204450ms).
[12:13:48.898] <TB0> INFO: 35543100 events read in total (1227340ms).
[12:14:12.028] <TB0> INFO: 36212350 events read in total (1250470ms).
[12:14:25.663] <TB0> INFO: 36608000 events read in total (1264105ms).
[12:14:25.774] <TB0> INFO: Test took 1265085ms.
[12:14:26.244] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:14:28.143] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:14:30.094] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:14:31.794] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:14:33.715] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:14:35.779] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:14:37.734] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:14:39.413] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:14:41.531] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:14:43.534] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:14:45.542] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:14:47.463] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:14:49.395] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:14:50.878] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:14:52.392] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:14:53.799] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:14:55.275] <TB0> INFO: PixTestScurves::scurves() done
[12:14:55.275] <TB0> INFO: Vcal mean: 119.70 125.86 125.62 129.11 123.07 129.20 119.98 132.56 118.01 133.06 118.23 112.63 121.62 127.07 116.40 128.63
[12:14:55.275] <TB0> INFO: Vcal RMS: 5.81 5.91 6.81 6.05 5.51 6.12 5.80 6.58 5.62 6.26 6.21 5.49 6.47 6.31 5.05 7.48
[12:14:55.275] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1294 seconds
[12:14:55.275] <TB0> INFO: Decoding statistics:
[12:14:55.275] <TB0> INFO: General information:
[12:14:55.275] <TB0> INFO: 16bit words read: 0
[12:14:55.275] <TB0> INFO: valid events total: 0
[12:14:55.275] <TB0> INFO: empty events: 0
[12:14:55.275] <TB0> INFO: valid events with pixels: 0
[12:14:55.275] <TB0> INFO: valid pixel hits: 0
[12:14:55.275] <TB0> INFO: Event errors: 0
[12:14:55.275] <TB0> INFO: start marker: 0
[12:14:55.275] <TB0> INFO: stop marker: 0
[12:14:55.275] <TB0> INFO: overflow: 0
[12:14:55.275] <TB0> INFO: invalid 5bit words: 0
[12:14:55.275] <TB0> INFO: invalid XOR eye diagram: 0
[12:14:55.275] <TB0> INFO: frame (failed synchr.): 0
[12:14:55.275] <TB0> INFO: idle data (no TBM trl): 0
[12:14:55.276] <TB0> INFO: no data (only TBM hdr): 0
[12:14:55.276] <TB0> INFO: TBM errors: 0
[12:14:55.276] <TB0> INFO: flawed TBM headers: 0
[12:14:55.276] <TB0> INFO: flawed TBM trailers: 0
[12:14:55.276] <TB0> INFO: event ID mismatches: 0
[12:14:55.276] <TB0> INFO: ROC errors: 0
[12:14:55.276] <TB0> INFO: missing ROC header(s): 0
[12:14:55.276] <TB0> INFO: misplaced readback start: 0
[12:14:55.276] <TB0> INFO: Pixel decoding errors: 0
[12:14:55.276] <TB0> INFO: pixel data incomplete: 0
[12:14:55.276] <TB0> INFO: pixel address: 0
[12:14:55.276] <TB0> INFO: pulse height fill bit: 0
[12:14:55.276] <TB0> INFO: buffer corruption: 0
[12:14:55.369] <TB0> INFO: ######################################################################
[12:14:55.369] <TB0> INFO: PixTestTrim::doTest()
[12:14:55.369] <TB0> INFO: ######################################################################
[12:14:55.370] <TB0> INFO: ----------------------------------------------------------------------
[12:14:55.370] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[12:14:55.370] <TB0> INFO: ----------------------------------------------------------------------
[12:14:55.438] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:14:55.438] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:14:55.452] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:14:55.452] <TB0> INFO: run 1 of 1
[12:14:55.777] <TB0> INFO: Expecting 5025280 events.
[12:15:27.450] <TB0> INFO: 831984 events read in total (31062ms).
[12:15:58.146] <TB0> INFO: 1661544 events read in total (61759ms).
[12:16:29.062] <TB0> INFO: 2486808 events read in total (92674ms).
[12:16:59.709] <TB0> INFO: 3307808 events read in total (123321ms).
[12:17:30.130] <TB0> INFO: 4122976 events read in total (153742ms).
[12:18:00.380] <TB0> INFO: 4935896 events read in total (183992ms).
[12:18:04.139] <TB0> INFO: 5025280 events read in total (187751ms).
[12:18:04.206] <TB0> INFO: Test took 188753ms.
[12:18:22.817] <TB0> INFO: ROC 0 VthrComp = 126
[12:18:22.817] <TB0> INFO: ROC 1 VthrComp = 130
[12:18:22.817] <TB0> INFO: ROC 2 VthrComp = 132
[12:18:22.817] <TB0> INFO: ROC 3 VthrComp = 130
[12:18:22.817] <TB0> INFO: ROC 4 VthrComp = 123
[12:18:22.818] <TB0> INFO: ROC 5 VthrComp = 126
[12:18:22.818] <TB0> INFO: ROC 6 VthrComp = 129
[12:18:22.818] <TB0> INFO: ROC 7 VthrComp = 128
[12:18:22.818] <TB0> INFO: ROC 8 VthrComp = 115
[12:18:22.818] <TB0> INFO: ROC 9 VthrComp = 128
[12:18:22.818] <TB0> INFO: ROC 10 VthrComp = 125
[12:18:22.819] <TB0> INFO: ROC 11 VthrComp = 116
[12:18:22.819] <TB0> INFO: ROC 12 VthrComp = 117
[12:18:22.819] <TB0> INFO: ROC 13 VthrComp = 124
[12:18:22.819] <TB0> INFO: ROC 14 VthrComp = 122
[12:18:22.819] <TB0> INFO: ROC 15 VthrComp = 125
[12:18:23.146] <TB0> INFO: Expecting 41600 events.
[12:18:26.823] <TB0> INFO: 41600 events read in total (3086ms).
[12:18:26.823] <TB0> INFO: Test took 4003ms.
[12:18:26.835] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:18:26.835] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:18:26.847] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:18:26.847] <TB0> INFO: run 1 of 1
[12:18:27.125] <TB0> INFO: Expecting 5025280 events.
[12:18:54.013] <TB0> INFO: 591672 events read in total (26297ms).
[12:19:19.986] <TB0> INFO: 1181808 events read in total (52270ms).
[12:19:46.182] <TB0> INFO: 1771816 events read in total (78466ms).
[12:20:12.239] <TB0> INFO: 2360728 events read in total (104523ms).
[12:20:38.488] <TB0> INFO: 2947344 events read in total (130772ms).
[12:21:04.577] <TB0> INFO: 3532048 events read in total (156861ms).
[12:21:30.671] <TB0> INFO: 4116272 events read in total (182955ms).
[12:21:56.689] <TB0> INFO: 4700440 events read in total (208973ms).
[12:22:11.402] <TB0> INFO: 5025280 events read in total (223686ms).
[12:22:11.542] <TB0> INFO: Test took 224695ms.
[12:22:41.659] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 58.0385 for pixel 8/61 mean/min/max = 45.1472/32.2465/58.048
[12:22:41.659] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 58.9657 for pixel 7/65 mean/min/max = 45.8209/32.6025/59.0392
[12:22:41.659] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 62.5996 for pixel 1/0 mean/min/max = 49.0843/35.5099/62.6586
[12:22:41.660] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 60.1561 for pixel 13/4 mean/min/max = 45.9319/31.696/60.1678
[12:22:41.660] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 58.7072 for pixel 11/22 mean/min/max = 46.0875/33.4584/58.7166
[12:22:41.661] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 61.4467 for pixel 18/11 mean/min/max = 46.4636/31.3012/61.626
[12:22:41.661] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 58.2143 for pixel 4/62 mean/min/max = 44.9187/31.4006/58.4367
[12:22:41.661] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 63.2573 for pixel 1/14 mean/min/max = 47.6127/31.781/63.4443
[12:22:41.662] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 62.9319 for pixel 0/12 mean/min/max = 47.714/32.3034/63.1247
[12:22:41.662] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 63.5697 for pixel 1/38 mean/min/max = 48.5413/33.3918/63.6909
[12:22:41.663] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 58.2769 for pixel 4/70 mean/min/max = 45.061/31.7287/58.3932
[12:22:41.663] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 58.0927 for pixel 0/13 mean/min/max = 45.5483/32.9707/58.1259
[12:22:41.663] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 61.4597 for pixel 44/69 mean/min/max = 46.9072/32.3504/61.464
[12:22:41.664] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 63.7052 for pixel 6/9 mean/min/max = 48.5309/33.3038/63.7581
[12:22:41.664] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 58.3748 for pixel 41/0 mean/min/max = 46.1475/33.7027/58.5924
[12:22:41.664] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 67.7483 for pixel 4/4 mean/min/max = 49.565/30.9547/68.1752
[12:22:41.665] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:41.754] <TB0> INFO: Expecting 411648 events.
[12:22:51.320] <TB0> INFO: 411648 events read in total (8975ms).
[12:22:51.328] <TB0> INFO: Expecting 411648 events.
[12:23:00.571] <TB0> INFO: 411648 events read in total (8840ms).
[12:23:00.583] <TB0> INFO: Expecting 411648 events.
[12:23:09.916] <TB0> INFO: 411648 events read in total (8930ms).
[12:23:09.934] <TB0> INFO: Expecting 411648 events.
[12:23:19.219] <TB0> INFO: 411648 events read in total (8882ms).
[12:23:19.241] <TB0> INFO: Expecting 411648 events.
[12:23:28.575] <TB0> INFO: 411648 events read in total (8931ms).
[12:23:28.594] <TB0> INFO: Expecting 411648 events.
[12:23:37.782] <TB0> INFO: 411648 events read in total (8784ms).
[12:23:37.804] <TB0> INFO: Expecting 411648 events.
[12:23:47.058] <TB0> INFO: 411648 events read in total (8851ms).
[12:23:47.089] <TB0> INFO: Expecting 411648 events.
[12:23:56.408] <TB0> INFO: 411648 events read in total (8916ms).
[12:23:56.442] <TB0> INFO: Expecting 411648 events.
[12:24:05.792] <TB0> INFO: 411648 events read in total (8947ms).
[12:24:05.822] <TB0> INFO: Expecting 411648 events.
[12:24:15.143] <TB0> INFO: 411648 events read in total (8918ms).
[12:24:15.183] <TB0> INFO: Expecting 411648 events.
[12:24:24.498] <TB0> INFO: 411648 events read in total (8912ms).
[12:24:24.544] <TB0> INFO: Expecting 411648 events.
[12:24:33.730] <TB0> INFO: 411648 events read in total (8783ms).
[12:24:33.781] <TB0> INFO: Expecting 411648 events.
[12:24:42.944] <TB0> INFO: 411648 events read in total (8760ms).
[12:24:42.988] <TB0> INFO: Expecting 411648 events.
[12:24:52.342] <TB0> INFO: 411648 events read in total (8951ms).
[12:24:52.395] <TB0> INFO: Expecting 411648 events.
[12:25:01.670] <TB0> INFO: 411648 events read in total (8872ms).
[12:25:01.721] <TB0> INFO: Expecting 411648 events.
[12:25:11.175] <TB0> INFO: 411648 events read in total (9051ms).
[12:25:11.283] <TB0> INFO: Test took 149618ms.
[12:25:11.957] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[12:25:11.969] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:25:11.969] <TB0> INFO: run 1 of 1
[12:25:12.208] <TB0> INFO: Expecting 5025280 events.
[12:25:39.066] <TB0> INFO: 589672 events read in total (26267ms).
[12:26:05.656] <TB0> INFO: 1178584 events read in total (52857ms).
[12:26:32.565] <TB0> INFO: 1766152 events read in total (79766ms).
[12:26:59.217] <TB0> INFO: 2353968 events read in total (106418ms).
[12:27:26.238] <TB0> INFO: 2942840 events read in total (133439ms).
[12:27:53.695] <TB0> INFO: 3532752 events read in total (160896ms).
[12:28:21.586] <TB0> INFO: 4122760 events read in total (188787ms).
[12:28:49.416] <TB0> INFO: 4711712 events read in total (216618ms).
[12:29:05.200] <TB0> INFO: 5025280 events read in total (232401ms).
[12:29:05.407] <TB0> INFO: Test took 233438ms.
[12:29:31.695] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 2.383883 .. 143.226400
[12:29:31.936] <TB0> INFO: Expecting 208000 events.
[12:29:41.919] <TB0> INFO: 208000 events read in total (9388ms).
[12:29:41.921] <TB0> INFO: Test took 10224ms.
[12:29:41.971] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 2 .. 153 (-1/-1) hits flags = 528 (plus default)
[12:29:41.984] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:29:41.984] <TB0> INFO: run 1 of 1
[12:29:42.263] <TB0> INFO: Expecting 5058560 events.
[12:30:08.659] <TB0> INFO: 584192 events read in total (25804ms).
[12:30:35.028] <TB0> INFO: 1168384 events read in total (52173ms).
[12:31:01.697] <TB0> INFO: 1753024 events read in total (78842ms).
[12:31:28.535] <TB0> INFO: 2337032 events read in total (105681ms).
[12:32:44.825] <TB0> INFO: 2921232 events read in total (181970ms).
[12:33:11.652] <TB0> INFO: 3504456 events read in total (208797ms).
[12:33:37.733] <TB0> INFO: 4087472 events read in total (234878ms).
[12:34:03.622] <TB0> INFO: 4670424 events read in total (260767ms).
[12:34:22.104] <TB0> INFO: 5058560 events read in total (279249ms).
[12:34:22.264] <TB0> INFO: Test took 280280ms.
[12:34:47.744] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 27.668406 .. 45.747704
[12:34:48.012] <TB0> INFO: Expecting 208000 events.
[12:34:58.106] <TB0> INFO: 208000 events read in total (9502ms).
[12:34:58.107] <TB0> INFO: Test took 10362ms.
[12:34:58.155] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 55 (-1/-1) hits flags = 528 (plus default)
[12:34:58.170] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:34:58.170] <TB0> INFO: run 1 of 1
[12:34:58.448] <TB0> INFO: Expecting 1297920 events.
[12:35:27.282] <TB0> INFO: 662960 events read in total (28242ms).
[12:35:54.685] <TB0> INFO: 1297920 events read in total (55645ms).
[12:35:54.724] <TB0> INFO: Test took 56553ms.
[12:36:07.970] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 27.683369 .. 48.144821
[12:36:08.209] <TB0> INFO: Expecting 208000 events.
[12:36:18.030] <TB0> INFO: 208000 events read in total (9229ms).
[12:36:18.031] <TB0> INFO: Test took 10059ms.
[12:36:18.081] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 17 .. 58 (-1/-1) hits flags = 528 (plus default)
[12:36:18.094] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:36:18.094] <TB0> INFO: run 1 of 1
[12:36:18.373] <TB0> INFO: Expecting 1397760 events.
[12:36:46.842] <TB0> INFO: 650520 events read in total (27878ms).
[12:37:15.199] <TB0> INFO: 1299264 events read in total (56236ms).
[12:37:19.890] <TB0> INFO: 1397760 events read in total (60926ms).
[12:37:19.929] <TB0> INFO: Test took 61835ms.
[12:37:33.412] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 26.079908 .. 48.805216
[12:37:33.649] <TB0> INFO: Expecting 208000 events.
[12:37:43.535] <TB0> INFO: 208000 events read in total (9294ms).
[12:37:43.536] <TB0> INFO: Test took 10123ms.
[12:37:43.588] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 16 .. 58 (-1/-1) hits flags = 528 (plus default)
[12:37:43.601] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:37:43.601] <TB0> INFO: run 1 of 1
[12:37:43.879] <TB0> INFO: Expecting 1431040 events.
[12:38:11.970] <TB0> INFO: 653280 events read in total (27501ms).
[12:38:39.366] <TB0> INFO: 1305920 events read in total (54896ms).
[12:38:45.179] <TB0> INFO: 1431040 events read in total (60709ms).
[12:38:45.222] <TB0> INFO: Test took 61621ms.
[12:38:58.788] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:38:58.788] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[12:38:58.802] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:38:58.802] <TB0> INFO: run 1 of 1
[12:38:59.041] <TB0> INFO: Expecting 1364480 events.
[12:39:28.338] <TB0> INFO: 669424 events read in total (28705ms).
[12:39:56.671] <TB0> INFO: 1337296 events read in total (57038ms).
[12:39:58.273] <TB0> INFO: 1364480 events read in total (58641ms).
[12:39:58.304] <TB0> INFO: Test took 59502ms.
[12:40:11.503] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C0.dat
[12:40:11.503] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C1.dat
[12:40:11.503] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C2.dat
[12:40:11.503] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C3.dat
[12:40:11.503] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C4.dat
[12:40:11.504] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C5.dat
[12:40:11.504] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C6.dat
[12:40:11.504] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C7.dat
[12:40:11.504] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C8.dat
[12:40:11.504] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C9.dat
[12:40:11.504] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C10.dat
[12:40:11.504] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C11.dat
[12:40:11.504] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C12.dat
[12:40:11.504] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C13.dat
[12:40:11.504] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C14.dat
[12:40:11.504] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C15.dat
[12:40:11.505] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C0.dat
[12:40:11.512] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C1.dat
[12:40:11.519] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C2.dat
[12:40:11.527] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C3.dat
[12:40:11.534] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C4.dat
[12:40:11.542] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C5.dat
[12:40:11.549] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C6.dat
[12:40:11.556] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C7.dat
[12:40:11.564] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C8.dat
[12:40:11.571] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C9.dat
[12:40:11.578] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C10.dat
[12:40:11.586] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C11.dat
[12:40:11.593] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C12.dat
[12:40:11.600] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C13.dat
[12:40:11.608] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C14.dat
[12:40:11.615] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C15.dat
[12:40:11.623] <TB0> INFO: PixTestTrim::trimTest() done
[12:40:11.623] <TB0> INFO: vtrim: 118 115 151 119 136 115 115 132 113 136 119 107 120 129 118 159
[12:40:11.623] <TB0> INFO: vthrcomp: 126 130 132 130 123 126 129 128 115 128 125 116 117 124 122 125
[12:40:11.623] <TB0> INFO: vcal mean: 34.96 35.30 35.04 35.15 35.06 35.51 35.00 35.84 35.07 35.41 35.10 34.99 35.61 35.34 35.04 35.13
[12:40:11.623] <TB0> INFO: vcal RMS: 1.08 1.30 0.99 1.23 1.07 1.66 1.07 2.02 1.07 1.66 1.30 0.98 1.86 1.52 1.00 1.26
[12:40:11.623] <TB0> INFO: bits mean: 9.78 9.67 8.39 9.54 9.35 9.88 9.82 9.80 8.81 9.18 10.06 8.58 10.02 9.26 9.18 9.25
[12:40:11.623] <TB0> INFO: bits RMS: 2.63 2.67 2.37 2.78 2.56 2.79 2.68 2.75 2.90 2.68 2.54 2.99 2.51 2.59 2.61 2.70
[12:40:11.631] <TB0> INFO: ----------------------------------------------------------------------
[12:40:11.631] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[12:40:11.631] <TB0> INFO: ----------------------------------------------------------------------
[12:40:11.634] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[12:40:11.648] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:40:11.648] <TB0> INFO: run 1 of 1
[12:40:11.909] <TB0> INFO: Expecting 4160000 events.
[12:40:44.646] <TB0> INFO: 767315 events read in total (32145ms).
[12:41:16.947] <TB0> INFO: 1527765 events read in total (64446ms).
[12:41:49.285] <TB0> INFO: 2280770 events read in total (96784ms).
[12:42:20.926] <TB0> INFO: 3026830 events read in total (128425ms).
[12:42:52.867] <TB0> INFO: 3769880 events read in total (160366ms).
[12:43:09.598] <TB0> INFO: 4160000 events read in total (177097ms).
[12:43:09.691] <TB0> INFO: Test took 178043ms.
[12:43:37.448] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[12:43:37.462] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:43:37.462] <TB0> INFO: run 1 of 1
[12:43:37.733] <TB0> INFO: Expecting 4305600 events.
[12:44:10.024] <TB0> INFO: 731865 events read in total (31699ms).
[12:44:41.576] <TB0> INFO: 1458760 events read in total (63251ms).
[12:45:12.824] <TB0> INFO: 2180485 events read in total (94499ms).
[12:45:44.167] <TB0> INFO: 2895765 events read in total (125842ms).
[12:46:15.263] <TB0> INFO: 3607130 events read in total (156938ms).
[12:46:46.879] <TB0> INFO: 4305600 events read in total (188554ms).
[12:46:47.038] <TB0> INFO: Test took 189576ms.
[12:47:16.174] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[12:47:16.188] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:47:16.188] <TB0> INFO: run 1 of 1
[12:47:16.425] <TB0> INFO: Expecting 4305600 events.
[12:47:49.154] <TB0> INFO: 732000 events read in total (32137ms).
[12:48:19.812] <TB0> INFO: 1459390 events read in total (62795ms).
[12:48:51.366] <TB0> INFO: 2181480 events read in total (94349ms).
[12:49:22.889] <TB0> INFO: 2897075 events read in total (125872ms).
[12:49:54.531] <TB0> INFO: 3608965 events read in total (157514ms).
[12:50:25.172] <TB0> INFO: 4305600 events read in total (188155ms).
[12:50:25.305] <TB0> INFO: Test took 189117ms.
[12:50:51.366] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 205 (-1/-1) hits flags = 528 (plus default)
[12:50:51.380] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:50:51.380] <TB0> INFO: run 1 of 1
[12:50:51.616] <TB0> INFO: Expecting 4284800 events.
[12:51:24.129] <TB0> INFO: 733770 events read in total (31922ms).
[12:51:55.778] <TB0> INFO: 1462270 events read in total (63571ms).
[12:52:28.143] <TB0> INFO: 2185565 events read in total (95936ms).
[12:52:59.715] <TB0> INFO: 2902300 events read in total (127508ms).
[12:53:31.033] <TB0> INFO: 3615105 events read in total (158826ms).
[12:54:00.604] <TB0> INFO: 4284800 events read in total (188397ms).
[12:54:00.713] <TB0> INFO: Test took 189334ms.
[12:54:31.466] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 207 (-1/-1) hits flags = 528 (plus default)
[12:54:31.480] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:54:31.480] <TB0> INFO: run 1 of 1
[12:54:31.760] <TB0> INFO: Expecting 4326400 events.
[12:55:04.216] <TB0> INFO: 730585 events read in total (31864ms).
[12:55:35.826] <TB0> INFO: 1456700 events read in total (63474ms).
[12:56:07.633] <TB0> INFO: 2177565 events read in total (95281ms).
[12:56:38.995] <TB0> INFO: 2891890 events read in total (126643ms).
[12:57:10.239] <TB0> INFO: 3602780 events read in total (157887ms).
[12:57:41.596] <TB0> INFO: 4314190 events read in total (189244ms).
[12:57:42.525] <TB0> INFO: 4326400 events read in total (190173ms).
[12:57:42.624] <TB0> INFO: Test took 191144ms.
[12:58:10.428] <TB0> INFO: PixTestTrim::trimBitTest() done
[12:58:10.429] <TB0> INFO: PixTestTrim::doTest() done, duration: 2595 seconds
[12:58:10.429] <TB0> INFO: Decoding statistics:
[12:58:10.429] <TB0> INFO: General information:
[12:58:10.429] <TB0> INFO: 16bit words read: 0
[12:58:10.429] <TB0> INFO: valid events total: 0
[12:58:10.429] <TB0> INFO: empty events: 0
[12:58:10.429] <TB0> INFO: valid events with pixels: 0
[12:58:10.429] <TB0> INFO: valid pixel hits: 0
[12:58:10.429] <TB0> INFO: Event errors: 0
[12:58:10.429] <TB0> INFO: start marker: 0
[12:58:10.429] <TB0> INFO: stop marker: 0
[12:58:10.429] <TB0> INFO: overflow: 0
[12:58:10.429] <TB0> INFO: invalid 5bit words: 0
[12:58:10.429] <TB0> INFO: invalid XOR eye diagram: 0
[12:58:10.429] <TB0> INFO: frame (failed synchr.): 0
[12:58:10.429] <TB0> INFO: idle data (no TBM trl): 0
[12:58:10.429] <TB0> INFO: no data (only TBM hdr): 0
[12:58:10.429] <TB0> INFO: TBM errors: 0
[12:58:10.429] <TB0> INFO: flawed TBM headers: 0
[12:58:10.429] <TB0> INFO: flawed TBM trailers: 0
[12:58:10.429] <TB0> INFO: event ID mismatches: 0
[12:58:10.429] <TB0> INFO: ROC errors: 0
[12:58:10.429] <TB0> INFO: missing ROC header(s): 0
[12:58:10.429] <TB0> INFO: misplaced readback start: 0
[12:58:10.429] <TB0> INFO: Pixel decoding errors: 0
[12:58:10.429] <TB0> INFO: pixel data incomplete: 0
[12:58:10.429] <TB0> INFO: pixel address: 0
[12:58:10.429] <TB0> INFO: pulse height fill bit: 0
[12:58:10.429] <TB0> INFO: buffer corruption: 0
[12:58:11.214] <TB0> INFO: ######################################################################
[12:58:11.214] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:58:11.214] <TB0> INFO: ######################################################################
[12:58:11.497] <TB0> INFO: Expecting 41600 events.
[12:58:15.123] <TB0> INFO: 41600 events read in total (3034ms).
[12:58:15.124] <TB0> INFO: Test took 3906ms.
[12:58:15.605] <TB0> INFO: Expecting 41600 events.
[12:58:19.175] <TB0> INFO: 41600 events read in total (2978ms).
[12:58:19.175] <TB0> INFO: Test took 3848ms.
[12:58:19.185] <TB0> INFO: Max pixel from chip 0 is [4 ,8] phvalue 62
[12:58:19.185] <TB0> INFO: Max pixel from chip 1 is [36 ,5] phvalue 90
[12:58:19.185] <TB0> INFO: Max pixel from chip 2 is [4 ,32] phvalue 136
[12:58:19.185] <TB0> INFO: Max pixel from chip 3 is [6 ,14] phvalue 83
[12:58:19.185] <TB0> INFO: Max pixel from chip 4 is [30 ,14] phvalue 155
[12:58:19.186] <TB0> INFO: Max pixel from chip 5 is [5 ,10] phvalue 53
[12:58:19.186] <TB0> INFO: Max pixel from chip 6 is [20 ,6] phvalue 122
[12:58:19.186] <TB0> INFO: Max pixel from chip 7 is [3 ,5] phvalue 111
[12:58:19.186] <TB0> INFO: Max pixel from chip 8 is [10 ,24] phvalue 140
[12:58:19.186] <TB0> INFO: Max pixel from chip 9 is [16 ,11] phvalue 147
[12:58:19.186] <TB0> INFO: Max pixel from chip 10 is [13 ,20] phvalue 74
[12:58:19.186] <TB0> INFO: Max pixel from chip 11 is [9 ,30] phvalue 164
[12:58:19.186] <TB0> INFO: Max pixel from chip 12 is [3 ,17] phvalue 102
[12:58:19.186] <TB0> INFO: Max pixel from chip 13 is [8 ,7] phvalue 172
[12:58:19.187] <TB0> INFO: Max pixel from chip 14 is [4 ,11] phvalue 126
[12:58:19.187] <TB0> INFO: Max pixel from chip 15 is [15 ,11] phvalue 141
[12:58:19.466] <TB0> INFO: Expecting 41600 events.
[12:58:23.058] <TB0> INFO: 41600 events read in total (3000ms).
[12:58:23.058] <TB0> INFO: Test took 3858ms.
[12:58:23.069] <TB0> INFO: Min pixel from chip 0 is [22 ,55] phvalue 245
[12:58:23.069] <TB0> INFO: Min pixel from chip 1 is [33 ,54] phvalue 247
[12:58:23.069] <TB0> INFO: Min pixel from chip 2 is [3 ,5] phvalue 255
[12:58:23.069] <TB0> INFO: Min pixel from chip 3 is [35 ,28] phvalue 252
[12:58:23.069] <TB0> INFO: Min pixel from chip 4 is [3 ,5] phvalue 255
[12:58:23.069] <TB0> INFO: Min pixel from chip 5 is [13 ,50] phvalue 241
[12:58:23.069] <TB0> INFO: Min pixel from chip 6 is [3 ,5] phvalue 255
[12:58:23.070] <TB0> INFO: Min pixel from chip 7 is [3 ,5] phvalue 255
[12:58:23.070] <TB0> INFO: Min pixel from chip 8 is [3 ,5] phvalue 255
[12:58:23.070] <TB0> INFO: Min pixel from chip 9 is [3 ,5] phvalue 255
[12:58:23.070] <TB0> INFO: Min pixel from chip 10 is [17 ,41] phvalue 242
[12:58:23.070] <TB0> INFO: Min pixel from chip 11 is [3 ,5] phvalue 255
[12:58:23.070] <TB0> INFO: Min pixel from chip 12 is [3 ,5] phvalue 255
[12:58:23.070] <TB0> INFO: Min pixel from chip 13 is [3 ,5] phvalue 255
[12:58:23.071] <TB0> INFO: Min pixel from chip 14 is [3 ,5] phvalue 255
[12:58:23.071] <TB0> INFO: Min pixel from chip 15 is [3 ,5] phvalue 255
[12:58:23.349] <TB0> INFO: Expecting 2560 events.
[12:58:24.236] <TB0> INFO: 2560 events read in total (295ms).
[12:58:24.236] <TB0> INFO: Test took 1164ms.
[12:58:24.543] <TB0> INFO: Expecting 2560 events.
[12:58:25.430] <TB0> INFO: 2560 events read in total (295ms).
[12:58:25.430] <TB0> INFO: Test took 1193ms.
[12:58:25.738] <TB0> INFO: Expecting 2560 events.
[12:58:26.633] <TB0> INFO: 2560 events read in total (303ms).
[12:58:26.633] <TB0> INFO: Test took 1202ms.
[12:58:26.941] <TB0> INFO: Expecting 2560 events.
[12:58:27.825] <TB0> INFO: 2560 events read in total (292ms).
[12:58:27.826] <TB0> INFO: Test took 1192ms.
[12:58:28.133] <TB0> INFO: Expecting 2560 events.
[12:58:29.018] <TB0> INFO: 2560 events read in total (294ms).
[12:58:29.018] <TB0> INFO: Test took 1192ms.
[12:58:29.325] <TB0> INFO: Expecting 2560 events.
[12:58:30.212] <TB0> INFO: 2560 events read in total (296ms).
[12:58:30.213] <TB0> INFO: Test took 1194ms.
[12:58:30.520] <TB0> INFO: Expecting 2560 events.
[12:58:31.408] <TB0> INFO: 2560 events read in total (297ms).
[12:58:31.409] <TB0> INFO: Test took 1196ms.
[12:58:31.716] <TB0> INFO: Expecting 2560 events.
[12:58:32.601] <TB0> INFO: 2560 events read in total (294ms).
[12:58:32.601] <TB0> INFO: Test took 1192ms.
[12:58:32.909] <TB0> INFO: Expecting 2560 events.
[12:58:33.790] <TB0> INFO: 2560 events read in total (289ms).
[12:58:33.790] <TB0> INFO: Test took 1188ms.
[12:58:34.098] <TB0> INFO: Expecting 2560 events.
[12:58:34.983] <TB0> INFO: 2560 events read in total (294ms).
[12:58:34.984] <TB0> INFO: Test took 1193ms.
[12:58:35.291] <TB0> INFO: Expecting 2560 events.
[12:58:36.172] <TB0> INFO: 2560 events read in total (290ms).
[12:58:36.173] <TB0> INFO: Test took 1189ms.
[12:58:36.480] <TB0> INFO: Expecting 2560 events.
[12:58:37.362] <TB0> INFO: 2560 events read in total (290ms).
[12:58:37.363] <TB0> INFO: Test took 1190ms.
[12:58:37.670] <TB0> INFO: Expecting 2560 events.
[12:58:38.558] <TB0> INFO: 2560 events read in total (296ms).
[12:58:38.558] <TB0> INFO: Test took 1195ms.
[12:58:38.866] <TB0> INFO: Expecting 2560 events.
[12:58:39.752] <TB0> INFO: 2560 events read in total (294ms).
[12:58:39.752] <TB0> INFO: Test took 1194ms.
[12:58:40.060] <TB0> INFO: Expecting 2560 events.
[12:58:40.944] <TB0> INFO: 2560 events read in total (292ms).
[12:58:40.944] <TB0> INFO: Test took 1191ms.
[12:58:41.252] <TB0> INFO: Expecting 2560 events.
[12:58:42.143] <TB0> INFO: 2560 events read in total (300ms).
[12:58:42.143] <TB0> INFO: Test took 1199ms.
[12:58:42.148] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:58:42.453] <TB0> INFO: Expecting 655360 events.
[12:58:57.490] <TB0> INFO: 655360 events read in total (14446ms).
[12:58:57.505] <TB0> INFO: Expecting 655360 events.
[12:59:11.861] <TB0> INFO: 655360 events read in total (13952ms).
[12:59:11.879] <TB0> INFO: Expecting 655360 events.
[12:59:26.414] <TB0> INFO: 655360 events read in total (14132ms).
[12:59:26.436] <TB0> INFO: Expecting 655360 events.
[12:59:40.724] <TB0> INFO: 655360 events read in total (13885ms).
[12:59:40.753] <TB0> INFO: Expecting 655360 events.
[12:59:55.086] <TB0> INFO: 655360 events read in total (13930ms).
[12:59:55.116] <TB0> INFO: Expecting 655360 events.
[13:00:09.598] <TB0> INFO: 655360 events read in total (14079ms).
[13:00:09.646] <TB0> INFO: Expecting 655360 events.
[13:00:24.275] <TB0> INFO: 655360 events read in total (14227ms).
[13:00:24.316] <TB0> INFO: Expecting 655360 events.
[13:00:38.873] <TB0> INFO: 655360 events read in total (14154ms).
[13:00:38.916] <TB0> INFO: Expecting 655360 events.
[13:00:53.511] <TB0> INFO: 655360 events read in total (14192ms).
[13:00:53.562] <TB0> INFO: Expecting 655360 events.
[13:01:08.125] <TB0> INFO: 655360 events read in total (14160ms).
[13:01:08.176] <TB0> INFO: Expecting 655360 events.
[13:01:22.742] <TB0> INFO: 655360 events read in total (14162ms).
[13:01:22.828] <TB0> INFO: Expecting 655360 events.
[13:01:37.373] <TB0> INFO: 655360 events read in total (14141ms).
[13:01:37.448] <TB0> INFO: Expecting 655360 events.
[13:01:52.170] <TB0> INFO: 655360 events read in total (14319ms).
[13:01:52.253] <TB0> INFO: Expecting 655360 events.
[13:02:07.030] <TB0> INFO: 655360 events read in total (14374ms).
[13:02:07.117] <TB0> INFO: Expecting 655360 events.
[13:02:21.660] <TB0> INFO: 655360 events read in total (14140ms).
[13:02:21.754] <TB0> INFO: Expecting 655360 events.
[13:02:36.344] <TB0> INFO: 655360 events read in total (14187ms).
[13:02:36.482] <TB0> INFO: Test took 234334ms.
[13:02:36.579] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:36.837] <TB0> INFO: Expecting 655360 events.
[13:02:51.497] <TB0> INFO: 655360 events read in total (14068ms).
[13:02:51.512] <TB0> INFO: Expecting 655360 events.
[13:03:05.816] <TB0> INFO: 655360 events read in total (13901ms).
[13:03:05.837] <TB0> INFO: Expecting 655360 events.
[13:03:20.376] <TB0> INFO: 655360 events read in total (14135ms).
[13:03:20.402] <TB0> INFO: Expecting 655360 events.
[13:03:34.943] <TB0> INFO: 655360 events read in total (14137ms).
[13:03:34.969] <TB0> INFO: Expecting 655360 events.
[13:03:49.416] <TB0> INFO: 655360 events read in total (14044ms).
[13:03:49.447] <TB0> INFO: Expecting 655360 events.
[13:04:03.491] <TB0> INFO: 655360 events read in total (13641ms).
[13:04:03.531] <TB0> INFO: Expecting 655360 events.
[13:04:17.666] <TB0> INFO: 655360 events read in total (13732ms).
[13:04:17.707] <TB0> INFO: Expecting 655360 events.
[13:04:31.852] <TB0> INFO: 655360 events read in total (13742ms).
[13:04:31.909] <TB0> INFO: Expecting 655360 events.
[13:04:46.170] <TB0> INFO: 655360 events read in total (13858ms).
[13:04:46.220] <TB0> INFO: Expecting 655360 events.
[13:05:00.224] <TB0> INFO: 655360 events read in total (13601ms).
[13:05:00.280] <TB0> INFO: Expecting 655360 events.
[13:05:14.617] <TB0> INFO: 655360 events read in total (13934ms).
[13:05:14.693] <TB0> INFO: Expecting 655360 events.
[13:05:29.227] <TB0> INFO: 655360 events read in total (14131ms).
[13:05:29.325] <TB0> INFO: Expecting 655360 events.
[13:05:43.678] <TB0> INFO: 655360 events read in total (13950ms).
[13:05:43.795] <TB0> INFO: Expecting 655360 events.
[13:05:58.091] <TB0> INFO: 655360 events read in total (13892ms).
[13:05:58.215] <TB0> INFO: Expecting 655360 events.
[13:06:12.593] <TB0> INFO: 655360 events read in total (13975ms).
[13:06:12.689] <TB0> INFO: Expecting 655360 events.
[13:06:26.993] <TB0> INFO: 655360 events read in total (13901ms).
[13:06:27.098] <TB0> INFO: Test took 230519ms.
[13:06:27.272] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:27.278] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:27.284] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:27.290] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[13:06:27.295] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:27.301] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:27.307] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:27.313] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[13:06:27.319] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[13:06:27.325] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[13:06:27.330] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:27.337] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:27.342] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[13:06:27.348] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[13:06:27.354] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[13:06:27.359] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[13:06:27.365] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[13:06:27.371] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:27.377] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:27.383] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:27.389] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:27.395] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:27.401] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:27.407] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:27.413] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:27.450] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C0.dat
[13:06:27.450] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C1.dat
[13:06:27.451] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C2.dat
[13:06:27.451] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C3.dat
[13:06:27.451] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C4.dat
[13:06:27.451] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C5.dat
[13:06:27.451] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C6.dat
[13:06:27.452] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C7.dat
[13:06:27.452] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C8.dat
[13:06:27.452] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C9.dat
[13:06:27.452] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C10.dat
[13:06:27.452] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C11.dat
[13:06:27.452] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C12.dat
[13:06:27.453] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C13.dat
[13:06:27.453] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C14.dat
[13:06:27.453] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C15.dat
[13:06:27.710] <TB0> INFO: Expecting 41600 events.
[13:06:30.894] <TB0> INFO: 41600 events read in total (2592ms).
[13:06:30.895] <TB0> INFO: Test took 3438ms.
[13:06:31.346] <TB0> INFO: Expecting 41600 events.
[13:06:34.370] <TB0> INFO: 41600 events read in total (2432ms).
[13:06:34.372] <TB0> INFO: Test took 3262ms.
[13:06:34.842] <TB0> INFO: Expecting 41600 events.
[13:06:37.961] <TB0> INFO: 41600 events read in total (2527ms).
[13:06:37.962] <TB0> INFO: Test took 3376ms.
[13:06:38.178] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:38.267] <TB0> INFO: Expecting 2560 events.
[13:06:39.152] <TB0> INFO: 2560 events read in total (293ms).
[13:06:39.152] <TB0> INFO: Test took 974ms.
[13:06:39.154] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:39.461] <TB0> INFO: Expecting 2560 events.
[13:06:40.350] <TB0> INFO: 2560 events read in total (297ms).
[13:06:40.350] <TB0> INFO: Test took 1196ms.
[13:06:40.354] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:40.659] <TB0> INFO: Expecting 2560 events.
[13:06:41.546] <TB0> INFO: 2560 events read in total (296ms).
[13:06:41.546] <TB0> INFO: Test took 1192ms.
[13:06:41.549] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:41.854] <TB0> INFO: Expecting 2560 events.
[13:06:42.747] <TB0> INFO: 2560 events read in total (301ms).
[13:06:42.748] <TB0> INFO: Test took 1199ms.
[13:06:42.752] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:43.056] <TB0> INFO: Expecting 2560 events.
[13:06:43.951] <TB0> INFO: 2560 events read in total (304ms).
[13:06:43.952] <TB0> INFO: Test took 1200ms.
[13:06:43.956] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:44.260] <TB0> INFO: Expecting 2560 events.
[13:06:45.144] <TB0> INFO: 2560 events read in total (292ms).
[13:06:45.144] <TB0> INFO: Test took 1189ms.
[13:06:45.150] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:45.452] <TB0> INFO: Expecting 2560 events.
[13:06:46.349] <TB0> INFO: 2560 events read in total (305ms).
[13:06:46.349] <TB0> INFO: Test took 1199ms.
[13:06:46.352] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:46.657] <TB0> INFO: Expecting 2560 events.
[13:06:47.548] <TB0> INFO: 2560 events read in total (299ms).
[13:06:47.548] <TB0> INFO: Test took 1196ms.
[13:06:47.550] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:47.857] <TB0> INFO: Expecting 2560 events.
[13:06:48.738] <TB0> INFO: 2560 events read in total (289ms).
[13:06:48.738] <TB0> INFO: Test took 1188ms.
[13:06:48.740] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:49.047] <TB0> INFO: Expecting 2560 events.
[13:06:49.931] <TB0> INFO: 2560 events read in total (293ms).
[13:06:49.932] <TB0> INFO: Test took 1192ms.
[13:06:49.934] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:50.239] <TB0> INFO: Expecting 2560 events.
[13:06:51.129] <TB0> INFO: 2560 events read in total (298ms).
[13:06:51.129] <TB0> INFO: Test took 1195ms.
[13:06:51.133] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:51.437] <TB0> INFO: Expecting 2560 events.
[13:06:52.324] <TB0> INFO: 2560 events read in total (295ms).
[13:06:52.325] <TB0> INFO: Test took 1192ms.
[13:06:52.328] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:52.633] <TB0> INFO: Expecting 2560 events.
[13:06:53.516] <TB0> INFO: 2560 events read in total (291ms).
[13:06:53.517] <TB0> INFO: Test took 1190ms.
[13:06:53.520] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:53.825] <TB0> INFO: Expecting 2560 events.
[13:06:54.712] <TB0> INFO: 2560 events read in total (295ms).
[13:06:54.713] <TB0> INFO: Test took 1193ms.
[13:06:54.717] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:55.021] <TB0> INFO: Expecting 2560 events.
[13:06:55.907] <TB0> INFO: 2560 events read in total (295ms).
[13:06:55.907] <TB0> INFO: Test took 1190ms.
[13:06:55.910] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:56.216] <TB0> INFO: Expecting 2560 events.
[13:06:57.097] <TB0> INFO: 2560 events read in total (290ms).
[13:06:57.098] <TB0> INFO: Test took 1188ms.
[13:06:57.101] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:57.406] <TB0> INFO: Expecting 2560 events.
[13:06:58.295] <TB0> INFO: 2560 events read in total (298ms).
[13:06:58.295] <TB0> INFO: Test took 1194ms.
[13:06:58.299] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:58.604] <TB0> INFO: Expecting 2560 events.
[13:06:59.490] <TB0> INFO: 2560 events read in total (294ms).
[13:06:59.490] <TB0> INFO: Test took 1191ms.
[13:06:59.494] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:59.798] <TB0> INFO: Expecting 2560 events.
[13:07:00.689] <TB0> INFO: 2560 events read in total (299ms).
[13:07:00.689] <TB0> INFO: Test took 1195ms.
[13:07:00.691] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:00.998] <TB0> INFO: Expecting 2560 events.
[13:07:01.879] <TB0> INFO: 2560 events read in total (289ms).
[13:07:01.879] <TB0> INFO: Test took 1188ms.
[13:07:01.882] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:02.188] <TB0> INFO: Expecting 2560 events.
[13:07:03.068] <TB0> INFO: 2560 events read in total (288ms).
[13:07:03.068] <TB0> INFO: Test took 1186ms.
[13:07:03.071] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:03.377] <TB0> INFO: Expecting 2560 events.
[13:07:04.265] <TB0> INFO: 2560 events read in total (296ms).
[13:07:04.266] <TB0> INFO: Test took 1195ms.
[13:07:04.269] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:04.573] <TB0> INFO: Expecting 2560 events.
[13:07:05.455] <TB0> INFO: 2560 events read in total (290ms).
[13:07:05.455] <TB0> INFO: Test took 1186ms.
[13:07:05.458] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:05.764] <TB0> INFO: Expecting 2560 events.
[13:07:06.647] <TB0> INFO: 2560 events read in total (291ms).
[13:07:06.647] <TB0> INFO: Test took 1189ms.
[13:07:06.650] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:06.954] <TB0> INFO: Expecting 2560 events.
[13:07:07.842] <TB0> INFO: 2560 events read in total (296ms).
[13:07:07.842] <TB0> INFO: Test took 1192ms.
[13:07:07.845] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:08.149] <TB0> INFO: Expecting 2560 events.
[13:07:09.040] <TB0> INFO: 2560 events read in total (299ms).
[13:07:09.040] <TB0> INFO: Test took 1195ms.
[13:07:09.044] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:09.348] <TB0> INFO: Expecting 2560 events.
[13:07:10.241] <TB0> INFO: 2560 events read in total (301ms).
[13:07:10.242] <TB0> INFO: Test took 1199ms.
[13:07:10.245] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:10.550] <TB0> INFO: Expecting 2560 events.
[13:07:11.444] <TB0> INFO: 2560 events read in total (302ms).
[13:07:11.445] <TB0> INFO: Test took 1200ms.
[13:07:11.448] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:11.752] <TB0> INFO: Expecting 2560 events.
[13:07:12.650] <TB0> INFO: 2560 events read in total (306ms).
[13:07:12.651] <TB0> INFO: Test took 1203ms.
[13:07:12.654] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:12.959] <TB0> INFO: Expecting 2560 events.
[13:07:13.854] <TB0> INFO: 2560 events read in total (303ms).
[13:07:13.854] <TB0> INFO: Test took 1201ms.
[13:07:13.857] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:14.161] <TB0> INFO: Expecting 2560 events.
[13:07:15.054] <TB0> INFO: 2560 events read in total (301ms).
[13:07:15.054] <TB0> INFO: Test took 1197ms.
[13:07:15.059] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:15.362] <TB0> INFO: Expecting 2560 events.
[13:07:16.254] <TB0> INFO: 2560 events read in total (300ms).
[13:07:16.255] <TB0> INFO: Test took 1197ms.
[13:07:16.734] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 545 seconds
[13:07:16.734] <TB0> INFO: PH scale (per ROC): 51 50 43 52 34 59 44 31 47 44 50 34 34 48 43 49
[13:07:16.734] <TB0> INFO: PH offset (per ROC): 125 119 95 120 89 129 103 97 101 94 125 86 100 92 102 101
[13:07:16.744] <TB0> INFO: Decoding statistics:
[13:07:16.744] <TB0> INFO: General information:
[13:07:16.744] <TB0> INFO: 16bit words read: 127886
[13:07:16.744] <TB0> INFO: valid events total: 20480
[13:07:16.744] <TB0> INFO: empty events: 17977
[13:07:16.744] <TB0> INFO: valid events with pixels: 2503
[13:07:16.744] <TB0> INFO: valid pixel hits: 2503
[13:07:16.744] <TB0> INFO: Event errors: 0
[13:07:16.744] <TB0> INFO: start marker: 0
[13:07:16.744] <TB0> INFO: stop marker: 0
[13:07:16.744] <TB0> INFO: overflow: 0
[13:07:16.744] <TB0> INFO: invalid 5bit words: 0
[13:07:16.744] <TB0> INFO: invalid XOR eye diagram: 0
[13:07:16.744] <TB0> INFO: frame (failed synchr.): 0
[13:07:16.744] <TB0> INFO: idle data (no TBM trl): 0
[13:07:16.744] <TB0> INFO: no data (only TBM hdr): 0
[13:07:16.744] <TB0> INFO: TBM errors: 0
[13:07:16.744] <TB0> INFO: flawed TBM headers: 0
[13:07:16.745] <TB0> INFO: flawed TBM trailers: 0
[13:07:16.745] <TB0> INFO: event ID mismatches: 0
[13:07:16.745] <TB0> INFO: ROC errors: 0
[13:07:16.745] <TB0> INFO: missing ROC header(s): 0
[13:07:16.745] <TB0> INFO: misplaced readback start: 0
[13:07:16.745] <TB0> INFO: Pixel decoding errors: 0
[13:07:16.745] <TB0> INFO: pixel data incomplete: 0
[13:07:16.745] <TB0> INFO: pixel address: 0
[13:07:16.745] <TB0> INFO: pulse height fill bit: 0
[13:07:16.745] <TB0> INFO: buffer corruption: 0
[13:07:16.905] <TB0> INFO: ######################################################################
[13:07:16.905] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:07:16.905] <TB0> INFO: ######################################################################
[13:07:16.919] <TB0> INFO: scanning low vcal = 10
[13:07:17.200] <TB0> INFO: Expecting 41600 events.
[13:07:20.781] <TB0> INFO: 41600 events read in total (2989ms).
[13:07:20.781] <TB0> INFO: Test took 3862ms.
[13:07:20.784] <TB0> INFO: scanning low vcal = 20
[13:07:21.073] <TB0> INFO: Expecting 41600 events.
[13:07:24.681] <TB0> INFO: 41600 events read in total (3017ms).
[13:07:24.682] <TB0> INFO: Test took 3898ms.
[13:07:24.684] <TB0> INFO: scanning low vcal = 30
[13:07:24.975] <TB0> INFO: Expecting 41600 events.
[13:07:28.694] <TB0> INFO: 41600 events read in total (3127ms).
[13:07:28.695] <TB0> INFO: Test took 4011ms.
[13:07:28.697] <TB0> INFO: scanning low vcal = 40
[13:07:28.974] <TB0> INFO: Expecting 41600 events.
[13:07:32.909] <TB0> INFO: 41600 events read in total (3343ms).
[13:07:32.910] <TB0> INFO: Test took 4213ms.
[13:07:32.913] <TB0> INFO: scanning low vcal = 50
[13:07:33.190] <TB0> INFO: Expecting 41600 events.
[13:07:37.145] <TB0> INFO: 41600 events read in total (3363ms).
[13:07:37.146] <TB0> INFO: Test took 4233ms.
[13:07:37.149] <TB0> INFO: scanning low vcal = 60
[13:07:37.426] <TB0> INFO: Expecting 41600 events.
[13:07:41.427] <TB0> INFO: 41600 events read in total (3410ms).
[13:07:41.428] <TB0> INFO: Test took 4279ms.
[13:07:41.431] <TB0> INFO: scanning low vcal = 70
[13:07:41.708] <TB0> INFO: Expecting 41600 events.
[13:07:45.715] <TB0> INFO: 41600 events read in total (3415ms).
[13:07:45.716] <TB0> INFO: Test took 4285ms.
[13:07:45.719] <TB0> INFO: scanning low vcal = 80
[13:07:45.996] <TB0> INFO: Expecting 41600 events.
[13:07:49.953] <TB0> INFO: 41600 events read in total (3366ms).
[13:07:49.954] <TB0> INFO: Test took 4235ms.
[13:07:49.957] <TB0> INFO: scanning low vcal = 90
[13:07:50.234] <TB0> INFO: Expecting 41600 events.
[13:07:54.220] <TB0> INFO: 41600 events read in total (3394ms).
[13:07:54.221] <TB0> INFO: Test took 4264ms.
[13:07:54.225] <TB0> INFO: scanning low vcal = 100
[13:07:54.502] <TB0> INFO: Expecting 41600 events.
[13:07:58.530] <TB0> INFO: 41600 events read in total (3437ms).
[13:07:58.531] <TB0> INFO: Test took 4306ms.
[13:07:58.534] <TB0> INFO: scanning low vcal = 110
[13:07:58.811] <TB0> INFO: Expecting 41600 events.
[13:08:02.771] <TB0> INFO: 41600 events read in total (3368ms).
[13:08:02.772] <TB0> INFO: Test took 4238ms.
[13:08:02.775] <TB0> INFO: scanning low vcal = 120
[13:08:03.052] <TB0> INFO: Expecting 41600 events.
[13:08:07.022] <TB0> INFO: 41600 events read in total (3378ms).
[13:08:07.023] <TB0> INFO: Test took 4248ms.
[13:08:07.026] <TB0> INFO: scanning low vcal = 130
[13:08:07.304] <TB0> INFO: Expecting 41600 events.
[13:08:11.324] <TB0> INFO: 41600 events read in total (3428ms).
[13:08:11.325] <TB0> INFO: Test took 4299ms.
[13:08:11.328] <TB0> INFO: scanning low vcal = 140
[13:08:11.606] <TB0> INFO: Expecting 41600 events.
[13:08:15.595] <TB0> INFO: 41600 events read in total (3398ms).
[13:08:15.596] <TB0> INFO: Test took 4268ms.
[13:08:15.599] <TB0> INFO: scanning low vcal = 150
[13:08:15.875] <TB0> INFO: Expecting 41600 events.
[13:08:19.834] <TB0> INFO: 41600 events read in total (3367ms).
[13:08:19.835] <TB0> INFO: Test took 4236ms.
[13:08:19.838] <TB0> INFO: scanning low vcal = 160
[13:08:20.115] <TB0> INFO: Expecting 41600 events.
[13:08:24.097] <TB0> INFO: 41600 events read in total (3391ms).
[13:08:24.098] <TB0> INFO: Test took 4259ms.
[13:08:24.101] <TB0> INFO: scanning low vcal = 170
[13:08:24.378] <TB0> INFO: Expecting 41600 events.
[13:08:28.445] <TB0> INFO: 41600 events read in total (3475ms).
[13:08:28.447] <TB0> INFO: Test took 4346ms.
[13:08:28.452] <TB0> INFO: scanning low vcal = 180
[13:08:28.727] <TB0> INFO: Expecting 41600 events.
[13:08:32.735] <TB0> INFO: 41600 events read in total (3416ms).
[13:08:32.736] <TB0> INFO: Test took 4284ms.
[13:08:32.739] <TB0> INFO: scanning low vcal = 190
[13:08:33.017] <TB0> INFO: Expecting 41600 events.
[13:08:37.040] <TB0> INFO: 41600 events read in total (3432ms).
[13:08:37.041] <TB0> INFO: Test took 4301ms.
[13:08:37.045] <TB0> INFO: scanning low vcal = 200
[13:08:37.321] <TB0> INFO: Expecting 41600 events.
[13:08:41.353] <TB0> INFO: 41600 events read in total (3441ms).
[13:08:41.354] <TB0> INFO: Test took 4309ms.
[13:08:41.356] <TB0> INFO: scanning low vcal = 210
[13:08:41.634] <TB0> INFO: Expecting 41600 events.
[13:08:45.667] <TB0> INFO: 41600 events read in total (3441ms).
[13:08:45.668] <TB0> INFO: Test took 4312ms.
[13:08:45.671] <TB0> INFO: scanning low vcal = 220
[13:08:45.952] <TB0> INFO: Expecting 41600 events.
[13:08:49.950] <TB0> INFO: 41600 events read in total (3407ms).
[13:08:49.951] <TB0> INFO: Test took 4280ms.
[13:08:49.954] <TB0> INFO: scanning low vcal = 230
[13:08:50.231] <TB0> INFO: Expecting 41600 events.
[13:08:54.232] <TB0> INFO: 41600 events read in total (3409ms).
[13:08:54.233] <TB0> INFO: Test took 4279ms.
[13:08:54.236] <TB0> INFO: scanning low vcal = 240
[13:08:54.515] <TB0> INFO: Expecting 41600 events.
[13:08:58.543] <TB0> INFO: 41600 events read in total (3436ms).
[13:08:58.543] <TB0> INFO: Test took 4307ms.
[13:08:58.546] <TB0> INFO: scanning low vcal = 250
[13:08:58.824] <TB0> INFO: Expecting 41600 events.
[13:09:02.829] <TB0> INFO: 41600 events read in total (3413ms).
[13:09:02.829] <TB0> INFO: Test took 4282ms.
[13:09:02.833] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[13:09:03.110] <TB0> INFO: Expecting 41600 events.
[13:09:07.113] <TB0> INFO: 41600 events read in total (3411ms).
[13:09:07.114] <TB0> INFO: Test took 4280ms.
[13:09:07.117] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[13:09:07.395] <TB0> INFO: Expecting 41600 events.
[13:09:11.458] <TB0> INFO: 41600 events read in total (3471ms).
[13:09:11.459] <TB0> INFO: Test took 4342ms.
[13:09:11.462] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[13:09:11.744] <TB0> INFO: Expecting 41600 events.
[13:09:15.764] <TB0> INFO: 41600 events read in total (3428ms).
[13:09:15.765] <TB0> INFO: Test took 4303ms.
[13:09:15.768] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[13:09:16.046] <TB0> INFO: Expecting 41600 events.
[13:09:20.008] <TB0> INFO: 41600 events read in total (3371ms).
[13:09:20.009] <TB0> INFO: Test took 4240ms.
[13:09:20.012] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:09:20.289] <TB0> INFO: Expecting 41600 events.
[13:09:24.258] <TB0> INFO: 41600 events read in total (3377ms).
[13:09:24.259] <TB0> INFO: Test took 4246ms.
[13:09:24.665] <TB0> INFO: PixTestGainPedestal::measure() done
[13:10:02.781] <TB0> INFO: PixTestGainPedestal::fit() done
[13:10:02.781] <TB0> INFO: non-linearity mean: 0.980 0.983 0.960 0.981 1.024 0.987 0.930 1.034 0.965 0.936 0.981 0.944 1.007 0.959 0.944 0.966
[13:10:02.781] <TB0> INFO: non-linearity RMS: 0.006 0.005 0.175 0.005 0.162 0.002 0.117 0.156 0.022 0.109 0.005 0.174 0.201 0.040 0.065 0.016
[13:10:02.781] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C0.dat
[13:10:02.795] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C1.dat
[13:10:02.808] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C2.dat
[13:10:02.821] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C3.dat
[13:10:02.834] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C4.dat
[13:10:02.848] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C5.dat
[13:10:02.861] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C6.dat
[13:10:02.874] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C7.dat
[13:10:02.887] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C8.dat
[13:10:02.900] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C9.dat
[13:10:02.913] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C10.dat
[13:10:02.926] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C11.dat
[13:10:02.939] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C12.dat
[13:10:02.952] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C13.dat
[13:10:02.965] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C14.dat
[13:10:02.979] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1003_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C15.dat
[13:10:02.992] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 166 seconds
[13:10:02.992] <TB0> INFO: Decoding statistics:
[13:10:02.992] <TB0> INFO: General information:
[13:10:02.992] <TB0> INFO: 16bit words read: 3290210
[13:10:02.992] <TB0> INFO: valid events total: 332800
[13:10:02.992] <TB0> INFO: empty events: 1603
[13:10:02.992] <TB0> INFO: valid events with pixels: 331197
[13:10:02.992] <TB0> INFO: valid pixel hits: 646705
[13:10:02.992] <TB0> INFO: Event errors: 0
[13:10:02.992] <TB0> INFO: start marker: 0
[13:10:02.992] <TB0> INFO: stop marker: 0
[13:10:02.992] <TB0> INFO: overflow: 0
[13:10:02.992] <TB0> INFO: invalid 5bit words: 0
[13:10:02.992] <TB0> INFO: invalid XOR eye diagram: 0
[13:10:02.992] <TB0> INFO: frame (failed synchr.): 0
[13:10:02.992] <TB0> INFO: idle data (no TBM trl): 0
[13:10:02.992] <TB0> INFO: no data (only TBM hdr): 0
[13:10:02.992] <TB0> INFO: TBM errors: 0
[13:10:02.992] <TB0> INFO: flawed TBM headers: 0
[13:10:02.992] <TB0> INFO: flawed TBM trailers: 0
[13:10:02.992] <TB0> INFO: event ID mismatches: 0
[13:10:02.992] <TB0> INFO: ROC errors: 0
[13:10:02.992] <TB0> INFO: missing ROC header(s): 0
[13:10:02.992] <TB0> INFO: misplaced readback start: 0
[13:10:02.992] <TB0> INFO: Pixel decoding errors: 0
[13:10:02.992] <TB0> INFO: pixel data incomplete: 0
[13:10:02.992] <TB0> INFO: pixel address: 0
[13:10:02.992] <TB0> INFO: pulse height fill bit: 0
[13:10:02.992] <TB0> INFO: buffer corruption: 0
[13:10:03.007] <TB0> INFO: Decoding statistics:
[13:10:03.007] <TB0> INFO: General information:
[13:10:03.007] <TB0> INFO: 16bit words read: 3419632
[13:10:03.007] <TB0> INFO: valid events total: 353536
[13:10:03.007] <TB0> INFO: empty events: 19836
[13:10:03.007] <TB0> INFO: valid events with pixels: 333700
[13:10:03.007] <TB0> INFO: valid pixel hits: 649208
[13:10:03.007] <TB0> INFO: Event errors: 0
[13:10:03.007] <TB0> INFO: start marker: 0
[13:10:03.007] <TB0> INFO: stop marker: 0
[13:10:03.007] <TB0> INFO: overflow: 0
[13:10:03.007] <TB0> INFO: invalid 5bit words: 0
[13:10:03.007] <TB0> INFO: invalid XOR eye diagram: 0
[13:10:03.007] <TB0> INFO: frame (failed synchr.): 0
[13:10:03.007] <TB0> INFO: idle data (no TBM trl): 0
[13:10:03.007] <TB0> INFO: no data (only TBM hdr): 0
[13:10:03.007] <TB0> INFO: TBM errors: 0
[13:10:03.007] <TB0> INFO: flawed TBM headers: 0
[13:10:03.007] <TB0> INFO: flawed TBM trailers: 0
[13:10:03.007] <TB0> INFO: event ID mismatches: 0
[13:10:03.007] <TB0> INFO: ROC errors: 0
[13:10:03.007] <TB0> INFO: missing ROC header(s): 0
[13:10:03.007] <TB0> INFO: misplaced readback start: 0
[13:10:03.008] <TB0> INFO: Pixel decoding errors: 0
[13:10:03.008] <TB0> INFO: pixel data incomplete: 0
[13:10:03.008] <TB0> INFO: pixel address: 0
[13:10:03.008] <TB0> INFO: pulse height fill bit: 0
[13:10:03.008] <TB0> INFO: buffer corruption: 0
[13:10:03.008] <TB0> INFO: enter test to run
[13:10:03.008] <TB0> INFO: test: exit no parameter change
[13:10:03.126] <TB0> QUIET: Connection to board 71 closed.
[13:10:03.128] <TB0> INFO: pXar: this is the end, my friend