[18:30:06.764] <TB2> INFO: *** Welcome to pxar ***
[18:30:06.764] <TB2> INFO: *** Today: 2016/11/04
[18:30:06.770] <TB2> INFO: *** Version: c8ba-dirty
[18:30:06.770] <TB2> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters_C15.dat
[18:30:06.770] <TB2> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[18:30:06.770] <TB2> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//defaultMaskFile.dat
[18:30:06.770] <TB2> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters_C15.dat
[18:30:06.824] <TB2> INFO: clk: 4
[18:30:06.824] <TB2> INFO: ctr: 4
[18:30:06.824] <TB2> INFO: sda: 19
[18:30:06.824] <TB2> INFO: tin: 9
[18:30:06.824] <TB2> INFO: level: 15
[18:30:06.824] <TB2> INFO: triggerdelay: 0
[18:30:06.824] <TB2> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[18:30:06.824] <TB2> INFO: Log level: INFO
[18:30:06.832] <TB2> INFO: Found DTB DTB_WXC55Z
[18:30:06.843] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[18:30:06.844] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[18:30:06.846] <TB2> INFO: RPC call hashes of host and DTB match: 486171790
[18:30:08.329] <TB2> INFO: DUT info:
[18:30:08.329] <TB2> INFO: The DUT currently contains the following objects:
[18:30:08.329] <TB2> INFO: 4 TBM Cores tbm10c (4 ON)
[18:30:08.329] <TB2> INFO: TBM Core alpha (0): 7 registers set
[18:30:08.329] <TB2> INFO: TBM Core beta (1): 7 registers set
[18:30:08.329] <TB2> INFO: TBM Core alpha (2): 7 registers set
[18:30:08.329] <TB2> INFO: TBM Core beta (3): 7 registers set
[18:30:08.329] <TB2> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[18:30:08.329] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[18:30:08.329] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[18:30:08.329] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[18:30:08.330] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[18:30:08.330] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[18:30:08.330] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[18:30:08.330] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[18:30:08.330] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[18:30:08.330] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[18:30:08.330] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[18:30:08.330] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[18:30:08.330] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[18:30:08.330] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[18:30:08.330] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[18:30:08.330] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[18:30:08.330] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[18:30:08.730] <TB2> INFO: enter 'restricted' command line mode
[18:30:08.730] <TB2> INFO: enter test to run
[18:30:08.731] <TB2> INFO: test: pretest no parameter change
[18:30:08.731] <TB2> INFO: running: pretest
[18:30:09.263] <TB2> INFO: ######################################################################
[18:30:09.263] <TB2> INFO: PixTestPretest::doTest()
[18:30:09.263] <TB2> INFO: ######################################################################
[18:30:09.264] <TB2> INFO: ----------------------------------------------------------------------
[18:30:09.264] <TB2> INFO: PixTestPretest::programROC()
[18:30:09.264] <TB2> INFO: ----------------------------------------------------------------------
[18:30:27.277] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[18:30:27.277] <TB2> INFO: IA differences per ROC: 18.5 19.3 19.3 19.3 18.5 20.9 20.1 20.1 20.1 20.1 19.3 19.3 17.7 16.9 20.9 20.9
[18:30:27.313] <TB2> INFO: ----------------------------------------------------------------------
[18:30:27.313] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[18:30:27.313] <TB2> INFO: ----------------------------------------------------------------------
[18:30:48.557] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 389.1 mA = 24.3188 mA/ROC
[18:30:48.557] <TB2> INFO: i(loss) [mA/ROC]: 20.1 18.5 19.3 20.1 20.1 19.3 19.3 18.5 20.1 20.1 19.3 19.3 18.5 19.3 18.5 19.3
[18:30:48.585] <TB2> INFO: ----------------------------------------------------------------------
[18:30:48.585] <TB2> INFO: PixTestPretest::findTiming()
[18:30:48.585] <TB2> INFO: ----------------------------------------------------------------------
[18:30:48.586] <TB2> INFO: PixTestCmd::init()

[18:31:19.381] <TB2> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[18:31:19.381] <TB2> INFO: (success/tries = 100/100), width = 3
[18:31:20.883] <TB2> INFO: ----------------------------------------------------------------------
[18:31:20.883] <TB2> INFO: PixTestPretest::findWorkingPixel()
[18:31:20.883] <TB2> INFO: ----------------------------------------------------------------------
[18:31:20.975] <TB2> INFO: Expecting 231680 events.
[18:31:30.587] <TB2> INFO: 231680 events read in total (9021ms).
[18:31:30.593] <TB2> INFO: Test took 9707ms.
[18:31:30.837] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[18:31:30.865] <TB2> INFO: ----------------------------------------------------------------------
[18:31:30.865] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[18:31:30.865] <TB2> INFO: ----------------------------------------------------------------------
[18:31:30.957] <TB2> INFO: Expecting 231680 events.
[18:31:40.638] <TB2> INFO: 231680 events read in total (9089ms).
[18:31:40.647] <TB2> INFO: Test took 9778ms.
[18:31:40.907] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[18:31:40.907] <TB2> INFO: CalDel: 93 82 105 83 80 96 92 85 106 92 92 84 98 79 95 90
[18:31:40.907] <TB2> INFO: VthrComp: 51 51 51 51 52 52 51 51 51 52 51 51 51 52 51 53
[18:31:40.910] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters_C0.dat
[18:31:40.910] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters_C1.dat
[18:31:40.910] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters_C2.dat
[18:31:40.910] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters_C3.dat
[18:31:40.910] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters_C4.dat
[18:31:40.910] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters_C5.dat
[18:31:40.911] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters_C6.dat
[18:31:40.911] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters_C7.dat
[18:31:40.911] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters_C8.dat
[18:31:40.911] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters_C9.dat
[18:31:40.911] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters_C10.dat
[18:31:40.911] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters_C11.dat
[18:31:40.911] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters_C12.dat
[18:31:40.911] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters_C13.dat
[18:31:40.911] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters_C14.dat
[18:31:40.911] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters_C15.dat
[18:31:40.912] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//tbmParameters_C0a.dat
[18:31:40.912] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//tbmParameters_C0b.dat
[18:31:40.912] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//tbmParameters_C1a.dat
[18:31:40.912] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[18:31:40.912] <TB2> INFO: PixTestPretest::doTest() done, duration: 92 seconds
[18:31:41.042] <TB2> INFO: enter test to run
[18:31:41.042] <TB2> INFO: test: fulltest no parameter change
[18:31:41.042] <TB2> INFO: running: fulltest
[18:31:41.042] <TB2> INFO: ######################################################################
[18:31:41.042] <TB2> INFO: PixTestFullTest::doTest()
[18:31:41.042] <TB2> INFO: ######################################################################
[18:31:41.043] <TB2> INFO: ######################################################################
[18:31:41.043] <TB2> INFO: PixTestAlive::doTest()
[18:31:41.043] <TB2> INFO: ######################################################################
[18:31:41.044] <TB2> INFO: ----------------------------------------------------------------------
[18:31:41.044] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[18:31:41.044] <TB2> INFO: ----------------------------------------------------------------------
[18:31:41.323] <TB2> INFO: Expecting 41600 events.
[18:31:44.837] <TB2> INFO: 41600 events read in total (2923ms).
[18:31:44.838] <TB2> INFO: Test took 3792ms.
[18:31:45.065] <TB2> INFO: PixTestAlive::aliveTest() done
[18:31:45.065] <TB2> INFO: number of dead pixels (per ROC): 2 0 0 3 0 0 0 2 0 0 0 0 0 0 0 1
[18:31:45.066] <TB2> INFO: ----------------------------------------------------------------------
[18:31:45.066] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[18:31:45.066] <TB2> INFO: ----------------------------------------------------------------------
[18:31:45.299] <TB2> INFO: Expecting 41600 events.
[18:31:48.253] <TB2> INFO: 41600 events read in total (2363ms).
[18:31:48.253] <TB2> INFO: Test took 3186ms.
[18:31:48.254] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[18:31:48.493] <TB2> INFO: PixTestAlive::maskTest() done
[18:31:48.493] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[18:31:48.494] <TB2> INFO: ----------------------------------------------------------------------
[18:31:48.494] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[18:31:48.494] <TB2> INFO: ----------------------------------------------------------------------
[18:31:48.727] <TB2> INFO: Expecting 41600 events.
[18:31:52.204] <TB2> INFO: 41600 events read in total (2885ms).
[18:31:52.204] <TB2> INFO: Test took 3709ms.
[18:31:52.431] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[18:31:52.431] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[18:31:52.432] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[18:31:52.432] <TB2> INFO: Decoding statistics:
[18:31:52.432] <TB2> INFO: General information:
[18:31:52.432] <TB2> INFO: 16bit words read: 0
[18:31:52.432] <TB2> INFO: valid events total: 0
[18:31:52.432] <TB2> INFO: empty events: 0
[18:31:52.432] <TB2> INFO: valid events with pixels: 0
[18:31:52.432] <TB2> INFO: valid pixel hits: 0
[18:31:52.432] <TB2> INFO: Event errors: 0
[18:31:52.432] <TB2> INFO: start marker: 0
[18:31:52.432] <TB2> INFO: stop marker: 0
[18:31:52.432] <TB2> INFO: overflow: 0
[18:31:52.432] <TB2> INFO: invalid 5bit words: 0
[18:31:52.432] <TB2> INFO: invalid XOR eye diagram: 0
[18:31:52.432] <TB2> INFO: frame (failed synchr.): 0
[18:31:52.432] <TB2> INFO: idle data (no TBM trl): 0
[18:31:52.432] <TB2> INFO: no data (only TBM hdr): 0
[18:31:52.432] <TB2> INFO: TBM errors: 0
[18:31:52.432] <TB2> INFO: flawed TBM headers: 0
[18:31:52.432] <TB2> INFO: flawed TBM trailers: 0
[18:31:52.432] <TB2> INFO: event ID mismatches: 0
[18:31:52.432] <TB2> INFO: ROC errors: 0
[18:31:52.432] <TB2> INFO: missing ROC header(s): 0
[18:31:52.432] <TB2> INFO: misplaced readback start: 0
[18:31:52.432] <TB2> INFO: Pixel decoding errors: 0
[18:31:52.432] <TB2> INFO: pixel data incomplete: 0
[18:31:52.432] <TB2> INFO: pixel address: 0
[18:31:52.432] <TB2> INFO: pulse height fill bit: 0
[18:31:52.432] <TB2> INFO: buffer corruption: 0
[18:31:52.439] <TB2> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C15.dat
[18:31:52.439] <TB2> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//phCalibrationFitErr_C15.dat

[18:31:52.440] <TB2> INFO: ######################################################################
[18:31:52.440] <TB2> INFO: PixTestReadback::doTest()
[18:31:52.440] <TB2> INFO: ######################################################################
[18:31:52.440] <TB2> INFO: ----------------------------------------------------------------------
[18:31:52.440] <TB2> INFO: PixTestReadback::CalibrateVd()
[18:31:52.440] <TB2> INFO: ----------------------------------------------------------------------
[18:32:02.398] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C0.dat
[18:32:02.398] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C1.dat
[18:32:02.398] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C2.dat
[18:32:02.398] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C3.dat
[18:32:02.398] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C4.dat
[18:32:02.398] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C5.dat
[18:32:02.398] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C6.dat
[18:32:02.398] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C7.dat
[18:32:02.398] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C8.dat
[18:32:02.399] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C9.dat
[18:32:02.399] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C10.dat
[18:32:02.399] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C11.dat
[18:32:02.399] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C12.dat
[18:32:02.399] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C13.dat
[18:32:02.399] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C14.dat
[18:32:02.399] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C15.dat
[18:32:02.427] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[18:32:02.427] <TB2> INFO: ----------------------------------------------------------------------
[18:32:02.427] <TB2> INFO: PixTestReadback::CalibrateVa()
[18:32:02.427] <TB2> INFO: ----------------------------------------------------------------------
[18:32:12.318] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C0.dat
[18:32:12.319] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C1.dat
[18:32:12.319] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C2.dat
[18:32:12.319] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C3.dat
[18:32:12.319] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C4.dat
[18:32:12.319] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C5.dat
[18:32:12.319] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C6.dat
[18:32:12.319] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C7.dat
[18:32:12.319] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C8.dat
[18:32:12.319] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C9.dat
[18:32:12.319] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C10.dat
[18:32:12.319] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C11.dat
[18:32:12.319] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C12.dat
[18:32:12.319] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C13.dat
[18:32:12.319] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C14.dat
[18:32:12.319] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C15.dat
[18:32:12.348] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[18:32:12.348] <TB2> INFO: ----------------------------------------------------------------------
[18:32:12.348] <TB2> INFO: PixTestReadback::readbackVbg()
[18:32:12.348] <TB2> INFO: ----------------------------------------------------------------------
[18:32:19.986] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[18:32:19.986] <TB2> INFO: ----------------------------------------------------------------------
[18:32:19.986] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[18:32:19.986] <TB2> INFO: ----------------------------------------------------------------------
[18:32:19.986] <TB2> INFO: Vbg will be calibrated using Vd calibration
[18:32:19.986] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 157.6calibrated Vbg = 1.17566 :::*/*/*/*/
[18:32:19.986] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 152.3calibrated Vbg = 1.17985 :::*/*/*/*/
[18:32:19.986] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 148.5calibrated Vbg = 1.17095 :::*/*/*/*/
[18:32:19.986] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 151.8calibrated Vbg = 1.17199 :::*/*/*/*/
[18:32:19.986] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 147.9calibrated Vbg = 1.17446 :::*/*/*/*/
[18:32:19.986] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 155.1calibrated Vbg = 1.17713 :::*/*/*/*/
[18:32:19.986] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 143.8calibrated Vbg = 1.17199 :::*/*/*/*/
[18:32:19.986] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 164.6calibrated Vbg = 1.17759 :::*/*/*/*/
[18:32:19.986] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 157.1calibrated Vbg = 1.183 :::*/*/*/*/
[18:32:19.986] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 156calibrated Vbg = 1.17776 :::*/*/*/*/
[18:32:19.986] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 158.2calibrated Vbg = 1.17235 :::*/*/*/*/
[18:32:19.986] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 158.4calibrated Vbg = 1.16726 :::*/*/*/*/
[18:32:19.986] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 149.2calibrated Vbg = 1.17145 :::*/*/*/*/
[18:32:19.986] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 151.6calibrated Vbg = 1.18097 :::*/*/*/*/
[18:32:19.986] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 159.8calibrated Vbg = 1.17763 :::*/*/*/*/
[18:32:19.986] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 155.9calibrated Vbg = 1.17366 :::*/*/*/*/
[18:32:19.988] <TB2> INFO: ----------------------------------------------------------------------
[18:32:19.988] <TB2> INFO: PixTestReadback::CalibrateIa()
[18:32:19.988] <TB2> INFO: ----------------------------------------------------------------------
[18:35:00.285] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C0.dat
[18:35:00.285] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C1.dat
[18:35:00.285] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C2.dat
[18:35:00.285] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C3.dat
[18:35:00.285] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C4.dat
[18:35:00.285] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C5.dat
[18:35:00.285] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C6.dat
[18:35:00.285] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C7.dat
[18:35:00.285] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C8.dat
[18:35:00.285] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C9.dat
[18:35:00.285] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C10.dat
[18:35:00.285] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C11.dat
[18:35:00.285] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C12.dat
[18:35:00.285] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C13.dat
[18:35:00.286] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C14.dat
[18:35:00.286] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//readbackCal_C15.dat
[18:35:00.313] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[18:35:00.314] <TB2> INFO: PixTestReadback::doTest() done
[18:35:00.314] <TB2> INFO: Decoding statistics:
[18:35:00.314] <TB2> INFO: General information:
[18:35:00.314] <TB2> INFO: 16bit words read: 1536
[18:35:00.314] <TB2> INFO: valid events total: 256
[18:35:00.314] <TB2> INFO: empty events: 256
[18:35:00.314] <TB2> INFO: valid events with pixels: 0
[18:35:00.314] <TB2> INFO: valid pixel hits: 0
[18:35:00.314] <TB2> INFO: Event errors: 0
[18:35:00.314] <TB2> INFO: start marker: 0
[18:35:00.314] <TB2> INFO: stop marker: 0
[18:35:00.314] <TB2> INFO: overflow: 0
[18:35:00.314] <TB2> INFO: invalid 5bit words: 0
[18:35:00.314] <TB2> INFO: invalid XOR eye diagram: 0
[18:35:00.314] <TB2> INFO: frame (failed synchr.): 0
[18:35:00.314] <TB2> INFO: idle data (no TBM trl): 0
[18:35:00.314] <TB2> INFO: no data (only TBM hdr): 0
[18:35:00.314] <TB2> INFO: TBM errors: 0
[18:35:00.314] <TB2> INFO: flawed TBM headers: 0
[18:35:00.314] <TB2> INFO: flawed TBM trailers: 0
[18:35:00.314] <TB2> INFO: event ID mismatches: 0
[18:35:00.314] <TB2> INFO: ROC errors: 0
[18:35:00.314] <TB2> INFO: missing ROC header(s): 0
[18:35:00.315] <TB2> INFO: misplaced readback start: 0
[18:35:00.315] <TB2> INFO: Pixel decoding errors: 0
[18:35:00.315] <TB2> INFO: pixel data incomplete: 0
[18:35:00.315] <TB2> INFO: pixel address: 0
[18:35:00.315] <TB2> INFO: pulse height fill bit: 0
[18:35:00.315] <TB2> INFO: buffer corruption: 0
[18:35:00.349] <TB2> INFO: ######################################################################
[18:35:00.349] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[18:35:00.349] <TB2> INFO: ######################################################################
[18:35:00.352] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[18:35:00.363] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[18:35:00.363] <TB2> INFO: run 1 of 1
[18:35:00.633] <TB2> INFO: Expecting 3120000 events.
[18:35:30.961] <TB2> INFO: 662580 events read in total (29737ms).











[18:36:00.480] <TB2> INFO: 1320245 events read in total (59256ms).











[18:36:29.822] <TB2> INFO: 1975405 events read in total (88598ms).











[18:36:59.652] <TB2> INFO: 2632380 events read in total (118428ms).











[18:37:21.845] <TB2> INFO: 3120000 events read in total (140621ms).
[18:37:21.919] <TB2> INFO: Test took 141556ms.
[18:37:47.439] <TB2> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 167 seconds
[18:37:47.439] <TB2> INFO: number of dead bumps (per ROC): 5 10 21 20 11 4 1 2 1 4 7 31 109 0 29 6
[18:37:47.439] <TB2> INFO: separation cut (per ROC): 106 101 109 97 107 102 105 109 100 101 106 108 87 613 94 105
[18:37:47.439] <TB2> INFO: Decoding statistics:
[18:37:47.439] <TB2> INFO: General information:
[18:37:47.439] <TB2> INFO: 16bit words read: 0
[18:37:47.439] <TB2> INFO: valid events total: 0
[18:37:47.439] <TB2> INFO: empty events: 0
[18:37:47.439] <TB2> INFO: valid events with pixels: 0
[18:37:47.439] <TB2> INFO: valid pixel hits: 0
[18:37:47.439] <TB2> INFO: Event errors: 0
[18:37:47.439] <TB2> INFO: start marker: 0
[18:37:47.439] <TB2> INFO: stop marker: 0
[18:37:47.440] <TB2> INFO: overflow: 0
[18:37:47.440] <TB2> INFO: invalid 5bit words: 0
[18:37:47.440] <TB2> INFO: invalid XOR eye diagram: 0
[18:37:47.440] <TB2> INFO: frame (failed synchr.): 0
[18:37:47.440] <TB2> INFO: idle data (no TBM trl): 0
[18:37:47.440] <TB2> INFO: no data (only TBM hdr): 0
[18:37:47.440] <TB2> INFO: TBM errors: 0
[18:37:47.440] <TB2> INFO: flawed TBM headers: 0
[18:37:47.440] <TB2> INFO: flawed TBM trailers: 0
[18:37:47.440] <TB2> INFO: event ID mismatches: 0
[18:37:47.440] <TB2> INFO: ROC errors: 0
[18:37:47.440] <TB2> INFO: missing ROC header(s): 0
[18:37:47.440] <TB2> INFO: misplaced readback start: 0
[18:37:47.440] <TB2> INFO: Pixel decoding errors: 0
[18:37:47.440] <TB2> INFO: pixel data incomplete: 0
[18:37:47.440] <TB2> INFO: pixel address: 0
[18:37:47.440] <TB2> INFO: pulse height fill bit: 0
[18:37:47.440] <TB2> INFO: buffer corruption: 0
[18:37:47.492] <TB2> INFO: ######################################################################
[18:37:47.492] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[18:37:47.492] <TB2> INFO: ######################################################################
[18:37:47.493] <TB2> INFO: ----------------------------------------------------------------------
[18:37:47.493] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[18:37:47.493] <TB2> INFO: ----------------------------------------------------------------------
[18:37:47.493] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[18:37:47.503] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[18:37:47.503] <TB2> INFO: run 1 of 1
[18:37:47.739] <TB2> INFO: Expecting 36608000 events.
[18:38:11.322] <TB2> INFO: 692950 events read in total (22992ms).
[18:38:34.078] <TB2> INFO: 1370600 events read in total (45748ms).
[18:38:56.612] <TB2> INFO: 2045200 events read in total (68282ms).
[18:39:19.370] <TB2> INFO: 2720300 events read in total (91040ms).
[18:39:41.932] <TB2> INFO: 3396500 events read in total (113602ms).
[18:40:04.783] <TB2> INFO: 4074350 events read in total (136453ms).
[18:40:27.627] <TB2> INFO: 4749700 events read in total (159297ms).
[18:40:50.298] <TB2> INFO: 5425550 events read in total (181968ms).
[18:41:13.135] <TB2> INFO: 6098200 events read in total (204805ms).
[18:41:35.847] <TB2> INFO: 6773100 events read in total (227517ms).
[18:41:58.513] <TB2> INFO: 7446800 events read in total (250183ms).
[18:42:21.188] <TB2> INFO: 8120800 events read in total (272858ms).
[18:42:43.990] <TB2> INFO: 8797000 events read in total (295660ms).
[18:43:06.441] <TB2> INFO: 9474300 events read in total (318111ms).
[18:43:29.060] <TB2> INFO: 10150100 events read in total (340730ms).
[18:43:51.841] <TB2> INFO: 10824250 events read in total (363511ms).
[18:44:14.642] <TB2> INFO: 11500000 events read in total (386312ms).
[18:44:37.514] <TB2> INFO: 12176050 events read in total (409184ms).
[18:45:00.102] <TB2> INFO: 12851100 events read in total (431772ms).
[18:45:22.670] <TB2> INFO: 13523150 events read in total (454340ms).
[18:45:45.185] <TB2> INFO: 14196500 events read in total (476855ms).
[18:46:07.903] <TB2> INFO: 14869300 events read in total (499573ms).
[18:46:30.503] <TB2> INFO: 15541500 events read in total (522173ms).
[18:46:52.896] <TB2> INFO: 16211800 events read in total (544566ms).
[18:47:15.509] <TB2> INFO: 16884450 events read in total (567179ms).
[18:47:37.000] <TB2> INFO: 17555300 events read in total (589670ms).
[18:48:00.487] <TB2> INFO: 18224800 events read in total (612157ms).
[18:48:23.048] <TB2> INFO: 18892700 events read in total (634718ms).
[18:48:45.537] <TB2> INFO: 19561850 events read in total (657207ms).
[18:49:08.382] <TB2> INFO: 20230400 events read in total (680052ms).
[18:49:31.071] <TB2> INFO: 20899750 events read in total (702741ms).
[18:49:53.964] <TB2> INFO: 21567650 events read in total (725634ms).
[18:50:16.723] <TB2> INFO: 22237700 events read in total (748394ms).
[18:50:39.262] <TB2> INFO: 22905200 events read in total (770932ms).
[18:51:01.983] <TB2> INFO: 23575500 events read in total (793653ms).
[18:51:24.457] <TB2> INFO: 24243950 events read in total (816127ms).
[18:51:46.842] <TB2> INFO: 24911700 events read in total (838512ms).
[18:52:09.269] <TB2> INFO: 25579600 events read in total (860939ms).
[18:52:32.022] <TB2> INFO: 26248050 events read in total (883692ms).
[18:52:54.626] <TB2> INFO: 26914600 events read in total (906296ms).
[18:53:17.284] <TB2> INFO: 27583650 events read in total (928954ms).
[18:53:40.026] <TB2> INFO: 28250100 events read in total (951696ms).
[18:54:02.536] <TB2> INFO: 28918100 events read in total (974206ms).
[18:54:25.174] <TB2> INFO: 29585800 events read in total (996844ms).
[18:54:47.696] <TB2> INFO: 30251500 events read in total (1019366ms).
[18:55:09.998] <TB2> INFO: 30917600 events read in total (1041668ms).
[18:55:32.652] <TB2> INFO: 31585300 events read in total (1064322ms).
[18:55:55.307] <TB2> INFO: 32252200 events read in total (1086977ms).
[18:56:17.756] <TB2> INFO: 32920100 events read in total (1109426ms).
[18:56:40.358] <TB2> INFO: 33587950 events read in total (1132028ms).
[18:57:02.824] <TB2> INFO: 34256550 events read in total (1154494ms).
[18:57:25.235] <TB2> INFO: 34924400 events read in total (1176906ms).
[18:57:47.985] <TB2> INFO: 35593900 events read in total (1199655ms).
[18:58:10.814] <TB2> INFO: 36272600 events read in total (1222484ms).
[18:58:22.192] <TB2> INFO: 36608000 events read in total (1233862ms).
[18:58:22.259] <TB2> INFO: Test took 1234756ms.
[18:58:22.607] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:58:24.056] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:58:25.450] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:58:26.854] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:58:28.278] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:58:29.690] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:58:31.155] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:58:32.669] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:58:34.184] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:58:36.163] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:58:38.102] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:58:40.099] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:58:41.942] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:58:43.756] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:58:45.666] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:58:47.529] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:58:49.544] <TB2> INFO: PixTestScurves::scurves() done
[18:58:49.544] <TB2> INFO: Vcal mean: 114.67 117.34 132.17 121.67 135.45 127.33 118.62 125.70 122.27 128.49 118.33 122.59 118.65 129.21 117.19 128.10
[18:58:49.544] <TB2> INFO: Vcal RMS: 5.62 5.55 6.76 6.97 6.08 6.37 5.16 6.40 5.71 6.07 6.16 6.75 6.88 6.86 7.38 7.05
[18:58:49.544] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1262 seconds
[18:58:49.544] <TB2> INFO: Decoding statistics:
[18:58:49.544] <TB2> INFO: General information:
[18:58:49.544] <TB2> INFO: 16bit words read: 0
[18:58:49.544] <TB2> INFO: valid events total: 0
[18:58:49.544] <TB2> INFO: empty events: 0
[18:58:49.544] <TB2> INFO: valid events with pixels: 0
[18:58:49.544] <TB2> INFO: valid pixel hits: 0
[18:58:49.544] <TB2> INFO: Event errors: 0
[18:58:49.544] <TB2> INFO: start marker: 0
[18:58:49.544] <TB2> INFO: stop marker: 0
[18:58:49.545] <TB2> INFO: overflow: 0
[18:58:49.545] <TB2> INFO: invalid 5bit words: 0
[18:58:49.545] <TB2> INFO: invalid XOR eye diagram: 0
[18:58:49.545] <TB2> INFO: frame (failed synchr.): 0
[18:58:49.545] <TB2> INFO: idle data (no TBM trl): 0
[18:58:49.545] <TB2> INFO: no data (only TBM hdr): 0
[18:58:49.545] <TB2> INFO: TBM errors: 0
[18:58:49.545] <TB2> INFO: flawed TBM headers: 0
[18:58:49.545] <TB2> INFO: flawed TBM trailers: 0
[18:58:49.545] <TB2> INFO: event ID mismatches: 0
[18:58:49.545] <TB2> INFO: ROC errors: 0
[18:58:49.545] <TB2> INFO: missing ROC header(s): 0
[18:58:49.545] <TB2> INFO: misplaced readback start: 0
[18:58:49.545] <TB2> INFO: Pixel decoding errors: 0
[18:58:49.545] <TB2> INFO: pixel data incomplete: 0
[18:58:49.545] <TB2> INFO: pixel address: 0
[18:58:49.545] <TB2> INFO: pulse height fill bit: 0
[18:58:49.545] <TB2> INFO: buffer corruption: 0
[18:58:49.610] <TB2> INFO: ######################################################################
[18:58:49.610] <TB2> INFO: PixTestTrim::doTest()
[18:58:49.610] <TB2> INFO: ######################################################################
[18:58:49.611] <TB2> INFO: ----------------------------------------------------------------------
[18:58:49.611] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[18:58:49.611] <TB2> INFO: ----------------------------------------------------------------------
[18:58:49.653] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[18:58:49.653] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[18:58:49.663] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[18:58:49.663] <TB2> INFO: run 1 of 1
[18:58:49.897] <TB2> INFO: Expecting 5025280 events.
[18:59:20.634] <TB2> INFO: 826744 events read in total (30144ms).
[18:59:50.748] <TB2> INFO: 1652352 events read in total (60258ms).
[19:00:20.901] <TB2> INFO: 2475168 events read in total (90411ms).
[19:00:50.970] <TB2> INFO: 3294056 events read in total (120480ms).
[19:01:20.815] <TB2> INFO: 4109440 events read in total (150326ms).
[19:01:50.419] <TB2> INFO: 4923520 events read in total (179929ms).
[19:01:54.560] <TB2> INFO: 5025280 events read in total (184070ms).
[19:01:54.596] <TB2> INFO: Test took 184934ms.
[19:02:13.114] <TB2> INFO: ROC 0 VthrComp = 123
[19:02:13.114] <TB2> INFO: ROC 1 VthrComp = 118
[19:02:13.114] <TB2> INFO: ROC 2 VthrComp = 128
[19:02:13.114] <TB2> INFO: ROC 3 VthrComp = 125
[19:02:13.114] <TB2> INFO: ROC 4 VthrComp = 132
[19:02:13.114] <TB2> INFO: ROC 5 VthrComp = 125
[19:02:13.115] <TB2> INFO: ROC 6 VthrComp = 121
[19:02:13.115] <TB2> INFO: ROC 7 VthrComp = 127
[19:02:13.115] <TB2> INFO: ROC 8 VthrComp = 120
[19:02:13.115] <TB2> INFO: ROC 9 VthrComp = 125
[19:02:13.115] <TB2> INFO: ROC 10 VthrComp = 128
[19:02:13.115] <TB2> INFO: ROC 11 VthrComp = 125
[19:02:13.115] <TB2> INFO: ROC 12 VthrComp = 114
[19:02:13.115] <TB2> INFO: ROC 13 VthrComp = 132
[19:02:13.115] <TB2> INFO: ROC 14 VthrComp = 117
[19:02:13.115] <TB2> INFO: ROC 15 VthrComp = 131
[19:02:13.348] <TB2> INFO: Expecting 41600 events.
[19:02:16.789] <TB2> INFO: 41600 events read in total (2849ms).
[19:02:16.790] <TB2> INFO: Test took 3673ms.
[19:02:16.798] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[19:02:16.798] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[19:02:16.808] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:02:16.808] <TB2> INFO: run 1 of 1
[19:02:17.085] <TB2> INFO: Expecting 5025280 events.
[19:02:43.099] <TB2> INFO: 590856 events read in total (25422ms).
[19:03:08.490] <TB2> INFO: 1180064 events read in total (50813ms).
[19:03:34.189] <TB2> INFO: 1770216 events read in total (76512ms).
[19:03:59.723] <TB2> INFO: 2359000 events read in total (102046ms).
[19:04:25.203] <TB2> INFO: 2945096 events read in total (127526ms).
[19:04:50.828] <TB2> INFO: 3531000 events read in total (153151ms).
[19:05:16.342] <TB2> INFO: 4116080 events read in total (178665ms).
[19:05:43.189] <TB2> INFO: 4700752 events read in total (205512ms).
[19:05:57.372] <TB2> INFO: 5025280 events read in total (219695ms).
[19:05:57.430] <TB2> INFO: Test took 220622ms.
[19:06:22.200] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 58.3654 for pixel 0/79 mean/min/max = 44.7857/31.1206/58.4508
[19:06:22.201] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 58.9292 for pixel 41/8 mean/min/max = 45.7832/32.5615/59.0048
[19:06:22.201] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 62.6689 for pixel 0/78 mean/min/max = 47.4925/31.9953/62.9897
[19:06:22.201] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 60.6011 for pixel 7/33 mean/min/max = 46.2547/31.8482/60.6613
[19:06:22.202] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 65.9921 for pixel 23/79 mean/min/max = 50.6092/35.1425/66.076
[19:06:22.202] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 61.4304 for pixel 35/4 mean/min/max = 47.086/32.6198/61.5523
[19:06:22.202] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 59.4427 for pixel 25/11 mean/min/max = 46.6163/33.6629/59.5697
[19:06:22.203] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 61.6596 for pixel 14/6 mean/min/max = 46.1814/30.6758/61.687
[19:06:22.203] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 64.11 for pixel 33/1 mean/min/max = 48.2511/32.271/64.2312
[19:06:22.203] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 65.1868 for pixel 0/15 mean/min/max = 48.7405/31.9844/65.4967
[19:06:22.203] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 58.086 for pixel 10/76 mean/min/max = 45.0133/31.7596/58.2671
[19:06:22.204] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 61.7454 for pixel 11/8 mean/min/max = 46.9151/31.8498/61.9803
[19:06:22.204] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 62.136 for pixel 21/78 mean/min/max = 47.0285/31.7205/62.3365
[19:06:22.204] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 61.3766 for pixel 15/1 mean/min/max = 46.3113/31.2443/61.3783
[19:06:22.205] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 62.5213 for pixel 21/7 mean/min/max = 46.6615/30.7641/62.5589
[19:06:22.205] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 61.8908 for pixel 6/0 mean/min/max = 46.5183/31.115/61.9216
[19:06:22.205] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:06:22.299] <TB2> INFO: Expecting 411648 events.
[19:06:31.705] <TB2> INFO: 411648 events read in total (8814ms).
[19:06:31.714] <TB2> INFO: Expecting 411648 events.
[19:06:40.739] <TB2> INFO: 411648 events read in total (8622ms).
[19:06:40.748] <TB2> INFO: Expecting 411648 events.
[19:06:49.693] <TB2> INFO: 411648 events read in total (8542ms).
[19:06:49.707] <TB2> INFO: Expecting 411648 events.
[19:06:58.846] <TB2> INFO: 411648 events read in total (8736ms).
[19:06:58.861] <TB2> INFO: Expecting 411648 events.
[19:07:07.919] <TB2> INFO: 411648 events read in total (8655ms).
[19:07:07.941] <TB2> INFO: Expecting 411648 events.
[19:07:16.946] <TB2> INFO: 411648 events read in total (8602ms).
[19:07:16.966] <TB2> INFO: Expecting 411648 events.
[19:07:26.070] <TB2> INFO: 411648 events read in total (8701ms).
[19:07:26.092] <TB2> INFO: Expecting 411648 events.
[19:07:35.169] <TB2> INFO: 411648 events read in total (8674ms).
[19:07:35.201] <TB2> INFO: Expecting 411648 events.
[19:07:44.220] <TB2> INFO: 411648 events read in total (8616ms).
[19:07:44.246] <TB2> INFO: Expecting 411648 events.
[19:07:53.349] <TB2> INFO: 411648 events read in total (8700ms).
[19:07:53.377] <TB2> INFO: Expecting 411648 events.
[19:08:02.486] <TB2> INFO: 411648 events read in total (8706ms).
[19:08:02.517] <TB2> INFO: Expecting 411648 events.
[19:08:11.566] <TB2> INFO: 411648 events read in total (8646ms).
[19:08:11.599] <TB2> INFO: Expecting 411648 events.
[19:08:20.695] <TB2> INFO: 411648 events read in total (8693ms).
[19:08:20.733] <TB2> INFO: Expecting 411648 events.
[19:08:29.811] <TB2> INFO: 411648 events read in total (8675ms).
[19:08:29.854] <TB2> INFO: Expecting 411648 events.
[19:08:38.972] <TB2> INFO: 411648 events read in total (8715ms).
[19:08:39.015] <TB2> INFO: Expecting 411648 events.
[19:08:47.985] <TB2> INFO: 411648 events read in total (8568ms).
[19:08:48.035] <TB2> INFO: Test took 145830ms.
[19:08:48.787] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[19:08:48.797] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:08:48.797] <TB2> INFO: run 1 of 1
[19:08:49.031] <TB2> INFO: Expecting 5025280 events.
[19:09:15.279] <TB2> INFO: 591200 events read in total (25656ms).
[19:09:40.658] <TB2> INFO: 1179584 events read in total (51035ms).
[19:10:06.308] <TB2> INFO: 1767736 events read in total (76685ms).
[19:10:32.201] <TB2> INFO: 2355968 events read in total (102578ms).
[19:10:57.934] <TB2> INFO: 2945968 events read in total (128311ms).
[19:11:23.547] <TB2> INFO: 3537920 events read in total (153924ms).
[19:11:49.393] <TB2> INFO: 4127464 events read in total (179770ms).
[19:12:15.455] <TB2> INFO: 4717768 events read in total (205833ms).
[19:12:29.026] <TB2> INFO: 5025280 events read in total (219403ms).
[19:12:29.176] <TB2> INFO: Test took 220379ms.
[19:12:52.222] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 4.471663 .. 142.695472
[19:12:52.457] <TB2> INFO: Expecting 208000 events.
[19:13:01.969] <TB2> INFO: 208000 events read in total (8920ms).
[19:13:01.970] <TB2> INFO: Test took 9746ms.
[19:13:02.047] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 4 .. 152 (-1/-1) hits flags = 528 (plus default)
[19:13:02.059] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:13:02.059] <TB2> INFO: run 1 of 1
[19:13:02.348] <TB2> INFO: Expecting 4958720 events.
[19:13:28.745] <TB2> INFO: 581816 events read in total (25806ms).
[19:13:53.855] <TB2> INFO: 1163968 events read in total (50916ms).
[19:14:19.371] <TB2> INFO: 1745912 events read in total (76433ms).
[19:14:45.364] <TB2> INFO: 2327512 events read in total (102425ms).
[19:15:10.723] <TB2> INFO: 2908456 events read in total (127784ms).
[19:15:36.125] <TB2> INFO: 3489640 events read in total (153186ms).
[19:16:01.459] <TB2> INFO: 4069968 events read in total (178520ms).
[19:16:27.293] <TB2> INFO: 4649952 events read in total (204354ms).
[19:16:41.130] <TB2> INFO: 4958720 events read in total (218191ms).
[19:16:41.199] <TB2> INFO: Test took 219140ms.
[19:17:07.957] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 27.859230 .. 49.964236
[19:17:08.202] <TB2> INFO: Expecting 208000 events.
[19:17:18.124] <TB2> INFO: 208000 events read in total (9330ms).
[19:17:18.125] <TB2> INFO: Test took 10167ms.
[19:17:18.186] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 59 (-1/-1) hits flags = 528 (plus default)
[19:17:18.197] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:17:18.197] <TB2> INFO: run 1 of 1
[19:17:18.475] <TB2> INFO: Expecting 1431040 events.
[19:17:46.072] <TB2> INFO: 646560 events read in total (27005ms).
[19:18:14.068] <TB2> INFO: 1291632 events read in total (55001ms).
[19:18:20.369] <TB2> INFO: 1431040 events read in total (61302ms).
[19:18:20.397] <TB2> INFO: Test took 62201ms.
[19:18:36.093] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 27.783693 .. 50.709054
[19:18:36.413] <TB2> INFO: Expecting 208000 events.
[19:18:46.100] <TB2> INFO: 208000 events read in total (9096ms).
[19:18:46.100] <TB2> INFO: Test took 10006ms.
[19:18:46.164] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 17 .. 60 (-1/-1) hits flags = 528 (plus default)
[19:18:46.176] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:18:46.176] <TB2> INFO: run 1 of 1
[19:18:46.454] <TB2> INFO: Expecting 1464320 events.
[19:19:14.557] <TB2> INFO: 643176 events read in total (27511ms).
[19:19:41.862] <TB2> INFO: 1285040 events read in total (54816ms).
[19:19:49.686] <TB2> INFO: 1464320 events read in total (62640ms).
[19:19:49.714] <TB2> INFO: Test took 63538ms.
[19:20:04.363] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 24.764350 .. 47.671729
[19:20:04.596] <TB2> INFO: Expecting 208000 events.
[19:20:14.258] <TB2> INFO: 208000 events read in total (9070ms).
[19:20:14.259] <TB2> INFO: Test took 9895ms.
[19:20:14.305] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 14 .. 57 (-1/-1) hits flags = 528 (plus default)
[19:20:14.316] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:20:14.316] <TB2> INFO: run 1 of 1
[19:20:14.594] <TB2> INFO: Expecting 1464320 events.
[19:20:43.247] <TB2> INFO: 664704 events read in total (28062ms).
[19:21:11.169] <TB2> INFO: 1328648 events read in total (55985ms).
[19:21:17.106] <TB2> INFO: 1464320 events read in total (61921ms).
[19:21:17.133] <TB2> INFO: Test took 62817ms.
[19:21:30.571] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[19:21:30.571] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[19:21:30.581] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:21:30.581] <TB2> INFO: run 1 of 1
[19:21:30.859] <TB2> INFO: Expecting 1364480 events.
[19:21:59.393] <TB2> INFO: 668624 events read in total (27942ms).
[19:22:26.620] <TB2> INFO: 1336040 events read in total (55169ms).
[19:22:28.171] <TB2> INFO: 1364480 events read in total (56720ms).
[19:22:28.194] <TB2> INFO: Test took 57614ms.
[19:22:42.172] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C0.dat
[19:22:42.172] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C1.dat
[19:22:42.172] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C2.dat
[19:22:42.173] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C3.dat
[19:22:42.173] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C4.dat
[19:22:42.173] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C5.dat
[19:22:42.173] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C6.dat
[19:22:42.173] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C7.dat
[19:22:42.173] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C8.dat
[19:22:42.173] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C9.dat
[19:22:42.173] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C10.dat
[19:22:42.173] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C11.dat
[19:22:42.173] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C12.dat
[19:22:42.173] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C13.dat
[19:22:42.173] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C14.dat
[19:22:42.174] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C15.dat
[19:22:42.174] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters35_C0.dat
[19:22:42.181] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters35_C1.dat
[19:22:42.188] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters35_C2.dat
[19:22:42.195] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters35_C3.dat
[19:22:42.203] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters35_C4.dat
[19:22:42.210] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters35_C5.dat
[19:22:42.218] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters35_C6.dat
[19:22:42.225] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters35_C7.dat
[19:22:42.232] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters35_C8.dat
[19:22:42.239] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters35_C9.dat
[19:22:42.247] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters35_C10.dat
[19:22:42.256] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters35_C11.dat
[19:22:42.264] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters35_C12.dat
[19:22:42.273] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters35_C13.dat
[19:22:42.281] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters35_C14.dat
[19:22:42.289] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters35_C15.dat
[19:22:42.297] <TB2> INFO: PixTestTrim::trimTest() done
[19:22:42.298] <TB2> INFO: vtrim: 130 128 125 141 156 145 139 147 146 151 134 136 145 133 139 133
[19:22:42.298] <TB2> INFO: vthrcomp: 123 118 128 125 132 125 121 127 120 125 128 125 114 132 117 131
[19:22:42.298] <TB2> INFO: vcal mean: 34.92 35.01 35.17 35.00 35.37 35.13 34.97 35.10 35.13 35.36 34.98 35.10 35.09 35.22 34.95 35.06
[19:22:42.298] <TB2> INFO: vcal RMS: 1.25 1.04 1.29 1.39 1.54 1.21 1.05 1.44 1.16 1.54 1.06 1.19 1.31 1.46 1.11 1.41
[19:22:42.298] <TB2> INFO: bits mean: 9.60 9.73 9.09 9.94 8.81 9.80 9.71 10.44 9.56 9.35 10.08 9.73 10.11 9.91 9.71 10.37
[19:22:42.298] <TB2> INFO: bits RMS: 2.86 2.65 2.87 2.58 2.45 2.47 2.40 2.40 2.56 2.69 2.51 2.62 2.41 2.62 2.66 2.38
[19:22:42.305] <TB2> INFO: ----------------------------------------------------------------------
[19:22:42.305] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[19:22:42.305] <TB2> INFO: ----------------------------------------------------------------------
[19:22:42.308] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[19:22:42.319] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[19:22:42.319] <TB2> INFO: run 1 of 1
[19:22:42.564] <TB2> INFO: Expecting 4160000 events.
[19:23:15.047] <TB2> INFO: 762400 events read in total (31891ms).
[19:23:46.984] <TB2> INFO: 1521500 events read in total (63828ms).
[19:24:18.650] <TB2> INFO: 2275015 events read in total (95494ms).
[19:24:50.253] <TB2> INFO: 3025110 events read in total (127097ms).
[19:25:22.042] <TB2> INFO: 3774140 events read in total (158886ms).
[19:25:38.393] <TB2> INFO: 4160000 events read in total (175237ms).
[19:25:38.451] <TB2> INFO: Test took 176132ms.
[19:26:04.366] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 209 (-1/-1) hits flags = 528 (plus default)
[19:26:04.378] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[19:26:04.378] <TB2> INFO: run 1 of 1
[19:26:04.617] <TB2> INFO: Expecting 4368000 events.
[19:26:36.587] <TB2> INFO: 726335 events read in total (31378ms).
[19:27:07.877] <TB2> INFO: 1450035 events read in total (62668ms).
[19:27:38.925] <TB2> INFO: 2170250 events read in total (93716ms).
[19:28:09.798] <TB2> INFO: 2886915 events read in total (124589ms).
[19:28:40.868] <TB2> INFO: 3601720 events read in total (155659ms).
[19:29:11.550] <TB2> INFO: 4317825 events read in total (186341ms).
[19:29:14.024] <TB2> INFO: 4368000 events read in total (188815ms).
[19:29:14.093] <TB2> INFO: Test took 189715ms.
[19:29:41.762] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 202 (-1/-1) hits flags = 528 (plus default)
[19:29:41.774] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[19:29:41.774] <TB2> INFO: run 1 of 1
[19:29:42.035] <TB2> INFO: Expecting 4222400 events.
[19:30:14.004] <TB2> INFO: 735820 events read in total (31377ms).
[19:30:45.181] <TB2> INFO: 1469050 events read in total (62554ms).
[19:31:16.754] <TB2> INFO: 2197925 events read in total (94127ms).
[19:31:48.014] <TB2> INFO: 2923470 events read in total (125387ms).
[19:32:18.880] <TB2> INFO: 3647345 events read in total (156253ms).
[19:32:43.740] <TB2> INFO: 4222400 events read in total (181113ms).
[19:32:43.792] <TB2> INFO: Test took 182018ms.
[19:33:11.626] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 202 (-1/-1) hits flags = 528 (plus default)
[19:33:11.638] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[19:33:11.638] <TB2> INFO: run 1 of 1
[19:33:11.906] <TB2> INFO: Expecting 4222400 events.
[19:33:43.944] <TB2> INFO: 736250 events read in total (31446ms).
[19:34:15.214] <TB2> INFO: 1469840 events read in total (62716ms).
[19:34:46.171] <TB2> INFO: 2199230 events read in total (93673ms).
[19:35:17.290] <TB2> INFO: 2925120 events read in total (124792ms).
[19:35:48.022] <TB2> INFO: 3649495 events read in total (155524ms).
[19:36:12.738] <TB2> INFO: 4222400 events read in total (180240ms).
[19:36:12.792] <TB2> INFO: Test took 181154ms.
[19:36:40.885] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 201 (-1/-1) hits flags = 528 (plus default)
[19:36:40.895] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[19:36:40.895] <TB2> INFO: run 1 of 1
[19:36:41.127] <TB2> INFO: Expecting 4201600 events.
[19:37:12.922] <TB2> INFO: 738145 events read in total (31203ms).
[19:37:44.093] <TB2> INFO: 1473680 events read in total (62374ms).
[19:38:15.236] <TB2> INFO: 2204550 events read in total (93517ms).
[19:38:45.000] <TB2> INFO: 2931995 events read in total (124281ms).
[19:39:17.017] <TB2> INFO: 3658155 events read in total (155298ms).
[19:39:40.490] <TB2> INFO: 4201600 events read in total (178771ms).
[19:39:40.549] <TB2> INFO: Test took 179654ms.
[19:40:08.920] <TB2> INFO: PixTestTrim::trimBitTest() done
[19:40:08.921] <TB2> INFO: PixTestTrim::doTest() done, duration: 2479 seconds
[19:40:08.921] <TB2> INFO: Decoding statistics:
[19:40:08.922] <TB2> INFO: General information:
[19:40:08.922] <TB2> INFO: 16bit words read: 0
[19:40:08.922] <TB2> INFO: valid events total: 0
[19:40:08.922] <TB2> INFO: empty events: 0
[19:40:08.922] <TB2> INFO: valid events with pixels: 0
[19:40:08.922] <TB2> INFO: valid pixel hits: 0
[19:40:08.922] <TB2> INFO: Event errors: 0
[19:40:08.922] <TB2> INFO: start marker: 0
[19:40:08.922] <TB2> INFO: stop marker: 0
[19:40:08.922] <TB2> INFO: overflow: 0
[19:40:08.922] <TB2> INFO: invalid 5bit words: 0
[19:40:08.922] <TB2> INFO: invalid XOR eye diagram: 0
[19:40:08.922] <TB2> INFO: frame (failed synchr.): 0
[19:40:08.922] <TB2> INFO: idle data (no TBM trl): 0
[19:40:08.922] <TB2> INFO: no data (only TBM hdr): 0
[19:40:08.922] <TB2> INFO: TBM errors: 0
[19:40:08.922] <TB2> INFO: flawed TBM headers: 0
[19:40:08.922] <TB2> INFO: flawed TBM trailers: 0
[19:40:08.922] <TB2> INFO: event ID mismatches: 0
[19:40:08.922] <TB2> INFO: ROC errors: 0
[19:40:08.922] <TB2> INFO: missing ROC header(s): 0
[19:40:08.922] <TB2> INFO: misplaced readback start: 0
[19:40:08.922] <TB2> INFO: Pixel decoding errors: 0
[19:40:08.922] <TB2> INFO: pixel data incomplete: 0
[19:40:08.922] <TB2> INFO: pixel address: 0
[19:40:08.922] <TB2> INFO: pulse height fill bit: 0
[19:40:08.922] <TB2> INFO: buffer corruption: 0
[19:40:09.543] <TB2> INFO: ######################################################################
[19:40:09.543] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[19:40:09.543] <TB2> INFO: ######################################################################
[19:40:09.777] <TB2> INFO: Expecting 41600 events.
[19:40:13.283] <TB2> INFO: 41600 events read in total (2914ms).
[19:40:13.284] <TB2> INFO: Test took 3740ms.
[19:40:13.718] <TB2> INFO: Expecting 41600 events.
[19:40:17.286] <TB2> INFO: 41600 events read in total (2977ms).
[19:40:17.287] <TB2> INFO: Test took 3801ms.
[19:40:17.576] <TB2> INFO: Expecting 41600 events.
[19:40:21.139] <TB2> INFO: 41600 events read in total (2972ms).
[19:40:21.140] <TB2> INFO: Test took 3829ms.
[19:40:21.432] <TB2> INFO: Expecting 41600 events.
[19:40:24.953] <TB2> INFO: 41600 events read in total (2929ms).
[19:40:24.954] <TB2> INFO: Test took 3786ms.
[19:40:25.244] <TB2> INFO: Expecting 41600 events.
[19:40:28.761] <TB2> INFO: 41600 events read in total (2925ms).
[19:40:28.762] <TB2> INFO: Test took 3783ms.
[19:40:29.050] <TB2> INFO: Expecting 41600 events.
[19:40:32.683] <TB2> INFO: 41600 events read in total (3042ms).
[19:40:32.684] <TB2> INFO: Test took 3899ms.
[19:40:32.972] <TB2> INFO: Expecting 41600 events.
[19:40:36.482] <TB2> INFO: 41600 events read in total (2919ms).
[19:40:36.483] <TB2> INFO: Test took 3776ms.
[19:40:36.782] <TB2> INFO: Expecting 41600 events.
[19:40:40.263] <TB2> INFO: 41600 events read in total (2890ms).
[19:40:40.263] <TB2> INFO: Test took 3755ms.
[19:40:40.552] <TB2> INFO: Expecting 41600 events.
[19:40:44.015] <TB2> INFO: 41600 events read in total (2872ms).
[19:40:44.016] <TB2> INFO: Test took 3729ms.
[19:40:44.304] <TB2> INFO: Expecting 41600 events.
[19:40:47.882] <TB2> INFO: 41600 events read in total (2987ms).
[19:40:47.883] <TB2> INFO: Test took 3844ms.
[19:40:48.183] <TB2> INFO: Expecting 41600 events.
[19:40:51.649] <TB2> INFO: 41600 events read in total (2874ms).
[19:40:51.649] <TB2> INFO: Test took 3742ms.
[19:40:51.940] <TB2> INFO: Expecting 41600 events.
[19:40:55.411] <TB2> INFO: 41600 events read in total (2880ms).
[19:40:55.412] <TB2> INFO: Test took 3737ms.
[19:40:55.707] <TB2> INFO: Expecting 41600 events.
[19:40:59.198] <TB2> INFO: 41600 events read in total (2899ms).
[19:40:59.199] <TB2> INFO: Test took 3764ms.
[19:40:59.487] <TB2> INFO: Expecting 41600 events.
[19:41:02.970] <TB2> INFO: 41600 events read in total (2891ms).
[19:41:02.971] <TB2> INFO: Test took 3748ms.
[19:41:03.259] <TB2> INFO: Expecting 41600 events.
[19:41:06.734] <TB2> INFO: 41600 events read in total (2883ms).
[19:41:06.735] <TB2> INFO: Test took 3740ms.
[19:41:07.023] <TB2> INFO: Expecting 41600 events.
[19:41:10.462] <TB2> INFO: 41600 events read in total (2847ms).
[19:41:10.462] <TB2> INFO: Test took 3704ms.
[19:41:10.751] <TB2> INFO: Expecting 41600 events.
[19:41:14.200] <TB2> INFO: 41600 events read in total (2858ms).
[19:41:14.201] <TB2> INFO: Test took 3715ms.
[19:41:14.545] <TB2> INFO: Expecting 41600 events.
[19:41:18.061] <TB2> INFO: 41600 events read in total (2924ms).
[19:41:18.062] <TB2> INFO: Test took 3835ms.
[19:41:18.349] <TB2> INFO: Expecting 41600 events.
[19:41:21.890] <TB2> INFO: 41600 events read in total (2949ms).
[19:41:21.891] <TB2> INFO: Test took 3806ms.
[19:41:22.179] <TB2> INFO: Expecting 41600 events.
[19:41:25.760] <TB2> INFO: 41600 events read in total (2989ms).
[19:41:25.761] <TB2> INFO: Test took 3846ms.
[19:41:26.052] <TB2> INFO: Expecting 41600 events.
[19:41:29.593] <TB2> INFO: 41600 events read in total (2950ms).
[19:41:29.593] <TB2> INFO: Test took 3806ms.
[19:41:29.882] <TB2> INFO: Expecting 41600 events.
[19:41:33.329] <TB2> INFO: 41600 events read in total (2856ms).
[19:41:33.330] <TB2> INFO: Test took 3713ms.
[19:41:33.631] <TB2> INFO: Expecting 41600 events.
[19:41:37.279] <TB2> INFO: 41600 events read in total (3056ms).
[19:41:37.279] <TB2> INFO: Test took 3923ms.
[19:41:37.568] <TB2> INFO: Expecting 41600 events.
[19:41:41.080] <TB2> INFO: 41600 events read in total (2921ms).
[19:41:41.080] <TB2> INFO: Test took 3777ms.
[19:41:41.369] <TB2> INFO: Expecting 41600 events.
[19:41:44.851] <TB2> INFO: 41600 events read in total (2891ms).
[19:41:44.852] <TB2> INFO: Test took 3748ms.
[19:41:45.143] <TB2> INFO: Expecting 41600 events.
[19:41:48.591] <TB2> INFO: 41600 events read in total (2857ms).
[19:41:48.592] <TB2> INFO: Test took 3714ms.
[19:41:48.886] <TB2> INFO: Expecting 41600 events.
[19:41:52.428] <TB2> INFO: 41600 events read in total (2951ms).
[19:41:52.429] <TB2> INFO: Test took 3811ms.
[19:41:52.717] <TB2> INFO: Expecting 41600 events.
[19:41:56.169] <TB2> INFO: 41600 events read in total (2860ms).
[19:41:56.169] <TB2> INFO: Test took 3716ms.
[19:41:56.457] <TB2> INFO: Expecting 41600 events.
[19:41:59.942] <TB2> INFO: 41600 events read in total (2893ms).
[19:41:59.943] <TB2> INFO: Test took 3750ms.
[19:42:00.243] <TB2> INFO: Expecting 41600 events.
[19:42:03.696] <TB2> INFO: 41600 events read in total (2861ms).
[19:42:03.697] <TB2> INFO: Test took 3723ms.
[19:42:03.986] <TB2> INFO: Expecting 2560 events.
[19:42:04.870] <TB2> INFO: 2560 events read in total (292ms).
[19:42:04.870] <TB2> INFO: Test took 1160ms.
[19:42:05.178] <TB2> INFO: Expecting 2560 events.
[19:42:06.064] <TB2> INFO: 2560 events read in total (295ms).
[19:42:06.064] <TB2> INFO: Test took 1194ms.
[19:42:06.372] <TB2> INFO: Expecting 2560 events.
[19:42:07.254] <TB2> INFO: 2560 events read in total (290ms).
[19:42:07.255] <TB2> INFO: Test took 1191ms.
[19:42:07.562] <TB2> INFO: Expecting 2560 events.
[19:42:08.448] <TB2> INFO: 2560 events read in total (294ms).
[19:42:08.448] <TB2> INFO: Test took 1193ms.
[19:42:08.756] <TB2> INFO: Expecting 2560 events.
[19:42:09.636] <TB2> INFO: 2560 events read in total (289ms).
[19:42:09.637] <TB2> INFO: Test took 1189ms.
[19:42:09.944] <TB2> INFO: Expecting 2560 events.
[19:42:10.822] <TB2> INFO: 2560 events read in total (286ms).
[19:42:10.822] <TB2> INFO: Test took 1185ms.
[19:42:11.130] <TB2> INFO: Expecting 2560 events.
[19:42:12.008] <TB2> INFO: 2560 events read in total (286ms).
[19:42:12.008] <TB2> INFO: Test took 1185ms.
[19:42:12.316] <TB2> INFO: Expecting 2560 events.
[19:42:13.194] <TB2> INFO: 2560 events read in total (286ms).
[19:42:13.195] <TB2> INFO: Test took 1187ms.
[19:42:13.502] <TB2> INFO: Expecting 2560 events.
[19:42:14.379] <TB2> INFO: 2560 events read in total (285ms).
[19:42:14.380] <TB2> INFO: Test took 1185ms.
[19:42:14.687] <TB2> INFO: Expecting 2560 events.
[19:42:15.567] <TB2> INFO: 2560 events read in total (288ms).
[19:42:15.568] <TB2> INFO: Test took 1188ms.
[19:42:15.875] <TB2> INFO: Expecting 2560 events.
[19:42:16.754] <TB2> INFO: 2560 events read in total (287ms).
[19:42:16.754] <TB2> INFO: Test took 1186ms.
[19:42:17.062] <TB2> INFO: Expecting 2560 events.
[19:42:17.939] <TB2> INFO: 2560 events read in total (286ms).
[19:42:17.939] <TB2> INFO: Test took 1185ms.
[19:42:18.247] <TB2> INFO: Expecting 2560 events.
[19:42:19.134] <TB2> INFO: 2560 events read in total (295ms).
[19:42:19.134] <TB2> INFO: Test took 1195ms.
[19:42:19.442] <TB2> INFO: Expecting 2560 events.
[19:42:20.325] <TB2> INFO: 2560 events read in total (293ms).
[19:42:20.326] <TB2> INFO: Test took 1192ms.
[19:42:20.634] <TB2> INFO: Expecting 2560 events.
[19:42:21.517] <TB2> INFO: 2560 events read in total (292ms).
[19:42:21.518] <TB2> INFO: Test took 1192ms.
[19:42:21.825] <TB2> INFO: Expecting 2560 events.
[19:42:22.711] <TB2> INFO: 2560 events read in total (294ms).
[19:42:22.711] <TB2> INFO: Test took 1193ms.
[19:42:22.714] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:42:23.020] <TB2> INFO: Expecting 655360 events.
[19:42:37.329] <TB2> INFO: 655360 events read in total (13718ms).
[19:42:37.339] <TB2> INFO: Expecting 655360 events.
[19:42:51.296] <TB2> INFO: 655360 events read in total (13554ms).
[19:42:51.315] <TB2> INFO: Expecting 655360 events.
[19:43:05.428] <TB2> INFO: 655360 events read in total (13710ms).
[19:43:05.453] <TB2> INFO: Expecting 655360 events.
[19:43:19.619] <TB2> INFO: 655360 events read in total (13763ms).
[19:43:19.643] <TB2> INFO: Expecting 655360 events.
[19:43:33.831] <TB2> INFO: 655360 events read in total (13785ms).
[19:43:33.867] <TB2> INFO: Expecting 655360 events.
[19:43:48.029] <TB2> INFO: 655360 events read in total (13759ms).
[19:43:48.060] <TB2> INFO: Expecting 655360 events.
[19:44:02.178] <TB2> INFO: 655360 events read in total (13715ms).
[19:44:02.213] <TB2> INFO: Expecting 655360 events.
[19:44:16.406] <TB2> INFO: 655360 events read in total (13790ms).
[19:44:16.448] <TB2> INFO: Expecting 655360 events.
[19:44:30.617] <TB2> INFO: 655360 events read in total (13766ms).
[19:44:30.674] <TB2> INFO: Expecting 655360 events.
[19:44:44.805] <TB2> INFO: 655360 events read in total (13728ms).
[19:44:44.869] <TB2> INFO: Expecting 655360 events.
[19:44:58.889] <TB2> INFO: 655360 events read in total (13617ms).
[19:44:58.941] <TB2> INFO: Expecting 655360 events.
[19:45:13.056] <TB2> INFO: 655360 events read in total (13711ms).
[19:45:13.111] <TB2> INFO: Expecting 655360 events.
[19:45:27.200] <TB2> INFO: 655360 events read in total (13686ms).
[19:45:27.265] <TB2> INFO: Expecting 655360 events.
[19:45:41.381] <TB2> INFO: 655360 events read in total (13713ms).
[19:45:41.444] <TB2> INFO: Expecting 655360 events.
[19:45:55.541] <TB2> INFO: 655360 events read in total (13694ms).
[19:45:55.610] <TB2> INFO: Expecting 655360 events.
[19:46:09.747] <TB2> INFO: 655360 events read in total (13734ms).
[19:46:09.841] <TB2> INFO: Test took 227127ms.
[19:46:09.936] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:46:10.201] <TB2> INFO: Expecting 655360 events.
[19:46:24.381] <TB2> INFO: 655360 events read in total (13589ms).
[19:46:24.394] <TB2> INFO: Expecting 655360 events.
[19:46:38.187] <TB2> INFO: 655360 events read in total (13390ms).
[19:46:38.202] <TB2> INFO: Expecting 655360 events.
[19:46:52.289] <TB2> INFO: 655360 events read in total (13685ms).
[19:46:52.308] <TB2> INFO: Expecting 655360 events.
[19:47:06.140] <TB2> INFO: 655360 events read in total (13429ms).
[19:47:06.163] <TB2> INFO: Expecting 655360 events.
[19:47:20.014] <TB2> INFO: 655360 events read in total (13448ms).
[19:47:20.040] <TB2> INFO: Expecting 655360 events.
[19:47:34.004] <TB2> INFO: 655360 events read in total (13561ms).
[19:47:34.035] <TB2> INFO: Expecting 655360 events.
[19:47:47.749] <TB2> INFO: 655360 events read in total (13310ms).
[19:47:47.782] <TB2> INFO: Expecting 655360 events.
[19:48:01.636] <TB2> INFO: 655360 events read in total (13451ms).
[19:48:01.675] <TB2> INFO: Expecting 655360 events.
[19:48:15.627] <TB2> INFO: 655360 events read in total (13549ms).
[19:48:15.684] <TB2> INFO: Expecting 655360 events.
[19:48:29.455] <TB2> INFO: 655360 events read in total (13368ms).
[19:48:29.519] <TB2> INFO: Expecting 655360 events.
[19:48:43.514] <TB2> INFO: 655360 events read in total (13592ms).
[19:48:43.563] <TB2> INFO: Expecting 655360 events.
[19:48:57.189] <TB2> INFO: 655360 events read in total (13223ms).
[19:48:57.259] <TB2> INFO: Expecting 655360 events.
[19:49:11.010] <TB2> INFO: 655360 events read in total (13348ms).
[19:49:11.070] <TB2> INFO: Expecting 655360 events.
[19:49:24.766] <TB2> INFO: 655360 events read in total (13294ms).
[19:49:24.827] <TB2> INFO: Expecting 655360 events.
[19:49:38.770] <TB2> INFO: 655360 events read in total (13540ms).
[19:49:38.843] <TB2> INFO: Expecting 655360 events.
[19:49:52.907] <TB2> INFO: 655360 events read in total (13662ms).
[19:49:52.002] <TB2> INFO: Test took 223066ms.
[19:49:53.175] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:49:53.179] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:49:53.184] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:49:53.188] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:49:53.193] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:49:53.197] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:49:53.202] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:49:53.206] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[19:49:53.211] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[19:49:53.216] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[19:49:53.222] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:49:53.228] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:49:53.234] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[19:49:53.240] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[19:49:53.247] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:49:53.253] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:49:53.259] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:49:53.265] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:49:53.271] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[19:49:53.277] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[19:49:53.284] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[19:49:53.290] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[19:49:53.296] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[19:49:53.302] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[19:49:53.308] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:49:53.314] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:49:53.320] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[19:49:53.326] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[19:49:53.332] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[19:49:53.338] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:49:53.345] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[19:49:53.351] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[19:49:53.357] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[19:49:53.392] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C0.dat
[19:49:53.392] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C1.dat
[19:49:53.392] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C2.dat
[19:49:53.392] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C3.dat
[19:49:53.392] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C4.dat
[19:49:53.392] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C5.dat
[19:49:53.393] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C6.dat
[19:49:53.393] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C7.dat
[19:49:53.393] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C8.dat
[19:49:53.393] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C9.dat
[19:49:53.393] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C10.dat
[19:49:53.393] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C11.dat
[19:49:53.393] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C12.dat
[19:49:53.393] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C13.dat
[19:49:53.393] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C14.dat
[19:49:53.394] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters35_C15.dat
[19:49:53.630] <TB2> INFO: Expecting 41600 events.
[19:49:56.733] <TB2> INFO: 41600 events read in total (2511ms).
[19:49:56.734] <TB2> INFO: Test took 3338ms.
[19:49:57.180] <TB2> INFO: Expecting 41600 events.
[19:50:00.158] <TB2> INFO: 41600 events read in total (2387ms).
[19:50:00.159] <TB2> INFO: Test took 3214ms.
[19:50:00.626] <TB2> INFO: Expecting 41600 events.
[19:50:03.719] <TB2> INFO: 41600 events read in total (2501ms).
[19:50:03.719] <TB2> INFO: Test took 3349ms.
[19:50:03.938] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:04.026] <TB2> INFO: Expecting 2560 events.
[19:50:04.910] <TB2> INFO: 2560 events read in total (292ms).
[19:50:04.910] <TB2> INFO: Test took 972ms.
[19:50:04.912] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:05.219] <TB2> INFO: Expecting 2560 events.
[19:50:06.102] <TB2> INFO: 2560 events read in total (291ms).
[19:50:06.103] <TB2> INFO: Test took 1191ms.
[19:50:06.104] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:06.411] <TB2> INFO: Expecting 2560 events.
[19:50:07.295] <TB2> INFO: 2560 events read in total (293ms).
[19:50:07.295] <TB2> INFO: Test took 1191ms.
[19:50:07.297] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:07.604] <TB2> INFO: Expecting 2560 events.
[19:50:08.486] <TB2> INFO: 2560 events read in total (291ms).
[19:50:08.486] <TB2> INFO: Test took 1189ms.
[19:50:08.488] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:08.795] <TB2> INFO: Expecting 2560 events.
[19:50:09.678] <TB2> INFO: 2560 events read in total (292ms).
[19:50:09.678] <TB2> INFO: Test took 1190ms.
[19:50:09.680] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:09.987] <TB2> INFO: Expecting 2560 events.
[19:50:10.873] <TB2> INFO: 2560 events read in total (295ms).
[19:50:10.873] <TB2> INFO: Test took 1193ms.
[19:50:10.875] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:11.181] <TB2> INFO: Expecting 2560 events.
[19:50:12.066] <TB2> INFO: 2560 events read in total (294ms).
[19:50:12.066] <TB2> INFO: Test took 1191ms.
[19:50:12.068] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:12.375] <TB2> INFO: Expecting 2560 events.
[19:50:13.261] <TB2> INFO: 2560 events read in total (295ms).
[19:50:13.261] <TB2> INFO: Test took 1193ms.
[19:50:13.263] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:13.569] <TB2> INFO: Expecting 2560 events.
[19:50:14.448] <TB2> INFO: 2560 events read in total (287ms).
[19:50:14.448] <TB2> INFO: Test took 1185ms.
[19:50:14.450] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:14.757] <TB2> INFO: Expecting 2560 events.
[19:50:15.635] <TB2> INFO: 2560 events read in total (287ms).
[19:50:15.636] <TB2> INFO: Test took 1186ms.
[19:50:15.637] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:15.944] <TB2> INFO: Expecting 2560 events.
[19:50:16.825] <TB2> INFO: 2560 events read in total (289ms).
[19:50:16.825] <TB2> INFO: Test took 1188ms.
[19:50:16.827] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:17.133] <TB2> INFO: Expecting 2560 events.
[19:50:18.012] <TB2> INFO: 2560 events read in total (287ms).
[19:50:18.012] <TB2> INFO: Test took 1185ms.
[19:50:18.013] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:18.320] <TB2> INFO: Expecting 2560 events.
[19:50:19.202] <TB2> INFO: 2560 events read in total (290ms).
[19:50:19.203] <TB2> INFO: Test took 1190ms.
[19:50:19.205] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:19.511] <TB2> INFO: Expecting 2560 events.
[19:50:20.391] <TB2> INFO: 2560 events read in total (289ms).
[19:50:20.391] <TB2> INFO: Test took 1186ms.
[19:50:20.393] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:20.699] <TB2> INFO: Expecting 2560 events.
[19:50:21.578] <TB2> INFO: 2560 events read in total (287ms).
[19:50:21.578] <TB2> INFO: Test took 1185ms.
[19:50:21.580] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:21.886] <TB2> INFO: Expecting 2560 events.
[19:50:22.764] <TB2> INFO: 2560 events read in total (286ms).
[19:50:22.764] <TB2> INFO: Test took 1184ms.
[19:50:22.766] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:23.073] <TB2> INFO: Expecting 2560 events.
[19:50:23.955] <TB2> INFO: 2560 events read in total (291ms).
[19:50:23.955] <TB2> INFO: Test took 1189ms.
[19:50:23.957] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:24.264] <TB2> INFO: Expecting 2560 events.
[19:50:25.142] <TB2> INFO: 2560 events read in total (287ms).
[19:50:25.142] <TB2> INFO: Test took 1185ms.
[19:50:25.144] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:25.451] <TB2> INFO: Expecting 2560 events.
[19:50:26.329] <TB2> INFO: 2560 events read in total (287ms).
[19:50:26.329] <TB2> INFO: Test took 1185ms.
[19:50:26.331] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:26.638] <TB2> INFO: Expecting 2560 events.
[19:50:27.517] <TB2> INFO: 2560 events read in total (288ms).
[19:50:27.518] <TB2> INFO: Test took 1187ms.
[19:50:27.519] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:27.826] <TB2> INFO: Expecting 2560 events.
[19:50:28.708] <TB2> INFO: 2560 events read in total (290ms).
[19:50:28.708] <TB2> INFO: Test took 1189ms.
[19:50:28.710] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:29.017] <TB2> INFO: Expecting 2560 events.
[19:50:29.895] <TB2> INFO: 2560 events read in total (287ms).
[19:50:29.895] <TB2> INFO: Test took 1185ms.
[19:50:29.897] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:30.203] <TB2> INFO: Expecting 2560 events.
[19:50:31.082] <TB2> INFO: 2560 events read in total (287ms).
[19:50:31.082] <TB2> INFO: Test took 1185ms.
[19:50:31.084] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:31.390] <TB2> INFO: Expecting 2560 events.
[19:50:32.268] <TB2> INFO: 2560 events read in total (286ms).
[19:50:32.268] <TB2> INFO: Test took 1184ms.
[19:50:32.270] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:32.577] <TB2> INFO: Expecting 2560 events.
[19:50:33.462] <TB2> INFO: 2560 events read in total (294ms).
[19:50:33.462] <TB2> INFO: Test took 1192ms.
[19:50:33.464] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:33.770] <TB2> INFO: Expecting 2560 events.
[19:50:34.655] <TB2> INFO: 2560 events read in total (293ms).
[19:50:34.655] <TB2> INFO: Test took 1191ms.
[19:50:34.656] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:34.963] <TB2> INFO: Expecting 2560 events.
[19:50:35.846] <TB2> INFO: 2560 events read in total (291ms).
[19:50:35.846] <TB2> INFO: Test took 1190ms.
[19:50:35.848] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:36.155] <TB2> INFO: Expecting 2560 events.
[19:50:37.038] <TB2> INFO: 2560 events read in total (292ms).
[19:50:37.038] <TB2> INFO: Test took 1190ms.
[19:50:37.040] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:37.346] <TB2> INFO: Expecting 2560 events.
[19:50:38.229] <TB2> INFO: 2560 events read in total (292ms).
[19:50:38.229] <TB2> INFO: Test took 1189ms.
[19:50:38.231] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:38.538] <TB2> INFO: Expecting 2560 events.
[19:50:39.427] <TB2> INFO: 2560 events read in total (298ms).
[19:50:39.427] <TB2> INFO: Test took 1196ms.
[19:50:39.429] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:39.736] <TB2> INFO: Expecting 2560 events.
[19:50:40.621] <TB2> INFO: 2560 events read in total (294ms).
[19:50:40.622] <TB2> INFO: Test took 1193ms.
[19:50:40.624] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:50:40.930] <TB2> INFO: Expecting 2560 events.
[19:50:41.812] <TB2> INFO: 2560 events read in total (291ms).
[19:50:41.813] <TB2> INFO: Test took 1189ms.
[19:50:42.276] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 632 seconds
[19:50:42.276] <TB2> INFO: PH scale (per ROC): 46 51 51 50 44 49 45 40 40 34 45 42 47 43 42 39
[19:50:42.276] <TB2> INFO: PH offset (per ROC): 111 122 99 97 100 120 84 98 95 104 98 99 94 100 109 93
[19:50:42.281] <TB2> INFO: Decoding statistics:
[19:50:42.281] <TB2> INFO: General information:
[19:50:42.281] <TB2> INFO: 16bit words read: 127886
[19:50:42.281] <TB2> INFO: valid events total: 20480
[19:50:42.281] <TB2> INFO: empty events: 17977
[19:50:42.281] <TB2> INFO: valid events with pixels: 2503
[19:50:42.281] <TB2> INFO: valid pixel hits: 2503
[19:50:42.281] <TB2> INFO: Event errors: 0
[19:50:42.281] <TB2> INFO: start marker: 0
[19:50:42.281] <TB2> INFO: stop marker: 0
[19:50:42.281] <TB2> INFO: overflow: 0
[19:50:42.281] <TB2> INFO: invalid 5bit words: 0
[19:50:42.281] <TB2> INFO: invalid XOR eye diagram: 0
[19:50:42.281] <TB2> INFO: frame (failed synchr.): 0
[19:50:42.281] <TB2> INFO: idle data (no TBM trl): 0
[19:50:42.281] <TB2> INFO: no data (only TBM hdr): 0
[19:50:42.281] <TB2> INFO: TBM errors: 0
[19:50:42.281] <TB2> INFO: flawed TBM headers: 0
[19:50:42.281] <TB2> INFO: flawed TBM trailers: 0
[19:50:42.281] <TB2> INFO: event ID mismatches: 0
[19:50:42.281] <TB2> INFO: ROC errors: 0
[19:50:42.281] <TB2> INFO: missing ROC header(s): 0
[19:50:42.281] <TB2> INFO: misplaced readback start: 0
[19:50:42.281] <TB2> INFO: Pixel decoding errors: 0
[19:50:42.281] <TB2> INFO: pixel data incomplete: 0
[19:50:42.281] <TB2> INFO: pixel address: 0
[19:50:42.281] <TB2> INFO: pulse height fill bit: 0
[19:50:42.281] <TB2> INFO: buffer corruption: 0
[19:50:42.545] <TB2> INFO: ######################################################################
[19:50:42.545] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[19:50:42.545] <TB2> INFO: ######################################################################
[19:50:42.557] <TB2> INFO: scanning low vcal = 10
[19:50:42.830] <TB2> INFO: Expecting 41600 events.
[19:50:46.382] <TB2> INFO: 41600 events read in total (2961ms).
[19:50:46.382] <TB2> INFO: Test took 3825ms.
[19:50:46.383] <TB2> INFO: scanning low vcal = 20
[19:50:46.680] <TB2> INFO: Expecting 41600 events.
[19:50:50.241] <TB2> INFO: 41600 events read in total (2969ms).
[19:50:50.241] <TB2> INFO: Test took 3858ms.
[19:50:50.243] <TB2> INFO: scanning low vcal = 30
[19:50:50.539] <TB2> INFO: Expecting 41600 events.
[19:50:54.156] <TB2> INFO: 41600 events read in total (3026ms).
[19:50:54.157] <TB2> INFO: Test took 3914ms.
[19:50:54.159] <TB2> INFO: scanning low vcal = 40
[19:50:54.438] <TB2> INFO: Expecting 41600 events.
[19:50:58.336] <TB2> INFO: 41600 events read in total (3306ms).
[19:50:58.337] <TB2> INFO: Test took 4178ms.
[19:50:58.340] <TB2> INFO: scanning low vcal = 50
[19:50:58.617] <TB2> INFO: Expecting 41600 events.
[19:51:02.550] <TB2> INFO: 41600 events read in total (3342ms).
[19:51:02.551] <TB2> INFO: Test took 4211ms.
[19:51:02.553] <TB2> INFO: scanning low vcal = 60
[19:51:02.830] <TB2> INFO: Expecting 41600 events.
[19:51:06.771] <TB2> INFO: 41600 events read in total (3349ms).
[19:51:06.772] <TB2> INFO: Test took 4218ms.
[19:51:06.775] <TB2> INFO: scanning low vcal = 70
[19:51:07.051] <TB2> INFO: Expecting 41600 events.
[19:51:11.016] <TB2> INFO: 41600 events read in total (3373ms).
[19:51:11.016] <TB2> INFO: Test took 4241ms.
[19:51:11.019] <TB2> INFO: scanning low vcal = 80
[19:51:11.296] <TB2> INFO: Expecting 41600 events.
[19:51:15.217] <TB2> INFO: 41600 events read in total (3330ms).
[19:51:15.217] <TB2> INFO: Test took 4198ms.
[19:51:15.220] <TB2> INFO: scanning low vcal = 90
[19:51:15.497] <TB2> INFO: Expecting 41600 events.
[19:51:19.448] <TB2> INFO: 41600 events read in total (3360ms).
[19:51:19.449] <TB2> INFO: Test took 4229ms.
[19:51:19.451] <TB2> INFO: scanning low vcal = 100
[19:51:19.728] <TB2> INFO: Expecting 41600 events.
[19:51:23.669] <TB2> INFO: 41600 events read in total (3350ms).
[19:51:23.670] <TB2> INFO: Test took 4219ms.
[19:51:23.672] <TB2> INFO: scanning low vcal = 110
[19:51:23.949] <TB2> INFO: Expecting 41600 events.
[19:51:27.903] <TB2> INFO: 41600 events read in total (3362ms).
[19:51:27.904] <TB2> INFO: Test took 4232ms.
[19:51:27.906] <TB2> INFO: scanning low vcal = 120
[19:51:28.183] <TB2> INFO: Expecting 41600 events.
[19:51:32.109] <TB2> INFO: 41600 events read in total (3334ms).
[19:51:32.110] <TB2> INFO: Test took 4203ms.
[19:51:32.112] <TB2> INFO: scanning low vcal = 130
[19:51:32.389] <TB2> INFO: Expecting 41600 events.
[19:51:36.316] <TB2> INFO: 41600 events read in total (3336ms).
[19:51:36.317] <TB2> INFO: Test took 4205ms.
[19:51:36.319] <TB2> INFO: scanning low vcal = 140
[19:51:36.596] <TB2> INFO: Expecting 41600 events.
[19:51:40.539] <TB2> INFO: 41600 events read in total (3352ms).
[19:51:40.539] <TB2> INFO: Test took 4220ms.
[19:51:40.542] <TB2> INFO: scanning low vcal = 150
[19:51:40.819] <TB2> INFO: Expecting 41600 events.
[19:51:44.776] <TB2> INFO: 41600 events read in total (3366ms).
[19:51:44.776] <TB2> INFO: Test took 4234ms.
[19:51:44.779] <TB2> INFO: scanning low vcal = 160
[19:51:45.055] <TB2> INFO: Expecting 41600 events.
[19:51:48.977] <TB2> INFO: 41600 events read in total (3330ms).
[19:51:48.978] <TB2> INFO: Test took 4199ms.
[19:51:48.980] <TB2> INFO: scanning low vcal = 170
[19:51:49.257] <TB2> INFO: Expecting 41600 events.
[19:51:53.175] <TB2> INFO: 41600 events read in total (3326ms).
[19:51:53.176] <TB2> INFO: Test took 4195ms.
[19:51:53.179] <TB2> INFO: scanning low vcal = 180
[19:51:53.455] <TB2> INFO: Expecting 41600 events.
[19:51:57.368] <TB2> INFO: 41600 events read in total (3321ms).
[19:51:57.368] <TB2> INFO: Test took 4190ms.
[19:51:57.371] <TB2> INFO: scanning low vcal = 190
[19:51:57.648] <TB2> INFO: Expecting 41600 events.
[19:52:01.594] <TB2> INFO: 41600 events read in total (3355ms).
[19:52:01.594] <TB2> INFO: Test took 4223ms.
[19:52:01.597] <TB2> INFO: scanning low vcal = 200
[19:52:01.873] <TB2> INFO: Expecting 41600 events.
[19:52:05.844] <TB2> INFO: 41600 events read in total (3379ms).
[19:52:05.844] <TB2> INFO: Test took 4247ms.
[19:52:05.847] <TB2> INFO: scanning low vcal = 210
[19:52:06.124] <TB2> INFO: Expecting 41600 events.
[19:52:10.088] <TB2> INFO: 41600 events read in total (3373ms).
[19:52:10.089] <TB2> INFO: Test took 4242ms.
[19:52:10.092] <TB2> INFO: scanning low vcal = 220
[19:52:10.368] <TB2> INFO: Expecting 41600 events.
[19:52:14.290] <TB2> INFO: 41600 events read in total (3330ms).
[19:52:14.291] <TB2> INFO: Test took 4199ms.
[19:52:14.293] <TB2> INFO: scanning low vcal = 230
[19:52:14.570] <TB2> INFO: Expecting 41600 events.
[19:52:18.515] <TB2> INFO: 41600 events read in total (3354ms).
[19:52:18.516] <TB2> INFO: Test took 4222ms.
[19:52:18.519] <TB2> INFO: scanning low vcal = 240
[19:52:18.795] <TB2> INFO: Expecting 41600 events.
[19:52:22.723] <TB2> INFO: 41600 events read in total (3336ms).
[19:52:22.724] <TB2> INFO: Test took 4205ms.
[19:52:22.726] <TB2> INFO: scanning low vcal = 250
[19:52:22.003] <TB2> INFO: Expecting 41600 events.
[19:52:26.941] <TB2> INFO: 41600 events read in total (3347ms).
[19:52:26.941] <TB2> INFO: Test took 4215ms.
[19:52:26.945] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[19:52:27.221] <TB2> INFO: Expecting 41600 events.
[19:52:31.231] <TB2> INFO: 41600 events read in total (3419ms).
[19:52:31.232] <TB2> INFO: Test took 4287ms.
[19:52:31.234] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[19:52:31.511] <TB2> INFO: Expecting 41600 events.
[19:52:35.477] <TB2> INFO: 41600 events read in total (3375ms).
[19:52:35.478] <TB2> INFO: Test took 4243ms.
[19:52:35.482] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[19:52:35.757] <TB2> INFO: Expecting 41600 events.
[19:52:39.681] <TB2> INFO: 41600 events read in total (3332ms).
[19:52:39.681] <TB2> INFO: Test took 4199ms.
[19:52:39.684] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[19:52:39.961] <TB2> INFO: Expecting 41600 events.
[19:52:43.910] <TB2> INFO: 41600 events read in total (3358ms).
[19:52:43.911] <TB2> INFO: Test took 4227ms.
[19:52:43.914] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[19:52:44.190] <TB2> INFO: Expecting 41600 events.
[19:52:48.137] <TB2> INFO: 41600 events read in total (3355ms).
[19:52:48.138] <TB2> INFO: Test took 4224ms.
[19:52:48.582] <TB2> INFO: PixTestGainPedestal::measure() done
[19:53:25.771] <TB2> INFO: PixTestGainPedestal::fit() done
[19:53:25.771] <TB2> INFO: non-linearity mean: 0.946 0.980 0.976 0.962 0.970 0.964 0.950 0.950 0.936 0.919 0.954 0.920 0.939 0.934 0.971 0.929
[19:53:25.771] <TB2> INFO: non-linearity RMS: 0.060 0.005 0.009 0.030 0.017 0.022 0.135 0.049 0.120 0.130 0.042 0.132 0.125 0.082 0.025 0.080
[19:53:25.771] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//phCalibrationFitErr35_C0.dat
[19:53:25.785] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//phCalibrationFitErr35_C1.dat
[19:53:25.799] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//phCalibrationFitErr35_C2.dat
[19:53:25.816] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//phCalibrationFitErr35_C3.dat
[19:53:25.837] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//phCalibrationFitErr35_C4.dat
[19:53:25.857] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//phCalibrationFitErr35_C5.dat
[19:53:25.875] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//phCalibrationFitErr35_C6.dat
[19:53:25.894] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//phCalibrationFitErr35_C7.dat
[19:53:25.916] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//phCalibrationFitErr35_C8.dat
[19:53:25.938] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//phCalibrationFitErr35_C9.dat
[19:53:25.961] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//phCalibrationFitErr35_C10.dat
[19:53:25.983] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//phCalibrationFitErr35_C11.dat
[19:53:26.005] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//phCalibrationFitErr35_C12.dat
[19:53:26.027] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//phCalibrationFitErr35_C13.dat
[19:53:26.050] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//phCalibrationFitErr35_C14.dat
[19:53:26.072] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//phCalibrationFitErr35_C15.dat
[19:53:26.095] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 163 seconds
[19:53:26.095] <TB2> INFO: Decoding statistics:
[19:53:26.095] <TB2> INFO: General information:
[19:53:26.095] <TB2> INFO: 16bit words read: 3277986
[19:53:26.095] <TB2> INFO: valid events total: 332800
[19:53:26.095] <TB2> INFO: empty events: 1896
[19:53:26.095] <TB2> INFO: valid events with pixels: 330904
[19:53:26.095] <TB2> INFO: valid pixel hits: 640593
[19:53:26.095] <TB2> INFO: Event errors: 0
[19:53:26.095] <TB2> INFO: start marker: 0
[19:53:26.095] <TB2> INFO: stop marker: 0
[19:53:26.095] <TB2> INFO: overflow: 0
[19:53:26.095] <TB2> INFO: invalid 5bit words: 0
[19:53:26.095] <TB2> INFO: invalid XOR eye diagram: 0
[19:53:26.095] <TB2> INFO: frame (failed synchr.): 0
[19:53:26.095] <TB2> INFO: idle data (no TBM trl): 0
[19:53:26.095] <TB2> INFO: no data (only TBM hdr): 0
[19:53:26.095] <TB2> INFO: TBM errors: 0
[19:53:26.095] <TB2> INFO: flawed TBM headers: 0
[19:53:26.095] <TB2> INFO: flawed TBM trailers: 0
[19:53:26.095] <TB2> INFO: event ID mismatches: 0
[19:53:26.095] <TB2> INFO: ROC errors: 0
[19:53:26.095] <TB2> INFO: missing ROC header(s): 0
[19:53:26.095] <TB2> INFO: misplaced readback start: 0
[19:53:26.095] <TB2> INFO: Pixel decoding errors: 0
[19:53:26.095] <TB2> INFO: pixel data incomplete: 0
[19:53:26.095] <TB2> INFO: pixel address: 0
[19:53:26.095] <TB2> INFO: pulse height fill bit: 0
[19:53:26.095] <TB2> INFO: buffer corruption: 0
[19:53:26.115] <TB2> INFO: Decoding statistics:
[19:53:26.115] <TB2> INFO: General information:
[19:53:26.115] <TB2> INFO: 16bit words read: 3407408
[19:53:26.115] <TB2> INFO: valid events total: 353536
[19:53:26.115] <TB2> INFO: empty events: 20129
[19:53:26.115] <TB2> INFO: valid events with pixels: 333407
[19:53:26.115] <TB2> INFO: valid pixel hits: 643096
[19:53:26.115] <TB2> INFO: Event errors: 0
[19:53:26.115] <TB2> INFO: start marker: 0
[19:53:26.115] <TB2> INFO: stop marker: 0
[19:53:26.115] <TB2> INFO: overflow: 0
[19:53:26.115] <TB2> INFO: invalid 5bit words: 0
[19:53:26.115] <TB2> INFO: invalid XOR eye diagram: 0
[19:53:26.115] <TB2> INFO: frame (failed synchr.): 0
[19:53:26.115] <TB2> INFO: idle data (no TBM trl): 0
[19:53:26.115] <TB2> INFO: no data (only TBM hdr): 0
[19:53:26.115] <TB2> INFO: TBM errors: 0
[19:53:26.115] <TB2> INFO: flawed TBM headers: 0
[19:53:26.115] <TB2> INFO: flawed TBM trailers: 0
[19:53:26.115] <TB2> INFO: event ID mismatches: 0
[19:53:26.115] <TB2> INFO: ROC errors: 0
[19:53:26.115] <TB2> INFO: missing ROC header(s): 0
[19:53:26.115] <TB2> INFO: misplaced readback start: 0
[19:53:26.115] <TB2> INFO: Pixel decoding errors: 0
[19:53:26.115] <TB2> INFO: pixel data incomplete: 0
[19:53:26.115] <TB2> INFO: pixel address: 0
[19:53:26.115] <TB2> INFO: pulse height fill bit: 0
[19:53:26.115] <TB2> INFO: buffer corruption: 0
[19:53:26.116] <TB2> INFO: enter test to run
[19:53:26.116] <TB2> INFO: test: Trim80 no parameter change
[19:53:26.116] <TB2> INFO: running: trim80
[19:53:26.137] <TB2> INFO: ######################################################################
[19:53:26.137] <TB2> INFO: PixTestTrim80::doTest()
[19:53:26.137] <TB2> INFO: ######################################################################
[19:53:26.138] <TB2> INFO: ----------------------------------------------------------------------
[19:53:26.138] <TB2> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[19:53:26.138] <TB2> INFO: ----------------------------------------------------------------------
[19:53:26.205] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[19:53:26.205] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[19:53:26.218] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:53:26.218] <TB2> INFO: run 1 of 1
[19:53:26.537] <TB2> INFO: Expecting 5025280 events.
[19:53:53.878] <TB2> INFO: 676344 events read in total (26749ms).
[19:54:20.745] <TB2> INFO: 1350552 events read in total (53616ms).
[19:54:47.830] <TB2> INFO: 2022968 events read in total (80701ms).
[19:55:14.573] <TB2> INFO: 2694840 events read in total (107444ms).
[19:55:41.293] <TB2> INFO: 3365448 events read in total (134164ms).
[19:56:07.848] <TB2> INFO: 4034240 events read in total (160719ms).
[19:56:34.341] <TB2> INFO: 4702144 events read in total (187212ms).
[19:56:47.496] <TB2> INFO: 5025280 events read in total (200368ms).
[19:56:47.554] <TB2> INFO: Test took 201336ms.
[19:57:11.586] <TB2> INFO: ROC 0 VthrComp = 71
[19:57:11.586] <TB2> INFO: ROC 1 VthrComp = 72
[19:57:11.587] <TB2> INFO: ROC 2 VthrComp = 79
[19:57:11.587] <TB2> INFO: ROC 3 VthrComp = 74
[19:57:11.587] <TB2> INFO: ROC 4 VthrComp = 85
[19:57:11.587] <TB2> INFO: ROC 5 VthrComp = 78
[19:57:11.587] <TB2> INFO: ROC 6 VthrComp = 73
[19:57:11.588] <TB2> INFO: ROC 7 VthrComp = 77
[19:57:11.588] <TB2> INFO: ROC 8 VthrComp = 75
[19:57:11.588] <TB2> INFO: ROC 9 VthrComp = 79
[19:57:11.588] <TB2> INFO: ROC 10 VthrComp = 74
[19:57:11.588] <TB2> INFO: ROC 11 VthrComp = 74
[19:57:11.588] <TB2> INFO: ROC 12 VthrComp = 71
[19:57:11.588] <TB2> INFO: ROC 13 VthrComp = 80
[19:57:11.589] <TB2> INFO: ROC 14 VthrComp = 70
[19:57:11.589] <TB2> INFO: ROC 15 VthrComp = 80
[19:57:11.825] <TB2> INFO: Expecting 41600 events.
[19:57:15.334] <TB2> INFO: 41600 events read in total (2917ms).
[19:57:15.335] <TB2> INFO: Test took 3744ms.
[19:57:15.345] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[19:57:15.345] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[19:57:15.357] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:57:15.357] <TB2> INFO: run 1 of 1
[19:57:15.635] <TB2> INFO: Expecting 5025280 events.
[19:57:43.124] <TB2> INFO: 686280 events read in total (26898ms).
[19:58:09.995] <TB2> INFO: 1369224 events read in total (53769ms).
[19:58:37.374] <TB2> INFO: 2051456 events read in total (81148ms).
[19:59:04.538] <TB2> INFO: 2729816 events read in total (108312ms).
[19:59:31.949] <TB2> INFO: 3405672 events read in total (135723ms).
[19:59:59.356] <TB2> INFO: 4079936 events read in total (163130ms).
[20:00:26.449] <TB2> INFO: 4752976 events read in total (190223ms).
[20:00:37.523] <TB2> INFO: 5025280 events read in total (201297ms).
[20:00:37.570] <TB2> INFO: Test took 202213ms.
[20:01:04.443] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 105.71 for pixel 12/79 mean/min/max = 90.3742/74.8856/105.863
[20:01:04.443] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 107.739 for pixel 51/14 mean/min/max = 92.1648/76.532/107.798
[20:01:04.444] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 112.567 for pixel 0/65 mean/min/max = 95.0963/77.2809/112.912
[20:01:04.444] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 111.596 for pixel 17/11 mean/min/max = 94.6872/77.5748/111.8
[20:01:04.445] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 109.316 for pixel 0/72 mean/min/max = 92.0747/74.5085/109.641
[20:01:04.445] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 110.03 for pixel 0/59 mean/min/max = 93.8339/77.4985/110.169
[20:01:04.445] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 107.654 for pixel 0/64 mean/min/max = 92.3468/77.0276/107.666
[20:01:04.446] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 110.797 for pixel 12/20 mean/min/max = 94.457/77.8625/111.051
[20:01:04.446] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 108.665 for pixel 20/5 mean/min/max = 93.2218/77.46/108.983
[20:01:04.447] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 110.909 for pixel 0/79 mean/min/max = 93.7637/76.4077/111.12
[20:01:04.447] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 109.524 for pixel 1/22 mean/min/max = 93.2096/76.8567/109.562
[20:01:04.448] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 113.497 for pixel 0/4 mean/min/max = 95.4629/77.2543/113.672
[20:01:04.448] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 110.12 for pixel 0/1 mean/min/max = 92.0448/73.8425/110.247
[20:01:04.448] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 109.914 for pixel 0/21 mean/min/max = 92.3656/74.3355/110.396
[20:01:04.449] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 113.868 for pixel 0/26 mean/min/max = 93.8124/73.4261/114.199
[20:01:04.449] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 109.377 for pixel 0/76 mean/min/max = 91.9656/74.5005/109.431
[20:01:04.450] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:01:04.538] <TB2> INFO: Expecting 411648 events.
[20:01:13.981] <TB2> INFO: 411648 events read in total (8851ms).
[20:01:13.988] <TB2> INFO: Expecting 411648 events.
[20:01:23.241] <TB2> INFO: 411648 events read in total (8850ms).
[20:01:23.251] <TB2> INFO: Expecting 411648 events.
[20:01:32.427] <TB2> INFO: 411648 events read in total (8773ms).
[20:01:32.442] <TB2> INFO: Expecting 411648 events.
[20:01:41.511] <TB2> INFO: 411648 events read in total (8665ms).
[20:01:41.526] <TB2> INFO: Expecting 411648 events.
[20:01:50.627] <TB2> INFO: 411648 events read in total (8698ms).
[20:01:50.645] <TB2> INFO: Expecting 411648 events.
[20:01:59.763] <TB2> INFO: 411648 events read in total (8714ms).
[20:01:59.782] <TB2> INFO: Expecting 411648 events.
[20:02:08.816] <TB2> INFO: 411648 events read in total (8631ms).
[20:02:08.838] <TB2> INFO: Expecting 411648 events.
[20:02:17.954] <TB2> INFO: 411648 events read in total (8713ms).
[20:02:17.980] <TB2> INFO: Expecting 411648 events.
[20:02:27.076] <TB2> INFO: 411648 events read in total (8693ms).
[20:02:27.114] <TB2> INFO: Expecting 411648 events.
[20:02:36.165] <TB2> INFO: 411648 events read in total (8648ms).
[20:02:36.197] <TB2> INFO: Expecting 411648 events.
[20:02:45.264] <TB2> INFO: 411648 events read in total (8664ms).
[20:02:45.297] <TB2> INFO: Expecting 411648 events.
[20:02:54.385] <TB2> INFO: 411648 events read in total (8685ms).
[20:02:54.422] <TB2> INFO: Expecting 411648 events.
[20:03:03.461] <TB2> INFO: 411648 events read in total (8637ms).
[20:03:03.500] <TB2> INFO: Expecting 411648 events.
[20:03:12.581] <TB2> INFO: 411648 events read in total (8678ms).
[20:03:12.622] <TB2> INFO: Expecting 411648 events.
[20:03:21.738] <TB2> INFO: 411648 events read in total (8713ms).
[20:03:21.798] <TB2> INFO: Expecting 411648 events.
[20:03:30.923] <TB2> INFO: 411648 events read in total (8722ms).
[20:03:30.985] <TB2> INFO: Test took 146535ms.
[20:03:32.547] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[20:03:32.557] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:03:32.557] <TB2> INFO: run 1 of 1
[20:03:32.804] <TB2> INFO: Expecting 5025280 events.
[20:04:00.202] <TB2> INFO: 667760 events read in total (26807ms).
[20:04:26.995] <TB2> INFO: 1333312 events read in total (53600ms).
[20:04:54.142] <TB2> INFO: 1998392 events read in total (80747ms).
[20:05:21.036] <TB2> INFO: 2660680 events read in total (107641ms).
[20:05:47.745] <TB2> INFO: 3319160 events read in total (134350ms).
[20:06:14.248] <TB2> INFO: 3974848 events read in total (160853ms).
[20:06:40.437] <TB2> INFO: 4628424 events read in total (187042ms).
[20:06:56.759] <TB2> INFO: 5025280 events read in total (203364ms).
[20:06:56.808] <TB2> INFO: Test took 204250ms.
[20:07:20.643] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 49.614053 .. 100.436309
[20:07:20.890] <TB2> INFO: Expecting 208000 events.
[20:07:30.539] <TB2> INFO: 208000 events read in total (9058ms).
[20:07:30.540] <TB2> INFO: Test took 9895ms.
[20:07:30.588] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 39 .. 110 (-1/-1) hits flags = 528 (plus default)
[20:07:30.598] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:07:30.598] <TB2> INFO: run 1 of 1
[20:07:30.876] <TB2> INFO: Expecting 2396160 events.
[20:07:59.305] <TB2> INFO: 700248 events read in total (27837ms).
[20:08:27.085] <TB2> INFO: 1397056 events read in total (55617ms).
[20:08:54.527] <TB2> INFO: 2085168 events read in total (83059ms).
[20:09:07.358] <TB2> INFO: 2396160 events read in total (95890ms).
[20:09:07.389] <TB2> INFO: Test took 96791ms.
[20:09:24.480] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 58.568616 .. 90.755776
[20:09:24.751] <TB2> INFO: Expecting 208000 events.
[20:09:34.517] <TB2> INFO: 208000 events read in total (9174ms).
[20:09:34.518] <TB2> INFO: Test took 10035ms.
[20:09:34.590] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 48 .. 100 (-1/-1) hits flags = 528 (plus default)
[20:09:34.602] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:09:34.602] <TB2> INFO: run 1 of 1
[20:09:34.880] <TB2> INFO: Expecting 1763840 events.
[20:10:03.835] <TB2> INFO: 708040 events read in total (28363ms).
[20:10:32.040] <TB2> INFO: 1414800 events read in total (56569ms).
[20:10:46.126] <TB2> INFO: 1763840 events read in total (70654ms).
[20:10:46.156] <TB2> INFO: Test took 71554ms.
[20:11:02.636] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 62.296610 .. 84.081686
[20:11:02.879] <TB2> INFO: Expecting 208000 events.
[20:11:12.593] <TB2> INFO: 208000 events read in total (9122ms).
[20:11:12.594] <TB2> INFO: Test took 9956ms.
[20:11:12.640] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 52 .. 94 (-1/-1) hits flags = 528 (plus default)
[20:11:12.650] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:11:12.650] <TB2> INFO: run 1 of 1
[20:11:12.928] <TB2> INFO: Expecting 1431040 events.
[20:11:41.739] <TB2> INFO: 727912 events read in total (28220ms).
[20:12:09.851] <TB2> INFO: 1431040 events read in total (56332ms).
[20:12:09.882] <TB2> INFO: Test took 57233ms.
[20:12:24.433] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 64.259304 .. 83.041003
[20:12:24.681] <TB2> INFO: Expecting 208000 events.
[20:12:34.781] <TB2> INFO: 208000 events read in total (9508ms).
[20:12:34.782] <TB2> INFO: Test took 10347ms.
[20:12:34.844] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 54 .. 93 (-1/-1) hits flags = 528 (plus default)
[20:12:34.855] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:12:34.856] <TB2> INFO: run 1 of 1
[20:12:35.133] <TB2> INFO: Expecting 1331200 events.
[20:13:04.467] <TB2> INFO: 729248 events read in total (28742ms).
[20:13:28.307] <TB2> INFO: 1331200 events read in total (52582ms).
[20:13:28.331] <TB2> INFO: Test took 53475ms.
[20:13:44.751] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[20:13:44.751] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[20:13:44.761] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:13:44.762] <TB2> INFO: run 1 of 1
[20:13:44.000] <TB2> INFO: Expecting 1364480 events.
[20:14:12.983] <TB2> INFO: 668392 events read in total (27392ms).
[20:14:40.778] <TB2> INFO: 1335640 events read in total (55187ms).
[20:14:42.409] <TB2> INFO: 1364480 events read in total (56818ms).
[20:14:42.430] <TB2> INFO: Test took 57669ms.
[20:14:59.101] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters80_C0.dat
[20:14:59.101] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters80_C1.dat
[20:14:59.101] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters80_C2.dat
[20:14:59.101] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters80_C3.dat
[20:14:59.102] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters80_C4.dat
[20:14:59.102] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters80_C5.dat
[20:14:59.102] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters80_C6.dat
[20:14:59.102] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters80_C7.dat
[20:14:59.102] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters80_C8.dat
[20:14:59.102] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters80_C9.dat
[20:14:59.102] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters80_C10.dat
[20:14:59.102] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters80_C11.dat
[20:14:59.102] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters80_C12.dat
[20:14:59.102] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters80_C13.dat
[20:14:59.102] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters80_C14.dat
[20:14:59.103] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//dacParameters80_C15.dat
[20:14:59.103] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters80_C0.dat
[20:14:59.110] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters80_C1.dat
[20:14:59.115] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters80_C2.dat
[20:14:59.121] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters80_C3.dat
[20:14:59.127] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters80_C4.dat
[20:14:59.133] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters80_C5.dat
[20:14:59.138] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters80_C6.dat
[20:14:59.144] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters80_C7.dat
[20:14:59.149] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters80_C8.dat
[20:14:59.155] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters80_C9.dat
[20:14:59.161] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters80_C10.dat
[20:14:59.166] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters80_C11.dat
[20:14:59.171] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters80_C12.dat
[20:14:59.177] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters80_C13.dat
[20:14:59.182] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters80_C14.dat
[20:14:59.188] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1002_FullQualification_2016-11-04_10h05m_1478250315//003_FulltestTrim80_p17//trimParameters80_C15.dat
[20:14:59.194] <TB2> INFO: PixTestTrim80::trimTest() done
[20:14:59.194] <TB2> INFO: vtrim: 101 105 112 128 109 112 90 124 111 114 112 116 100 109 113 96
[20:14:59.194] <TB2> INFO: vthrcomp: 71 72 79 74 85 78 73 77 75 79 74 74 71 80 70 80
[20:14:59.194] <TB2> INFO: vcal mean: 79.91 79.99 79.97 79.91 79.94 79.96 79.99 79.94 79.99 79.98 80.05 79.87 79.89 79.94 79.96 79.92
[20:14:59.194] <TB2> INFO: vcal RMS: 1.90 0.73 0.79 2.28 0.83 0.77 0.67 1.94 0.78 0.82 0.77 0.83 1.12 0.97 0.81 1.47
[20:14:59.194] <TB2> INFO: bits mean: 10.20 10.13 9.49 10.22 10.13 9.74 9.27 10.05 9.89 9.58 9.97 9.87 9.93 10.16 9.84 10.38
[20:14:59.194] <TB2> INFO: bits RMS: 2.38 2.13 2.21 1.90 2.34 2.12 2.39 2.00 2.14 2.36 2.14 2.08 2.47 2.30 2.49 2.28
[20:14:59.200] <TB2> INFO: ----------------------------------------------------------------------
[20:14:59.200] <TB2> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[20:14:59.200] <TB2> INFO: ----------------------------------------------------------------------
[20:14:59.202] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[20:14:59.212] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:14:59.212] <TB2> INFO: run 1 of 1
[20:14:59.464] <TB2> INFO: Expecting 4160000 events.
[20:15:31.556] <TB2> INFO: 762335 events read in total (31500ms).
[20:16:03.141] <TB2> INFO: 1521725 events read in total (63085ms).
[20:16:34.617] <TB2> INFO: 2275345 events read in total (94561ms).
[20:17:06.174] <TB2> INFO: 3025610 events read in total (126118ms).
[20:17:37.854] <TB2> INFO: 3774705 events read in total (157798ms).
[20:17:54.326] <TB2> INFO: 4160000 events read in total (174270ms).
[20:17:54.388] <TB2> INFO: Test took 175176ms.
[20:18:20.789] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 207 (-1/-1) hits flags = 528 (plus default)
[20:18:20.800] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:18:20.800] <TB2> INFO: run 1 of 1
[20:18:21.032] <TB2> INFO: Expecting 4326400 events.
[20:18:52.468] <TB2> INFO: 728885 events read in total (30844ms).
[20:19:23.310] <TB2> INFO: 1455430 events read in total (61686ms).
[20:19:54.304] <TB2> INFO: 2178220 events read in total (92680ms).
[20:20:25.367] <TB2> INFO: 2897225 events read in total (123743ms).
[20:20:56.507] <TB2> INFO: 3614795 events read in total (154883ms).
[20:21:27.132] <TB2> INFO: 4326400 events read in total (185508ms).
[20:21:27.188] <TB2> INFO: Test took 186388ms.
[20:21:54.409] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 201 (-1/-1) hits flags = 528 (plus default)
[20:21:54.420] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:21:54.420] <TB2> INFO: run 1 of 1
[20:21:54.654] <TB2> INFO: Expecting 4201600 events.
[20:22:26.648] <TB2> INFO: 737490 events read in total (31403ms).
[20:22:57.959] <TB2> INFO: 1472480 events read in total (62714ms).
[20:23:29.108] <TB2> INFO: 2202705 events read in total (93863ms).
[20:24:00.772] <TB2> INFO: 2929765 events read in total (125527ms).
[20:24:31.920] <TB2> INFO: 3655145 events read in total (156675ms).
[20:24:55.647] <TB2> INFO: 4201600 events read in total (180402ms).
[20:24:55.699] <TB2> INFO: Test took 181279ms.
[20:25:21.815] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 201 (-1/-1) hits flags = 528 (plus default)
[20:25:21.826] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:25:21.826] <TB2> INFO: run 1 of 1
[20:25:22.059] <TB2> INFO: Expecting 4201600 events.
[20:25:53.656] <TB2> INFO: 737975 events read in total (31006ms).
[20:26:24.680] <TB2> INFO: 1473420 events read in total (62030ms).
[20:26:55.877] <TB2> INFO: 2204190 events read in total (93227ms).
[20:27:27.063] <TB2> INFO: 2931730 events read in total (124413ms).
[20:27:58.135] <TB2> INFO: 3657645 events read in total (155485ms).
[20:28:21.408] <TB2> INFO: 4201600 events read in total (178758ms).
[20:28:21.468] <TB2> INFO: Test took 179643ms.
[20:28:48.664] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 202 (-1/-1) hits flags = 528 (plus default)
[20:28:48.675] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:28:48.675] <TB2> INFO: run 1 of 1
[20:28:48.907] <TB2> INFO: Expecting 4222400 events.
[20:29:20.755] <TB2> INFO: 736735 events read in total (31256ms).
[20:29:51.551] <TB2> INFO: 1471000 events read in total (62052ms).
[20:30:23.256] <TB2> INFO: 2200820 events read in total (93757ms).
[20:30:54.408] <TB2> INFO: 2927205 events read in total (124909ms).
[20:31:25.637] <TB2> INFO: 3652060 events read in total (156138ms).
[20:31:50.120] <TB2> INFO: 4222400 events read in total (180621ms).
[20:31:50.173] <TB2> INFO: Test took 181498ms.
[20:32:16.918] <TB2> INFO: PixTestTrim80::trimBitTest() done
[20:32:16.919] <TB2> INFO: PixTestTrim80::doTest() done, duration: 2330 seconds
[20:32:17.643] <TB2> INFO: enter test to run
[20:32:17.643] <TB2> INFO: test: exit no parameter change
[20:32:17.748] <TB2> QUIET: Connection to board 156 closed.
[20:32:17.749] <TB2> INFO: pXar: this is the end, my friend