[16:43:57.265] <TB1> INFO: *** Welcome to pxar ***
[16:43:57.265] <TB1> INFO: *** Today: 2016/11/04
[16:43:57.271] <TB1> INFO: *** Version: c8ba-dirty
[16:43:57.271] <TB1> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C15.dat
[16:43:57.272] <TB1> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//tbmParameters_C1b.dat
[16:43:57.272] <TB1> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//defaultMaskFile.dat
[16:43:57.272] <TB1> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters_C15.dat
[16:43:57.326] <TB1> INFO: clk: 4
[16:43:57.326] <TB1> INFO: ctr: 4
[16:43:57.326] <TB1> INFO: sda: 19
[16:43:57.326] <TB1> INFO: tin: 9
[16:43:57.326] <TB1> INFO: level: 15
[16:43:57.326] <TB1> INFO: triggerdelay: 0
[16:43:57.326] <TB1> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[16:43:57.326] <TB1> INFO: Log level: INFO
[16:43:57.334] <TB1> INFO: Found DTB DTB_WXBYFL
[16:43:57.344] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[16:43:57.346] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[16:43:57.348] <TB1> INFO: RPC call hashes of host and DTB match: 486171790
[16:43:58.899] <TB1> INFO: DUT info:
[16:43:58.899] <TB1> INFO: The DUT currently contains the following objects:
[16:43:58.899] <TB1> INFO: 4 TBM Cores tbm10c (4 ON)
[16:43:58.899] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:43:58.899] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:43:58.899] <TB1> INFO: TBM Core alpha (2): 7 registers set
[16:43:58.899] <TB1> INFO: TBM Core beta (3): 7 registers set
[16:43:58.899] <TB1> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[16:43:58.899] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[16:43:58.899] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[16:43:58.899] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[16:43:58.899] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[16:43:58.899] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[16:43:58.899] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[16:43:58.899] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[16:43:58.899] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[16:43:58.899] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[16:43:58.899] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[16:43:58.899] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[16:43:58.899] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[16:43:58.899] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[16:43:58.899] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[16:43:58.899] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[16:43:58.899] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[16:43:59.300] <TB1> INFO: enter 'restricted' command line mode
[16:43:59.300] <TB1> INFO: enter test to run
[16:43:59.300] <TB1> INFO: test: pretest no parameter change
[16:43:59.300] <TB1> INFO: running: pretest
[16:43:59.851] <TB1> INFO: ######################################################################
[16:43:59.851] <TB1> INFO: PixTestPretest::doTest()
[16:43:59.851] <TB1> INFO: ######################################################################
[16:43:59.852] <TB1> INFO: ----------------------------------------------------------------------
[16:43:59.852] <TB1> INFO: PixTestPretest::programROC()
[16:43:59.852] <TB1> INFO: ----------------------------------------------------------------------
[16:44:17.865] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[16:44:17.865] <TB1> INFO: IA differences per ROC: 19.3 16.1 18.5 19.3 17.7 20.1 19.3 16.9 16.1 21.7 16.1 19.3 17.7 18.5 18.5 18.5
[16:44:17.899] <TB1> INFO: ----------------------------------------------------------------------
[16:44:17.899] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[16:44:17.899] <TB1> INFO: ----------------------------------------------------------------------
[16:44:39.143] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 393.9 mA = 24.6187 mA/ROC
[16:44:39.143] <TB1> INFO: i(loss) [mA/ROC]: 19.3 20.1 21.7 19.3 20.9 19.3 19.3 20.1 19.3 20.1 19.3 20.9 19.3 20.1 20.9 20.1
[16:44:39.171] <TB1> INFO: ----------------------------------------------------------------------
[16:44:39.172] <TB1> INFO: PixTestPretest::findTiming()
[16:44:39.172] <TB1> INFO: ----------------------------------------------------------------------
[16:44:39.172] <TB1> INFO: PixTestCmd::init()

[16:45:10.343] <TB1> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[16:45:10.343] <TB1> INFO: (success/tries = 100/100), width = 4
[16:45:11.848] <TB1> INFO: ----------------------------------------------------------------------
[16:45:11.848] <TB1> INFO: PixTestPretest::findWorkingPixel()
[16:45:11.848] <TB1> INFO: ----------------------------------------------------------------------
[16:45:11.940] <TB1> INFO: Expecting 231680 events.
[16:45:21.576] <TB1> INFO: 231680 events read in total (9045ms).
[16:45:21.582] <TB1> INFO: Test took 9731ms.
[16:45:21.827] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[16:45:21.858] <TB1> INFO: ----------------------------------------------------------------------
[16:45:21.858] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[16:45:21.858] <TB1> INFO: ----------------------------------------------------------------------
[16:45:21.950] <TB1> INFO: Expecting 231680 events.
[16:45:31.592] <TB1> INFO: 231680 events read in total (9051ms).
[16:45:31.602] <TB1> INFO: Test took 9741ms.
[16:45:31.862] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[16:45:31.862] <TB1> INFO: CalDel: 99 100 107 102 107 101 91 91 88 109 105 101 106 110 111 98
[16:45:31.862] <TB1> INFO: VthrComp: 51 53 51 56 51 51 52 51 51 52 51 51 56 51 51 51
[16:45:31.864] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C0.dat
[16:45:31.864] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C1.dat
[16:45:31.864] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C2.dat
[16:45:31.864] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C3.dat
[16:45:31.864] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C4.dat
[16:45:31.864] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C5.dat
[16:45:31.864] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C6.dat
[16:45:31.865] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C7.dat
[16:45:31.865] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C8.dat
[16:45:31.865] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C9.dat
[16:45:31.865] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C10.dat
[16:45:31.865] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C11.dat
[16:45:31.865] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C12.dat
[16:45:31.865] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C13.dat
[16:45:31.865] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C14.dat
[16:45:31.865] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters_C15.dat
[16:45:31.865] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//tbmParameters_C0a.dat
[16:45:31.866] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//tbmParameters_C0b.dat
[16:45:31.866] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//tbmParameters_C1a.dat
[16:45:31.866] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//tbmParameters_C1b.dat
[16:45:31.866] <TB1> INFO: PixTestPretest::doTest() done, duration: 92 seconds
[16:45:31.995] <TB1> INFO: enter test to run
[16:45:31.995] <TB1> INFO: test: FullTest no parameter change
[16:45:31.995] <TB1> INFO: running: fulltest
[16:45:31.995] <TB1> INFO: ######################################################################
[16:45:31.995] <TB1> INFO: PixTestFullTest::doTest()
[16:45:31.995] <TB1> INFO: ######################################################################
[16:45:31.997] <TB1> INFO: ######################################################################
[16:45:31.997] <TB1> INFO: PixTestAlive::doTest()
[16:45:31.997] <TB1> INFO: ######################################################################
[16:45:31.998] <TB1> INFO: ----------------------------------------------------------------------
[16:45:31.998] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:45:31.998] <TB1> INFO: ----------------------------------------------------------------------
[16:45:32.232] <TB1> INFO: Expecting 41600 events.
[16:45:35.800] <TB1> INFO: 41600 events read in total (2976ms).
[16:45:35.800] <TB1> INFO: Test took 3801ms.
[16:45:36.026] <TB1> INFO: PixTestAlive::aliveTest() done
[16:45:36.026] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 32 0 0 0 0 0 0 4 12 0 0 0 0
[16:45:36.027] <TB1> INFO: ----------------------------------------------------------------------
[16:45:36.027] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:45:36.027] <TB1> INFO: ----------------------------------------------------------------------
[16:45:36.261] <TB1> INFO: Expecting 41600 events.
[16:45:39.281] <TB1> INFO: 41600 events read in total (2429ms).
[16:45:39.281] <TB1> INFO: Test took 3253ms.
[16:45:39.281] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[16:45:39.520] <TB1> INFO: PixTestAlive::maskTest() done
[16:45:39.520] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:45:39.521] <TB1> INFO: ----------------------------------------------------------------------
[16:45:39.521] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:45:39.521] <TB1> INFO: ----------------------------------------------------------------------
[16:45:39.795] <TB1> INFO: Expecting 41600 events.
[16:45:43.345] <TB1> INFO: 41600 events read in total (2958ms).
[16:45:43.346] <TB1> INFO: Test took 3824ms.
[16:45:43.574] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[16:45:43.574] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:45:43.574] <TB1> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[16:45:43.574] <TB1> INFO: Decoding statistics:
[16:45:43.574] <TB1> INFO: General information:
[16:45:43.574] <TB1> INFO: 16bit words read: 0
[16:45:43.574] <TB1> INFO: valid events total: 0
[16:45:43.574] <TB1> INFO: empty events: 0
[16:45:43.574] <TB1> INFO: valid events with pixels: 0
[16:45:43.574] <TB1> INFO: valid pixel hits: 0
[16:45:43.574] <TB1> INFO: Event errors: 0
[16:45:43.574] <TB1> INFO: start marker: 0
[16:45:43.574] <TB1> INFO: stop marker: 0
[16:45:43.574] <TB1> INFO: overflow: 0
[16:45:43.574] <TB1> INFO: invalid 5bit words: 0
[16:45:43.574] <TB1> INFO: invalid XOR eye diagram: 0
[16:45:43.574] <TB1> INFO: frame (failed synchr.): 0
[16:45:43.574] <TB1> INFO: idle data (no TBM trl): 0
[16:45:43.574] <TB1> INFO: no data (only TBM hdr): 0
[16:45:43.574] <TB1> INFO: TBM errors: 0
[16:45:43.574] <TB1> INFO: flawed TBM headers: 0
[16:45:43.574] <TB1> INFO: flawed TBM trailers: 0
[16:45:43.574] <TB1> INFO: event ID mismatches: 0
[16:45:43.574] <TB1> INFO: ROC errors: 0
[16:45:43.574] <TB1> INFO: missing ROC header(s): 0
[16:45:43.574] <TB1> INFO: misplaced readback start: 0
[16:45:43.574] <TB1> INFO: Pixel decoding errors: 0
[16:45:43.574] <TB1> INFO: pixel data incomplete: 0
[16:45:43.574] <TB1> INFO: pixel address: 0
[16:45:43.574] <TB1> INFO: pulse height fill bit: 0
[16:45:43.574] <TB1> INFO: buffer corruption: 0
[16:45:43.584] <TB1> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C15.dat
[16:45:43.584] <TB1> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[16:45:43.584] <TB1> INFO: ######################################################################
[16:45:43.584] <TB1> INFO: PixTestReadback::doTest()
[16:45:43.584] <TB1> INFO: ######################################################################
[16:45:43.584] <TB1> INFO: ----------------------------------------------------------------------
[16:45:43.584] <TB1> INFO: PixTestReadback::CalibrateVd()
[16:45:43.584] <TB1> INFO: ----------------------------------------------------------------------
[16:45:53.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C0.dat
[16:45:53.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C1.dat
[16:45:53.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C2.dat
[16:45:53.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C3.dat
[16:45:53.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C4.dat
[16:45:53.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C5.dat
[16:45:53.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C6.dat
[16:45:53.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C7.dat
[16:45:53.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C8.dat
[16:45:53.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C9.dat
[16:45:53.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C10.dat
[16:45:53.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C11.dat
[16:45:53.551] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C12.dat
[16:45:53.551] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C13.dat
[16:45:53.551] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C14.dat
[16:45:53.551] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C15.dat
[16:45:53.578] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:45:53.578] <TB1> INFO: ----------------------------------------------------------------------
[16:45:53.578] <TB1> INFO: PixTestReadback::CalibrateVa()
[16:45:53.578] <TB1> INFO: ----------------------------------------------------------------------
[16:46:03.469] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C0.dat
[16:46:03.469] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C1.dat
[16:46:03.469] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C2.dat
[16:46:03.469] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C3.dat
[16:46:03.469] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C4.dat
[16:46:03.469] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C5.dat
[16:46:03.469] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C6.dat
[16:46:03.470] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C7.dat
[16:46:03.470] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C8.dat
[16:46:03.470] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C9.dat
[16:46:03.470] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C10.dat
[16:46:03.470] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C11.dat
[16:46:03.470] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C12.dat
[16:46:03.470] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C13.dat
[16:46:03.470] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C14.dat
[16:46:03.470] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C15.dat
[16:46:03.498] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:46:03.498] <TB1> INFO: ----------------------------------------------------------------------
[16:46:03.498] <TB1> INFO: PixTestReadback::readbackVbg()
[16:46:03.498] <TB1> INFO: ----------------------------------------------------------------------
[16:46:11.138] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:46:11.138] <TB1> INFO: ----------------------------------------------------------------------
[16:46:11.138] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[16:46:11.138] <TB1> INFO: ----------------------------------------------------------------------
[16:46:11.138] <TB1> INFO: Vbg will be calibrated using Vd calibration
[16:46:11.138] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 154calibrated Vbg = 1.14412 :::*/*/*/*/
[16:46:11.138] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 148.1calibrated Vbg = 1.13729 :::*/*/*/*/
[16:46:11.138] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 150.7calibrated Vbg = 1.13743 :::*/*/*/*/
[16:46:11.138] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 156.3calibrated Vbg = 1.13359 :::*/*/*/*/
[16:46:11.138] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 152.6calibrated Vbg = 1.14416 :::*/*/*/*/
[16:46:11.138] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 158.3calibrated Vbg = 1.1463 :::*/*/*/*/
[16:46:11.138] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 162.8calibrated Vbg = 1.15411 :::*/*/*/*/
[16:46:11.138] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 151.5calibrated Vbg = 1.14959 :::*/*/*/*/
[16:46:11.138] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 169.5calibrated Vbg = 1.1343 :::*/*/*/*/
[16:46:11.138] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 146.8calibrated Vbg = 1.14016 :::*/*/*/*/
[16:46:11.138] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 162.6calibrated Vbg = 1.13142 :::*/*/*/*/
[16:46:11.138] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 149calibrated Vbg = 1.12958 :::*/*/*/*/
[16:46:11.138] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 156.1calibrated Vbg = 1.13393 :::*/*/*/*/
[16:46:11.138] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 158.7calibrated Vbg = 1.14865 :::*/*/*/*/
[16:46:11.138] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 157.9calibrated Vbg = 1.14865 :::*/*/*/*/
[16:46:11.138] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 161.1calibrated Vbg = 1.14407 :::*/*/*/*/
[16:46:11.140] <TB1> INFO: ----------------------------------------------------------------------
[16:46:11.140] <TB1> INFO: PixTestReadback::CalibrateIa()
[16:46:11.140] <TB1> INFO: ----------------------------------------------------------------------
[16:48:51.415] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C0.dat
[16:48:51.415] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C1.dat
[16:48:51.415] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C2.dat
[16:48:51.415] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C3.dat
[16:48:51.415] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C4.dat
[16:48:51.415] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C5.dat
[16:48:51.415] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C6.dat
[16:48:51.415] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C7.dat
[16:48:51.415] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C8.dat
[16:48:51.415] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C9.dat
[16:48:51.416] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C10.dat
[16:48:51.416] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C11.dat
[16:48:51.416] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C12.dat
[16:48:51.416] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C13.dat
[16:48:51.416] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C14.dat
[16:48:51.416] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//readbackCal_C15.dat
[16:48:51.444] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:48:51.446] <TB1> INFO: PixTestReadback::doTest() done
[16:48:51.446] <TB1> INFO: Decoding statistics:
[16:48:51.446] <TB1> INFO: General information:
[16:48:51.446] <TB1> INFO: 16bit words read: 1536
[16:48:51.446] <TB1> INFO: valid events total: 256
[16:48:51.446] <TB1> INFO: empty events: 256
[16:48:51.446] <TB1> INFO: valid events with pixels: 0
[16:48:51.446] <TB1> INFO: valid pixel hits: 0
[16:48:51.446] <TB1> INFO: Event errors: 0
[16:48:51.446] <TB1> INFO: start marker: 0
[16:48:51.446] <TB1> INFO: stop marker: 0
[16:48:51.446] <TB1> INFO: overflow: 0
[16:48:51.446] <TB1> INFO: invalid 5bit words: 0
[16:48:51.446] <TB1> INFO: invalid XOR eye diagram: 0
[16:48:51.446] <TB1> INFO: frame (failed synchr.): 0
[16:48:51.446] <TB1> INFO: idle data (no TBM trl): 0
[16:48:51.446] <TB1> INFO: no data (only TBM hdr): 0
[16:48:51.446] <TB1> INFO: TBM errors: 0
[16:48:51.446] <TB1> INFO: flawed TBM headers: 0
[16:48:51.446] <TB1> INFO: flawed TBM trailers: 0
[16:48:51.446] <TB1> INFO: event ID mismatches: 0
[16:48:51.446] <TB1> INFO: ROC errors: 0
[16:48:51.446] <TB1> INFO: missing ROC header(s): 0
[16:48:51.446] <TB1> INFO: misplaced readback start: 0
[16:48:51.446] <TB1> INFO: Pixel decoding errors: 0
[16:48:51.446] <TB1> INFO: pixel data incomplete: 0
[16:48:51.446] <TB1> INFO: pixel address: 0
[16:48:51.446] <TB1> INFO: pulse height fill bit: 0
[16:48:51.446] <TB1> INFO: buffer corruption: 0
[16:48:51.494] <TB1> INFO: ######################################################################
[16:48:51.494] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[16:48:51.494] <TB1> INFO: ######################################################################
[16:48:51.496] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[16:48:51.508] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[16:48:51.508] <TB1> INFO: run 1 of 1
[16:48:51.739] <TB1> INFO: Expecting 3120000 events.
[16:49:22.026] <TB1> INFO: 667105 events read in total (29695ms).











[16:49:51.755] <TB1> INFO: 1329620 events read in total (59424ms).











[16:50:21.194] <TB1> INFO: 1988465 events read in total (88863ms).











[16:50:50.700] <TB1> INFO: 2645365 events read in total (118369ms).











[16:51:12.206] <TB1> INFO: 3120000 events read in total (139875ms).
[16:51:12.261] <TB1> INFO: Test took 140754ms.
[16:51:40.238] <TB1> INFO: PixTestBBMap::doTest() done with 1 decoding errors: , duration: 168 seconds
[16:51:40.238] <TB1> INFO: number of dead bumps (per ROC): 0 1 0 11 0 1 2 0 0 0 0 2 1 1 2 0
[16:51:40.238] <TB1> INFO: separation cut (per ROC): 104 104 110 127 106 102 105 106 104 122 122 128 117 109 106 106
[16:51:40.238] <TB1> INFO: Decoding statistics:
[16:51:40.238] <TB1> INFO: General information:
[16:51:40.238] <TB1> INFO: 16bit words read: 0
[16:51:40.238] <TB1> INFO: valid events total: 0
[16:51:40.238] <TB1> INFO: empty events: 0
[16:51:40.238] <TB1> INFO: valid events with pixels: 0
[16:51:40.238] <TB1> INFO: valid pixel hits: 0
[16:51:40.238] <TB1> INFO: Event errors: 0
[16:51:40.238] <TB1> INFO: start marker: 0
[16:51:40.238] <TB1> INFO: stop marker: 0
[16:51:40.238] <TB1> INFO: overflow: 0
[16:51:40.238] <TB1> INFO: invalid 5bit words: 0
[16:51:40.238] <TB1> INFO: invalid XOR eye diagram: 0
[16:51:40.238] <TB1> INFO: frame (failed synchr.): 0
[16:51:40.238] <TB1> INFO: idle data (no TBM trl): 0
[16:51:40.238] <TB1> INFO: no data (only TBM hdr): 0
[16:51:40.238] <TB1> INFO: TBM errors: 0
[16:51:40.238] <TB1> INFO: flawed TBM headers: 0
[16:51:40.238] <TB1> INFO: flawed TBM trailers: 0
[16:51:40.238] <TB1> INFO: event ID mismatches: 0
[16:51:40.238] <TB1> INFO: ROC errors: 0
[16:51:40.238] <TB1> INFO: missing ROC header(s): 0
[16:51:40.238] <TB1> INFO: misplaced readback start: 0
[16:51:40.238] <TB1> INFO: Pixel decoding errors: 0
[16:51:40.238] <TB1> INFO: pixel data incomplete: 0
[16:51:40.238] <TB1> INFO: pixel address: 0
[16:51:40.238] <TB1> INFO: pulse height fill bit: 0
[16:51:40.238] <TB1> INFO: buffer corruption: 0
[16:51:40.282] <TB1> INFO: ######################################################################
[16:51:40.282] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:51:40.282] <TB1> INFO: ######################################################################
[16:51:40.282] <TB1> INFO: ----------------------------------------------------------------------
[16:51:40.282] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:51:40.282] <TB1> INFO: ----------------------------------------------------------------------
[16:51:40.282] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[16:51:40.292] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[16:51:40.292] <TB1> INFO: run 1 of 1
[16:51:40.547] <TB1> INFO: Expecting 36608000 events.
[16:52:03.755] <TB1> INFO: 684250 events read in total (22616ms).
[16:52:26.435] <TB1> INFO: 1354150 events read in total (45296ms).
[16:52:48.977] <TB1> INFO: 2022650 events read in total (67838ms).
[16:53:11.432] <TB1> INFO: 2690250 events read in total (90293ms).
[16:53:33.844] <TB1> INFO: 3359000 events read in total (112705ms).
[16:53:56.409] <TB1> INFO: 4026650 events read in total (135270ms).
[16:54:19.143] <TB1> INFO: 4691700 events read in total (158004ms).
[16:54:41.756] <TB1> INFO: 5357700 events read in total (180617ms).
[16:55:04.199] <TB1> INFO: 6024800 events read in total (203060ms).
[16:55:26.520] <TB1> INFO: 6689250 events read in total (225381ms).
[16:55:49.267] <TB1> INFO: 7354500 events read in total (248128ms).
[16:56:11.879] <TB1> INFO: 8022300 events read in total (270740ms).
[16:56:34.301] <TB1> INFO: 8687400 events read in total (293162ms).
[16:56:56.681] <TB1> INFO: 9351100 events read in total (315542ms).
[16:57:19.084] <TB1> INFO: 10013050 events read in total (337945ms).
[16:57:41.712] <TB1> INFO: 10680150 events read in total (360573ms).
[16:58:04.262] <TB1> INFO: 11344900 events read in total (383123ms).
[16:58:27.105] <TB1> INFO: 12011700 events read in total (405966ms).
[16:58:49.643] <TB1> INFO: 12677250 events read in total (428504ms).
[16:59:12.093] <TB1> INFO: 13340000 events read in total (450954ms).
[16:59:34.889] <TB1> INFO: 14004550 events read in total (473750ms).
[16:59:57.207] <TB1> INFO: 14667450 events read in total (496069ms).
[17:00:19.930] <TB1> INFO: 15330700 events read in total (518791ms).
[17:00:42.376] <TB1> INFO: 15995200 events read in total (541237ms).
[17:01:04.739] <TB1> INFO: 16657450 events read in total (563600ms).
[17:01:27.284] <TB1> INFO: 17322900 events read in total (586145ms).
[17:01:49.916] <TB1> INFO: 17985300 events read in total (608777ms).
[17:02:12.606] <TB1> INFO: 18650350 events read in total (631467ms).
[17:02:35.254] <TB1> INFO: 19311750 events read in total (654115ms).
[17:02:57.958] <TB1> INFO: 19971850 events read in total (676819ms).
[17:03:20.504] <TB1> INFO: 20634150 events read in total (699365ms).
[17:03:43.243] <TB1> INFO: 21295150 events read in total (722104ms).
[17:04:05.891] <TB1> INFO: 21955700 events read in total (744752ms).
[17:04:28.157] <TB1> INFO: 22614700 events read in total (767018ms).
[17:04:50.710] <TB1> INFO: 23278200 events read in total (789571ms).
[17:05:13.470] <TB1> INFO: 23939300 events read in total (812331ms).
[17:05:36.041] <TB1> INFO: 24602650 events read in total (834902ms).
[17:05:58.520] <TB1> INFO: 25263100 events read in total (857381ms).
[17:06:20.953] <TB1> INFO: 25925050 events read in total (879814ms).
[17:06:43.671] <TB1> INFO: 26586600 events read in total (902532ms).
[17:07:06.163] <TB1> INFO: 27249100 events read in total (925024ms).
[17:07:28.578] <TB1> INFO: 27909800 events read in total (947439ms).
[17:07:51.004] <TB1> INFO: 28571550 events read in total (969865ms).
[17:08:13.483] <TB1> INFO: 29232100 events read in total (992344ms).
[17:08:35.743] <TB1> INFO: 29893950 events read in total (1014604ms).
[17:08:58.224] <TB1> INFO: 30555900 events read in total (1037085ms).
[17:09:20.608] <TB1> INFO: 31215700 events read in total (1059469ms).
[17:09:43.132] <TB1> INFO: 31878650 events read in total (1081993ms).
[17:10:05.548] <TB1> INFO: 32539650 events read in total (1104409ms).
[17:10:27.960] <TB1> INFO: 33202700 events read in total (1126821ms).
[17:10:50.543] <TB1> INFO: 33865450 events read in total (1149404ms).
[17:11:13.152] <TB1> INFO: 34529250 events read in total (1172013ms).
[17:11:35.756] <TB1> INFO: 35193050 events read in total (1194617ms).
[17:11:58.185] <TB1> INFO: 35859250 events read in total (1217046ms).
[17:12:20.719] <TB1> INFO: 36534400 events read in total (1239580ms).
[17:12:23.519] <TB1> INFO: 36608000 events read in total (1242380ms).
[17:12:23.585] <TB1> INFO: Test took 1243292ms.
[17:12:23.985] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:12:25.721] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:12:27.380] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:12:29.095] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:12:30.795] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:12:32.664] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:12:34.621] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:12:36.623] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:12:38.483] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:12:40.552] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:12:42.561] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:12:44.532] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:12:46.523] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:12:48.578] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:12:50.585] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:12:52.423] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:12:54.457] <TB1> INFO: PixTestScurves::scurves() done
[17:12:54.457] <TB1> INFO: Vcal mean: 118.60 120.73 120.77 132.44 116.34 107.93 119.49 109.06 122.28 133.24 122.24 122.27 126.65 123.68 121.55 109.50
[17:12:54.457] <TB1> INFO: Vcal RMS: 5.61 6.05 6.56 9.04 5.21 4.93 6.24 5.12 6.15 6.05 8.10 7.23 7.12 6.20 5.92 5.00
[17:12:54.457] <TB1> INFO: PixTestScurves::fullTest() done, duration: 1274 seconds
[17:12:54.457] <TB1> INFO: Decoding statistics:
[17:12:54.457] <TB1> INFO: General information:
[17:12:54.457] <TB1> INFO: 16bit words read: 0
[17:12:54.457] <TB1> INFO: valid events total: 0
[17:12:54.457] <TB1> INFO: empty events: 0
[17:12:54.457] <TB1> INFO: valid events with pixels: 0
[17:12:54.457] <TB1> INFO: valid pixel hits: 0
[17:12:54.457] <TB1> INFO: Event errors: 0
[17:12:54.457] <TB1> INFO: start marker: 0
[17:12:54.457] <TB1> INFO: stop marker: 0
[17:12:54.457] <TB1> INFO: overflow: 0
[17:12:54.457] <TB1> INFO: invalid 5bit words: 0
[17:12:54.457] <TB1> INFO: invalid XOR eye diagram: 0
[17:12:54.457] <TB1> INFO: frame (failed synchr.): 0
[17:12:54.457] <TB1> INFO: idle data (no TBM trl): 0
[17:12:54.457] <TB1> INFO: no data (only TBM hdr): 0
[17:12:54.457] <TB1> INFO: TBM errors: 0
[17:12:54.458] <TB1> INFO: flawed TBM headers: 0
[17:12:54.458] <TB1> INFO: flawed TBM trailers: 0
[17:12:54.458] <TB1> INFO: event ID mismatches: 0
[17:12:54.458] <TB1> INFO: ROC errors: 0
[17:12:54.458] <TB1> INFO: missing ROC header(s): 0
[17:12:54.458] <TB1> INFO: misplaced readback start: 0
[17:12:54.458] <TB1> INFO: Pixel decoding errors: 0
[17:12:54.458] <TB1> INFO: pixel data incomplete: 0
[17:12:54.458] <TB1> INFO: pixel address: 0
[17:12:54.458] <TB1> INFO: pulse height fill bit: 0
[17:12:54.458] <TB1> INFO: buffer corruption: 0
[17:12:54.528] <TB1> INFO: ######################################################################
[17:12:54.528] <TB1> INFO: PixTestTrim::doTest()
[17:12:54.528] <TB1> INFO: ######################################################################
[17:12:54.529] <TB1> INFO: ----------------------------------------------------------------------
[17:12:54.529] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[17:12:54.529] <TB1> INFO: ----------------------------------------------------------------------
[17:12:54.571] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[17:12:54.571] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[17:12:54.582] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:12:54.582] <TB1> INFO: run 1 of 1
[17:12:54.814] <TB1> INFO: Expecting 5025280 events.
[17:13:25.170] <TB1> INFO: 825024 events read in total (29763ms).
[17:13:55.224] <TB1> INFO: 1647336 events read in total (59817ms).
[17:14:25.368] <TB1> INFO: 2467264 events read in total (89961ms).
[17:14:55.309] <TB1> INFO: 3283088 events read in total (119902ms).
[17:15:25.360] <TB1> INFO: 4096064 events read in total (149953ms).
[17:15:55.372] <TB1> INFO: 4909344 events read in total (179965ms).
[17:16:00.062] <TB1> INFO: 5025280 events read in total (184655ms).
[17:16:00.104] <TB1> INFO: Test took 185522ms.
[17:16:18.546] <TB1> INFO: ROC 0 VthrComp = 128
[17:16:18.547] <TB1> INFO: ROC 1 VthrComp = 129
[17:16:18.547] <TB1> INFO: ROC 2 VthrComp = 128
[17:16:18.547] <TB1> INFO: ROC 3 VthrComp = 135
[17:16:18.547] <TB1> INFO: ROC 4 VthrComp = 130
[17:16:18.547] <TB1> INFO: ROC 5 VthrComp = 113
[17:16:18.548] <TB1> INFO: ROC 6 VthrComp = 124
[17:16:18.548] <TB1> INFO: ROC 7 VthrComp = 113
[17:16:18.548] <TB1> INFO: ROC 8 VthrComp = 117
[17:16:18.548] <TB1> INFO: ROC 9 VthrComp = 135
[17:16:18.548] <TB1> INFO: ROC 10 VthrComp = 124
[17:16:18.548] <TB1> INFO: ROC 11 VthrComp = 132
[17:16:18.548] <TB1> INFO: ROC 12 VthrComp = 130
[17:16:18.549] <TB1> INFO: ROC 13 VthrComp = 130
[17:16:18.549] <TB1> INFO: ROC 14 VthrComp = 130
[17:16:18.549] <TB1> INFO: ROC 15 VthrComp = 116
[17:16:18.783] <TB1> INFO: Expecting 41600 events.
[17:16:22.223] <TB1> INFO: 41600 events read in total (2849ms).
[17:16:22.224] <TB1> INFO: Test took 3674ms.
[17:16:22.232] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[17:16:22.232] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[17:16:22.242] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:16:22.242] <TB1> INFO: run 1 of 1
[17:16:22.520] <TB1> INFO: Expecting 5025280 events.
[17:16:48.990] <TB1> INFO: 590056 events read in total (25879ms).
[17:17:14.648] <TB1> INFO: 1178408 events read in total (51537ms).
[17:17:40.476] <TB1> INFO: 1766920 events read in total (77365ms).
[17:18:06.008] <TB1> INFO: 2354960 events read in total (102897ms).
[17:18:31.347] <TB1> INFO: 2941064 events read in total (128236ms).
[17:18:56.612] <TB1> INFO: 3526024 events read in total (153501ms).
[17:19:21.864] <TB1> INFO: 4111168 events read in total (178753ms).
[17:19:47.417] <TB1> INFO: 4695864 events read in total (204306ms).
[17:20:02.054] <TB1> INFO: 5025280 events read in total (218943ms).
[17:20:02.130] <TB1> INFO: Test took 219888ms.
[17:20:29.767] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 58.5456 for pixel 39/55 mean/min/max = 44.9441/31.2043/58.684
[17:20:29.767] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 59.824 for pixel 0/69 mean/min/max = 45.4804/30.9481/60.0127
[17:20:29.768] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 61.1435 for pixel 0/6 mean/min/max = 45.8066/30.4206/61.1925
[17:20:29.768] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 67.69 for pixel 2/17 mean/min/max = 49.2761/29.8652/68.687
[17:20:29.768] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 58.3047 for pixel 31/69 mean/min/max = 45.4202/32.495/58.3454
[17:20:29.769] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 58.603 for pixel 51/1 mean/min/max = 45.1774/31.7502/58.6047
[17:20:29.769] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 60.8662 for pixel 20/10 mean/min/max = 46.0357/31.0638/61.0076
[17:20:29.770] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 59.182 for pixel 24/40 mean/min/max = 46.1027/32.9853/59.22
[17:20:29.770] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 64.3583 for pixel 0/1 mean/min/max = 47.7386/31.1077/64.3695
[17:20:29.770] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 62.8186 for pixel 10/9 mean/min/max = 48.3923/33.8602/62.9243
[17:20:29.771] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 64.799 for pixel 19/3 mean/min/max = 47.4079/29.6007/65.2151
[17:20:29.771] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 63.4298 for pixel 19/57 mean/min/max = 47.8439/31.9462/63.7416
[17:20:29.771] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 63.1962 for pixel 1/55 mean/min/max = 46.9666/30.7342/63.1989
[17:20:29.772] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 60.1235 for pixel 0/74 mean/min/max = 45.7986/31.2635/60.3338
[17:20:29.772] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 59.6987 for pixel 23/8 mean/min/max = 45.6297/31.5537/59.7058
[17:20:29.772] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 58.5404 for pixel 8/9 mean/min/max = 45.3478/32.0464/58.6493
[17:20:29.773] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:29.861] <TB1> INFO: Expecting 411648 events.
[17:20:39.325] <TB1> INFO: 411648 events read in total (8872ms).
[17:20:39.333] <TB1> INFO: Expecting 411648 events.
[17:20:48.590] <TB1> INFO: 411648 events read in total (8851ms).
[17:20:48.599] <TB1> INFO: Expecting 411648 events.
[17:20:57.756] <TB1> INFO: 411648 events read in total (8754ms).
[17:20:57.768] <TB1> INFO: Expecting 411648 events.
[17:21:06.825] <TB1> INFO: 411648 events read in total (8654ms).
[17:21:06.844] <TB1> INFO: Expecting 411648 events.
[17:21:15.940] <TB1> INFO: 411648 events read in total (8693ms).
[17:21:15.958] <TB1> INFO: Expecting 411648 events.
[17:21:24.001] <TB1> INFO: 411648 events read in total (8641ms).
[17:21:25.021] <TB1> INFO: Expecting 411648 events.
[17:21:34.044] <TB1> INFO: 411648 events read in total (8620ms).
[17:21:34.066] <TB1> INFO: Expecting 411648 events.
[17:21:43.081] <TB1> INFO: 411648 events read in total (8612ms).
[17:21:43.105] <TB1> INFO: Expecting 411648 events.
[17:21:52.134] <TB1> INFO: 411648 events read in total (8626ms).
[17:21:52.160] <TB1> INFO: Expecting 411648 events.
[17:22:01.225] <TB1> INFO: 411648 events read in total (8662ms).
[17:22:01.255] <TB1> INFO: Expecting 411648 events.
[17:22:10.333] <TB1> INFO: 411648 events read in total (8669ms).
[17:22:10.378] <TB1> INFO: Expecting 411648 events.
[17:22:19.322] <TB1> INFO: 411648 events read in total (8541ms).
[17:22:19.367] <TB1> INFO: Expecting 411648 events.
[17:22:28.414] <TB1> INFO: 411648 events read in total (8644ms).
[17:22:28.451] <TB1> INFO: Expecting 411648 events.
[17:22:37.466] <TB1> INFO: 411648 events read in total (8612ms).
[17:22:37.519] <TB1> INFO: Expecting 411648 events.
[17:22:46.603] <TB1> INFO: 411648 events read in total (8681ms).
[17:22:46.645] <TB1> INFO: Expecting 411648 events.
[17:22:55.717] <TB1> INFO: 411648 events read in total (8669ms).
[17:22:55.777] <TB1> INFO: Test took 146004ms.
[17:22:56.529] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[17:22:56.539] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:22:56.539] <TB1> INFO: run 1 of 1
[17:22:56.803] <TB1> INFO: Expecting 5025280 events.
[17:23:22.485] <TB1> INFO: 586816 events read in total (25090ms).
[17:23:47.866] <TB1> INFO: 1172344 events read in total (50471ms).
[17:24:13.595] <TB1> INFO: 1756552 events read in total (76200ms).
[17:24:39.249] <TB1> INFO: 2340616 events read in total (101854ms).
[17:25:04.951] <TB1> INFO: 2922760 events read in total (127556ms).
[17:25:30.457] <TB1> INFO: 3506960 events read in total (153062ms).
[17:25:56.235] <TB1> INFO: 4087296 events read in total (178840ms).
[17:26:21.671] <TB1> INFO: 4668456 events read in total (204276ms).
[17:26:37.429] <TB1> INFO: 5025280 events read in total (220034ms).
[17:26:37.585] <TB1> INFO: Test took 221046ms.
[17:27:01.341] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 3.500000 .. 146.312707
[17:27:01.588] <TB1> INFO: Expecting 208000 events.
[17:27:11.530] <TB1> INFO: 208000 events read in total (9350ms).
[17:27:11.531] <TB1> INFO: Test took 10189ms.
[17:27:11.582] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 3 .. 156 (-1/-1) hits flags = 528 (plus default)
[17:27:11.593] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:27:11.593] <TB1> INFO: run 1 of 1
[17:27:11.870] <TB1> INFO: Expecting 5125120 events.
[17:27:38.217] <TB1> INFO: 582032 events read in total (25755ms).
[17:28:03.878] <TB1> INFO: 1163344 events read in total (51416ms).
[17:28:29.055] <TB1> INFO: 1744472 events read in total (76593ms).
[17:28:55.563] <TB1> INFO: 2325792 events read in total (103101ms).
[17:29:21.172] <TB1> INFO: 2907208 events read in total (128710ms).
[17:29:46.559] <TB1> INFO: 3488048 events read in total (154097ms).
[17:30:12.500] <TB1> INFO: 4068656 events read in total (180038ms).
[17:30:38.107] <TB1> INFO: 4648944 events read in total (205645ms).
[17:30:59.530] <TB1> INFO: 5125120 events read in total (227068ms).
[17:30:59.612] <TB1> INFO: Test took 228019ms.
[17:31:26.284] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 27.436136 .. 66.621275
[17:31:26.582] <TB1> INFO: Expecting 208000 events.
[17:31:36.712] <TB1> INFO: 208000 events read in total (9538ms).
[17:31:36.713] <TB1> INFO: Test took 10428ms.
[17:31:36.758] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 76 (-1/-1) hits flags = 528 (plus default)
[17:31:36.769] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:31:36.769] <TB1> INFO: run 1 of 1
[17:31:37.047] <TB1> INFO: Expecting 1996800 events.
[17:32:04.102] <TB1> INFO: 607784 events read in total (26464ms).
[17:32:30.388] <TB1> INFO: 1215032 events read in total (52750ms).
[17:32:56.520] <TB1> INFO: 1821488 events read in total (78882ms).
[17:33:04.258] <TB1> INFO: 1996800 events read in total (86620ms).
[17:33:04.295] <TB1> INFO: Test took 87526ms.
[17:33:21.267] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 24.978638 .. 69.337675
[17:33:21.501] <TB1> INFO: Expecting 208000 events.
[17:33:31.492] <TB1> INFO: 208000 events read in total (9400ms).
[17:33:31.493] <TB1> INFO: Test took 10225ms.
[17:33:31.540] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 14 .. 79 (-1/-1) hits flags = 528 (plus default)
[17:33:31.550] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:33:31.550] <TB1> INFO: run 1 of 1
[17:33:31.828] <TB1> INFO: Expecting 2196480 events.
[17:33:58.710] <TB1> INFO: 612456 events read in total (26291ms).
[17:34:25.011] <TB1> INFO: 1224816 events read in total (52592ms).
[17:34:50.649] <TB1> INFO: 1836640 events read in total (78230ms).
[17:35:05.871] <TB1> INFO: 2196480 events read in total (93452ms).
[17:35:05.906] <TB1> INFO: Test took 94356ms.
[17:35:22.460] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 24.802601 .. 68.115574
[17:35:22.711] <TB1> INFO: Expecting 208000 events.
[17:35:32.490] <TB1> INFO: 208000 events read in total (9187ms).
[17:35:32.491] <TB1> INFO: Test took 10030ms.
[17:35:32.538] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 14 .. 78 (-1/-1) hits flags = 528 (plus default)
[17:35:32.551] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:35:32.551] <TB1> INFO: run 1 of 1
[17:35:32.829] <TB1> INFO: Expecting 2163200 events.
[17:35:59.876] <TB1> INFO: 613984 events read in total (26456ms).
[17:36:25.880] <TB1> INFO: 1227400 events read in total (52460ms).
[17:36:52.134] <TB1> INFO: 1840880 events read in total (78714ms).
[17:37:06.074] <TB1> INFO: 2163200 events read in total (92654ms).
[17:37:06.108] <TB1> INFO: Test took 93557ms.
[17:37:20.545] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[17:37:20.545] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[17:37:20.557] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:37:20.557] <TB1> INFO: run 1 of 1
[17:37:20.808] <TB1> INFO: Expecting 1364480 events.
[17:37:49.140] <TB1> INFO: 667432 events read in total (27740ms).
[17:38:16.667] <TB1> INFO: 1333536 events read in total (55267ms).
[17:38:18.406] <TB1> INFO: 1364480 events read in total (57007ms).
[17:38:18.429] <TB1> INFO: Test took 57873ms.
[17:38:33.244] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C0.dat
[17:38:33.244] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C1.dat
[17:38:33.244] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C2.dat
[17:38:33.244] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C3.dat
[17:38:33.244] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C4.dat
[17:38:33.244] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C5.dat
[17:38:33.244] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C6.dat
[17:38:33.244] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C7.dat
[17:38:33.244] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C8.dat
[17:38:33.245] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C9.dat
[17:38:33.245] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C10.dat
[17:38:33.245] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C11.dat
[17:38:33.245] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C12.dat
[17:38:33.245] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C13.dat
[17:38:33.245] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C14.dat
[17:38:33.245] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C15.dat
[17:38:33.245] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C0.dat
[17:38:33.254] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C1.dat
[17:38:33.262] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C2.dat
[17:38:33.270] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C3.dat
[17:38:33.278] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C4.dat
[17:38:33.287] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C5.dat
[17:38:33.295] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C6.dat
[17:38:33.303] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C7.dat
[17:38:33.311] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C8.dat
[17:38:33.319] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C9.dat
[17:38:33.328] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C10.dat
[17:38:33.336] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C11.dat
[17:38:33.344] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C12.dat
[17:38:33.353] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C13.dat
[17:38:33.361] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C14.dat
[17:38:33.369] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//trimParameters35_C15.dat
[17:38:33.378] <TB1> INFO: PixTestTrim::trimTest() done
[17:38:33.378] <TB1> INFO: vtrim: 141 127 145 157 149 118 150 133 147 146 161 87 142 119 131 149
[17:38:33.378] <TB1> INFO: vthrcomp: 128 129 128 135 130 113 124 113 117 135 124 132 130 130 130 116
[17:38:33.378] <TB1> INFO: vcal mean: 34.91 34.99 34.89 35.32 34.97 34.98 34.97 35.01 35.13 35.02 35.10 35.51 34.92 34.95 34.97 34.95
[17:38:33.378] <TB1> INFO: vcal RMS: 1.07 1.24 1.19 1.87 1.06 0.95 1.28 0.97 1.33 1.07 3.68 1.81 1.27 1.07 1.08 0.99
[17:38:33.378] <TB1> INFO: bits mean: 10.24 9.45 9.96 9.95 10.08 9.55 10.26 9.95 9.59 9.17 10.24 5.44 9.51 9.69 10.19 9.96
[17:38:33.378] <TB1> INFO: bits RMS: 2.46 2.88 2.66 2.28 2.42 2.72 2.41 2.32 2.72 2.39 2.40 3.54 2.78 2.70 2.45 2.51
[17:38:33.386] <TB1> INFO: ----------------------------------------------------------------------
[17:38:33.386] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[17:38:33.386] <TB1> INFO: ----------------------------------------------------------------------
[17:38:33.388] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[17:38:33.401] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:38:33.401] <TB1> INFO: run 1 of 1
[17:38:33.713] <TB1> INFO: Expecting 4160000 events.
[17:39:05.767] <TB1> INFO: 750125 events read in total (31463ms).
[17:39:37.244] <TB1> INFO: 1494595 events read in total (62940ms).
[17:40:08.162] <TB1> INFO: 2235990 events read in total (93858ms).
[17:40:39.325] <TB1> INFO: 2975430 events read in total (125021ms).
[17:41:10.512] <TB1> INFO: 3714140 events read in total (156208ms).
[17:41:29.398] <TB1> INFO: 4160000 events read in total (175094ms).
[17:41:29.493] <TB1> INFO: Test took 176092ms.
[17:41:56.252] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 216 (-1/-1) hits flags = 528 (plus default)
[17:41:56.262] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:41:56.262] <TB1> INFO: run 1 of 1
[17:41:56.504] <TB1> INFO: Expecting 4513600 events.
[17:42:27.638] <TB1> INFO: 707050 events read in total (30543ms).
[17:42:57.786] <TB1> INFO: 1408700 events read in total (60691ms).
[17:43:27.976] <TB1> INFO: 2109060 events read in total (90881ms).
[17:43:58.275] <TB1> INFO: 2806735 events read in total (121180ms).
[17:44:28.744] <TB1> INFO: 3504625 events read in total (151649ms).
[17:44:59.009] <TB1> INFO: 4202410 events read in total (181914ms).
[17:45:12.405] <TB1> INFO: 4513600 events read in total (195310ms).
[17:45:12.552] <TB1> INFO: Test took 196289ms.
[17:45:41.322] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[17:45:41.332] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:45:41.332] <TB1> INFO: run 1 of 1
[17:45:41.566] <TB1> INFO: Expecting 5324800 events.
[17:46:11.874] <TB1> INFO: 674070 events read in total (29717ms).
[17:46:42.331] <TB1> INFO: 1343870 events read in total (60174ms).
[17:47:11.836] <TB1> INFO: 2012725 events read in total (89679ms).
[17:47:41.544] <TB1> INFO: 2680540 events read in total (119387ms).
[17:48:11.160] <TB1> INFO: 3346090 events read in total (149003ms).
[17:48:41.089] <TB1> INFO: 4012600 events read in total (178932ms).
[17:49:10.502] <TB1> INFO: 4678260 events read in total (208345ms).
[17:49:39.148] <TB1> INFO: 5324800 events read in total (236991ms).
[17:49:39.339] <TB1> INFO: Test took 238006ms.
[17:50:14.357] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[17:50:14.368] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:50:14.368] <TB1> INFO: run 1 of 1
[17:50:14.613] <TB1> INFO: Expecting 5324800 events.
[17:50:44.900] <TB1> INFO: 674205 events read in total (29696ms).
[17:51:14.367] <TB1> INFO: 1344305 events read in total (59163ms).
[17:51:43.846] <TB1> INFO: 2013235 events read in total (88642ms).
[17:52:13.508] <TB1> INFO: 2681285 events read in total (118304ms).
[17:52:43.213] <TB1> INFO: 3346885 events read in total (148009ms).
[17:53:13.088] <TB1> INFO: 4013540 events read in total (177884ms).
[17:53:42.865] <TB1> INFO: 4679185 events read in total (207661ms).
[17:54:11.373] <TB1> INFO: 5324800 events read in total (236169ms).
[17:54:11.544] <TB1> INFO: Test took 237176ms.
[17:54:44.072] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[17:54:44.083] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:54:44.083] <TB1> INFO: run 1 of 1
[17:54:44.317] <TB1> INFO: Expecting 5324800 events.
[17:55:14.837] <TB1> INFO: 674290 events read in total (29929ms).
[17:55:44.360] <TB1> INFO: 1344375 events read in total (59451ms).
[17:56:13.839] <TB1> INFO: 2013310 events read in total (88930ms).
[17:56:43.289] <TB1> INFO: 2681455 events read in total (118380ms).
[17:57:12.507] <TB1> INFO: 3347095 events read in total (147598ms).
[17:57:41.954] <TB1> INFO: 4013875 events read in total (177045ms).
[17:58:11.060] <TB1> INFO: 4679650 events read in total (206151ms).
[17:58:39.430] <TB1> INFO: 5324800 events read in total (234521ms).
[17:58:39.559] <TB1> INFO: Test took 235476ms.
[17:59:11.547] <TB1> INFO: PixTestTrim::trimBitTest() done
[17:59:11.549] <TB1> INFO: PixTestTrim::doTest() done, duration: 2777 seconds
[17:59:11.549] <TB1> INFO: Decoding statistics:
[17:59:11.549] <TB1> INFO: General information:
[17:59:11.549] <TB1> INFO: 16bit words read: 0
[17:59:11.549] <TB1> INFO: valid events total: 0
[17:59:11.549] <TB1> INFO: empty events: 0
[17:59:11.549] <TB1> INFO: valid events with pixels: 0
[17:59:11.549] <TB1> INFO: valid pixel hits: 0
[17:59:11.549] <TB1> INFO: Event errors: 0
[17:59:11.549] <TB1> INFO: start marker: 0
[17:59:11.549] <TB1> INFO: stop marker: 0
[17:59:11.549] <TB1> INFO: overflow: 0
[17:59:11.549] <TB1> INFO: invalid 5bit words: 0
[17:59:11.549] <TB1> INFO: invalid XOR eye diagram: 0
[17:59:11.549] <TB1> INFO: frame (failed synchr.): 0
[17:59:11.549] <TB1> INFO: idle data (no TBM trl): 0
[17:59:11.549] <TB1> INFO: no data (only TBM hdr): 0
[17:59:11.549] <TB1> INFO: TBM errors: 0
[17:59:11.549] <TB1> INFO: flawed TBM headers: 0
[17:59:11.549] <TB1> INFO: flawed TBM trailers: 0
[17:59:11.549] <TB1> INFO: event ID mismatches: 0
[17:59:11.549] <TB1> INFO: ROC errors: 0
[17:59:11.549] <TB1> INFO: missing ROC header(s): 0
[17:59:11.549] <TB1> INFO: misplaced readback start: 0
[17:59:11.549] <TB1> INFO: Pixel decoding errors: 0
[17:59:11.549] <TB1> INFO: pixel data incomplete: 0
[17:59:11.549] <TB1> INFO: pixel address: 0
[17:59:11.549] <TB1> INFO: pulse height fill bit: 0
[17:59:11.549] <TB1> INFO: buffer corruption: 0
[17:59:12.162] <TB1> INFO: ######################################################################
[17:59:12.162] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[17:59:12.162] <TB1> INFO: ######################################################################
[17:59:12.395] <TB1> INFO: Expecting 41600 events.
[17:59:15.824] <TB1> INFO: 41600 events read in total (2837ms).
[17:59:15.825] <TB1> INFO: Test took 3662ms.
[17:59:16.260] <TB1> INFO: Expecting 41600 events.
[17:59:19.794] <TB1> INFO: 41600 events read in total (2943ms).
[17:59:19.795] <TB1> INFO: Test took 3767ms.
[17:59:20.098] <TB1> INFO: Expecting 41600 events.
[17:59:23.597] <TB1> INFO: 41600 events read in total (2908ms).
[17:59:23.598] <TB1> INFO: Test took 3780ms.
[17:59:23.897] <TB1> INFO: Expecting 41600 events.
[17:59:27.413] <TB1> INFO: 41600 events read in total (2924ms).
[17:59:27.413] <TB1> INFO: Test took 3789ms.
[17:59:27.704] <TB1> INFO: Expecting 41600 events.
[17:59:31.226] <TB1> INFO: 41600 events read in total (2931ms).
[17:59:31.227] <TB1> INFO: Test took 3788ms.
[17:59:31.517] <TB1> INFO: Expecting 41600 events.
[17:59:35.204] <TB1> INFO: 41600 events read in total (3095ms).
[17:59:35.205] <TB1> INFO: Test took 3952ms.
[17:59:35.495] <TB1> INFO: Expecting 41600 events.
[17:59:39.006] <TB1> INFO: 41600 events read in total (2919ms).
[17:59:39.006] <TB1> INFO: Test took 3775ms.
[17:59:39.294] <TB1> INFO: Expecting 41600 events.
[17:59:42.818] <TB1> INFO: 41600 events read in total (2932ms).
[17:59:42.818] <TB1> INFO: Test took 3788ms.
[17:59:43.109] <TB1> INFO: Expecting 41600 events.
[17:59:46.564] <TB1> INFO: 41600 events read in total (2864ms).
[17:59:46.565] <TB1> INFO: Test took 3721ms.
[17:59:46.853] <TB1> INFO: Expecting 41600 events.
[17:59:50.308] <TB1> INFO: 41600 events read in total (2863ms).
[17:59:50.308] <TB1> INFO: Test took 3720ms.
[17:59:50.597] <TB1> INFO: Expecting 41600 events.
[17:59:54.062] <TB1> INFO: 41600 events read in total (2873ms).
[17:59:54.063] <TB1> INFO: Test took 3731ms.
[17:59:54.350] <TB1> INFO: Expecting 41600 events.
[17:59:57.954] <TB1> INFO: 41600 events read in total (3012ms).
[17:59:57.955] <TB1> INFO: Test took 3869ms.
[17:59:58.243] <TB1> INFO: Expecting 41600 events.
[18:00:01.870] <TB1> INFO: 41600 events read in total (3035ms).
[18:00:01.870] <TB1> INFO: Test took 3891ms.
[18:00:02.159] <TB1> INFO: Expecting 41600 events.
[18:00:05.642] <TB1> INFO: 41600 events read in total (2892ms).
[18:00:05.643] <TB1> INFO: Test took 3749ms.
[18:00:05.931] <TB1> INFO: Expecting 41600 events.
[18:00:09.478] <TB1> INFO: 41600 events read in total (2955ms).
[18:00:09.478] <TB1> INFO: Test took 3812ms.
[18:00:09.767] <TB1> INFO: Expecting 41600 events.
[18:00:13.247] <TB1> INFO: 41600 events read in total (2889ms).
[18:00:13.247] <TB1> INFO: Test took 3745ms.
[18:00:13.536] <TB1> INFO: Expecting 41600 events.
[18:00:17.020] <TB1> INFO: 41600 events read in total (2893ms).
[18:00:17.021] <TB1> INFO: Test took 3750ms.
[18:00:17.309] <TB1> INFO: Expecting 41600 events.
[18:00:20.800] <TB1> INFO: 41600 events read in total (2899ms).
[18:00:20.800] <TB1> INFO: Test took 3756ms.
[18:00:21.088] <TB1> INFO: Expecting 41600 events.
[18:00:24.572] <TB1> INFO: 41600 events read in total (2892ms).
[18:00:24.573] <TB1> INFO: Test took 3750ms.
[18:00:24.863] <TB1> INFO: Expecting 41600 events.
[18:00:28.382] <TB1> INFO: 41600 events read in total (2928ms).
[18:00:28.383] <TB1> INFO: Test took 3785ms.
[18:00:28.675] <TB1> INFO: Expecting 41600 events.
[18:00:32.142] <TB1> INFO: 41600 events read in total (2876ms).
[18:00:32.143] <TB1> INFO: Test took 3733ms.
[18:00:32.431] <TB1> INFO: Expecting 41600 events.
[18:00:35.990] <TB1> INFO: 41600 events read in total (2968ms).
[18:00:35.990] <TB1> INFO: Test took 3824ms.
[18:00:36.281] <TB1> INFO: Expecting 41600 events.
[18:00:39.832] <TB1> INFO: 41600 events read in total (2959ms).
[18:00:39.833] <TB1> INFO: Test took 3816ms.
[18:00:40.121] <TB1> INFO: Expecting 41600 events.
[18:00:43.752] <TB1> INFO: 41600 events read in total (3039ms).
[18:00:43.752] <TB1> INFO: Test took 3895ms.
[18:00:44.040] <TB1> INFO: Expecting 41600 events.
[18:00:47.516] <TB1> INFO: 41600 events read in total (2884ms).
[18:00:47.517] <TB1> INFO: Test took 3741ms.
[18:00:47.805] <TB1> INFO: Expecting 41600 events.
[18:00:51.463] <TB1> INFO: 41600 events read in total (3067ms).
[18:00:51.464] <TB1> INFO: Test took 3924ms.
[18:00:51.752] <TB1> INFO: Expecting 41600 events.
[18:00:55.235] <TB1> INFO: 41600 events read in total (2891ms).
[18:00:55.236] <TB1> INFO: Test took 3748ms.
[18:00:55.524] <TB1> INFO: Expecting 41600 events.
[18:00:59.063] <TB1> INFO: 41600 events read in total (2947ms).
[18:00:59.064] <TB1> INFO: Test took 3804ms.
[18:00:59.352] <TB1> INFO: Expecting 41600 events.
[18:01:02.876] <TB1> INFO: 41600 events read in total (2933ms).
[18:01:02.877] <TB1> INFO: Test took 3790ms.
[18:01:03.165] <TB1> INFO: Expecting 41600 events.
[18:01:06.722] <TB1> INFO: 41600 events read in total (2966ms).
[18:01:06.723] <TB1> INFO: Test took 3823ms.
[18:01:07.012] <TB1> INFO: Expecting 41600 events.
[18:01:10.520] <TB1> INFO: 41600 events read in total (2916ms).
[18:01:10.520] <TB1> INFO: Test took 3772ms.
[18:01:10.809] <TB1> INFO: Expecting 2560 events.
[18:01:11.695] <TB1> INFO: 2560 events read in total (291ms).
[18:01:11.695] <TB1> INFO: Test took 1163ms.
[18:01:12.003] <TB1> INFO: Expecting 2560 events.
[18:01:12.890] <TB1> INFO: 2560 events read in total (295ms).
[18:01:12.890] <TB1> INFO: Test took 1194ms.
[18:01:13.198] <TB1> INFO: Expecting 2560 events.
[18:01:14.081] <TB1> INFO: 2560 events read in total (292ms).
[18:01:14.081] <TB1> INFO: Test took 1190ms.
[18:01:14.389] <TB1> INFO: Expecting 2560 events.
[18:01:15.272] <TB1> INFO: 2560 events read in total (292ms).
[18:01:15.272] <TB1> INFO: Test took 1190ms.
[18:01:15.580] <TB1> INFO: Expecting 2560 events.
[18:01:16.462] <TB1> INFO: 2560 events read in total (290ms).
[18:01:16.462] <TB1> INFO: Test took 1189ms.
[18:01:16.770] <TB1> INFO: Expecting 2560 events.
[18:01:17.649] <TB1> INFO: 2560 events read in total (287ms).
[18:01:17.650] <TB1> INFO: Test took 1188ms.
[18:01:17.957] <TB1> INFO: Expecting 2560 events.
[18:01:18.835] <TB1> INFO: 2560 events read in total (286ms).
[18:01:18.836] <TB1> INFO: Test took 1186ms.
[18:01:19.143] <TB1> INFO: Expecting 2560 events.
[18:01:20.024] <TB1> INFO: 2560 events read in total (289ms).
[18:01:20.025] <TB1> INFO: Test took 1189ms.
[18:01:20.333] <TB1> INFO: Expecting 2560 events.
[18:01:21.212] <TB1> INFO: 2560 events read in total (288ms).
[18:01:21.212] <TB1> INFO: Test took 1185ms.
[18:01:21.520] <TB1> INFO: Expecting 2560 events.
[18:01:22.398] <TB1> INFO: 2560 events read in total (287ms).
[18:01:22.398] <TB1> INFO: Test took 1185ms.
[18:01:22.706] <TB1> INFO: Expecting 2560 events.
[18:01:23.587] <TB1> INFO: 2560 events read in total (290ms).
[18:01:23.587] <TB1> INFO: Test took 1188ms.
[18:01:23.895] <TB1> INFO: Expecting 2560 events.
[18:01:24.778] <TB1> INFO: 2560 events read in total (291ms).
[18:01:24.779] <TB1> INFO: Test took 1192ms.
[18:01:25.087] <TB1> INFO: Expecting 2560 events.
[18:01:25.969] <TB1> INFO: 2560 events read in total (291ms).
[18:01:25.969] <TB1> INFO: Test took 1190ms.
[18:01:26.277] <TB1> INFO: Expecting 2560 events.
[18:01:27.161] <TB1> INFO: 2560 events read in total (292ms).
[18:01:27.161] <TB1> INFO: Test took 1192ms.
[18:01:27.469] <TB1> INFO: Expecting 2560 events.
[18:01:28.350] <TB1> INFO: 2560 events read in total (290ms).
[18:01:28.350] <TB1> INFO: Test took 1188ms.
[18:01:28.658] <TB1> INFO: Expecting 2560 events.
[18:01:29.541] <TB1> INFO: 2560 events read in total (291ms).
[18:01:29.541] <TB1> INFO: Test took 1190ms.
[18:01:29.544] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:01:29.849] <TB1> INFO: Expecting 655360 events.
[18:01:44.142] <TB1> INFO: 655360 events read in total (13701ms).
[18:01:44.154] <TB1> INFO: Expecting 655360 events.
[18:01:58.342] <TB1> INFO: 655360 events read in total (13785ms).
[18:01:58.363] <TB1> INFO: Expecting 655360 events.
[18:02:12.512] <TB1> INFO: 655360 events read in total (13746ms).
[18:02:12.533] <TB1> INFO: Expecting 655360 events.
[18:02:26.613] <TB1> INFO: 655360 events read in total (13677ms).
[18:02:26.635] <TB1> INFO: Expecting 655360 events.
[18:02:40.706] <TB1> INFO: 655360 events read in total (13668ms).
[18:02:40.733] <TB1> INFO: Expecting 655360 events.
[18:02:54.781] <TB1> INFO: 655360 events read in total (13645ms).
[18:02:54.824] <TB1> INFO: Expecting 655360 events.
[18:03:08.891] <TB1> INFO: 655360 events read in total (13664ms).
[18:03:08.938] <TB1> INFO: Expecting 655360 events.
[18:03:23.069] <TB1> INFO: 655360 events read in total (13728ms).
[18:03:23.123] <TB1> INFO: Expecting 655360 events.
[18:03:37.311] <TB1> INFO: 655360 events read in total (13785ms).
[18:03:37.370] <TB1> INFO: Expecting 655360 events.
[18:03:51.569] <TB1> INFO: 655360 events read in total (13796ms).
[18:03:51.619] <TB1> INFO: Expecting 655360 events.
[18:04:05.739] <TB1> INFO: 655360 events read in total (13717ms).
[18:04:05.798] <TB1> INFO: Expecting 655360 events.
[18:04:19.948] <TB1> INFO: 655360 events read in total (13747ms).
[18:04:20.026] <TB1> INFO: Expecting 655360 events.
[18:04:34.100] <TB1> INFO: 655360 events read in total (13671ms).
[18:04:34.161] <TB1> INFO: Expecting 655360 events.
[18:04:48.402] <TB1> INFO: 655360 events read in total (13838ms).
[18:04:48.467] <TB1> INFO: Expecting 655360 events.
[18:05:02.615] <TB1> INFO: 655360 events read in total (13745ms).
[18:05:02.708] <TB1> INFO: Expecting 655360 events.
[18:05:16.923] <TB1> INFO: 655360 events read in total (13812ms).
[18:05:16.997] <TB1> INFO: Test took 227453ms.
[18:05:17.074] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:05:17.339] <TB1> INFO: Expecting 655360 events.
[18:05:31.675] <TB1> INFO: 655360 events read in total (13744ms).
[18:05:31.686] <TB1> INFO: Expecting 655360 events.
[18:05:45.816] <TB1> INFO: 655360 events read in total (13727ms).
[18:05:45.836] <TB1> INFO: Expecting 655360 events.
[18:05:59.697] <TB1> INFO: 655360 events read in total (13458ms).
[18:05:59.715] <TB1> INFO: Expecting 655360 events.
[18:06:13.546] <TB1> INFO: 655360 events read in total (13428ms).
[18:06:13.572] <TB1> INFO: Expecting 655360 events.
[18:06:27.791] <TB1> INFO: 655360 events read in total (13817ms).
[18:06:27.818] <TB1> INFO: Expecting 655360 events.
[18:06:42.075] <TB1> INFO: 655360 events read in total (13854ms).
[18:06:42.116] <TB1> INFO: Expecting 655360 events.
[18:06:56.660] <TB1> INFO: 655360 events read in total (14141ms).
[18:06:56.715] <TB1> INFO: Expecting 655360 events.
[18:07:11.410] <TB1> INFO: 655360 events read in total (14292ms).
[18:07:11.448] <TB1> INFO: Expecting 655360 events.
[18:07:26.062] <TB1> INFO: 655360 events read in total (14210ms).
[18:07:26.105] <TB1> INFO: Expecting 655360 events.
[18:07:40.759] <TB1> INFO: 655360 events read in total (14251ms).
[18:07:40.835] <TB1> INFO: Expecting 655360 events.
[18:07:55.397] <TB1> INFO: 655360 events read in total (14159ms).
[18:07:55.450] <TB1> INFO: Expecting 655360 events.
[18:08:10.075] <TB1> INFO: 655360 events read in total (14222ms).
[18:08:10.165] <TB1> INFO: Expecting 655360 events.
[18:08:24.481] <TB1> INFO: 655360 events read in total (13912ms).
[18:08:24.541] <TB1> INFO: Expecting 655360 events.
[18:08:39.059] <TB1> INFO: 655360 events read in total (14114ms).
[18:08:39.124] <TB1> INFO: Expecting 655360 events.
[18:08:53.769] <TB1> INFO: 655360 events read in total (14242ms).
[18:08:53.874] <TB1> INFO: Expecting 655360 events.
[18:09:08.050] <TB1> INFO: 655360 events read in total (13773ms).
[18:09:08.123] <TB1> INFO: Test took 231049ms.
[18:09:08.282] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:09:08.287] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:09:08.292] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:09:08.297] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:09:08.302] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[18:09:08.306] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[18:09:08.311] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[18:09:08.315] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[18:09:08.320] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:09:08.325] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[18:09:08.329] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:09:08.334] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[18:09:08.338] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[18:09:08.343] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:09:08.348] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:09:08.352] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:09:08.357] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:09:08.362] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:09:08.367] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:09:08.372] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:09:08.376] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:09:08.381] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:09:08.386] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[18:09:08.391] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:09:08.423] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C0.dat
[18:09:08.423] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C1.dat
[18:09:08.423] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C2.dat
[18:09:08.423] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C3.dat
[18:09:08.424] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C4.dat
[18:09:08.424] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C5.dat
[18:09:08.424] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C6.dat
[18:09:08.424] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C7.dat
[18:09:08.424] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C8.dat
[18:09:08.424] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C9.dat
[18:09:08.424] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C10.dat
[18:09:08.424] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C11.dat
[18:09:08.424] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C12.dat
[18:09:08.425] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C13.dat
[18:09:08.425] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C14.dat
[18:09:08.425] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//dacParameters35_C15.dat
[18:09:08.662] <TB1> INFO: Expecting 41600 events.
[18:09:11.772] <TB1> INFO: 41600 events read in total (2518ms).
[18:09:11.773] <TB1> INFO: Test took 3346ms.
[18:09:12.213] <TB1> INFO: Expecting 41600 events.
[18:09:15.227] <TB1> INFO: 41600 events read in total (2422ms).
[18:09:15.227] <TB1> INFO: Test took 3244ms.
[18:09:15.670] <TB1> INFO: Expecting 41600 events.
[18:09:18.781] <TB1> INFO: 41600 events read in total (2519ms).
[18:09:18.782] <TB1> INFO: Test took 3344ms.
[18:09:18.996] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:19.085] <TB1> INFO: Expecting 2560 events.
[18:09:19.969] <TB1> INFO: 2560 events read in total (293ms).
[18:09:19.969] <TB1> INFO: Test took 973ms.
[18:09:19.971] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:20.278] <TB1> INFO: Expecting 2560 events.
[18:09:21.163] <TB1> INFO: 2560 events read in total (293ms).
[18:09:21.163] <TB1> INFO: Test took 1192ms.
[18:09:21.165] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:21.472] <TB1> INFO: Expecting 2560 events.
[18:09:22.357] <TB1> INFO: 2560 events read in total (293ms).
[18:09:22.357] <TB1> INFO: Test took 1192ms.
[18:09:22.359] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:22.666] <TB1> INFO: Expecting 2560 events.
[18:09:23.550] <TB1> INFO: 2560 events read in total (292ms).
[18:09:23.550] <TB1> INFO: Test took 1191ms.
[18:09:23.552] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:23.859] <TB1> INFO: Expecting 2560 events.
[18:09:24.744] <TB1> INFO: 2560 events read in total (293ms).
[18:09:24.744] <TB1> INFO: Test took 1192ms.
[18:09:24.746] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:25.053] <TB1> INFO: Expecting 2560 events.
[18:09:25.938] <TB1> INFO: 2560 events read in total (293ms).
[18:09:25.938] <TB1> INFO: Test took 1192ms.
[18:09:25.940] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:26.247] <TB1> INFO: Expecting 2560 events.
[18:09:27.132] <TB1> INFO: 2560 events read in total (293ms).
[18:09:27.132] <TB1> INFO: Test took 1192ms.
[18:09:27.134] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:27.441] <TB1> INFO: Expecting 2560 events.
[18:09:28.325] <TB1> INFO: 2560 events read in total (293ms).
[18:09:28.325] <TB1> INFO: Test took 1191ms.
[18:09:28.327] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:28.634] <TB1> INFO: Expecting 2560 events.
[18:09:29.514] <TB1> INFO: 2560 events read in total (288ms).
[18:09:29.515] <TB1> INFO: Test took 1188ms.
[18:09:29.517] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:29.824] <TB1> INFO: Expecting 2560 events.
[18:09:30.704] <TB1> INFO: 2560 events read in total (288ms).
[18:09:30.705] <TB1> INFO: Test took 1188ms.
[18:09:30.706] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:31.013] <TB1> INFO: Expecting 2560 events.
[18:09:31.893] <TB1> INFO: 2560 events read in total (288ms).
[18:09:31.893] <TB1> INFO: Test took 1187ms.
[18:09:31.895] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:32.202] <TB1> INFO: Expecting 2560 events.
[18:09:33.082] <TB1> INFO: 2560 events read in total (288ms).
[18:09:33.083] <TB1> INFO: Test took 1188ms.
[18:09:33.084] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:33.392] <TB1> INFO: Expecting 2560 events.
[18:09:34.271] <TB1> INFO: 2560 events read in total (287ms).
[18:09:34.272] <TB1> INFO: Test took 1188ms.
[18:09:34.274] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:34.581] <TB1> INFO: Expecting 2560 events.
[18:09:35.461] <TB1> INFO: 2560 events read in total (288ms).
[18:09:35.461] <TB1> INFO: Test took 1187ms.
[18:09:35.463] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:35.770] <TB1> INFO: Expecting 2560 events.
[18:09:36.651] <TB1> INFO: 2560 events read in total (289ms).
[18:09:36.651] <TB1> INFO: Test took 1188ms.
[18:09:36.653] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:36.960] <TB1> INFO: Expecting 2560 events.
[18:09:37.840] <TB1> INFO: 2560 events read in total (288ms).
[18:09:37.840] <TB1> INFO: Test took 1187ms.
[18:09:37.842] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:38.149] <TB1> INFO: Expecting 2560 events.
[18:09:39.029] <TB1> INFO: 2560 events read in total (288ms).
[18:09:39.029] <TB1> INFO: Test took 1187ms.
[18:09:39.031] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:39.338] <TB1> INFO: Expecting 2560 events.
[18:09:40.218] <TB1> INFO: 2560 events read in total (288ms).
[18:09:40.218] <TB1> INFO: Test took 1187ms.
[18:09:40.220] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:40.527] <TB1> INFO: Expecting 2560 events.
[18:09:41.408] <TB1> INFO: 2560 events read in total (289ms).
[18:09:41.408] <TB1> INFO: Test took 1188ms.
[18:09:41.410] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:41.717] <TB1> INFO: Expecting 2560 events.
[18:09:42.597] <TB1> INFO: 2560 events read in total (288ms).
[18:09:42.598] <TB1> INFO: Test took 1188ms.
[18:09:42.599] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:42.906] <TB1> INFO: Expecting 2560 events.
[18:09:43.786] <TB1> INFO: 2560 events read in total (288ms).
[18:09:43.787] <TB1> INFO: Test took 1188ms.
[18:09:43.789] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:44.096] <TB1> INFO: Expecting 2560 events.
[18:09:44.976] <TB1> INFO: 2560 events read in total (288ms).
[18:09:44.976] <TB1> INFO: Test took 1187ms.
[18:09:44.978] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:45.285] <TB1> INFO: Expecting 2560 events.
[18:09:46.165] <TB1> INFO: 2560 events read in total (288ms).
[18:09:46.165] <TB1> INFO: Test took 1187ms.
[18:09:46.167] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:46.474] <TB1> INFO: Expecting 2560 events.
[18:09:47.354] <TB1> INFO: 2560 events read in total (288ms).
[18:09:47.354] <TB1> INFO: Test took 1187ms.
[18:09:47.356] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:47.664] <TB1> INFO: Expecting 2560 events.
[18:09:48.548] <TB1> INFO: 2560 events read in total (293ms).
[18:09:48.548] <TB1> INFO: Test took 1192ms.
[18:09:48.550] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:48.858] <TB1> INFO: Expecting 2560 events.
[18:09:49.742] <TB1> INFO: 2560 events read in total (292ms).
[18:09:49.742] <TB1> INFO: Test took 1192ms.
[18:09:49.744] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:50.052] <TB1> INFO: Expecting 2560 events.
[18:09:50.936] <TB1> INFO: 2560 events read in total (292ms).
[18:09:50.936] <TB1> INFO: Test took 1192ms.
[18:09:50.938] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:51.245] <TB1> INFO: Expecting 2560 events.
[18:09:52.130] <TB1> INFO: 2560 events read in total (293ms).
[18:09:52.130] <TB1> INFO: Test took 1192ms.
[18:09:52.132] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:52.439] <TB1> INFO: Expecting 2560 events.
[18:09:53.323] <TB1> INFO: 2560 events read in total (292ms).
[18:09:53.323] <TB1> INFO: Test took 1191ms.
[18:09:53.325] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:53.632] <TB1> INFO: Expecting 2560 events.
[18:09:54.516] <TB1> INFO: 2560 events read in total (292ms).
[18:09:54.516] <TB1> INFO: Test took 1191ms.
[18:09:54.518] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:54.825] <TB1> INFO: Expecting 2560 events.
[18:09:55.709] <TB1> INFO: 2560 events read in total (292ms).
[18:09:55.709] <TB1> INFO: Test took 1191ms.
[18:09:55.711] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:09:56.018] <TB1> INFO: Expecting 2560 events.
[18:09:56.902] <TB1> INFO: 2560 events read in total (292ms).
[18:09:56.902] <TB1> INFO: Test took 1191ms.
[18:09:57.359] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 645 seconds
[18:09:57.359] <TB1> INFO: PH scale (per ROC): 47 40 57 48 55 50 54 40 61 60 40 41 42 52 43 60
[18:09:57.359] <TB1> INFO: PH offset (per ROC): 83 91 131 104 124 112 127 106 123 119 100 110 110 137 98 126
[18:09:57.364] <TB1> INFO: Decoding statistics:
[18:09:57.364] <TB1> INFO: General information:
[18:09:57.364] <TB1> INFO: 16bit words read: 127882
[18:09:57.364] <TB1> INFO: valid events total: 20480
[18:09:57.364] <TB1> INFO: empty events: 17979
[18:09:57.364] <TB1> INFO: valid events with pixels: 2501
[18:09:57.364] <TB1> INFO: valid pixel hits: 2501
[18:09:57.364] <TB1> INFO: Event errors: 0
[18:09:57.364] <TB1> INFO: start marker: 0
[18:09:57.364] <TB1> INFO: stop marker: 0
[18:09:57.364] <TB1> INFO: overflow: 0
[18:09:57.364] <TB1> INFO: invalid 5bit words: 0
[18:09:57.364] <TB1> INFO: invalid XOR eye diagram: 0
[18:09:57.364] <TB1> INFO: frame (failed synchr.): 0
[18:09:57.364] <TB1> INFO: idle data (no TBM trl): 0
[18:09:57.364] <TB1> INFO: no data (only TBM hdr): 0
[18:09:57.364] <TB1> INFO: TBM errors: 0
[18:09:57.364] <TB1> INFO: flawed TBM headers: 0
[18:09:57.364] <TB1> INFO: flawed TBM trailers: 0
[18:09:57.364] <TB1> INFO: event ID mismatches: 0
[18:09:57.364] <TB1> INFO: ROC errors: 0
[18:09:57.364] <TB1> INFO: missing ROC header(s): 0
[18:09:57.364] <TB1> INFO: misplaced readback start: 0
[18:09:57.364] <TB1> INFO: Pixel decoding errors: 0
[18:09:57.364] <TB1> INFO: pixel data incomplete: 0
[18:09:57.364] <TB1> INFO: pixel address: 0
[18:09:57.364] <TB1> INFO: pulse height fill bit: 0
[18:09:57.364] <TB1> INFO: buffer corruption: 0
[18:09:57.628] <TB1> INFO: ######################################################################
[18:09:57.628] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[18:09:57.628] <TB1> INFO: ######################################################################
[18:09:57.640] <TB1> INFO: scanning low vcal = 10
[18:09:57.951] <TB1> INFO: Expecting 41600 events.
[18:10:01.512] <TB1> INFO: 41600 events read in total (2969ms).
[18:10:01.512] <TB1> INFO: Test took 3872ms.
[18:10:01.514] <TB1> INFO: scanning low vcal = 20
[18:10:01.815] <TB1> INFO: Expecting 41600 events.
[18:10:05.375] <TB1> INFO: 41600 events read in total (2969ms).
[18:10:05.375] <TB1> INFO: Test took 3861ms.
[18:10:05.377] <TB1> INFO: scanning low vcal = 30
[18:10:05.676] <TB1> INFO: Expecting 41600 events.
[18:10:09.315] <TB1> INFO: 41600 events read in total (3047ms).
[18:10:09.316] <TB1> INFO: Test took 3939ms.
[18:10:09.318] <TB1> INFO: scanning low vcal = 40
[18:10:09.599] <TB1> INFO: Expecting 41600 events.
[18:10:13.531] <TB1> INFO: 41600 events read in total (3341ms).
[18:10:13.532] <TB1> INFO: Test took 4214ms.
[18:10:13.535] <TB1> INFO: scanning low vcal = 50
[18:10:13.812] <TB1> INFO: Expecting 41600 events.
[18:10:17.763] <TB1> INFO: 41600 events read in total (3359ms).
[18:10:17.764] <TB1> INFO: Test took 4229ms.
[18:10:17.766] <TB1> INFO: scanning low vcal = 60
[18:10:18.044] <TB1> INFO: Expecting 41600 events.
[18:10:21.993] <TB1> INFO: 41600 events read in total (3357ms).
[18:10:21.994] <TB1> INFO: Test took 4227ms.
[18:10:21.997] <TB1> INFO: scanning low vcal = 70
[18:10:22.274] <TB1> INFO: Expecting 41600 events.
[18:10:26.220] <TB1> INFO: 41600 events read in total (3355ms).
[18:10:26.221] <TB1> INFO: Test took 4224ms.
[18:10:26.224] <TB1> INFO: scanning low vcal = 80
[18:10:26.501] <TB1> INFO: Expecting 41600 events.
[18:10:30.444] <TB1> INFO: 41600 events read in total (3351ms).
[18:10:30.445] <TB1> INFO: Test took 4221ms.
[18:10:30.448] <TB1> INFO: scanning low vcal = 90
[18:10:30.725] <TB1> INFO: Expecting 41600 events.
[18:10:34.674] <TB1> INFO: 41600 events read in total (3357ms).
[18:10:34.675] <TB1> INFO: Test took 4227ms.
[18:10:34.677] <TB1> INFO: scanning low vcal = 100
[18:10:34.954] <TB1> INFO: Expecting 41600 events.
[18:10:38.907] <TB1> INFO: 41600 events read in total (3361ms).
[18:10:38.907] <TB1> INFO: Test took 4230ms.
[18:10:38.910] <TB1> INFO: scanning low vcal = 110
[18:10:39.187] <TB1> INFO: Expecting 41600 events.
[18:10:43.136] <TB1> INFO: 41600 events read in total (3357ms).
[18:10:43.137] <TB1> INFO: Test took 4227ms.
[18:10:43.140] <TB1> INFO: scanning low vcal = 120
[18:10:43.417] <TB1> INFO: Expecting 41600 events.
[18:10:47.366] <TB1> INFO: 41600 events read in total (3358ms).
[18:10:47.367] <TB1> INFO: Test took 4227ms.
[18:10:47.370] <TB1> INFO: scanning low vcal = 130
[18:10:47.647] <TB1> INFO: Expecting 41600 events.
[18:10:51.591] <TB1> INFO: 41600 events read in total (3352ms).
[18:10:51.592] <TB1> INFO: Test took 4222ms.
[18:10:51.594] <TB1> INFO: scanning low vcal = 140
[18:10:51.871] <TB1> INFO: Expecting 41600 events.
[18:10:55.821] <TB1> INFO: 41600 events read in total (3358ms).
[18:10:55.821] <TB1> INFO: Test took 4227ms.
[18:10:55.824] <TB1> INFO: scanning low vcal = 150
[18:10:56.101] <TB1> INFO: Expecting 41600 events.
[18:11:00.043] <TB1> INFO: 41600 events read in total (3350ms).
[18:11:00.043] <TB1> INFO: Test took 4219ms.
[18:11:00.046] <TB1> INFO: scanning low vcal = 160
[18:11:00.323] <TB1> INFO: Expecting 41600 events.
[18:11:04.270] <TB1> INFO: 41600 events read in total (3355ms).
[18:11:04.271] <TB1> INFO: Test took 4225ms.
[18:11:04.274] <TB1> INFO: scanning low vcal = 170
[18:11:04.551] <TB1> INFO: Expecting 41600 events.
[18:11:08.499] <TB1> INFO: 41600 events read in total (3356ms).
[18:11:08.500] <TB1> INFO: Test took 4226ms.
[18:11:08.503] <TB1> INFO: scanning low vcal = 180
[18:11:08.780] <TB1> INFO: Expecting 41600 events.
[18:11:12.722] <TB1> INFO: 41600 events read in total (3350ms).
[18:11:12.723] <TB1> INFO: Test took 4220ms.
[18:11:12.725] <TB1> INFO: scanning low vcal = 190
[18:11:12.003] <TB1> INFO: Expecting 41600 events.
[18:11:16.949] <TB1> INFO: 41600 events read in total (3355ms).
[18:11:16.950] <TB1> INFO: Test took 4225ms.
[18:11:16.953] <TB1> INFO: scanning low vcal = 200
[18:11:17.230] <TB1> INFO: Expecting 41600 events.
[18:11:21.173] <TB1> INFO: 41600 events read in total (3351ms).
[18:11:21.174] <TB1> INFO: Test took 4221ms.
[18:11:21.176] <TB1> INFO: scanning low vcal = 210
[18:11:21.453] <TB1> INFO: Expecting 41600 events.
[18:11:25.394] <TB1> INFO: 41600 events read in total (3349ms).
[18:11:25.395] <TB1> INFO: Test took 4219ms.
[18:11:25.398] <TB1> INFO: scanning low vcal = 220
[18:11:25.675] <TB1> INFO: Expecting 41600 events.
[18:11:29.615] <TB1> INFO: 41600 events read in total (3348ms).
[18:11:29.616] <TB1> INFO: Test took 4218ms.
[18:11:29.619] <TB1> INFO: scanning low vcal = 230
[18:11:29.896] <TB1> INFO: Expecting 41600 events.
[18:11:33.835] <TB1> INFO: 41600 events read in total (3347ms).
[18:11:33.836] <TB1> INFO: Test took 4217ms.
[18:11:33.839] <TB1> INFO: scanning low vcal = 240
[18:11:34.116] <TB1> INFO: Expecting 41600 events.
[18:11:38.053] <TB1> INFO: 41600 events read in total (3345ms).
[18:11:38.053] <TB1> INFO: Test took 4214ms.
[18:11:38.056] <TB1> INFO: scanning low vcal = 250
[18:11:38.333] <TB1> INFO: Expecting 41600 events.
[18:11:42.278] <TB1> INFO: 41600 events read in total (3353ms).
[18:11:42.278] <TB1> INFO: Test took 4222ms.
[18:11:42.282] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[18:11:42.558] <TB1> INFO: Expecting 41600 events.
[18:11:46.513] <TB1> INFO: 41600 events read in total (3363ms).
[18:11:46.514] <TB1> INFO: Test took 4232ms.
[18:11:46.516] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[18:11:46.794] <TB1> INFO: Expecting 41600 events.
[18:11:50.831] <TB1> INFO: 41600 events read in total (3446ms).
[18:11:50.832] <TB1> INFO: Test took 4316ms.
[18:11:50.835] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[18:11:51.149] <TB1> INFO: Expecting 41600 events.
[18:11:55.096] <TB1> INFO: 41600 events read in total (3355ms).
[18:11:55.097] <TB1> INFO: Test took 4262ms.
[18:11:55.100] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[18:11:55.377] <TB1> INFO: Expecting 41600 events.
[18:11:59.326] <TB1> INFO: 41600 events read in total (3357ms).
[18:11:59.327] <TB1> INFO: Test took 4227ms.
[18:11:59.329] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[18:11:59.606] <TB1> INFO: Expecting 41600 events.
[18:12:03.549] <TB1> INFO: 41600 events read in total (3351ms).
[18:12:03.550] <TB1> INFO: Test took 4220ms.
[18:12:03.957] <TB1> INFO: PixTestGainPedestal::measure() done
[18:12:36.946] <TB1> INFO: PixTestGainPedestal::fit() done
[18:12:36.946] <TB1> INFO: non-linearity mean: 0.969 0.925 0.979 0.946 0.963 0.935 0.979 0.912 0.985 0.984 0.937 0.999 0.935 0.978 0.951 0.979
[18:12:36.946] <TB1> INFO: non-linearity RMS: 0.166 0.177 0.004 0.071 0.020 0.076 0.003 0.137 0.003 0.003 0.058 0.154 0.069 0.021 0.062 0.006
[18:12:36.946] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[18:12:36.960] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[18:12:36.974] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[18:12:36.988] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[18:12:36.002] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[18:12:37.016] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[18:12:37.030] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[18:12:37.044] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[18:12:37.058] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[18:12:37.072] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[18:12:37.086] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[18:12:37.100] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[18:12:37.114] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[18:12:37.128] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[18:12:37.142] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[18:12:37.156] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1001_FullQualification_2016-11-04_10h05m_1478250315//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[18:12:37.170] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 159 seconds
[18:12:37.170] <TB1> INFO: Decoding statistics:
[18:12:37.170] <TB1> INFO: General information:
[18:12:37.170] <TB1> INFO: 16bit words read: 3327592
[18:12:37.170] <TB1> INFO: valid events total: 332800
[18:12:37.170] <TB1> INFO: empty events: 0
[18:12:37.170] <TB1> INFO: valid events with pixels: 332800
[18:12:37.170] <TB1> INFO: valid pixel hits: 665396
[18:12:37.170] <TB1> INFO: Event errors: 0
[18:12:37.170] <TB1> INFO: start marker: 0
[18:12:37.170] <TB1> INFO: stop marker: 0
[18:12:37.170] <TB1> INFO: overflow: 0
[18:12:37.170] <TB1> INFO: invalid 5bit words: 0
[18:12:37.170] <TB1> INFO: invalid XOR eye diagram: 0
[18:12:37.170] <TB1> INFO: frame (failed synchr.): 0
[18:12:37.170] <TB1> INFO: idle data (no TBM trl): 0
[18:12:37.170] <TB1> INFO: no data (only TBM hdr): 0
[18:12:37.170] <TB1> INFO: TBM errors: 0
[18:12:37.170] <TB1> INFO: flawed TBM headers: 0
[18:12:37.170] <TB1> INFO: flawed TBM trailers: 0
[18:12:37.170] <TB1> INFO: event ID mismatches: 0
[18:12:37.170] <TB1> INFO: ROC errors: 0
[18:12:37.170] <TB1> INFO: missing ROC header(s): 0
[18:12:37.170] <TB1> INFO: misplaced readback start: 0
[18:12:37.170] <TB1> INFO: Pixel decoding errors: 0
[18:12:37.170] <TB1> INFO: pixel data incomplete: 0
[18:12:37.170] <TB1> INFO: pixel address: 0
[18:12:37.170] <TB1> INFO: pulse height fill bit: 0
[18:12:37.170] <TB1> INFO: buffer corruption: 0
[18:12:37.185] <TB1> INFO: Decoding statistics:
[18:12:37.185] <TB1> INFO: General information:
[18:12:37.185] <TB1> INFO: 16bit words read: 3457010
[18:12:37.185] <TB1> INFO: valid events total: 353536
[18:12:37.185] <TB1> INFO: empty events: 18235
[18:12:37.185] <TB1> INFO: valid events with pixels: 335301
[18:12:37.185] <TB1> INFO: valid pixel hits: 667897
[18:12:37.185] <TB1> INFO: Event errors: 0
[18:12:37.185] <TB1> INFO: start marker: 0
[18:12:37.185] <TB1> INFO: stop marker: 0
[18:12:37.185] <TB1> INFO: overflow: 0
[18:12:37.185] <TB1> INFO: invalid 5bit words: 0
[18:12:37.185] <TB1> INFO: invalid XOR eye diagram: 0
[18:12:37.185] <TB1> INFO: frame (failed synchr.): 0
[18:12:37.185] <TB1> INFO: idle data (no TBM trl): 0
[18:12:37.185] <TB1> INFO: no data (only TBM hdr): 0
[18:12:37.185] <TB1> INFO: TBM errors: 0
[18:12:37.185] <TB1> INFO: flawed TBM headers: 0
[18:12:37.185] <TB1> INFO: flawed TBM trailers: 0
[18:12:37.185] <TB1> INFO: event ID mismatches: 0
[18:12:37.185] <TB1> INFO: ROC errors: 0
[18:12:37.185] <TB1> INFO: missing ROC header(s): 0
[18:12:37.185] <TB1> INFO: misplaced readback start: 0
[18:12:37.185] <TB1> INFO: Pixel decoding errors: 0
[18:12:37.185] <TB1> INFO: pixel data incomplete: 0
[18:12:37.185] <TB1> INFO: pixel address: 0
[18:12:37.185] <TB1> INFO: pulse height fill bit: 0
[18:12:37.185] <TB1> INFO: buffer corruption: 0
[18:12:37.185] <TB1> INFO: enter test to run
[18:12:37.185] <TB1> INFO: test: exit no parameter change
[18:12:37.224] <TB1> QUIET: Connection to board 153 closed.
[18:12:37.224] <TB1> INFO: pXar: this is the end, my friend