[06:34:49.754] <TB2> INFO: *** Welcome to pxar ***
[06:34:49.754] <TB2> INFO: *** Today: 2016/06/08
[06:34:49.819] <TB2> INFO: *** Version: 9751-dirty
[06:34:49.819] <TB2> INFO: readRocDacs: /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C0.dat .. /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C15.dat
[06:34:49.838] <TB2> INFO: readTbmDacs: /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//tbmParameters_C0b.dat
[06:34:49.840] <TB2> INFO: readMaskFile: /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//defaultMaskFile.dat
[06:34:49.841] <TB2> INFO: readTrimFile: /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters_C0.dat .. /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters_C15.dat
[06:34:49.964] <TB2> INFO: clk: 4
[06:34:49.964] <TB2> INFO: ctr: 4
[06:34:49.964] <TB2> INFO: sda: 19
[06:34:49.964] <TB2> INFO: tin: 9
[06:34:49.964] <TB2> INFO: level: 15
[06:34:49.964] <TB2> INFO: triggerdelay: 0
[06:34:49.964] <TB2> QUIET: Instanciating API for pxar v2.7.5+40~g4fce89b
[06:34:49.965] <TB2> INFO: Log level: INFO
[06:34:49.971] <TB2> INFO: Found DTB DTB_WWXUD2
[06:34:49.982] <TB2> QUIET: Connection to board DTB_WWXUD2 opened.
[06:34:49.984] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 149
HW version: DTB1.2
FW version: 4.4
SW version: 4.6
Options:
USB id: DTB_WWXUD2
MAC address: 40D855118095
Hostname: pixelDTB149
Comment:
------------------------------------------------------
[06:34:49.986] <TB2> INFO: RPC call hashes of host and DTB match: 484264910
[06:34:51.509] <TB2> INFO: DUT info:
[06:34:51.509] <TB2> INFO: The DUT currently contains the following objects:
[06:34:51.509] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[06:34:51.509] <TB2> INFO: TBM Core alpha (0): 7 registers set
[06:34:51.509] <TB2> INFO: TBM Core beta (1): 7 registers set
[06:34:51.509] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[06:34:51.509] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:51.509] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:51.509] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:51.509] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:51.509] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:51.509] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:51.509] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:51.509] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:51.509] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:51.509] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:51.509] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:51.509] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:51.509] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:51.509] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:51.509] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:51.509] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:51.911] <TB2> INFO: enter 'restricted' command line mode
[06:34:51.911] <TB2> INFO: enter test to run
[06:34:51.911] <TB2> INFO: test: pretest no parameter change
[06:34:51.911] <TB2> INFO: running: pretest
[06:34:51.919] <TB2> INFO: ----------------------------------------------------------------------
[06:34:51.919] <TB2> INFO: PixTestPretest::programROC()
[06:34:51.919] <TB2> INFO: ----------------------------------------------------------------------
[06:35:09.939] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[06:35:09.939] <TB2> INFO: IA differences per ROC: 20.1 21.7 20.1 20.1 20.1 20.1 18.5 20.1 20.9 18.5 20.9 20.1 22.5 18.5 20.9 20.9
[06:35:10.048] <TB2> INFO: enter test to run
[06:35:10.049] <TB2> INFO: test: pretest no parameter change
[06:35:10.049] <TB2> INFO: running: pretest
[06:35:10.050] <TB2> INFO: ----------------------------------------------------------------------
[06:35:10.050] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[06:35:10.050] <TB2> INFO: ----------------------------------------------------------------------
[06:35:31.360] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 377.8 mA = 23.6125 mA/ROC
[06:35:31.361] <TB2> INFO: i(loss) [mA/ROC]: 19.3 19.3 18.5 17.7 17.7 17.7 19.3 17.7 18.5 18.5 18.5 19.3 18.5 17.7 18.5 17.7
[06:35:31.406] <TB2> INFO: enter test to run
[06:35:31.406] <TB2> INFO: test: pretest no parameter change
[06:35:31.406] <TB2> INFO: running: pretest
[06:35:31.407] <TB2> INFO: ----------------------------------------------------------------------
[06:35:31.407] <TB2> INFO: PixTestPretest::findTiming()
[06:35:31.407] <TB2> INFO: ----------------------------------------------------------------------
[06:35:31.407] <TB2> INFO: PixTestCmd::init()
[06:35:32.351] <TB2> WARNING: Not unmasking DUT, not setting Calibrate bits!
[06:37:01.434] <TB2> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[06:37:01.434] <TB2> INFO: (success/tries = 100/100), width = 4
[06:37:01.435] <TB2> INFO: enter test to run
[06:37:01.435] <TB2> INFO: test: pretest no parameter change
[06:37:01.435] <TB2> INFO: running: pretest
[06:37:01.437] <TB2> INFO: ----------------------------------------------------------------------
[06:37:01.437] <TB2> INFO: PixTestPretest::findWorkingPixel()
[06:37:01.437] <TB2> INFO: ----------------------------------------------------------------------
[06:37:01.530] <TB2> INFO: Expecting 231680 events.
[06:37:07.306] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L507> Channel 0 Number of ROCs (1) != Token Chain Length (4)
[06:37:07.390] <TB2> ERROR: <datapipe.cc/CheckEventID:L469> Channel 0 Event ID mismatch: local ID (21) != TBM ID (2)
[06:37:11.668] <TB2> INFO: 231680 events read in total (9581ms).
[06:37:11.674] <TB2> INFO: Test took 10234ms.
[06:37:11.906] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[06:37:11.986] <TB2> INFO: enter test to run
[06:37:11.986] <TB2> INFO: test: pretest no parameter change
[06:37:11.986] <TB2> INFO: running: pretest
[06:37:11.988] <TB2> INFO: ----------------------------------------------------------------------
[06:37:11.988] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[06:37:11.988] <TB2> INFO: ----------------------------------------------------------------------
[06:37:12.083] <TB2> INFO: Expecting 231680 events.
[06:37:22.335] <TB2> INFO: 231680 events read in total (9694ms).
[06:37:22.340] <TB2> INFO: Test took 10347ms.
[06:37:22.617] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[06:37:22.617] <TB2> INFO: CalDel: 128 140 150 142 126 143 127 143 150 129 152 165 172 150 159 151
[06:37:22.617] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[06:37:22.659] <TB2> INFO: enter test to run
[06:37:22.659] <TB2> INFO: test: pretest no parameter change
[06:37:22.659] <TB2> INFO: running: pretest
[06:37:22.667] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C0.dat
[06:37:22.672] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C1.dat
[06:37:22.677] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C2.dat
[06:37:22.682] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C3.dat
[06:37:22.691] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C4.dat
[06:37:22.696] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C5.dat
[06:37:22.702] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C6.dat
[06:37:22.707] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C7.dat
[06:37:22.712] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C8.dat
[06:37:22.717] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C9.dat
[06:37:22.722] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C10.dat
[06:37:22.728] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C11.dat
[06:37:22.733] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C12.dat
[06:37:22.738] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C13.dat
[06:37:22.743] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C14.dat
[06:37:22.749] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C15.dat
[06:37:22.753] <TB2> INFO: enter test to run
[06:37:22.753] <TB2> INFO: test: fulltest no parameter change
[06:37:22.753] <TB2> INFO: running: fulltest
[06:37:22.753] <TB2> INFO: ######################################################################
[06:37:22.753] <TB2> INFO: PixTestFullTest::doTest()
[06:37:22.753] <TB2> INFO: ######################################################################
[06:37:22.755] <TB2> INFO: ######################################################################
[06:37:22.755] <TB2> INFO: PixTestAlive::doTest()
[06:37:22.755] <TB2> INFO: ######################################################################
[06:37:22.756] <TB2> INFO: ----------------------------------------------------------------------
[06:37:22.756] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[06:37:22.756] <TB2> INFO: ----------------------------------------------------------------------
[06:37:23.024] <TB2> INFO: Expecting 41600 events.
[06:37:26.746] <TB2> INFO: 41600 events read in total (3164ms).
[06:37:26.747] <TB2> INFO: Test took 3989ms.
[06:37:26.993] <TB2> INFO: PixTestAlive::aliveTest() done
[06:37:26.993] <TB2> INFO: number of dead pixels (per ROC): 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
[06:37:26.995] <TB2> INFO: ----------------------------------------------------------------------
[06:37:26.995] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[06:37:26.995] <TB2> INFO: ----------------------------------------------------------------------
[06:37:27.261] <TB2> INFO: Expecting 41600 events.
[06:37:30.209] <TB2> INFO: 41600 events read in total (2391ms).
[06:37:30.209] <TB2> INFO: Test took 3212ms.
[06:37:30.209] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[06:37:30.471] <TB2> INFO: PixTestAlive::maskTest() done
[06:37:30.471] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[06:37:30.473] <TB2> INFO: ----------------------------------------------------------------------
[06:37:30.473] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[06:37:30.473] <TB2> INFO: ----------------------------------------------------------------------
[06:37:30.767] <TB2> INFO: Expecting 41600 events.
[06:37:34.532] <TB2> INFO: 41600 events read in total (3208ms).
[06:37:34.533] <TB2> INFO: Test took 4058ms.
[06:37:34.781] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[06:37:34.781] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[06:37:34.781] <TB2> INFO: PixTestAlive::doTest() done, duration: 12 seconds
[06:37:34.781] <TB2> INFO: Decoding statistics:
[06:37:34.781] <TB2> INFO: General information:
[06:37:34.781] <TB2> INFO: 16bit words read: 0
[06:37:34.781] <TB2> INFO: valid events total: 0
[06:37:34.781] <TB2> INFO: empty events: 0
[06:37:34.781] <TB2> INFO: valid events with pixels: 0
[06:37:34.781] <TB2> INFO: valid pixel hits: 0
[06:37:34.781] <TB2> INFO: Event errors: 0
[06:37:34.781] <TB2> INFO: start marker: 0
[06:37:34.781] <TB2> INFO: stop marker: 0
[06:37:34.781] <TB2> INFO: overflow: 0
[06:37:34.781] <TB2> INFO: invalid 5bit words: 0
[06:37:34.781] <TB2> INFO: invalid XOR eye diagram: 0
[06:37:34.781] <TB2> INFO: frame (failed synchr.): 0
[06:37:34.781] <TB2> INFO: idle data (no TBM trl): 0
[06:37:34.781] <TB2> INFO: no data (only TBM hdr): 0
[06:37:34.781] <TB2> INFO: TBM errors: 0
[06:37:34.781] <TB2> INFO: flawed TBM headers: 0
[06:37:34.781] <TB2> INFO: flawed TBM trailers: 0
[06:37:34.781] <TB2> INFO: event ID mismatches: 0
[06:37:34.781] <TB2> INFO: ROC errors: 0
[06:37:34.781] <TB2> INFO: missing ROC header(s): 0
[06:37:34.781] <TB2> INFO: misplaced readback start: 0
[06:37:34.781] <TB2> INFO: Pixel decoding errors: 0
[06:37:34.781] <TB2> INFO: pixel data incomplete: 0
[06:37:34.781] <TB2> INFO: pixel address: 0
[06:37:34.781] <TB2> INFO: pulse height fill bit: 0
[06:37:34.781] <TB2> INFO: buffer corruption: 0
[06:37:34.788] <TB2> INFO: ######################################################################
[06:37:34.788] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[06:37:34.788] <TB2> INFO: ######################################################################
[06:37:34.792] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[06:37:34.820] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[06:37:34.820] <TB2> INFO: run 1 of 1
[06:37:35.082] <TB2> INFO: Expecting 3120000 events.
[06:38:15.799] <TB2> INFO: 863920 events read in total (40160ms).
[06:38:56.190] <TB2> INFO: 1719085 events read in total (80551ms).
[06:39:36.786] <TB2> INFO: 2588055 events read in total (121148ms).
[06:40:01.241] <TB2> INFO: 3120000 events read in total (145602ms).
[06:40:01.288] <TB2> INFO: Test took 146468ms.
[06:40:24.357] <TB2> INFO: PixTestBBMap::doTest() done, duration: 169 seconds
[06:40:24.357] <TB2> INFO: number of dead bumps (per ROC): 0 2 6 4 3 4 6 3 0 0 0 0 0 1 0 1
[06:40:24.357] <TB2> INFO: separation cut (per ROC): 94 73 76 79 92 69 82 77 74 76 82 90 74 70 98 85
[06:40:24.357] <TB2> INFO: Decoding statistics:
[06:40:24.357] <TB2> INFO: General information:
[06:40:24.357] <TB2> INFO: 16bit words read: 0
[06:40:24.357] <TB2> INFO: valid events total: 0
[06:40:24.357] <TB2> INFO: empty events: 0
[06:40:24.357] <TB2> INFO: valid events with pixels: 0
[06:40:24.357] <TB2> INFO: valid pixel hits: 0
[06:40:24.357] <TB2> INFO: Event errors: 0
[06:40:24.357] <TB2> INFO: start marker: 0
[06:40:24.357] <TB2> INFO: stop marker: 0
[06:40:24.357] <TB2> INFO: overflow: 0
[06:40:24.357] <TB2> INFO: invalid 5bit words: 0
[06:40:24.357] <TB2> INFO: invalid XOR eye diagram: 0
[06:40:24.357] <TB2> INFO: frame (failed synchr.): 0
[06:40:24.357] <TB2> INFO: idle data (no TBM trl): 0
[06:40:24.357] <TB2> INFO: no data (only TBM hdr): 0
[06:40:24.357] <TB2> INFO: TBM errors: 0
[06:40:24.357] <TB2> INFO: flawed TBM headers: 0
[06:40:24.357] <TB2> INFO: flawed TBM trailers: 0
[06:40:24.357] <TB2> INFO: event ID mismatches: 0
[06:40:24.357] <TB2> INFO: ROC errors: 0
[06:40:24.357] <TB2> INFO: missing ROC header(s): 0
[06:40:24.357] <TB2> INFO: misplaced readback start: 0
[06:40:24.357] <TB2> INFO: Pixel decoding errors: 0
[06:40:24.357] <TB2> INFO: pixel data incomplete: 0
[06:40:24.357] <TB2> INFO: pixel address: 0
[06:40:24.357] <TB2> INFO: pulse height fill bit: 0
[06:40:24.357] <TB2> INFO: buffer corruption: 0
[06:40:24.434] <TB2> INFO: ######################################################################
[06:40:24.434] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[06:40:24.434] <TB2> INFO: ######################################################################
[06:40:24.435] <TB2> INFO: ----------------------------------------------------------------------
[06:40:24.435] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[06:40:24.435] <TB2> INFO: ----------------------------------------------------------------------
[06:40:24.435] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[06:40:24.443] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[06:40:24.443] <TB2> INFO: run 1 of 1
[06:40:24.714] <TB2> INFO: Expecting 26208000 events.
[06:40:58.066] <TB2> INFO: 878850 events read in total (32795ms).
[06:41:31.114] <TB2> INFO: 1744250 events read in total (65843ms).
[06:42:03.860] <TB2> INFO: 2608100 events read in total (98589ms).
[06:42:36.752] <TB2> INFO: 3470800 events read in total (131481ms).
[06:43:09.425] <TB2> INFO: 4334450 events read in total (164154ms).
[06:43:41.801] <TB2> INFO: 5197000 events read in total (196530ms).
[06:44:14.346] <TB2> INFO: 6059700 events read in total (229075ms).
[06:44:46.490] <TB2> INFO: 6921450 events read in total (261219ms).
[06:45:19.073] <TB2> INFO: 7784400 events read in total (293802ms).
[06:45:51.649] <TB2> INFO: 8647600 events read in total (326378ms).
[06:46:24.679] <TB2> INFO: 9509900 events read in total (359408ms).
[06:46:57.100] <TB2> INFO: 10371700 events read in total (391829ms).
[06:47:29.545] <TB2> INFO: 11235550 events read in total (424274ms).
[06:48:02.518] <TB2> INFO: 12095850 events read in total (457247ms).
[06:48:35.631] <TB2> INFO: 12956400 events read in total (490360ms).
[06:49:08.055] <TB2> INFO: 13812350 events read in total (522784ms).
[06:49:40.725] <TB2> INFO: 14665750 events read in total (555454ms).
[06:50:12.565] <TB2> INFO: 15518250 events read in total (587294ms).
[06:50:45.077] <TB2> INFO: 16370850 events read in total (619806ms).
[06:51:17.249] <TB2> INFO: 17222750 events read in total (651978ms).
[06:51:50.221] <TB2> INFO: 18073150 events read in total (684950ms).
[06:52:22.938] <TB2> INFO: 18924750 events read in total (717667ms).
[06:52:55.840] <TB2> INFO: 19775500 events read in total (750569ms).
[06:53:28.590] <TB2> INFO: 20625350 events read in total (783319ms).
[06:54:01.051] <TB2> INFO: 21476200 events read in total (815780ms).
[06:54:33.413] <TB2> INFO: 22327600 events read in total (848142ms).
[06:55:05.712] <TB2> INFO: 23181100 events read in total (880441ms).
[06:55:38.107] <TB2> INFO: 24033750 events read in total (912836ms).
[06:56:10.917] <TB2> INFO: 24890200 events read in total (945646ms).
[06:56:43.876] <TB2> INFO: 25747450 events read in total (978605ms).
[06:57:01.591] <TB2> INFO: 26208000 events read in total (996320ms).
[06:57:01.620] <TB2> INFO: Test took 997177ms.
[06:57:01.920] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[06:57:03.501] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[06:57:04.999] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[06:57:06.634] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[06:57:08.180] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[06:57:09.746] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[06:57:11.377] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[06:57:12.867] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[06:57:14.317] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[06:57:15.782] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[06:57:17.233] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[06:57:18.734] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[06:57:20.236] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[06:57:21.844] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[06:57:23.380] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[06:57:24.802] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[06:57:26.290] <TB2> INFO: PixTestScurves::scurves() done
[06:57:26.290] <TB2> INFO: Vcal mean: 89.07 79.08 77.86 82.46 94.28 78.01 81.63 86.80 87.35 85.65 88.10 90.74 75.37 79.93 94.81 83.85
[06:57:26.290] <TB2> INFO: Vcal RMS: 5.63 4.20 4.59 4.80 5.22 4.36 4.22 5.42 5.09 5.31 5.40 5.52 4.58 4.53 6.34 4.83
[06:57:26.290] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1021 seconds
[06:57:26.290] <TB2> INFO: Decoding statistics:
[06:57:26.290] <TB2> INFO: General information:
[06:57:26.290] <TB2> INFO: 16bit words read: 0
[06:57:26.290] <TB2> INFO: valid events total: 0
[06:57:26.290] <TB2> INFO: empty events: 0
[06:57:26.290] <TB2> INFO: valid events with pixels: 0
[06:57:26.290] <TB2> INFO: valid pixel hits: 0
[06:57:26.290] <TB2> INFO: Event errors: 0
[06:57:26.290] <TB2> INFO: start marker: 0
[06:57:26.290] <TB2> INFO: stop marker: 0
[06:57:26.290] <TB2> INFO: overflow: 0
[06:57:26.290] <TB2> INFO: invalid 5bit words: 0
[06:57:26.290] <TB2> INFO: invalid XOR eye diagram: 0
[06:57:26.290] <TB2> INFO: frame (failed synchr.): 0
[06:57:26.290] <TB2> INFO: idle data (no TBM trl): 0
[06:57:26.290] <TB2> INFO: no data (only TBM hdr): 0
[06:57:26.290] <TB2> INFO: TBM errors: 0
[06:57:26.290] <TB2> INFO: flawed TBM headers: 0
[06:57:26.290] <TB2> INFO: flawed TBM trailers: 0
[06:57:26.290] <TB2> INFO: event ID mismatches: 0
[06:57:26.290] <TB2> INFO: ROC errors: 0
[06:57:26.290] <TB2> INFO: missing ROC header(s): 0
[06:57:26.290] <TB2> INFO: misplaced readback start: 0
[06:57:26.290] <TB2> INFO: Pixel decoding errors: 0
[06:57:26.290] <TB2> INFO: pixel data incomplete: 0
[06:57:26.290] <TB2> INFO: pixel address: 0
[06:57:26.290] <TB2> INFO: pulse height fill bit: 0
[06:57:26.290] <TB2> INFO: buffer corruption: 0
[06:57:26.360] <TB2> INFO: ######################################################################
[06:57:26.360] <TB2> INFO: PixTestTrim::doTest()
[06:57:26.360] <TB2> INFO: ######################################################################
[06:57:26.361] <TB2> INFO: ----------------------------------------------------------------------
[06:57:26.361] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[06:57:26.361] <TB2> INFO: ----------------------------------------------------------------------
[06:57:26.441] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[06:57:26.441] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[06:57:26.449] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[06:57:26.449] <TB2> INFO: run 1 of 1
[06:57:26.710] <TB2> INFO: Expecting 5025280 events.
[06:58:07.156] <TB2> INFO: 1084368 events read in total (39887ms).
[06:58:47.668] <TB2> INFO: 2162432 events read in total (80399ms).
[06:59:28.583] <TB2> INFO: 3239768 events read in total (121314ms).
[07:00:10.468] <TB2> INFO: 4324040 events read in total (163199ms).
[07:00:36.881] <TB2> INFO: 5025280 events read in total (189612ms).
[07:00:36.911] <TB2> INFO: Test took 190462ms.
[07:00:55.890] <TB2> INFO: ROC 0 VthrComp = 92
[07:00:55.891] <TB2> INFO: ROC 1 VthrComp = 86
[07:00:55.891] <TB2> INFO: ROC 2 VthrComp = 82
[07:00:55.891] <TB2> INFO: ROC 3 VthrComp = 85
[07:00:55.891] <TB2> INFO: ROC 4 VthrComp = 97
[07:00:55.892] <TB2> INFO: ROC 5 VthrComp = 80
[07:00:55.892] <TB2> INFO: ROC 6 VthrComp = 86
[07:00:55.892] <TB2> INFO: ROC 7 VthrComp = 88
[07:00:55.892] <TB2> INFO: ROC 8 VthrComp = 90
[07:00:55.892] <TB2> INFO: ROC 9 VthrComp = 87
[07:00:55.892] <TB2> INFO: ROC 10 VthrComp = 87
[07:00:55.892] <TB2> INFO: ROC 11 VthrComp = 92
[07:00:55.893] <TB2> INFO: ROC 12 VthrComp = 79
[07:00:55.893] <TB2> INFO: ROC 13 VthrComp = 80
[07:00:55.893] <TB2> INFO: ROC 14 VthrComp = 94
[07:00:55.893] <TB2> INFO: ROC 15 VthrComp = 84
[07:00:55.893] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[07:00:55.893] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[07:00:55.901] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[07:00:55.901] <TB2> INFO: run 1 of 1
[07:00:56.163] <TB2> INFO: Expecting 5025280 events.
[07:01:32.219] <TB2> INFO: 753552 events read in total (35499ms).
[07:02:07.479] <TB2> INFO: 1505896 events read in total (70759ms).
[07:02:42.819] <TB2> INFO: 2259320 events read in total (106099ms).
[07:03:17.890] <TB2> INFO: 3008960 events read in total (141170ms).
[07:03:53.435] <TB2> INFO: 3754240 events read in total (176715ms).
[07:04:28.637] <TB2> INFO: 4498904 events read in total (211917ms).
[07:04:53.596] <TB2> INFO: 5025280 events read in total (236876ms).
[07:04:53.647] <TB2> INFO: Test took 237746ms.
[07:05:17.313] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 58.1139 for pixel 51/7 mean/min/max = 45.0728/31.9455/58.2002
[07:05:17.314] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 56.3523 for pixel 51/5 mean/min/max = 44.1099/31.8027/56.4171
[07:05:17.314] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 57.0108 for pixel 9/68 mean/min/max = 44.6911/32.1229/57.2593
[07:05:17.314] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 58.6356 for pixel 8/57 mean/min/max = 45.6196/32.4302/58.809
[07:05:17.315] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 57.4884 for pixel 0/18 mean/min/max = 44.8513/31.9303/57.7723
[07:05:17.315] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 57.8563 for pixel 3/4 mean/min/max = 45.6115/33.0101/58.2129
[07:05:17.315] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 56.2685 for pixel 1/13 mean/min/max = 44.3284/32.2308/56.4261
[07:05:17.316] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 59.9018 for pixel 20/5 mean/min/max = 46.6516/33.3094/59.9938
[07:05:17.316] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 58.1253 for pixel 14/1 mean/min/max = 45.4822/32.7446/58.2199
[07:05:17.316] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 59.5587 for pixel 0/79 mean/min/max = 45.5059/31.3389/59.6729
[07:05:17.316] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 59.3742 for pixel 20/61 mean/min/max = 45.8084/32.1981/59.4187
[07:05:17.317] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 60.5288 for pixel 0/65 mean/min/max = 46.5706/32.5616/60.5797
[07:05:17.317] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 59.1176 for pixel 0/16 mean/min/max = 47.3408/35.3074/59.3742
[07:05:17.317] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 59.2839 for pixel 17/60 mean/min/max = 46.212/32.9774/59.4466
[07:05:17.318] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 61.5957 for pixel 1/1 mean/min/max = 46.6054/31.3677/61.843
[07:05:17.318] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 59.6378 for pixel 22/7 mean/min/max = 46.2024/32.738/59.6668
[07:05:17.318] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:05:17.408] <TB2> INFO: Expecting 411648 events.
[07:05:27.805] <TB2> INFO: 411648 events read in total (9840ms).
[07:05:27.810] <TB2> INFO: Expecting 411648 events.
[07:05:38.382] <TB2> INFO: 411648 events read in total (10139ms).
[07:05:38.391] <TB2> INFO: Expecting 411648 events.
[07:05:48.795] <TB2> INFO: 411648 events read in total (9988ms).
[07:05:48.805] <TB2> INFO: Expecting 411648 events.
[07:05:59.319] <TB2> INFO: 411648 events read in total (10089ms).
[07:05:59.331] <TB2> INFO: Expecting 411648 events.
[07:06:09.765] <TB2> INFO: 411648 events read in total (10015ms).
[07:06:09.778] <TB2> INFO: Expecting 411648 events.
[07:06:20.199] <TB2> INFO: 411648 events read in total (10005ms).
[07:06:20.214] <TB2> INFO: Expecting 411648 events.
[07:06:30.674] <TB2> INFO: 411648 events read in total (10048ms).
[07:06:30.691] <TB2> INFO: Expecting 411648 events.
[07:06:41.098] <TB2> INFO: 411648 events read in total (9995ms).
[07:06:41.116] <TB2> INFO: Expecting 411648 events.
[07:06:51.516] <TB2> INFO: 411648 events read in total (9990ms).
[07:06:51.535] <TB2> INFO: Expecting 411648 events.
[07:07:01.835] <TB2> INFO: 411648 events read in total (9887ms).
[07:07:01.857] <TB2> INFO: Expecting 411648 events.
[07:07:12.244] <TB2> INFO: 411648 events read in total (9969ms).
[07:07:12.268] <TB2> INFO: Expecting 411648 events.
[07:07:22.688] <TB2> INFO: 411648 events read in total (10010ms).
[07:07:22.716] <TB2> INFO: Expecting 411648 events.
[07:07:33.107] <TB2> INFO: 411648 events read in total (9981ms).
[07:07:33.133] <TB2> INFO: Expecting 411648 events.
[07:07:43.611] <TB2> INFO: 411648 events read in total (10070ms).
[07:07:43.641] <TB2> INFO: Expecting 411648 events.
[07:07:54.068] <TB2> INFO: 411648 events read in total (10022ms).
[07:07:54.098] <TB2> INFO: Expecting 411648 events.
[07:08:04.476] <TB2> INFO: 411648 events read in total (9972ms).
[07:08:04.508] <TB2> INFO: Test took 167190ms.
[07:08:05.360] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[07:08:05.368] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[07:08:05.368] <TB2> INFO: run 1 of 1
[07:08:05.628] <TB2> INFO: Expecting 5025280 events.
[07:08:41.522] <TB2> INFO: 740568 events read in total (35337ms).
[07:09:16.859] <TB2> INFO: 1480208 events read in total (70674ms).
[07:09:51.899] <TB2> INFO: 2220672 events read in total (105714ms).
[07:10:27.396] <TB2> INFO: 2957632 events read in total (141211ms).
[07:11:02.449] <TB2> INFO: 3688760 events read in total (176264ms).
[07:11:37.360] <TB2> INFO: 4417584 events read in total (211175ms).
[07:12:07.365] <TB2> INFO: 5025280 events read in total (241180ms).
[07:12:07.422] <TB2> INFO: Test took 242054ms.
[07:12:30.686] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 2.500000 .. 54.591249
[07:12:30.761] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 2 .. 64 (-1/-1) hits flags = 528 (plus default)
[07:12:30.771] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[07:12:30.771] <TB2> INFO: run 1 of 1
[07:12:31.033] <TB2> INFO: Expecting 2096640 events.
[07:13:09.770] <TB2> INFO: 898336 events read in total (38179ms).
[07:13:48.328] <TB2> INFO: 1790600 events read in total (76738ms).
[07:14:01.552] <TB2> INFO: 2096640 events read in total (89961ms).
[07:14:01.572] <TB2> INFO: Test took 90801ms.
[07:14:16.838] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 13.641368 .. 48.057035
[07:14:16.913] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 3 .. 58 (-1/-1) hits flags = 528 (plus default)
[07:14:16.920] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[07:14:16.920] <TB2> INFO: run 1 of 1
[07:14:17.181] <TB2> INFO: Expecting 1863680 events.
[07:14:56.604] <TB2> INFO: 926344 events read in total (38866ms).
[07:15:35.611] <TB2> INFO: 1850184 events read in total (77873ms).
[07:15:36.574] <TB2> INFO: 1863680 events read in total (78837ms).
[07:15:36.594] <TB2> INFO: Test took 79674ms.
[07:15:51.122] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 20.346895 .. 45.857439
[07:15:51.198] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 10 .. 55 (-1/-1) hits flags = 528 (plus default)
[07:15:51.206] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[07:15:51.206] <TB2> INFO: run 1 of 1
[07:15:51.470] <TB2> INFO: Expecting 1530880 events.
[07:16:30.890] <TB2> INFO: 911120 events read in total (38863ms).
[07:16:57.587] <TB2> INFO: 1530880 events read in total (65560ms).
[07:16:57.602] <TB2> INFO: Test took 66396ms.
[07:17:10.972] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 20.667213 .. 45.436167
[07:17:11.048] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 10 .. 55 (-1/-1) hits flags = 528 (plus default)
[07:17:11.056] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[07:17:11.056] <TB2> INFO: run 1 of 1
[07:17:11.318] <TB2> INFO: Expecting 1530880 events.
[07:17:50.711] <TB2> INFO: 911328 events read in total (38837ms).
[07:18:16.933] <TB2> INFO: 1530880 events read in total (65059ms).
[07:18:16.946] <TB2> INFO: Test took 65891ms.
[07:18:30.278] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[07:18:30.278] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[07:18:30.286] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[07:18:30.286] <TB2> INFO: run 1 of 1
[07:18:30.548] <TB2> INFO: Expecting 1364480 events.
[07:19:09.417] <TB2> INFO: 878736 events read in total (38312ms).
[07:19:30.706] <TB2> INFO: 1364480 events read in total (59601ms).
[07:19:30.716] <TB2> INFO: Test took 60430ms.
[07:19:44.246] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C0.dat
[07:19:44.250] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C1.dat
[07:19:44.254] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C2.dat
[07:19:44.258] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C3.dat
[07:19:44.262] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C4.dat
[07:19:44.266] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C5.dat
[07:19:44.270] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C6.dat
[07:19:44.274] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C7.dat
[07:19:44.278] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C8.dat
[07:19:44.282] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C9.dat
[07:19:44.286] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C10.dat
[07:19:44.290] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C11.dat
[07:19:44.294] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C12.dat
[07:19:44.298] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C13.dat
[07:19:44.302] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C14.dat
[07:19:44.306] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C15.dat
[07:19:44.310] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C0.dat
[07:19:44.327] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C1.dat
[07:19:44.344] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C2.dat
[07:19:44.364] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C3.dat
[07:19:44.384] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C4.dat
[07:19:44.402] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C5.dat
[07:19:44.420] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C6.dat
[07:19:44.443] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C7.dat
[07:19:44.465] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C8.dat
[07:19:44.487] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C9.dat
[07:19:44.504] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C10.dat
[07:19:44.522] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C11.dat
[07:19:44.539] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C12.dat
[07:19:44.555] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C13.dat
[07:19:44.572] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C14.dat
[07:19:44.590] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C15.dat
[07:19:44.610] <TB2> INFO: PixTestTrim::trimTest() done
[07:19:44.610] <TB2> INFO: vtrim: 80 85 91 105 89 95 105 97 88 91 87 98 85 100 106 98
[07:19:44.610] <TB2> INFO: vthrcomp: 92 86 82 85 97 80 86 88 90 87 87 92 79 80 94 84
[07:19:44.610] <TB2> INFO: vcal mean: 34.95 34.96 34.97 34.96 34.96 34.98 34.99 35.01 34.98 34.91 35.00 35.01 35.01 35.01 35.00 35.00
[07:19:44.610] <TB2> INFO: vcal RMS: 0.92 0.88 1.05 0.95 0.91 0.92 0.86 0.96 0.98 0.99 0.95 0.90 0.91 0.98 0.98 0.97
[07:19:44.610] <TB2> INFO: bits mean: 9.35 9.84 9.67 9.51 9.38 9.22 9.82 9.44 9.42 9.40 9.64 8.91 8.25 9.48 9.46 9.41
[07:19:44.610] <TB2> INFO: bits RMS: 2.81 2.64 2.65 2.66 2.83 2.67 2.62 2.45 2.65 2.86 2.61 2.84 2.63 2.56 2.72 2.60
[07:19:44.619] <TB2> INFO: ----------------------------------------------------------------------
[07:19:44.619] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[07:19:44.619] <TB2> INFO: ----------------------------------------------------------------------
[07:19:44.623] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[07:19:44.635] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[07:19:44.635] <TB2> INFO: run 1 of 1
[07:19:44.911] <TB2> INFO: Expecting 4160000 events.
[07:20:26.429] <TB2> INFO: 913545 events read in total (40961ms).
[07:21:07.641] <TB2> INFO: 1822665 events read in total (82173ms).
[07:21:48.745] <TB2> INFO: 2725900 events read in total (123278ms).
[07:22:29.196] <TB2> INFO: 3626920 events read in total (163728ms).
[07:22:53.313] <TB2> INFO: 4160000 events read in total (187845ms).
[07:22:53.347] <TB2> INFO: Test took 188712ms.
[07:23:21.130] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 160 (-1/-1) hits flags = 528 (plus default)
[07:23:21.139] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[07:23:21.139] <TB2> INFO: run 1 of 1
[07:23:21.400] <TB2> INFO: Expecting 3348800 events.
[07:24:03.744] <TB2> INFO: 961480 events read in total (41787ms).
[07:24:45.677] <TB2> INFO: 1915635 events read in total (83720ms).
[07:25:27.611] <TB2> INFO: 2861280 events read in total (125654ms).
[07:25:49.597] <TB2> INFO: 3348800 events read in total (147640ms).
[07:25:49.632] <TB2> INFO: Test took 148493ms.
[07:26:15.788] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 152 (-1/-1) hits flags = 528 (plus default)
[07:26:15.796] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[07:26:15.796] <TB2> INFO: run 1 of 1
[07:26:16.082] <TB2> INFO: Expecting 3182400 events.
[07:26:58.546] <TB2> INFO: 983675 events read in total (41907ms).
[07:27:40.767] <TB2> INFO: 1958220 events read in total (84129ms).
[07:28:22.821] <TB2> INFO: 2925335 events read in total (126182ms).
[07:28:34.111] <TB2> INFO: 3182400 events read in total (137472ms).
[07:28:34.136] <TB2> INFO: Test took 138340ms.
[07:28:57.615] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 151 (-1/-1) hits flags = 528 (plus default)
[07:28:57.623] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[07:28:57.623] <TB2> INFO: run 1 of 1
[07:28:57.884] <TB2> INFO: Expecting 3161600 events.
[07:29:41.121] <TB2> INFO: 985895 events read in total (42680ms).
[07:30:23.936] <TB2> INFO: 1962180 events read in total (85495ms).
[07:31:06.854] <TB2> INFO: 2931640 events read in total (128413ms).
[07:31:17.314] <TB2> INFO: 3161600 events read in total (138873ms).
[07:31:17.340] <TB2> INFO: Test took 139717ms.
[07:31:40.816] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[07:31:40.824] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[07:31:40.824] <TB2> INFO: run 1 of 1
[07:31:41.091] <TB2> INFO: Expecting 3140800 events.
[07:32:23.945] <TB2> INFO: 988095 events read in total (42297ms).
[07:33:06.563] <TB2> INFO: 1966065 events read in total (84916ms).
[07:33:48.798] <TB2> INFO: 2937670 events read in total (127151ms).
[07:33:57.860] <TB2> INFO: 3140800 events read in total (136212ms).
[07:33:57.893] <TB2> INFO: Test took 137069ms.
[07:34:21.068] <TB2> INFO: PixTestTrim::trimBitTest() done
[07:34:21.069] <TB2> INFO: PixTestTrim::doTest() done, duration: 2214 seconds
[07:34:21.069] <TB2> INFO: Decoding statistics:
[07:34:21.069] <TB2> INFO: General information:
[07:34:21.069] <TB2> INFO: 16bit words read: 0
[07:34:21.069] <TB2> INFO: valid events total: 0
[07:34:21.069] <TB2> INFO: empty events: 0
[07:34:21.069] <TB2> INFO: valid events with pixels: 0
[07:34:21.069] <TB2> INFO: valid pixel hits: 0
[07:34:21.069] <TB2> INFO: Event errors: 0
[07:34:21.069] <TB2> INFO: start marker: 0
[07:34:21.069] <TB2> INFO: stop marker: 0
[07:34:21.069] <TB2> INFO: overflow: 0
[07:34:21.069] <TB2> INFO: invalid 5bit words: 0
[07:34:21.069] <TB2> INFO: invalid XOR eye diagram: 0
[07:34:21.069] <TB2> INFO: frame (failed synchr.): 0
[07:34:21.069] <TB2> INFO: idle data (no TBM trl): 0
[07:34:21.070] <TB2> INFO: no data (only TBM hdr): 0
[07:34:21.070] <TB2> INFO: TBM errors: 0
[07:34:21.070] <TB2> INFO: flawed TBM headers: 0
[07:34:21.070] <TB2> INFO: flawed TBM trailers: 0
[07:34:21.070] <TB2> INFO: event ID mismatches: 0
[07:34:21.070] <TB2> INFO: ROC errors: 0
[07:34:21.070] <TB2> INFO: missing ROC header(s): 0
[07:34:21.070] <TB2> INFO: misplaced readback start: 0
[07:34:21.070] <TB2> INFO: Pixel decoding errors: 0
[07:34:21.070] <TB2> INFO: pixel data incomplete: 0
[07:34:21.070] <TB2> INFO: pixel address: 0
[07:34:21.070] <TB2> INFO: pulse height fill bit: 0
[07:34:21.070] <TB2> INFO: buffer corruption: 0
[07:34:21.737] <TB2> INFO: ######################################################################
[07:34:21.737] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[07:34:21.737] <TB2> INFO: ######################################################################
[07:34:21.999] <TB2> INFO: Expecting 41600 events.
[07:34:25.777] <TB2> INFO: 41600 events read in total (3221ms).
[07:34:25.778] <TB2> INFO: Test took 4040ms.
[07:34:26.246] <TB2> INFO: Expecting 41600 events.
[07:34:30.060] <TB2> INFO: 41600 events read in total (3257ms).
[07:34:30.060] <TB2> INFO: Test took 4077ms.
[07:34:30.368] <TB2> INFO: Expecting 41600 events.
[07:34:34.137] <TB2> INFO: 41600 events read in total (3212ms).
[07:34:34.138] <TB2> INFO: Test took 4031ms.
[07:34:34.394] <TB2> INFO: Expecting 2560 events.
[07:34:35.249] <TB2> INFO: 2560 events read in total (298ms).
[07:34:35.249] <TB2> INFO: Test took 1098ms.
[07:34:35.556] <TB2> INFO: Expecting 2560 events.
[07:34:36.411] <TB2> INFO: 2560 events read in total (298ms).
[07:34:36.411] <TB2> INFO: Test took 1161ms.
[07:34:36.718] <TB2> INFO: Expecting 2560 events.
[07:34:37.572] <TB2> INFO: 2560 events read in total (297ms).
[07:34:37.572] <TB2> INFO: Test took 1160ms.
[07:34:37.879] <TB2> INFO: Expecting 2560 events.
[07:34:38.733] <TB2> INFO: 2560 events read in total (297ms).
[07:34:38.733] <TB2> INFO: Test took 1160ms.
[07:34:39.040] <TB2> INFO: Expecting 2560 events.
[07:34:39.894] <TB2> INFO: 2560 events read in total (298ms).
[07:34:39.894] <TB2> INFO: Test took 1161ms.
[07:34:40.201] <TB2> INFO: Expecting 2560 events.
[07:34:41.055] <TB2> INFO: 2560 events read in total (298ms).
[07:34:41.055] <TB2> INFO: Test took 1160ms.
[07:34:41.362] <TB2> INFO: Expecting 2560 events.
[07:34:42.218] <TB2> INFO: 2560 events read in total (299ms).
[07:34:42.218] <TB2> INFO: Test took 1162ms.
[07:34:42.525] <TB2> INFO: Expecting 2560 events.
[07:34:43.379] <TB2> INFO: 2560 events read in total (297ms).
[07:34:43.380] <TB2> INFO: Test took 1162ms.
[07:34:43.686] <TB2> INFO: Expecting 2560 events.
[07:34:44.540] <TB2> INFO: 2560 events read in total (297ms).
[07:34:44.541] <TB2> INFO: Test took 1161ms.
[07:34:44.846] <TB2> INFO: Expecting 2560 events.
[07:34:45.700] <TB2> INFO: 2560 events read in total (297ms).
[07:34:45.701] <TB2> INFO: Test took 1160ms.
[07:34:46.007] <TB2> INFO: Expecting 2560 events.
[07:34:46.862] <TB2> INFO: 2560 events read in total (298ms).
[07:34:46.862] <TB2> INFO: Test took 1161ms.
[07:34:47.168] <TB2> INFO: Expecting 2560 events.
[07:34:48.022] <TB2> INFO: 2560 events read in total (297ms).
[07:34:48.023] <TB2> INFO: Test took 1161ms.
[07:34:48.330] <TB2> INFO: Expecting 2560 events.
[07:34:49.186] <TB2> INFO: 2560 events read in total (299ms).
[07:34:49.187] <TB2> INFO: Test took 1164ms.
[07:34:49.493] <TB2> INFO: Expecting 2560 events.
[07:34:50.355] <TB2> INFO: 2560 events read in total (305ms).
[07:34:50.356] <TB2> INFO: Test took 1169ms.
[07:34:50.663] <TB2> INFO: Expecting 2560 events.
[07:34:51.523] <TB2> INFO: 2560 events read in total (303ms).
[07:34:51.523] <TB2> INFO: Test took 1167ms.
[07:34:51.829] <TB2> INFO: Expecting 2560 events.
[07:34:52.689] <TB2> INFO: 2560 events read in total (303ms).
[07:34:52.689] <TB2> INFO: Test took 1165ms.
[07:34:52.694] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:34:52.997] <TB2> INFO: Expecting 655360 events.
[07:35:09.713] <TB2> INFO: 655360 events read in total (16159ms).
[07:35:09.723] <TB2> INFO: Expecting 655360 events.
[07:35:26.265] <TB2> INFO: 655360 events read in total (16140ms).
[07:35:26.277] <TB2> INFO: Expecting 655360 events.
[07:35:42.910] <TB2> INFO: 655360 events read in total (16231ms).
[07:35:42.926] <TB2> INFO: Expecting 655360 events.
[07:35:59.434] <TB2> INFO: 655360 events read in total (16105ms).
[07:35:59.453] <TB2> INFO: Expecting 655360 events.
[07:36:16.128] <TB2> INFO: 655360 events read in total (16273ms).
[07:36:16.150] <TB2> INFO: Expecting 655360 events.
[07:36:32.869] <TB2> INFO: 655360 events read in total (16317ms).
[07:36:32.896] <TB2> INFO: Expecting 655360 events.
[07:36:49.457] <TB2> INFO: 655360 events read in total (16159ms).
[07:36:49.487] <TB2> INFO: Expecting 655360 events.
[07:37:05.934] <TB2> INFO: 655360 events read in total (16044ms).
[07:37:05.967] <TB2> INFO: Expecting 655360 events.
[07:37:22.436] <TB2> INFO: 655360 events read in total (16067ms).
[07:37:22.475] <TB2> INFO: Expecting 655360 events.
[07:37:38.906] <TB2> INFO: 655360 events read in total (16029ms).
[07:37:38.946] <TB2> INFO: Expecting 655360 events.
[07:37:55.451] <TB2> INFO: 655360 events read in total (16103ms).
[07:37:55.493] <TB2> INFO: Expecting 655360 events.
[07:38:12.266] <TB2> INFO: 655360 events read in total (16370ms).
[07:38:12.313] <TB2> INFO: Expecting 655360 events.
[07:38:28.843] <TB2> INFO: 655360 events read in total (16127ms).
[07:38:28.909] <TB2> INFO: Expecting 655360 events.
[07:38:45.688] <TB2> INFO: 655360 events read in total (16377ms).
[07:38:45.746] <TB2> INFO: Expecting 655360 events.
[07:39:02.277] <TB2> INFO: 655360 events read in total (16128ms).
[07:39:02.334] <TB2> INFO: Expecting 655360 events.
[07:39:18.937] <TB2> INFO: 655360 events read in total (16200ms).
[07:39:18.996] <TB2> INFO: Test took 266302ms.
[07:39:19.074] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:39:19.303] <TB2> INFO: Expecting 655360 events.
[07:39:36.148] <TB2> INFO: 655360 events read in total (16289ms).
[07:39:36.157] <TB2> INFO: Expecting 655360 events.
[07:39:52.699] <TB2> INFO: 655360 events read in total (16139ms).
[07:39:52.712] <TB2> INFO: Expecting 655360 events.
[07:40:09.553] <TB2> INFO: 655360 events read in total (16439ms).
[07:40:09.571] <TB2> INFO: Expecting 655360 events.
[07:40:26.194] <TB2> INFO: 655360 events read in total (16221ms).
[07:40:26.251] <TB2> INFO: Expecting 655360 events.
[07:40:42.725] <TB2> INFO: 655360 events read in total (16072ms).
[07:40:42.751] <TB2> INFO: Expecting 655360 events.
[07:40:59.020] <TB2> INFO: 655360 events read in total (15867ms).
[07:40:59.047] <TB2> INFO: Expecting 655360 events.
[07:41:15.548] <TB2> INFO: 655360 events read in total (16099ms).
[07:41:15.577] <TB2> INFO: Expecting 655360 events.
[07:41:32.240] <TB2> INFO: 655360 events read in total (16260ms).
[07:41:32.275] <TB2> INFO: Expecting 655360 events.
[07:41:48.830] <TB2> INFO: 655360 events read in total (16153ms).
[07:41:48.871] <TB2> INFO: Expecting 655360 events.
[07:42:04.976] <TB2> INFO: 655360 events read in total (15702ms).
[07:42:05.018] <TB2> INFO: Expecting 655360 events.
[07:42:21.569] <TB2> INFO: 655360 events read in total (16148ms).
[07:42:21.613] <TB2> INFO: Expecting 655360 events.
[07:42:38.348] <TB2> INFO: 655360 events read in total (16333ms).
[07:42:38.394] <TB2> INFO: Expecting 655360 events.
[07:42:55.109] <TB2> INFO: 655360 events read in total (16312ms).
[07:42:55.159] <TB2> INFO: Expecting 655360 events.
[07:43:11.804] <TB2> INFO: 655360 events read in total (16242ms).
[07:43:11.864] <TB2> INFO: Expecting 655360 events.
[07:43:28.473] <TB2> INFO: 655360 events read in total (16207ms).
[07:43:28.535] <TB2> INFO: Expecting 655360 events.
[07:43:45.201] <TB2> INFO: 655360 events read in total (16263ms).
[07:43:45.261] <TB2> INFO: Test took 266187ms.
[07:43:45.449] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[07:43:45.456] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[07:43:45.462] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[07:43:45.469] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[07:43:45.475] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[07:43:45.482] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[07:43:45.488] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[07:43:45.495] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[07:43:45.501] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[07:43:45.508] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[07:43:45.514] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[07:43:45.521] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[07:43:45.527] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[07:43:45.534] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[07:43:45.540] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[07:43:45.547] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[07:43:45.604] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C0.dat
[07:43:45.609] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C1.dat
[07:43:45.616] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C2.dat
[07:43:45.622] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C3.dat
[07:43:45.627] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C4.dat
[07:43:45.632] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C5.dat
[07:43:45.637] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C6.dat
[07:43:45.644] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C7.dat
[07:43:45.649] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C8.dat
[07:43:45.656] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C9.dat
[07:43:45.661] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C10.dat
[07:43:45.668] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C11.dat
[07:43:45.673] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C12.dat
[07:43:45.678] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C13.dat
[07:43:45.683] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C14.dat
[07:43:45.688] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C15.dat
[07:43:45.961] <TB2> INFO: Expecting 41600 events.
[07:43:49.465] <TB2> INFO: 41600 events read in total (2947ms).
[07:43:49.466] <TB2> INFO: Test took 3771ms.
[07:43:49.924] <TB2> INFO: Expecting 41600 events.
[07:43:53.393] <TB2> INFO: 41600 events read in total (2912ms).
[07:43:53.394] <TB2> INFO: Test took 3741ms.
[07:43:53.853] <TB2> INFO: Expecting 41600 events.
[07:43:57.322] <TB2> INFO: 41600 events read in total (2912ms).
[07:43:57.323] <TB2> INFO: Test took 3740ms.
[07:43:57.514] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:43:57.603] <TB2> INFO: Expecting 2560 events.
[07:43:58.460] <TB2> INFO: 2560 events read in total (300ms).
[07:43:58.460] <TB2> INFO: Test took 946ms.
[07:43:58.463] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:43:58.767] <TB2> INFO: Expecting 2560 events.
[07:43:59.622] <TB2> INFO: 2560 events read in total (298ms).
[07:43:59.623] <TB2> INFO: Test took 1160ms.
[07:43:59.625] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:43:59.929] <TB2> INFO: Expecting 2560 events.
[07:44:00.784] <TB2> INFO: 2560 events read in total (298ms).
[07:44:00.785] <TB2> INFO: Test took 1160ms.
[07:44:00.788] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:01.091] <TB2> INFO: Expecting 2560 events.
[07:44:01.947] <TB2> INFO: 2560 events read in total (299ms).
[07:44:01.947] <TB2> INFO: Test took 1159ms.
[07:44:01.949] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:02.254] <TB2> INFO: Expecting 2560 events.
[07:44:03.109] <TB2> INFO: 2560 events read in total (298ms).
[07:44:03.109] <TB2> INFO: Test took 1160ms.
[07:44:03.112] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:03.416] <TB2> INFO: Expecting 2560 events.
[07:44:04.273] <TB2> INFO: 2560 events read in total (300ms).
[07:44:04.274] <TB2> INFO: Test took 1162ms.
[07:44:04.277] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:04.581] <TB2> INFO: Expecting 2560 events.
[07:44:05.436] <TB2> INFO: 2560 events read in total (298ms).
[07:44:05.436] <TB2> INFO: Test took 1159ms.
[07:44:05.439] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:05.743] <TB2> INFO: Expecting 2560 events.
[07:44:06.603] <TB2> INFO: 2560 events read in total (303ms).
[07:44:06.604] <TB2> INFO: Test took 1165ms.
[07:44:06.607] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:06.910] <TB2> INFO: Expecting 2560 events.
[07:44:07.765] <TB2> INFO: 2560 events read in total (298ms).
[07:44:07.765] <TB2> INFO: Test took 1158ms.
[07:44:07.768] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:08.072] <TB2> INFO: Expecting 2560 events.
[07:44:08.927] <TB2> INFO: 2560 events read in total (297ms).
[07:44:08.927] <TB2> INFO: Test took 1159ms.
[07:44:08.930] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:09.234] <TB2> INFO: Expecting 2560 events.
[07:44:10.087] <TB2> INFO: 2560 events read in total (296ms).
[07:44:10.088] <TB2> INFO: Test took 1158ms.
[07:44:10.090] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:10.395] <TB2> INFO: Expecting 2560 events.
[07:44:11.250] <TB2> INFO: 2560 events read in total (298ms).
[07:44:11.250] <TB2> INFO: Test took 1160ms.
[07:44:11.252] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:11.557] <TB2> INFO: Expecting 2560 events.
[07:44:12.414] <TB2> INFO: 2560 events read in total (300ms).
[07:44:12.415] <TB2> INFO: Test took 1163ms.
[07:44:12.418] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:12.720] <TB2> INFO: Expecting 2560 events.
[07:44:13.574] <TB2> INFO: 2560 events read in total (297ms).
[07:44:13.575] <TB2> INFO: Test took 1157ms.
[07:44:13.578] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:13.881] <TB2> INFO: Expecting 2560 events.
[07:44:14.735] <TB2> INFO: 2560 events read in total (297ms).
[07:44:14.736] <TB2> INFO: Test took 1158ms.
[07:44:14.738] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:15.042] <TB2> INFO: Expecting 2560 events.
[07:44:15.896] <TB2> INFO: 2560 events read in total (297ms).
[07:44:15.897] <TB2> INFO: Test took 1159ms.
[07:44:15.899] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:16.204] <TB2> INFO: Expecting 2560 events.
[07:44:17.059] <TB2> INFO: 2560 events read in total (298ms).
[07:44:17.059] <TB2> INFO: Test took 1160ms.
[07:44:17.062] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:17.367] <TB2> INFO: Expecting 2560 events.
[07:44:18.221] <TB2> INFO: 2560 events read in total (297ms).
[07:44:18.222] <TB2> INFO: Test took 1160ms.
[07:44:18.225] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:18.529] <TB2> INFO: Expecting 2560 events.
[07:44:19.384] <TB2> INFO: 2560 events read in total (298ms).
[07:44:19.384] <TB2> INFO: Test took 1160ms.
[07:44:19.387] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:19.692] <TB2> INFO: Expecting 2560 events.
[07:44:20.546] <TB2> INFO: 2560 events read in total (297ms).
[07:44:20.546] <TB2> INFO: Test took 1159ms.
[07:44:20.549] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:20.854] <TB2> INFO: Expecting 2560 events.
[07:44:21.710] <TB2> INFO: 2560 events read in total (299ms).
[07:44:21.710] <TB2> INFO: Test took 1161ms.
[07:44:21.713] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:22.017] <TB2> INFO: Expecting 2560 events.
[07:44:22.878] <TB2> INFO: 2560 events read in total (304ms).
[07:44:22.879] <TB2> INFO: Test took 1166ms.
[07:44:22.882] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:23.185] <TB2> INFO: Expecting 2560 events.
[07:44:24.044] <TB2> INFO: 2560 events read in total (302ms).
[07:44:24.045] <TB2> INFO: Test took 1163ms.
[07:44:24.049] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:24.351] <TB2> INFO: Expecting 2560 events.
[07:44:25.205] <TB2> INFO: 2560 events read in total (298ms).
[07:44:25.206] <TB2> INFO: Test took 1158ms.
[07:44:25.208] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:25.512] <TB2> INFO: Expecting 2560 events.
[07:44:26.367] <TB2> INFO: 2560 events read in total (298ms).
[07:44:26.367] <TB2> INFO: Test took 1159ms.
[07:44:26.370] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:26.674] <TB2> INFO: Expecting 2560 events.
[07:44:27.529] <TB2> INFO: 2560 events read in total (298ms).
[07:44:27.529] <TB2> INFO: Test took 1159ms.
[07:44:27.532] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:27.836] <TB2> INFO: Expecting 2560 events.
[07:44:28.691] <TB2> INFO: 2560 events read in total (298ms).
[07:44:28.691] <TB2> INFO: Test took 1159ms.
[07:44:28.694] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:28.999] <TB2> INFO: Expecting 2560 events.
[07:44:29.854] <TB2> INFO: 2560 events read in total (298ms).
[07:44:29.855] <TB2> INFO: Test took 1161ms.
[07:44:29.857] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:30.162] <TB2> INFO: Expecting 2560 events.
[07:44:31.018] <TB2> INFO: 2560 events read in total (298ms).
[07:44:31.018] <TB2> INFO: Test took 1161ms.
[07:44:31.022] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:31.325] <TB2> INFO: Expecting 2560 events.
[07:44:32.185] <TB2> INFO: 2560 events read in total (303ms).
[07:44:32.185] <TB2> INFO: Test took 1163ms.
[07:44:32.188] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:32.493] <TB2> INFO: Expecting 2560 events.
[07:44:33.348] <TB2> INFO: 2560 events read in total (298ms).
[07:44:33.349] <TB2> INFO: Test took 1161ms.
[07:44:33.352] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:33.656] <TB2> INFO: Expecting 2560 events.
[07:44:34.516] <TB2> INFO: 2560 events read in total (303ms).
[07:44:34.516] <TB2> INFO: Test took 1165ms.
[07:44:35.011] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 613 seconds
[07:44:35.011] <TB2> INFO: PH scale (per ROC): 79 90 89 85 87 83 84 79 79 84 74 81 91 81 76 80
[07:44:35.011] <TB2> INFO: PH offset (per ROC): 166 155 144 174 158 157 141 162 158 162 166 148 145 162 151 159
[07:44:35.015] <TB2> INFO: Decoding statistics:
[07:44:35.015] <TB2> INFO: General information:
[07:44:35.015] <TB2> INFO: 16bit words read: 91932
[07:44:35.015] <TB2> INFO: valid events total: 10240
[07:44:35.015] <TB2> INFO: empty events: 7737
[07:44:35.015] <TB2> INFO: valid events with pixels: 2503
[07:44:35.015] <TB2> INFO: valid pixel hits: 2503
[07:44:35.015] <TB2> INFO: Event errors: 0
[07:44:35.015] <TB2> INFO: start marker: 0
[07:44:35.015] <TB2> INFO: stop marker: 0
[07:44:35.015] <TB2> INFO: overflow: 0
[07:44:35.015] <TB2> INFO: invalid 5bit words: 0
[07:44:35.015] <TB2> INFO: invalid XOR eye diagram: 0
[07:44:35.015] <TB2> INFO: frame (failed synchr.): 0
[07:44:35.015] <TB2> INFO: idle data (no TBM trl): 0
[07:44:35.015] <TB2> INFO: no data (only TBM hdr): 0
[07:44:35.015] <TB2> INFO: TBM errors: 0
[07:44:35.015] <TB2> INFO: flawed TBM headers: 0
[07:44:35.015] <TB2> INFO: flawed TBM trailers: 0
[07:44:35.015] <TB2> INFO: event ID mismatches: 0
[07:44:35.015] <TB2> INFO: ROC errors: 0
[07:44:35.015] <TB2> INFO: missing ROC header(s): 0
[07:44:35.015] <TB2> INFO: misplaced readback start: 0
[07:44:35.015] <TB2> INFO: Pixel decoding errors: 0
[07:44:35.015] <TB2> INFO: pixel data incomplete: 0
[07:44:35.015] <TB2> INFO: pixel address: 0
[07:44:35.015] <TB2> INFO: pulse height fill bit: 0
[07:44:35.015] <TB2> INFO: buffer corruption: 0
[07:44:35.188] <TB2> INFO: ######################################################################
[07:44:35.188] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[07:44:35.188] <TB2> INFO: ######################################################################
[07:44:35.198] <TB2> INFO: scanning low vcal = 10
[07:44:35.470] <TB2> INFO: Expecting 41600 events.
[07:44:38.999] <TB2> INFO: 41600 events read in total (2972ms).
[07:44:38.999] <TB2> INFO: Test took 3801ms.
[07:44:39.001] <TB2> INFO: scanning low vcal = 20
[07:44:39.306] <TB2> INFO: Expecting 41600 events.
[07:44:42.850] <TB2> INFO: 41600 events read in total (2987ms).
[07:44:42.850] <TB2> INFO: Test took 3848ms.
[07:44:42.852] <TB2> INFO: scanning low vcal = 30
[07:44:43.156] <TB2> INFO: Expecting 41600 events.
[07:44:46.705] <TB2> INFO: 41600 events read in total (2992ms).
[07:44:46.706] <TB2> INFO: Test took 3854ms.
[07:44:46.708] <TB2> INFO: scanning low vcal = 40
[07:44:47.005] <TB2> INFO: Expecting 41600 events.
[07:44:51.141] <TB2> INFO: 41600 events read in total (3579ms).
[07:44:51.142] <TB2> INFO: Test took 4433ms.
[07:44:51.145] <TB2> INFO: scanning low vcal = 50
[07:44:51.429] <TB2> INFO: Expecting 41600 events.
[07:44:55.649] <TB2> INFO: 41600 events read in total (3663ms).
[07:44:55.650] <TB2> INFO: Test took 4505ms.
[07:44:55.653] <TB2> INFO: scanning low vcal = 60
[07:44:55.947] <TB2> INFO: Expecting 41600 events.
[07:45:00.148] <TB2> INFO: 41600 events read in total (3644ms).
[07:45:00.149] <TB2> INFO: Test took 4496ms.
[07:45:00.153] <TB2> INFO: scanning low vcal = 70
[07:45:00.417] <TB2> INFO: Expecting 41600 events.
[07:45:04.607] <TB2> INFO: 41600 events read in total (3633ms).
[07:45:04.608] <TB2> INFO: Test took 4455ms.
[07:45:04.611] <TB2> INFO: scanning low vcal = 80
[07:45:04.870] <TB2> INFO: Expecting 41600 events.
[07:45:09.075] <TB2> INFO: 41600 events read in total (3649ms).
[07:45:09.076] <TB2> INFO: Test took 4465ms.
[07:45:09.079] <TB2> INFO: scanning low vcal = 90
[07:45:09.341] <TB2> INFO: Expecting 41600 events.
[07:45:13.530] <TB2> INFO: 41600 events read in total (3631ms).
[07:45:13.531] <TB2> INFO: Test took 4451ms.
[07:45:13.534] <TB2> INFO: scanning low vcal = 100
[07:45:13.795] <TB2> INFO: Expecting 41600 events.
[07:45:17.997] <TB2> INFO: 41600 events read in total (3645ms).
[07:45:17.998] <TB2> INFO: Test took 4463ms.
[07:45:18.001] <TB2> INFO: scanning low vcal = 110
[07:45:18.264] <TB2> INFO: Expecting 41600 events.
[07:45:22.473] <TB2> INFO: 41600 events read in total (3652ms).
[07:45:22.473] <TB2> INFO: Test took 4472ms.
[07:45:22.476] <TB2> INFO: scanning low vcal = 120
[07:45:22.739] <TB2> INFO: Expecting 41600 events.
[07:45:26.938] <TB2> INFO: 41600 events read in total (3642ms).
[07:45:26.938] <TB2> INFO: Test took 4461ms.
[07:45:26.942] <TB2> INFO: scanning low vcal = 130
[07:45:27.203] <TB2> INFO: Expecting 41600 events.
[07:45:31.390] <TB2> INFO: 41600 events read in total (3630ms).
[07:45:31.391] <TB2> INFO: Test took 4449ms.
[07:45:31.394] <TB2> INFO: scanning low vcal = 140
[07:45:31.655] <TB2> INFO: Expecting 41600 events.
[07:45:35.847] <TB2> INFO: 41600 events read in total (3635ms).
[07:45:35.847] <TB2> INFO: Test took 4453ms.
[07:45:35.851] <TB2> INFO: scanning low vcal = 150
[07:45:36.121] <TB2> INFO: Expecting 41600 events.
[07:45:40.343] <TB2> INFO: 41600 events read in total (3665ms).
[07:45:40.343] <TB2> INFO: Test took 4492ms.
[07:45:40.346] <TB2> INFO: scanning low vcal = 160
[07:45:40.608] <TB2> INFO: Expecting 41600 events.
[07:45:44.802] <TB2> INFO: 41600 events read in total (3637ms).
[07:45:44.802] <TB2> INFO: Test took 4455ms.
[07:45:44.806] <TB2> INFO: scanning low vcal = 170
[07:45:45.066] <TB2> INFO: Expecting 41600 events.
[07:45:49.264] <TB2> INFO: 41600 events read in total (3641ms).
[07:45:49.265] <TB2> INFO: Test took 4459ms.
[07:45:49.269] <TB2> INFO: scanning low vcal = 180
[07:45:49.533] <TB2> INFO: Expecting 41600 events.
[07:45:53.757] <TB2> INFO: 41600 events read in total (3667ms).
[07:45:53.758] <TB2> INFO: Test took 4489ms.
[07:45:53.761] <TB2> INFO: scanning low vcal = 190
[07:45:54.069] <TB2> INFO: Expecting 41600 events.
[07:45:58.287] <TB2> INFO: 41600 events read in total (3661ms).
[07:45:58.288] <TB2> INFO: Test took 4527ms.
[07:45:58.291] <TB2> INFO: scanning low vcal = 200
[07:45:58.556] <TB2> INFO: Expecting 41600 events.
[07:46:02.812] <TB2> INFO: 41600 events read in total (3699ms).
[07:46:02.813] <TB2> INFO: Test took 4522ms.
[07:46:02.816] <TB2> INFO: scanning low vcal = 210
[07:46:03.082] <TB2> INFO: Expecting 41600 events.
[07:46:07.275] <TB2> INFO: 41600 events read in total (3636ms).
[07:46:07.275] <TB2> INFO: Test took 4459ms.
[07:46:07.279] <TB2> INFO: scanning low vcal = 220
[07:46:07.558] <TB2> INFO: Expecting 41600 events.
[07:46:11.787] <TB2> INFO: 41600 events read in total (3672ms).
[07:46:11.788] <TB2> INFO: Test took 4509ms.
[07:46:11.792] <TB2> INFO: scanning low vcal = 230
[07:46:12.055] <TB2> INFO: Expecting 41600 events.
[07:46:16.278] <TB2> INFO: 41600 events read in total (3666ms).
[07:46:16.279] <TB2> INFO: Test took 4487ms.
[07:46:16.283] <TB2> INFO: scanning low vcal = 240
[07:46:16.572] <TB2> INFO: Expecting 41600 events.
[07:46:20.792] <TB2> INFO: 41600 events read in total (3663ms).
[07:46:20.793] <TB2> INFO: Test took 4510ms.
[07:46:20.797] <TB2> INFO: scanning low vcal = 250
[07:46:21.092] <TB2> INFO: Expecting 41600 events.
[07:46:25.282] <TB2> INFO: 41600 events read in total (3633ms).
[07:46:25.283] <TB2> INFO: Test took 4486ms.
[07:46:25.288] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[07:46:25.556] <TB2> INFO: Expecting 41600 events.
[07:46:29.758] <TB2> INFO: 41600 events read in total (3645ms).
[07:46:29.759] <TB2> INFO: Test took 4471ms.
[07:46:29.762] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[07:46:30.026] <TB2> INFO: Expecting 41600 events.
[07:46:34.214] <TB2> INFO: 41600 events read in total (3631ms).
[07:46:34.215] <TB2> INFO: Test took 4453ms.
[07:46:34.218] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[07:46:34.479] <TB2> INFO: Expecting 41600 events.
[07:46:38.678] <TB2> INFO: 41600 events read in total (3642ms).
[07:46:38.679] <TB2> INFO: Test took 4461ms.
[07:46:38.682] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[07:46:38.951] <TB2> INFO: Expecting 41600 events.
[07:46:43.140] <TB2> INFO: 41600 events read in total (3632ms).
[07:46:43.141] <TB2> INFO: Test took 4458ms.
[07:46:43.144] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[07:46:43.443] <TB2> INFO: Expecting 41600 events.
[07:46:47.639] <TB2> INFO: 41600 events read in total (3639ms).
[07:46:47.639] <TB2> INFO: Test took 4495ms.
[07:46:48.752] <TB2> INFO: PixTestGainPedestal::measure() done
[07:47:23.004] <TB2> INFO: PixTestGainPedestal::fit() done
[07:47:23.004] <TB2> INFO: non-linearity mean: 0.959 0.956 0.953 0.956 0.961 0.951 0.948 0.958 0.954 0.954 0.954 0.952 0.954 0.953 0.956 0.952
[07:47:23.004] <TB2> INFO: non-linearity RMS: 0.005 0.005 0.006 0.006 0.005 0.006 0.006 0.006 0.007 0.006 0.006 0.006 0.005 0.006 0.006 0.007
[07:47:23.005] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[07:47:23.050] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[07:47:23.097] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[07:47:23.140] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[07:47:23.182] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[07:47:23.227] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[07:47:23.274] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[07:47:23.316] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[07:47:23.368] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[07:47:23.411] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[07:47:23.456] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[07:47:23.509] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[07:47:23.551] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[07:47:23.594] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[07:47:23.637] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[07:47:23.680] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[07:47:23.722] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 168 seconds
[07:47:23.722] <TB2> INFO: Decoding statistics:
[07:47:23.722] <TB2> INFO: General information:
[07:47:23.722] <TB2> INFO: 16bit words read: 2662400
[07:47:23.722] <TB2> INFO: valid events total: 166400
[07:47:23.722] <TB2> INFO: empty events: 0
[07:47:23.722] <TB2> INFO: valid events with pixels: 166400
[07:47:23.722] <TB2> INFO: valid pixel hits: 665580
[07:47:23.722] <TB2> INFO: Event errors: 0
[07:47:23.722] <TB2> INFO: start marker: 0
[07:47:23.722] <TB2> INFO: stop marker: 0
[07:47:23.722] <TB2> INFO: overflow: 0
[07:47:23.722] <TB2> INFO: invalid 5bit words: 0
[07:47:23.722] <TB2> INFO: invalid XOR eye diagram: 0
[07:47:23.722] <TB2> INFO: frame (failed synchr.): 0
[07:47:23.722] <TB2> INFO: idle data (no TBM trl): 0
[07:47:23.722] <TB2> INFO: no data (only TBM hdr): 0
[07:47:23.722] <TB2> INFO: TBM errors: 0
[07:47:23.722] <TB2> INFO: flawed TBM headers: 0
[07:47:23.722] <TB2> INFO: flawed TBM trailers: 0
[07:47:23.722] <TB2> INFO: event ID mismatches: 0
[07:47:23.722] <TB2> INFO: ROC errors: 0
[07:47:23.722] <TB2> INFO: missing ROC header(s): 0
[07:47:23.722] <TB2> INFO: misplaced readback start: 0
[07:47:23.722] <TB2> INFO: Pixel decoding errors: 0
[07:47:23.722] <TB2> INFO: pixel data incomplete: 0
[07:47:23.722] <TB2> INFO: pixel address: 0
[07:47:23.722] <TB2> INFO: pulse height fill bit: 0
[07:47:23.722] <TB2> INFO: buffer corruption: 0
[07:47:23.730] <TB2> INFO: readReadbackCal: /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C0.dat .. /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C15.dat
[07:47:23.741] <TB2> INFO: ######################################################################
[07:47:23.741] <TB2> INFO: PixTestReadback::doTest()
[07:47:23.741] <TB2> INFO: ######################################################################
[07:47:23.741] <TB2> INFO: ----------------------------------------------------------------------
[07:47:23.741] <TB2> INFO: PixTestReadback::CalibrateVd()
[07:47:23.741] <TB2> INFO: ----------------------------------------------------------------------
[07:47:33.293] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C0.dat
[07:47:33.330] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C1.dat
[07:47:33.349] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C2.dat
[07:47:33.394] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C3.dat
[07:47:33.399] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C4.dat
[07:47:33.412] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C5.dat
[07:47:33.417] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C6.dat
[07:47:33.422] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C7.dat
[07:47:33.429] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C8.dat
[07:47:33.434] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C9.dat
[07:47:33.439] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C10.dat
[07:47:33.451] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C11.dat
[07:47:33.457] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C12.dat
[07:47:33.462] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C13.dat
[07:47:33.467] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C14.dat
[07:47:33.472] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C15.dat
[07:47:33.520] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[07:47:33.520] <TB2> INFO: ----------------------------------------------------------------------
[07:47:33.520] <TB2> INFO: PixTestReadback::CalibrateVa()
[07:47:33.520] <TB2> INFO: ----------------------------------------------------------------------
[07:47:43.326] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C0.dat
[07:47:43.393] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C1.dat
[07:47:43.452] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C2.dat
[07:47:43.513] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C3.dat
[07:47:43.518] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C4.dat
[07:47:43.523] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C5.dat
[07:47:43.528] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C6.dat
[07:47:43.534] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C7.dat
[07:47:43.539] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C8.dat
[07:47:43.544] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C9.dat
[07:47:43.549] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C10.dat
[07:47:43.554] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C11.dat
[07:47:43.559] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C12.dat
[07:47:43.564] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C13.dat
[07:47:43.569] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C14.dat
[07:47:43.574] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C15.dat
[07:47:43.623] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[07:47:43.623] <TB2> INFO: ----------------------------------------------------------------------
[07:47:43.623] <TB2> INFO: PixTestReadback::readbackVbg()
[07:47:43.623] <TB2> INFO: ----------------------------------------------------------------------
[07:47:50.987] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[07:47:50.988] <TB2> INFO: ----------------------------------------------------------------------
[07:47:50.988] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[07:47:50.988] <TB2> INFO: ----------------------------------------------------------------------
[07:47:50.988] <TB2> INFO: Vbg will be calibrated using Vd calibration
[07:47:50.988] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 156.5calibrated Vbg = 1.20505 :::*/*/*/*/
[07:47:50.988] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 152.4calibrated Vbg = 1.20171 :::*/*/*/*/
[07:47:50.988] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 151.9calibrated Vbg = 1.20997 :::*/*/*/*/
[07:47:50.988] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 149.8calibrated Vbg = 1.21925 :::*/*/*/*/
[07:47:50.988] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 152.1calibrated Vbg = 1.21893 :::*/*/*/*/
[07:47:50.988] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 160.7calibrated Vbg = 1.22345 :::*/*/*/*/
[07:47:50.988] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 155.4calibrated Vbg = 1.21671 :::*/*/*/*/
[07:47:50.988] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 161.6calibrated Vbg = 1.22621 :::*/*/*/*/
[07:47:50.988] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 157.7calibrated Vbg = 1.22551 :::*/*/*/*/
[07:47:50.988] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 154.2calibrated Vbg = 1.21921 :::*/*/*/*/
[07:47:50.989] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 155.5calibrated Vbg = 1.21718 :::*/*/*/*/
[07:47:50.989] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 154calibrated Vbg = 1.21336 :::*/*/*/*/
[07:47:50.989] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 155.5calibrated Vbg = 1.21406 :::*/*/*/*/
[07:47:50.989] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 153.6calibrated Vbg = 1.20652 :::*/*/*/*/
[07:47:50.989] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 154.2calibrated Vbg = 1.21881 :::*/*/*/*/
[07:47:50.989] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 161.3calibrated Vbg = 1.21768 :::*/*/*/*/
[07:47:50.992] <TB2> INFO: ----------------------------------------------------------------------
[07:47:50.993] <TB2> INFO: PixTestReadback::CalibrateIa()
[07:47:50.993] <TB2> INFO: ----------------------------------------------------------------------
[07:50:27.038] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C0.dat
[07:50:27.044] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C1.dat
[07:50:27.049] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C2.dat
[07:50:27.054] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C3.dat
[07:50:27.059] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C4.dat
[07:50:27.064] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C5.dat
[07:50:27.069] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C6.dat
[07:50:27.074] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C7.dat
[07:50:27.079] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C8.dat
[07:50:27.084] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C9.dat
[07:50:27.089] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C10.dat
[07:50:27.094] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C11.dat
[07:50:27.099] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C12.dat
[07:50:27.104] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C13.dat
[07:50:27.109] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C14.dat
[07:50:27.114] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2243_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C15.dat
[07:50:27.162] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[07:50:27.162] <TB2> INFO: PixTestReadback::doTest() done
[07:50:27.162] <TB2> INFO: Decoding statistics:
[07:50:27.162] <TB2> INFO: General information:
[07:50:27.162] <TB2> INFO: 16bit words read: 1024
[07:50:27.162] <TB2> INFO: valid events total: 128
[07:50:27.162] <TB2> INFO: empty events: 128
[07:50:27.163] <TB2> INFO: valid events with pixels: 0
[07:50:27.163] <TB2> INFO: valid pixel hits: 0
[07:50:27.163] <TB2> INFO: Event errors: 0
[07:50:27.163] <TB2> INFO: start marker: 0
[07:50:27.163] <TB2> INFO: stop marker: 0
[07:50:27.163] <TB2> INFO: overflow: 0
[07:50:27.163] <TB2> INFO: invalid 5bit words: 0
[07:50:27.163] <TB2> INFO: invalid XOR eye diagram: 0
[07:50:27.163] <TB2> INFO: frame (failed synchr.): 0
[07:50:27.163] <TB2> INFO: idle data (no TBM trl): 0
[07:50:27.163] <TB2> INFO: no data (only TBM hdr): 0
[07:50:27.163] <TB2> INFO: TBM errors: 0
[07:50:27.163] <TB2> INFO: flawed TBM headers: 0
[07:50:27.163] <TB2> INFO: flawed TBM trailers: 0
[07:50:27.163] <TB2> INFO: event ID mismatches: 0
[07:50:27.163] <TB2> INFO: ROC errors: 0
[07:50:27.163] <TB2> INFO: missing ROC header(s): 0
[07:50:27.163] <TB2> INFO: misplaced readback start: 0
[07:50:27.163] <TB2> INFO: Pixel decoding errors: 0
[07:50:27.163] <TB2> INFO: pixel data incomplete: 0
[07:50:27.163] <TB2> INFO: pixel address: 0
[07:50:27.163] <TB2> INFO: pulse height fill bit: 0
[07:50:27.163] <TB2> INFO: buffer corruption: 0
[07:50:27.181] <TB2> INFO: Decoding statistics:
[07:50:27.181] <TB2> INFO: General information:
[07:50:27.181] <TB2> INFO: 16bit words read: 2755356
[07:50:27.181] <TB2> INFO: valid events total: 176768
[07:50:27.181] <TB2> INFO: empty events: 7865
[07:50:27.181] <TB2> INFO: valid events with pixels: 168903
[07:50:27.181] <TB2> INFO: valid pixel hits: 668083
[07:50:27.181] <TB2> INFO: Event errors: 0
[07:50:27.181] <TB2> INFO: start marker: 0
[07:50:27.181] <TB2> INFO: stop marker: 0
[07:50:27.181] <TB2> INFO: overflow: 0
[07:50:27.181] <TB2> INFO: invalid 5bit words: 0
[07:50:27.181] <TB2> INFO: invalid XOR eye diagram: 0
[07:50:27.181] <TB2> INFO: frame (failed synchr.): 0
[07:50:27.181] <TB2> INFO: idle data (no TBM trl): 0
[07:50:27.181] <TB2> INFO: no data (only TBM hdr): 0
[07:50:27.181] <TB2> INFO: TBM errors: 0
[07:50:27.181] <TB2> INFO: flawed TBM headers: 0
[07:50:27.181] <TB2> INFO: flawed TBM trailers: 0
[07:50:27.181] <TB2> INFO: event ID mismatches: 0
[07:50:27.181] <TB2> INFO: ROC errors: 0
[07:50:27.181] <TB2> INFO: missing ROC header(s): 0
[07:50:27.181] <TB2> INFO: misplaced readback start: 0
[07:50:27.181] <TB2> INFO: Pixel decoding errors: 0
[07:50:27.181] <TB2> INFO: pixel data incomplete: 0
[07:50:27.181] <TB2> INFO: pixel address: 0
[07:50:27.181] <TB2> INFO: pulse height fill bit: 0
[07:50:27.181] <TB2> INFO: buffer corruption: 0
[07:50:27.182] <TB2> INFO: enter test to run
[07:50:27.182] <TB2> INFO: test: exit no parameter change
[07:50:27.224] <TB2> QUIET: Connection to board 149 closed.
[07:50:27.304] <TB2> INFO: pXar: this is the end, my friend