[08:30:30.774] <TB1> INFO: *** Welcome to pxar ***
[08:30:30.774] <TB1> INFO: *** Today: 2016/06/08
[08:30:30.845] <TB1> INFO: *** Version: 9751-dirty
[08:30:30.845] <TB1> INFO: readRocDacs: /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters_C0.dat .. /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters_C15.dat
[08:30:30.861] <TB1> INFO: readTbmDacs: /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//tbmParameters_C0a.dat .. /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//tbmParameters_C0b.dat
[08:30:30.863] <TB1> INFO: readMaskFile: /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//defaultMaskFile.dat
[08:30:30.864] <TB1> INFO: readTrimFile: /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//trimParameters_C0.dat .. /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//trimParameters_C15.dat
[08:30:30.985] <TB1> INFO: clk: 4
[08:30:30.985] <TB1> INFO: ctr: 4
[08:30:30.985] <TB1> INFO: sda: 19
[08:30:30.985] <TB1> INFO: tin: 9
[08:30:30.985] <TB1> INFO: level: 15
[08:30:30.985] <TB1> INFO: triggerdelay: 0
[08:30:30.985] <TB1> QUIET: Instanciating API for pxar v2.7.5+40~g4fce89b
[08:30:30.985] <TB1> INFO: Log level: INFO
[08:30:30.992] <TB1> INFO: Found DTB DTB_WXC03A
[08:30:31.001] <TB1> QUIET: Connection to board DTB_WXC03A opened.
[08:30:31.003] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 154
HW version: DTB1.2
FW version: 4.4
SW version: 4.6
Options:
USB id: DTB_WXC03A
MAC address: 40D85511809A
Hostname: pixelDTB154
Comment:
------------------------------------------------------
[08:30:31.005] <TB1> INFO: RPC call hashes of host and DTB match: 484264910
[08:30:32.513] <TB1> INFO: DUT info:
[08:30:32.513] <TB1> INFO: The DUT currently contains the following objects:
[08:30:32.513] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[08:30:32.513] <TB1> INFO: TBM Core alpha (0): 7 registers set
[08:30:32.513] <TB1> INFO: TBM Core beta (1): 7 registers set
[08:30:32.513] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[08:30:32.513] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[08:30:32.513] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[08:30:32.513] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[08:30:32.513] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[08:30:32.513] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[08:30:32.513] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[08:30:32.513] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[08:30:32.513] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[08:30:32.513] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[08:30:32.513] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[08:30:32.513] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[08:30:32.513] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[08:30:32.513] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[08:30:32.513] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[08:30:32.513] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[08:30:32.513] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[08:30:32.915] <TB1> INFO: enter 'restricted' command line mode
[08:30:32.915] <TB1> INFO: enter test to run
[08:30:32.915] <TB1> INFO: test: pretest no parameter change
[08:30:32.915] <TB1> INFO: running: pretest
[08:30:32.920] <TB1> INFO: ----------------------------------------------------------------------
[08:30:32.920] <TB1> INFO: PixTestPretest::programROC()
[08:30:32.920] <TB1> INFO: ----------------------------------------------------------------------
[08:30:50.933] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[08:30:50.933] <TB1> INFO: IA differences per ROC: 20.1 20.9 22.5 19.3 21.7 20.9 20.1 22.5 21.7 20.1 20.9 22.5 20.1 19.3 19.3 21.7
[08:30:51.020] <TB1> INFO: enter test to run
[08:30:51.022] <TB1> INFO: test: pretest no parameter change
[08:30:51.022] <TB1> INFO: running: pretest
[08:30:51.023] <TB1> INFO: ----------------------------------------------------------------------
[08:30:51.023] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[08:30:51.023] <TB1> INFO: ----------------------------------------------------------------------
[08:30:58.113] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 381.9 mA = 23.8688 mA/ROC
[08:30:58.113] <TB1> INFO: i(loss) [mA/ROC]: 18.5 18.5 19.3 18.5 18.5 18.5 18.5 18.5 18.5 18.5 18.5 18.5 18.5 18.5 18.5 18.5
[08:30:58.147] <TB1> INFO: enter test to run
[08:30:58.147] <TB1> INFO: test: pretest no parameter change
[08:30:58.147] <TB1> INFO: running: pretest
[08:30:58.147] <TB1> INFO: ----------------------------------------------------------------------
[08:30:58.147] <TB1> INFO: PixTestPretest::findTiming()
[08:30:58.147] <TB1> INFO: ----------------------------------------------------------------------
[08:30:58.147] <TB1> INFO: PixTestCmd::init()

[08:32:27.085] <TB1> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[08:32:27.085] <TB1> INFO: (success/tries = 100/100), width = 4
[08:32:27.086] <TB1> INFO: enter test to run
[08:32:27.086] <TB1> INFO: test: pretest no parameter change
[08:32:27.086] <TB1> INFO: running: pretest
[08:32:27.087] <TB1> INFO: ----------------------------------------------------------------------
[08:32:27.087] <TB1> INFO: PixTestPretest::findWorkingPixel()
[08:32:27.087] <TB1> INFO: ----------------------------------------------------------------------
[08:32:27.180] <TB1> INFO: Expecting 231680 events.


[08:32:37.364] <TB1> INFO: 231680 events read in total (9627ms).
[08:32:37.368] <TB1> INFO: Test took 10276ms.
[08:32:37.595] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[08:32:37.658] <TB1> INFO: enter test to run
[08:32:37.658] <TB1> INFO: test: pretest no parameter change
[08:32:37.658] <TB1> INFO: running: pretest
[08:32:37.659] <TB1> INFO: ----------------------------------------------------------------------
[08:32:37.659] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[08:32:37.659] <TB1> INFO: ----------------------------------------------------------------------
[08:32:37.752] <TB1> INFO: Expecting 231680 events.
[08:32:47.926] <TB1> INFO: 231680 events read in total (9618ms).
[08:32:47.929] <TB1> INFO: Test took 10266ms.
[08:32:48.188] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[08:32:48.188] <TB1> INFO: CalDel: 125 124 136 134 144 149 143 128 139 141 139 153 142 129 147 146
[08:32:48.188] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[08:32:48.220] <TB1> INFO: enter test to run
[08:32:48.220] <TB1> INFO: test: pretest no parameter change
[08:32:48.220] <TB1> INFO: running: pretest
[08:32:48.227] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters_C0.dat
[08:32:48.232] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters_C1.dat
[08:32:48.237] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters_C2.dat
[08:32:48.242] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters_C3.dat
[08:32:48.247] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters_C4.dat
[08:32:48.252] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters_C5.dat
[08:32:48.257] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters_C6.dat
[08:32:48.262] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters_C7.dat
[08:32:48.267] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters_C8.dat
[08:32:48.272] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters_C9.dat
[08:32:48.278] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters_C10.dat
[08:32:48.283] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters_C11.dat
[08:32:48.291] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters_C12.dat
[08:32:48.296] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters_C13.dat
[08:32:48.301] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters_C14.dat
[08:32:48.306] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters_C15.dat
[08:32:48.309] <TB1> INFO: enter test to run
[08:32:48.309] <TB1> INFO: test: fulltest no parameter change
[08:32:48.309] <TB1> INFO: running: fulltest
[08:32:48.309] <TB1> INFO: ######################################################################
[08:32:48.309] <TB1> INFO: PixTestFullTest::doTest()
[08:32:48.309] <TB1> INFO: ######################################################################
[08:32:48.310] <TB1> INFO: ######################################################################
[08:32:48.310] <TB1> INFO: PixTestAlive::doTest()
[08:32:48.310] <TB1> INFO: ######################################################################
[08:32:48.311] <TB1> INFO: ----------------------------------------------------------------------
[08:32:48.311] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:32:48.311] <TB1> INFO: ----------------------------------------------------------------------
[08:32:48.606] <TB1> INFO: Expecting 41600 events.
[08:32:52.372] <TB1> INFO: 41600 events read in total (3210ms).
[08:32:52.373] <TB1> INFO: Test took 4061ms.
[08:32:52.602] <TB1> INFO: PixTestAlive::aliveTest() done
[08:32:52.602] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
[08:32:52.603] <TB1> INFO: ----------------------------------------------------------------------
[08:32:52.603] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:32:52.603] <TB1> INFO: ----------------------------------------------------------------------
[08:32:52.862] <TB1> INFO: Expecting 41600 events.
[08:32:55.899] <TB1> INFO: 41600 events read in total (2481ms).
[08:32:55.899] <TB1> INFO: Test took 3295ms.
[08:32:55.900] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[08:32:56.149] <TB1> INFO: PixTestAlive::maskTest() done
[08:32:56.149] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:32:56.151] <TB1> INFO: ----------------------------------------------------------------------
[08:32:56.151] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:32:56.151] <TB1> INFO: ----------------------------------------------------------------------
[08:32:56.423] <TB1> INFO: Expecting 41600 events.
[08:33:00.186] <TB1> INFO: 41600 events read in total (3207ms).
[08:33:00.186] <TB1> INFO: Test took 4033ms.
[08:33:00.416] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[08:33:00.416] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:33:00.416] <TB1> INFO: PixTestAlive::doTest() done, duration: 12 seconds
[08:33:00.416] <TB1> INFO: Decoding statistics:
[08:33:00.416] <TB1> INFO: General information:
[08:33:00.416] <TB1> INFO: 16bit words read: 0
[08:33:00.416] <TB1> INFO: valid events total: 0
[08:33:00.416] <TB1> INFO: empty events: 0
[08:33:00.416] <TB1> INFO: valid events with pixels: 0
[08:33:00.416] <TB1> INFO: valid pixel hits: 0
[08:33:00.416] <TB1> INFO: Event errors: 0
[08:33:00.416] <TB1> INFO: start marker: 0
[08:33:00.416] <TB1> INFO: stop marker: 0
[08:33:00.416] <TB1> INFO: overflow: 0
[08:33:00.416] <TB1> INFO: invalid 5bit words: 0
[08:33:00.416] <TB1> INFO: invalid XOR eye diagram: 0
[08:33:00.416] <TB1> INFO: frame (failed synchr.): 0
[08:33:00.416] <TB1> INFO: idle data (no TBM trl): 0
[08:33:00.416] <TB1> INFO: no data (only TBM hdr): 0
[08:33:00.417] <TB1> INFO: TBM errors: 0
[08:33:00.417] <TB1> INFO: flawed TBM headers: 0
[08:33:00.417] <TB1> INFO: flawed TBM trailers: 0
[08:33:00.417] <TB1> INFO: event ID mismatches: 0
[08:33:00.417] <TB1> INFO: ROC errors: 0
[08:33:00.417] <TB1> INFO: missing ROC header(s): 0
[08:33:00.417] <TB1> INFO: misplaced readback start: 0
[08:33:00.417] <TB1> INFO: Pixel decoding errors: 0
[08:33:00.417] <TB1> INFO: pixel data incomplete: 0
[08:33:00.417] <TB1> INFO: pixel address: 0
[08:33:00.417] <TB1> INFO: pulse height fill bit: 0
[08:33:00.417] <TB1> INFO: buffer corruption: 0
[08:33:00.423] <TB1> INFO: ######################################################################
[08:33:00.423] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[08:33:00.423] <TB1> INFO: ######################################################################
[08:33:00.425] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[08:33:00.436] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[08:33:00.436] <TB1> INFO: run 1 of 1
[08:33:00.699] <TB1> INFO: Expecting 3120000 events.
[08:33:41.489] <TB1> INFO: 879780 events read in total (40234ms).
[08:34:21.839] <TB1> INFO: 1746590 events read in total (80584ms).
[08:35:02.031] <TB1> INFO: 2624965 events read in total (120777ms).
[08:35:24.237] <TB1> INFO: 3120000 events read in total (142982ms).
[08:35:24.275] <TB1> INFO: Test took 143838ms.
[08:35:46.674] <TB1> INFO: PixTestBBMap::doTest() done, duration: 166 seconds
[08:35:46.674] <TB1> INFO: number of dead bumps (per ROC): 1 0 1 1 0 0 1 3 0 0 0 0 0 0 0 0
[08:35:46.674] <TB1> INFO: separation cut (per ROC): 88 86 92 88 95 92 92 97 92 96 97 89 89 99 90 88
[08:35:46.675] <TB1> INFO: Decoding statistics:
[08:35:46.675] <TB1> INFO: General information:
[08:35:46.675] <TB1> INFO: 16bit words read: 0
[08:35:46.675] <TB1> INFO: valid events total: 0
[08:35:46.675] <TB1> INFO: empty events: 0
[08:35:46.675] <TB1> INFO: valid events with pixels: 0
[08:35:46.675] <TB1> INFO: valid pixel hits: 0
[08:35:46.675] <TB1> INFO: Event errors: 0
[08:35:46.675] <TB1> INFO: start marker: 0
[08:35:46.675] <TB1> INFO: stop marker: 0
[08:35:46.675] <TB1> INFO: overflow: 0
[08:35:46.675] <TB1> INFO: invalid 5bit words: 0
[08:35:46.675] <TB1> INFO: invalid XOR eye diagram: 0
[08:35:46.675] <TB1> INFO: frame (failed synchr.): 0
[08:35:46.675] <TB1> INFO: idle data (no TBM trl): 0
[08:35:46.675] <TB1> INFO: no data (only TBM hdr): 0
[08:35:46.675] <TB1> INFO: TBM errors: 0
[08:35:46.675] <TB1> INFO: flawed TBM headers: 0
[08:35:46.675] <TB1> INFO: flawed TBM trailers: 0
[08:35:46.675] <TB1> INFO: event ID mismatches: 0
[08:35:46.675] <TB1> INFO: ROC errors: 0
[08:35:46.675] <TB1> INFO: missing ROC header(s): 0
[08:35:46.675] <TB1> INFO: misplaced readback start: 0
[08:35:46.675] <TB1> INFO: Pixel decoding errors: 0
[08:35:46.675] <TB1> INFO: pixel data incomplete: 0
[08:35:46.675] <TB1> INFO: pixel address: 0
[08:35:46.675] <TB1> INFO: pulse height fill bit: 0
[08:35:46.675] <TB1> INFO: buffer corruption: 0
[08:35:46.747] <TB1> INFO: ######################################################################
[08:35:46.747] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[08:35:46.747] <TB1> INFO: ######################################################################
[08:35:46.747] <TB1> INFO: ----------------------------------------------------------------------
[08:35:46.747] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[08:35:46.747] <TB1> INFO: ----------------------------------------------------------------------
[08:35:46.747] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[08:35:46.755] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[08:35:46.755] <TB1> INFO: run 1 of 1
[08:35:47.017] <TB1> INFO: Expecting 26208000 events.
[08:36:20.297] <TB1> INFO: 939250 events read in total (32724ms).
[08:36:53.200] <TB1> INFO: 1863750 events read in total (65627ms).
[08:37:25.782] <TB1> INFO: 2787850 events read in total (98209ms).
[08:37:58.166] <TB1> INFO: 3710550 events read in total (130593ms).
[08:38:31.027] <TB1> INFO: 4629550 events read in total (163454ms).
[08:39:04.101] <TB1> INFO: 5547650 events read in total (196528ms).
[08:39:36.907] <TB1> INFO: 6465100 events read in total (229334ms).
[08:40:09.321] <TB1> INFO: 7380600 events read in total (261748ms).
[08:40:41.661] <TB1> INFO: 8294750 events read in total (294088ms).
[08:41:14.325] <TB1> INFO: 9209800 events read in total (326752ms).
[08:41:47.587] <TB1> INFO: 10123300 events read in total (360014ms).
[08:42:20.655] <TB1> INFO: 11035700 events read in total (393082ms).
[08:42:53.599] <TB1> INFO: 11949500 events read in total (426026ms).
[08:43:27.066] <TB1> INFO: 12860000 events read in total (459493ms).
[08:44:00.068] <TB1> INFO: 13763250 events read in total (492495ms).
[08:44:33.096] <TB1> INFO: 14663800 events read in total (525523ms).
[08:45:05.837] <TB1> INFO: 15559700 events read in total (558264ms).
[08:45:38.138] <TB1> INFO: 16453850 events read in total (590565ms).
[08:46:10.941] <TB1> INFO: 17349000 events read in total (623368ms).
[08:46:43.493] <TB1> INFO: 18244400 events read in total (655920ms).
[08:47:15.977] <TB1> INFO: 19138000 events read in total (688404ms).
[08:47:48.588] <TB1> INFO: 20030950 events read in total (721015ms).
[08:48:21.157] <TB1> INFO: 20925400 events read in total (753584ms).
[08:48:53.281] <TB1> INFO: 21819700 events read in total (785708ms).
[08:49:25.685] <TB1> INFO: 22711800 events read in total (818112ms).
[08:49:57.938] <TB1> INFO: 23607050 events read in total (850365ms).
[08:50:30.346] <TB1> INFO: 24504100 events read in total (882773ms).
[08:51:03.257] <TB1> INFO: 25400800 events read in total (915684ms).
[08:51:32.374] <TB1> INFO: 26208000 events read in total (944801ms).
[08:51:32.404] <TB1> INFO: Test took 945649ms.
[08:51:32.663] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:51:34.256] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:51:35.822] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:51:37.305] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:51:38.741] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:51:40.156] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:51:41.663] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:51:43.172] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:51:44.607] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:51:46.076] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:51:47.492] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:51:48.929] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:51:50.415] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:51:51.857] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:51:53.327] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:51:55.037] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:51:56.670] <TB1> INFO: PixTestScurves::scurves() done
[08:51:56.670] <TB1> INFO: Vcal mean: 95.34 88.96 92.81 90.26 102.72 97.02 100.69 95.67 99.22 101.01 101.65 88.65 93.26 93.34 93.48 94.49
[08:51:56.670] <TB1> INFO: Vcal RMS: 6.11 4.83 5.13 4.66 5.47 5.87 5.39 5.76 5.75 5.62 5.68 5.54 5.14 5.07 5.43 4.90
[08:51:56.670] <TB1> INFO: PixTestScurves::fullTest() done, duration: 969 seconds
[08:51:56.670] <TB1> INFO: Decoding statistics:
[08:51:56.670] <TB1> INFO: General information:
[08:51:56.670] <TB1> INFO: 16bit words read: 0
[08:51:56.670] <TB1> INFO: valid events total: 0
[08:51:56.670] <TB1> INFO: empty events: 0
[08:51:56.670] <TB1> INFO: valid events with pixels: 0
[08:51:56.670] <TB1> INFO: valid pixel hits: 0
[08:51:56.670] <TB1> INFO: Event errors: 0
[08:51:56.670] <TB1> INFO: start marker: 0
[08:51:56.670] <TB1> INFO: stop marker: 0
[08:51:56.670] <TB1> INFO: overflow: 0
[08:51:56.670] <TB1> INFO: invalid 5bit words: 0
[08:51:56.670] <TB1> INFO: invalid XOR eye diagram: 0
[08:51:56.670] <TB1> INFO: frame (failed synchr.): 0
[08:51:56.671] <TB1> INFO: idle data (no TBM trl): 0
[08:51:56.671] <TB1> INFO: no data (only TBM hdr): 0
[08:51:56.671] <TB1> INFO: TBM errors: 0
[08:51:56.671] <TB1> INFO: flawed TBM headers: 0
[08:51:56.671] <TB1> INFO: flawed TBM trailers: 0
[08:51:56.671] <TB1> INFO: event ID mismatches: 0
[08:51:56.671] <TB1> INFO: ROC errors: 0
[08:51:56.671] <TB1> INFO: missing ROC header(s): 0
[08:51:56.671] <TB1> INFO: misplaced readback start: 0
[08:51:56.671] <TB1> INFO: Pixel decoding errors: 0
[08:51:56.671] <TB1> INFO: pixel data incomplete: 0
[08:51:56.671] <TB1> INFO: pixel address: 0
[08:51:56.671] <TB1> INFO: pulse height fill bit: 0
[08:51:56.671] <TB1> INFO: buffer corruption: 0
[08:51:56.752] <TB1> INFO: ######################################################################
[08:51:56.752] <TB1> INFO: PixTestTrim::doTest()
[08:51:56.752] <TB1> INFO: ######################################################################
[08:51:56.753] <TB1> INFO: ----------------------------------------------------------------------
[08:51:56.753] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[08:51:56.753] <TB1> INFO: ----------------------------------------------------------------------
[08:51:56.842] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[08:51:56.842] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[08:51:56.850] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[08:51:56.850] <TB1> INFO: run 1 of 1
[08:51:57.136] <TB1> INFO: Expecting 5025280 events.
[08:52:37.625] <TB1> INFO: 1093568 events read in total (39933ms).
[08:53:17.435] <TB1> INFO: 2177200 events read in total (79743ms).
[08:53:57.491] <TB1> INFO: 3260144 events read in total (119799ms).
[08:54:38.282] <TB1> INFO: 4348624 events read in total (160590ms).
[08:55:02.905] <TB1> INFO: 5025280 events read in total (185214ms).
[08:55:02.934] <TB1> INFO: Test took 186084ms.
[08:55:21.887] <TB1> INFO: ROC 0 VthrComp = 93
[08:55:21.888] <TB1> INFO: ROC 1 VthrComp = 93
[08:55:21.888] <TB1> INFO: ROC 2 VthrComp = 97
[08:55:21.888] <TB1> INFO: ROC 3 VthrComp = 91
[08:55:21.888] <TB1> INFO: ROC 4 VthrComp = 103
[08:55:21.888] <TB1> INFO: ROC 5 VthrComp = 95
[08:55:21.888] <TB1> INFO: ROC 6 VthrComp = 100
[08:55:21.888] <TB1> INFO: ROC 7 VthrComp = 96
[08:55:21.889] <TB1> INFO: ROC 8 VthrComp = 95
[08:55:21.889] <TB1> INFO: ROC 9 VthrComp = 96
[08:55:21.889] <TB1> INFO: ROC 10 VthrComp = 97
[08:55:21.889] <TB1> INFO: ROC 11 VthrComp = 87
[08:55:21.889] <TB1> INFO: ROC 12 VthrComp = 90
[08:55:21.889] <TB1> INFO: ROC 13 VthrComp = 96
[08:55:21.889] <TB1> INFO: ROC 14 VthrComp = 92
[08:55:21.889] <TB1> INFO: ROC 15 VthrComp = 92
[08:55:21.889] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[08:55:21.889] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[08:55:21.897] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[08:55:21.897] <TB1> INFO: run 1 of 1
[08:55:22.158] <TB1> INFO: Expecting 5025280 events.
[08:55:57.681] <TB1> INFO: 755488 events read in total (34965ms).
[08:56:32.875] <TB1> INFO: 1509648 events read in total (70159ms).
[08:57:07.787] <TB1> INFO: 2264192 events read in total (105071ms).
[08:57:42.614] <TB1> INFO: 3014344 events read in total (139898ms).
[08:58:18.415] <TB1> INFO: 3759016 events read in total (175699ms).
[08:58:53.140] <TB1> INFO: 4502144 events read in total (210424ms).
[08:59:18.182] <TB1> INFO: 5025280 events read in total (235466ms).
[08:59:18.229] <TB1> INFO: Test took 236332ms.
[08:59:43.239] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 60.2163 for pixel 0/55 mean/min/max = 46.1005/31.88/60.321
[08:59:43.240] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 55.5819 for pixel 34/1 mean/min/max = 44.7066/33.8012/55.6121
[08:59:43.240] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 56.6733 for pixel 20/0 mean/min/max = 44.6298/32.5594/56.7002
[08:59:43.240] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 56.8327 for pixel 11/7 mean/min/max = 45.4776/34.0851/56.8702
[08:59:43.240] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 56.2971 for pixel 42/78 mean/min/max = 44.2663/31.9203/56.6124
[08:59:43.241] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 58.775 for pixel 1/11 mean/min/max = 45.6152/32.3124/58.9181
[08:59:43.241] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 57.6209 for pixel 22/34 mean/min/max = 44.7049/31.7277/57.6822
[08:59:43.241] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 59.3161 for pixel 1/79 mean/min/max = 45.6405/31.942/59.339
[08:59:43.241] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 60.8515 for pixel 0/57 mean/min/max = 46.3054/31.7366/60.8742
[08:59:43.242] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 59.0767 for pixel 20/21 mean/min/max = 45.5633/32.0005/59.126
[08:59:43.242] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 60.1873 for pixel 6/79 mean/min/max = 46.1523/31.9867/60.3178
[08:59:43.242] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 57.998 for pixel 24/79 mean/min/max = 45.0948/32.0565/58.1331
[08:59:43.243] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 59.5849 for pixel 47/79 mean/min/max = 46.8599/33.9399/59.7799
[08:59:43.243] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 55.9395 for pixel 7/55 mean/min/max = 44.1622/32.2234/56.101
[08:59:43.243] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 59.1246 for pixel 15/79 mean/min/max = 46.4309/33.443/59.4188
[08:59:43.243] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 58.9691 for pixel 24/44 mean/min/max = 46.6667/34.2986/59.0347
[08:59:43.244] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:59:43.332] <TB1> INFO: Expecting 411648 events.
[08:59:53.767] <TB1> INFO: 411648 events read in total (9879ms).
[08:59:53.772] <TB1> INFO: Expecting 411648 events.
[09:00:04.182] <TB1> INFO: 411648 events read in total (9983ms).
[09:00:04.189] <TB1> INFO: Expecting 411648 events.
[09:00:14.628] <TB1> INFO: 411648 events read in total (10015ms).
[09:00:14.641] <TB1> INFO: Expecting 411648 events.
[09:00:24.984] <TB1> INFO: 411648 events read in total (9930ms).
[09:00:24.998] <TB1> INFO: Expecting 411648 events.
[09:00:35.433] <TB1> INFO: 411648 events read in total (10027ms).
[09:00:35.450] <TB1> INFO: Expecting 411648 events.
[09:00:45.877] <TB1> INFO: 411648 events read in total (10021ms).
[09:00:45.891] <TB1> INFO: Expecting 411648 events.
[09:00:56.307] <TB1> INFO: 411648 events read in total (9996ms).
[09:00:56.326] <TB1> INFO: Expecting 411648 events.
[09:01:06.635] <TB1> INFO: 411648 events read in total (9901ms).
[09:01:06.653] <TB1> INFO: Expecting 411648 events.
[09:01:16.987] <TB1> INFO: 411648 events read in total (9919ms).
[09:01:17.007] <TB1> INFO: Expecting 411648 events.
[09:01:27.351] <TB1> INFO: 411648 events read in total (9928ms).
[09:01:27.372] <TB1> INFO: Expecting 411648 events.
[09:01:37.680] <TB1> INFO: 411648 events read in total (9900ms).
[09:01:37.708] <TB1> INFO: Expecting 411648 events.
[09:01:48.007] <TB1> INFO: 411648 events read in total (9895ms).
[09:01:48.032] <TB1> INFO: Expecting 411648 events.
[09:01:58.344] <TB1> INFO: 411648 events read in total (9905ms).
[09:01:58.371] <TB1> INFO: Expecting 411648 events.
[09:02:08.718] <TB1> INFO: 411648 events read in total (9939ms).
[09:02:08.747] <TB1> INFO: Expecting 411648 events.
[09:02:19.078] <TB1> INFO: 411648 events read in total (9922ms).
[09:02:19.114] <TB1> INFO: Expecting 411648 events.
[09:02:29.505] <TB1> INFO: 411648 events read in total (9989ms).
[09:02:29.537] <TB1> INFO: Test took 166293ms.
[09:02:30.403] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[09:02:30.411] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[09:02:30.411] <TB1> INFO: run 1 of 1
[09:02:30.676] <TB1> INFO: Expecting 5025280 events.
[09:03:06.780] <TB1> INFO: 741224 events read in total (35548ms).
[09:03:42.212] <TB1> INFO: 1481768 events read in total (70980ms).
[09:04:17.598] <TB1> INFO: 2222280 events read in total (106366ms).
[09:04:52.256] <TB1> INFO: 2958480 events read in total (141024ms).
[09:05:27.101] <TB1> INFO: 3689072 events read in total (175869ms).
[09:06:02.254] <TB1> INFO: 4416920 events read in total (211022ms).
[09:06:31.357] <TB1> INFO: 5025280 events read in total (240125ms).
[09:06:31.402] <TB1> INFO: Test took 240991ms.
[09:06:54.974] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 10.717979 .. 255.000000
[09:06:55.053] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[09:06:55.061] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[09:06:55.061] <TB1> INFO: run 1 of 1
[09:06:55.329] <TB1> INFO: Expecting 8519680 events.
[09:07:30.400] <TB1> INFO: 712616 events read in total (34514ms).
[09:08:05.043] <TB1> INFO: 1425736 events read in total (69157ms).
[09:08:39.501] <TB1> INFO: 2138704 events read in total (103615ms).
[09:09:14.457] <TB1> INFO: 2851608 events read in total (138571ms).
[09:09:49.729] <TB1> INFO: 3564592 events read in total (173843ms).
[09:10:24.533] <TB1> INFO: 4277552 events read in total (208647ms).
[09:10:59.242] <TB1> INFO: 4990008 events read in total (243356ms).
[09:11:33.515] <TB1> INFO: 5701528 events read in total (277629ms).
[09:12:07.892] <TB1> INFO: 6412552 events read in total (312006ms).
[09:12:42.168] <TB1> INFO: 7123192 events read in total (346282ms).
[09:13:16.825] <TB1> INFO: 7833432 events read in total (380939ms).
[09:13:50.305] <TB1> INFO: 8519680 events read in total (414419ms).
[09:13:50.387] <TB1> INFO: Test took 415326ms.
[09:14:18.997] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 13.548790 .. 45.016828
[09:14:19.073] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 3 .. 55 (-1/-1) hits flags = 528 (plus default)
[09:14:19.081] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[09:14:19.081] <TB1> INFO: run 1 of 1
[09:14:19.341] <TB1> INFO: Expecting 1763840 events.
[09:14:58.352] <TB1> INFO: 949192 events read in total (38455ms).
[09:15:31.454] <TB1> INFO: 1763840 events read in total (71557ms).
[09:15:31.476] <TB1> INFO: Test took 72396ms.
[09:15:45.763] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 18.586377 .. 42.500025
[09:15:45.840] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 8 .. 52 (-1/-1) hits flags = 528 (plus default)
[09:15:45.848] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[09:15:45.848] <TB1> INFO: run 1 of 1
[09:15:46.123] <TB1> INFO: Expecting 1497600 events.
[09:16:25.177] <TB1> INFO: 949184 events read in total (38498ms).
[09:16:47.786] <TB1> INFO: 1497600 events read in total (61107ms).
[09:16:47.798] <TB1> INFO: Test took 61950ms.
[09:17:00.764] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 21.058160 .. 42.500025
[09:17:00.840] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 11 .. 52 (-1/-1) hits flags = 528 (plus default)
[09:17:00.849] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[09:17:00.849] <TB1> INFO: run 1 of 1
[09:17:01.109] <TB1> INFO: Expecting 1397760 events.
[09:17:40.159] <TB1> INFO: 930376 events read in total (38494ms).
[09:17:59.580] <TB1> INFO: 1397760 events read in total (57915ms).
[09:17:59.590] <TB1> INFO: Test took 58741ms.
[09:18:12.775] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[09:18:12.775] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[09:18:12.784] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[09:18:12.785] <TB1> INFO: run 1 of 1
[09:18:13.053] <TB1> INFO: Expecting 1364480 events.
[09:18:51.457] <TB1> INFO: 879120 events read in total (37848ms).
[09:19:12.391] <TB1> INFO: 1364480 events read in total (58782ms).
[09:19:12.402] <TB1> INFO: Test took 59617ms.
[09:19:25.896] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C0.dat
[09:19:25.900] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C1.dat
[09:19:25.904] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C2.dat
[09:19:25.908] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C3.dat
[09:19:25.911] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C4.dat
[09:19:25.915] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C5.dat
[09:19:25.919] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C6.dat
[09:19:25.923] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C7.dat
[09:19:25.926] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C8.dat
[09:19:25.930] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C9.dat
[09:19:25.934] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C10.dat
[09:19:25.938] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C11.dat
[09:19:25.941] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C12.dat
[09:19:25.945] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C13.dat
[09:19:25.949] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C14.dat
[09:19:25.953] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C15.dat
[09:19:25.957] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//trimParameters35_C0.dat
[09:19:25.969] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//trimParameters35_C1.dat
[09:19:25.981] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//trimParameters35_C2.dat
[09:19:25.993] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//trimParameters35_C3.dat
[09:19:26.002] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//trimParameters35_C4.dat
[09:19:26.048] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//trimParameters35_C5.dat
[09:19:26.059] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//trimParameters35_C6.dat
[09:19:26.071] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//trimParameters35_C7.dat
[09:19:26.084] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//trimParameters35_C8.dat
[09:19:26.095] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//trimParameters35_C9.dat
[09:19:26.106] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//trimParameters35_C10.dat
[09:19:26.120] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//trimParameters35_C11.dat
[09:19:26.134] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//trimParameters35_C12.dat
[09:19:26.145] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//trimParameters35_C13.dat
[09:19:26.159] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//trimParameters35_C14.dat
[09:19:26.173] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//trimParameters35_C15.dat
[09:19:26.185] <TB1> INFO: PixTestTrim::trimTest() done
[09:19:26.185] <TB1> INFO: vtrim: 96 94 92 93 93 94 100 94 101 89 102 91 89 89 89 96
[09:19:26.185] <TB1> INFO: vthrcomp: 93 93 97 91 103 95 100 96 95 96 97 87 90 96 92 92
[09:19:26.185] <TB1> INFO: vcal mean: 34.99 34.95 34.95 34.98 34.93 34.94 34.92 34.98 34.96 34.98 34.95 34.98 35.01 34.94 35.07 34.99
[09:19:26.185] <TB1> INFO: vcal RMS: 0.96 0.89 0.89 0.91 1.12 0.99 1.15 0.97 0.99 0.97 0.96 3.54 0.94 0.92 0.92 0.90
[09:19:26.185] <TB1> INFO: bits mean: 9.25 9.74 9.83 9.35 10.18 9.61 10.19 9.65 9.36 9.76 9.63 9.80 8.87 10.15 8.90 8.74
[09:19:26.185] <TB1> INFO: bits RMS: 2.80 2.38 2.58 2.55 2.53 2.64 2.49 2.67 2.79 2.58 2.64 2.65 2.66 2.46 2.75 2.68
[09:19:26.191] <TB1> INFO: ----------------------------------------------------------------------
[09:19:26.191] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[09:19:26.191] <TB1> INFO: ----------------------------------------------------------------------
[09:19:26.193] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[09:19:26.201] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[09:19:26.201] <TB1> INFO: run 1 of 1
[09:19:26.460] <TB1> INFO: Expecting 4160000 events.
[09:20:08.219] <TB1> INFO: 962310 events read in total (41202ms).
[09:20:49.649] <TB1> INFO: 1914185 events read in total (82632ms).
[09:21:31.151] <TB1> INFO: 2855470 events read in total (124134ms).
[09:22:12.130] <TB1> INFO: 3793935 events read in total (165113ms).
[09:22:28.658] <TB1> INFO: 4160000 events read in total (181641ms).
[09:22:28.692] <TB1> INFO: Test took 182491ms.
[09:22:56.716] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 173 (-1/-1) hits flags = 528 (plus default)
[09:22:56.724] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[09:22:56.724] <TB1> INFO: run 1 of 1
[09:22:56.985] <TB1> INFO: Expecting 3619200 events.
[09:23:40.302] <TB1> INFO: 984850 events read in total (42761ms).
[09:24:22.484] <TB1> INFO: 1958580 events read in total (84943ms).
[09:25:04.390] <TB1> INFO: 2920270 events read in total (126849ms).
[09:25:34.581] <TB1> INFO: 3619200 events read in total (157040ms).
[09:25:34.612] <TB1> INFO: Test took 157889ms.
[09:25:59.774] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 162 (-1/-1) hits flags = 528 (plus default)
[09:25:59.783] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[09:25:59.783] <TB1> INFO: run 1 of 1
[09:26:00.043] <TB1> INFO: Expecting 3390400 events.
[09:26:43.174] <TB1> INFO: 1017080 events read in total (42575ms).
[09:27:26.164] <TB1> INFO: 2019515 events read in total (85565ms).
[09:28:09.128] <TB1> INFO: 3010765 events read in total (128529ms).
[09:28:25.444] <TB1> INFO: 3390400 events read in total (144845ms).
[09:28:25.470] <TB1> INFO: Test took 145687ms.
[09:28:49.740] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 159 (-1/-1) hits flags = 528 (plus default)
[09:28:49.752] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[09:28:49.752] <TB1> INFO: run 1 of 1
[09:28:50.021] <TB1> INFO: Expecting 3328000 events.
[09:29:34.456] <TB1> INFO: 1026355 events read in total (43879ms).
[09:30:17.904] <TB1> INFO: 2037265 events read in total (87327ms).
[09:31:01.056] <TB1> INFO: 3037340 events read in total (130479ms).
[09:31:13.832] <TB1> INFO: 3328000 events read in total (143255ms).
[09:31:13.862] <TB1> INFO: Test took 144109ms.
[09:31:37.807] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 160 (-1/-1) hits flags = 528 (plus default)
[09:31:37.815] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[09:31:37.815] <TB1> INFO: run 1 of 1
[09:31:38.075] <TB1> INFO: Expecting 3348800 events.
[09:32:21.754] <TB1> INFO: 1022590 events read in total (43123ms).
[09:33:03.894] <TB1> INFO: 2029920 events read in total (85263ms).
[09:33:45.852] <TB1> INFO: 3026615 events read in total (127221ms).
[09:33:59.998] <TB1> INFO: 3348800 events read in total (141367ms).
[09:34:00.028] <TB1> INFO: Test took 142213ms.
[09:34:25.029] <TB1> INFO: PixTestTrim::trimBitTest() done
[09:34:25.031] <TB1> INFO: PixTestTrim::doTest() done, duration: 2548 seconds
[09:34:25.031] <TB1> INFO: Decoding statistics:
[09:34:25.031] <TB1> INFO: General information:
[09:34:25.031] <TB1> INFO: 16bit words read: 0
[09:34:25.031] <TB1> INFO: valid events total: 0
[09:34:25.031] <TB1> INFO: empty events: 0
[09:34:25.031] <TB1> INFO: valid events with pixels: 0
[09:34:25.031] <TB1> INFO: valid pixel hits: 0
[09:34:25.031] <TB1> INFO: Event errors: 0
[09:34:25.031] <TB1> INFO: start marker: 0
[09:34:25.031] <TB1> INFO: stop marker: 0
[09:34:25.031] <TB1> INFO: overflow: 0
[09:34:25.031] <TB1> INFO: invalid 5bit words: 0
[09:34:25.031] <TB1> INFO: invalid XOR eye diagram: 0
[09:34:25.031] <TB1> INFO: frame (failed synchr.): 0
[09:34:25.031] <TB1> INFO: idle data (no TBM trl): 0
[09:34:25.031] <TB1> INFO: no data (only TBM hdr): 0
[09:34:25.031] <TB1> INFO: TBM errors: 0
[09:34:25.031] <TB1> INFO: flawed TBM headers: 0
[09:34:25.031] <TB1> INFO: flawed TBM trailers: 0
[09:34:25.031] <TB1> INFO: event ID mismatches: 0
[09:34:25.031] <TB1> INFO: ROC errors: 0
[09:34:25.031] <TB1> INFO: missing ROC header(s): 0
[09:34:25.031] <TB1> INFO: misplaced readback start: 0
[09:34:25.031] <TB1> INFO: Pixel decoding errors: 0
[09:34:25.031] <TB1> INFO: pixel data incomplete: 0
[09:34:25.031] <TB1> INFO: pixel address: 0
[09:34:25.031] <TB1> INFO: pulse height fill bit: 0
[09:34:25.031] <TB1> INFO: buffer corruption: 0
[09:34:25.744] <TB1> INFO: ######################################################################
[09:34:25.744] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[09:34:25.744] <TB1> INFO: ######################################################################
[09:34:26.003] <TB1> INFO: Expecting 41600 events.
[09:34:29.737] <TB1> INFO: 41600 events read in total (3178ms).
[09:34:29.737] <TB1> INFO: Test took 3992ms.
[09:34:30.201] <TB1> INFO: Expecting 41600 events.
[09:34:33.968] <TB1> INFO: 41600 events read in total (3210ms).
[09:34:33.969] <TB1> INFO: Test took 4028ms.
[09:34:34.255] <TB1> INFO: Expecting 41600 events.
[09:34:38.088] <TB1> INFO: 41600 events read in total (3277ms).
[09:34:38.088] <TB1> INFO: Test took 4096ms.
[09:34:38.343] <TB1> INFO: Expecting 2560 events.
[09:34:39.197] <TB1> INFO: 2560 events read in total (298ms).
[09:34:39.197] <TB1> INFO: Test took 1096ms.
[09:34:39.502] <TB1> INFO: Expecting 2560 events.
[09:34:40.355] <TB1> INFO: 2560 events read in total (297ms).
[09:34:40.355] <TB1> INFO: Test took 1158ms.
[09:34:40.660] <TB1> INFO: Expecting 2560 events.
[09:34:41.512] <TB1> INFO: 2560 events read in total (296ms).
[09:34:41.513] <TB1> INFO: Test took 1158ms.
[09:34:41.818] <TB1> INFO: Expecting 2560 events.
[09:34:42.669] <TB1> INFO: 2560 events read in total (295ms).
[09:34:42.669] <TB1> INFO: Test took 1156ms.
[09:34:42.975] <TB1> INFO: Expecting 2560 events.
[09:34:43.826] <TB1> INFO: 2560 events read in total (295ms).
[09:34:43.826] <TB1> INFO: Test took 1156ms.
[09:34:44.131] <TB1> INFO: Expecting 2560 events.
[09:34:44.982] <TB1> INFO: 2560 events read in total (294ms).
[09:34:44.982] <TB1> INFO: Test took 1155ms.
[09:34:45.288] <TB1> INFO: Expecting 2560 events.
[09:34:46.140] <TB1> INFO: 2560 events read in total (296ms).
[09:34:46.141] <TB1> INFO: Test took 1158ms.
[09:34:46.446] <TB1> INFO: Expecting 2560 events.
[09:34:47.300] <TB1> INFO: 2560 events read in total (298ms).
[09:34:47.300] <TB1> INFO: Test took 1159ms.
[09:34:47.606] <TB1> INFO: Expecting 2560 events.
[09:34:48.457] <TB1> INFO: 2560 events read in total (295ms).
[09:34:48.457] <TB1> INFO: Test took 1156ms.
[09:34:48.762] <TB1> INFO: Expecting 2560 events.
[09:34:49.615] <TB1> INFO: 2560 events read in total (296ms).
[09:34:49.615] <TB1> INFO: Test took 1158ms.
[09:34:49.921] <TB1> INFO: Expecting 2560 events.
[09:34:50.773] <TB1> INFO: 2560 events read in total (296ms).
[09:34:50.773] <TB1> INFO: Test took 1156ms.
[09:34:51.078] <TB1> INFO: Expecting 2560 events.
[09:34:51.929] <TB1> INFO: 2560 events read in total (294ms).
[09:34:51.929] <TB1> INFO: Test took 1155ms.
[09:34:52.234] <TB1> INFO: Expecting 2560 events.
[09:34:53.085] <TB1> INFO: 2560 events read in total (295ms).
[09:34:53.085] <TB1> INFO: Test took 1155ms.
[09:34:53.391] <TB1> INFO: Expecting 2560 events.
[09:34:54.241] <TB1> INFO: 2560 events read in total (294ms).
[09:34:54.241] <TB1> INFO: Test took 1155ms.
[09:34:54.546] <TB1> INFO: Expecting 2560 events.
[09:34:55.398] <TB1> INFO: 2560 events read in total (296ms).
[09:34:55.398] <TB1> INFO: Test took 1157ms.
[09:34:55.703] <TB1> INFO: Expecting 2560 events.
[09:34:56.556] <TB1> INFO: 2560 events read in total (296ms).
[09:34:56.556] <TB1> INFO: Test took 1157ms.
[09:34:56.558] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:56.862] <TB1> INFO: Expecting 655360 events.
[09:35:13.534] <TB1> INFO: 655360 events read in total (16116ms).
[09:35:13.544] <TB1> INFO: Expecting 655360 events.
[09:35:29.994] <TB1> INFO: 655360 events read in total (16048ms).
[09:35:30.006] <TB1> INFO: Expecting 655360 events.
[09:35:46.334] <TB1> INFO: 655360 events read in total (15926ms).
[09:35:46.349] <TB1> INFO: Expecting 655360 events.
[09:36:02.673] <TB1> INFO: 655360 events read in total (15922ms).
[09:36:02.692] <TB1> INFO: Expecting 655360 events.
[09:36:19.086] <TB1> INFO: 655360 events read in total (15993ms).
[09:36:19.109] <TB1> INFO: Expecting 655360 events.
[09:36:35.488] <TB1> INFO: 655360 events read in total (15977ms).
[09:36:35.515] <TB1> INFO: Expecting 655360 events.
[09:36:52.086] <TB1> INFO: 655360 events read in total (16170ms).
[09:36:52.116] <TB1> INFO: Expecting 655360 events.
[09:37:08.595] <TB1> INFO: 655360 events read in total (16077ms).
[09:37:08.628] <TB1> INFO: Expecting 655360 events.
[09:37:25.101] <TB1> INFO: 655360 events read in total (16071ms).
[09:37:25.141] <TB1> INFO: Expecting 655360 events.
[09:37:41.596] <TB1> INFO: 655360 events read in total (16053ms).
[09:37:41.636] <TB1> INFO: Expecting 655360 events.
[09:37:58.079] <TB1> INFO: 655360 events read in total (16041ms).
[09:37:58.125] <TB1> INFO: Expecting 655360 events.
[09:38:14.610] <TB1> INFO: 655360 events read in total (16084ms).
[09:38:14.659] <TB1> INFO: Expecting 655360 events.
[09:38:31.188] <TB1> INFO: 655360 events read in total (16127ms).
[09:38:31.240] <TB1> INFO: Expecting 655360 events.
[09:38:47.758] <TB1> INFO: 655360 events read in total (16117ms).
[09:38:47.811] <TB1> INFO: Expecting 655360 events.
[09:39:04.322] <TB1> INFO: 655360 events read in total (16110ms).
[09:39:04.383] <TB1> INFO: Expecting 655360 events.
[09:39:20.824] <TB1> INFO: 655360 events read in total (16040ms).
[09:39:20.886] <TB1> INFO: Test took 264328ms.
[09:39:20.963] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:39:21.193] <TB1> INFO: Expecting 655360 events.
[09:39:37.771] <TB1> INFO: 655360 events read in total (16022ms).
[09:39:37.780] <TB1> INFO: Expecting 655360 events.
[09:39:54.229] <TB1> INFO: 655360 events read in total (16047ms).
[09:39:54.241] <TB1> INFO: Expecting 655360 events.
[09:40:10.794] <TB1> INFO: 655360 events read in total (16151ms).
[09:40:10.810] <TB1> INFO: Expecting 655360 events.
[09:40:27.247] <TB1> INFO: 655360 events read in total (16035ms).
[09:40:27.265] <TB1> INFO: Expecting 655360 events.
[09:40:43.697] <TB1> INFO: 655360 events read in total (16030ms).
[09:40:43.719] <TB1> INFO: Expecting 655360 events.
[09:41:00.251] <TB1> INFO: 655360 events read in total (16131ms).
[09:41:00.278] <TB1> INFO: Expecting 655360 events.
[09:41:16.669] <TB1> INFO: 655360 events read in total (15990ms).
[09:41:16.700] <TB1> INFO: Expecting 655360 events.
[09:41:33.301] <TB1> INFO: 655360 events read in total (16199ms).
[09:41:33.333] <TB1> INFO: Expecting 655360 events.
[09:41:49.940] <TB1> INFO: 655360 events read in total (16205ms).
[09:41:49.977] <TB1> INFO: Expecting 655360 events.
[09:42:06.497] <TB1> INFO: 655360 events read in total (16118ms).
[09:42:06.535] <TB1> INFO: Expecting 655360 events.
[09:42:23.074] <TB1> INFO: 655360 events read in total (16137ms).
[09:42:23.117] <TB1> INFO: Expecting 655360 events.
[09:42:39.716] <TB1> INFO: 655360 events read in total (16197ms).
[09:42:39.762] <TB1> INFO: Expecting 655360 events.
[09:42:56.307] <TB1> INFO: 655360 events read in total (16144ms).
[09:42:56.357] <TB1> INFO: Expecting 655360 events.
[09:43:12.865] <TB1> INFO: 655360 events read in total (16106ms).
[09:43:12.920] <TB1> INFO: Expecting 655360 events.
[09:43:29.428] <TB1> INFO: 655360 events read in total (16106ms).
[09:43:29.489] <TB1> INFO: Expecting 655360 events.
[09:43:45.985] <TB1> INFO: 655360 events read in total (16095ms).
[09:43:46.067] <TB1> INFO: Test took 265105ms.
[09:43:46.277] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:43:46.284] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:43:46.291] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:43:46.298] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:43:46.305] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:43:46.312] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:43:46.320] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:43:46.328] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[09:43:46.335] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[09:43:46.344] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:43:46.350] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:43:46.357] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[09:43:46.364] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[09:43:46.372] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[09:43:46.380] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:43:46.387] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:43:46.394] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:43:46.401] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:43:46.408] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:43:46.415] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:43:46.423] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:43:46.463] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C0.dat
[09:43:46.469] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C1.dat
[09:43:46.475] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C2.dat
[09:43:46.480] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C3.dat
[09:43:46.486] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C4.dat
[09:43:46.493] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C5.dat
[09:43:46.501] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C6.dat
[09:43:46.506] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C7.dat
[09:43:46.513] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C8.dat
[09:43:46.518] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C9.dat
[09:43:46.523] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C10.dat
[09:43:46.529] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C11.dat
[09:43:46.534] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C12.dat
[09:43:46.539] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C13.dat
[09:43:46.544] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C14.dat
[09:43:46.549] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//dacParameters35_C15.dat
[09:43:46.827] <TB1> INFO: Expecting 41600 events.
[09:43:50.287] <TB1> INFO: 41600 events read in total (2904ms).
[09:43:50.288] <TB1> INFO: Test took 3735ms.
[09:43:50.727] <TB1> INFO: Expecting 41600 events.
[09:43:54.220] <TB1> INFO: 41600 events read in total (2937ms).
[09:43:54.221] <TB1> INFO: Test took 3753ms.
[09:43:54.659] <TB1> INFO: Expecting 41600 events.
[09:43:58.117] <TB1> INFO: 41600 events read in total (2901ms).
[09:43:58.118] <TB1> INFO: Test took 3722ms.
[09:43:58.301] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:43:58.389] <TB1> INFO: Expecting 2560 events.
[09:43:59.243] <TB1> INFO: 2560 events read in total (298ms).
[09:43:59.243] <TB1> INFO: Test took 943ms.
[09:43:59.245] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:43:59.548] <TB1> INFO: Expecting 2560 events.
[09:44:00.403] <TB1> INFO: 2560 events read in total (298ms).
[09:44:00.403] <TB1> INFO: Test took 1158ms.
[09:44:00.405] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:00.709] <TB1> INFO: Expecting 2560 events.
[09:44:01.564] <TB1> INFO: 2560 events read in total (299ms).
[09:44:01.564] <TB1> INFO: Test took 1159ms.
[09:44:01.565] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:01.870] <TB1> INFO: Expecting 2560 events.
[09:44:02.723] <TB1> INFO: 2560 events read in total (297ms).
[09:44:02.723] <TB1> INFO: Test took 1158ms.
[09:44:02.724] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:03.028] <TB1> INFO: Expecting 2560 events.
[09:44:03.881] <TB1> INFO: 2560 events read in total (296ms).
[09:44:03.882] <TB1> INFO: Test took 1158ms.
[09:44:03.883] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:04.188] <TB1> INFO: Expecting 2560 events.
[09:44:05.042] <TB1> INFO: 2560 events read in total (298ms).
[09:44:05.043] <TB1> INFO: Test took 1160ms.
[09:44:05.044] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:05.348] <TB1> INFO: Expecting 2560 events.
[09:44:06.201] <TB1> INFO: 2560 events read in total (297ms).
[09:44:06.201] <TB1> INFO: Test took 1157ms.
[09:44:06.204] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:06.506] <TB1> INFO: Expecting 2560 events.
[09:44:07.368] <TB1> INFO: 2560 events read in total (305ms).
[09:44:07.368] <TB1> INFO: Test took 1164ms.
[09:44:07.370] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:07.674] <TB1> INFO: Expecting 2560 events.
[09:44:08.532] <TB1> INFO: 2560 events read in total (302ms).
[09:44:08.532] <TB1> INFO: Test took 1162ms.
[09:44:08.535] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:08.838] <TB1> INFO: Expecting 2560 events.
[09:44:09.694] <TB1> INFO: 2560 events read in total (299ms).
[09:44:09.694] <TB1> INFO: Test took 1160ms.
[09:44:09.697] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:10.000] <TB1> INFO: Expecting 2560 events.
[09:44:10.852] <TB1> INFO: 2560 events read in total (296ms).
[09:44:10.852] <TB1> INFO: Test took 1156ms.
[09:44:10.854] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:11.158] <TB1> INFO: Expecting 2560 events.
[09:44:12.010] <TB1> INFO: 2560 events read in total (296ms).
[09:44:12.011] <TB1> INFO: Test took 1157ms.
[09:44:12.012] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:12.316] <TB1> INFO: Expecting 2560 events.
[09:44:13.169] <TB1> INFO: 2560 events read in total (297ms).
[09:44:13.169] <TB1> INFO: Test took 1157ms.
[09:44:13.171] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:13.475] <TB1> INFO: Expecting 2560 events.
[09:44:14.328] <TB1> INFO: 2560 events read in total (297ms).
[09:44:14.328] <TB1> INFO: Test took 1157ms.
[09:44:14.330] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:14.634] <TB1> INFO: Expecting 2560 events.
[09:44:15.487] <TB1> INFO: 2560 events read in total (297ms).
[09:44:15.487] <TB1> INFO: Test took 1157ms.
[09:44:15.489] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:15.793] <TB1> INFO: Expecting 2560 events.
[09:44:16.646] <TB1> INFO: 2560 events read in total (297ms).
[09:44:16.646] <TB1> INFO: Test took 1157ms.
[09:44:16.648] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:16.952] <TB1> INFO: Expecting 2560 events.
[09:44:17.805] <TB1> INFO: 2560 events read in total (297ms).
[09:44:17.805] <TB1> INFO: Test took 1157ms.
[09:44:17.807] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:18.111] <TB1> INFO: Expecting 2560 events.
[09:44:18.965] <TB1> INFO: 2560 events read in total (298ms).
[09:44:18.965] <TB1> INFO: Test took 1158ms.
[09:44:18.967] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:19.271] <TB1> INFO: Expecting 2560 events.
[09:44:20.124] <TB1> INFO: 2560 events read in total (297ms).
[09:44:20.124] <TB1> INFO: Test took 1158ms.
[09:44:20.126] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:20.430] <TB1> INFO: Expecting 2560 events.
[09:44:21.283] <TB1> INFO: 2560 events read in total (297ms).
[09:44:21.283] <TB1> INFO: Test took 1157ms.
[09:44:21.284] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:21.589] <TB1> INFO: Expecting 2560 events.
[09:44:22.445] <TB1> INFO: 2560 events read in total (299ms).
[09:44:22.445] <TB1> INFO: Test took 1161ms.
[09:44:22.448] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:22.751] <TB1> INFO: Expecting 2560 events.
[09:44:23.606] <TB1> INFO: 2560 events read in total (299ms).
[09:44:23.606] <TB1> INFO: Test took 1158ms.
[09:44:23.609] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:23.912] <TB1> INFO: Expecting 2560 events.
[09:44:24.770] <TB1> INFO: 2560 events read in total (302ms).
[09:44:24.770] <TB1> INFO: Test took 1161ms.
[09:44:24.773] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:25.077] <TB1> INFO: Expecting 2560 events.
[09:44:25.933] <TB1> INFO: 2560 events read in total (300ms).
[09:44:25.934] <TB1> INFO: Test took 1161ms.
[09:44:25.936] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:26.240] <TB1> INFO: Expecting 2560 events.
[09:44:27.094] <TB1> INFO: 2560 events read in total (298ms).
[09:44:27.094] <TB1> INFO: Test took 1158ms.
[09:44:27.096] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:27.400] <TB1> INFO: Expecting 2560 events.
[09:44:28.251] <TB1> INFO: 2560 events read in total (295ms).
[09:44:28.252] <TB1> INFO: Test took 1156ms.
[09:44:28.253] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:28.558] <TB1> INFO: Expecting 2560 events.
[09:44:29.410] <TB1> INFO: 2560 events read in total (296ms).
[09:44:29.411] <TB1> INFO: Test took 1158ms.
[09:44:29.412] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:29.717] <TB1> INFO: Expecting 2560 events.
[09:44:30.569] <TB1> INFO: 2560 events read in total (296ms).
[09:44:30.569] <TB1> INFO: Test took 1157ms.
[09:44:30.571] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:30.875] <TB1> INFO: Expecting 2560 events.
[09:44:31.727] <TB1> INFO: 2560 events read in total (296ms).
[09:44:31.727] <TB1> INFO: Test took 1157ms.
[09:44:31.729] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:32.033] <TB1> INFO: Expecting 2560 events.
[09:44:32.885] <TB1> INFO: 2560 events read in total (296ms).
[09:44:32.885] <TB1> INFO: Test took 1156ms.
[09:44:32.887] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:33.191] <TB1> INFO: Expecting 2560 events.
[09:44:34.044] <TB1> INFO: 2560 events read in total (297ms).
[09:44:34.044] <TB1> INFO: Test took 1157ms.
[09:44:34.046] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:44:34.350] <TB1> INFO: Expecting 2560 events.
[09:44:35.202] <TB1> INFO: 2560 events read in total (296ms).
[09:44:35.202] <TB1> INFO: Test took 1156ms.
[09:44:35.655] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 609 seconds
[09:44:35.655] <TB1> INFO: PH scale (per ROC): 71 80 64 73 64 68 80 79 69 59 65 70 67 79 74 74
[09:44:35.655] <TB1> INFO: PH offset (per ROC): 189 169 178 179 189 187 170 160 176 181 171 191 184 171 183 159
[09:44:35.659] <TB1> INFO: Decoding statistics:
[09:44:35.659] <TB1> INFO: General information:
[09:44:35.659] <TB1> INFO: 16bit words read: 91928
[09:44:35.659] <TB1> INFO: valid events total: 10240
[09:44:35.659] <TB1> INFO: empty events: 7738
[09:44:35.659] <TB1> INFO: valid events with pixels: 2502
[09:44:35.659] <TB1> INFO: valid pixel hits: 2502
[09:44:35.659] <TB1> INFO: Event errors: 0
[09:44:35.659] <TB1> INFO: start marker: 0
[09:44:35.659] <TB1> INFO: stop marker: 0
[09:44:35.659] <TB1> INFO: overflow: 0
[09:44:35.659] <TB1> INFO: invalid 5bit words: 0
[09:44:35.659] <TB1> INFO: invalid XOR eye diagram: 0
[09:44:35.659] <TB1> INFO: frame (failed synchr.): 0
[09:44:35.659] <TB1> INFO: idle data (no TBM trl): 0
[09:44:35.659] <TB1> INFO: no data (only TBM hdr): 0
[09:44:35.659] <TB1> INFO: TBM errors: 0
[09:44:35.659] <TB1> INFO: flawed TBM headers: 0
[09:44:35.659] <TB1> INFO: flawed TBM trailers: 0
[09:44:35.659] <TB1> INFO: event ID mismatches: 0
[09:44:35.659] <TB1> INFO: ROC errors: 0
[09:44:35.659] <TB1> INFO: missing ROC header(s): 0
[09:44:35.659] <TB1> INFO: misplaced readback start: 0
[09:44:35.659] <TB1> INFO: Pixel decoding errors: 0
[09:44:35.659] <TB1> INFO: pixel data incomplete: 0
[09:44:35.659] <TB1> INFO: pixel address: 0
[09:44:35.659] <TB1> INFO: pulse height fill bit: 0
[09:44:35.659] <TB1> INFO: buffer corruption: 0
[09:44:35.843] <TB1> INFO: ######################################################################
[09:44:35.843] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[09:44:35.843] <TB1> INFO: ######################################################################
[09:44:35.852] <TB1> INFO: scanning low vcal = 10
[09:44:36.112] <TB1> INFO: Expecting 41600 events.
[09:44:39.662] <TB1> INFO: 41600 events read in total (2994ms).
[09:44:39.662] <TB1> INFO: Test took 3809ms.
[09:44:39.664] <TB1> INFO: scanning low vcal = 20
[09:44:39.967] <TB1> INFO: Expecting 41600 events.
[09:44:43.514] <TB1> INFO: 41600 events read in total (2991ms).
[09:44:43.514] <TB1> INFO: Test took 3850ms.
[09:44:43.515] <TB1> INFO: scanning low vcal = 30
[09:44:43.819] <TB1> INFO: Expecting 41600 events.
[09:44:47.356] <TB1> INFO: 41600 events read in total (2981ms).
[09:44:47.357] <TB1> INFO: Test took 3841ms.
[09:44:47.359] <TB1> INFO: scanning low vcal = 40
[09:44:47.653] <TB1> INFO: Expecting 41600 events.
[09:44:51.762] <TB1> INFO: 41600 events read in total (3553ms).
[09:44:51.763] <TB1> INFO: Test took 4404ms.
[09:44:51.765] <TB1> INFO: scanning low vcal = 50
[09:44:52.038] <TB1> INFO: Expecting 41600 events.
[09:44:56.214] <TB1> INFO: 41600 events read in total (3620ms).
[09:44:56.215] <TB1> INFO: Test took 4450ms.
[09:44:56.218] <TB1> INFO: scanning low vcal = 60
[09:44:56.479] <TB1> INFO: Expecting 41600 events.
[09:45:00.647] <TB1> INFO: 41600 events read in total (3612ms).
[09:45:00.648] <TB1> INFO: Test took 4430ms.
[09:45:00.650] <TB1> INFO: scanning low vcal = 70
[09:45:00.910] <TB1> INFO: Expecting 41600 events.
[09:45:05.081] <TB1> INFO: 41600 events read in total (3614ms).
[09:45:05.082] <TB1> INFO: Test took 4432ms.
[09:45:05.085] <TB1> INFO: scanning low vcal = 80
[09:45:05.350] <TB1> INFO: Expecting 41600 events.
[09:45:09.513] <TB1> INFO: 41600 events read in total (3607ms).
[09:45:09.513] <TB1> INFO: Test took 4428ms.
[09:45:09.516] <TB1> INFO: scanning low vcal = 90
[09:45:09.777] <TB1> INFO: Expecting 41600 events.
[09:45:13.959] <TB1> INFO: 41600 events read in total (3626ms).
[09:45:13.960] <TB1> INFO: Test took 4444ms.
[09:45:13.963] <TB1> INFO: scanning low vcal = 100
[09:45:14.228] <TB1> INFO: Expecting 41600 events.
[09:45:18.396] <TB1> INFO: 41600 events read in total (3612ms).
[09:45:18.396] <TB1> INFO: Test took 4433ms.
[09:45:18.399] <TB1> INFO: scanning low vcal = 110
[09:45:18.670] <TB1> INFO: Expecting 41600 events.
[09:45:22.853] <TB1> INFO: 41600 events read in total (3627ms).
[09:45:22.853] <TB1> INFO: Test took 4454ms.
[09:45:22.856] <TB1> INFO: scanning low vcal = 120
[09:45:23.117] <TB1> INFO: Expecting 41600 events.
[09:45:27.293] <TB1> INFO: 41600 events read in total (3619ms).
[09:45:27.294] <TB1> INFO: Test took 4438ms.
[09:45:27.296] <TB1> INFO: scanning low vcal = 130
[09:45:27.576] <TB1> INFO: Expecting 41600 events.
[09:45:31.791] <TB1> INFO: 41600 events read in total (3659ms).
[09:45:31.792] <TB1> INFO: Test took 4496ms.
[09:45:31.795] <TB1> INFO: scanning low vcal = 140
[09:45:32.090] <TB1> INFO: Expecting 41600 events.
[09:45:36.341] <TB1> INFO: 41600 events read in total (3695ms).
[09:45:36.341] <TB1> INFO: Test took 4546ms.
[09:45:36.344] <TB1> INFO: scanning low vcal = 150
[09:45:36.634] <TB1> INFO: Expecting 41600 events.
[09:45:40.824] <TB1> INFO: 41600 events read in total (3634ms).
[09:45:40.825] <TB1> INFO: Test took 4481ms.
[09:45:40.828] <TB1> INFO: scanning low vcal = 160
[09:45:41.090] <TB1> INFO: Expecting 41600 events.
[09:45:45.272] <TB1> INFO: 41600 events read in total (3626ms).
[09:45:45.272] <TB1> INFO: Test took 4444ms.
[09:45:45.275] <TB1> INFO: scanning low vcal = 170
[09:45:45.535] <TB1> INFO: Expecting 41600 events.
[09:45:49.731] <TB1> INFO: 41600 events read in total (3640ms).
[09:45:49.732] <TB1> INFO: Test took 4457ms.
[09:45:49.737] <TB1> INFO: scanning low vcal = 180
[09:45:50.000] <TB1> INFO: Expecting 41600 events.
[09:45:54.205] <TB1> INFO: 41600 events read in total (3648ms).
[09:45:54.206] <TB1> INFO: Test took 4469ms.
[09:45:54.208] <TB1> INFO: scanning low vcal = 190
[09:45:54.467] <TB1> INFO: Expecting 41600 events.
[09:45:58.673] <TB1> INFO: 41600 events read in total (3649ms).
[09:45:58.673] <TB1> INFO: Test took 4465ms.
[09:45:58.676] <TB1> INFO: scanning low vcal = 200
[09:45:58.939] <TB1> INFO: Expecting 41600 events.
[09:46:03.157] <TB1> INFO: 41600 events read in total (3662ms).
[09:46:03.157] <TB1> INFO: Test took 4481ms.
[09:46:03.159] <TB1> INFO: scanning low vcal = 210
[09:46:03.421] <TB1> INFO: Expecting 41600 events.
[09:46:07.618] <TB1> INFO: 41600 events read in total (3641ms).
[09:46:07.619] <TB1> INFO: Test took 4459ms.
[09:46:07.622] <TB1> INFO: scanning low vcal = 220
[09:46:07.911] <TB1> INFO: Expecting 41600 events.
[09:46:12.117] <TB1> INFO: 41600 events read in total (3649ms).
[09:46:12.117] <TB1> INFO: Test took 4495ms.
[09:46:12.120] <TB1> INFO: scanning low vcal = 230
[09:46:12.407] <TB1> INFO: Expecting 41600 events.
[09:46:16.595] <TB1> INFO: 41600 events read in total (3631ms).
[09:46:16.596] <TB1> INFO: Test took 4476ms.
[09:46:16.599] <TB1> INFO: scanning low vcal = 240
[09:46:16.865] <TB1> INFO: Expecting 41600 events.
[09:46:21.057] <TB1> INFO: 41600 events read in total (3636ms).
[09:46:21.058] <TB1> INFO: Test took 4459ms.
[09:46:21.060] <TB1> INFO: scanning low vcal = 250
[09:46:21.324] <TB1> INFO: Expecting 41600 events.
[09:46:25.557] <TB1> INFO: 41600 events read in total (3676ms).
[09:46:25.558] <TB1> INFO: Test took 4498ms.
[09:46:25.561] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[09:46:25.865] <TB1> INFO: Expecting 41600 events.
[09:46:30.044] <TB1> INFO: 41600 events read in total (3622ms).
[09:46:30.045] <TB1> INFO: Test took 4484ms.
[09:46:30.048] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[09:46:30.309] <TB1> INFO: Expecting 41600 events.
[09:46:34.483] <TB1> INFO: 41600 events read in total (3618ms).
[09:46:34.483] <TB1> INFO: Test took 4435ms.
[09:46:34.486] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[09:46:34.747] <TB1> INFO: Expecting 41600 events.
[09:46:38.952] <TB1> INFO: 41600 events read in total (3649ms).
[09:46:38.952] <TB1> INFO: Test took 4466ms.
[09:46:38.955] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[09:46:39.212] <TB1> INFO: Expecting 41600 events.
[09:46:43.415] <TB1> INFO: 41600 events read in total (3646ms).
[09:46:43.416] <TB1> INFO: Test took 4461ms.
[09:46:43.419] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[09:46:43.679] <TB1> INFO: Expecting 41600 events.
[09:46:47.864] <TB1> INFO: 41600 events read in total (3629ms).
[09:46:47.865] <TB1> INFO: Test took 4446ms.
[09:46:48.942] <TB1> INFO: PixTestGainPedestal::measure() done
[09:47:21.620] <TB1> INFO: PixTestGainPedestal::fit() done
[09:47:21.620] <TB1> INFO: non-linearity mean: 0.961 0.954 0.955 0.954 0.947 0.965 0.966 0.956 0.959 0.962 0.953 0.956 0.955 0.954 0.960 0.956
[09:47:21.620] <TB1> INFO: non-linearity RMS: 0.006 0.007 0.007 0.008 0.009 0.006 0.005 0.008 0.005 0.006 0.006 0.007 0.009 0.008 0.006 0.006
[09:47:21.621] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[09:47:21.660] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[09:47:21.706] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[09:47:21.746] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[09:47:21.782] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[09:47:21.827] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[09:47:21.890] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[09:47:21.927] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[09:47:21.963] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[09:47:21.999] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[09:47:22.035] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[09:47:22.071] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[09:47:22.107] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[09:47:22.145] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[09:47:22.182] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[09:47:22.219] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[09:47:22.256] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 166 seconds
[09:47:22.256] <TB1> INFO: Decoding statistics:
[09:47:22.256] <TB1> INFO: General information:
[09:47:22.256] <TB1> INFO: 16bit words read: 2662400
[09:47:22.256] <TB1> INFO: valid events total: 166400
[09:47:22.256] <TB1> INFO: empty events: 0
[09:47:22.256] <TB1> INFO: valid events with pixels: 166400
[09:47:22.256] <TB1> INFO: valid pixel hits: 665570
[09:47:22.256] <TB1> INFO: Event errors: 0
[09:47:22.256] <TB1> INFO: start marker: 0
[09:47:22.256] <TB1> INFO: stop marker: 0
[09:47:22.256] <TB1> INFO: overflow: 0
[09:47:22.256] <TB1> INFO: invalid 5bit words: 0
[09:47:22.256] <TB1> INFO: invalid XOR eye diagram: 0
[09:47:22.256] <TB1> INFO: frame (failed synchr.): 0
[09:47:22.256] <TB1> INFO: idle data (no TBM trl): 0
[09:47:22.256] <TB1> INFO: no data (only TBM hdr): 0
[09:47:22.256] <TB1> INFO: TBM errors: 0
[09:47:22.256] <TB1> INFO: flawed TBM headers: 0
[09:47:22.256] <TB1> INFO: flawed TBM trailers: 0
[09:47:22.256] <TB1> INFO: event ID mismatches: 0
[09:47:22.256] <TB1> INFO: ROC errors: 0
[09:47:22.256] <TB1> INFO: missing ROC header(s): 0
[09:47:22.256] <TB1> INFO: misplaced readback start: 0
[09:47:22.256] <TB1> INFO: Pixel decoding errors: 0
[09:47:22.256] <TB1> INFO: pixel data incomplete: 0
[09:47:22.256] <TB1> INFO: pixel address: 0
[09:47:22.256] <TB1> INFO: pulse height fill bit: 0
[09:47:22.256] <TB1> INFO: buffer corruption: 0
[09:47:22.263] <TB1> INFO: readReadbackCal: /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C0.dat .. /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C15.dat
[09:47:22.279] <TB1> INFO: ######################################################################
[09:47:22.279] <TB1> INFO: PixTestReadback::doTest()
[09:47:22.279] <TB1> INFO: ######################################################################
[09:47:22.279] <TB1> INFO: ----------------------------------------------------------------------
[09:47:22.279] <TB1> INFO: PixTestReadback::CalibrateVd()
[09:47:22.279] <TB1> INFO: ----------------------------------------------------------------------
[09:47:31.775] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C0.dat
[09:47:31.781] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C1.dat
[09:47:31.786] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C2.dat
[09:47:31.791] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C3.dat
[09:47:31.797] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C4.dat
[09:47:31.803] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C5.dat
[09:47:31.810] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C6.dat
[09:47:31.815] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C7.dat
[09:47:31.821] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C8.dat
[09:47:31.826] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C9.dat
[09:47:31.831] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C10.dat
[09:47:31.837] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C11.dat
[09:47:31.842] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C12.dat
[09:47:31.847] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C13.dat
[09:47:31.853] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C14.dat
[09:47:31.858] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C15.dat
[09:47:31.893] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[09:47:31.893] <TB1> INFO: ----------------------------------------------------------------------
[09:47:31.893] <TB1> INFO: PixTestReadback::CalibrateVa()
[09:47:31.893] <TB1> INFO: ----------------------------------------------------------------------
[09:47:41.394] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C0.dat
[09:47:41.401] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C1.dat
[09:47:41.406] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C2.dat
[09:47:41.411] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C3.dat
[09:47:41.416] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C4.dat
[09:47:41.423] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C5.dat
[09:47:41.428] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C6.dat
[09:47:41.433] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C7.dat
[09:47:41.438] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C8.dat
[09:47:41.445] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C9.dat
[09:47:41.450] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C10.dat
[09:47:41.456] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C11.dat
[09:47:41.461] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C12.dat
[09:47:41.466] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C13.dat
[09:47:41.471] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C14.dat
[09:47:41.476] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C15.dat
[09:47:41.506] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[09:47:41.506] <TB1> INFO: ----------------------------------------------------------------------
[09:47:41.506] <TB1> INFO: PixTestReadback::readbackVbg()
[09:47:41.506] <TB1> INFO: ----------------------------------------------------------------------
[09:47:48.790] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[09:47:48.790] <TB1> INFO: ----------------------------------------------------------------------
[09:47:48.790] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[09:47:48.791] <TB1> INFO: ----------------------------------------------------------------------
[09:47:48.791] <TB1> INFO: Vbg will be calibrated using Vd calibration
[09:47:48.791] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 161.2calibrated Vbg = 1.22847 :::*/*/*/*/
[09:47:48.791] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 157calibrated Vbg = 1.22271 :::*/*/*/*/
[09:47:48.791] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 149.8calibrated Vbg = 1.23078 :::*/*/*/*/
[09:47:48.791] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 151.2calibrated Vbg = 1.24854 :::*/*/*/*/
[09:47:48.791] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 157.2calibrated Vbg = 1.24026 :::*/*/*/*/
[09:47:48.791] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 154.1calibrated Vbg = 1.24955 :::*/*/*/*/
[09:47:48.791] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 149.2calibrated Vbg = 1.25042 :::*/*/*/*/
[09:47:48.791] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 154.2calibrated Vbg = 1.24646 :::*/*/*/*/
[09:47:48.791] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 153.5calibrated Vbg = 1.24925 :::*/*/*/*/
[09:47:48.791] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 157.4calibrated Vbg = 1.24923 :::*/*/*/*/
[09:47:48.791] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150.6calibrated Vbg = 1.24315 :::*/*/*/*/
[09:47:48.791] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 150.4calibrated Vbg = 1.24602 :::*/*/*/*/
[09:47:48.791] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 158.1calibrated Vbg = 1.23144 :::*/*/*/*/
[09:47:48.791] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 154.3calibrated Vbg = 1.23568 :::*/*/*/*/
[09:47:48.791] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 150.7calibrated Vbg = 1.23661 :::*/*/*/*/
[09:47:48.791] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 160.4calibrated Vbg = 1.23543 :::*/*/*/*/
[09:47:48.793] <TB1> INFO: ----------------------------------------------------------------------
[09:47:48.793] <TB1> INFO: PixTestReadback::CalibrateIa()
[09:47:48.793] <TB1> INFO: ----------------------------------------------------------------------
[09:50:23.959] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C0.dat
[09:50:23.965] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C1.dat
[09:50:23.971] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C2.dat
[09:50:23.977] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C3.dat
[09:50:23.982] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C4.dat
[09:50:23.987] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C5.dat
[09:50:23.993] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C6.dat
[09:50:23.998] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C7.dat
[09:50:24.003] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C8.dat
[09:50:24.008] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C9.dat
[09:50:24.013] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C10.dat
[09:50:24.018] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C11.dat
[09:50:24.022] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C12.dat
[09:50:24.026] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C13.dat
[09:50:24.031] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C14.dat
[09:50:24.039] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//002_FulltestPxar_p17//readbackCal_C15.dat
[09:50:24.066] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[09:50:24.068] <TB1> INFO: PixTestReadback::doTest() done
[09:50:24.069] <TB1> INFO: Decoding statistics:
[09:50:24.069] <TB1> INFO: General information:
[09:50:24.069] <TB1> INFO: 16bit words read: 1024
[09:50:24.069] <TB1> INFO: valid events total: 128
[09:50:24.069] <TB1> INFO: empty events: 128
[09:50:24.069] <TB1> INFO: valid events with pixels: 0
[09:50:24.069] <TB1> INFO: valid pixel hits: 0
[09:50:24.069] <TB1> INFO: Event errors: 0
[09:50:24.069] <TB1> INFO: start marker: 0
[09:50:24.069] <TB1> INFO: stop marker: 0
[09:50:24.069] <TB1> INFO: overflow: 0
[09:50:24.069] <TB1> INFO: invalid 5bit words: 0
[09:50:24.069] <TB1> INFO: invalid XOR eye diagram: 0
[09:50:24.069] <TB1> INFO: frame (failed synchr.): 0
[09:50:24.069] <TB1> INFO: idle data (no TBM trl): 0
[09:50:24.069] <TB1> INFO: no data (only TBM hdr): 0
[09:50:24.069] <TB1> INFO: TBM errors: 0
[09:50:24.069] <TB1> INFO: flawed TBM headers: 0
[09:50:24.069] <TB1> INFO: flawed TBM trailers: 0
[09:50:24.069] <TB1> INFO: event ID mismatches: 0
[09:50:24.069] <TB1> INFO: ROC errors: 0
[09:50:24.069] <TB1> INFO: missing ROC header(s): 0
[09:50:24.069] <TB1> INFO: misplaced readback start: 0
[09:50:24.069] <TB1> INFO: Pixel decoding errors: 0
[09:50:24.069] <TB1> INFO: pixel data incomplete: 0
[09:50:24.069] <TB1> INFO: pixel address: 0
[09:50:24.069] <TB1> INFO: pulse height fill bit: 0
[09:50:24.069] <TB1> INFO: buffer corruption: 0
[09:50:24.094] <TB1> INFO: Decoding statistics:
[09:50:24.094] <TB1> INFO: General information:
[09:50:24.094] <TB1> INFO: 16bit words read: 2755352
[09:50:24.094] <TB1> INFO: valid events total: 176768
[09:50:24.094] <TB1> INFO: empty events: 7866
[09:50:24.094] <TB1> INFO: valid events with pixels: 168902
[09:50:24.094] <TB1> INFO: valid pixel hits: 668072
[09:50:24.094] <TB1> INFO: Event errors: 0
[09:50:24.094] <TB1> INFO: start marker: 0
[09:50:24.094] <TB1> INFO: stop marker: 0
[09:50:24.094] <TB1> INFO: overflow: 0
[09:50:24.094] <TB1> INFO: invalid 5bit words: 0
[09:50:24.094] <TB1> INFO: invalid XOR eye diagram: 0
[09:50:24.094] <TB1> INFO: frame (failed synchr.): 0
[09:50:24.094] <TB1> INFO: idle data (no TBM trl): 0
[09:50:24.094] <TB1> INFO: no data (only TBM hdr): 0
[09:50:24.094] <TB1> INFO: TBM errors: 0
[09:50:24.094] <TB1> INFO: flawed TBM headers: 0
[09:50:24.094] <TB1> INFO: flawed TBM trailers: 0
[09:50:24.094] <TB1> INFO: event ID mismatches: 0
[09:50:24.094] <TB1> INFO: ROC errors: 0
[09:50:24.094] <TB1> INFO: missing ROC header(s): 0
[09:50:24.094] <TB1> INFO: misplaced readback start: 0
[09:50:24.094] <TB1> INFO: Pixel decoding errors: 0
[09:50:24.094] <TB1> INFO: pixel data incomplete: 0
[09:50:24.094] <TB1> INFO: pixel address: 0
[09:50:24.094] <TB1> INFO: pulse height fill bit: 0
[09:50:24.094] <TB1> INFO: buffer corruption: 0
[09:50:24.094] <TB1> INFO: enter test to run
[09:50:24.094] <TB1> INFO: test: exit no parameter change
[09:50:24.146] <TB1> QUIET: Connection to board 154 closed.
[09:50:24.226] <TB1> INFO: pXar: this is the end, my friend