[06:34:39.817] <TB1> INFO: *** Welcome to pxar ***
[06:34:39.817] <TB1> INFO: *** Today: 2016/06/08
[06:34:39.884] <TB1> INFO: *** Version: 9751-dirty
[06:34:39.884] <TB1> INFO: readRocDacs: /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C0.dat .. /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C15.dat
[06:34:39.901] <TB1> INFO: readTbmDacs: /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//tbmParameters_C0b.dat
[06:34:39.903] <TB1> INFO: readMaskFile: /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//defaultMaskFile.dat
[06:34:39.904] <TB1> INFO: readTrimFile: /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters_C0.dat .. /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters_C15.dat
[06:34:40.013] <TB1> INFO: clk: 4
[06:34:40.013] <TB1> INFO: ctr: 4
[06:34:40.013] <TB1> INFO: sda: 19
[06:34:40.013] <TB1> INFO: tin: 9
[06:34:40.013] <TB1> INFO: level: 15
[06:34:40.013] <TB1> INFO: triggerdelay: 0
[06:34:40.013] <TB1> QUIET: Instanciating API for pxar v2.7.5+40~g4fce89b
[06:34:40.013] <TB1> INFO: Log level: INFO
[06:34:40.020] <TB1> INFO: Found DTB DTB_WXC03A
[06:34:40.030] <TB1> QUIET: Connection to board DTB_WXC03A opened.
[06:34:40.032] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 154
HW version: DTB1.2
FW version: 4.4
SW version: 4.6
Options:
USB id: DTB_WXC03A
MAC address: 40D85511809A
Hostname: pixelDTB154
Comment:
------------------------------------------------------
[06:34:40.033] <TB1> INFO: RPC call hashes of host and DTB match: 484264910
[06:34:41.541] <TB1> INFO: DUT info:
[06:34:41.541] <TB1> INFO: The DUT currently contains the following objects:
[06:34:41.541] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[06:34:41.541] <TB1> INFO: TBM Core alpha (0): 7 registers set
[06:34:41.541] <TB1> INFO: TBM Core beta (1): 7 registers set
[06:34:41.541] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[06:34:41.541] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:41.541] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:41.541] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:41.541] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:41.541] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:41.541] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:41.541] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:41.541] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:41.541] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:41.541] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:41.541] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:41.541] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:41.541] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:41.541] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:41.541] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:41.541] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[06:34:41.944] <TB1> INFO: enter 'restricted' command line mode
[06:34:41.944] <TB1> INFO: enter test to run
[06:34:41.945] <TB1> INFO: test: pretest no parameter change
[06:34:41.945] <TB1> INFO: running: pretest
[06:34:41.953] <TB1> INFO: ----------------------------------------------------------------------
[06:34:41.953] <TB1> INFO: PixTestPretest::programROC()
[06:34:41.953] <TB1> INFO: ----------------------------------------------------------------------
[06:34:59.967] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[06:34:59.967] <TB1> INFO: IA differences per ROC: 19.3 20.9 22.5 19.3 21.7 20.9 19.3 22.5 21.7 20.1 20.1 22.5 20.1 19.3 20.1 21.7
[06:35:00.064] <TB1> INFO: enter test to run
[06:35:00.064] <TB1> INFO: test: pretest no parameter change
[06:35:00.064] <TB1> INFO: running: pretest
[06:35:00.065] <TB1> INFO: ----------------------------------------------------------------------
[06:35:00.065] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[06:35:00.065] <TB1> INFO: ----------------------------------------------------------------------
[06:35:07.159] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 383.5 mA = 23.9688 mA/ROC
[06:35:07.160] <TB1> INFO: i(loss) [mA/ROC]: 19.3 19.3 20.1 19.3 19.3 19.3 20.1 19.3 19.3 18.5 19.3 19.3 19.3 19.3 19.3 19.3
[06:35:07.195] <TB1> INFO: enter test to run
[06:35:07.195] <TB1> INFO: test: pretest no parameter change
[06:35:07.195] <TB1> INFO: running: pretest
[06:35:07.195] <TB1> INFO: ----------------------------------------------------------------------
[06:35:07.195] <TB1> INFO: PixTestPretest::findTiming()
[06:35:07.195] <TB1> INFO: ----------------------------------------------------------------------
[06:35:07.195] <TB1> INFO: PixTestCmd::init()

[06:36:36.448] <TB1> INFO: TBM phases: 160MHz: 7, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[06:36:36.448] <TB1> INFO: (success/tries = 100/100), width = 4
[06:36:36.449] <TB1> INFO: enter test to run
[06:36:36.449] <TB1> INFO: test: pretest no parameter change
[06:36:36.449] <TB1> INFO: running: pretest
[06:36:36.450] <TB1> INFO: ----------------------------------------------------------------------
[06:36:36.450] <TB1> INFO: PixTestPretest::findWorkingPixel()
[06:36:36.450] <TB1> INFO: ----------------------------------------------------------------------
[06:36:36.540] <TB1> INFO: Expecting 231680 events.


[06:36:46.739] <TB1> INFO: 231680 events read in total (9642ms).
[06:36:46.744] <TB1> INFO: Test took 10291ms.
[06:36:46.968] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[06:36:47.032] <TB1> INFO: enter test to run
[06:36:47.032] <TB1> INFO: test: pretest no parameter change
[06:36:47.032] <TB1> INFO: running: pretest
[06:36:47.034] <TB1> INFO: ----------------------------------------------------------------------
[06:36:47.034] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[06:36:47.034] <TB1> INFO: ----------------------------------------------------------------------
[06:36:47.127] <TB1> INFO: Expecting 231680 events.
[06:36:57.269] <TB1> INFO: 231680 events read in total (9586ms).
[06:36:57.273] <TB1> INFO: Test took 10235ms.
[06:36:57.511] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[06:36:57.511] <TB1> INFO: CalDel: 131 129 142 142 155 159 151 135 144 146 144 162 146 135 156 154
[06:36:57.511] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[06:36:57.543] <TB1> INFO: enter test to run
[06:36:57.543] <TB1> INFO: test: pretest no parameter change
[06:36:57.543] <TB1> INFO: running: pretest
[06:36:57.549] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C0.dat
[06:36:57.554] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C1.dat
[06:36:57.560] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C2.dat
[06:36:57.565] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C3.dat
[06:36:57.570] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C4.dat
[06:36:57.575] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C5.dat
[06:36:57.580] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C6.dat
[06:36:57.585] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C7.dat
[06:36:57.590] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C8.dat
[06:36:57.595] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C9.dat
[06:36:57.601] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C10.dat
[06:36:57.606] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C11.dat
[06:36:57.611] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C12.dat
[06:36:57.616] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C13.dat
[06:36:57.621] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C14.dat
[06:36:57.626] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters_C15.dat
[06:36:57.629] <TB1> INFO: enter test to run
[06:36:57.629] <TB1> INFO: test: fulltest no parameter change
[06:36:57.629] <TB1> INFO: running: fulltest
[06:36:57.629] <TB1> INFO: ######################################################################
[06:36:57.629] <TB1> INFO: PixTestFullTest::doTest()
[06:36:57.629] <TB1> INFO: ######################################################################
[06:36:57.630] <TB1> INFO: ######################################################################
[06:36:57.630] <TB1> INFO: PixTestAlive::doTest()
[06:36:57.630] <TB1> INFO: ######################################################################
[06:36:57.631] <TB1> INFO: ----------------------------------------------------------------------
[06:36:57.631] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[06:36:57.631] <TB1> INFO: ----------------------------------------------------------------------
[06:36:57.893] <TB1> INFO: Expecting 41600 events.
[06:37:01.741] <TB1> INFO: 41600 events read in total (3291ms).
[06:37:01.742] <TB1> INFO: Test took 4110ms.
[06:37:01.976] <TB1> INFO: PixTestAlive::aliveTest() done
[06:37:01.976] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[06:37:01.977] <TB1> INFO: ----------------------------------------------------------------------
[06:37:01.977] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[06:37:01.977] <TB1> INFO: ----------------------------------------------------------------------
[06:37:02.244] <TB1> INFO: Expecting 41600 events.
[06:37:05.228] <TB1> INFO: 41600 events read in total (2428ms).
[06:37:05.228] <TB1> INFO: Test took 3249ms.
[06:37:05.228] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[06:37:05.471] <TB1> INFO: PixTestAlive::maskTest() done
[06:37:05.471] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[06:37:05.474] <TB1> INFO: ----------------------------------------------------------------------
[06:37:05.474] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[06:37:05.474] <TB1> INFO: ----------------------------------------------------------------------
[06:37:05.738] <TB1> INFO: Expecting 41600 events.
[06:37:09.508] <TB1> INFO: 41600 events read in total (3214ms).
[06:37:09.509] <TB1> INFO: Test took 4033ms.
[06:37:09.741] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[06:37:09.741] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[06:37:09.741] <TB1> INFO: PixTestAlive::doTest() done, duration: 12 seconds
[06:37:09.741] <TB1> INFO: Decoding statistics:
[06:37:09.741] <TB1> INFO: General information:
[06:37:09.741] <TB1> INFO: 16bit words read: 0
[06:37:09.741] <TB1> INFO: valid events total: 0
[06:37:09.741] <TB1> INFO: empty events: 0
[06:37:09.741] <TB1> INFO: valid events with pixels: 0
[06:37:09.741] <TB1> INFO: valid pixel hits: 0
[06:37:09.741] <TB1> INFO: Event errors: 0
[06:37:09.741] <TB1> INFO: start marker: 0
[06:37:09.741] <TB1> INFO: stop marker: 0
[06:37:09.741] <TB1> INFO: overflow: 0
[06:37:09.741] <TB1> INFO: invalid 5bit words: 0
[06:37:09.741] <TB1> INFO: invalid XOR eye diagram: 0
[06:37:09.741] <TB1> INFO: frame (failed synchr.): 0
[06:37:09.741] <TB1> INFO: idle data (no TBM trl): 0
[06:37:09.741] <TB1> INFO: no data (only TBM hdr): 0
[06:37:09.741] <TB1> INFO: TBM errors: 0
[06:37:09.741] <TB1> INFO: flawed TBM headers: 0
[06:37:09.741] <TB1> INFO: flawed TBM trailers: 0
[06:37:09.741] <TB1> INFO: event ID mismatches: 0
[06:37:09.741] <TB1> INFO: ROC errors: 0
[06:37:09.741] <TB1> INFO: missing ROC header(s): 0
[06:37:09.741] <TB1> INFO: misplaced readback start: 0
[06:37:09.741] <TB1> INFO: Pixel decoding errors: 0
[06:37:09.741] <TB1> INFO: pixel data incomplete: 0
[06:37:09.741] <TB1> INFO: pixel address: 0
[06:37:09.741] <TB1> INFO: pulse height fill bit: 0
[06:37:09.741] <TB1> INFO: buffer corruption: 0
[06:37:09.749] <TB1> INFO: ######################################################################
[06:37:09.749] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[06:37:09.749] <TB1> INFO: ######################################################################
[06:37:09.751] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[06:37:09.764] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[06:37:09.764] <TB1> INFO: run 1 of 1
[06:37:10.059] <TB1> INFO: Expecting 3120000 events.
[06:37:51.370] <TB1> INFO: 864385 events read in total (40755ms).
[06:38:31.720] <TB1> INFO: 1717100 events read in total (81105ms).
[06:39:12.281] <TB1> INFO: 2580560 events read in total (121666ms).
[06:39:37.316] <TB1> INFO: 3120000 events read in total (146701ms).
[06:39:37.364] <TB1> INFO: Test took 147600ms.
[06:40:00.459] <TB1> INFO: PixTestBBMap::doTest() done, duration: 170 seconds
[06:40:00.459] <TB1> INFO: number of dead bumps (per ROC): 1 0 1 1 0 0 1 3 0 0 0 0 0 0 0 0
[06:40:00.459] <TB1> INFO: separation cut (per ROC): 85 77 91 82 98 88 93 88 91 95 97 80 87 102 86 88
[06:40:00.459] <TB1> INFO: Decoding statistics:
[06:40:00.459] <TB1> INFO: General information:
[06:40:00.459] <TB1> INFO: 16bit words read: 0
[06:40:00.459] <TB1> INFO: valid events total: 0
[06:40:00.459] <TB1> INFO: empty events: 0
[06:40:00.459] <TB1> INFO: valid events with pixels: 0
[06:40:00.459] <TB1> INFO: valid pixel hits: 0
[06:40:00.459] <TB1> INFO: Event errors: 0
[06:40:00.459] <TB1> INFO: start marker: 0
[06:40:00.459] <TB1> INFO: stop marker: 0
[06:40:00.459] <TB1> INFO: overflow: 0
[06:40:00.459] <TB1> INFO: invalid 5bit words: 0
[06:40:00.459] <TB1> INFO: invalid XOR eye diagram: 0
[06:40:00.459] <TB1> INFO: frame (failed synchr.): 0
[06:40:00.459] <TB1> INFO: idle data (no TBM trl): 0
[06:40:00.459] <TB1> INFO: no data (only TBM hdr): 0
[06:40:00.459] <TB1> INFO: TBM errors: 0
[06:40:00.460] <TB1> INFO: flawed TBM headers: 0
[06:40:00.460] <TB1> INFO: flawed TBM trailers: 0
[06:40:00.460] <TB1> INFO: event ID mismatches: 0
[06:40:00.460] <TB1> INFO: ROC errors: 0
[06:40:00.460] <TB1> INFO: missing ROC header(s): 0
[06:40:00.460] <TB1> INFO: misplaced readback start: 0
[06:40:00.460] <TB1> INFO: Pixel decoding errors: 0
[06:40:00.460] <TB1> INFO: pixel data incomplete: 0
[06:40:00.460] <TB1> INFO: pixel address: 0
[06:40:00.460] <TB1> INFO: pulse height fill bit: 0
[06:40:00.460] <TB1> INFO: buffer corruption: 0
[06:40:00.540] <TB1> INFO: ######################################################################
[06:40:00.540] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[06:40:00.540] <TB1> INFO: ######################################################################
[06:40:00.540] <TB1> INFO: ----------------------------------------------------------------------
[06:40:00.540] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[06:40:00.540] <TB1> INFO: ----------------------------------------------------------------------
[06:40:00.540] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[06:40:00.548] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[06:40:00.548] <TB1> INFO: run 1 of 1
[06:40:00.810] <TB1> INFO: Expecting 26208000 events.
[06:40:33.948] <TB1> INFO: 897400 events read in total (32582ms).
[06:41:06.669] <TB1> INFO: 1777250 events read in total (65304ms).
[06:41:39.342] <TB1> INFO: 2657750 events read in total (97976ms).
[06:42:12.086] <TB1> INFO: 3538100 events read in total (130720ms).
[06:42:44.733] <TB1> INFO: 4412850 events read in total (163367ms).
[06:43:17.357] <TB1> INFO: 5288850 events read in total (195991ms).
[06:43:49.833] <TB1> INFO: 6165550 events read in total (228467ms).
[06:44:22.713] <TB1> INFO: 7038950 events read in total (261347ms).
[06:44:55.211] <TB1> INFO: 7911850 events read in total (293845ms).
[06:45:28.240] <TB1> INFO: 8786350 events read in total (326874ms).
[06:46:01.208] <TB1> INFO: 9661200 events read in total (359842ms).
[06:46:33.957] <TB1> INFO: 10532250 events read in total (392591ms).
[06:47:06.419] <TB1> INFO: 11405300 events read in total (425053ms).
[06:47:39.387] <TB1> INFO: 12278800 events read in total (458021ms).
[06:48:11.964] <TB1> INFO: 13149700 events read in total (490598ms).
[06:48:44.653] <TB1> INFO: 14013050 events read in total (523287ms).
[06:49:17.866] <TB1> INFO: 14875750 events read in total (556500ms).
[06:49:49.807] <TB1> INFO: 15737150 events read in total (588441ms).
[06:50:22.352] <TB1> INFO: 16595500 events read in total (620986ms).
[06:50:54.629] <TB1> INFO: 17455300 events read in total (653263ms).
[06:51:26.826] <TB1> INFO: 18316350 events read in total (685460ms).
[06:51:59.186] <TB1> INFO: 19175200 events read in total (717820ms).
[06:52:31.233] <TB1> INFO: 20032750 events read in total (749867ms).
[06:53:04.188] <TB1> INFO: 20893250 events read in total (782822ms).
[06:53:36.818] <TB1> INFO: 21752900 events read in total (815452ms).
[06:54:09.065] <TB1> INFO: 22609900 events read in total (847699ms).
[06:54:42.113] <TB1> INFO: 23471250 events read in total (880747ms).
[06:55:14.327] <TB1> INFO: 24333550 events read in total (912961ms).
[06:55:47.281] <TB1> INFO: 25193450 events read in total (945915ms).
[06:56:20.170] <TB1> INFO: 26067050 events read in total (978804ms).
[06:56:25.596] <TB1> INFO: 26208000 events read in total (984230ms).
[06:56:25.623] <TB1> INFO: Test took 985075ms.
[06:56:25.882] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[06:56:27.354] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[06:56:28.840] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[06:56:30.249] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[06:56:31.782] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[06:56:33.222] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[06:56:34.690] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[06:56:36.142] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[06:56:37.645] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[06:56:39.167] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[06:56:40.616] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[06:56:42.111] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[06:56:43.620] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[06:56:45.115] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[06:56:46.586] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[06:56:48.098] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[06:56:49.645] <TB1> INFO: PixTestScurves::scurves() done
[06:56:49.645] <TB1> INFO: Vcal mean: 88.09 79.07 85.79 81.48 97.66 88.30 94.07 86.50 91.42 93.37 96.52 77.68 85.04 88.95 84.55 88.68
[06:56:49.645] <TB1> INFO: Vcal RMS: 6.11 4.01 4.93 4.14 5.50 5.68 5.57 5.48 5.85 5.70 6.06 4.65 5.02 5.44 5.16 5.07
[06:56:49.645] <TB1> INFO: PixTestScurves::fullTest() done, duration: 1009 seconds
[06:56:49.645] <TB1> INFO: Decoding statistics:
[06:56:49.645] <TB1> INFO: General information:
[06:56:49.646] <TB1> INFO: 16bit words read: 0
[06:56:49.646] <TB1> INFO: valid events total: 0
[06:56:49.646] <TB1> INFO: empty events: 0
[06:56:49.646] <TB1> INFO: valid events with pixels: 0
[06:56:49.646] <TB1> INFO: valid pixel hits: 0
[06:56:49.646] <TB1> INFO: Event errors: 0
[06:56:49.646] <TB1> INFO: start marker: 0
[06:56:49.646] <TB1> INFO: stop marker: 0
[06:56:49.646] <TB1> INFO: overflow: 0
[06:56:49.646] <TB1> INFO: invalid 5bit words: 0
[06:56:49.646] <TB1> INFO: invalid XOR eye diagram: 0
[06:56:49.646] <TB1> INFO: frame (failed synchr.): 0
[06:56:49.646] <TB1> INFO: idle data (no TBM trl): 0
[06:56:49.646] <TB1> INFO: no data (only TBM hdr): 0
[06:56:49.646] <TB1> INFO: TBM errors: 0
[06:56:49.646] <TB1> INFO: flawed TBM headers: 0
[06:56:49.646] <TB1> INFO: flawed TBM trailers: 0
[06:56:49.646] <TB1> INFO: event ID mismatches: 0
[06:56:49.646] <TB1> INFO: ROC errors: 0
[06:56:49.646] <TB1> INFO: missing ROC header(s): 0
[06:56:49.646] <TB1> INFO: misplaced readback start: 0
[06:56:49.646] <TB1> INFO: Pixel decoding errors: 0
[06:56:49.646] <TB1> INFO: pixel data incomplete: 0
[06:56:49.646] <TB1> INFO: pixel address: 0
[06:56:49.646] <TB1> INFO: pulse height fill bit: 0
[06:56:49.646] <TB1> INFO: buffer corruption: 0
[06:56:49.723] <TB1> INFO: ######################################################################
[06:56:49.723] <TB1> INFO: PixTestTrim::doTest()
[06:56:49.723] <TB1> INFO: ######################################################################
[06:56:49.724] <TB1> INFO: ----------------------------------------------------------------------
[06:56:49.724] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[06:56:49.724] <TB1> INFO: ----------------------------------------------------------------------
[06:56:49.803] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[06:56:49.803] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[06:56:49.811] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[06:56:49.811] <TB1> INFO: run 1 of 1
[06:56:50.072] <TB1> INFO: Expecting 5025280 events.
[06:57:30.938] <TB1> INFO: 1074632 events read in total (40310ms).
[06:58:11.058] <TB1> INFO: 2139232 events read in total (80430ms).
[06:58:51.050] <TB1> INFO: 3202352 events read in total (120422ms).
[06:59:31.650] <TB1> INFO: 4270464 events read in total (161022ms).
[07:00:01.088] <TB1> INFO: 5025280 events read in total (190460ms).
[07:00:01.118] <TB1> INFO: Test took 191307ms.
[07:00:21.863] <TB1> INFO: ROC 0 VthrComp = 88
[07:00:21.864] <TB1> INFO: ROC 1 VthrComp = 85
[07:00:21.864] <TB1> INFO: ROC 2 VthrComp = 94
[07:00:21.864] <TB1> INFO: ROC 3 VthrComp = 86
[07:00:21.864] <TB1> INFO: ROC 4 VthrComp = 101
[07:00:21.865] <TB1> INFO: ROC 5 VthrComp = 90
[07:00:21.865] <TB1> INFO: ROC 6 VthrComp = 96
[07:00:21.865] <TB1> INFO: ROC 7 VthrComp = 91
[07:00:21.865] <TB1> INFO: ROC 8 VthrComp = 91
[07:00:21.865] <TB1> INFO: ROC 9 VthrComp = 91
[07:00:21.865] <TB1> INFO: ROC 10 VthrComp = 94
[07:00:21.865] <TB1> INFO: ROC 11 VthrComp = 79
[07:00:21.865] <TB1> INFO: ROC 12 VthrComp = 86
[07:00:21.865] <TB1> INFO: ROC 13 VthrComp = 94
[07:00:21.865] <TB1> INFO: ROC 14 VthrComp = 87
[07:00:21.865] <TB1> INFO: ROC 15 VthrComp = 91
[07:00:21.865] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[07:00:21.865] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[07:00:21.873] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[07:00:21.873] <TB1> INFO: run 1 of 1
[07:00:22.137] <TB1> INFO: Expecting 5025280 events.
[07:00:58.947] <TB1> INFO: 754824 events read in total (36253ms).
[07:01:34.162] <TB1> INFO: 1508336 events read in total (71468ms).
[07:02:09.659] <TB1> INFO: 2262176 events read in total (106965ms).
[07:02:45.234] <TB1> INFO: 3012088 events read in total (142540ms).
[07:03:20.182] <TB1> INFO: 3757304 events read in total (177488ms).
[07:03:55.590] <TB1> INFO: 4501600 events read in total (212896ms).
[07:04:20.300] <TB1> INFO: 5025280 events read in total (237606ms).
[07:04:20.341] <TB1> INFO: Test took 238467ms.
[07:04:44.004] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 61.4073 for pixel 2/17 mean/min/max = 46.6877/31.9481/61.4274
[07:04:44.004] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 55.2211 for pixel 15/10 mean/min/max = 43.9744/32.1232/55.8256
[07:04:44.004] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 56.7344 for pixel 8/2 mean/min/max = 44.6086/32.3188/56.8983
[07:04:44.005] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 56.4506 for pixel 14/79 mean/min/max = 44.4254/32.3099/56.5409
[07:04:44.005] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 57.4617 for pixel 19/75 mean/min/max = 45.1557/32.7031/57.6083
[07:04:44.005] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 59.0201 for pixel 35/51 mean/min/max = 45.9963/32.8692/59.1235
[07:04:44.005] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 58.3927 for pixel 34/71 mean/min/max = 45.0535/31.7038/58.4031
[07:04:44.006] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 59.3839 for pixel 3/79 mean/min/max = 45.9218/32.3422/59.5014
[07:04:44.006] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 61.1288 for pixel 30/66 mean/min/max = 46.3812/31.5292/61.2331
[07:04:44.006] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 60.7082 for pixel 15/0 mean/min/max = 46.4903/32.2455/60.735
[07:04:44.006] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 61.6877 for pixel 0/16 mean/min/max = 46.9961/32.099/61.8932
[07:04:44.006] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 60.1125 for pixel 0/17 mean/min/max = 47.3711/34.458/60.2843
[07:04:44.007] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 59.0076 for pixel 24/2 mean/min/max = 45.9988/32.826/59.1715
[07:04:44.007] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 57.3089 for pixel 47/10 mean/min/max = 44.9389/32.5565/57.3213
[07:04:44.007] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 58.5311 for pixel 20/65 mean/min/max = 45.1788/31.6121/58.7456
[07:04:44.007] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 58.1087 for pixel 21/3 mean/min/max = 45.3627/32.2633/58.4622
[07:04:44.008] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:04:44.096] <TB1> INFO: Expecting 411648 events.
[07:04:54.612] <TB1> INFO: 411648 events read in total (9957ms).
[07:04:54.617] <TB1> INFO: Expecting 411648 events.
[07:05:04.952] <TB1> INFO: 411648 events read in total (9904ms).
[07:05:04.958] <TB1> INFO: Expecting 411648 events.
[07:05:15.301] <TB1> INFO: 411648 events read in total (9914ms).
[07:05:15.310] <TB1> INFO: Expecting 411648 events.
[07:05:25.679] <TB1> INFO: 411648 events read in total (9945ms).
[07:05:25.689] <TB1> INFO: Expecting 411648 events.
[07:05:36.150] <TB1> INFO: 411648 events read in total (10035ms).
[07:05:36.162] <TB1> INFO: Expecting 411648 events.
[07:05:46.605] <TB1> INFO: 411648 events read in total (10023ms).
[07:05:46.618] <TB1> INFO: Expecting 411648 events.
[07:05:57.030] <TB1> INFO: 411648 events read in total (9994ms).
[07:05:57.046] <TB1> INFO: Expecting 411648 events.
[07:06:07.352] <TB1> INFO: 411648 events read in total (9888ms).
[07:06:07.372] <TB1> INFO: Expecting 411648 events.
[07:06:17.773] <TB1> INFO: 411648 events read in total (9991ms).
[07:06:17.793] <TB1> INFO: Expecting 411648 events.
[07:06:28.057] <TB1> INFO: 411648 events read in total (9854ms).
[07:06:28.078] <TB1> INFO: Expecting 411648 events.
[07:06:38.359] <TB1> INFO: 411648 events read in total (9873ms).
[07:06:38.382] <TB1> INFO: Expecting 411648 events.
[07:06:48.791] <TB1> INFO: 411648 events read in total (9993ms).
[07:06:48.815] <TB1> INFO: Expecting 411648 events.
[07:06:59.122] <TB1> INFO: 411648 events read in total (9896ms).
[07:06:59.148] <TB1> INFO: Expecting 411648 events.
[07:07:09.599] <TB1> INFO: 411648 events read in total (10049ms).
[07:07:09.628] <TB1> INFO: Expecting 411648 events.
[07:07:20.091] <TB1> INFO: 411648 events read in total (10062ms).
[07:07:20.127] <TB1> INFO: Expecting 411648 events.
[07:07:30.531] <TB1> INFO: 411648 events read in total (10003ms).
[07:07:30.563] <TB1> INFO: Test took 166555ms.
[07:07:31.523] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[07:07:31.530] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[07:07:31.530] <TB1> INFO: run 1 of 1
[07:07:31.811] <TB1> INFO: Expecting 5025280 events.
[07:08:07.357] <TB1> INFO: 740872 events read in total (34990ms).
[07:08:42.312] <TB1> INFO: 1480848 events read in total (69945ms).
[07:09:17.321] <TB1> INFO: 2220840 events read in total (104954ms).
[07:09:52.600] <TB1> INFO: 2956904 events read in total (140233ms).
[07:10:27.518] <TB1> INFO: 3688008 events read in total (175151ms).
[07:11:02.814] <TB1> INFO: 4417032 events read in total (210447ms).
[07:11:31.984] <TB1> INFO: 5025280 events read in total (239617ms).
[07:11:32.034] <TB1> INFO: Test took 240503ms.
[07:11:55.527] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 5.141271 .. 255.000000
[07:11:55.604] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 5 .. 255 (-1/-1) hits flags = 528 (plus default)
[07:11:55.612] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[07:11:55.612] <TB1> INFO: run 1 of 1
[07:11:55.877] <TB1> INFO: Expecting 8353280 events.
[07:12:31.008] <TB1> INFO: 705960 events read in total (34575ms).
[07:13:05.855] <TB1> INFO: 1412096 events read in total (69422ms).
[07:13:40.787] <TB1> INFO: 2118136 events read in total (104354ms).
[07:14:15.416] <TB1> INFO: 2824224 events read in total (138983ms).
[07:14:50.005] <TB1> INFO: 3530432 events read in total (173572ms).
[07:15:24.554] <TB1> INFO: 4236536 events read in total (208121ms).
[07:15:59.296] <TB1> INFO: 4942248 events read in total (242863ms).
[07:16:34.003] <TB1> INFO: 5647304 events read in total (277570ms).
[07:17:08.449] <TB1> INFO: 6351616 events read in total (312016ms).
[07:17:43.287] <TB1> INFO: 7055696 events read in total (346854ms).
[07:18:18.268] <TB1> INFO: 7760184 events read in total (381836ms).
[07:18:47.206] <TB1> INFO: 8353280 events read in total (410773ms).
[07:18:47.310] <TB1> INFO: Test took 411698ms.
[07:19:16.352] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 15.223818 .. 53.419908
[07:19:16.428] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 5 .. 63 (-1/-1) hits flags = 528 (plus default)
[07:19:16.436] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[07:19:16.436] <TB1> INFO: run 1 of 1
[07:19:16.695] <TB1> INFO: Expecting 1963520 events.
[07:19:55.439] <TB1> INFO: 887640 events read in total (38188ms).
[07:20:33.017] <TB1> INFO: 1773936 events read in total (75766ms).
[07:20:41.576] <TB1> INFO: 1963520 events read in total (84326ms).
[07:20:41.596] <TB1> INFO: Test took 85161ms.
[07:20:56.073] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 18.231416 .. 53.419908
[07:20:56.148] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 8 .. 63 (-1/-1) hits flags = 528 (plus default)
[07:20:56.156] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[07:20:56.156] <TB1> INFO: run 1 of 1
[07:20:56.416] <TB1> INFO: Expecting 1863680 events.
[07:21:35.029] <TB1> INFO: 874736 events read in total (38057ms).
[07:22:13.147] <TB1> INFO: 1748408 events read in total (76175ms).
[07:22:18.482] <TB1> INFO: 1863680 events read in total (81510ms).
[07:22:18.503] <TB1> INFO: Test took 82348ms.
[07:22:34.411] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 21.963735 .. 53.419908
[07:22:34.504] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 11 .. 63 (-1/-1) hits flags = 528 (plus default)
[07:22:34.512] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[07:22:34.512] <TB1> INFO: run 1 of 1
[07:22:34.767] <TB1> INFO: Expecting 1763840 events.
[07:23:12.827] <TB1> INFO: 858384 events read in total (37503ms).
[07:23:50.544] <TB1> INFO: 1716560 events read in total (75220ms).
[07:23:52.914] <TB1> INFO: 1763840 events read in total (77591ms).
[07:23:52.930] <TB1> INFO: Test took 78419ms.
[07:24:07.509] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[07:24:07.509] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[07:24:07.517] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[07:24:07.517] <TB1> INFO: run 1 of 1
[07:24:07.778] <TB1> INFO: Expecting 1364480 events.
[07:24:46.397] <TB1> INFO: 878976 events read in total (38062ms).
[07:25:07.831] <TB1> INFO: 1364480 events read in total (59496ms).
[07:25:07.845] <TB1> INFO: Test took 60329ms.
[07:25:21.240] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C0.dat
[07:25:21.244] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C1.dat
[07:25:21.248] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C2.dat
[07:25:21.252] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C3.dat
[07:25:21.255] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C4.dat
[07:25:21.259] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C5.dat
[07:25:21.263] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C6.dat
[07:25:21.267] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C7.dat
[07:25:21.270] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C8.dat
[07:25:21.274] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C9.dat
[07:25:21.278] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C10.dat
[07:25:21.282] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C11.dat
[07:25:21.286] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C12.dat
[07:25:21.289] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C13.dat
[07:25:21.293] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C14.dat
[07:25:21.297] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C15.dat
[07:25:21.301] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C0.dat
[07:25:21.313] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C1.dat
[07:25:21.325] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C2.dat
[07:25:21.337] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C3.dat
[07:25:21.351] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C4.dat
[07:25:21.363] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C5.dat
[07:25:21.377] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C6.dat
[07:25:21.390] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C7.dat
[07:25:21.403] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C8.dat
[07:25:21.417] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C9.dat
[07:25:21.429] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C10.dat
[07:25:21.440] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C11.dat
[07:25:21.455] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C12.dat
[07:25:21.470] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C13.dat
[07:25:21.487] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C14.dat
[07:25:21.503] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//trimParameters35_C15.dat
[07:25:21.513] <TB1> INFO: PixTestTrim::trimTest() done
[07:25:21.513] <TB1> INFO: vtrim: 100 88 92 92 95 97 99 91 110 87 96 91 91 92 90 95
[07:25:21.514] <TB1> INFO: vthrcomp: 88 85 94 86 101 90 96 91 91 91 94 79 86 94 87 91
[07:25:21.514] <TB1> INFO: vcal mean: 35.00 34.96 34.97 34.97 34.95 34.92 34.95 34.96 35.00 34.96 34.97 35.01 34.97 34.93 34.99 34.97
[07:25:21.514] <TB1> INFO: vcal RMS: 0.94 0.88 0.90 0.91 0.95 0.97 1.01 0.91 1.00 0.95 0.97 0.89 1.07 0.89 0.93 0.88
[07:25:21.514] <TB1> INFO: bits mean: 9.13 9.87 9.68 9.84 9.67 9.52 9.93 9.27 9.65 9.24 8.81 8.51 9.42 9.80 9.72 9.24
[07:25:21.514] <TB1> INFO: bits RMS: 2.76 2.58 2.66 2.61 2.58 2.57 2.57 2.76 2.66 2.67 2.91 2.65 2.63 2.49 2.68 2.82
[07:25:21.519] <TB1> INFO: ----------------------------------------------------------------------
[07:25:21.519] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[07:25:21.519] <TB1> INFO: ----------------------------------------------------------------------
[07:25:21.522] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[07:25:21.530] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[07:25:21.530] <TB1> INFO: run 1 of 1
[07:25:21.802] <TB1> INFO: Expecting 4160000 events.
[07:26:03.486] <TB1> INFO: 924850 events read in total (41128ms).
[07:26:44.859] <TB1> INFO: 1843235 events read in total (82501ms).
[07:27:26.159] <TB1> INFO: 2754575 events read in total (123801ms).
[07:28:07.612] <TB1> INFO: 3663180 events read in total (165254ms).
[07:28:30.046] <TB1> INFO: 4160000 events read in total (187688ms).
[07:28:30.087] <TB1> INFO: Test took 188557ms.
[07:28:57.981] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 163 (-1/-1) hits flags = 528 (plus default)
[07:28:57.990] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[07:28:57.990] <TB1> INFO: run 1 of 1
[07:28:58.257] <TB1> INFO: Expecting 3411200 events.
[07:29:41.292] <TB1> INFO: 968145 events read in total (42479ms).
[07:30:23.896] <TB1> INFO: 1926315 events read in total (85083ms).
[07:31:05.101] <TB1> INFO: 2873540 events read in total (126288ms).
[07:31:28.816] <TB1> INFO: 3411200 events read in total (150003ms).
[07:31:28.853] <TB1> INFO: Test took 150863ms.
[07:31:53.287] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 151 (-1/-1) hits flags = 528 (plus default)
[07:31:53.295] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[07:31:53.295] <TB1> INFO: run 1 of 1
[07:31:53.555] <TB1> INFO: Expecting 3161600 events.
[07:32:36.943] <TB1> INFO: 1002985 events read in total (42832ms).
[07:33:19.525] <TB1> INFO: 1992270 events read in total (85414ms).
[07:34:02.052] <TB1> INFO: 2972785 events read in total (127942ms).
[07:34:10.369] <TB1> INFO: 3161600 events read in total (136258ms).
[07:34:10.398] <TB1> INFO: Test took 137103ms.
[07:34:34.442] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 151 (-1/-1) hits flags = 528 (plus default)
[07:34:34.450] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[07:34:34.450] <TB1> INFO: run 1 of 1
[07:34:34.710] <TB1> INFO: Expecting 3161600 events.
[07:35:18.653] <TB1> INFO: 1002370 events read in total (43387ms).
[07:36:01.564] <TB1> INFO: 1990980 events read in total (86298ms).
[07:36:43.593] <TB1> INFO: 2970680 events read in total (128327ms).
[07:36:52.113] <TB1> INFO: 3161600 events read in total (136847ms).
[07:36:52.145] <TB1> INFO: Test took 137694ms.
[07:37:14.723] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 151 (-1/-1) hits flags = 528 (plus default)
[07:37:14.735] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[07:37:14.735] <TB1> INFO: run 1 of 1
[07:37:15.006] <TB1> INFO: Expecting 3161600 events.
[07:37:58.251] <TB1> INFO: 1002015 events read in total (42689ms).
[07:38:41.136] <TB1> INFO: 1990075 events read in total (85574ms).
[07:39:23.364] <TB1> INFO: 2969225 events read in total (127802ms).
[07:39:31.826] <TB1> INFO: 3161600 events read in total (136264ms).
[07:39:31.856] <TB1> INFO: Test took 137121ms.
[07:39:55.414] <TB1> INFO: PixTestTrim::trimBitTest() done
[07:39:55.416] <TB1> INFO: PixTestTrim::doTest() done, duration: 2585 seconds
[07:39:55.416] <TB1> INFO: Decoding statistics:
[07:39:55.416] <TB1> INFO: General information:
[07:39:55.416] <TB1> INFO: 16bit words read: 0
[07:39:55.416] <TB1> INFO: valid events total: 0
[07:39:55.416] <TB1> INFO: empty events: 0
[07:39:55.416] <TB1> INFO: valid events with pixels: 0
[07:39:55.416] <TB1> INFO: valid pixel hits: 0
[07:39:55.416] <TB1> INFO: Event errors: 0
[07:39:55.416] <TB1> INFO: start marker: 0
[07:39:55.416] <TB1> INFO: stop marker: 0
[07:39:55.416] <TB1> INFO: overflow: 0
[07:39:55.416] <TB1> INFO: invalid 5bit words: 0
[07:39:55.416] <TB1> INFO: invalid XOR eye diagram: 0
[07:39:55.416] <TB1> INFO: frame (failed synchr.): 0
[07:39:55.416] <TB1> INFO: idle data (no TBM trl): 0
[07:39:55.416] <TB1> INFO: no data (only TBM hdr): 0
[07:39:55.416] <TB1> INFO: TBM errors: 0
[07:39:55.416] <TB1> INFO: flawed TBM headers: 0
[07:39:55.416] <TB1> INFO: flawed TBM trailers: 0
[07:39:55.416] <TB1> INFO: event ID mismatches: 0
[07:39:55.416] <TB1> INFO: ROC errors: 0
[07:39:55.416] <TB1> INFO: missing ROC header(s): 0
[07:39:55.416] <TB1> INFO: misplaced readback start: 0
[07:39:55.416] <TB1> INFO: Pixel decoding errors: 0
[07:39:55.416] <TB1> INFO: pixel data incomplete: 0
[07:39:55.416] <TB1> INFO: pixel address: 0
[07:39:55.416] <TB1> INFO: pulse height fill bit: 0
[07:39:55.416] <TB1> INFO: buffer corruption: 0
[07:39:56.083] <TB1> INFO: ######################################################################
[07:39:56.083] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[07:39:56.083] <TB1> INFO: ######################################################################
[07:39:56.345] <TB1> INFO: Expecting 41600 events.
[07:40:00.090] <TB1> INFO: 41600 events read in total (3189ms).
[07:40:00.091] <TB1> INFO: Test took 4007ms.
[07:40:00.565] <TB1> INFO: Expecting 41600 events.
[07:40:04.374] <TB1> INFO: 41600 events read in total (3253ms).
[07:40:04.375] <TB1> INFO: Test took 4081ms.
[07:40:04.693] <TB1> INFO: Expecting 41600 events.
[07:40:08.558] <TB1> INFO: 41600 events read in total (3309ms).
[07:40:08.559] <TB1> INFO: Test took 4163ms.
[07:40:08.814] <TB1> INFO: Expecting 2560 events.
[07:40:09.666] <TB1> INFO: 2560 events read in total (296ms).
[07:40:09.666] <TB1> INFO: Test took 1094ms.
[07:40:09.971] <TB1> INFO: Expecting 2560 events.
[07:40:10.825] <TB1> INFO: 2560 events read in total (297ms).
[07:40:10.825] <TB1> INFO: Test took 1158ms.
[07:40:11.131] <TB1> INFO: Expecting 2560 events.
[07:40:11.985] <TB1> INFO: 2560 events read in total (298ms).
[07:40:11.985] <TB1> INFO: Test took 1159ms.
[07:40:12.289] <TB1> INFO: Expecting 2560 events.
[07:40:13.141] <TB1> INFO: 2560 events read in total (296ms).
[07:40:13.141] <TB1> INFO: Test took 1156ms.
[07:40:13.446] <TB1> INFO: Expecting 2560 events.
[07:40:14.299] <TB1> INFO: 2560 events read in total (297ms).
[07:40:14.299] <TB1> INFO: Test took 1157ms.
[07:40:14.604] <TB1> INFO: Expecting 2560 events.
[07:40:15.456] <TB1> INFO: 2560 events read in total (296ms).
[07:40:15.456] <TB1> INFO: Test took 1156ms.
[07:40:15.761] <TB1> INFO: Expecting 2560 events.
[07:40:16.613] <TB1> INFO: 2560 events read in total (296ms).
[07:40:16.613] <TB1> INFO: Test took 1157ms.
[07:40:16.918] <TB1> INFO: Expecting 2560 events.
[07:40:17.772] <TB1> INFO: 2560 events read in total (298ms).
[07:40:17.772] <TB1> INFO: Test took 1158ms.
[07:40:18.077] <TB1> INFO: Expecting 2560 events.
[07:40:18.933] <TB1> INFO: 2560 events read in total (299ms).
[07:40:18.933] <TB1> INFO: Test took 1161ms.
[07:40:19.238] <TB1> INFO: Expecting 2560 events.
[07:40:20.090] <TB1> INFO: 2560 events read in total (296ms).
[07:40:20.090] <TB1> INFO: Test took 1157ms.
[07:40:20.395] <TB1> INFO: Expecting 2560 events.
[07:40:21.248] <TB1> INFO: 2560 events read in total (297ms).
[07:40:21.249] <TB1> INFO: Test took 1159ms.
[07:40:21.554] <TB1> INFO: Expecting 2560 events.
[07:40:22.405] <TB1> INFO: 2560 events read in total (295ms).
[07:40:22.405] <TB1> INFO: Test took 1156ms.
[07:40:22.710] <TB1> INFO: Expecting 2560 events.
[07:40:23.563] <TB1> INFO: 2560 events read in total (297ms).
[07:40:23.563] <TB1> INFO: Test took 1158ms.
[07:40:23.868] <TB1> INFO: Expecting 2560 events.
[07:40:24.721] <TB1> INFO: 2560 events read in total (297ms).
[07:40:24.721] <TB1> INFO: Test took 1158ms.
[07:40:25.026] <TB1> INFO: Expecting 2560 events.
[07:40:25.881] <TB1> INFO: 2560 events read in total (299ms).
[07:40:25.881] <TB1> INFO: Test took 1160ms.
[07:40:26.186] <TB1> INFO: Expecting 2560 events.
[07:40:27.043] <TB1> INFO: 2560 events read in total (300ms).
[07:40:27.043] <TB1> INFO: Test took 1161ms.
[07:40:27.046] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:40:27.349] <TB1> INFO: Expecting 655360 events.
[07:40:43.854] <TB1> INFO: 655360 events read in total (15949ms).
[07:40:43.863] <TB1> INFO: Expecting 655360 events.
[07:41:00.318] <TB1> INFO: 655360 events read in total (16053ms).
[07:41:00.331] <TB1> INFO: Expecting 655360 events.
[07:41:16.795] <TB1> INFO: 655360 events read in total (16062ms).
[07:41:16.811] <TB1> INFO: Expecting 655360 events.
[07:41:33.483] <TB1> INFO: 655360 events read in total (16271ms).
[07:41:33.502] <TB1> INFO: Expecting 655360 events.
[07:41:50.084] <TB1> INFO: 655360 events read in total (16180ms).
[07:41:50.113] <TB1> INFO: Expecting 655360 events.
[07:42:06.657] <TB1> INFO: 655360 events read in total (16143ms).
[07:42:06.684] <TB1> INFO: Expecting 655360 events.
[07:42:23.211] <TB1> INFO: 655360 events read in total (16126ms).
[07:42:23.241] <TB1> INFO: Expecting 655360 events.
[07:42:39.934] <TB1> INFO: 655360 events read in total (16291ms).
[07:42:39.969] <TB1> INFO: Expecting 655360 events.
[07:42:56.520] <TB1> INFO: 655360 events read in total (16149ms).
[07:42:56.557] <TB1> INFO: Expecting 655360 events.
[07:43:13.100] <TB1> INFO: 655360 events read in total (16141ms).
[07:43:13.141] <TB1> INFO: Expecting 655360 events.
[07:43:29.778] <TB1> INFO: 655360 events read in total (16235ms).
[07:43:29.821] <TB1> INFO: Expecting 655360 events.
[07:43:46.366] <TB1> INFO: 655360 events read in total (16143ms).
[07:43:46.411] <TB1> INFO: Expecting 655360 events.
[07:44:03.038] <TB1> INFO: 655360 events read in total (16225ms).
[07:44:03.087] <TB1> INFO: Expecting 655360 events.
[07:44:19.759] <TB1> INFO: 655360 events read in total (16270ms).
[07:44:19.816] <TB1> INFO: Expecting 655360 events.
[07:44:36.565] <TB1> INFO: 655360 events read in total (16347ms).
[07:44:36.620] <TB1> INFO: Expecting 655360 events.
[07:44:53.281] <TB1> INFO: 655360 events read in total (16260ms).
[07:44:53.340] <TB1> INFO: Test took 266295ms.
[07:44:53.414] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:44:53.645] <TB1> INFO: Expecting 655360 events.
[07:45:10.445] <TB1> INFO: 655360 events read in total (16244ms).
[07:45:10.453] <TB1> INFO: Expecting 655360 events.
[07:45:26.990] <TB1> INFO: 655360 events read in total (16135ms).
[07:45:27.002] <TB1> INFO: Expecting 655360 events.
[07:45:43.570] <TB1> INFO: 655360 events read in total (16166ms).
[07:45:43.585] <TB1> INFO: Expecting 655360 events.
[07:46:00.110] <TB1> INFO: 655360 events read in total (16123ms).
[07:46:00.130] <TB1> INFO: Expecting 655360 events.
[07:46:16.786] <TB1> INFO: 655360 events read in total (16254ms).
[07:46:16.809] <TB1> INFO: Expecting 655360 events.
[07:46:33.277] <TB1> INFO: 655360 events read in total (16066ms).
[07:46:33.305] <TB1> INFO: Expecting 655360 events.
[07:46:49.530] <TB1> INFO: 655360 events read in total (15824ms).
[07:46:49.559] <TB1> INFO: Expecting 655360 events.
[07:47:05.972] <TB1> INFO: 655360 events read in total (16011ms).
[07:47:06.005] <TB1> INFO: Expecting 655360 events.
[07:47:22.405] <TB1> INFO: 655360 events read in total (15999ms).
[07:47:22.440] <TB1> INFO: Expecting 655360 events.
[07:47:39.094] <TB1> INFO: 655360 events read in total (16252ms).
[07:47:39.143] <TB1> INFO: Expecting 655360 events.
[07:47:55.841] <TB1> INFO: 655360 events read in total (16296ms).
[07:47:55.884] <TB1> INFO: Expecting 655360 events.
[07:48:12.564] <TB1> INFO: 655360 events read in total (16278ms).
[07:48:12.619] <TB1> INFO: Expecting 655360 events.
[07:48:29.204] <TB1> INFO: 655360 events read in total (16184ms).
[07:48:29.256] <TB1> INFO: Expecting 655360 events.
[07:48:45.901] <TB1> INFO: 655360 events read in total (16244ms).
[07:48:45.955] <TB1> INFO: Expecting 655360 events.
[07:49:02.640] <TB1> INFO: 655360 events read in total (16283ms).
[07:49:02.710] <TB1> INFO: Expecting 655360 events.
[07:49:19.484] <TB1> INFO: 655360 events read in total (16372ms).
[07:49:19.544] <TB1> INFO: Test took 266130ms.
[07:49:19.732] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[07:49:19.739] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[07:49:19.745] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[07:49:19.752] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[07:49:19.758] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[07:49:19.765] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[07:49:19.771] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[07:49:19.778] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[07:49:19.785] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[07:49:19.791] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[07:49:19.798] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[07:49:19.804] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[07:49:19.811] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[07:49:19.818] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[07:49:19.824] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[07:49:19.831] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[07:49:19.837] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[07:49:19.844] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[07:49:19.850] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[07:49:19.931] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C0.dat
[07:49:19.937] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C1.dat
[07:49:19.942] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C2.dat
[07:49:19.947] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C3.dat
[07:49:19.954] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C4.dat
[07:49:19.960] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C5.dat
[07:49:19.965] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C6.dat
[07:49:19.970] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C7.dat
[07:49:19.975] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C8.dat
[07:49:19.983] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C9.dat
[07:49:19.988] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C10.dat
[07:49:19.994] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C11.dat
[07:49:19.999] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C12.dat
[07:49:20.005] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C13.dat
[07:49:20.011] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C14.dat
[07:49:20.016] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//dacParameters35_C15.dat
[07:49:20.285] <TB1> INFO: Expecting 41600 events.
[07:49:23.748] <TB1> INFO: 41600 events read in total (2906ms).
[07:49:23.749] <TB1> INFO: Test took 3728ms.
[07:49:24.185] <TB1> INFO: Expecting 41600 events.
[07:49:27.608] <TB1> INFO: 41600 events read in total (2866ms).
[07:49:27.609] <TB1> INFO: Test took 3683ms.
[07:49:28.054] <TB1> INFO: Expecting 41600 events.
[07:49:31.509] <TB1> INFO: 41600 events read in total (2899ms).
[07:49:31.510] <TB1> INFO: Test took 3724ms.
[07:49:31.692] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:31.780] <TB1> INFO: Expecting 2560 events.
[07:49:32.634] <TB1> INFO: 2560 events read in total (298ms).
[07:49:32.635] <TB1> INFO: Test took 943ms.
[07:49:32.637] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:32.941] <TB1> INFO: Expecting 2560 events.
[07:49:33.795] <TB1> INFO: 2560 events read in total (298ms).
[07:49:33.795] <TB1> INFO: Test took 1158ms.
[07:49:33.797] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:34.102] <TB1> INFO: Expecting 2560 events.
[07:49:34.960] <TB1> INFO: 2560 events read in total (301ms).
[07:49:34.961] <TB1> INFO: Test took 1164ms.
[07:49:34.963] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:35.267] <TB1> INFO: Expecting 2560 events.
[07:49:36.124] <TB1> INFO: 2560 events read in total (301ms).
[07:49:36.124] <TB1> INFO: Test took 1161ms.
[07:49:36.126] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:36.430] <TB1> INFO: Expecting 2560 events.
[07:49:37.283] <TB1> INFO: 2560 events read in total (297ms).
[07:49:37.284] <TB1> INFO: Test took 1158ms.
[07:49:37.286] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:37.589] <TB1> INFO: Expecting 2560 events.
[07:49:38.445] <TB1> INFO: 2560 events read in total (300ms).
[07:49:38.445] <TB1> INFO: Test took 1159ms.
[07:49:38.447] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:38.750] <TB1> INFO: Expecting 2560 events.
[07:49:39.603] <TB1> INFO: 2560 events read in total (296ms).
[07:49:39.604] <TB1> INFO: Test took 1157ms.
[07:49:39.605] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:39.909] <TB1> INFO: Expecting 2560 events.
[07:49:40.762] <TB1> INFO: 2560 events read in total (297ms).
[07:49:40.762] <TB1> INFO: Test took 1157ms.
[07:49:40.764] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:41.068] <TB1> INFO: Expecting 2560 events.
[07:49:41.922] <TB1> INFO: 2560 events read in total (299ms).
[07:49:41.923] <TB1> INFO: Test took 1159ms.
[07:49:41.925] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:42.228] <TB1> INFO: Expecting 2560 events.
[07:49:43.083] <TB1> INFO: 2560 events read in total (299ms).
[07:49:43.083] <TB1> INFO: Test took 1158ms.
[07:49:43.085] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:43.389] <TB1> INFO: Expecting 2560 events.
[07:49:44.241] <TB1> INFO: 2560 events read in total (296ms).
[07:49:44.241] <TB1> INFO: Test took 1156ms.
[07:49:44.243] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:44.547] <TB1> INFO: Expecting 2560 events.
[07:49:45.400] <TB1> INFO: 2560 events read in total (297ms).
[07:49:45.400] <TB1> INFO: Test took 1157ms.
[07:49:45.402] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:45.706] <TB1> INFO: Expecting 2560 events.
[07:49:46.561] <TB1> INFO: 2560 events read in total (299ms).
[07:49:46.561] <TB1> INFO: Test took 1159ms.
[07:49:46.563] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:46.869] <TB1> INFO: Expecting 2560 events.
[07:49:47.722] <TB1> INFO: 2560 events read in total (297ms).
[07:49:47.722] <TB1> INFO: Test took 1159ms.
[07:49:47.725] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:48.030] <TB1> INFO: Expecting 2560 events.
[07:49:48.890] <TB1> INFO: 2560 events read in total (304ms).
[07:49:48.891] <TB1> INFO: Test took 1167ms.
[07:49:48.894] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:49.197] <TB1> INFO: Expecting 2560 events.
[07:49:50.053] <TB1> INFO: 2560 events read in total (299ms).
[07:49:50.053] <TB1> INFO: Test took 1159ms.
[07:49:50.055] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:50.360] <TB1> INFO: Expecting 2560 events.
[07:49:51.214] <TB1> INFO: 2560 events read in total (297ms).
[07:49:51.215] <TB1> INFO: Test took 1160ms.
[07:49:51.217] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:51.521] <TB1> INFO: Expecting 2560 events.
[07:49:52.375] <TB1> INFO: 2560 events read in total (298ms).
[07:49:52.376] <TB1> INFO: Test took 1159ms.
[07:49:52.377] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:52.682] <TB1> INFO: Expecting 2560 events.
[07:49:53.536] <TB1> INFO: 2560 events read in total (298ms).
[07:49:53.537] <TB1> INFO: Test took 1160ms.
[07:49:53.539] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:53.842] <TB1> INFO: Expecting 2560 events.
[07:49:54.696] <TB1> INFO: 2560 events read in total (297ms).
[07:49:54.696] <TB1> INFO: Test took 1158ms.
[07:49:54.698] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:55.002] <TB1> INFO: Expecting 2560 events.
[07:49:55.861] <TB1> INFO: 2560 events read in total (303ms).
[07:49:55.861] <TB1> INFO: Test took 1163ms.
[07:49:55.864] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:56.166] <TB1> INFO: Expecting 2560 events.
[07:49:57.023] <TB1> INFO: 2560 events read in total (301ms).
[07:49:57.023] <TB1> INFO: Test took 1159ms.
[07:49:57.025] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:57.329] <TB1> INFO: Expecting 2560 events.
[07:49:58.184] <TB1> INFO: 2560 events read in total (299ms).
[07:49:58.184] <TB1> INFO: Test took 1159ms.
[07:49:58.187] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:58.490] <TB1> INFO: Expecting 2560 events.
[07:49:59.345] <TB1> INFO: 2560 events read in total (299ms).
[07:49:59.345] <TB1> INFO: Test took 1158ms.
[07:49:59.347] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:49:59.651] <TB1> INFO: Expecting 2560 events.
[07:50:00.505] <TB1> INFO: 2560 events read in total (298ms).
[07:50:00.505] <TB1> INFO: Test took 1159ms.
[07:50:00.508] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:50:00.811] <TB1> INFO: Expecting 2560 events.
[07:50:01.666] <TB1> INFO: 2560 events read in total (298ms).
[07:50:01.666] <TB1> INFO: Test took 1158ms.
[07:50:01.668] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:50:01.972] <TB1> INFO: Expecting 2560 events.
[07:50:02.827] <TB1> INFO: 2560 events read in total (299ms).
[07:50:02.827] <TB1> INFO: Test took 1159ms.
[07:50:02.829] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:50:03.133] <TB1> INFO: Expecting 2560 events.
[07:50:03.986] <TB1> INFO: 2560 events read in total (297ms).
[07:50:03.986] <TB1> INFO: Test took 1157ms.
[07:50:03.988] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:50:04.292] <TB1> INFO: Expecting 2560 events.
[07:50:05.150] <TB1> INFO: 2560 events read in total (301ms).
[07:50:05.150] <TB1> INFO: Test took 1162ms.
[07:50:05.153] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:50:05.457] <TB1> INFO: Expecting 2560 events.
[07:50:06.314] <TB1> INFO: 2560 events read in total (301ms).
[07:50:06.314] <TB1> INFO: Test took 1161ms.
[07:50:06.317] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:50:06.619] <TB1> INFO: Expecting 2560 events.
[07:50:07.480] <TB1> INFO: 2560 events read in total (305ms).
[07:50:07.480] <TB1> INFO: Test took 1163ms.
[07:50:07.483] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[07:50:07.786] <TB1> INFO: Expecting 2560 events.
[07:50:08.641] <TB1> INFO: 2560 events read in total (298ms).
[07:50:08.641] <TB1> INFO: Test took 1159ms.
[07:50:09.105] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 613 seconds
[07:50:09.106] <TB1> INFO: PH scale (per ROC): 80 91 73 83 76 77 92 91 80 68 78 80 80 90 82 81
[07:50:09.106] <TB1> INFO: PH offset (per ROC): 169 145 159 158 169 165 146 141 157 162 146 173 164 147 162 141
[07:50:09.115] <TB1> INFO: Decoding statistics:
[07:50:09.115] <TB1> INFO: General information:
[07:50:09.115] <TB1> INFO: 16bit words read: 91928
[07:50:09.116] <TB1> INFO: valid events total: 10240
[07:50:09.116] <TB1> INFO: empty events: 7738
[07:50:09.116] <TB1> INFO: valid events with pixels: 2502
[07:50:09.116] <TB1> INFO: valid pixel hits: 2502
[07:50:09.116] <TB1> INFO: Event errors: 0
[07:50:09.116] <TB1> INFO: start marker: 0
[07:50:09.116] <TB1> INFO: stop marker: 0
[07:50:09.116] <TB1> INFO: overflow: 0
[07:50:09.116] <TB1> INFO: invalid 5bit words: 0
[07:50:09.116] <TB1> INFO: invalid XOR eye diagram: 0
[07:50:09.116] <TB1> INFO: frame (failed synchr.): 0
[07:50:09.116] <TB1> INFO: idle data (no TBM trl): 0
[07:50:09.116] <TB1> INFO: no data (only TBM hdr): 0
[07:50:09.116] <TB1> INFO: TBM errors: 0
[07:50:09.116] <TB1> INFO: flawed TBM headers: 0
[07:50:09.116] <TB1> INFO: flawed TBM trailers: 0
[07:50:09.116] <TB1> INFO: event ID mismatches: 0
[07:50:09.116] <TB1> INFO: ROC errors: 0
[07:50:09.116] <TB1> INFO: missing ROC header(s): 0
[07:50:09.116] <TB1> INFO: misplaced readback start: 0
[07:50:09.116] <TB1> INFO: Pixel decoding errors: 0
[07:50:09.116] <TB1> INFO: pixel data incomplete: 0
[07:50:09.116] <TB1> INFO: pixel address: 0
[07:50:09.116] <TB1> INFO: pulse height fill bit: 0
[07:50:09.116] <TB1> INFO: buffer corruption: 0
[07:50:09.286] <TB1> INFO: ######################################################################
[07:50:09.286] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[07:50:09.286] <TB1> INFO: ######################################################################
[07:50:09.295] <TB1> INFO: scanning low vcal = 10
[07:50:09.589] <TB1> INFO: Expecting 41600 events.
[07:50:13.119] <TB1> INFO: 41600 events read in total (2974ms).
[07:50:13.120] <TB1> INFO: Test took 3824ms.
[07:50:13.121] <TB1> INFO: scanning low vcal = 20
[07:50:13.425] <TB1> INFO: Expecting 41600 events.
[07:50:16.959] <TB1> INFO: 41600 events read in total (2978ms).
[07:50:16.959] <TB1> INFO: Test took 3838ms.
[07:50:16.961] <TB1> INFO: scanning low vcal = 30
[07:50:17.264] <TB1> INFO: Expecting 41600 events.
[07:50:20.799] <TB1> INFO: 41600 events read in total (2979ms).
[07:50:20.800] <TB1> INFO: Test took 3839ms.
[07:50:20.801] <TB1> INFO: scanning low vcal = 40
[07:50:21.100] <TB1> INFO: Expecting 41600 events.
[07:50:25.220] <TB1> INFO: 41600 events read in total (3565ms).
[07:50:25.222] <TB1> INFO: Test took 4421ms.
[07:50:25.224] <TB1> INFO: scanning low vcal = 50
[07:50:25.505] <TB1> INFO: Expecting 41600 events.
[07:50:29.683] <TB1> INFO: 41600 events read in total (3622ms).
[07:50:29.684] <TB1> INFO: Test took 4460ms.
[07:50:29.687] <TB1> INFO: scanning low vcal = 60
[07:50:29.946] <TB1> INFO: Expecting 41600 events.
[07:50:34.186] <TB1> INFO: 41600 events read in total (3684ms).
[07:50:34.186] <TB1> INFO: Test took 4499ms.
[07:50:34.189] <TB1> INFO: scanning low vcal = 70
[07:50:34.457] <TB1> INFO: Expecting 41600 events.
[07:50:38.665] <TB1> INFO: 41600 events read in total (3651ms).
[07:50:38.666] <TB1> INFO: Test took 4477ms.
[07:50:38.669] <TB1> INFO: scanning low vcal = 80
[07:50:38.929] <TB1> INFO: Expecting 41600 events.
[07:50:43.181] <TB1> INFO: 41600 events read in total (3695ms).
[07:50:43.181] <TB1> INFO: Test took 4512ms.
[07:50:43.184] <TB1> INFO: scanning low vcal = 90
[07:50:43.466] <TB1> INFO: Expecting 41600 events.
[07:50:47.737] <TB1> INFO: 41600 events read in total (3714ms).
[07:50:47.738] <TB1> INFO: Test took 4554ms.
[07:50:47.740] <TB1> INFO: scanning low vcal = 100
[07:50:48.016] <TB1> INFO: Expecting 41600 events.
[07:50:52.206] <TB1> INFO: 41600 events read in total (3633ms).
[07:50:52.207] <TB1> INFO: Test took 4467ms.
[07:50:52.210] <TB1> INFO: scanning low vcal = 110
[07:50:52.470] <TB1> INFO: Expecting 41600 events.
[07:50:56.732] <TB1> INFO: 41600 events read in total (3706ms).
[07:50:56.732] <TB1> INFO: Test took 4522ms.
[07:50:56.735] <TB1> INFO: scanning low vcal = 120
[07:50:57.003] <TB1> INFO: Expecting 41600 events.
[07:51:01.245] <TB1> INFO: 41600 events read in total (3686ms).
[07:51:01.246] <TB1> INFO: Test took 4511ms.
[07:51:01.249] <TB1> INFO: scanning low vcal = 130
[07:51:01.507] <TB1> INFO: Expecting 41600 events.
[07:51:05.806] <TB1> INFO: 41600 events read in total (3743ms).
[07:51:05.806] <TB1> INFO: Test took 4557ms.
[07:51:05.809] <TB1> INFO: scanning low vcal = 140
[07:51:06.076] <TB1> INFO: Expecting 41600 events.
[07:51:10.346] <TB1> INFO: 41600 events read in total (3714ms).
[07:51:10.346] <TB1> INFO: Test took 4537ms.
[07:51:10.349] <TB1> INFO: scanning low vcal = 150
[07:51:10.605] <TB1> INFO: Expecting 41600 events.
[07:51:14.816] <TB1> INFO: 41600 events read in total (3654ms).
[07:51:14.817] <TB1> INFO: Test took 4468ms.
[07:51:14.820] <TB1> INFO: scanning low vcal = 160
[07:51:15.077] <TB1> INFO: Expecting 41600 events.
[07:51:19.313] <TB1> INFO: 41600 events read in total (3680ms).
[07:51:19.313] <TB1> INFO: Test took 4493ms.
[07:51:19.316] <TB1> INFO: scanning low vcal = 170
[07:51:19.576] <TB1> INFO: Expecting 41600 events.
[07:51:23.746] <TB1> INFO: 41600 events read in total (3614ms).
[07:51:23.747] <TB1> INFO: Test took 4431ms.
[07:51:23.750] <TB1> INFO: scanning low vcal = 180
[07:51:24.013] <TB1> INFO: Expecting 41600 events.
[07:51:28.254] <TB1> INFO: 41600 events read in total (3685ms).
[07:51:28.255] <TB1> INFO: Test took 4505ms.
[07:51:28.257] <TB1> INFO: scanning low vcal = 190
[07:51:28.515] <TB1> INFO: Expecting 41600 events.
[07:51:32.770] <TB1> INFO: 41600 events read in total (3698ms).
[07:51:32.781] <TB1> INFO: Test took 4524ms.
[07:51:32.784] <TB1> INFO: scanning low vcal = 200
[07:51:33.080] <TB1> INFO: Expecting 41600 events.
[07:51:37.238] <TB1> INFO: 41600 events read in total (3602ms).
[07:51:37.238] <TB1> INFO: Test took 4454ms.
[07:51:37.241] <TB1> INFO: scanning low vcal = 210
[07:51:37.533] <TB1> INFO: Expecting 41600 events.
[07:51:41.758] <TB1> INFO: 41600 events read in total (3669ms).
[07:51:41.758] <TB1> INFO: Test took 4517ms.
[07:51:41.761] <TB1> INFO: scanning low vcal = 220
[07:51:42.021] <TB1> INFO: Expecting 41600 events.
[07:51:46.248] <TB1> INFO: 41600 events read in total (3670ms).
[07:51:46.249] <TB1> INFO: Test took 4488ms.
[07:51:46.252] <TB1> INFO: scanning low vcal = 230
[07:51:46.520] <TB1> INFO: Expecting 41600 events.
[07:51:50.757] <TB1> INFO: 41600 events read in total (3681ms).
[07:51:50.757] <TB1> INFO: Test took 4505ms.
[07:51:50.760] <TB1> INFO: scanning low vcal = 240
[07:51:51.038] <TB1> INFO: Expecting 41600 events.
[07:51:55.264] <TB1> INFO: 41600 events read in total (3670ms).
[07:51:55.265] <TB1> INFO: Test took 4505ms.
[07:51:55.267] <TB1> INFO: scanning low vcal = 250
[07:51:55.560] <TB1> INFO: Expecting 41600 events.
[07:51:59.811] <TB1> INFO: 41600 events read in total (3694ms).
[07:51:59.812] <TB1> INFO: Test took 4544ms.
[07:51:59.816] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[07:52:00.076] <TB1> INFO: Expecting 41600 events.
[07:52:04.277] <TB1> INFO: 41600 events read in total (3644ms).
[07:52:04.277] <TB1> INFO: Test took 4461ms.
[07:52:04.280] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[07:52:04.539] <TB1> INFO: Expecting 41600 events.
[07:52:08.732] <TB1> INFO: 41600 events read in total (3637ms).
[07:52:08.733] <TB1> INFO: Test took 4453ms.
[07:52:08.736] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[07:52:08.993] <TB1> INFO: Expecting 41600 events.
[07:52:13.165] <TB1> INFO: 41600 events read in total (3615ms).
[07:52:13.166] <TB1> INFO: Test took 4430ms.
[07:52:13.169] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[07:52:13.427] <TB1> INFO: Expecting 41600 events.
[07:52:17.614] <TB1> INFO: 41600 events read in total (3631ms).
[07:52:17.615] <TB1> INFO: Test took 4446ms.
[07:52:17.617] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[07:52:17.876] <TB1> INFO: Expecting 41600 events.
[07:52:22.087] <TB1> INFO: 41600 events read in total (3655ms).
[07:52:22.088] <TB1> INFO: Test took 4471ms.
[07:52:23.148] <TB1> INFO: PixTestGainPedestal::measure() done
[07:52:54.265] <TB1> INFO: PixTestGainPedestal::fit() done
[07:52:54.265] <TB1> INFO: non-linearity mean: 0.958 0.950 0.952 0.954 0.954 0.959 0.961 0.955 0.962 0.963 0.954 0.956 0.963 0.952 0.956 0.958
[07:52:54.265] <TB1> INFO: non-linearity RMS: 0.005 0.006 0.006 0.007 0.006 0.006 0.006 0.007 0.004 0.005 0.006 0.006 0.006 0.007 0.006 0.004
[07:52:54.266] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[07:52:54.306] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[07:52:54.344] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[07:52:54.380] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[07:52:54.417] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[07:52:54.453] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[07:52:54.495] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[07:52:54.531] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[07:52:54.568] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[07:52:54.604] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[07:52:54.639] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[07:52:54.675] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[07:52:54.711] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[07:52:54.747] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[07:52:54.783] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[07:52:54.819] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[07:52:54.855] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 165 seconds
[07:52:54.855] <TB1> INFO: Decoding statistics:
[07:52:54.855] <TB1> INFO: General information:
[07:52:54.855] <TB1> INFO: 16bit words read: 2662400
[07:52:54.855] <TB1> INFO: valid events total: 166400
[07:52:54.855] <TB1> INFO: empty events: 0
[07:52:54.855] <TB1> INFO: valid events with pixels: 166400
[07:52:54.855] <TB1> INFO: valid pixel hits: 665570
[07:52:54.855] <TB1> INFO: Event errors: 0
[07:52:54.855] <TB1> INFO: start marker: 0
[07:52:54.855] <TB1> INFO: stop marker: 0
[07:52:54.855] <TB1> INFO: overflow: 0
[07:52:54.855] <TB1> INFO: invalid 5bit words: 0
[07:52:54.855] <TB1> INFO: invalid XOR eye diagram: 0
[07:52:54.855] <TB1> INFO: frame (failed synchr.): 0
[07:52:54.855] <TB1> INFO: idle data (no TBM trl): 0
[07:52:54.855] <TB1> INFO: no data (only TBM hdr): 0
[07:52:54.855] <TB1> INFO: TBM errors: 0
[07:52:54.855] <TB1> INFO: flawed TBM headers: 0
[07:52:54.855] <TB1> INFO: flawed TBM trailers: 0
[07:52:54.855] <TB1> INFO: event ID mismatches: 0
[07:52:54.855] <TB1> INFO: ROC errors: 0
[07:52:54.855] <TB1> INFO: missing ROC header(s): 0
[07:52:54.855] <TB1> INFO: misplaced readback start: 0
[07:52:54.855] <TB1> INFO: Pixel decoding errors: 0
[07:52:54.855] <TB1> INFO: pixel data incomplete: 0
[07:52:54.855] <TB1> INFO: pixel address: 0
[07:52:54.855] <TB1> INFO: pulse height fill bit: 0
[07:52:54.855] <TB1> INFO: buffer corruption: 0
[07:52:54.862] <TB1> INFO: readReadbackCal: /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C0.dat .. /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C15.dat
[07:52:54.873] <TB1> INFO: ######################################################################
[07:52:54.874] <TB1> INFO: PixTestReadback::doTest()
[07:52:54.874] <TB1> INFO: ######################################################################
[07:52:54.874] <TB1> INFO: ----------------------------------------------------------------------
[07:52:54.874] <TB1> INFO: PixTestReadback::CalibrateVd()
[07:52:54.874] <TB1> INFO: ----------------------------------------------------------------------
[07:53:04.414] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C0.dat
[07:53:04.446] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C1.dat
[07:53:04.466] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C2.dat
[07:53:04.471] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C3.dat
[07:53:04.476] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C4.dat
[07:53:04.482] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C5.dat
[07:53:04.487] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C6.dat
[07:53:04.492] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C7.dat
[07:53:04.497] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C8.dat
[07:53:04.502] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C9.dat
[07:53:04.508] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C10.dat
[07:53:04.513] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C11.dat
[07:53:04.519] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C12.dat
[07:53:04.525] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C13.dat
[07:53:04.530] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C14.dat
[07:53:04.535] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C15.dat
[07:53:04.565] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[07:53:04.565] <TB1> INFO: ----------------------------------------------------------------------
[07:53:04.565] <TB1> INFO: PixTestReadback::CalibrateVa()
[07:53:04.565] <TB1> INFO: ----------------------------------------------------------------------
[07:53:14.071] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C0.dat
[07:53:14.078] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C1.dat
[07:53:14.082] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C2.dat
[07:53:14.088] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C3.dat
[07:53:14.094] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C4.dat
[07:53:14.099] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C5.dat
[07:53:14.106] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C6.dat
[07:53:14.111] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C7.dat
[07:53:14.115] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C8.dat
[07:53:14.121] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C9.dat
[07:53:14.126] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C10.dat
[07:53:14.130] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C11.dat
[07:53:14.135] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C12.dat
[07:53:14.141] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C13.dat
[07:53:14.146] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C14.dat
[07:53:14.151] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C15.dat
[07:53:14.180] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[07:53:14.180] <TB1> INFO: ----------------------------------------------------------------------
[07:53:14.180] <TB1> INFO: PixTestReadback::readbackVbg()
[07:53:14.180] <TB1> INFO: ----------------------------------------------------------------------
[07:53:21.505] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[07:53:21.506] <TB1> INFO: ----------------------------------------------------------------------
[07:53:21.506] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[07:53:21.506] <TB1> INFO: ----------------------------------------------------------------------
[07:53:21.506] <TB1> INFO: Vbg will be calibrated using Vd calibration
[07:53:21.506] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 160.8calibrated Vbg = 1.20736 :::*/*/*/*/
[07:53:21.506] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 156.6calibrated Vbg = 1.19891 :::*/*/*/*/
[07:53:21.506] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 147.9calibrated Vbg = 1.207 :::*/*/*/*/
[07:53:21.506] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 150.1calibrated Vbg = 1.21985 :::*/*/*/*/
[07:53:21.506] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 156.7calibrated Vbg = 1.21524 :::*/*/*/*/
[07:53:21.506] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 153.4calibrated Vbg = 1.22386 :::*/*/*/*/
[07:53:21.506] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 147.9calibrated Vbg = 1.22208 :::*/*/*/*/
[07:53:21.506] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 153.1calibrated Vbg = 1.21976 :::*/*/*/*/
[07:53:21.506] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 152.5calibrated Vbg = 1.22159 :::*/*/*/*/
[07:53:21.507] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 156.5calibrated Vbg = 1.22345 :::*/*/*/*/
[07:53:21.507] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150calibrated Vbg = 1.21979 :::*/*/*/*/
[07:53:21.507] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 150calibrated Vbg = 1.22451 :::*/*/*/*/
[07:53:21.507] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 157.8calibrated Vbg = 1.20934 :::*/*/*/*/
[07:53:21.507] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 154.6calibrated Vbg = 1.2175 :::*/*/*/*/
[07:53:21.507] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 151.2calibrated Vbg = 1.22217 :::*/*/*/*/
[07:53:21.507] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 162.2calibrated Vbg = 1.21849 :::*/*/*/*/
[07:53:21.510] <TB1> INFO: ----------------------------------------------------------------------
[07:53:21.510] <TB1> INFO: PixTestReadback::CalibrateIa()
[07:53:21.510] <TB1> INFO: ----------------------------------------------------------------------
[07:55:56.993] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C0.dat
[07:55:56.998] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C1.dat
[07:55:57.003] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C2.dat
[07:55:57.008] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C3.dat
[07:55:57.013] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C4.dat
[07:55:57.018] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C5.dat
[07:55:57.023] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C6.dat
[07:55:57.028] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C7.dat
[07:55:57.033] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C8.dat
[07:55:57.038] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C9.dat
[07:55:57.045] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C10.dat
[07:55:57.050] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C11.dat
[07:55:57.055] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C12.dat
[07:55:57.060] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C13.dat
[07:55:57.065] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C14.dat
[07:55:57.070] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2242_FullQualification_2016-06-08_08h21m_1465366912//000_FulltestPxar_m20//readbackCal_C15.dat
[07:55:57.099] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[07:55:57.100] <TB1> INFO: PixTestReadback::doTest() done
[07:55:57.100] <TB1> INFO: Decoding statistics:
[07:55:57.100] <TB1> INFO: General information:
[07:55:57.100] <TB1> INFO: 16bit words read: 1024
[07:55:57.100] <TB1> INFO: valid events total: 128
[07:55:57.100] <TB1> INFO: empty events: 128
[07:55:57.100] <TB1> INFO: valid events with pixels: 0
[07:55:57.100] <TB1> INFO: valid pixel hits: 0
[07:55:57.100] <TB1> INFO: Event errors: 0
[07:55:57.100] <TB1> INFO: start marker: 0
[07:55:57.100] <TB1> INFO: stop marker: 0
[07:55:57.100] <TB1> INFO: overflow: 0
[07:55:57.100] <TB1> INFO: invalid 5bit words: 0
[07:55:57.100] <TB1> INFO: invalid XOR eye diagram: 0
[07:55:57.100] <TB1> INFO: frame (failed synchr.): 0
[07:55:57.100] <TB1> INFO: idle data (no TBM trl): 0
[07:55:57.100] <TB1> INFO: no data (only TBM hdr): 0
[07:55:57.100] <TB1> INFO: TBM errors: 0
[07:55:57.100] <TB1> INFO: flawed TBM headers: 0
[07:55:57.100] <TB1> INFO: flawed TBM trailers: 0
[07:55:57.100] <TB1> INFO: event ID mismatches: 0
[07:55:57.100] <TB1> INFO: ROC errors: 0
[07:55:57.100] <TB1> INFO: missing ROC header(s): 0
[07:55:57.100] <TB1> INFO: misplaced readback start: 0
[07:55:57.100] <TB1> INFO: Pixel decoding errors: 0
[07:55:57.100] <TB1> INFO: pixel data incomplete: 0
[07:55:57.100] <TB1> INFO: pixel address: 0
[07:55:57.100] <TB1> INFO: pulse height fill bit: 0
[07:55:57.100] <TB1> INFO: buffer corruption: 0
[07:55:57.117] <TB1> INFO: Decoding statistics:
[07:55:57.117] <TB1> INFO: General information:
[07:55:57.117] <TB1> INFO: 16bit words read: 2755352
[07:55:57.117] <TB1> INFO: valid events total: 176768
[07:55:57.117] <TB1> INFO: empty events: 7866
[07:55:57.117] <TB1> INFO: valid events with pixels: 168902
[07:55:57.117] <TB1> INFO: valid pixel hits: 668072
[07:55:57.117] <TB1> INFO: Event errors: 0
[07:55:57.117] <TB1> INFO: start marker: 0
[07:55:57.117] <TB1> INFO: stop marker: 0
[07:55:57.117] <TB1> INFO: overflow: 0
[07:55:57.117] <TB1> INFO: invalid 5bit words: 0
[07:55:57.117] <TB1> INFO: invalid XOR eye diagram: 0
[07:55:57.117] <TB1> INFO: frame (failed synchr.): 0
[07:55:57.117] <TB1> INFO: idle data (no TBM trl): 0
[07:55:57.117] <TB1> INFO: no data (only TBM hdr): 0
[07:55:57.117] <TB1> INFO: TBM errors: 0
[07:55:57.117] <TB1> INFO: flawed TBM headers: 0
[07:55:57.117] <TB1> INFO: flawed TBM trailers: 0
[07:55:57.117] <TB1> INFO: event ID mismatches: 0
[07:55:57.117] <TB1> INFO: ROC errors: 0
[07:55:57.117] <TB1> INFO: missing ROC header(s): 0
[07:55:57.117] <TB1> INFO: misplaced readback start: 0
[07:55:57.117] <TB1> INFO: Pixel decoding errors: 0
[07:55:57.117] <TB1> INFO: pixel data incomplete: 0
[07:55:57.117] <TB1> INFO: pixel address: 0
[07:55:57.117] <TB1> INFO: pulse height fill bit: 0
[07:55:57.117] <TB1> INFO: buffer corruption: 0
[07:55:57.117] <TB1> INFO: enter test to run
[07:55:57.117] <TB1> INFO: test: exit no parameter change
[07:55:57.205] <TB1> QUIET: Connection to board 154 closed.
[07:55:57.285] <TB1> INFO: pXar: this is the end, my friend