[09:36:01.063] <TB3> INFO: *** Welcome to pxar ***
[09:36:01.063] <TB3> INFO: *** Today: 2016/03/23
[09:36:01.098] <TB3> INFO: *** Version: 9751-dirty
[09:36:01.098] <TB3> INFO: readRocDacs: /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C0.dat .. /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C15.dat
[09:36:01.114] <TB3> INFO: readTbmDacs: /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//tbmParameters_C0a.dat .. /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//tbmParameters_C0b.dat
[09:36:01.116] <TB3> INFO: readMaskFile: /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//defaultMaskFile.dat
[09:36:01.117] <TB3> INFO: readTrimFile: /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters_C0.dat .. /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters_C15.dat
[09:36:01.236] <TB3> INFO: clk: 4
[09:36:01.236] <TB3> INFO: ctr: 4
[09:36:01.236] <TB3> INFO: sda: 19
[09:36:01.236] <TB3> INFO: tin: 9
[09:36:01.236] <TB3> INFO: level: 15
[09:36:01.236] <TB3> INFO: triggerdelay: 0
[09:36:01.236] <TB3> QUIET: Instanciating API for pxar v2.7.5+40~g4fce89b
[09:36:01.236] <TB3> INFO: Log level: INFO
[09:36:01.243] <TB3> INFO: Found DTB DTB_WWVASW
[09:36:01.252] <TB3> QUIET: Connection to board DTB_WWVASW opened.
[09:36:01.254] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.4
SW version: 4.6
Options:
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[09:36:01.256] <TB3> INFO: RPC call hashes of host and DTB match: 484264910
[09:36:02.783] <TB3> INFO: DUT info:
[09:36:02.783] <TB3> INFO: The DUT currently contains the following objects:
[09:36:02.783] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[09:36:02.783] <TB3> INFO: TBM Core alpha (0): 7 registers set
[09:36:02.783] <TB3> INFO: TBM Core beta (1): 7 registers set
[09:36:02.783] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[09:36:02.783] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[09:36:02.783] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[09:36:02.783] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[09:36:02.783] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[09:36:02.783] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[09:36:02.783] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[09:36:02.783] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[09:36:02.783] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[09:36:02.783] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[09:36:02.784] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[09:36:02.784] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[09:36:02.784] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[09:36:02.784] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[09:36:02.784] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[09:36:02.784] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[09:36:02.784] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[09:36:03.186] <TB3> INFO: enter 'restricted' command line mode
[09:36:03.186] <TB3> INFO: enter test to run
[09:36:03.186] <TB3> INFO: test: pretest no parameter change
[09:36:03.186] <TB3> INFO: running: pretest
[09:36:03.193] <TB3> INFO: ----------------------------------------------------------------------
[09:36:03.193] <TB3> INFO: PixTestPretest::programROC()
[09:36:03.193] <TB3> INFO: ----------------------------------------------------------------------
[09:36:21.211] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[09:36:21.212] <TB3> INFO: IA differences per ROC: 19.3 19.3 19.3 20.9 20.1 21.7 19.3 20.1 19.3 21.7 20.1 20.1 18.5 20.1 20.9 20.1
[09:36:21.321] <TB3> INFO: enter test to run
[09:36:21.321] <TB3> INFO: test: pretest no parameter change
[09:36:21.321] <TB3> INFO: running: pretest
[09:36:21.322] <TB3> INFO: ----------------------------------------------------------------------
[09:36:21.322] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[09:36:21.322] <TB3> INFO: ----------------------------------------------------------------------
[09:36:28.437] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 381 mA = 23.8125 mA/ROC
[09:36:28.437] <TB3> INFO: i(loss) [mA/ROC]: 20.1 18.4 18.4 19.2 19.2 19.2 19.2 19.2 19.2 18.4 18.4 18.4 18.4 18.4 17.6 19.2
[09:36:28.492] <TB3> INFO: enter test to run
[09:36:28.492] <TB3> INFO: test: pretest no parameter change
[09:36:28.492] <TB3> INFO: running: pretest
[09:36:28.492] <TB3> INFO: ----------------------------------------------------------------------
[09:36:28.492] <TB3> INFO: PixTestPretest::findTiming()
[09:36:28.492] <TB3> INFO: ----------------------------------------------------------------------
[09:36:28.492] <TB3> INFO: PixTestCmd::init()

[09:37:58.656] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):4, header/trailer: 1, token: 1
[09:37:58.657] <TB3> INFO: (success/tries = 100/100), width = 5
[09:37:58.658] <TB3> INFO: enter test to run
[09:37:58.658] <TB3> INFO: test: pretest no parameter change
[09:37:58.658] <TB3> INFO: running: pretest
[09:37:58.659] <TB3> INFO: ----------------------------------------------------------------------
[09:37:58.659] <TB3> INFO: PixTestPretest::findWorkingPixel()
[09:37:58.659] <TB3> INFO: ----------------------------------------------------------------------
[09:37:58.752] <TB3> INFO: Expecting 231680 events.


[09:38:08.927] <TB3> INFO: 231680 events read in total (9618ms).
[09:38:08.931] <TB3> INFO: Test took 10267ms.
[09:38:09.175] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[09:38:09.254] <TB3> INFO: enter test to run
[09:38:09.254] <TB3> INFO: test: pretest no parameter change
[09:38:09.254] <TB3> INFO: running: pretest
[09:38:09.255] <TB3> INFO: ----------------------------------------------------------------------
[09:38:09.255] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[09:38:09.255] <TB3> INFO: ----------------------------------------------------------------------
[09:38:09.350] <TB3> INFO: Expecting 231680 events.
[09:38:19.433] <TB3> INFO: 231680 events read in total (9526ms).
[09:38:19.436] <TB3> INFO: Test took 10175ms.
[09:38:19.705] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[09:38:19.705] <TB3> INFO: CalDel: 143 132 147 135 140 134 134 152 129 131 145 126 130 136 154 143
[09:38:19.705] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[09:38:19.738] <TB3> INFO: enter test to run
[09:38:19.738] <TB3> INFO: test: pretest no parameter change
[09:38:19.738] <TB3> INFO: running: pretest
[09:38:19.744] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C0.dat
[09:38:19.749] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C1.dat
[09:38:19.754] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C2.dat
[09:38:19.759] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C3.dat
[09:38:19.764] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C4.dat
[09:38:19.769] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C5.dat
[09:38:19.774] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C6.dat
[09:38:19.779] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C7.dat
[09:38:19.784] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C8.dat
[09:38:19.789] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C9.dat
[09:38:19.794] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C10.dat
[09:38:19.799] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C11.dat
[09:38:19.804] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C12.dat
[09:38:19.809] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C13.dat
[09:38:19.816] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C14.dat
[09:38:19.821] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C15.dat
[09:38:19.824] <TB3> INFO: enter test to run
[09:38:19.824] <TB3> INFO: test: fulltest no parameter change
[09:38:19.824] <TB3> INFO: running: fulltest
[09:38:19.824] <TB3> INFO: ######################################################################
[09:38:19.824] <TB3> INFO: PixTestFullTest::doTest()
[09:38:19.824] <TB3> INFO: ######################################################################
[09:38:19.825] <TB3> INFO: ######################################################################
[09:38:19.825] <TB3> INFO: PixTestAlive::doTest()
[09:38:19.825] <TB3> INFO: ######################################################################
[09:38:19.827] <TB3> INFO: ----------------------------------------------------------------------
[09:38:19.827] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:38:19.827] <TB3> INFO: ----------------------------------------------------------------------
[09:38:20.128] <TB3> INFO: Expecting 41600 events.
[09:38:23.873] <TB3> INFO: 41600 events read in total (3188ms).
[09:38:23.874] <TB3> INFO: Test took 4045ms.
[09:38:24.118] <TB3> INFO: PixTestAlive::aliveTest() done
[09:38:24.118] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:38:24.119] <TB3> INFO: ----------------------------------------------------------------------
[09:38:24.119] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:38:24.119] <TB3> INFO: ----------------------------------------------------------------------
[09:38:24.390] <TB3> INFO: Expecting 41600 events.
[09:38:27.342] <TB3> INFO: 41600 events read in total (2395ms).
[09:38:27.343] <TB3> INFO: Test took 3221ms.
[09:38:27.343] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[09:38:27.605] <TB3> INFO: PixTestAlive::maskTest() done
[09:38:27.605] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:38:27.606] <TB3> INFO: ----------------------------------------------------------------------
[09:38:27.606] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:38:27.606] <TB3> INFO: ----------------------------------------------------------------------
[09:38:27.906] <TB3> INFO: Expecting 41600 events.
[09:38:31.758] <TB3> INFO: 41600 events read in total (3295ms).
[09:38:31.759] <TB3> INFO: Test took 4151ms.
[09:38:31.994] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[09:38:31.994] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:38:31.994] <TB3> INFO: PixTestAlive::doTest() done, duration: 12 seconds
[09:38:31.994] <TB3> INFO: Decoding statistics:
[09:38:31.994] <TB3> INFO: General information:
[09:38:31.994] <TB3> INFO: 16bit words read: 0
[09:38:31.994] <TB3> INFO: valid events total: 0
[09:38:31.994] <TB3> INFO: empty events: 0
[09:38:31.994] <TB3> INFO: valid events with pixels: 0
[09:38:31.994] <TB3> INFO: valid pixel hits: 0
[09:38:31.994] <TB3> INFO: Event errors: 0
[09:38:31.994] <TB3> INFO: start marker: 0
[09:38:31.994] <TB3> INFO: stop marker: 0
[09:38:31.994] <TB3> INFO: overflow: 0
[09:38:31.994] <TB3> INFO: invalid 5bit words: 0
[09:38:31.994] <TB3> INFO: invalid XOR eye diagram: 0
[09:38:31.994] <TB3> INFO: frame (failed synchr.): 0
[09:38:31.994] <TB3> INFO: idle data (no TBM trl): 0
[09:38:31.994] <TB3> INFO: no data (only TBM hdr): 0
[09:38:31.994] <TB3> INFO: TBM errors: 0
[09:38:31.994] <TB3> INFO: flawed TBM headers: 0
[09:38:31.994] <TB3> INFO: flawed TBM trailers: 0
[09:38:31.994] <TB3> INFO: event ID mismatches: 0
[09:38:31.994] <TB3> INFO: ROC errors: 0
[09:38:31.994] <TB3> INFO: missing ROC header(s): 0
[09:38:31.994] <TB3> INFO: misplaced readback start: 0
[09:38:31.994] <TB3> INFO: Pixel decoding errors: 0
[09:38:31.995] <TB3> INFO: pixel data incomplete: 0
[09:38:31.995] <TB3> INFO: pixel address: 0
[09:38:31.995] <TB3> INFO: pulse height fill bit: 0
[09:38:31.995] <TB3> INFO: buffer corruption: 0
[09:38:32.001] <TB3> INFO: ######################################################################
[09:38:32.001] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[09:38:32.001] <TB3> INFO: ######################################################################
[09:38:32.005] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[09:38:32.016] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[09:38:32.016] <TB3> INFO: run 1 of 1
[09:38:32.280] <TB3> INFO: Expecting 3120000 events.
[09:39:14.049] <TB3> INFO: 886275 events read in total (41212ms).
[09:39:54.660] <TB3> INFO: 1761380 events read in total (81823ms).
[09:40:36.263] <TB3> INFO: 2651275 events read in total (123426ms).
[09:40:58.083] <TB3> INFO: 3120000 events read in total (145246ms).
[09:40:58.123] <TB3> INFO: Test took 146107ms.
[09:41:21.317] <TB3> INFO: PixTestBBMap::doTest() done, duration: 169 seconds
[09:41:21.317] <TB3> INFO: number of dead bumps (per ROC): 5 0 0 1 1 0 0 1 1 0 1 0 0 1 7 19
[09:41:21.318] <TB3> INFO: separation cut (per ROC): 92 90 67 88 88 105 91 87 90 96 93 87 93 81 85 79
[09:41:21.318] <TB3> INFO: Decoding statistics:
[09:41:21.318] <TB3> INFO: General information:
[09:41:21.318] <TB3> INFO: 16bit words read: 0
[09:41:21.318] <TB3> INFO: valid events total: 0
[09:41:21.318] <TB3> INFO: empty events: 0
[09:41:21.318] <TB3> INFO: valid events with pixels: 0
[09:41:21.318] <TB3> INFO: valid pixel hits: 0
[09:41:21.318] <TB3> INFO: Event errors: 0
[09:41:21.318] <TB3> INFO: start marker: 0
[09:41:21.318] <TB3> INFO: stop marker: 0
[09:41:21.318] <TB3> INFO: overflow: 0
[09:41:21.318] <TB3> INFO: invalid 5bit words: 0
[09:41:21.318] <TB3> INFO: invalid XOR eye diagram: 0
[09:41:21.318] <TB3> INFO: frame (failed synchr.): 0
[09:41:21.318] <TB3> INFO: idle data (no TBM trl): 0
[09:41:21.318] <TB3> INFO: no data (only TBM hdr): 0
[09:41:21.318] <TB3> INFO: TBM errors: 0
[09:41:21.318] <TB3> INFO: flawed TBM headers: 0
[09:41:21.318] <TB3> INFO: flawed TBM trailers: 0
[09:41:21.318] <TB3> INFO: event ID mismatches: 0
[09:41:21.318] <TB3> INFO: ROC errors: 0
[09:41:21.318] <TB3> INFO: missing ROC header(s): 0
[09:41:21.318] <TB3> INFO: misplaced readback start: 0
[09:41:21.318] <TB3> INFO: Pixel decoding errors: 0
[09:41:21.318] <TB3> INFO: pixel data incomplete: 0
[09:41:21.318] <TB3> INFO: pixel address: 0
[09:41:21.318] <TB3> INFO: pulse height fill bit: 0
[09:41:21.318] <TB3> INFO: buffer corruption: 0
[09:41:21.388] <TB3> INFO: ######################################################################
[09:41:21.388] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:41:21.388] <TB3> INFO: ######################################################################
[09:41:21.388] <TB3> INFO: ----------------------------------------------------------------------
[09:41:21.389] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:41:21.389] <TB3> INFO: ----------------------------------------------------------------------
[09:41:21.389] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[09:41:21.396] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[09:41:21.396] <TB3> INFO: run 1 of 1
[09:41:21.658] <TB3> INFO: Expecting 26208000 events.
[09:41:55.755] <TB3> INFO: 913250 events read in total (33541ms).
[09:42:29.457] <TB3> INFO: 1813600 events read in total (67243ms).
[09:43:02.574] <TB3> INFO: 2713100 events read in total (100360ms).
[09:43:35.933] <TB3> INFO: 3613550 events read in total (133719ms).
[09:44:09.427] <TB3> INFO: 4513850 events read in total (167213ms).
[09:44:42.828] <TB3> INFO: 5410300 events read in total (200614ms).
[09:45:16.487] <TB3> INFO: 6310850 events read in total (234273ms).
[09:45:50.076] <TB3> INFO: 7207050 events read in total (267862ms).
[09:46:23.899] <TB3> INFO: 8105600 events read in total (301685ms).
[09:46:57.368] <TB3> INFO: 9001850 events read in total (335154ms).
[09:47:30.737] <TB3> INFO: 9896400 events read in total (368523ms).
[09:48:04.282] <TB3> INFO: 10790300 events read in total (402068ms).
[09:48:37.773] <TB3> INFO: 11684800 events read in total (435559ms).
[09:49:11.773] <TB3> INFO: 12578900 events read in total (469559ms).
[09:49:44.747] <TB3> INFO: 13462600 events read in total (502533ms).
[09:50:18.295] <TB3> INFO: 14346050 events read in total (536081ms).
[09:50:51.789] <TB3> INFO: 15228650 events read in total (569575ms).
[09:51:25.218] <TB3> INFO: 16107850 events read in total (603004ms).
[09:51:58.646] <TB3> INFO: 16984650 events read in total (636432ms).
[09:52:32.660] <TB3> INFO: 17864050 events read in total (670446ms).
[09:53:06.433] <TB3> INFO: 18742350 events read in total (704219ms).
[09:53:40.164] <TB3> INFO: 19621600 events read in total (737950ms).
[09:54:13.484] <TB3> INFO: 20497850 events read in total (771270ms).
[09:54:46.631] <TB3> INFO: 21375850 events read in total (804417ms).
[09:55:20.057] <TB3> INFO: 22254350 events read in total (837843ms).
[09:55:53.022] <TB3> INFO: 23132250 events read in total (870808ms).
[09:56:26.112] <TB3> INFO: 24013450 events read in total (903898ms).
[09:56:59.176] <TB3> INFO: 24896000 events read in total (936962ms).
[09:57:33.026] <TB3> INFO: 25783050 events read in total (970812ms).
[09:57:48.926] <TB3> INFO: 26208000 events read in total (986712ms).
[09:57:48.955] <TB3> INFO: Test took 987558ms.
[09:57:49.191] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:57:50.587] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:57:51.986] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:57:53.629] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:57:55.041] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:57:56.453] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:57:57.820] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:57:59.326] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:58:00.818] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:58:02.288] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:58:03.775] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:58:05.433] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:58:07.134] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:58:08.827] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:58:10.517] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:58:12.088] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:58:13.864] <TB3> INFO: PixTestScurves::scurves() done
[09:58:13.864] <TB3> INFO: Vcal mean: 96.93 91.22 77.60 87.23 89.93 106.91 90.66 93.75 102.52 93.22 100.31 87.62 99.38 80.91 91.55 88.50
[09:58:13.864] <TB3> INFO: Vcal RMS: 4.89 5.06 4.00 5.32 6.04 5.43 5.62 5.28 5.64 5.72 7.34 4.77 6.30 4.23 5.47 4.89
[09:58:13.864] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1012 seconds
[09:58:13.864] <TB3> INFO: Decoding statistics:
[09:58:13.864] <TB3> INFO: General information:
[09:58:13.864] <TB3> INFO: 16bit words read: 0
[09:58:13.864] <TB3> INFO: valid events total: 0
[09:58:13.864] <TB3> INFO: empty events: 0
[09:58:13.864] <TB3> INFO: valid events with pixels: 0
[09:58:13.864] <TB3> INFO: valid pixel hits: 0
[09:58:13.864] <TB3> INFO: Event errors: 0
[09:58:13.864] <TB3> INFO: start marker: 0
[09:58:13.864] <TB3> INFO: stop marker: 0
[09:58:13.864] <TB3> INFO: overflow: 0
[09:58:13.864] <TB3> INFO: invalid 5bit words: 0
[09:58:13.864] <TB3> INFO: invalid XOR eye diagram: 0
[09:58:13.864] <TB3> INFO: frame (failed synchr.): 0
[09:58:13.864] <TB3> INFO: idle data (no TBM trl): 0
[09:58:13.864] <TB3> INFO: no data (only TBM hdr): 0
[09:58:13.864] <TB3> INFO: TBM errors: 0
[09:58:13.864] <TB3> INFO: flawed TBM headers: 0
[09:58:13.864] <TB3> INFO: flawed TBM trailers: 0
[09:58:13.864] <TB3> INFO: event ID mismatches: 0
[09:58:13.864] <TB3> INFO: ROC errors: 0
[09:58:13.864] <TB3> INFO: missing ROC header(s): 0
[09:58:13.864] <TB3> INFO: misplaced readback start: 0
[09:58:13.864] <TB3> INFO: Pixel decoding errors: 0
[09:58:13.864] <TB3> INFO: pixel data incomplete: 0
[09:58:13.864] <TB3> INFO: pixel address: 0
[09:58:13.864] <TB3> INFO: pulse height fill bit: 0
[09:58:13.864] <TB3> INFO: buffer corruption: 0
[09:58:13.946] <TB3> INFO: ######################################################################
[09:58:13.946] <TB3> INFO: PixTestTrim::doTest()
[09:58:13.946] <TB3> INFO: ######################################################################
[09:58:13.947] <TB3> INFO: ----------------------------------------------------------------------
[09:58:13.947] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[09:58:13.947] <TB3> INFO: ----------------------------------------------------------------------
[09:58:14.034] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:58:14.034] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[09:58:14.046] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[09:58:14.046] <TB3> INFO: run 1 of 1
[09:58:14.345] <TB3> INFO: Expecting 5025280 events.
[09:58:56.075] <TB3> INFO: 1096440 events read in total (41169ms).
[09:59:36.800] <TB3> INFO: 2188648 events read in total (81894ms).
[10:00:17.845] <TB3> INFO: 3280816 events read in total (122939ms).
[10:00:58.735] <TB3> INFO: 4382016 events read in total (163829ms).
[10:01:23.176] <TB3> INFO: 5025280 events read in total (188270ms).
[10:01:23.212] <TB3> INFO: Test took 189166ms.
[10:01:43.800] <TB3> INFO: ROC 0 VthrComp = 100
[10:01:43.800] <TB3> INFO: ROC 1 VthrComp = 92
[10:01:43.800] <TB3> INFO: ROC 2 VthrComp = 79
[10:01:43.800] <TB3> INFO: ROC 3 VthrComp = 89
[10:01:43.801] <TB3> INFO: ROC 4 VthrComp = 87
[10:01:43.801] <TB3> INFO: ROC 5 VthrComp = 103
[10:01:43.801] <TB3> INFO: ROC 6 VthrComp = 89
[10:01:43.801] <TB3> INFO: ROC 7 VthrComp = 93
[10:01:43.801] <TB3> INFO: ROC 8 VthrComp = 98
[10:01:43.801] <TB3> INFO: ROC 9 VthrComp = 94
[10:01:43.801] <TB3> INFO: ROC 10 VthrComp = 90
[10:01:43.801] <TB3> INFO: ROC 11 VthrComp = 89
[10:01:43.801] <TB3> INFO: ROC 12 VthrComp = 93
[10:01:43.802] <TB3> INFO: ROC 13 VthrComp = 83
[10:01:43.802] <TB3> INFO: ROC 14 VthrComp = 89
[10:01:43.802] <TB3> INFO: ROC 15 VthrComp = 88
[10:01:43.802] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[10:01:43.802] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[10:01:43.810] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:01:43.810] <TB3> INFO: run 1 of 1
[10:01:44.097] <TB3> INFO: Expecting 5025280 events.
[10:02:20.829] <TB3> INFO: 757904 events read in total (36175ms).
[10:02:57.174] <TB3> INFO: 1515192 events read in total (72520ms).
[10:03:33.530] <TB3> INFO: 2272704 events read in total (108876ms).
[10:04:09.603] <TB3> INFO: 3025568 events read in total (144949ms).
[10:04:46.045] <TB3> INFO: 3773056 events read in total (181391ms).
[10:05:22.287] <TB3> INFO: 4518512 events read in total (217633ms).
[10:05:46.929] <TB3> INFO: 5025280 events read in total (242275ms).
[10:05:46.985] <TB3> INFO: Test took 243175ms.
[10:06:12.090] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 56.1869 for pixel 24/63 mean/min/max = 44.0871/31.9107/56.2635
[10:06:12.091] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 57.3761 for pixel 14/22 mean/min/max = 45.683/33.8517/57.5144
[10:06:12.091] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 58.1116 for pixel 0/5 mean/min/max = 46.8513/35.536/58.1666
[10:06:12.091] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 58.0975 for pixel 3/72 mean/min/max = 46.1099/34.0306/58.1893
[10:06:12.091] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 59.604 for pixel 0/52 mean/min/max = 45.8436/31.7862/59.901
[10:06:12.092] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 62.1966 for pixel 24/0 mean/min/max = 47.7919/33.1754/62.4085
[10:06:12.092] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 60.9454 for pixel 0/17 mean/min/max = 47.6243/34.2276/61.0211
[10:06:12.092] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 59.1634 for pixel 12/10 mean/min/max = 46.1359/33.0606/59.2112
[10:06:12.092] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 59.7325 for pixel 13/52 mean/min/max = 45.7763/31.8032/59.7493
[10:06:12.093] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 59.2595 for pixel 0/63 mean/min/max = 45.7494/32.2358/59.2631
[10:06:12.093] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 68.0338 for pixel 0/1 mean/min/max = 49.9009/31.7063/68.0954
[10:06:12.093] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 57.1993 for pixel 48/37 mean/min/max = 46.1089/34.9257/57.292
[10:06:12.093] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 61.9743 for pixel 0/69 mean/min/max = 46.8964/31.7507/62.0421
[10:06:12.094] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 56.2137 for pixel 0/73 mean/min/max = 44.558/32.3941/56.7219
[10:06:12.094] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 58.8744 for pixel 51/72 mean/min/max = 46.3243/33.7579/58.8907
[10:06:12.094] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 56.844 for pixel 2/4 mean/min/max = 45.5937/34.202/56.9855
[10:06:12.094] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:06:12.184] <TB3> INFO: Expecting 411648 events.
[10:06:22.876] <TB3> INFO: 411648 events read in total (10134ms).
[10:06:22.881] <TB3> INFO: Expecting 411648 events.
[10:06:33.419] <TB3> INFO: 411648 events read in total (10116ms).
[10:06:33.425] <TB3> INFO: Expecting 411648 events.
[10:06:43.880] <TB3> INFO: 411648 events read in total (10029ms).
[10:06:43.889] <TB3> INFO: Expecting 411648 events.
[10:06:54.526] <TB3> INFO: 411648 events read in total (10215ms).
[10:06:54.536] <TB3> INFO: Expecting 411648 events.
[10:07:05.005] <TB3> INFO: 411648 events read in total (10051ms).
[10:07:05.017] <TB3> INFO: Expecting 411648 events.
[10:07:15.643] <TB3> INFO: 411648 events read in total (10200ms).
[10:07:15.659] <TB3> INFO: Expecting 411648 events.
[10:07:26.187] <TB3> INFO: 411648 events read in total (10115ms).
[10:07:26.205] <TB3> INFO: Expecting 411648 events.
[10:07:36.711] <TB3> INFO: 411648 events read in total (10092ms).
[10:07:36.730] <TB3> INFO: Expecting 411648 events.
[10:07:47.219] <TB3> INFO: 411648 events read in total (10073ms).
[10:07:47.239] <TB3> INFO: Expecting 411648 events.
[10:07:57.758] <TB3> INFO: 411648 events read in total (10105ms).
[10:07:57.780] <TB3> INFO: Expecting 411648 events.
[10:08:08.415] <TB3> INFO: 411648 events read in total (10224ms).
[10:08:08.438] <TB3> INFO: Expecting 411648 events.
[10:08:18.904] <TB3> INFO: 411648 events read in total (10056ms).
[10:08:18.929] <TB3> INFO: Expecting 411648 events.
[10:08:29.290] <TB3> INFO: 411648 events read in total (9947ms).
[10:08:29.316] <TB3> INFO: Expecting 411648 events.
[10:08:39.722] <TB3> INFO: 411648 events read in total (9997ms).
[10:08:39.754] <TB3> INFO: Expecting 411648 events.
[10:08:50.077] <TB3> INFO: 411648 events read in total (9921ms).
[10:08:50.107] <TB3> INFO: Expecting 411648 events.
[10:09:00.511] <TB3> INFO: 411648 events read in total (9992ms).
[10:09:00.548] <TB3> INFO: Test took 168454ms.
[10:09:01.348] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[10:09:01.356] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:09:01.356] <TB3> INFO: run 1 of 1
[10:09:01.618] <TB3> INFO: Expecting 5025280 events.
[10:09:38.159] <TB3> INFO: 742800 events read in total (35984ms).
[10:10:14.089] <TB3> INFO: 1485288 events read in total (71914ms).
[10:10:50.288] <TB3> INFO: 2228248 events read in total (108113ms).
[10:11:26.034] <TB3> INFO: 2966224 events read in total (143859ms).
[10:12:01.629] <TB3> INFO: 3697920 events read in total (179454ms).
[10:12:36.934] <TB3> INFO: 4426648 events read in total (214759ms).
[10:13:06.574] <TB3> INFO: 5025280 events read in total (244399ms).
[10:13:06.621] <TB3> INFO: Test took 245265ms.
[10:13:31.054] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 4.500000 .. 255.000000
[10:13:31.130] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 4 .. 255 (-1/-1) hits flags = 528 (plus default)
[10:13:31.138] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:13:31.138] <TB3> INFO: run 1 of 1
[10:13:31.400] <TB3> INFO: Expecting 8386560 events.
[10:14:07.414] <TB3> INFO: 707280 events read in total (35457ms).
[10:14:42.562] <TB3> INFO: 1414560 events read in total (70605ms).
[10:15:17.764] <TB3> INFO: 2122152 events read in total (105807ms).
[10:15:53.438] <TB3> INFO: 2830096 events read in total (141481ms).
[10:16:28.907] <TB3> INFO: 3537920 events read in total (176950ms).
[10:17:04.124] <TB3> INFO: 4246016 events read in total (212167ms).
[10:17:39.022] <TB3> INFO: 4953768 events read in total (247065ms).
[10:18:14.327] <TB3> INFO: 5660720 events read in total (282370ms).
[10:18:49.709] <TB3> INFO: 6367240 events read in total (317752ms).
[10:19:25.100] <TB3> INFO: 7073048 events read in total (353143ms).
[10:20:00.707] <TB3> INFO: 7778936 events read in total (388750ms).
[10:20:31.224] <TB3> INFO: 8386560 events read in total (419267ms).
[10:20:31.319] <TB3> INFO: Test took 420181ms.
[10:21:02.528] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 13.328799 .. 47.213186
[10:21:02.621] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 3 .. 57 (-1/-1) hits flags = 528 (plus default)
[10:21:02.630] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:21:02.630] <TB3> INFO: run 1 of 1
[10:21:02.921] <TB3> INFO: Expecting 1830400 events.
[10:21:42.890] <TB3> INFO: 934440 events read in total (39412ms).
[10:22:20.926] <TB3> INFO: 1830400 events read in total (77449ms).
[10:22:20.951] <TB3> INFO: Test took 78322ms.
[10:22:36.483] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 18.909994 .. 44.639828
[10:22:36.571] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 8 .. 54 (-1/-1) hits flags = 528 (plus default)
[10:22:36.580] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:22:36.580] <TB3> INFO: run 1 of 1
[10:22:36.861] <TB3> INFO: Expecting 1564160 events.
[10:23:17.962] <TB3> INFO: 931752 events read in total (40544ms).
[10:23:46.005] <TB3> INFO: 1564160 events read in total (68587ms).
[10:23:46.019] <TB3> INFO: Test took 69438ms.
[10:24:00.495] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 20.005096 .. 44.639828
[10:24:00.581] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 10 .. 54 (-1/-1) hits flags = 528 (plus default)
[10:24:00.592] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:24:00.592] <TB3> INFO: run 1 of 1
[10:24:00.884] <TB3> INFO: Expecting 1497600 events.
[10:24:40.797] <TB3> INFO: 919864 events read in total (39356ms).
[10:25:05.813] <TB3> INFO: 1497600 events read in total (64372ms).
[10:25:05.828] <TB3> INFO: Test took 65236ms.
[10:25:19.766] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[10:25:19.766] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[10:25:19.775] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:25:19.775] <TB3> INFO: run 1 of 1
[10:25:20.065] <TB3> INFO: Expecting 1364480 events.
[10:25:59.746] <TB3> INFO: 878496 events read in total (39125ms).
[10:26:21.793] <TB3> INFO: 1364480 events read in total (61172ms).
[10:26:21.806] <TB3> INFO: Test took 62031ms.
[10:26:35.526] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C0.dat
[10:26:35.530] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C1.dat
[10:26:35.534] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C2.dat
[10:26:35.540] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C3.dat
[10:26:35.544] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C4.dat
[10:26:35.548] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C5.dat
[10:26:35.552] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C6.dat
[10:26:35.556] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C7.dat
[10:26:35.560] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C8.dat
[10:26:35.563] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C9.dat
[10:26:35.567] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C10.dat
[10:26:35.571] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C11.dat
[10:26:35.574] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C12.dat
[10:26:35.578] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C13.dat
[10:26:35.582] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C14.dat
[10:26:35.586] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C15.dat
[10:26:35.589] <TB3> INFO: write trim parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C0.dat
[10:26:35.601] <TB3> INFO: write trim parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C1.dat
[10:26:35.613] <TB3> INFO: write trim parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C2.dat
[10:26:35.624] <TB3> INFO: write trim parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C3.dat
[10:26:35.635] <TB3> INFO: write trim parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C4.dat
[10:26:35.647] <TB3> INFO: write trim parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C5.dat
[10:26:35.658] <TB3> INFO: write trim parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C6.dat
[10:26:35.670] <TB3> INFO: write trim parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C7.dat
[10:26:35.682] <TB3> INFO: write trim parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C8.dat
[10:26:35.693] <TB3> INFO: write trim parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C9.dat
[10:26:35.706] <TB3> INFO: write trim parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C10.dat
[10:26:35.717] <TB3> INFO: write trim parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C11.dat
[10:26:35.728] <TB3> INFO: write trim parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C12.dat
[10:26:35.739] <TB3> INFO: write trim parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C13.dat
[10:26:35.751] <TB3> INFO: write trim parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C14.dat
[10:26:35.763] <TB3> INFO: write trim parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C15.dat
[10:26:35.776] <TB3> INFO: PixTestTrim::trimTest() done
[10:26:35.776] <TB3> INFO: vtrim: 93 89 88 98 91 112 96 94 104 93 119 91 102 89 81 85
[10:26:35.776] <TB3> INFO: vthrcomp: 100 92 79 89 87 103 89 93 98 94 90 89 93 83 89 88
[10:26:35.776] <TB3> INFO: vcal mean: 34.96 34.99 35.03 34.97 34.95 34.97 35.01 34.95 34.90 35.00 34.95 35.00 34.98 34.91 34.98 35.02
[10:26:35.776] <TB3> INFO: vcal RMS: 0.96 0.92 0.88 0.93 1.02 1.02 0.98 0.96 1.14 0.91 1.22 0.89 0.99 0.92 0.96 0.91
[10:26:35.776] <TB3> INFO: bits mean: 10.06 9.48 8.47 9.36 9.24 9.32 8.78 9.41 9.32 9.20 8.86 9.24 9.28 9.82 9.01 9.63
[10:26:35.776] <TB3> INFO: bits RMS: 2.56 2.44 2.56 2.51 2.83 2.46 2.59 2.61 2.80 2.83 2.74 2.44 2.76 2.62 2.64 2.38
[10:26:35.785] <TB3> INFO: ----------------------------------------------------------------------
[10:26:35.785] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[10:26:35.785] <TB3> INFO: ----------------------------------------------------------------------
[10:26:35.789] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[10:26:35.797] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[10:26:35.797] <TB3> INFO: run 1 of 1
[10:26:36.066] <TB3> INFO: Expecting 4160000 events.
[10:27:19.060] <TB3> INFO: 945005 events read in total (42437ms).
[10:28:01.534] <TB3> INFO: 1883820 events read in total (84911ms).
[10:28:43.314] <TB3> INFO: 2812770 events read in total (126691ms).
[10:29:25.587] <TB3> INFO: 3739690 events read in total (168964ms).
[10:29:44.645] <TB3> INFO: 4160000 events read in total (188023ms).
[10:29:44.696] <TB3> INFO: Test took 188900ms.
[10:30:14.633] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 200 (-1/-1) hits flags = 528 (plus default)
[10:30:14.642] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[10:30:14.642] <TB3> INFO: run 1 of 1
[10:30:14.904] <TB3> INFO: Expecting 4180800 events.
[10:30:56.560] <TB3> INFO: 910240 events read in total (41099ms).
[10:31:38.423] <TB3> INFO: 1815705 events read in total (82962ms).
[10:32:19.419] <TB3> INFO: 2713210 events read in total (123959ms).
[10:33:00.275] <TB3> INFO: 3607535 events read in total (164814ms).
[10:33:26.631] <TB3> INFO: 4180800 events read in total (191170ms).
[10:33:26.671] <TB3> INFO: Test took 192030ms.
[10:33:55.606] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 182 (-1/-1) hits flags = 528 (plus default)
[10:33:55.614] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[10:33:55.614] <TB3> INFO: run 1 of 1
[10:33:55.876] <TB3> INFO: Expecting 3806400 events.
[10:34:38.691] <TB3> INFO: 944425 events read in total (42257ms).
[10:35:20.482] <TB3> INFO: 1882020 events read in total (84048ms).
[10:36:02.256] <TB3> INFO: 2808605 events read in total (125822ms).
[10:36:43.945] <TB3> INFO: 3736390 events read in total (167511ms).
[10:36:47.398] <TB3> INFO: 3806400 events read in total (170964ms).
[10:36:47.429] <TB3> INFO: Test took 171814ms.
[10:37:16.406] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 182 (-1/-1) hits flags = 528 (plus default)
[10:37:16.415] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[10:37:16.415] <TB3> INFO: run 1 of 1
[10:37:16.710] <TB3> INFO: Expecting 3806400 events.
[10:37:59.481] <TB3> INFO: 943355 events read in total (42214ms).
[10:38:41.627] <TB3> INFO: 1880365 events read in total (84361ms).
[10:39:23.493] <TB3> INFO: 2806405 events read in total (126227ms).
[10:40:05.476] <TB3> INFO: 3733380 events read in total (168209ms).
[10:40:09.094] <TB3> INFO: 3806400 events read in total (171827ms).
[10:40:09.122] <TB3> INFO: Test took 172707ms.
[10:40:36.524] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 184 (-1/-1) hits flags = 528 (plus default)
[10:40:36.532] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[10:40:36.532] <TB3> INFO: run 1 of 1
[10:40:36.807] <TB3> INFO: Expecting 3848000 events.
[10:41:19.236] <TB3> INFO: 938460 events read in total (41872ms).
[10:42:00.928] <TB3> INFO: 1871205 events read in total (83564ms).
[10:42:42.470] <TB3> INFO: 2792575 events read in total (125106ms).
[10:43:24.247] <TB3> INFO: 3715330 events read in total (166883ms).
[10:43:30.597] <TB3> INFO: 3848000 events read in total (173233ms).
[10:43:30.630] <TB3> INFO: Test took 174098ms.
[10:43:58.110] <TB3> INFO: PixTestTrim::trimBitTest() done
[10:43:58.111] <TB3> INFO: PixTestTrim::doTest() done, duration: 2744 seconds
[10:43:58.111] <TB3> INFO: Decoding statistics:
[10:43:58.112] <TB3> INFO: General information:
[10:43:58.112] <TB3> INFO: 16bit words read: 0
[10:43:58.112] <TB3> INFO: valid events total: 0
[10:43:58.112] <TB3> INFO: empty events: 0
[10:43:58.112] <TB3> INFO: valid events with pixels: 0
[10:43:58.112] <TB3> INFO: valid pixel hits: 0
[10:43:58.112] <TB3> INFO: Event errors: 0
[10:43:58.112] <TB3> INFO: start marker: 0
[10:43:58.112] <TB3> INFO: stop marker: 0
[10:43:58.112] <TB3> INFO: overflow: 0
[10:43:58.112] <TB3> INFO: invalid 5bit words: 0
[10:43:58.112] <TB3> INFO: invalid XOR eye diagram: 0
[10:43:58.112] <TB3> INFO: frame (failed synchr.): 0
[10:43:58.112] <TB3> INFO: idle data (no TBM trl): 0
[10:43:58.112] <TB3> INFO: no data (only TBM hdr): 0
[10:43:58.112] <TB3> INFO: TBM errors: 0
[10:43:58.112] <TB3> INFO: flawed TBM headers: 0
[10:43:58.112] <TB3> INFO: flawed TBM trailers: 0
[10:43:58.112] <TB3> INFO: event ID mismatches: 0
[10:43:58.112] <TB3> INFO: ROC errors: 0
[10:43:58.112] <TB3> INFO: missing ROC header(s): 0
[10:43:58.112] <TB3> INFO: misplaced readback start: 0
[10:43:58.112] <TB3> INFO: Pixel decoding errors: 0
[10:43:58.112] <TB3> INFO: pixel data incomplete: 0
[10:43:58.112] <TB3> INFO: pixel address: 0
[10:43:58.112] <TB3> INFO: pulse height fill bit: 0
[10:43:58.112] <TB3> INFO: buffer corruption: 0
[10:43:58.789] <TB3> INFO: ######################################################################
[10:43:58.789] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:43:58.789] <TB3> INFO: ######################################################################
[10:43:59.053] <TB3> INFO: Expecting 41600 events.
[10:44:02.827] <TB3> INFO: 41600 events read in total (3217ms).
[10:44:02.828] <TB3> INFO: Test took 4037ms.
[10:44:03.293] <TB3> INFO: Expecting 41600 events.
[10:44:07.122] <TB3> INFO: 41600 events read in total (3273ms).
[10:44:07.122] <TB3> INFO: Test took 4093ms.
[10:44:07.419] <TB3> INFO: Expecting 41600 events.
[10:44:11.241] <TB3> INFO: 41600 events read in total (3265ms).
[10:44:11.251] <TB3> INFO: Test took 4107ms.
[10:44:11.509] <TB3> INFO: Expecting 2560 events.
[10:44:12.369] <TB3> INFO: 2560 events read in total (303ms).
[10:44:12.369] <TB3> INFO: Test took 1103ms.
[10:44:12.676] <TB3> INFO: Expecting 2560 events.
[10:44:13.533] <TB3> INFO: 2560 events read in total (299ms).
[10:44:13.533] <TB3> INFO: Test took 1163ms.
[10:44:13.842] <TB3> INFO: Expecting 2560 events.
[10:44:14.697] <TB3> INFO: 2560 events read in total (299ms).
[10:44:14.698] <TB3> INFO: Test took 1164ms.
[10:44:15.005] <TB3> INFO: Expecting 2560 events.
[10:44:15.859] <TB3> INFO: 2560 events read in total (297ms).
[10:44:15.859] <TB3> INFO: Test took 1161ms.
[10:44:16.167] <TB3> INFO: Expecting 2560 events.
[10:44:17.024] <TB3> INFO: 2560 events read in total (300ms).
[10:44:17.024] <TB3> INFO: Test took 1164ms.
[10:44:17.331] <TB3> INFO: Expecting 2560 events.
[10:44:18.193] <TB3> INFO: 2560 events read in total (305ms).
[10:44:18.194] <TB3> INFO: Test took 1170ms.
[10:44:18.501] <TB3> INFO: Expecting 2560 events.
[10:44:19.361] <TB3> INFO: 2560 events read in total (302ms).
[10:44:19.361] <TB3> INFO: Test took 1167ms.
[10:44:19.667] <TB3> INFO: Expecting 2560 events.
[10:44:20.526] <TB3> INFO: 2560 events read in total (302ms).
[10:44:20.526] <TB3> INFO: Test took 1164ms.
[10:44:20.833] <TB3> INFO: Expecting 2560 events.
[10:44:21.691] <TB3> INFO: 2560 events read in total (301ms).
[10:44:21.691] <TB3> INFO: Test took 1165ms.
[10:44:21.998] <TB3> INFO: Expecting 2560 events.
[10:44:22.853] <TB3> INFO: 2560 events read in total (299ms).
[10:44:22.854] <TB3> INFO: Test took 1162ms.
[10:44:23.161] <TB3> INFO: Expecting 2560 events.
[10:44:24.018] <TB3> INFO: 2560 events read in total (300ms).
[10:44:24.019] <TB3> INFO: Test took 1165ms.
[10:44:24.325] <TB3> INFO: Expecting 2560 events.
[10:44:25.184] <TB3> INFO: 2560 events read in total (302ms).
[10:44:25.185] <TB3> INFO: Test took 1166ms.
[10:44:25.491] <TB3> INFO: Expecting 2560 events.
[10:44:26.345] <TB3> INFO: 2560 events read in total (298ms).
[10:44:26.345] <TB3> INFO: Test took 1159ms.
[10:44:26.652] <TB3> INFO: Expecting 2560 events.
[10:44:27.506] <TB3> INFO: 2560 events read in total (297ms).
[10:44:27.506] <TB3> INFO: Test took 1160ms.
[10:44:27.813] <TB3> INFO: Expecting 2560 events.
[10:44:28.673] <TB3> INFO: 2560 events read in total (303ms).
[10:44:28.673] <TB3> INFO: Test took 1167ms.
[10:44:28.981] <TB3> INFO: Expecting 2560 events.
[10:44:29.841] <TB3> INFO: 2560 events read in total (303ms).
[10:44:29.842] <TB3> INFO: Test took 1168ms.
[10:44:29.847] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:30.151] <TB3> INFO: Expecting 655360 events.
[10:44:47.238] <TB3> INFO: 655360 events read in total (16530ms).
[10:44:47.249] <TB3> INFO: Expecting 655360 events.
[10:45:04.089] <TB3> INFO: 655360 events read in total (16438ms).
[10:45:04.101] <TB3> INFO: Expecting 655360 events.
[10:45:20.899] <TB3> INFO: 655360 events read in total (16395ms).
[10:45:20.914] <TB3> INFO: Expecting 655360 events.
[10:45:37.770] <TB3> INFO: 655360 events read in total (16453ms).
[10:45:37.790] <TB3> INFO: Expecting 655360 events.
[10:45:54.662] <TB3> INFO: 655360 events read in total (16470ms).
[10:45:54.685] <TB3> INFO: Expecting 655360 events.
[10:46:11.489] <TB3> INFO: 655360 events read in total (16402ms).
[10:46:11.516] <TB3> INFO: Expecting 655360 events.
[10:46:28.198] <TB3> INFO: 655360 events read in total (16279ms).
[10:46:28.228] <TB3> INFO: Expecting 655360 events.
[10:46:44.956] <TB3> INFO: 655360 events read in total (16325ms).
[10:46:44.988] <TB3> INFO: Expecting 655360 events.
[10:47:01.802] <TB3> INFO: 655360 events read in total (16412ms).
[10:47:01.838] <TB3> INFO: Expecting 655360 events.
[10:47:18.547] <TB3> INFO: 655360 events read in total (16306ms).
[10:47:18.587] <TB3> INFO: Expecting 655360 events.
[10:47:35.156] <TB3> INFO: 655360 events read in total (16166ms).
[10:47:35.199] <TB3> INFO: Expecting 655360 events.
[10:47:51.801] <TB3> INFO: 655360 events read in total (16199ms).
[10:47:51.860] <TB3> INFO: Expecting 655360 events.
[10:48:08.743] <TB3> INFO: 655360 events read in total (16480ms).
[10:48:08.793] <TB3> INFO: Expecting 655360 events.
[10:48:25.578] <TB3> INFO: 655360 events read in total (16383ms).
[10:48:25.631] <TB3> INFO: Expecting 655360 events.
[10:48:42.483] <TB3> INFO: 655360 events read in total (16449ms).
[10:48:42.545] <TB3> INFO: Expecting 655360 events.
[10:48:59.371] <TB3> INFO: 655360 events read in total (16423ms).
[10:48:59.441] <TB3> INFO: Test took 269594ms.
[10:48:59.527] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:48:59.756] <TB3> INFO: Expecting 655360 events.
[10:49:16.548] <TB3> INFO: 655360 events read in total (16236ms).
[10:49:16.558] <TB3> INFO: Expecting 655360 events.
[10:49:33.337] <TB3> INFO: 655360 events read in total (16376ms).
[10:49:33.350] <TB3> INFO: Expecting 655360 events.
[10:49:50.188] <TB3> INFO: 655360 events read in total (16436ms).
[10:49:50.206] <TB3> INFO: Expecting 655360 events.
[10:50:07.089] <TB3> INFO: 655360 events read in total (16481ms).
[10:50:07.109] <TB3> INFO: Expecting 655360 events.
[10:50:23.900] <TB3> INFO: 655360 events read in total (16388ms).
[10:50:23.924] <TB3> INFO: Expecting 655360 events.
[10:50:40.670] <TB3> INFO: 655360 events read in total (16344ms).
[10:50:40.695] <TB3> INFO: Expecting 655360 events.
[10:50:57.474] <TB3> INFO: 655360 events read in total (16377ms).
[10:50:57.514] <TB3> INFO: Expecting 655360 events.
[10:51:14.164] <TB3> INFO: 655360 events read in total (16248ms).
[10:51:14.198] <TB3> INFO: Expecting 655360 events.
[10:51:30.832] <TB3> INFO: 655360 events read in total (16232ms).
[10:51:30.867] <TB3> INFO: Expecting 655360 events.
[10:51:47.517] <TB3> INFO: 655360 events read in total (16247ms).
[10:51:47.556] <TB3> INFO: Expecting 655360 events.
[10:52:04.037] <TB3> INFO: 655360 events read in total (16079ms).
[10:52:04.079] <TB3> INFO: Expecting 655360 events.
[10:52:20.589] <TB3> INFO: 655360 events read in total (16107ms).
[10:52:20.638] <TB3> INFO: Expecting 655360 events.
[10:52:37.141] <TB3> INFO: 655360 events read in total (16101ms).
[10:52:37.190] <TB3> INFO: Expecting 655360 events.
[10:52:53.875] <TB3> INFO: 655360 events read in total (16282ms).
[10:52:53.953] <TB3> INFO: Expecting 655360 events.
[10:53:10.548] <TB3> INFO: 655360 events read in total (16192ms).
[10:53:10.607] <TB3> INFO: Expecting 655360 events.
[10:53:27.207] <TB3> INFO: 655360 events read in total (16198ms).
[10:53:27.280] <TB3> INFO: Test took 267753ms.
[10:53:27.465] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:53:27.471] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:53:27.478] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:53:27.485] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:53:27.491] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:53:27.498] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:53:27.506] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:53:27.515] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:53:27.523] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:53:27.531] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:53:27.540] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:53:27.549] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:53:27.558] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:53:27.567] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:53:27.576] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:53:27.583] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[10:53:27.590] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:53:27.597] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[10:53:27.666] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C0.dat
[10:53:27.671] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C1.dat
[10:53:27.676] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C2.dat
[10:53:27.681] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C3.dat
[10:53:27.686] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C4.dat
[10:53:27.692] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C5.dat
[10:53:27.697] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C6.dat
[10:53:27.702] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C7.dat
[10:53:27.707] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C8.dat
[10:53:27.712] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C9.dat
[10:53:27.717] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C10.dat
[10:53:27.722] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C11.dat
[10:53:27.727] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C12.dat
[10:53:27.732] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C13.dat
[10:53:27.737] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C14.dat
[10:53:27.743] <TB3> INFO: write dac parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C15.dat
[10:53:28.011] <TB3> INFO: Expecting 41600 events.
[10:53:31.477] <TB3> INFO: 41600 events read in total (2909ms).
[10:53:31.478] <TB3> INFO: Test took 3729ms.
[10:53:31.931] <TB3> INFO: Expecting 41600 events.
[10:53:35.387] <TB3> INFO: 41600 events read in total (2899ms).
[10:53:35.388] <TB3> INFO: Test took 3722ms.
[10:53:35.842] <TB3> INFO: Expecting 41600 events.
[10:53:39.327] <TB3> INFO: 41600 events read in total (2928ms).
[10:53:39.328] <TB3> INFO: Test took 3753ms.
[10:53:39.519] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:39.610] <TB3> INFO: Expecting 2560 events.
[10:53:40.465] <TB3> INFO: 2560 events read in total (299ms).
[10:53:40.465] <TB3> INFO: Test took 946ms.
[10:53:40.468] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:40.772] <TB3> INFO: Expecting 2560 events.
[10:53:41.626] <TB3> INFO: 2560 events read in total (297ms).
[10:53:41.626] <TB3> INFO: Test took 1158ms.
[10:53:41.628] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:41.933] <TB3> INFO: Expecting 2560 events.
[10:53:42.787] <TB3> INFO: 2560 events read in total (297ms).
[10:53:42.788] <TB3> INFO: Test took 1160ms.
[10:53:42.790] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:43.095] <TB3> INFO: Expecting 2560 events.
[10:53:43.953] <TB3> INFO: 2560 events read in total (300ms).
[10:53:43.953] <TB3> INFO: Test took 1163ms.
[10:53:43.956] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:44.261] <TB3> INFO: Expecting 2560 events.
[10:53:45.118] <TB3> INFO: 2560 events read in total (301ms).
[10:53:45.119] <TB3> INFO: Test took 1163ms.
[10:53:45.121] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:45.426] <TB3> INFO: Expecting 2560 events.
[10:53:46.281] <TB3> INFO: 2560 events read in total (298ms).
[10:53:46.282] <TB3> INFO: Test took 1161ms.
[10:53:46.285] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:46.589] <TB3> INFO: Expecting 2560 events.
[10:53:47.445] <TB3> INFO: 2560 events read in total (299ms).
[10:53:47.445] <TB3> INFO: Test took 1160ms.
[10:53:47.447] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:47.752] <TB3> INFO: Expecting 2560 events.
[10:53:48.611] <TB3> INFO: 2560 events read in total (302ms).
[10:53:48.611] <TB3> INFO: Test took 1164ms.
[10:53:48.614] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:48.919] <TB3> INFO: Expecting 2560 events.
[10:53:49.774] <TB3> INFO: 2560 events read in total (298ms).
[10:53:49.774] <TB3> INFO: Test took 1160ms.
[10:53:49.777] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:50.082] <TB3> INFO: Expecting 2560 events.
[10:53:50.937] <TB3> INFO: 2560 events read in total (298ms).
[10:53:50.937] <TB3> INFO: Test took 1160ms.
[10:53:50.940] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:51.244] <TB3> INFO: Expecting 2560 events.
[10:53:52.103] <TB3> INFO: 2560 events read in total (302ms).
[10:53:52.103] <TB3> INFO: Test took 1163ms.
[10:53:52.107] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:52.410] <TB3> INFO: Expecting 2560 events.
[10:53:53.272] <TB3> INFO: 2560 events read in total (305ms).
[10:53:53.273] <TB3> INFO: Test took 1166ms.
[10:53:53.276] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:53.580] <TB3> INFO: Expecting 2560 events.
[10:53:54.438] <TB3> INFO: 2560 events read in total (301ms).
[10:53:54.439] <TB3> INFO: Test took 1163ms.
[10:53:54.441] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:54.745] <TB3> INFO: Expecting 2560 events.
[10:53:55.600] <TB3> INFO: 2560 events read in total (298ms).
[10:53:55.601] <TB3> INFO: Test took 1160ms.
[10:53:55.603] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:55.908] <TB3> INFO: Expecting 2560 events.
[10:53:56.762] <TB3> INFO: 2560 events read in total (297ms).
[10:53:56.762] <TB3> INFO: Test took 1159ms.
[10:53:56.765] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:57.069] <TB3> INFO: Expecting 2560 events.
[10:53:57.923] <TB3> INFO: 2560 events read in total (297ms).
[10:53:57.923] <TB3> INFO: Test took 1158ms.
[10:53:57.926] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:58.230] <TB3> INFO: Expecting 2560 events.
[10:53:59.084] <TB3> INFO: 2560 events read in total (297ms).
[10:53:59.084] <TB3> INFO: Test took 1158ms.
[10:53:59.086] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:59.391] <TB3> INFO: Expecting 2560 events.
[10:54:00.245] <TB3> INFO: 2560 events read in total (297ms).
[10:54:00.245] <TB3> INFO: Test took 1159ms.
[10:54:00.248] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:00.552] <TB3> INFO: Expecting 2560 events.
[10:54:01.405] <TB3> INFO: 2560 events read in total (296ms).
[10:54:01.406] <TB3> INFO: Test took 1158ms.
[10:54:01.408] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:01.712] <TB3> INFO: Expecting 2560 events.
[10:54:02.567] <TB3> INFO: 2560 events read in total (298ms).
[10:54:02.567] <TB3> INFO: Test took 1159ms.
[10:54:02.570] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:02.873] <TB3> INFO: Expecting 2560 events.
[10:54:03.728] <TB3> INFO: 2560 events read in total (298ms).
[10:54:03.728] <TB3> INFO: Test took 1158ms.
[10:54:03.730] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:04.035] <TB3> INFO: Expecting 2560 events.
[10:54:04.889] <TB3> INFO: 2560 events read in total (297ms).
[10:54:04.889] <TB3> INFO: Test took 1159ms.
[10:54:04.892] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:05.195] <TB3> INFO: Expecting 2560 events.
[10:54:06.049] <TB3> INFO: 2560 events read in total (297ms).
[10:54:06.050] <TB3> INFO: Test took 1158ms.
[10:54:06.052] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:06.356] <TB3> INFO: Expecting 2560 events.
[10:54:07.210] <TB3> INFO: 2560 events read in total (297ms).
[10:54:07.211] <TB3> INFO: Test took 1159ms.
[10:54:07.213] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:07.518] <TB3> INFO: Expecting 2560 events.
[10:54:08.371] <TB3> INFO: 2560 events read in total (297ms).
[10:54:08.372] <TB3> INFO: Test took 1159ms.
[10:54:08.374] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:08.678] <TB3> INFO: Expecting 2560 events.
[10:54:09.532] <TB3> INFO: 2560 events read in total (297ms).
[10:54:09.532] <TB3> INFO: Test took 1158ms.
[10:54:09.535] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:09.839] <TB3> INFO: Expecting 2560 events.
[10:54:10.693] <TB3> INFO: 2560 events read in total (297ms).
[10:54:10.694] <TB3> INFO: Test took 1159ms.
[10:54:10.696] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:11.000] <TB3> INFO: Expecting 2560 events.
[10:54:11.854] <TB3> INFO: 2560 events read in total (298ms).
[10:54:11.854] <TB3> INFO: Test took 1158ms.
[10:54:11.857] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:12.161] <TB3> INFO: Expecting 2560 events.
[10:54:13.015] <TB3> INFO: 2560 events read in total (297ms).
[10:54:13.015] <TB3> INFO: Test took 1158ms.
[10:54:13.018] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:13.322] <TB3> INFO: Expecting 2560 events.
[10:54:14.176] <TB3> INFO: 2560 events read in total (297ms).
[10:54:14.176] <TB3> INFO: Test took 1158ms.
[10:54:14.179] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:14.483] <TB3> INFO: Expecting 2560 events.
[10:54:15.338] <TB3> INFO: 2560 events read in total (298ms).
[10:54:15.338] <TB3> INFO: Test took 1159ms.
[10:54:15.341] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:15.645] <TB3> INFO: Expecting 2560 events.
[10:54:16.500] <TB3> INFO: 2560 events read in total (298ms).
[10:54:16.500] <TB3> INFO: Test took 1160ms.
[10:54:16.995] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 618 seconds
[10:54:16.995] <TB3> INFO: PH scale (per ROC): 75 79 81 77 79 73 71 68 67 69 69 82 71 75 78 69
[10:54:16.995] <TB3> INFO: PH offset (per ROC): 176 184 161 180 180 191 184 184 189 182 198 158 192 182 181 191
[10:54:16.999] <TB3> INFO: Decoding statistics:
[10:54:16.999] <TB3> INFO: General information:
[10:54:16.999] <TB3> INFO: 16bit words read: 91924
[10:54:16.999] <TB3> INFO: valid events total: 10240
[10:54:16.999] <TB3> INFO: empty events: 7739
[10:54:16.999] <TB3> INFO: valid events with pixels: 2501
[10:54:16.999] <TB3> INFO: valid pixel hits: 2501
[10:54:16.999] <TB3> INFO: Event errors: 0
[10:54:16.999] <TB3> INFO: start marker: 0
[10:54:16.999] <TB3> INFO: stop marker: 0
[10:54:16.999] <TB3> INFO: overflow: 0
[10:54:17.000] <TB3> INFO: invalid 5bit words: 0
[10:54:17.000] <TB3> INFO: invalid XOR eye diagram: 0
[10:54:17.000] <TB3> INFO: frame (failed synchr.): 0
[10:54:17.000] <TB3> INFO: idle data (no TBM trl): 0
[10:54:17.000] <TB3> INFO: no data (only TBM hdr): 0
[10:54:17.000] <TB3> INFO: TBM errors: 0
[10:54:17.000] <TB3> INFO: flawed TBM headers: 0
[10:54:17.000] <TB3> INFO: flawed TBM trailers: 0
[10:54:17.000] <TB3> INFO: event ID mismatches: 0
[10:54:17.000] <TB3> INFO: ROC errors: 0
[10:54:17.000] <TB3> INFO: missing ROC header(s): 0
[10:54:17.000] <TB3> INFO: misplaced readback start: 0
[10:54:17.000] <TB3> INFO: Pixel decoding errors: 0
[10:54:17.000] <TB3> INFO: pixel data incomplete: 0
[10:54:17.000] <TB3> INFO: pixel address: 0
[10:54:17.000] <TB3> INFO: pulse height fill bit: 0
[10:54:17.000] <TB3> INFO: buffer corruption: 0
[10:54:17.168] <TB3> INFO: ######################################################################
[10:54:17.168] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:54:17.168] <TB3> INFO: ######################################################################
[10:54:17.178] <TB3> INFO: scanning low vcal = 10
[10:54:17.439] <TB3> INFO: Expecting 41600 events.
[10:54:20.965] <TB3> INFO: 41600 events read in total (2969ms).
[10:54:20.965] <TB3> INFO: Test took 3787ms.
[10:54:20.967] <TB3> INFO: scanning low vcal = 20
[10:54:21.271] <TB3> INFO: Expecting 41600 events.
[10:54:24.806] <TB3> INFO: 41600 events read in total (2978ms).
[10:54:24.807] <TB3> INFO: Test took 3839ms.
[10:54:24.809] <TB3> INFO: scanning low vcal = 30
[10:54:25.113] <TB3> INFO: Expecting 41600 events.
[10:54:28.651] <TB3> INFO: 41600 events read in total (2981ms).
[10:54:28.652] <TB3> INFO: Test took 3843ms.
[10:54:28.654] <TB3> INFO: scanning low vcal = 40
[10:54:28.951] <TB3> INFO: Expecting 41600 events.
[10:54:33.111] <TB3> INFO: 41600 events read in total (3603ms).
[10:54:33.112] <TB3> INFO: Test took 4457ms.
[10:54:33.115] <TB3> INFO: scanning low vcal = 50
[10:54:33.384] <TB3> INFO: Expecting 41600 events.
[10:54:37.625] <TB3> INFO: 41600 events read in total (3684ms).
[10:54:37.626] <TB3> INFO: Test took 4511ms.
[10:54:37.629] <TB3> INFO: scanning low vcal = 60
[10:54:37.893] <TB3> INFO: Expecting 41600 events.
[10:54:42.095] <TB3> INFO: 41600 events read in total (3645ms).
[10:54:42.096] <TB3> INFO: Test took 4467ms.
[10:54:42.099] <TB3> INFO: scanning low vcal = 70
[10:54:42.376] <TB3> INFO: Expecting 41600 events.
[10:54:46.595] <TB3> INFO: 41600 events read in total (3662ms).
[10:54:46.596] <TB3> INFO: Test took 4496ms.
[10:54:46.599] <TB3> INFO: scanning low vcal = 80
[10:54:46.886] <TB3> INFO: Expecting 41600 events.
[10:54:51.105] <TB3> INFO: 41600 events read in total (3662ms).
[10:54:51.106] <TB3> INFO: Test took 4506ms.
[10:54:51.110] <TB3> INFO: scanning low vcal = 90
[10:54:51.371] <TB3> INFO: Expecting 41600 events.
[10:54:55.574] <TB3> INFO: 41600 events read in total (3646ms).
[10:54:55.575] <TB3> INFO: Test took 4465ms.
[10:54:55.579] <TB3> INFO: scanning low vcal = 100
[10:54:55.839] <TB3> INFO: Expecting 41600 events.
[10:55:00.044] <TB3> INFO: 41600 events read in total (3648ms).
[10:55:00.045] <TB3> INFO: Test took 4466ms.
[10:55:00.048] <TB3> INFO: scanning low vcal = 110
[10:55:00.318] <TB3> INFO: Expecting 41600 events.
[10:55:04.535] <TB3> INFO: 41600 events read in total (3660ms).
[10:55:04.536] <TB3> INFO: Test took 4488ms.
[10:55:04.539] <TB3> INFO: scanning low vcal = 120
[10:55:04.807] <TB3> INFO: Expecting 41600 events.
[10:55:09.019] <TB3> INFO: 41600 events read in total (3655ms).
[10:55:09.019] <TB3> INFO: Test took 4479ms.
[10:55:09.023] <TB3> INFO: scanning low vcal = 130
[10:55:09.283] <TB3> INFO: Expecting 41600 events.
[10:55:13.517] <TB3> INFO: 41600 events read in total (3677ms).
[10:55:13.518] <TB3> INFO: Test took 4495ms.
[10:55:13.521] <TB3> INFO: scanning low vcal = 140
[10:55:13.786] <TB3> INFO: Expecting 41600 events.
[10:55:18.011] <TB3> INFO: 41600 events read in total (3668ms).
[10:55:18.012] <TB3> INFO: Test took 4491ms.
[10:55:18.016] <TB3> INFO: scanning low vcal = 150
[10:55:18.283] <TB3> INFO: Expecting 41600 events.
[10:55:22.488] <TB3> INFO: 41600 events read in total (3648ms).
[10:55:22.489] <TB3> INFO: Test took 4473ms.
[10:55:22.492] <TB3> INFO: scanning low vcal = 160
[10:55:22.755] <TB3> INFO: Expecting 41600 events.
[10:55:26.947] <TB3> INFO: 41600 events read in total (3635ms).
[10:55:26.947] <TB3> INFO: Test took 4455ms.
[10:55:26.951] <TB3> INFO: scanning low vcal = 170
[10:55:27.212] <TB3> INFO: Expecting 41600 events.
[10:55:31.416] <TB3> INFO: 41600 events read in total (3646ms).
[10:55:31.417] <TB3> INFO: Test took 4466ms.
[10:55:31.421] <TB3> INFO: scanning low vcal = 180
[10:55:31.683] <TB3> INFO: Expecting 41600 events.
[10:55:35.877] <TB3> INFO: 41600 events read in total (3637ms).
[10:55:35.878] <TB3> INFO: Test took 4457ms.
[10:55:35.881] <TB3> INFO: scanning low vcal = 190
[10:55:36.142] <TB3> INFO: Expecting 41600 events.
[10:55:40.319] <TB3> INFO: 41600 events read in total (3620ms).
[10:55:40.320] <TB3> INFO: Test took 4439ms.
[10:55:40.324] <TB3> INFO: scanning low vcal = 200
[10:55:40.591] <TB3> INFO: Expecting 41600 events.
[10:55:44.784] <TB3> INFO: 41600 events read in total (3636ms).
[10:55:44.785] <TB3> INFO: Test took 4461ms.
[10:55:44.788] <TB3> INFO: scanning low vcal = 210
[10:55:45.048] <TB3> INFO: Expecting 41600 events.
[10:55:49.228] <TB3> INFO: 41600 events read in total (3622ms).
[10:55:49.228] <TB3> INFO: Test took 4440ms.
[10:55:49.232] <TB3> INFO: scanning low vcal = 220
[10:55:49.501] <TB3> INFO: Expecting 41600 events.
[10:55:53.695] <TB3> INFO: 41600 events read in total (3637ms).
[10:55:53.696] <TB3> INFO: Test took 4464ms.
[10:55:53.699] <TB3> INFO: scanning low vcal = 230
[10:55:53.974] <TB3> INFO: Expecting 41600 events.
[10:55:58.140] <TB3> INFO: 41600 events read in total (3609ms).
[10:55:58.140] <TB3> INFO: Test took 4440ms.
[10:55:58.143] <TB3> INFO: scanning low vcal = 240
[10:55:58.404] <TB3> INFO: Expecting 41600 events.
[10:56:02.614] <TB3> INFO: 41600 events read in total (3653ms).
[10:56:02.614] <TB3> INFO: Test took 4470ms.
[10:56:02.618] <TB3> INFO: scanning low vcal = 250
[10:56:02.886] <TB3> INFO: Expecting 41600 events.
[10:56:07.059] <TB3> INFO: 41600 events read in total (3616ms).
[10:56:07.060] <TB3> INFO: Test took 4442ms.
[10:56:07.066] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[10:56:07.327] <TB3> INFO: Expecting 41600 events.
[10:56:11.492] <TB3> INFO: 41600 events read in total (3608ms).
[10:56:11.493] <TB3> INFO: Test took 4427ms.
[10:56:11.496] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[10:56:11.758] <TB3> INFO: Expecting 41600 events.
[10:56:15.925] <TB3> INFO: 41600 events read in total (3610ms).
[10:56:15.926] <TB3> INFO: Test took 4430ms.
[10:56:15.930] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[10:56:16.193] <TB3> INFO: Expecting 41600 events.
[10:56:20.414] <TB3> INFO: 41600 events read in total (3664ms).
[10:56:20.415] <TB3> INFO: Test took 4485ms.
[10:56:20.418] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[10:56:20.680] <TB3> INFO: Expecting 41600 events.
[10:56:24.888] <TB3> INFO: 41600 events read in total (3651ms).
[10:56:24.889] <TB3> INFO: Test took 4471ms.
[10:56:24.892] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[10:56:25.160] <TB3> INFO: Expecting 41600 events.
[10:56:29.388] <TB3> INFO: 41600 events read in total (3671ms).
[10:56:29.389] <TB3> INFO: Test took 4497ms.
[10:56:30.650] <TB3> INFO: PixTestGainPedestal::measure() done
[10:57:03.210] <TB3> INFO: PixTestGainPedestal::fit() done
[10:57:03.211] <TB3> INFO: non-linearity mean: 0.960 0.955 0.958 0.961 0.960 0.951 0.954 0.957 0.961 0.960 0.956 0.962 0.959 0.949 0.961 0.949
[10:57:03.211] <TB3> INFO: non-linearity RMS: 0.007 0.008 0.007 0.005 0.006 0.009 0.008 0.006 0.007 0.005 0.008 0.006 0.006 0.008 0.005 0.007
[10:57:03.212] <TB3> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[10:57:03.332] <TB3> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[10:57:03.370] <TB3> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[10:57:03.407] <TB3> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[10:57:03.443] <TB3> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[10:57:03.479] <TB3> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[10:57:03.518] <TB3> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[10:57:03.557] <TB3> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[10:57:03.594] <TB3> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[10:57:03.632] <TB3> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[10:57:03.673] <TB3> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[10:57:03.710] <TB3> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[10:57:03.747] <TB3> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[10:57:03.789] <TB3> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[10:57:03.825] <TB3> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[10:57:03.861] <TB3> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[10:57:03.897] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 166 seconds
[10:57:03.897] <TB3> INFO: Decoding statistics:
[10:57:03.897] <TB3> INFO: General information:
[10:57:03.897] <TB3> INFO: 16bit words read: 2662400
[10:57:03.897] <TB3> INFO: valid events total: 166400
[10:57:03.897] <TB3> INFO: empty events: 0
[10:57:03.897] <TB3> INFO: valid events with pixels: 166400
[10:57:03.897] <TB3> INFO: valid pixel hits: 665561
[10:57:03.897] <TB3> INFO: Event errors: 0
[10:57:03.897] <TB3> INFO: start marker: 0
[10:57:03.897] <TB3> INFO: stop marker: 0
[10:57:03.897] <TB3> INFO: overflow: 0
[10:57:03.897] <TB3> INFO: invalid 5bit words: 0
[10:57:03.897] <TB3> INFO: invalid XOR eye diagram: 0
[10:57:03.897] <TB3> INFO: frame (failed synchr.): 0
[10:57:03.897] <TB3> INFO: idle data (no TBM trl): 0
[10:57:03.897] <TB3> INFO: no data (only TBM hdr): 0
[10:57:03.897] <TB3> INFO: TBM errors: 0
[10:57:03.897] <TB3> INFO: flawed TBM headers: 0
[10:57:03.897] <TB3> INFO: flawed TBM trailers: 0
[10:57:03.897] <TB3> INFO: event ID mismatches: 0
[10:57:03.897] <TB3> INFO: ROC errors: 0
[10:57:03.897] <TB3> INFO: missing ROC header(s): 0
[10:57:03.897] <TB3> INFO: misplaced readback start: 0
[10:57:03.897] <TB3> INFO: Pixel decoding errors: 0
[10:57:03.897] <TB3> INFO: pixel data incomplete: 0
[10:57:03.897] <TB3> INFO: pixel address: 0
[10:57:03.897] <TB3> INFO: pulse height fill bit: 0
[10:57:03.897] <TB3> INFO: buffer corruption: 0
[10:57:03.905] <TB3> INFO: readReadbackCal: /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C0.dat .. /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C15.dat
[10:57:03.920] <TB3> INFO: ######################################################################
[10:57:03.920] <TB3> INFO: PixTestReadback::doTest()
[10:57:03.920] <TB3> INFO: ######################################################################
[10:57:03.920] <TB3> INFO: ----------------------------------------------------------------------
[10:57:03.920] <TB3> INFO: PixTestReadback::CalibrateVd()
[10:57:03.920] <TB3> INFO: ----------------------------------------------------------------------
[10:57:13.496] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C0.dat
[10:57:13.503] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C1.dat
[10:57:13.509] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C2.dat
[10:57:13.514] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C3.dat
[10:57:13.545] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C4.dat
[10:57:13.550] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C5.dat
[10:57:13.555] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C6.dat
[10:57:13.560] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C7.dat
[10:57:13.565] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C8.dat
[10:57:13.570] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C9.dat
[10:57:13.575] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C10.dat
[10:57:13.580] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C11.dat
[10:57:13.586] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C12.dat
[10:57:13.593] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C13.dat
[10:57:13.599] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C14.dat
[10:57:13.604] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C15.dat
[10:57:13.652] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:57:13.652] <TB3> INFO: ----------------------------------------------------------------------
[10:57:13.652] <TB3> INFO: PixTestReadback::CalibrateVa()
[10:57:13.652] <TB3> INFO: ----------------------------------------------------------------------
[10:57:23.234] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C0.dat
[10:57:23.241] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C1.dat
[10:57:23.246] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C2.dat
[10:57:23.251] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C3.dat
[10:57:23.256] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C4.dat
[10:57:23.261] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C5.dat
[10:57:23.266] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C6.dat
[10:57:23.271] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C7.dat
[10:57:23.278] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C8.dat
[10:57:23.283] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C9.dat
[10:57:23.289] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C10.dat
[10:57:23.296] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C11.dat
[10:57:23.301] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C12.dat
[10:57:23.306] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C13.dat
[10:57:23.311] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C14.dat
[10:57:23.316] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C15.dat
[10:57:23.367] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:57:23.367] <TB3> INFO: ----------------------------------------------------------------------
[10:57:23.367] <TB3> INFO: PixTestReadback::readbackVbg()
[10:57:23.367] <TB3> INFO: ----------------------------------------------------------------------
[10:57:30.690] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:57:30.691] <TB3> INFO: ----------------------------------------------------------------------
[10:57:30.691] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[10:57:30.691] <TB3> INFO: ----------------------------------------------------------------------
[10:57:30.691] <TB3> INFO: Vbg will be calibrated using Vd calibration
[10:57:30.691] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 149.3calibrated Vbg = 1.25298 :::*/*/*/*/
[10:57:30.691] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 156.8calibrated Vbg = 1.24926 :::*/*/*/*/
[10:57:30.691] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 147.1calibrated Vbg = 1.25642 :::*/*/*/*/
[10:57:30.691] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 157.1calibrated Vbg = 1.27202 :::*/*/*/*/
[10:57:30.691] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 151.3calibrated Vbg = 1.27375 :::*/*/*/*/
[10:57:30.691] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 172.5calibrated Vbg = 1.27808 :::*/*/*/*/
[10:57:30.691] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 157.9calibrated Vbg = 1.2759 :::*/*/*/*/
[10:57:30.691] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 148.5calibrated Vbg = 1.27513 :::*/*/*/*/
[10:57:30.692] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 158.6calibrated Vbg = 1.26925 :::*/*/*/*/
[10:57:30.692] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 156.9calibrated Vbg = 1.27275 :::*/*/*/*/
[10:57:30.692] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 151.9calibrated Vbg = 1.26367 :::*/*/*/*/
[10:57:30.692] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 150.9calibrated Vbg = 1.2547 :::*/*/*/*/
[10:57:30.692] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 153.5calibrated Vbg = 1.25513 :::*/*/*/*/
[10:57:30.692] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 156.2calibrated Vbg = 1.25341 :::*/*/*/*/
[10:57:30.692] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 151.6calibrated Vbg = 1.25354 :::*/*/*/*/
[10:57:30.692] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 151.4calibrated Vbg = 1.25436 :::*/*/*/*/
[10:57:30.695] <TB3> INFO: ----------------------------------------------------------------------
[10:57:30.695] <TB3> INFO: PixTestReadback::CalibrateIa()
[10:57:30.695] <TB3> INFO: ----------------------------------------------------------------------
[11:00:06.798] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C0.dat
[11:00:06.804] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C1.dat
[11:00:06.810] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C2.dat
[11:00:06.817] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C3.dat
[11:00:06.822] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C4.dat
[11:00:06.827] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C5.dat
[11:00:06.832] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C6.dat
[11:00:06.837] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C7.dat
[11:00:06.843] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C8.dat
[11:00:06.848] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C9.dat
[11:00:06.854] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C10.dat
[11:00:06.865] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C11.dat
[11:00:06.872] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C12.dat
[11:00:06.877] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C13.dat
[11:00:06.882] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C14.dat
[11:00:06.888] <TB3> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2187_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C15.dat
[11:00:06.937] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:00:06.938] <TB3> INFO: PixTestReadback::doTest() done
[11:00:06.938] <TB3> INFO: Decoding statistics:
[11:00:06.938] <TB3> INFO: General information:
[11:00:06.938] <TB3> INFO: 16bit words read: 1024
[11:00:06.938] <TB3> INFO: valid events total: 128
[11:00:06.938] <TB3> INFO: empty events: 128
[11:00:06.938] <TB3> INFO: valid events with pixels: 0
[11:00:06.938] <TB3> INFO: valid pixel hits: 0
[11:00:06.938] <TB3> INFO: Event errors: 0
[11:00:06.938] <TB3> INFO: start marker: 0
[11:00:06.938] <TB3> INFO: stop marker: 0
[11:00:06.938] <TB3> INFO: overflow: 0
[11:00:06.938] <TB3> INFO: invalid 5bit words: 0
[11:00:06.938] <TB3> INFO: invalid XOR eye diagram: 0
[11:00:06.938] <TB3> INFO: frame (failed synchr.): 0
[11:00:06.938] <TB3> INFO: idle data (no TBM trl): 0
[11:00:06.938] <TB3> INFO: no data (only TBM hdr): 0
[11:00:06.938] <TB3> INFO: TBM errors: 0
[11:00:06.938] <TB3> INFO: flawed TBM headers: 0
[11:00:06.938] <TB3> INFO: flawed TBM trailers: 0
[11:00:06.938] <TB3> INFO: event ID mismatches: 0
[11:00:06.938] <TB3> INFO: ROC errors: 0
[11:00:06.938] <TB3> INFO: missing ROC header(s): 0
[11:00:06.938] <TB3> INFO: misplaced readback start: 0
[11:00:06.938] <TB3> INFO: Pixel decoding errors: 0
[11:00:06.938] <TB3> INFO: pixel data incomplete: 0
[11:00:06.938] <TB3> INFO: pixel address: 0
[11:00:06.938] <TB3> INFO: pulse height fill bit: 0
[11:00:06.938] <TB3> INFO: buffer corruption: 0
[11:00:06.955] <TB3> INFO: Decoding statistics:
[11:00:06.955] <TB3> INFO: General information:
[11:00:06.955] <TB3> INFO: 16bit words read: 2755348
[11:00:06.955] <TB3> INFO: valid events total: 176768
[11:00:06.955] <TB3> INFO: empty events: 7867
[11:00:06.955] <TB3> INFO: valid events with pixels: 168901
[11:00:06.955] <TB3> INFO: valid pixel hits: 668062
[11:00:06.955] <TB3> INFO: Event errors: 0
[11:00:06.955] <TB3> INFO: start marker: 0
[11:00:06.955] <TB3> INFO: stop marker: 0
[11:00:06.955] <TB3> INFO: overflow: 0
[11:00:06.956] <TB3> INFO: invalid 5bit words: 0
[11:00:06.956] <TB3> INFO: invalid XOR eye diagram: 0
[11:00:06.956] <TB3> INFO: frame (failed synchr.): 0
[11:00:06.956] <TB3> INFO: idle data (no TBM trl): 0
[11:00:06.956] <TB3> INFO: no data (only TBM hdr): 0
[11:00:06.956] <TB3> INFO: TBM errors: 0
[11:00:06.956] <TB3> INFO: flawed TBM headers: 0
[11:00:06.956] <TB3> INFO: flawed TBM trailers: 0
[11:00:06.956] <TB3> INFO: event ID mismatches: 0
[11:00:06.956] <TB3> INFO: ROC errors: 0
[11:00:06.956] <TB3> INFO: missing ROC header(s): 0
[11:00:06.956] <TB3> INFO: misplaced readback start: 0
[11:00:06.956] <TB3> INFO: Pixel decoding errors: 0
[11:00:06.956] <TB3> INFO: pixel data incomplete: 0
[11:00:06.956] <TB3> INFO: pixel address: 0
[11:00:06.956] <TB3> INFO: pulse height fill bit: 0
[11:00:06.956] <TB3> INFO: buffer corruption: 0
[11:00:06.956] <TB3> INFO: enter test to run
[11:00:06.956] <TB3> INFO: test: exit no parameter change
[11:00:06.999] <TB3> QUIET: Connection to board 126 closed.
[11:00:07.079] <TB3> INFO: pXar: this is the end, my friend