[09:35:51.036] <TB2> INFO: *** Welcome to pxar ***
[09:35:51.036] <TB2> INFO: *** Today: 2016/03/23
[09:35:51.081] <TB2> INFO: *** Version: 9751-dirty
[09:35:51.081] <TB2> INFO: readRocDacs: /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C0.dat .. /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C15.dat
[09:35:51.099] <TB2> INFO: readTbmDacs: /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//tbmParameters_C0a.dat .. /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//tbmParameters_C0b.dat
[09:35:51.101] <TB2> INFO: readMaskFile: /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//defaultMaskFile.dat
[09:35:51.102] <TB2> INFO: readTrimFile: /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters_C0.dat .. /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters_C15.dat
[09:35:51.218] <TB2> INFO: clk: 4
[09:35:51.218] <TB2> INFO: ctr: 4
[09:35:51.218] <TB2> INFO: sda: 19
[09:35:51.218] <TB2> INFO: tin: 9
[09:35:51.218] <TB2> INFO: level: 15
[09:35:51.218] <TB2> INFO: triggerdelay: 0
[09:35:51.218] <TB2> QUIET: Instanciating API for pxar v2.7.5+40~g4fce89b
[09:35:51.218] <TB2> INFO: Log level: INFO
[09:35:51.225] <TB2> INFO: Found DTB DTB_WWXUD2
[09:35:51.235] <TB2> QUIET: Connection to board DTB_WWXUD2 opened.
[09:35:51.237] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 149
HW version: DTB1.2
FW version: 4.4
SW version: 4.6
Options:
USB id: DTB_WWXUD2
MAC address: 40D855118095
Hostname: pixelDTB149
Comment:
------------------------------------------------------
[09:35:51.239] <TB2> INFO: RPC call hashes of host and DTB match: 484264910
[09:35:52.768] <TB2> INFO: DUT info:
[09:35:52.768] <TB2> INFO: The DUT currently contains the following objects:
[09:35:52.768] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:35:52.769] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:35:52.769] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:35:52.769] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[09:35:52.769] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:52.769] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:52.769] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:52.769] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:52.769] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:52.769] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:52.769] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:52.769] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:52.769] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:52.769] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:52.769] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:52.769] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:52.769] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:52.769] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:52.769] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:52.769] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:53.172] <TB2> INFO: enter 'restricted' command line mode
[09:35:53.172] <TB2> INFO: enter test to run
[09:35:53.172] <TB2> INFO: test: pretest no parameter change
[09:35:53.172] <TB2> INFO: running: pretest
[09:35:53.181] <TB2> INFO: ----------------------------------------------------------------------
[09:35:53.181] <TB2> INFO: PixTestPretest::programROC()
[09:35:53.181] <TB2> INFO: ----------------------------------------------------------------------
[09:36:11.200] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[09:36:11.200] <TB2> INFO: IA differences per ROC: 20.9 19.3 19.3 19.3 20.1 19.3 21.7 19.3 19.3 18.5 20.1 19.3 18.5 19.3 20.9 21.7
[09:36:11.311] <TB2> INFO: enter test to run
[09:36:11.311] <TB2> INFO: test: pretest no parameter change
[09:36:11.311] <TB2> INFO: running: pretest
[09:36:11.312] <TB2> INFO: ----------------------------------------------------------------------
[09:36:11.312] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[09:36:11.312] <TB2> INFO: ----------------------------------------------------------------------
[09:36:32.636] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 384.3 mA = 24.0187 mA/ROC
[09:36:32.636] <TB2> INFO: i(loss) [mA/ROC]: 19.3 19.3 19.3 19.3 18.5 19.3 19.3 19.3 18.5 18.5 19.3 19.3 18.5 19.3 17.7 19.3
[09:36:32.682] <TB2> INFO: enter test to run
[09:36:32.683] <TB2> INFO: test: pretest no parameter change
[09:36:32.683] <TB2> INFO: running: pretest
[09:36:32.683] <TB2> INFO: ----------------------------------------------------------------------
[09:36:32.683] <TB2> INFO: PixTestPretest::findTiming()
[09:36:32.683] <TB2> INFO: ----------------------------------------------------------------------
[09:36:32.683] <TB2> INFO: PixTestCmd::init()

[09:38:03.665] <TB2> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):4, header/trailer: 1, token: 1
[09:38:03.665] <TB2> INFO: (success/tries = 100/100), width = 5
[09:38:03.666] <TB2> INFO: enter test to run
[09:38:03.666] <TB2> INFO: test: pretest no parameter change
[09:38:03.666] <TB2> INFO: running: pretest
[09:38:03.668] <TB2> INFO: ----------------------------------------------------------------------
[09:38:03.668] <TB2> INFO: PixTestPretest::findWorkingPixel()
[09:38:03.668] <TB2> INFO: ----------------------------------------------------------------------
[09:38:03.760] <TB2> INFO: Expecting 231680 events.


[09:38:13.989] <TB2> INFO: 231680 events read in total (9672ms).
[09:38:13.994] <TB2> INFO: Test took 10324ms.
[09:38:14.245] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[09:38:14.331] <TB2> INFO: enter test to run
[09:38:14.331] <TB2> INFO: test: pretest no parameter change
[09:38:14.331] <TB2> INFO: running: pretest
[09:38:14.333] <TB2> INFO: ----------------------------------------------------------------------
[09:38:14.333] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[09:38:14.333] <TB2> INFO: ----------------------------------------------------------------------
[09:38:14.428] <TB2> INFO: Expecting 231680 events.
[09:38:24.575] <TB2> INFO: 231680 events read in total (9589ms).
[09:38:24.579] <TB2> INFO: Test took 10241ms.
[09:38:24.852] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[09:38:24.852] <TB2> INFO: CalDel: 121 161 140 137 158 145 155 133 144 143 115 128 142 127 116 139
[09:38:24.852] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[09:38:24.890] <TB2> INFO: enter test to run
[09:38:24.890] <TB2> INFO: test: pretest no parameter change
[09:38:24.890] <TB2> INFO: running: pretest
[09:38:24.895] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C0.dat
[09:38:24.900] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C1.dat
[09:38:24.908] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C2.dat
[09:38:24.913] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C3.dat
[09:38:24.919] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C4.dat
[09:38:24.924] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C5.dat
[09:38:24.929] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C6.dat
[09:38:24.935] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C7.dat
[09:38:24.940] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C8.dat
[09:38:24.945] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C9.dat
[09:38:24.951] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C10.dat
[09:38:24.956] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C11.dat
[09:38:24.961] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C12.dat
[09:38:24.966] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C13.dat
[09:38:24.971] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C14.dat
[09:38:24.976] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C15.dat
[09:38:24.978] <TB2> INFO: enter test to run
[09:38:24.978] <TB2> INFO: test: fulltest no parameter change
[09:38:24.978] <TB2> INFO: running: fulltest
[09:38:24.978] <TB2> INFO: ######################################################################
[09:38:24.978] <TB2> INFO: PixTestFullTest::doTest()
[09:38:24.978] <TB2> INFO: ######################################################################
[09:38:24.980] <TB2> INFO: ######################################################################
[09:38:24.980] <TB2> INFO: PixTestAlive::doTest()
[09:38:24.980] <TB2> INFO: ######################################################################
[09:38:24.981] <TB2> INFO: ----------------------------------------------------------------------
[09:38:24.981] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:38:24.981] <TB2> INFO: ----------------------------------------------------------------------
[09:38:25.250] <TB2> INFO: Expecting 41600 events.
[09:38:29.079] <TB2> INFO: 41600 events read in total (3272ms).
[09:38:29.080] <TB2> INFO: Test took 4096ms.
[09:38:29.326] <TB2> INFO: PixTestAlive::aliveTest() done
[09:38:29.326] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
[09:38:29.327] <TB2> INFO: ----------------------------------------------------------------------
[09:38:29.327] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:38:29.328] <TB2> INFO: ----------------------------------------------------------------------
[09:38:29.590] <TB2> INFO: Expecting 41600 events.
[09:38:32.547] <TB2> INFO: 41600 events read in total (2400ms).
[09:38:32.547] <TB2> INFO: Test took 3217ms.
[09:38:32.547] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[09:38:32.809] <TB2> INFO: PixTestAlive::maskTest() done
[09:38:32.809] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:38:32.811] <TB2> INFO: ----------------------------------------------------------------------
[09:38:32.811] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:38:32.811] <TB2> INFO: ----------------------------------------------------------------------
[09:38:33.079] <TB2> INFO: Expecting 41600 events.
[09:38:36.823] <TB2> INFO: 41600 events read in total (3187ms).
[09:38:36.823] <TB2> INFO: Test took 4010ms.
[09:38:37.071] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[09:38:37.071] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:38:37.071] <TB2> INFO: PixTestAlive::doTest() done, duration: 12 seconds
[09:38:37.071] <TB2> INFO: Decoding statistics:
[09:38:37.071] <TB2> INFO: General information:
[09:38:37.071] <TB2> INFO: 16bit words read: 0
[09:38:37.071] <TB2> INFO: valid events total: 0
[09:38:37.071] <TB2> INFO: empty events: 0
[09:38:37.071] <TB2> INFO: valid events with pixels: 0
[09:38:37.071] <TB2> INFO: valid pixel hits: 0
[09:38:37.071] <TB2> INFO: Event errors: 0
[09:38:37.071] <TB2> INFO: start marker: 0
[09:38:37.071] <TB2> INFO: stop marker: 0
[09:38:37.071] <TB2> INFO: overflow: 0
[09:38:37.071] <TB2> INFO: invalid 5bit words: 0
[09:38:37.071] <TB2> INFO: invalid XOR eye diagram: 0
[09:38:37.071] <TB2> INFO: frame (failed synchr.): 0
[09:38:37.071] <TB2> INFO: idle data (no TBM trl): 0
[09:38:37.071] <TB2> INFO: no data (only TBM hdr): 0
[09:38:37.071] <TB2> INFO: TBM errors: 0
[09:38:37.071] <TB2> INFO: flawed TBM headers: 0
[09:38:37.071] <TB2> INFO: flawed TBM trailers: 0
[09:38:37.071] <TB2> INFO: event ID mismatches: 0
[09:38:37.071] <TB2> INFO: ROC errors: 0
[09:38:37.071] <TB2> INFO: missing ROC header(s): 0
[09:38:37.071] <TB2> INFO: misplaced readback start: 0
[09:38:37.071] <TB2> INFO: Pixel decoding errors: 0
[09:38:37.071] <TB2> INFO: pixel data incomplete: 0
[09:38:37.071] <TB2> INFO: pixel address: 0
[09:38:37.071] <TB2> INFO: pulse height fill bit: 0
[09:38:37.071] <TB2> INFO: buffer corruption: 0
[09:38:37.078] <TB2> INFO: ######################################################################
[09:38:37.078] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[09:38:37.078] <TB2> INFO: ######################################################################
[09:38:37.082] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[09:38:37.095] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[09:38:37.095] <TB2> INFO: run 1 of 1
[09:38:37.358] <TB2> INFO: Expecting 3120000 events.
[09:39:18.971] <TB2> INFO: 886660 events read in total (41056ms).
[09:39:59.951] <TB2> INFO: 1762045 events read in total (82036ms).
[09:40:41.058] <TB2> INFO: 2647250 events read in total (123143ms).
[09:41:03.222] <TB2> INFO: 3120000 events read in total (145307ms).
[09:41:03.274] <TB2> INFO: Test took 146178ms.
[09:41:27.827] <TB2> INFO: PixTestBBMap::doTest() done, duration: 170 seconds
[09:41:27.828] <TB2> INFO: number of dead bumps (per ROC): 3 0 0 0 1 1 0 0 1 0 1 0 0 0 1 22
[09:41:27.828] <TB2> INFO: separation cut (per ROC): 98 90 89 96 85 100 94 99 88 87 103 102 92 94 100 89
[09:41:27.828] <TB2> INFO: Decoding statistics:
[09:41:27.828] <TB2> INFO: General information:
[09:41:27.828] <TB2> INFO: 16bit words read: 0
[09:41:27.828] <TB2> INFO: valid events total: 0
[09:41:27.828] <TB2> INFO: empty events: 0
[09:41:27.828] <TB2> INFO: valid events with pixels: 0
[09:41:27.828] <TB2> INFO: valid pixel hits: 0
[09:41:27.828] <TB2> INFO: Event errors: 0
[09:41:27.828] <TB2> INFO: start marker: 0
[09:41:27.828] <TB2> INFO: stop marker: 0
[09:41:27.828] <TB2> INFO: overflow: 0
[09:41:27.828] <TB2> INFO: invalid 5bit words: 0
[09:41:27.828] <TB2> INFO: invalid XOR eye diagram: 0
[09:41:27.828] <TB2> INFO: frame (failed synchr.): 0
[09:41:27.828] <TB2> INFO: idle data (no TBM trl): 0
[09:41:27.828] <TB2> INFO: no data (only TBM hdr): 0
[09:41:27.828] <TB2> INFO: TBM errors: 0
[09:41:27.828] <TB2> INFO: flawed TBM headers: 0
[09:41:27.828] <TB2> INFO: flawed TBM trailers: 0
[09:41:27.828] <TB2> INFO: event ID mismatches: 0
[09:41:27.828] <TB2> INFO: ROC errors: 0
[09:41:27.828] <TB2> INFO: missing ROC header(s): 0
[09:41:27.828] <TB2> INFO: misplaced readback start: 0
[09:41:27.828] <TB2> INFO: Pixel decoding errors: 0
[09:41:27.828] <TB2> INFO: pixel data incomplete: 0
[09:41:27.828] <TB2> INFO: pixel address: 0
[09:41:27.828] <TB2> INFO: pulse height fill bit: 0
[09:41:27.828] <TB2> INFO: buffer corruption: 0
[09:41:27.916] <TB2> INFO: ######################################################################
[09:41:27.916] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:41:27.916] <TB2> INFO: ######################################################################
[09:41:27.916] <TB2> INFO: ----------------------------------------------------------------------
[09:41:27.916] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:41:27.916] <TB2> INFO: ----------------------------------------------------------------------
[09:41:27.916] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[09:41:27.924] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[09:41:27.924] <TB2> INFO: run 1 of 1
[09:41:28.192] <TB2> INFO: Expecting 26208000 events.
[09:42:02.537] <TB2> INFO: 950850 events read in total (33786ms).
[09:42:35.740] <TB2> INFO: 1883250 events read in total (66989ms).
[09:43:09.479] <TB2> INFO: 2813950 events read in total (100728ms).
[09:43:43.086] <TB2> INFO: 3742000 events read in total (134335ms).
[09:44:16.587] <TB2> INFO: 4670300 events read in total (167836ms).
[09:44:49.961] <TB2> INFO: 5593900 events read in total (201210ms).
[09:45:22.977] <TB2> INFO: 6518700 events read in total (234226ms).
[09:45:56.557] <TB2> INFO: 7441350 events read in total (267806ms).
[09:46:29.716] <TB2> INFO: 8364200 events read in total (300966ms).
[09:47:02.928] <TB2> INFO: 9286350 events read in total (334177ms).
[09:47:36.024] <TB2> INFO: 10206700 events read in total (367273ms).
[09:48:09.475] <TB2> INFO: 11125700 events read in total (400724ms).
[09:48:43.039] <TB2> INFO: 12044650 events read in total (434288ms).
[09:49:16.382] <TB2> INFO: 12960450 events read in total (467631ms).
[09:49:49.620] <TB2> INFO: 13869850 events read in total (500869ms).
[09:50:22.662] <TB2> INFO: 14776100 events read in total (533911ms).
[09:50:55.948] <TB2> INFO: 15680050 events read in total (567197ms).
[09:51:28.773] <TB2> INFO: 16580350 events read in total (600022ms).
[09:52:02.064] <TB2> INFO: 17481350 events read in total (633313ms).
[09:52:36.299] <TB2> INFO: 18384200 events read in total (667548ms).
[09:53:10.385] <TB2> INFO: 19284250 events read in total (701634ms).
[09:53:44.777] <TB2> INFO: 20184600 events read in total (736026ms).
[09:54:17.959] <TB2> INFO: 21082850 events read in total (769208ms).
[09:54:51.073] <TB2> INFO: 21980200 events read in total (802322ms).
[09:55:24.635] <TB2> INFO: 22879000 events read in total (835884ms).
[09:55:57.909] <TB2> INFO: 23778450 events read in total (869158ms).
[09:56:31.082] <TB2> INFO: 24676500 events read in total (902331ms).
[09:57:04.650] <TB2> INFO: 25575050 events read in total (935899ms).
[09:57:27.726] <TB2> INFO: 26208000 events read in total (958975ms).
[09:57:27.762] <TB2> INFO: Test took 959838ms.
[09:57:28.075] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:57:29.921] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:57:31.553] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:57:33.018] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:57:34.497] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:57:36.109] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:57:37.541] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:57:39.047] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:57:40.465] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:57:42.055] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:57:43.506] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:57:44.921] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:57:46.305] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:57:47.933] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:57:49.499] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:57:50.948] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:57:52.608] <TB2> INFO: PixTestScurves::scurves() done
[09:57:52.608] <TB2> INFO: Vcal mean: 99.00 91.45 86.13 100.87 84.86 100.91 101.35 98.84 98.93 95.12 108.66 116.17 99.13 97.03 98.06 105.03
[09:57:52.608] <TB2> INFO: Vcal RMS: 5.59 5.60 5.25 5.67 4.51 5.22 5.27 5.68 5.61 5.19 4.59 6.38 5.65 4.95 6.26 4.90
[09:57:52.608] <TB2> INFO: PixTestScurves::fullTest() done, duration: 984 seconds
[09:57:52.608] <TB2> INFO: Decoding statistics:
[09:57:52.608] <TB2> INFO: General information:
[09:57:52.608] <TB2> INFO: 16bit words read: 0
[09:57:52.608] <TB2> INFO: valid events total: 0
[09:57:52.608] <TB2> INFO: empty events: 0
[09:57:52.608] <TB2> INFO: valid events with pixels: 0
[09:57:52.608] <TB2> INFO: valid pixel hits: 0
[09:57:52.608] <TB2> INFO: Event errors: 0
[09:57:52.608] <TB2> INFO: start marker: 0
[09:57:52.608] <TB2> INFO: stop marker: 0
[09:57:52.609] <TB2> INFO: overflow: 0
[09:57:52.609] <TB2> INFO: invalid 5bit words: 0
[09:57:52.609] <TB2> INFO: invalid XOR eye diagram: 0
[09:57:52.609] <TB2> INFO: frame (failed synchr.): 0
[09:57:52.609] <TB2> INFO: idle data (no TBM trl): 0
[09:57:52.609] <TB2> INFO: no data (only TBM hdr): 0
[09:57:52.609] <TB2> INFO: TBM errors: 0
[09:57:52.609] <TB2> INFO: flawed TBM headers: 0
[09:57:52.609] <TB2> INFO: flawed TBM trailers: 0
[09:57:52.609] <TB2> INFO: event ID mismatches: 0
[09:57:52.609] <TB2> INFO: ROC errors: 0
[09:57:52.609] <TB2> INFO: missing ROC header(s): 0
[09:57:52.609] <TB2> INFO: misplaced readback start: 0
[09:57:52.609] <TB2> INFO: Pixel decoding errors: 0
[09:57:52.609] <TB2> INFO: pixel data incomplete: 0
[09:57:52.609] <TB2> INFO: pixel address: 0
[09:57:52.609] <TB2> INFO: pulse height fill bit: 0
[09:57:52.609] <TB2> INFO: buffer corruption: 0
[09:57:52.680] <TB2> INFO: ######################################################################
[09:57:52.680] <TB2> INFO: PixTestTrim::doTest()
[09:57:52.680] <TB2> INFO: ######################################################################
[09:57:52.682] <TB2> INFO: ----------------------------------------------------------------------
[09:57:52.682] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[09:57:52.682] <TB2> INFO: ----------------------------------------------------------------------
[09:57:52.764] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:57:52.764] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[09:57:52.772] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[09:57:52.772] <TB2> INFO: run 1 of 1
[09:57:53.038] <TB2> INFO: Expecting 5025280 events.
[09:58:35.019] <TB2> INFO: 1096712 events read in total (41420ms).
[09:59:15.936] <TB2> INFO: 2186560 events read in total (82337ms).
[09:59:57.058] <TB2> INFO: 3276920 events read in total (123459ms).
[10:00:38.407] <TB2> INFO: 4372952 events read in total (164808ms).
[10:01:03.003] <TB2> INFO: 5025280 events read in total (189404ms).
[10:01:03.034] <TB2> INFO: Test took 190263ms.
[10:01:23.357] <TB2> INFO: ROC 0 VthrComp = 99
[10:01:23.358] <TB2> INFO: ROC 1 VthrComp = 90
[10:01:23.358] <TB2> INFO: ROC 2 VthrComp = 85
[10:01:23.358] <TB2> INFO: ROC 3 VthrComp = 97
[10:01:23.358] <TB2> INFO: ROC 4 VthrComp = 85
[10:01:23.358] <TB2> INFO: ROC 5 VthrComp = 101
[10:01:23.358] <TB2> INFO: ROC 6 VthrComp = 100
[10:01:23.358] <TB2> INFO: ROC 7 VthrComp = 101
[10:01:23.358] <TB2> INFO: ROC 8 VthrComp = 99
[10:01:23.359] <TB2> INFO: ROC 9 VthrComp = 93
[10:01:23.359] <TB2> INFO: ROC 10 VthrComp = 107
[10:01:23.359] <TB2> INFO: ROC 11 VthrComp = 103
[10:01:23.359] <TB2> INFO: ROC 12 VthrComp = 95
[10:01:23.359] <TB2> INFO: ROC 13 VthrComp = 98
[10:01:23.359] <TB2> INFO: ROC 14 VthrComp = 97
[10:01:23.359] <TB2> INFO: ROC 15 VthrComp = 103
[10:01:23.360] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[10:01:23.360] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[10:01:23.368] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[10:01:23.368] <TB2> INFO: run 1 of 1
[10:01:23.650] <TB2> INFO: Expecting 5025280 events.
[10:02:00.784] <TB2> INFO: 756632 events read in total (36577ms).
[10:02:36.471] <TB2> INFO: 1511616 events read in total (72264ms).
[10:03:12.580] <TB2> INFO: 2266928 events read in total (108373ms).
[10:03:48.118] <TB2> INFO: 3017816 events read in total (143911ms).
[10:04:24.211] <TB2> INFO: 3762624 events read in total (180004ms).
[10:04:59.980] <TB2> INFO: 4505960 events read in total (215773ms).
[10:05:25.129] <TB2> INFO: 5025280 events read in total (240922ms).
[10:05:25.179] <TB2> INFO: Test took 241811ms.
[10:05:50.363] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 59.1046 for pixel 22/7 mean/min/max = 45.6907/32.2491/59.1322
[10:05:50.364] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 59.4452 for pixel 3/5 mean/min/max = 46.4209/33.1461/59.6956
[10:05:50.364] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 58.2226 for pixel 5/13 mean/min/max = 45.396/32.4253/58.3666
[10:05:50.364] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 59.9096 for pixel 1/14 mean/min/max = 46.147/32.2966/59.9973
[10:05:50.365] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 56.2876 for pixel 49/0 mean/min/max = 44.7613/33.2286/56.294
[10:05:50.365] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 57.478 for pixel 27/6 mean/min/max = 44.8241/31.9367/57.7115
[10:05:50.365] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 58.44 for pixel 23/10 mean/min/max = 45.1979/31.9134/58.4825
[10:05:50.365] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 57.9471 for pixel 0/26 mean/min/max = 44.5622/31.1567/57.9678
[10:05:50.366] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 57.165 for pixel 21/37 mean/min/max = 44.5784/31.6184/57.5384
[10:05:50.366] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 58.7879 for pixel 0/71 mean/min/max = 46.4095/34.0131/58.8059
[10:05:50.366] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 59.518 for pixel 20/27 mean/min/max = 47.5665/35.2798/59.8532
[10:05:50.366] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 67.8453 for pixel 3/79 mean/min/max = 50.4646/32.5372/68.392
[10:05:50.366] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 60.4451 for pixel 11/0 mean/min/max = 46.8/33.0736/60.5265
[10:05:50.367] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 57.4637 for pixel 4/60 mean/min/max = 44.5268/31.5028/57.5508
[10:05:50.367] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 61.8964 for pixel 0/77 mean/min/max = 46.517/30.9702/62.0639
[10:05:50.367] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 56.8409 for pixel 16/9 mean/min/max = 44.6502/32.4268/56.8735
[10:05:50.368] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:05:50.458] <TB2> INFO: Expecting 411648 events.
[10:06:01.010] <TB2> INFO: 411648 events read in total (9995ms).
[10:06:01.015] <TB2> INFO: Expecting 411648 events.
[10:06:11.567] <TB2> INFO: 411648 events read in total (10123ms).
[10:06:11.573] <TB2> INFO: Expecting 411648 events.
[10:06:22.174] <TB2> INFO: 411648 events read in total (10174ms).
[10:06:22.185] <TB2> INFO: Expecting 411648 events.
[10:06:32.740] <TB2> INFO: 411648 events read in total (10138ms).
[10:06:32.752] <TB2> INFO: Expecting 411648 events.
[10:06:43.266] <TB2> INFO: 411648 events read in total (10091ms).
[10:06:43.278] <TB2> INFO: Expecting 411648 events.
[10:06:53.841] <TB2> INFO: 411648 events read in total (10141ms).
[10:06:53.858] <TB2> INFO: Expecting 411648 events.
[10:07:04.426] <TB2> INFO: 411648 events read in total (10149ms).
[10:07:04.442] <TB2> INFO: Expecting 411648 events.
[10:07:14.975] <TB2> INFO: 411648 events read in total (10123ms).
[10:07:14.999] <TB2> INFO: Expecting 411648 events.
[10:07:25.578] <TB2> INFO: 411648 events read in total (10175ms).
[10:07:25.599] <TB2> INFO: Expecting 411648 events.
[10:07:36.156] <TB2> INFO: 411648 events read in total (10143ms).
[10:07:36.179] <TB2> INFO: Expecting 411648 events.
[10:07:46.719] <TB2> INFO: 411648 events read in total (10128ms).
[10:07:46.744] <TB2> INFO: Expecting 411648 events.
[10:07:57.327] <TB2> INFO: 411648 events read in total (10180ms).
[10:07:57.355] <TB2> INFO: Expecting 411648 events.
[10:08:07.968] <TB2> INFO: 411648 events read in total (10209ms).
[10:08:07.998] <TB2> INFO: Expecting 411648 events.
[10:08:18.508] <TB2> INFO: 411648 events read in total (10104ms).
[10:08:18.537] <TB2> INFO: Expecting 411648 events.
[10:08:29.009] <TB2> INFO: 411648 events read in total (10065ms).
[10:08:29.040] <TB2> INFO: Expecting 411648 events.
[10:08:39.519] <TB2> INFO: 411648 events read in total (10075ms).
[10:08:39.552] <TB2> INFO: Test took 169184ms.
[10:08:40.400] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[10:08:40.408] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[10:08:40.408] <TB2> INFO: run 1 of 1
[10:08:40.670] <TB2> INFO: Expecting 5025280 events.
[10:09:17.138] <TB2> INFO: 742192 events read in total (35911ms).
[10:09:53.322] <TB2> INFO: 1483096 events read in total (72095ms).
[10:10:29.200] <TB2> INFO: 2224208 events read in total (107973ms).
[10:11:05.209] <TB2> INFO: 2960808 events read in total (143982ms).
[10:11:40.950] <TB2> INFO: 3691040 events read in total (179723ms).
[10:12:16.479] <TB2> INFO: 4418536 events read in total (215252ms).
[10:12:46.275] <TB2> INFO: 5025280 events read in total (245048ms).
[10:12:46.324] <TB2> INFO: Test took 245915ms.
[10:13:12.654] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 2.500000 .. 255.000000
[10:13:12.745] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 2 .. 255 (-1/-1) hits flags = 528 (plus default)
[10:13:12.754] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[10:13:12.754] <TB2> INFO: run 1 of 1
[10:13:13.037] <TB2> INFO: Expecting 8453120 events.
[10:13:49.338] <TB2> INFO: 709984 events read in total (35741ms).
[10:14:24.491] <TB2> INFO: 1419816 events read in total (70894ms).
[10:15:00.355] <TB2> INFO: 2129864 events read in total (106758ms).
[10:15:35.765] <TB2> INFO: 2840048 events read in total (142168ms).
[10:16:11.645] <TB2> INFO: 3550416 events read in total (178048ms).
[10:16:47.304] <TB2> INFO: 4260456 events read in total (213707ms).
[10:17:22.469] <TB2> INFO: 4970552 events read in total (248872ms).
[10:17:58.004] <TB2> INFO: 5679248 events read in total (284407ms).
[10:18:33.776] <TB2> INFO: 6387968 events read in total (320179ms).
[10:19:09.070] <TB2> INFO: 7095944 events read in total (355473ms).
[10:19:45.011] <TB2> INFO: 7803712 events read in total (391414ms).
[10:20:17.958] <TB2> INFO: 8453120 events read in total (424361ms).
[10:20:18.081] <TB2> INFO: Test took 425326ms.
[10:20:48.651] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 15.132129 .. 46.878221
[10:20:48.729] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 5 .. 56 (-1/-1) hits flags = 528 (plus default)
[10:20:48.737] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[10:20:48.737] <TB2> INFO: run 1 of 1
[10:20:49.007] <TB2> INFO: Expecting 1730560 events.
[10:21:28.829] <TB2> INFO: 930736 events read in total (39265ms).
[10:22:02.626] <TB2> INFO: 1730560 events read in total (73062ms).
[10:22:02.640] <TB2> INFO: Test took 73903ms.
[10:22:18.162] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 22.056209 .. 45.123414
[10:22:18.242] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 12 .. 55 (-1/-1) hits flags = 528 (plus default)
[10:22:18.250] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[10:22:18.250] <TB2> INFO: run 1 of 1
[10:22:18.534] <TB2> INFO: Expecting 1464320 events.
[10:23:01.465] <TB2> INFO: 898848 events read in total (42374ms).
[10:23:26.352] <TB2> INFO: 1464320 events read in total (67261ms).
[10:23:26.367] <TB2> INFO: Test took 68116ms.
[10:23:42.186] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 24.544542 .. 44.395527
[10:23:42.265] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 14 .. 54 (-1/-1) hits flags = 528 (plus default)
[10:23:42.273] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[10:23:42.273] <TB2> INFO: run 1 of 1
[10:23:42.538] <TB2> INFO: Expecting 1364480 events.
[10:24:22.290] <TB2> INFO: 892480 events read in total (39196ms).
[10:24:43.058] <TB2> INFO: 1364480 events read in total (59964ms).
[10:24:43.075] <TB2> INFO: Test took 60803ms.
[10:24:56.691] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[10:24:56.691] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[10:24:56.699] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[10:24:56.699] <TB2> INFO: run 1 of 1
[10:24:56.961] <TB2> INFO: Expecting 1364480 events.
[10:25:36.365] <TB2> INFO: 878744 events read in total (38847ms).
[10:25:58.146] <TB2> INFO: 1364480 events read in total (60628ms).
[10:25:58.161] <TB2> INFO: Test took 61463ms.
[10:26:13.071] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C0.dat
[10:26:13.082] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C1.dat
[10:26:13.086] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C2.dat
[10:26:13.090] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C3.dat
[10:26:13.094] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C4.dat
[10:26:13.098] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C5.dat
[10:26:13.101] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C6.dat
[10:26:13.105] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C7.dat
[10:26:13.109] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C8.dat
[10:26:13.112] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C9.dat
[10:26:13.116] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C10.dat
[10:26:13.120] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C11.dat
[10:26:13.124] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C12.dat
[10:26:13.128] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C13.dat
[10:26:13.132] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C14.dat
[10:26:13.136] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C15.dat
[10:26:13.140] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C0.dat
[10:26:13.155] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C1.dat
[10:26:13.173] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C2.dat
[10:26:13.190] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C3.dat
[10:26:13.203] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C4.dat
[10:26:13.215] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C5.dat
[10:26:13.228] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C6.dat
[10:26:13.241] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C7.dat
[10:26:13.254] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C8.dat
[10:26:13.265] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C9.dat
[10:26:13.277] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C10.dat
[10:26:13.289] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C11.dat
[10:26:13.301] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C12.dat
[10:26:13.317] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C13.dat
[10:26:13.334] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C14.dat
[10:26:13.350] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C15.dat
[10:26:13.365] <TB2> INFO: PixTestTrim::trimTest() done
[10:26:13.365] <TB2> INFO: vtrim: 99 103 102 104 92 98 96 92 93 97 105 127 103 92 100 93
[10:26:13.365] <TB2> INFO: vthrcomp: 99 90 85 97 85 101 100 101 99 93 107 103 95 98 97 103
[10:26:13.365] <TB2> INFO: vcal mean: 34.92 34.97 34.99 35.03 34.95 35.02 34.96 34.92 34.99 34.97 35.06 34.98 35.00 34.96 34.95 34.95
[10:26:13.365] <TB2> INFO: vcal RMS: 0.97 0.93 0.93 0.96 0.89 0.96 0.96 0.95 0.96 0.98 0.89 1.22 0.97 0.92 1.08 0.94
[10:26:13.365] <TB2> INFO: bits mean: 9.67 9.27 9.87 9.56 9.73 9.84 9.76 9.66 10.05 8.88 8.47 8.95 9.33 9.87 9.13 9.98
[10:26:13.365] <TB2> INFO: bits RMS: 2.61 2.62 2.53 2.60 2.53 2.65 2.64 2.84 2.62 2.66 2.52 2.51 2.55 2.71 2.96 2.55
[10:26:13.373] <TB2> INFO: ----------------------------------------------------------------------
[10:26:13.373] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[10:26:13.373] <TB2> INFO: ----------------------------------------------------------------------
[10:26:13.377] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[10:26:13.385] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[10:26:13.385] <TB2> INFO: run 1 of 1
[10:26:13.656] <TB2> INFO: Expecting 4160000 events.
[10:26:56.432] <TB2> INFO: 969060 events read in total (42220ms).
[10:27:38.253] <TB2> INFO: 1928070 events read in total (84041ms).
[10:28:20.484] <TB2> INFO: 2875805 events read in total (126273ms).
[10:29:02.972] <TB2> INFO: 3819805 events read in total (168760ms).
[10:29:18.465] <TB2> INFO: 4160000 events read in total (184253ms).
[10:29:18.500] <TB2> INFO: Test took 185114ms.
[10:29:47.103] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 193 (-1/-1) hits flags = 528 (plus default)
[10:29:47.115] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[10:29:47.115] <TB2> INFO: run 1 of 1
[10:29:47.428] <TB2> INFO: Expecting 4035200 events.
[10:30:30.828] <TB2> INFO: 945305 events read in total (42843ms).
[10:31:12.703] <TB2> INFO: 1881870 events read in total (84718ms).
[10:31:54.291] <TB2> INFO: 2808145 events read in total (126306ms).
[10:32:35.742] <TB2> INFO: 3731425 events read in total (167757ms).
[10:32:49.851] <TB2> INFO: 4035200 events read in total (181866ms).
[10:32:49.886] <TB2> INFO: Test took 182771ms.
[10:33:17.741] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 184 (-1/-1) hits flags = 528 (plus default)
[10:33:17.749] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[10:33:17.749] <TB2> INFO: run 1 of 1
[10:33:18.010] <TB2> INFO: Expecting 3848000 events.
[10:34:00.881] <TB2> INFO: 964680 events read in total (42314ms).
[10:34:43.696] <TB2> INFO: 1919685 events read in total (85129ms).
[10:35:25.186] <TB2> INFO: 2862605 events read in total (126619ms).
[10:36:06.822] <TB2> INFO: 3804695 events read in total (168255ms).
[10:36:09.118] <TB2> INFO: 3848000 events read in total (170551ms).
[10:36:09.149] <TB2> INFO: Test took 171399ms.
[10:36:36.182] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 182 (-1/-1) hits flags = 528 (plus default)
[10:36:36.190] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[10:36:36.190] <TB2> INFO: run 1 of 1
[10:36:36.452] <TB2> INFO: Expecting 3806400 events.
[10:37:19.308] <TB2> INFO: 969160 events read in total (42299ms).
[10:38:01.529] <TB2> INFO: 1927825 events read in total (84520ms).
[10:38:43.413] <TB2> INFO: 2874775 events read in total (126404ms).
[10:39:24.922] <TB2> INFO: 3806400 events read in total (167913ms).
[10:39:24.954] <TB2> INFO: Test took 168764ms.
[10:39:51.079] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 182 (-1/-1) hits flags = 528 (plus default)
[10:39:51.087] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[10:39:51.087] <TB2> INFO: run 1 of 1
[10:39:51.349] <TB2> INFO: Expecting 3806400 events.
[10:40:34.036] <TB2> INFO: 968875 events read in total (42130ms).
[10:41:16.090] <TB2> INFO: 1927225 events read in total (84184ms).
[10:41:57.734] <TB2> INFO: 2873975 events read in total (125828ms).
[10:42:39.265] <TB2> INFO: 3806400 events read in total (167359ms).
[10:42:39.307] <TB2> INFO: Test took 168220ms.
[10:43:05.822] <TB2> INFO: PixTestTrim::trimBitTest() done
[10:43:05.824] <TB2> INFO: PixTestTrim::doTest() done, duration: 2713 seconds
[10:43:05.824] <TB2> INFO: Decoding statistics:
[10:43:05.824] <TB2> INFO: General information:
[10:43:05.824] <TB2> INFO: 16bit words read: 0
[10:43:05.824] <TB2> INFO: valid events total: 0
[10:43:05.824] <TB2> INFO: empty events: 0
[10:43:05.824] <TB2> INFO: valid events with pixels: 0
[10:43:05.824] <TB2> INFO: valid pixel hits: 0
[10:43:05.824] <TB2> INFO: Event errors: 0
[10:43:05.824] <TB2> INFO: start marker: 0
[10:43:05.824] <TB2> INFO: stop marker: 0
[10:43:05.824] <TB2> INFO: overflow: 0
[10:43:05.824] <TB2> INFO: invalid 5bit words: 0
[10:43:05.824] <TB2> INFO: invalid XOR eye diagram: 0
[10:43:05.824] <TB2> INFO: frame (failed synchr.): 0
[10:43:05.824] <TB2> INFO: idle data (no TBM trl): 0
[10:43:05.824] <TB2> INFO: no data (only TBM hdr): 0
[10:43:05.824] <TB2> INFO: TBM errors: 0
[10:43:05.824] <TB2> INFO: flawed TBM headers: 0
[10:43:05.824] <TB2> INFO: flawed TBM trailers: 0
[10:43:05.824] <TB2> INFO: event ID mismatches: 0
[10:43:05.824] <TB2> INFO: ROC errors: 0
[10:43:05.824] <TB2> INFO: missing ROC header(s): 0
[10:43:05.824] <TB2> INFO: misplaced readback start: 0
[10:43:05.824] <TB2> INFO: Pixel decoding errors: 0
[10:43:05.824] <TB2> INFO: pixel data incomplete: 0
[10:43:05.824] <TB2> INFO: pixel address: 0
[10:43:05.824] <TB2> INFO: pulse height fill bit: 0
[10:43:05.824] <TB2> INFO: buffer corruption: 0
[10:43:06.514] <TB2> INFO: ######################################################################
[10:43:06.514] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:43:06.514] <TB2> INFO: ######################################################################
[10:43:06.777] <TB2> INFO: Expecting 41600 events.
[10:43:10.585] <TB2> INFO: 41600 events read in total (3251ms).
[10:43:10.585] <TB2> INFO: Test took 4070ms.
[10:43:11.046] <TB2> INFO: Expecting 41600 events.
[10:43:14.850] <TB2> INFO: 41600 events read in total (3247ms).
[10:43:14.851] <TB2> INFO: Test took 4066ms.
[10:43:15.145] <TB2> INFO: Expecting 41600 events.
[10:43:19.015] <TB2> INFO: 41600 events read in total (3313ms).
[10:43:19.016] <TB2> INFO: Test took 4144ms.
[10:43:19.272] <TB2> INFO: Expecting 2560 events.
[10:43:20.128] <TB2> INFO: 2560 events read in total (299ms).
[10:43:20.128] <TB2> INFO: Test took 1098ms.
[10:43:20.434] <TB2> INFO: Expecting 2560 events.
[10:43:21.288] <TB2> INFO: 2560 events read in total (297ms).
[10:43:21.289] <TB2> INFO: Test took 1160ms.
[10:43:21.595] <TB2> INFO: Expecting 2560 events.
[10:43:22.449] <TB2> INFO: 2560 events read in total (297ms).
[10:43:22.449] <TB2> INFO: Test took 1160ms.
[10:43:22.756] <TB2> INFO: Expecting 2560 events.
[10:43:23.614] <TB2> INFO: 2560 events read in total (302ms).
[10:43:23.614] <TB2> INFO: Test took 1164ms.
[10:43:23.921] <TB2> INFO: Expecting 2560 events.
[10:43:24.776] <TB2> INFO: 2560 events read in total (298ms).
[10:43:24.776] <TB2> INFO: Test took 1161ms.
[10:43:25.082] <TB2> INFO: Expecting 2560 events.
[10:43:25.943] <TB2> INFO: 2560 events read in total (303ms).
[10:43:25.943] <TB2> INFO: Test took 1166ms.
[10:43:26.250] <TB2> INFO: Expecting 2560 events.
[10:43:27.104] <TB2> INFO: 2560 events read in total (297ms).
[10:43:27.104] <TB2> INFO: Test took 1160ms.
[10:43:27.411] <TB2> INFO: Expecting 2560 events.
[10:43:28.265] <TB2> INFO: 2560 events read in total (298ms).
[10:43:28.265] <TB2> INFO: Test took 1161ms.
[10:43:28.572] <TB2> INFO: Expecting 2560 events.
[10:43:29.430] <TB2> INFO: 2560 events read in total (302ms).
[10:43:29.430] <TB2> INFO: Test took 1165ms.
[10:43:29.737] <TB2> INFO: Expecting 2560 events.
[10:43:30.594] <TB2> INFO: 2560 events read in total (300ms).
[10:43:30.595] <TB2> INFO: Test took 1164ms.
[10:43:30.902] <TB2> INFO: Expecting 2560 events.
[10:43:31.756] <TB2> INFO: 2560 events read in total (298ms).
[10:43:31.756] <TB2> INFO: Test took 1161ms.
[10:43:32.063] <TB2> INFO: Expecting 2560 events.
[10:43:32.917] <TB2> INFO: 2560 events read in total (298ms).
[10:43:32.918] <TB2> INFO: Test took 1162ms.
[10:43:33.224] <TB2> INFO: Expecting 2560 events.
[10:43:34.079] <TB2> INFO: 2560 events read in total (298ms).
[10:43:34.079] <TB2> INFO: Test took 1161ms.
[10:43:34.385] <TB2> INFO: Expecting 2560 events.
[10:43:35.243] <TB2> INFO: 2560 events read in total (301ms).
[10:43:35.243] <TB2> INFO: Test took 1163ms.
[10:43:35.549] <TB2> INFO: Expecting 2560 events.
[10:43:36.405] <TB2> INFO: 2560 events read in total (299ms).
[10:43:36.406] <TB2> INFO: Test took 1163ms.
[10:43:36.712] <TB2> INFO: Expecting 2560 events.
[10:43:37.568] <TB2> INFO: 2560 events read in total (299ms).
[10:43:37.616] <TB2> INFO: Test took 1210ms.
[10:43:37.620] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:43:37.876] <TB2> INFO: Expecting 655360 events.
[10:43:54.661] <TB2> INFO: 655360 events read in total (16228ms).
[10:43:54.671] <TB2> INFO: Expecting 655360 events.
[10:44:11.465] <TB2> INFO: 655360 events read in total (16392ms).
[10:44:11.477] <TB2> INFO: Expecting 655360 events.
[10:44:28.330] <TB2> INFO: 655360 events read in total (16450ms).
[10:44:28.346] <TB2> INFO: Expecting 655360 events.
[10:44:45.116] <TB2> INFO: 655360 events read in total (16367ms).
[10:44:45.138] <TB2> INFO: Expecting 655360 events.
[10:45:01.962] <TB2> INFO: 655360 events read in total (16421ms).
[10:45:01.984] <TB2> INFO: Expecting 655360 events.
[10:45:18.830] <TB2> INFO: 655360 events read in total (16443ms).
[10:45:18.861] <TB2> INFO: Expecting 655360 events.
[10:45:35.748] <TB2> INFO: 655360 events read in total (16484ms).
[10:45:35.778] <TB2> INFO: Expecting 655360 events.
[10:45:52.635] <TB2> INFO: 655360 events read in total (16454ms).
[10:45:52.667] <TB2> INFO: Expecting 655360 events.
[10:46:09.506] <TB2> INFO: 655360 events read in total (16437ms).
[10:46:09.542] <TB2> INFO: Expecting 655360 events.
[10:46:26.316] <TB2> INFO: 655360 events read in total (16371ms).
[10:46:26.355] <TB2> INFO: Expecting 655360 events.
[10:46:43.152] <TB2> INFO: 655360 events read in total (16395ms).
[10:46:43.195] <TB2> INFO: Expecting 655360 events.
[10:47:00.049] <TB2> INFO: 655360 events read in total (16451ms).
[10:47:00.099] <TB2> INFO: Expecting 655360 events.
[10:47:16.761] <TB2> INFO: 655360 events read in total (16259ms).
[10:47:16.817] <TB2> INFO: Expecting 655360 events.
[10:47:33.427] <TB2> INFO: 655360 events read in total (16208ms).
[10:47:33.481] <TB2> INFO: Expecting 655360 events.
[10:47:50.178] <TB2> INFO: 655360 events read in total (16295ms).
[10:47:50.237] <TB2> INFO: Expecting 655360 events.
[10:48:07.142] <TB2> INFO: 655360 events read in total (16503ms).
[10:48:07.201] <TB2> INFO: Test took 269581ms.
[10:48:07.280] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:48:07.509] <TB2> INFO: Expecting 655360 events.
[10:48:24.361] <TB2> INFO: 655360 events read in total (16295ms).
[10:48:24.370] <TB2> INFO: Expecting 655360 events.
[10:48:41.088] <TB2> INFO: 655360 events read in total (16316ms).
[10:48:41.101] <TB2> INFO: Expecting 655360 events.
[10:48:57.857] <TB2> INFO: 655360 events read in total (16354ms).
[10:48:57.873] <TB2> INFO: Expecting 655360 events.
[10:49:14.542] <TB2> INFO: 655360 events read in total (16267ms).
[10:49:14.563] <TB2> INFO: Expecting 655360 events.
[10:49:31.368] <TB2> INFO: 655360 events read in total (16403ms).
[10:49:31.398] <TB2> INFO: Expecting 655360 events.
[10:49:48.215] <TB2> INFO: 655360 events read in total (16415ms).
[10:49:48.241] <TB2> INFO: Expecting 655360 events.
[10:50:05.044] <TB2> INFO: 655360 events read in total (16400ms).
[10:50:05.075] <TB2> INFO: Expecting 655360 events.
[10:50:21.804] <TB2> INFO: 655360 events read in total (16327ms).
[10:50:21.839] <TB2> INFO: Expecting 655360 events.
[10:50:38.581] <TB2> INFO: 655360 events read in total (16341ms).
[10:50:38.619] <TB2> INFO: Expecting 655360 events.
[10:50:55.385] <TB2> INFO: 655360 events read in total (16363ms).
[10:50:55.426] <TB2> INFO: Expecting 655360 events.
[10:51:12.261] <TB2> INFO: 655360 events read in total (16433ms).
[10:51:12.308] <TB2> INFO: Expecting 655360 events.
[10:51:29.190] <TB2> INFO: 655360 events read in total (16479ms).
[10:51:29.246] <TB2> INFO: Expecting 655360 events.
[10:51:45.902] <TB2> INFO: 655360 events read in total (16254ms).
[10:51:45.960] <TB2> INFO: Expecting 655360 events.
[10:52:02.864] <TB2> INFO: 655360 events read in total (16502ms).
[10:52:02.924] <TB2> INFO: Expecting 655360 events.
[10:52:19.558] <TB2> INFO: 655360 events read in total (16232ms).
[10:52:19.624] <TB2> INFO: Expecting 655360 events.
[10:52:36.156] <TB2> INFO: 655360 events read in total (16129ms).
[10:52:36.220] <TB2> INFO: Test took 268940ms.
[10:52:36.413] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:52:36.420] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:52:36.428] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:52:36.435] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[10:52:36.444] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:52:36.454] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:52:36.461] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:52:36.468] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:52:36.475] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:52:36.483] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:52:36.490] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:52:36.497] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:52:36.504] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:52:36.512] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:52:36.520] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:52:36.527] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:52:36.534] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:52:36.671] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C0.dat
[10:52:36.679] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C1.dat
[10:52:36.684] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C2.dat
[10:52:36.689] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C3.dat
[10:52:36.694] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C4.dat
[10:52:36.699] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C5.dat
[10:52:36.704] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C6.dat
[10:52:36.709] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C7.dat
[10:52:36.714] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C8.dat
[10:52:36.719] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C9.dat
[10:52:36.724] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C10.dat
[10:52:36.729] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C11.dat
[10:52:36.734] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C12.dat
[10:52:36.739] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C13.dat
[10:52:36.744] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C14.dat
[10:52:36.750] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C15.dat
[10:52:37.023] <TB2> INFO: Expecting 41600 events.
[10:52:40.508] <TB2> INFO: 41600 events read in total (2929ms).
[10:52:40.509] <TB2> INFO: Test took 3753ms.
[10:52:40.962] <TB2> INFO: Expecting 41600 events.
[10:52:44.449] <TB2> INFO: 41600 events read in total (2930ms).
[10:52:44.450] <TB2> INFO: Test took 3753ms.
[10:52:44.922] <TB2> INFO: Expecting 41600 events.
[10:52:48.387] <TB2> INFO: 41600 events read in total (2908ms).
[10:52:48.388] <TB2> INFO: Test took 3751ms.
[10:52:48.580] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:52:48.670] <TB2> INFO: Expecting 2560 events.
[10:52:49.524] <TB2> INFO: 2560 events read in total (297ms).
[10:52:49.524] <TB2> INFO: Test took 944ms.
[10:52:49.526] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:52:49.832] <TB2> INFO: Expecting 2560 events.
[10:52:50.686] <TB2> INFO: 2560 events read in total (298ms).
[10:52:50.686] <TB2> INFO: Test took 1160ms.
[10:52:50.689] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:52:50.993] <TB2> INFO: Expecting 2560 events.
[10:52:51.848] <TB2> INFO: 2560 events read in total (298ms).
[10:52:51.848] <TB2> INFO: Test took 1159ms.
[10:52:51.851] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:52:52.156] <TB2> INFO: Expecting 2560 events.
[10:52:53.010] <TB2> INFO: 2560 events read in total (298ms).
[10:52:53.010] <TB2> INFO: Test took 1159ms.
[10:52:53.013] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:52:53.317] <TB2> INFO: Expecting 2560 events.
[10:52:54.172] <TB2> INFO: 2560 events read in total (298ms).
[10:52:54.172] <TB2> INFO: Test took 1159ms.
[10:52:54.174] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:52:54.479] <TB2> INFO: Expecting 2560 events.
[10:52:55.334] <TB2> INFO: 2560 events read in total (298ms).
[10:52:55.334] <TB2> INFO: Test took 1160ms.
[10:52:55.337] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:52:55.642] <TB2> INFO: Expecting 2560 events.
[10:52:56.497] <TB2> INFO: 2560 events read in total (298ms).
[10:52:56.497] <TB2> INFO: Test took 1160ms.
[10:52:56.499] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:52:56.804] <TB2> INFO: Expecting 2560 events.
[10:52:57.659] <TB2> INFO: 2560 events read in total (298ms).
[10:52:57.660] <TB2> INFO: Test took 1161ms.
[10:52:57.662] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:52:57.967] <TB2> INFO: Expecting 2560 events.
[10:52:58.821] <TB2> INFO: 2560 events read in total (297ms).
[10:52:58.822] <TB2> INFO: Test took 1160ms.
[10:52:58.824] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:52:59.129] <TB2> INFO: Expecting 2560 events.
[10:52:59.984] <TB2> INFO: 2560 events read in total (298ms).
[10:52:59.984] <TB2> INFO: Test took 1160ms.
[10:52:59.987] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:00.292] <TB2> INFO: Expecting 2560 events.
[10:53:01.152] <TB2> INFO: 2560 events read in total (303ms).
[10:53:01.153] <TB2> INFO: Test took 1166ms.
[10:53:01.155] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:01.459] <TB2> INFO: Expecting 2560 events.
[10:53:02.313] <TB2> INFO: 2560 events read in total (297ms).
[10:53:02.314] <TB2> INFO: Test took 1159ms.
[10:53:02.316] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:02.621] <TB2> INFO: Expecting 2560 events.
[10:53:03.476] <TB2> INFO: 2560 events read in total (298ms).
[10:53:03.476] <TB2> INFO: Test took 1160ms.
[10:53:03.479] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:03.783] <TB2> INFO: Expecting 2560 events.
[10:53:04.638] <TB2> INFO: 2560 events read in total (298ms).
[10:53:04.638] <TB2> INFO: Test took 1160ms.
[10:53:04.641] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:04.946] <TB2> INFO: Expecting 2560 events.
[10:53:05.801] <TB2> INFO: 2560 events read in total (298ms).
[10:53:05.801] <TB2> INFO: Test took 1160ms.
[10:53:05.804] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:06.109] <TB2> INFO: Expecting 2560 events.
[10:53:06.963] <TB2> INFO: 2560 events read in total (297ms).
[10:53:06.963] <TB2> INFO: Test took 1159ms.
[10:53:06.966] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:07.271] <TB2> INFO: Expecting 2560 events.
[10:53:08.125] <TB2> INFO: 2560 events read in total (297ms).
[10:53:08.125] <TB2> INFO: Test took 1159ms.
[10:53:08.128] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:08.433] <TB2> INFO: Expecting 2560 events.
[10:53:09.287] <TB2> INFO: 2560 events read in total (298ms).
[10:53:09.287] <TB2> INFO: Test took 1159ms.
[10:53:09.290] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:09.595] <TB2> INFO: Expecting 2560 events.
[10:53:10.449] <TB2> INFO: 2560 events read in total (298ms).
[10:53:10.449] <TB2> INFO: Test took 1159ms.
[10:53:10.452] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:10.757] <TB2> INFO: Expecting 2560 events.
[10:53:11.612] <TB2> INFO: 2560 events read in total (298ms).
[10:53:11.612] <TB2> INFO: Test took 1160ms.
[10:53:11.615] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:11.920] <TB2> INFO: Expecting 2560 events.
[10:53:12.776] <TB2> INFO: 2560 events read in total (299ms).
[10:53:12.776] <TB2> INFO: Test took 1161ms.
[10:53:12.779] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:13.083] <TB2> INFO: Expecting 2560 events.
[10:53:13.938] <TB2> INFO: 2560 events read in total (298ms).
[10:53:13.938] <TB2> INFO: Test took 1159ms.
[10:53:13.941] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:14.246] <TB2> INFO: Expecting 2560 events.
[10:53:15.102] <TB2> INFO: 2560 events read in total (299ms).
[10:53:15.103] <TB2> INFO: Test took 1162ms.
[10:53:15.105] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:15.410] <TB2> INFO: Expecting 2560 events.
[10:53:16.265] <TB2> INFO: 2560 events read in total (298ms).
[10:53:16.267] <TB2> INFO: Test took 1162ms.
[10:53:16.269] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:16.572] <TB2> INFO: Expecting 2560 events.
[10:53:17.426] <TB2> INFO: 2560 events read in total (297ms).
[10:53:17.427] <TB2> INFO: Test took 1158ms.
[10:53:17.429] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:17.734] <TB2> INFO: Expecting 2560 events.
[10:53:18.588] <TB2> INFO: 2560 events read in total (297ms).
[10:53:18.589] <TB2> INFO: Test took 1160ms.
[10:53:18.591] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:18.896] <TB2> INFO: Expecting 2560 events.
[10:53:19.750] <TB2> INFO: 2560 events read in total (297ms).
[10:53:19.751] <TB2> INFO: Test took 1160ms.
[10:53:19.753] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:20.058] <TB2> INFO: Expecting 2560 events.
[10:53:20.912] <TB2> INFO: 2560 events read in total (297ms).
[10:53:20.912] <TB2> INFO: Test took 1159ms.
[10:53:20.915] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:21.220] <TB2> INFO: Expecting 2560 events.
[10:53:22.074] <TB2> INFO: 2560 events read in total (297ms).
[10:53:22.074] <TB2> INFO: Test took 1159ms.
[10:53:22.077] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:22.383] <TB2> INFO: Expecting 2560 events.
[10:53:23.237] <TB2> INFO: 2560 events read in total (297ms).
[10:53:23.237] <TB2> INFO: Test took 1160ms.
[10:53:23.240] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:23.545] <TB2> INFO: Expecting 2560 events.
[10:53:24.400] <TB2> INFO: 2560 events read in total (298ms).
[10:53:24.400] <TB2> INFO: Test took 1160ms.
[10:53:24.403] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:24.708] <TB2> INFO: Expecting 2560 events.
[10:53:25.563] <TB2> INFO: 2560 events read in total (298ms).
[10:53:25.564] <TB2> INFO: Test took 1161ms.
[10:53:26.098] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 619 seconds
[10:53:26.098] <TB2> INFO: PH scale (per ROC): 73 64 68 63 70 75 63 70 69 62 69 68 72 72 70 67
[10:53:26.098] <TB2> INFO: PH offset (per ROC): 174 184 187 187 184 178 176 190 182 181 181 191 179 173 176 184
[10:53:26.102] <TB2> INFO: Decoding statistics:
[10:53:26.102] <TB2> INFO: General information:
[10:53:26.102] <TB2> INFO: 16bit words read: 91932
[10:53:26.102] <TB2> INFO: valid events total: 10240
[10:53:26.102] <TB2> INFO: empty events: 7737
[10:53:26.102] <TB2> INFO: valid events with pixels: 2503
[10:53:26.102] <TB2> INFO: valid pixel hits: 2503
[10:53:26.102] <TB2> INFO: Event errors: 0
[10:53:26.102] <TB2> INFO: start marker: 0
[10:53:26.102] <TB2> INFO: stop marker: 0
[10:53:26.102] <TB2> INFO: overflow: 0
[10:53:26.102] <TB2> INFO: invalid 5bit words: 0
[10:53:26.102] <TB2> INFO: invalid XOR eye diagram: 0
[10:53:26.102] <TB2> INFO: frame (failed synchr.): 0
[10:53:26.102] <TB2> INFO: idle data (no TBM trl): 0
[10:53:26.102] <TB2> INFO: no data (only TBM hdr): 0
[10:53:26.102] <TB2> INFO: TBM errors: 0
[10:53:26.102] <TB2> INFO: flawed TBM headers: 0
[10:53:26.102] <TB2> INFO: flawed TBM trailers: 0
[10:53:26.102] <TB2> INFO: event ID mismatches: 0
[10:53:26.102] <TB2> INFO: ROC errors: 0
[10:53:26.102] <TB2> INFO: missing ROC header(s): 0
[10:53:26.102] <TB2> INFO: misplaced readback start: 0
[10:53:26.102] <TB2> INFO: Pixel decoding errors: 0
[10:53:26.102] <TB2> INFO: pixel data incomplete: 0
[10:53:26.102] <TB2> INFO: pixel address: 0
[10:53:26.102] <TB2> INFO: pulse height fill bit: 0
[10:53:26.102] <TB2> INFO: buffer corruption: 0
[10:53:26.282] <TB2> INFO: ######################################################################
[10:53:26.282] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:53:26.282] <TB2> INFO: ######################################################################
[10:53:26.292] <TB2> INFO: scanning low vcal = 10
[10:53:26.566] <TB2> INFO: Expecting 41600 events.
[10:53:30.097] <TB2> INFO: 41600 events read in total (2975ms).
[10:53:30.097] <TB2> INFO: Test took 3805ms.
[10:53:30.099] <TB2> INFO: scanning low vcal = 20
[10:53:30.404] <TB2> INFO: Expecting 41600 events.
[10:53:33.952] <TB2> INFO: 41600 events read in total (2991ms).
[10:53:33.953] <TB2> INFO: Test took 3854ms.
[10:53:33.955] <TB2> INFO: scanning low vcal = 30
[10:53:34.259] <TB2> INFO: Expecting 41600 events.
[10:53:37.826] <TB2> INFO: 41600 events read in total (3010ms).
[10:53:37.827] <TB2> INFO: Test took 3872ms.
[10:53:37.829] <TB2> INFO: scanning low vcal = 40
[10:53:38.121] <TB2> INFO: Expecting 41600 events.
[10:53:42.253] <TB2> INFO: 41600 events read in total (3575ms).
[10:53:42.253] <TB2> INFO: Test took 4424ms.
[10:53:42.257] <TB2> INFO: scanning low vcal = 50
[10:53:42.522] <TB2> INFO: Expecting 41600 events.
[10:53:46.788] <TB2> INFO: 41600 events read in total (3709ms).
[10:53:46.788] <TB2> INFO: Test took 4531ms.
[10:53:46.792] <TB2> INFO: scanning low vcal = 60
[10:53:47.074] <TB2> INFO: Expecting 41600 events.
[10:53:51.306] <TB2> INFO: 41600 events read in total (3675ms).
[10:53:51.307] <TB2> INFO: Test took 4515ms.
[10:53:51.310] <TB2> INFO: scanning low vcal = 70
[10:53:51.574] <TB2> INFO: Expecting 41600 events.
[10:53:55.783] <TB2> INFO: 41600 events read in total (3652ms).
[10:53:55.784] <TB2> INFO: Test took 4474ms.
[10:53:55.787] <TB2> INFO: scanning low vcal = 80
[10:53:56.072] <TB2> INFO: Expecting 41600 events.
[10:54:00.257] <TB2> INFO: 41600 events read in total (3628ms).
[10:54:00.260] <TB2> INFO: Test took 4473ms.
[10:54:00.263] <TB2> INFO: scanning low vcal = 90
[10:54:00.525] <TB2> INFO: Expecting 41600 events.
[10:54:04.721] <TB2> INFO: 41600 events read in total (3639ms).
[10:54:04.722] <TB2> INFO: Test took 4459ms.
[10:54:04.725] <TB2> INFO: scanning low vcal = 100
[10:54:04.999] <TB2> INFO: Expecting 41600 events.
[10:54:09.254] <TB2> INFO: 41600 events read in total (3698ms).
[10:54:09.255] <TB2> INFO: Test took 4530ms.
[10:54:09.258] <TB2> INFO: scanning low vcal = 110
[10:54:09.519] <TB2> INFO: Expecting 41600 events.
[10:54:13.730] <TB2> INFO: 41600 events read in total (3654ms).
[10:54:13.744] <TB2> INFO: Test took 4486ms.
[10:54:13.747] <TB2> INFO: scanning low vcal = 120
[10:54:14.009] <TB2> INFO: Expecting 41600 events.
[10:54:18.215] <TB2> INFO: 41600 events read in total (3649ms).
[10:54:18.216] <TB2> INFO: Test took 4469ms.
[10:54:18.219] <TB2> INFO: scanning low vcal = 130
[10:54:18.493] <TB2> INFO: Expecting 41600 events.
[10:54:22.687] <TB2> INFO: 41600 events read in total (3637ms).
[10:54:22.687] <TB2> INFO: Test took 4468ms.
[10:54:22.690] <TB2> INFO: scanning low vcal = 140
[10:54:22.952] <TB2> INFO: Expecting 41600 events.
[10:54:27.153] <TB2> INFO: 41600 events read in total (3644ms).
[10:54:27.154] <TB2> INFO: Test took 4463ms.
[10:54:27.157] <TB2> INFO: scanning low vcal = 150
[10:54:27.428] <TB2> INFO: Expecting 41600 events.
[10:54:31.652] <TB2> INFO: 41600 events read in total (3668ms).
[10:54:31.652] <TB2> INFO: Test took 4495ms.
[10:54:31.655] <TB2> INFO: scanning low vcal = 160
[10:54:31.921] <TB2> INFO: Expecting 41600 events.
[10:54:36.135] <TB2> INFO: 41600 events read in total (3657ms).
[10:54:36.136] <TB2> INFO: Test took 4480ms.
[10:54:36.139] <TB2> INFO: scanning low vcal = 170
[10:54:36.401] <TB2> INFO: Expecting 41600 events.
[10:54:40.629] <TB2> INFO: 41600 events read in total (3671ms).
[10:54:40.630] <TB2> INFO: Test took 4490ms.
[10:54:40.634] <TB2> INFO: scanning low vcal = 180
[10:54:40.896] <TB2> INFO: Expecting 41600 events.
[10:54:45.104] <TB2> INFO: 41600 events read in total (3651ms).
[10:54:45.104] <TB2> INFO: Test took 4470ms.
[10:54:45.108] <TB2> INFO: scanning low vcal = 190
[10:54:45.370] <TB2> INFO: Expecting 41600 events.
[10:54:49.605] <TB2> INFO: 41600 events read in total (3678ms).
[10:54:49.606] <TB2> INFO: Test took 4498ms.
[10:54:49.609] <TB2> INFO: scanning low vcal = 200
[10:54:49.883] <TB2> INFO: Expecting 41600 events.
[10:54:54.150] <TB2> INFO: 41600 events read in total (3710ms).
[10:54:54.151] <TB2> INFO: Test took 4541ms.
[10:54:54.154] <TB2> INFO: scanning low vcal = 210
[10:54:54.420] <TB2> INFO: Expecting 41600 events.
[10:54:58.637] <TB2> INFO: 41600 events read in total (3660ms).
[10:54:58.638] <TB2> INFO: Test took 4484ms.
[10:54:58.641] <TB2> INFO: scanning low vcal = 220
[10:54:58.905] <TB2> INFO: Expecting 41600 events.
[10:55:03.175] <TB2> INFO: 41600 events read in total (3713ms).
[10:55:03.176] <TB2> INFO: Test took 4534ms.
[10:55:03.180] <TB2> INFO: scanning low vcal = 230
[10:55:03.447] <TB2> INFO: Expecting 41600 events.
[10:55:07.714] <TB2> INFO: 41600 events read in total (3711ms).
[10:55:07.714] <TB2> INFO: Test took 4534ms.
[10:55:07.718] <TB2> INFO: scanning low vcal = 240
[10:55:07.997] <TB2> INFO: Expecting 41600 events.
[10:55:12.205] <TB2> INFO: 41600 events read in total (3651ms).
[10:55:12.206] <TB2> INFO: Test took 4488ms.
[10:55:12.209] <TB2> INFO: scanning low vcal = 250
[10:55:12.471] <TB2> INFO: Expecting 41600 events.
[10:55:16.725] <TB2> INFO: 41600 events read in total (3697ms).
[10:55:16.725] <TB2> INFO: Test took 4515ms.
[10:55:16.731] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[10:55:16.996] <TB2> INFO: Expecting 41600 events.
[10:55:21.256] <TB2> INFO: 41600 events read in total (3703ms).
[10:55:21.256] <TB2> INFO: Test took 4525ms.
[10:55:21.260] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[10:55:21.522] <TB2> INFO: Expecting 41600 events.
[10:55:25.752] <TB2> INFO: 41600 events read in total (3673ms).
[10:55:25.753] <TB2> INFO: Test took 4493ms.
[10:55:25.757] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[10:55:26.020] <TB2> INFO: Expecting 41600 events.
[10:55:30.262] <TB2> INFO: 41600 events read in total (3685ms).
[10:55:30.262] <TB2> INFO: Test took 4505ms.
[10:55:30.266] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[10:55:30.547] <TB2> INFO: Expecting 41600 events.
[10:55:34.751] <TB2> INFO: 41600 events read in total (3647ms).
[10:55:34.752] <TB2> INFO: Test took 4486ms.
[10:55:34.755] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[10:55:35.018] <TB2> INFO: Expecting 41600 events.
[10:55:39.263] <TB2> INFO: 41600 events read in total (3688ms).
[10:55:39.263] <TB2> INFO: Test took 4508ms.
[10:55:40.368] <TB2> INFO: PixTestGainPedestal::measure() done
[10:56:16.499] <TB2> INFO: PixTestGainPedestal::fit() done
[10:56:16.500] <TB2> INFO: non-linearity mean: 0.960 0.957 0.951 0.954 0.960 0.962 0.959 0.959 0.959 0.954 0.962 0.962 0.954 0.956 0.956 0.959
[10:56:16.500] <TB2> INFO: non-linearity RMS: 0.007 0.007 0.007 0.006 0.007 0.006 0.007 0.006 0.006 0.008 0.005 0.007 0.007 0.005 0.006 0.006
[10:56:16.500] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[10:56:16.539] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[10:56:16.586] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[10:56:16.624] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[10:56:16.687] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[10:56:16.727] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[10:56:16.778] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[10:56:16.823] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[10:56:16.861] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[10:56:16.898] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[10:56:16.938] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[10:56:16.976] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[10:56:17.013] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[10:56:17.050] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[10:56:17.087] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[10:56:17.124] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[10:56:17.162] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 170 seconds
[10:56:17.162] <TB2> INFO: Decoding statistics:
[10:56:17.162] <TB2> INFO: General information:
[10:56:17.162] <TB2> INFO: 16bit words read: 2662400
[10:56:17.162] <TB2> INFO: valid events total: 166400
[10:56:17.162] <TB2> INFO: empty events: 0
[10:56:17.162] <TB2> INFO: valid events with pixels: 166400
[10:56:17.162] <TB2> INFO: valid pixel hits: 665580
[10:56:17.162] <TB2> INFO: Event errors: 0
[10:56:17.162] <TB2> INFO: start marker: 0
[10:56:17.162] <TB2> INFO: stop marker: 0
[10:56:17.162] <TB2> INFO: overflow: 0
[10:56:17.162] <TB2> INFO: invalid 5bit words: 0
[10:56:17.162] <TB2> INFO: invalid XOR eye diagram: 0
[10:56:17.162] <TB2> INFO: frame (failed synchr.): 0
[10:56:17.162] <TB2> INFO: idle data (no TBM trl): 0
[10:56:17.162] <TB2> INFO: no data (only TBM hdr): 0
[10:56:17.162] <TB2> INFO: TBM errors: 0
[10:56:17.162] <TB2> INFO: flawed TBM headers: 0
[10:56:17.162] <TB2> INFO: flawed TBM trailers: 0
[10:56:17.162] <TB2> INFO: event ID mismatches: 0
[10:56:17.162] <TB2> INFO: ROC errors: 0
[10:56:17.162] <TB2> INFO: missing ROC header(s): 0
[10:56:17.162] <TB2> INFO: misplaced readback start: 0
[10:56:17.162] <TB2> INFO: Pixel decoding errors: 0
[10:56:17.162] <TB2> INFO: pixel data incomplete: 0
[10:56:17.162] <TB2> INFO: pixel address: 0
[10:56:17.162] <TB2> INFO: pulse height fill bit: 0
[10:56:17.162] <TB2> INFO: buffer corruption: 0
[10:56:17.171] <TB2> INFO: readReadbackCal: /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C0.dat .. /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C15.dat
[10:56:17.186] <TB2> INFO: ######################################################################
[10:56:17.186] <TB2> INFO: PixTestReadback::doTest()
[10:56:17.186] <TB2> INFO: ######################################################################
[10:56:17.186] <TB2> INFO: ----------------------------------------------------------------------
[10:56:17.186] <TB2> INFO: PixTestReadback::CalibrateVd()
[10:56:17.186] <TB2> INFO: ----------------------------------------------------------------------
[10:56:26.833] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C0.dat
[10:56:26.892] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C1.dat
[10:56:26.950] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C2.dat
[10:56:27.034] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C3.dat
[10:56:27.143] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C4.dat
[10:56:27.227] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C5.dat
[10:56:27.302] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C6.dat
[10:56:27.377] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C7.dat
[10:56:27.453] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C8.dat
[10:56:27.554] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C9.dat
[10:56:27.721] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C10.dat
[10:56:27.813] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C11.dat
[10:56:27.897] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C12.dat
[10:56:27.972] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C13.dat
[10:56:28.064] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C14.dat
[10:56:28.148] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C15.dat
[10:56:28.261] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[10:56:28.261] <TB2> INFO: ----------------------------------------------------------------------
[10:56:28.261] <TB2> INFO: PixTestReadback::CalibrateVa()
[10:56:28.261] <TB2> INFO: ----------------------------------------------------------------------
[10:56:37.979] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C0.dat
[10:56:37.985] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C1.dat
[10:56:37.991] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C2.dat
[10:56:37.996] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C3.dat
[10:56:38.001] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C4.dat
[10:56:38.008] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C5.dat
[10:56:38.013] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C6.dat
[10:56:38.018] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C7.dat
[10:56:38.025] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C8.dat
[10:56:38.030] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C9.dat
[10:56:38.035] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C10.dat
[10:56:38.040] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C11.dat
[10:56:38.045] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C12.dat
[10:56:38.050] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C13.dat
[10:56:38.055] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C14.dat
[10:56:38.060] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C15.dat
[10:56:38.109] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[10:56:38.109] <TB2> INFO: ----------------------------------------------------------------------
[10:56:38.109] <TB2> INFO: PixTestReadback::readbackVbg()
[10:56:38.109] <TB2> INFO: ----------------------------------------------------------------------
[10:56:45.479] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[10:56:45.479] <TB2> INFO: ----------------------------------------------------------------------
[10:56:45.479] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[10:56:45.479] <TB2> INFO: ----------------------------------------------------------------------
[10:56:45.479] <TB2> INFO: Vbg will be calibrated using Vd calibration
[10:56:45.479] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 144.5calibrated Vbg = 1.23826 :::*/*/*/*/
[10:56:45.479] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 163.3calibrated Vbg = 1.2372 :::*/*/*/*/
[10:56:45.479] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 162.7calibrated Vbg = 1.24044 :::*/*/*/*/
[10:56:45.479] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 154.3calibrated Vbg = 1.24625 :::*/*/*/*/
[10:56:45.479] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 159calibrated Vbg = 1.25829 :::*/*/*/*/
[10:56:45.479] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 154.4calibrated Vbg = 1.25361 :::*/*/*/*/
[10:56:45.479] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 148.9calibrated Vbg = 1.25889 :::*/*/*/*/
[10:56:45.479] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 155.6calibrated Vbg = 1.25507 :::*/*/*/*/
[10:56:45.479] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 151calibrated Vbg = 1.24794 :::*/*/*/*/
[10:56:45.479] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 149.2calibrated Vbg = 1.24999 :::*/*/*/*/
[10:56:45.479] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150.5calibrated Vbg = 1.24497 :::*/*/*/*/
[10:56:45.479] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 161.3calibrated Vbg = 1.24942 :::*/*/*/*/
[10:56:45.479] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 151.2calibrated Vbg = 1.23728 :::*/*/*/*/
[10:56:45.479] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 152.2calibrated Vbg = 1.23822 :::*/*/*/*/
[10:56:45.479] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 150.2calibrated Vbg = 1.23819 :::*/*/*/*/
[10:56:45.480] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 151.1calibrated Vbg = 1.23584 :::*/*/*/*/
[10:56:45.481] <TB2> INFO: ----------------------------------------------------------------------
[10:56:45.482] <TB2> INFO: PixTestReadback::CalibrateIa()
[10:56:45.482] <TB2> INFO: ----------------------------------------------------------------------
[10:59:21.854] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C0.dat
[10:59:21.859] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C1.dat
[10:59:21.864] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C2.dat
[10:59:21.870] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C3.dat
[10:59:21.875] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C4.dat
[10:59:21.880] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C5.dat
[10:59:21.885] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C6.dat
[10:59:21.890] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C7.dat
[10:59:21.895] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C8.dat
[10:59:21.900] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C9.dat
[10:59:21.905] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C10.dat
[10:59:21.910] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C11.dat
[10:59:21.915] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C12.dat
[10:59:21.920] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C13.dat
[10:59:21.925] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C14.dat
[10:59:21.929] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C15.dat
[10:59:21.977] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[10:59:21.978] <TB2> INFO: PixTestReadback::doTest() done
[10:59:21.979] <TB2> INFO: Decoding statistics:
[10:59:21.979] <TB2> INFO: General information:
[10:59:21.979] <TB2> INFO: 16bit words read: 1024
[10:59:21.979] <TB2> INFO: valid events total: 128
[10:59:21.979] <TB2> INFO: empty events: 128
[10:59:21.979] <TB2> INFO: valid events with pixels: 0
[10:59:21.979] <TB2> INFO: valid pixel hits: 0
[10:59:21.979] <TB2> INFO: Event errors: 0
[10:59:21.979] <TB2> INFO: start marker: 0
[10:59:21.979] <TB2> INFO: stop marker: 0
[10:59:21.979] <TB2> INFO: overflow: 0
[10:59:21.979] <TB2> INFO: invalid 5bit words: 0
[10:59:21.979] <TB2> INFO: invalid XOR eye diagram: 0
[10:59:21.979] <TB2> INFO: frame (failed synchr.): 0
[10:59:21.979] <TB2> INFO: idle data (no TBM trl): 0
[10:59:21.979] <TB2> INFO: no data (only TBM hdr): 0
[10:59:21.979] <TB2> INFO: TBM errors: 0
[10:59:21.979] <TB2> INFO: flawed TBM headers: 0
[10:59:21.979] <TB2> INFO: flawed TBM trailers: 0
[10:59:21.979] <TB2> INFO: event ID mismatches: 0
[10:59:21.979] <TB2> INFO: ROC errors: 0
[10:59:21.979] <TB2> INFO: missing ROC header(s): 0
[10:59:21.979] <TB2> INFO: misplaced readback start: 0
[10:59:21.979] <TB2> INFO: Pixel decoding errors: 0
[10:59:21.979] <TB2> INFO: pixel data incomplete: 0
[10:59:21.979] <TB2> INFO: pixel address: 0
[10:59:21.979] <TB2> INFO: pulse height fill bit: 0
[10:59:21.979] <TB2> INFO: buffer corruption: 0
[10:59:21.998] <TB2> INFO: Decoding statistics:
[10:59:21.998] <TB2> INFO: General information:
[10:59:21.998] <TB2> INFO: 16bit words read: 2755356
[10:59:21.998] <TB2> INFO: valid events total: 176768
[10:59:21.998] <TB2> INFO: empty events: 7865
[10:59:21.998] <TB2> INFO: valid events with pixels: 168903
[10:59:21.998] <TB2> INFO: valid pixel hits: 668083
[10:59:21.998] <TB2> INFO: Event errors: 0
[10:59:21.998] <TB2> INFO: start marker: 0
[10:59:21.998] <TB2> INFO: stop marker: 0
[10:59:21.998] <TB2> INFO: overflow: 0
[10:59:21.998] <TB2> INFO: invalid 5bit words: 0
[10:59:21.998] <TB2> INFO: invalid XOR eye diagram: 0
[10:59:21.998] <TB2> INFO: frame (failed synchr.): 0
[10:59:21.998] <TB2> INFO: idle data (no TBM trl): 0
[10:59:21.998] <TB2> INFO: no data (only TBM hdr): 0
[10:59:21.998] <TB2> INFO: TBM errors: 0
[10:59:21.998] <TB2> INFO: flawed TBM headers: 0
[10:59:21.998] <TB2> INFO: flawed TBM trailers: 0
[10:59:21.998] <TB2> INFO: event ID mismatches: 0
[10:59:21.998] <TB2> INFO: ROC errors: 0
[10:59:21.998] <TB2> INFO: missing ROC header(s): 0
[10:59:21.998] <TB2> INFO: misplaced readback start: 0
[10:59:21.998] <TB2> INFO: Pixel decoding errors: 0
[10:59:21.998] <TB2> INFO: pixel data incomplete: 0
[10:59:21.998] <TB2> INFO: pixel address: 0
[10:59:21.998] <TB2> INFO: pulse height fill bit: 0
[10:59:21.998] <TB2> INFO: buffer corruption: 0
[10:59:21.998] <TB2> INFO: enter test to run
[10:59:21.998] <TB2> INFO: test: exit no parameter change
[10:59:22.042] <TB2> QUIET: Connection to board 149 closed.
[10:59:22.122] <TB2> INFO: pXar: this is the end, my friend