Test Date: 2016-03-23 08:24
Analysis date: 2016-06-09 17:50
Logfile
LogfileView
[07:32:27.504] <TB2> INFO: *** Welcome to pxar ***
[07:32:27.504] <TB2> INFO: *** Today: 2016/03/23
[07:32:27.544] <TB2> INFO: *** Version: 9751-dirty
[07:32:27.544] <TB2> INFO: readRocDacs: /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters_C0.dat .. /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters_C15.dat
[07:32:27.560] <TB2> INFO: readTbmDacs: /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//tbmParameters_C0b.dat
[07:32:27.562] <TB2> INFO: readMaskFile: /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//defaultMaskFile.dat
[07:32:27.563] <TB2> INFO: readTrimFile: /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//trimParameters_C0.dat .. /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//trimParameters_C15.dat
[07:32:27.683] <TB2> INFO: clk: 4
[07:32:27.683] <TB2> INFO: ctr: 4
[07:32:27.683] <TB2> INFO: sda: 19
[07:32:27.683] <TB2> INFO: tin: 9
[07:32:27.683] <TB2> INFO: level: 15
[07:32:27.683] <TB2> INFO: triggerdelay: 0
[07:32:27.683] <TB2> QUIET: Instanciating API for pxar v2.7.5+40~g4fce89b
[07:32:27.683] <TB2> INFO: Log level: INFO
[07:32:27.690] <TB2> INFO: Found DTB DTB_WWXUD2
[07:32:27.700] <TB2> QUIET: Connection to board DTB_WWXUD2 opened.
[07:32:27.702] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 149
HW version: DTB1.2
FW version: 4.4
SW version: 4.6
Options:
USB id: DTB_WWXUD2
MAC address: 40D855118095
Hostname: pixelDTB149
Comment:
------------------------------------------------------
[07:32:27.704] <TB2> INFO: RPC call hashes of host and DTB match: 484264910
[07:32:29.229] <TB2> INFO: DUT info:
[07:32:29.229] <TB2> INFO: The DUT currently contains the following objects:
[07:32:29.229] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[07:32:29.229] <TB2> INFO: TBM Core alpha (0): 7 registers set
[07:32:29.229] <TB2> INFO: TBM Core beta (1): 7 registers set
[07:32:29.229] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[07:32:29.229] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[07:32:29.229] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[07:32:29.229] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[07:32:29.229] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[07:32:29.229] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[07:32:29.229] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[07:32:29.229] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[07:32:29.229] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[07:32:29.229] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[07:32:29.229] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[07:32:29.229] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[07:32:29.229] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[07:32:29.229] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[07:32:29.229] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[07:32:29.229] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[07:32:29.229] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[07:32:29.632] <TB2> INFO: enter 'restricted' command line mode
[07:32:29.632] <TB2> INFO: enter test to run
[07:32:29.632] <TB2> INFO: test: pretest no parameter change
[07:32:29.632] <TB2> INFO: running: pretest
[07:32:29.641] <TB2> INFO: ----------------------------------------------------------------------
[07:32:29.641] <TB2> INFO: PixTestPretest::programROC()
[07:32:29.641] <TB2> INFO: ----------------------------------------------------------------------
[07:32:47.660] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[07:32:47.661] <TB2> INFO: IA differences per ROC: 20.9 19.3 19.3 20.1 20.9 19.3 21.7 18.5 19.3 17.7 20.1 18.5 18.5 19.3 20.9 20.9
[07:32:47.781] <TB2> INFO: enter test to run
[07:32:47.781] <TB2> INFO: test: pretest no parameter change
[07:32:47.781] <TB2> INFO: running: pretest
[07:32:47.782] <TB2> INFO: ----------------------------------------------------------------------
[07:32:47.782] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[07:32:47.782] <TB2> INFO: ----------------------------------------------------------------------
[07:33:09.099] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 392.3 mA = 24.5187 mA/ROC
[07:33:09.100] <TB2> INFO: i(loss) [mA/ROC]: 19.3 20.1 19.3 20.1 20.1 19.3 20.1 19.3 19.3 19.3 20.1 19.3 19.3 18.5 19.3 19.3
[07:33:09.144] <TB2> INFO: enter test to run
[07:33:09.144] <TB2> INFO: test: pretest no parameter change
[07:33:09.144] <TB2> INFO: running: pretest
[07:33:09.144] <TB2> INFO: ----------------------------------------------------------------------
[07:33:09.144] <TB2> INFO: PixTestPretest::findTiming()
[07:33:09.144] <TB2> INFO: ----------------------------------------------------------------------
[07:33:09.144] <TB2> INFO: PixTestCmd::init()
[07:33:10.101] <TB2> WARNING: Not unmasking DUT, not setting Calibrate bits!

[07:34:39.748] <TB2> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[07:34:39.748] <TB2> INFO: (success/tries = 100/100), width = 4
[07:34:39.749] <TB2> INFO: enter test to run
[07:34:39.749] <TB2> INFO: test: pretest no parameter change
[07:34:39.749] <TB2> INFO: running: pretest
[07:34:39.751] <TB2> INFO: ----------------------------------------------------------------------
[07:34:39.751] <TB2> INFO: PixTestPretest::findWorkingPixel()
[07:34:39.751] <TB2> INFO: ----------------------------------------------------------------------
[07:34:39.845] <TB2> INFO: Expecting 231680 events.
[07:34:45.624] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L507> Channel 0 Number of ROCs (1) != Token Chain Length (4)

[07:34:45.707] <TB2> ERROR: <datapipe.cc/CheckEventID:L469> Channel 0 Event ID mismatch: local ID (21) != TBM ID (2)

[07:34:50.144] <TB2> INFO: 231680 events read in total (9742ms).
[07:34:50.149] <TB2> INFO: Test took 10395ms.
[07:34:50.376] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[07:34:50.453] <TB2> INFO: enter test to run
[07:34:50.453] <TB2> INFO: test: pretest no parameter change
[07:34:50.453] <TB2> INFO: running: pretest
[07:34:50.455] <TB2> INFO: ----------------------------------------------------------------------
[07:34:50.455] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[07:34:50.455] <TB2> INFO: ----------------------------------------------------------------------
[07:34:50.550] <TB2> INFO: Expecting 231680 events.
[07:35:00.769] <TB2> INFO: 231680 events read in total (9662ms).
[07:35:00.773] <TB2> INFO: Test took 10313ms.
[07:35:01.037] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[07:35:01.037] <TB2> INFO: CalDel: 126 172 144 143 167 153 163 142 151 148 120 135 146 135 122 143
[07:35:01.037] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[07:35:01.073] <TB2> INFO: enter test to run
[07:35:01.073] <TB2> INFO: test: pretest no parameter change
[07:35:01.073] <TB2> INFO: running: pretest
[07:35:01.078] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters_C0.dat
[07:35:01.082] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters_C1.dat
[07:35:01.087] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters_C2.dat
[07:35:01.093] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters_C3.dat
[07:35:01.098] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters_C4.dat
[07:35:01.103] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters_C5.dat
[07:35:01.108] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters_C6.dat
[07:35:01.113] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters_C7.dat
[07:35:01.118] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters_C8.dat
[07:35:01.123] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters_C9.dat
[07:35:01.129] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters_C10.dat
[07:35:01.134] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters_C11.dat
[07:35:01.139] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters_C12.dat
[07:35:01.144] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters_C13.dat
[07:35:01.149] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters_C14.dat
[07:35:01.156] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters_C15.dat
[07:35:01.160] <TB2> INFO: enter test to run
[07:35:01.160] <TB2> INFO: test: fulltest no parameter change
[07:35:01.160] <TB2> INFO: running: fulltest
[07:35:01.160] <TB2> INFO: ######################################################################
[07:35:01.160] <TB2> INFO: PixTestFullTest::doTest()
[07:35:01.160] <TB2> INFO: ######################################################################
[07:35:01.162] <TB2> INFO: ######################################################################
[07:35:01.162] <TB2> INFO: PixTestAlive::doTest()
[07:35:01.162] <TB2> INFO: ######################################################################
[07:35:01.163] <TB2> INFO: ----------------------------------------------------------------------
[07:35:01.163] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[07:35:01.163] <TB2> INFO: ----------------------------------------------------------------------
[07:35:01.451] <TB2> INFO: Expecting 41600 events.
[07:35:05.297] <TB2> INFO: 41600 events read in total (3289ms).
[07:35:05.298] <TB2> INFO: Test took 4132ms.
[07:35:05.546] <TB2> INFO: PixTestAlive::aliveTest() done
[07:35:05.546] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
[07:35:05.549] <TB2> INFO: ----------------------------------------------------------------------
[07:35:05.549] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[07:35:05.549] <TB2> INFO: ----------------------------------------------------------------------
[07:35:05.814] <TB2> INFO: Expecting 41600 events.
[07:35:08.849] <TB2> INFO: 41600 events read in total (2478ms).
[07:35:08.849] <TB2> INFO: Test took 3298ms.
[07:35:08.849] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[07:35:09.111] <TB2> INFO: PixTestAlive::maskTest() done
[07:35:09.111] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[07:35:09.113] <TB2> INFO: ----------------------------------------------------------------------
[07:35:09.113] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[07:35:09.113] <TB2> INFO: ----------------------------------------------------------------------
[07:35:09.403] <TB2> INFO: Expecting 41600 events.
[07:35:13.340] <TB2> INFO: 41600 events read in total (3380ms).
[07:35:13.341] <TB2> INFO: Test took 4226ms.
[07:35:13.589] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[07:35:13.589] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[07:35:13.589] <TB2> INFO: PixTestAlive::doTest() done, duration: 12 seconds
[07:35:13.589] <TB2> INFO: Decoding statistics:
[07:35:13.589] <TB2> INFO: General information:
[07:35:13.589] <TB2> INFO: 16bit words read: 0
[07:35:13.589] <TB2> INFO: valid events total: 0
[07:35:13.589] <TB2> INFO: empty events: 0
[07:35:13.589] <TB2> INFO: valid events with pixels: 0
[07:35:13.589] <TB2> INFO: valid pixel hits: 0
[07:35:13.589] <TB2> INFO: Event errors: 0
[07:35:13.589] <TB2> INFO: start marker: 0
[07:35:13.589] <TB2> INFO: stop marker: 0
[07:35:13.589] <TB2> INFO: overflow: 0
[07:35:13.589] <TB2> INFO: invalid 5bit words: 0
[07:35:13.589] <TB2> INFO: invalid XOR eye diagram: 0
[07:35:13.589] <TB2> INFO: frame (failed synchr.): 0
[07:35:13.589] <TB2> INFO: idle data (no TBM trl): 0
[07:35:13.589] <TB2> INFO: no data (only TBM hdr): 0
[07:35:13.589] <TB2> INFO: TBM errors: 0
[07:35:13.589] <TB2> INFO: flawed TBM headers: 0
[07:35:13.589] <TB2> INFO: flawed TBM trailers: 0
[07:35:13.589] <TB2> INFO: event ID mismatches: 0
[07:35:13.589] <TB2> INFO: ROC errors: 0
[07:35:13.589] <TB2> INFO: missing ROC header(s): 0
[07:35:13.589] <TB2> INFO: misplaced readback start: 0
[07:35:13.589] <TB2> INFO: Pixel decoding errors: 0
[07:35:13.589] <TB2> INFO: pixel data incomplete: 0
[07:35:13.589] <TB2> INFO: pixel address: 0
[07:35:13.589] <TB2> INFO: pulse height fill bit: 0
[07:35:13.589] <TB2> INFO: buffer corruption: 0
[07:35:13.596] <TB2> INFO: ######################################################################
[07:35:13.596] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[07:35:13.596] <TB2> INFO: ######################################################################
[07:35:13.600] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[07:35:13.611] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[07:35:13.611] <TB2> INFO: run 1 of 1
[07:35:13.874] <TB2> INFO: Expecting 3120000 events.
[07:35:55.915] <TB2> INFO: 873145 events read in total (41484ms).
[07:36:37.073] <TB2> INFO: 1736365 events read in total (82643ms).
[07:37:18.661] <TB2> INFO: 2606685 events read in total (124231ms).
[07:37:43.703] <TB2> INFO: 3120000 events read in total (149272ms).
[07:37:43.772] <TB2> INFO: Test took 150161ms.
[07:38:08.156] <TB2> INFO: PixTestBBMap::doTest() done, duration: 174 seconds
[07:38:08.156] <TB2> INFO: number of dead bumps (per ROC): 3 0 0 0 1 1 0 0 1 0 1 0 0 0 0 22
[07:38:08.156] <TB2> INFO: separation cut (per ROC): 98 92 76 101 90 100 93 98 93 84 106 106 94 88 105 88
[07:38:08.156] <TB2> INFO: Decoding statistics:
[07:38:08.156] <TB2> INFO: General information:
[07:38:08.156] <TB2> INFO: 16bit words read: 0
[07:38:08.156] <TB2> INFO: valid events total: 0
[07:38:08.156] <TB2> INFO: empty events: 0
[07:38:08.156] <TB2> INFO: valid events with pixels: 0
[07:38:08.156] <TB2> INFO: valid pixel hits: 0
[07:38:08.156] <TB2> INFO: Event errors: 0
[07:38:08.156] <TB2> INFO: start marker: 0
[07:38:08.156] <TB2> INFO: stop marker: 0
[07:38:08.156] <TB2> INFO: overflow: 0
[07:38:08.156] <TB2> INFO: invalid 5bit words: 0
[07:38:08.156] <TB2> INFO: invalid XOR eye diagram: 0
[07:38:08.156] <TB2> INFO: frame (failed synchr.): 0
[07:38:08.156] <TB2> INFO: idle data (no TBM trl): 0
[07:38:08.156] <TB2> INFO: no data (only TBM hdr): 0
[07:38:08.156] <TB2> INFO: TBM errors: 0
[07:38:08.156] <TB2> INFO: flawed TBM headers: 0
[07:38:08.156] <TB2> INFO: flawed TBM trailers: 0
[07:38:08.156] <TB2> INFO: event ID mismatches: 0
[07:38:08.157] <TB2> INFO: ROC errors: 0
[07:38:08.157] <TB2> INFO: missing ROC header(s): 0
[07:38:08.157] <TB2> INFO: misplaced readback start: 0
[07:38:08.157] <TB2> INFO: Pixel decoding errors: 0
[07:38:08.157] <TB2> INFO: pixel data incomplete: 0
[07:38:08.157] <TB2> INFO: pixel address: 0
[07:38:08.157] <TB2> INFO: pulse height fill bit: 0
[07:38:08.157] <TB2> INFO: buffer corruption: 0
[07:38:08.232] <TB2> INFO: ######################################################################
[07:38:08.232] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[07:38:08.232] <TB2> INFO: ######################################################################
[07:38:08.232] <TB2> INFO: ----------------------------------------------------------------------
[07:38:08.232] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[07:38:08.232] <TB2> INFO: ----------------------------------------------------------------------
[07:38:08.232] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[07:38:08.240] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[07:38:08.240] <TB2> INFO: run 1 of 1
[07:38:08.507] <TB2> INFO: Expecting 26208000 events.
[07:38:43.064] <TB2> INFO: 917700 events read in total (34000ms).
[07:39:16.558] <TB2> INFO: 1817450 events read in total (67494ms).
[07:39:49.747] <TB2> INFO: 2714400 events read in total (100683ms).
[07:40:23.499] <TB2> INFO: 3610150 events read in total (134435ms).
[07:40:56.982] <TB2> INFO: 4502950 events read in total (167918ms).
[07:41:30.063] <TB2> INFO: 5396050 events read in total (200999ms).
[07:42:03.814] <TB2> INFO: 6288550 events read in total (234750ms).
[07:42:37.255] <TB2> INFO: 7180600 events read in total (268191ms).
[07:43:10.964] <TB2> INFO: 8069750 events read in total (301900ms).
[07:43:44.603] <TB2> INFO: 8960350 events read in total (335539ms).
[07:44:18.152] <TB2> INFO: 9851650 events read in total (369088ms).
[07:44:51.607] <TB2> INFO: 10740350 events read in total (402543ms).
[07:45:24.805] <TB2> INFO: 11629200 events read in total (435741ms).
[07:45:58.374] <TB2> INFO: 12517000 events read in total (469310ms).
[07:46:32.198] <TB2> INFO: 13400850 events read in total (503134ms).
[07:47:05.704] <TB2> INFO: 14281150 events read in total (536640ms).
[07:47:39.507] <TB2> INFO: 15157800 events read in total (570443ms).
[07:48:13.084] <TB2> INFO: 16031450 events read in total (604020ms).
[07:48:46.705] <TB2> INFO: 16906200 events read in total (637641ms).
[07:49:19.900] <TB2> INFO: 17780200 events read in total (670836ms).
[07:49:53.087] <TB2> INFO: 18653650 events read in total (704023ms).
[07:50:26.240] <TB2> INFO: 19525700 events read in total (737176ms).
[07:50:59.477] <TB2> INFO: 20398800 events read in total (770413ms).
[07:51:32.492] <TB2> INFO: 21271100 events read in total (803428ms).
[07:52:05.716] <TB2> INFO: 22140950 events read in total (836652ms).
[07:52:39.403] <TB2> INFO: 23012400 events read in total (870339ms).
[07:53:13.277] <TB2> INFO: 23885300 events read in total (904213ms).
[07:53:46.666] <TB2> INFO: 24757900 events read in total (937602ms).
[07:54:19.925] <TB2> INFO: 25627400 events read in total (970861ms).
[07:54:41.622] <TB2> INFO: 26208000 events read in total (992558ms).
[07:54:41.651] <TB2> INFO: Test took 993411ms.
[07:54:41.869] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[07:54:43.499] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[07:54:45.059] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[07:54:46.791] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[07:54:48.337] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[07:54:49.815] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[07:54:51.357] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[07:54:53.016] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[07:54:54.768] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[07:54:56.375] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[07:54:57.979] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[07:54:59.655] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[07:55:01.285] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[07:55:02.820] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[07:55:04.406] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[07:55:05.962] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[07:55:07.645] <TB2> INFO: PixTestScurves::scurves() done
[07:55:07.645] <TB2> INFO: Vcal mean: 91.47 86.01 76.58 97.95 82.99 94.61 94.69 92.07 95.03 87.34 106.23 113.75 94.71 86.42 94.82 100.18
[07:55:07.645] <TB2> INFO: Vcal RMS: 5.70 5.57 4.63 5.92 4.45 5.49 5.49 5.87 5.98 5.29 5.31 6.78 5.86 5.10 6.55 5.62
[07:55:07.645] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1019 seconds
[07:55:07.645] <TB2> INFO: Decoding statistics:
[07:55:07.645] <TB2> INFO: General information:
[07:55:07.645] <TB2> INFO: 16bit words read: 0
[07:55:07.645] <TB2> INFO: valid events total: 0
[07:55:07.645] <TB2> INFO: empty events: 0
[07:55:07.645] <TB2> INFO: valid events with pixels: 0
[07:55:07.645] <TB2> INFO: valid pixel hits: 0
[07:55:07.645] <TB2> INFO: Event errors: 0
[07:55:07.645] <TB2> INFO: start marker: 0
[07:55:07.645] <TB2> INFO: stop marker: 0
[07:55:07.645] <TB2> INFO: overflow: 0
[07:55:07.645] <TB2> INFO: invalid 5bit words: 0
[07:55:07.645] <TB2> INFO: invalid XOR eye diagram: 0
[07:55:07.645] <TB2> INFO: frame (failed synchr.): 0
[07:55:07.645] <TB2> INFO: idle data (no TBM trl): 0
[07:55:07.645] <TB2> INFO: no data (only TBM hdr): 0
[07:55:07.645] <TB2> INFO: TBM errors: 0
[07:55:07.645] <TB2> INFO: flawed TBM headers: 0
[07:55:07.645] <TB2> INFO: flawed TBM trailers: 0
[07:55:07.645] <TB2> INFO: event ID mismatches: 0
[07:55:07.645] <TB2> INFO: ROC errors: 0
[07:55:07.645] <TB2> INFO: missing ROC header(s): 0
[07:55:07.645] <TB2> INFO: misplaced readback start: 0
[07:55:07.645] <TB2> INFO: Pixel decoding errors: 0
[07:55:07.645] <TB2> INFO: pixel data incomplete: 0
[07:55:07.645] <TB2> INFO: pixel address: 0
[07:55:07.645] <TB2> INFO: pulse height fill bit: 0
[07:55:07.645] <TB2> INFO: buffer corruption: 0
[07:55:07.725] <TB2> INFO: ######################################################################
[07:55:07.725] <TB2> INFO: PixTestTrim::doTest()
[07:55:07.725] <TB2> INFO: ######################################################################
[07:55:07.726] <TB2> INFO: ----------------------------------------------------------------------
[07:55:07.726] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[07:55:07.726] <TB2> INFO: ----------------------------------------------------------------------
[07:55:07.824] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[07:55:07.824] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[07:55:07.833] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[07:55:07.833] <TB2> INFO: run 1 of 1
[07:55:08.112] <TB2> INFO: Expecting 5025280 events.
[07:55:49.949] <TB2> INFO: 1081104 events read in total (41279ms).
[07:56:31.529] <TB2> INFO: 2155280 events read in total (82859ms).
[07:57:13.265] <TB2> INFO: 3229152 events read in total (124595ms).
[07:57:54.471] <TB2> INFO: 4308656 events read in total (165801ms).
[07:58:22.418] <TB2> INFO: 5025280 events read in total (193748ms).
[07:58:22.443] <TB2> INFO: Test took 194611ms.
[07:58:41.926] <TB2> INFO: ROC 0 VthrComp = 95
[07:58:41.927] <TB2> INFO: ROC 1 VthrComp = 87
[07:58:41.927] <TB2> INFO: ROC 2 VthrComp = 78
[07:58:41.927] <TB2> INFO: ROC 3 VthrComp = 99
[07:58:41.927] <TB2> INFO: ROC 4 VthrComp = 87
[07:58:41.927] <TB2> INFO: ROC 5 VthrComp = 98
[07:58:41.927] <TB2> INFO: ROC 6 VthrComp = 97
[07:58:41.928] <TB2> INFO: ROC 7 VthrComp = 97
[07:58:41.928] <TB2> INFO: ROC 8 VthrComp = 99
[07:58:41.928] <TB2> INFO: ROC 9 VthrComp = 89
[07:58:41.928] <TB2> INFO: ROC 10 VthrComp = 105
[07:58:41.928] <TB2> INFO: ROC 11 VthrComp = 103
[07:58:41.928] <TB2> INFO: ROC 12 VthrComp = 95
[07:58:41.928] <TB2> INFO: ROC 13 VthrComp = 89
[07:58:41.928] <TB2> INFO: ROC 14 VthrComp = 97
[07:58:41.929] <TB2> INFO: ROC 15 VthrComp = 100
[07:58:41.929] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[07:58:41.929] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[07:58:41.937] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[07:58:41.937] <TB2> INFO: run 1 of 1
[07:58:42.201] <TB2> INFO: Expecting 5025280 events.
[07:59:19.716] <TB2> INFO: 755920 events read in total (36958ms).
[07:59:56.355] <TB2> INFO: 1510408 events read in total (73597ms).
[08:00:33.183] <TB2> INFO: 2265184 events read in total (110425ms).
[08:01:09.742] <TB2> INFO: 3016096 events read in total (146984ms).
[08:01:46.394] <TB2> INFO: 3761552 events read in total (183636ms).
[08:02:23.173] <TB2> INFO: 4506192 events read in total (220415ms).
[08:02:48.576] <TB2> INFO: 5025280 events read in total (245818ms).
[08:02:48.626] <TB2> INFO: Test took 246689ms.
[08:03:14.168] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 59.6064 for pixel 0/15 mean/min/max = 45.9049/32.0332/59.7766
[08:03:14.169] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 60.0187 for pixel 12/2 mean/min/max = 46.1222/32.1552/60.0891
[08:03:14.169] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 60.1194 for pixel 2/78 mean/min/max = 47.2696/34.3422/60.197
[08:03:14.169] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 59.8676 for pixel 14/58 mean/min/max = 45.6073/31.2093/60.0052
[08:03:14.170] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 56.3513 for pixel 0/9 mean/min/max = 44.1728/31.9413/56.4043
[08:03:14.170] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 58.2356 for pixel 0/28 mean/min/max = 44.861/31.4787/58.2434
[08:03:14.170] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 58.7903 for pixel 5/59 mean/min/max = 45.2309/31.5733/58.8885
[08:03:14.170] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 58.6208 for pixel 0/36 mean/min/max = 45.0668/31.455/58.6787
[08:03:14.171] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 58.2107 for pixel 43/3 mean/min/max = 44.7607/31.2286/58.2928
[08:03:14.171] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 59.4529 for pixel 18/66 mean/min/max = 46.4964/33.4275/59.5654
[08:03:14.171] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 61.5887 for pixel 2/1 mean/min/max = 48.0393/34.281/61.7977
[08:03:14.171] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 69.7888 for pixel 3/15 mean/min/max = 50.6124/31.2828/69.942
[08:03:14.172] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 59.7807 for pixel 0/35 mean/min/max = 45.8935/31.6724/60.1145
[08:03:14.172] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 58.6031 for pixel 4/60 mean/min/max = 45.7347/32.7254/58.7439
[08:03:14.172] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 62.3929 for pixel 0/70 mean/min/max = 46.7921/31.0079/62.5763
[08:03:14.172] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 58.3143 for pixel 51/36 mean/min/max = 45.2012/32.0318/58.3705
[08:03:14.173] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:03:14.263] <TB2> INFO: Expecting 411648 events.
[08:03:24.755] <TB2> INFO: 411648 events read in total (9935ms).
[08:03:24.760] <TB2> INFO: Expecting 411648 events.
[08:03:35.349] <TB2> INFO: 411648 events read in total (10154ms).
[08:03:35.356] <TB2> INFO: Expecting 411648 events.
[08:03:46.003] <TB2> INFO: 411648 events read in total (10226ms).
[08:03:46.013] <TB2> INFO: Expecting 411648 events.
[08:03:56.537] <TB2> INFO: 411648 events read in total (10103ms).
[08:03:56.548] <TB2> INFO: Expecting 411648 events.
[08:04:07.199] <TB2> INFO: 411648 events read in total (10227ms).
[08:04:07.212] <TB2> INFO: Expecting 411648 events.
[08:04:17.781] <TB2> INFO: 411648 events read in total (10149ms).
[08:04:17.797] <TB2> INFO: Expecting 411648 events.
[08:04:28.470] <TB2> INFO: 411648 events read in total (10255ms).
[08:04:28.485] <TB2> INFO: Expecting 411648 events.
[08:04:39.078] <TB2> INFO: 411648 events read in total (10179ms).
[08:04:39.096] <TB2> INFO: Expecting 411648 events.
[08:04:49.716] <TB2> INFO: 411648 events read in total (10205ms).
[08:04:49.736] <TB2> INFO: Expecting 411648 events.
[08:05:00.359] <TB2> INFO: 411648 events read in total (10214ms).
[08:05:00.381] <TB2> INFO: Expecting 411648 events.
[08:05:11.057] <TB2> INFO: 411648 events read in total (10262ms).
[08:05:11.085] <TB2> INFO: Expecting 411648 events.
[08:05:21.618] <TB2> INFO: 411648 events read in total (10131ms).
[08:05:21.644] <TB2> INFO: Expecting 411648 events.
[08:05:32.108] <TB2> INFO: 411648 events read in total (10055ms).
[08:05:32.134] <TB2> INFO: Expecting 411648 events.
[08:05:42.666] <TB2> INFO: 411648 events read in total (10127ms).
[08:05:42.694] <TB2> INFO: Expecting 411648 events.
[08:05:53.221] <TB2> INFO: 411648 events read in total (10124ms).
[08:05:53.251] <TB2> INFO: Expecting 411648 events.
[08:06:03.827] <TB2> INFO: 411648 events read in total (10171ms).
[08:06:03.864] <TB2> INFO: Test took 169692ms.
[08:06:04.811] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[08:06:04.819] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[08:06:04.819] <TB2> INFO: run 1 of 1
[08:06:05.082] <TB2> INFO: Expecting 5025280 events.
[08:06:42.300] <TB2> INFO: 741744 events read in total (36661ms).
[08:07:19.262] <TB2> INFO: 1482488 events read in total (73623ms).
[08:07:56.155] <TB2> INFO: 2223216 events read in total (110516ms).
[08:08:32.414] <TB2> INFO: 2960072 events read in total (146775ms).
[08:09:08.426] <TB2> INFO: 3690968 events read in total (182787ms).
[08:09:44.658] <TB2> INFO: 4419888 events read in total (219019ms).
[08:10:15.043] <TB2> INFO: 5025280 events read in total (249404ms).
[08:10:15.092] <TB2> INFO: Test took 250273ms.
[08:10:40.099] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 2.500000 .. 54.422136
[08:10:40.175] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 2 .. 64 (-1/-1) hits flags = 528 (plus default)
[08:10:40.184] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[08:10:40.184] <TB2> INFO: run 1 of 1
[08:10:40.447] <TB2> INFO: Expecting 2096640 events.
[08:11:20.548] <TB2> INFO: 896592 events read in total (39545ms).
[08:11:59.318] <TB2> INFO: 1789048 events read in total (78315ms).
[08:12:13.220] <TB2> INFO: 2096640 events read in total (92217ms).
[08:12:13.236] <TB2> INFO: Test took 93052ms.
[08:12:28.125] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 15.845516 .. 47.000988
[08:12:28.201] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 5 .. 57 (-1/-1) hits flags = 528 (plus default)
[08:12:28.210] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[08:12:28.210] <TB2> INFO: run 1 of 1
[08:12:28.472] <TB2> INFO: Expecting 1763840 events.
[08:13:09.114] <TB2> INFO: 923032 events read in total (40085ms).
[08:13:45.313] <TB2> INFO: 1763840 events read in total (76284ms).
[08:13:45.326] <TB2> INFO: Test took 77116ms.
[08:14:00.035] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 20.360559 .. 44.323360
[08:14:00.110] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 10 .. 54 (-1/-1) hits flags = 528 (plus default)
[08:14:00.118] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[08:14:00.118] <TB2> INFO: run 1 of 1
[08:14:00.381] <TB2> INFO: Expecting 1497600 events.
[08:14:40.369] <TB2> INFO: 918784 events read in total (39431ms).
[08:15:05.527] <TB2> INFO: 1497600 events read in total (64589ms).
[08:15:05.541] <TB2> INFO: Test took 65422ms.
[08:15:19.490] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 21.918622 .. 43.983277
[08:15:19.568] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 11 .. 53 (-1/-1) hits flags = 528 (plus default)
[08:15:19.576] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[08:15:19.576] <TB2> INFO: run 1 of 1
[08:15:19.842] <TB2> INFO: Expecting 1431040 events.
[08:16:00.375] <TB2> INFO: 920936 events read in total (39976ms).
[08:16:22.681] <TB2> INFO: 1431040 events read in total (62282ms).
[08:16:22.697] <TB2> INFO: Test took 63120ms.
[08:16:37.304] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[08:16:37.304] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[08:16:37.312] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[08:16:37.313] <TB2> INFO: run 1 of 1
[08:16:37.606] <TB2> INFO: Expecting 1364480 events.
[08:17:17.320] <TB2> INFO: 878616 events read in total (39157ms).
[08:17:39.275] <TB2> INFO: 1364480 events read in total (61112ms).
[08:17:39.291] <TB2> INFO: Test took 61979ms.
[08:17:53.652] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C0.dat
[08:17:53.656] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C1.dat
[08:17:53.660] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C2.dat
[08:17:53.663] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C3.dat
[08:17:53.667] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C4.dat
[08:17:53.670] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C5.dat
[08:17:53.674] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C6.dat
[08:17:53.677] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C7.dat
[08:17:53.681] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C8.dat
[08:17:53.684] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C9.dat
[08:17:53.688] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C10.dat
[08:17:53.692] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C11.dat
[08:17:53.695] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C12.dat
[08:17:53.699] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C13.dat
[08:17:53.702] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C14.dat
[08:17:53.706] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C15.dat
[08:17:53.709] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//trimParameters35_C0.dat
[08:17:53.721] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//trimParameters35_C1.dat
[08:17:53.732] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//trimParameters35_C2.dat
[08:17:53.744] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//trimParameters35_C3.dat
[08:17:53.754] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//trimParameters35_C4.dat
[08:17:53.768] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//trimParameters35_C5.dat
[08:17:53.779] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//trimParameters35_C6.dat
[08:17:53.790] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//trimParameters35_C7.dat
[08:17:53.802] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//trimParameters35_C8.dat
[08:17:53.813] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//trimParameters35_C9.dat
[08:17:53.825] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//trimParameters35_C10.dat
[08:17:53.837] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//trimParameters35_C11.dat
[08:17:53.849] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//trimParameters35_C12.dat
[08:17:53.861] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//trimParameters35_C13.dat
[08:17:53.873] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//trimParameters35_C14.dat
[08:17:53.884] <TB2> INFO: write trim parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//trimParameters35_C15.dat
[08:17:53.895] <TB2> INFO: PixTestTrim::trimTest() done
[08:17:53.895] <TB2> INFO: vtrim: 92 108 100 108 93 99 103 93 96 104 110 128 96 98 107 83
[08:17:53.895] <TB2> INFO: vthrcomp: 95 87 78 99 87 98 97 97 99 89 105 103 95 89 97 100
[08:17:53.895] <TB2> INFO: vcal mean: 35.00 34.92 34.98 34.91 34.92 34.95 34.94 34.95 34.93 34.98 34.97 34.97 34.92 34.94 34.97 35.01
[08:17:53.895] <TB2> INFO: vcal RMS: 0.95 0.95 0.86 0.95 0.88 0.93 0.97 0.93 0.97 0.95 0.89 1.07 0.93 0.89 1.09 0.91
[08:17:53.895] <TB2> INFO: bits mean: 8.97 9.44 8.56 9.73 9.75 9.82 10.03 9.34 9.88 8.99 8.60 8.90 9.31 9.58 9.04 9.15
[08:17:53.895] <TB2> INFO: bits RMS: 2.92 2.67 2.64 2.68 2.69 2.71 2.51 2.89 2.74 2.66 2.55 2.65 2.81 2.54 2.91 2.91
[08:17:53.904] <TB2> INFO: ----------------------------------------------------------------------
[08:17:53.904] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[08:17:53.904] <TB2> INFO: ----------------------------------------------------------------------
[08:17:53.908] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[08:17:53.920] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[08:17:53.920] <TB2> INFO: run 1 of 1
[08:17:54.268] <TB2> INFO: Expecting 4160000 events.
[08:18:37.402] <TB2> INFO: 937840 events read in total (42577ms).
[08:19:19.392] <TB2> INFO: 1867725 events read in total (84567ms).
[08:20:01.474] <TB2> INFO: 2788835 events read in total (126649ms).
[08:20:43.357] <TB2> INFO: 3706775 events read in total (168532ms).
[08:21:03.871] <TB2> INFO: 4160000 events read in total (189046ms).
[08:21:03.917] <TB2> INFO: Test took 189997ms.
[08:21:35.134] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 191 (-1/-1) hits flags = 528 (plus default)
[08:21:35.142] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[08:21:35.142] <TB2> INFO: run 1 of 1
[08:21:35.414] <TB2> INFO: Expecting 3993600 events.
[08:22:18.333] <TB2> INFO: 921770 events read in total (42362ms).
[08:23:01.809] <TB2> INFO: 1836330 events read in total (85838ms).
[08:23:44.345] <TB2> INFO: 2742555 events read in total (128374ms).
[08:24:26.105] <TB2> INFO: 3645805 events read in total (170134ms).
[08:24:42.525] <TB2> INFO: 3993600 events read in total (186554ms).
[08:24:42.570] <TB2> INFO: Test took 187427ms.
[08:25:10.024] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 181 (-1/-1) hits flags = 528 (plus default)
[08:25:10.033] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[08:25:10.033] <TB2> INFO: run 1 of 1
[08:25:10.323] <TB2> INFO: Expecting 3785600 events.
[08:25:53.386] <TB2> INFO: 941295 events read in total (42504ms).
[08:26:35.858] <TB2> INFO: 1874565 events read in total (84976ms).
[08:27:17.870] <TB2> INFO: 2797825 events read in total (126988ms).
[08:28:00.430] <TB2> INFO: 3719155 events read in total (169548ms).
[08:28:03.882] <TB2> INFO: 3785600 events read in total (173000ms).
[08:28:03.913] <TB2> INFO: Test took 173880ms.
[08:28:31.079] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 179 (-1/-1) hits flags = 528 (plus default)
[08:28:31.088] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[08:28:31.088] <TB2> INFO: run 1 of 1
[08:28:31.360] <TB2> INFO: Expecting 3744000 events.
[08:29:13.852] <TB2> INFO: 945400 events read in total (41935ms).
[08:29:56.348] <TB2> INFO: 1882385 events read in total (84431ms).
[08:30:38.270] <TB2> INFO: 2808765 events read in total (126353ms).
[08:31:20.841] <TB2> INFO: 3735625 events read in total (168924ms).
[08:31:21.605] <TB2> INFO: 3744000 events read in total (169688ms).
[08:31:21.643] <TB2> INFO: Test took 170555ms.
[08:31:49.440] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 178 (-1/-1) hits flags = 528 (plus default)
[08:31:49.449] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[08:31:49.449] <TB2> INFO: run 1 of 1
[08:31:49.710] <TB2> INFO: Expecting 3723200 events.
[08:32:32.812] <TB2> INFO: 947465 events read in total (42545ms).
[08:33:15.239] <TB2> INFO: 1886360 events read in total (84972ms).
[08:33:57.687] <TB2> INFO: 2814650 events read in total (127420ms).
[08:34:38.897] <TB2> INFO: 3723200 events read in total (168630ms).
[08:34:38.938] <TB2> INFO: Test took 169489ms.
[08:35:05.546] <TB2> INFO: PixTestTrim::trimBitTest() done
[08:35:05.547] <TB2> INFO: PixTestTrim::doTest() done, duration: 2397 seconds
[08:35:05.547] <TB2> INFO: Decoding statistics:
[08:35:05.547] <TB2> INFO: General information:
[08:35:05.547] <TB2> INFO: 16bit words read: 0
[08:35:05.547] <TB2> INFO: valid events total: 0
[08:35:05.547] <TB2> INFO: empty events: 0
[08:35:05.547] <TB2> INFO: valid events with pixels: 0
[08:35:05.547] <TB2> INFO: valid pixel hits: 0
[08:35:05.547] <TB2> INFO: Event errors: 0
[08:35:05.547] <TB2> INFO: start marker: 0
[08:35:05.547] <TB2> INFO: stop marker: 0
[08:35:05.547] <TB2> INFO: overflow: 0
[08:35:05.547] <TB2> INFO: invalid 5bit words: 0
[08:35:05.547] <TB2> INFO: invalid XOR eye diagram: 0
[08:35:05.547] <TB2> INFO: frame (failed synchr.): 0
[08:35:05.547] <TB2> INFO: idle data (no TBM trl): 0
[08:35:05.547] <TB2> INFO: no data (only TBM hdr): 0
[08:35:05.547] <TB2> INFO: TBM errors: 0
[08:35:05.548] <TB2> INFO: flawed TBM headers: 0
[08:35:05.548] <TB2> INFO: flawed TBM trailers: 0
[08:35:05.548] <TB2> INFO: event ID mismatches: 0
[08:35:05.548] <TB2> INFO: ROC errors: 0
[08:35:05.548] <TB2> INFO: missing ROC header(s): 0
[08:35:05.548] <TB2> INFO: misplaced readback start: 0
[08:35:05.548] <TB2> INFO: Pixel decoding errors: 0
[08:35:05.548] <TB2> INFO: pixel data incomplete: 0
[08:35:05.548] <TB2> INFO: pixel address: 0
[08:35:05.548] <TB2> INFO: pulse height fill bit: 0
[08:35:05.548] <TB2> INFO: buffer corruption: 0
[08:35:06.215] <TB2> INFO: ######################################################################
[08:35:06.215] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[08:35:06.215] <TB2> INFO: ######################################################################
[08:35:06.480] <TB2> INFO: Expecting 41600 events.
[08:35:10.266] <TB2> INFO: 41600 events read in total (3229ms).
[08:35:10.267] <TB2> INFO: Test took 4050ms.
[08:35:10.737] <TB2> INFO: Expecting 41600 events.
[08:35:14.592] <TB2> INFO: 41600 events read in total (3298ms).
[08:35:14.593] <TB2> INFO: Test took 4120ms.
[08:35:14.879] <TB2> INFO: Expecting 41600 events.
[08:35:18.714] <TB2> INFO: 41600 events read in total (3278ms).
[08:35:18.716] <TB2> INFO: Test took 4102ms.
[08:35:18.976] <TB2> INFO: Expecting 2560 events.
[08:35:19.834] <TB2> INFO: 2560 events read in total (301ms).
[08:35:19.834] <TB2> INFO: Test took 1103ms.
[08:35:20.141] <TB2> INFO: Expecting 2560 events.
[08:35:21.001] <TB2> INFO: 2560 events read in total (303ms).
[08:35:21.002] <TB2> INFO: Test took 1168ms.
[08:35:21.309] <TB2> INFO: Expecting 2560 events.
[08:35:22.168] <TB2> INFO: 2560 events read in total (301ms).
[08:35:22.168] <TB2> INFO: Test took 1164ms.
[08:35:22.476] <TB2> INFO: Expecting 2560 events.
[08:35:23.334] <TB2> INFO: 2560 events read in total (300ms).
[08:35:23.334] <TB2> INFO: Test took 1165ms.
[08:35:23.641] <TB2> INFO: Expecting 2560 events.
[08:35:24.502] <TB2> INFO: 2560 events read in total (304ms).
[08:35:24.503] <TB2> INFO: Test took 1169ms.
[08:35:24.811] <TB2> INFO: Expecting 2560 events.
[08:35:25.671] <TB2> INFO: 2560 events read in total (303ms).
[08:35:25.671] <TB2> INFO: Test took 1168ms.
[08:35:25.979] <TB2> INFO: Expecting 2560 events.
[08:35:26.835] <TB2> INFO: 2560 events read in total (299ms).
[08:35:26.836] <TB2> INFO: Test took 1164ms.
[08:35:27.143] <TB2> INFO: Expecting 2560 events.
[08:35:28.004] <TB2> INFO: 2560 events read in total (304ms).
[08:35:28.004] <TB2> INFO: Test took 1167ms.
[08:35:28.311] <TB2> INFO: Expecting 2560 events.
[08:35:29.167] <TB2> INFO: 2560 events read in total (298ms).
[08:35:29.167] <TB2> INFO: Test took 1162ms.
[08:35:29.475] <TB2> INFO: Expecting 2560 events.
[08:35:30.333] <TB2> INFO: 2560 events read in total (301ms).
[08:35:30.333] <TB2> INFO: Test took 1165ms.
[08:35:30.641] <TB2> INFO: Expecting 2560 events.
[08:35:31.494] <TB2> INFO: 2560 events read in total (296ms).
[08:35:31.495] <TB2> INFO: Test took 1161ms.
[08:35:31.802] <TB2> INFO: Expecting 2560 events.
[08:35:32.656] <TB2> INFO: 2560 events read in total (297ms).
[08:35:32.656] <TB2> INFO: Test took 1161ms.
[08:35:32.963] <TB2> INFO: Expecting 2560 events.
[08:35:33.818] <TB2> INFO: 2560 events read in total (298ms).
[08:35:33.818] <TB2> INFO: Test took 1161ms.
[08:35:34.125] <TB2> INFO: Expecting 2560 events.
[08:35:34.979] <TB2> INFO: 2560 events read in total (298ms).
[08:35:34.980] <TB2> INFO: Test took 1161ms.
[08:35:35.286] <TB2> INFO: Expecting 2560 events.
[08:35:36.141] <TB2> INFO: 2560 events read in total (298ms).
[08:35:36.141] <TB2> INFO: Test took 1161ms.
[08:35:36.448] <TB2> INFO: Expecting 2560 events.
[08:35:37.303] <TB2> INFO: 2560 events read in total (298ms).
[08:35:37.304] <TB2> INFO: Test took 1163ms.
[08:35:37.309] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:35:37.611] <TB2> INFO: Expecting 655360 events.
[08:35:54.471] <TB2> INFO: 655360 events read in total (16303ms).
[08:35:54.482] <TB2> INFO: Expecting 655360 events.
[08:36:11.572] <TB2> INFO: 655360 events read in total (16688ms).
[08:36:11.584] <TB2> INFO: Expecting 655360 events.
[08:36:28.358] <TB2> INFO: 655360 events read in total (16371ms).
[08:36:28.376] <TB2> INFO: Expecting 655360 events.
[08:36:45.277] <TB2> INFO: 655360 events read in total (16499ms).
[08:36:45.298] <TB2> INFO: Expecting 655360 events.
[08:37:02.065] <TB2> INFO: 655360 events read in total (16364ms).
[08:37:02.090] <TB2> INFO: Expecting 655360 events.
[08:37:18.939] <TB2> INFO: 655360 events read in total (16446ms).
[08:37:18.977] <TB2> INFO: Expecting 655360 events.
[08:37:36.005] <TB2> INFO: 655360 events read in total (16626ms).
[08:37:36.034] <TB2> INFO: Expecting 655360 events.
[08:37:52.931] <TB2> INFO: 655360 events read in total (16494ms).
[08:37:52.971] <TB2> INFO: Expecting 655360 events.
[08:38:09.690] <TB2> INFO: 655360 events read in total (16316ms).
[08:38:09.726] <TB2> INFO: Expecting 655360 events.
[08:38:26.594] <TB2> INFO: 655360 events read in total (16465ms).
[08:38:26.633] <TB2> INFO: Expecting 655360 events.
[08:38:43.407] <TB2> INFO: 655360 events read in total (16372ms).
[08:38:43.456] <TB2> INFO: Expecting 655360 events.
[08:39:00.445] <TB2> INFO: 655360 events read in total (16587ms).
[08:39:00.498] <TB2> INFO: Expecting 655360 events.
[08:39:17.257] <TB2> INFO: 655360 events read in total (16357ms).
[08:39:17.309] <TB2> INFO: Expecting 655360 events.
[08:39:34.082] <TB2> INFO: 655360 events read in total (16370ms).
[08:39:34.136] <TB2> INFO: Expecting 655360 events.
[08:39:50.858] <TB2> INFO: 655360 events read in total (16320ms).
[08:39:50.916] <TB2> INFO: Expecting 655360 events.
[08:40:07.567] <TB2> INFO: 655360 events read in total (16249ms).
[08:40:07.629] <TB2> INFO: Test took 270320ms.
[08:40:07.709] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:40:07.939] <TB2> INFO: Expecting 655360 events.
[08:40:24.817] <TB2> INFO: 655360 events read in total (16321ms).
[08:40:24.827] <TB2> INFO: Expecting 655360 events.
[08:40:41.817] <TB2> INFO: 655360 events read in total (16588ms).
[08:40:41.829] <TB2> INFO: Expecting 655360 events.
[08:40:58.848] <TB2> INFO: 655360 events read in total (16616ms).
[08:40:58.865] <TB2> INFO: Expecting 655360 events.
[08:41:15.865] <TB2> INFO: 655360 events read in total (16598ms).
[08:41:15.888] <TB2> INFO: Expecting 655360 events.
[08:41:32.934] <TB2> INFO: 655360 events read in total (16644ms).
[08:41:32.958] <TB2> INFO: Expecting 655360 events.
[08:41:49.860] <TB2> INFO: 655360 events read in total (16499ms).
[08:41:49.890] <TB2> INFO: Expecting 655360 events.
[08:42:06.860] <TB2> INFO: 655360 events read in total (16568ms).
[08:42:06.891] <TB2> INFO: Expecting 655360 events.
[08:42:23.753] <TB2> INFO: 655360 events read in total (16461ms).
[08:42:23.788] <TB2> INFO: Expecting 655360 events.
[08:42:40.889] <TB2> INFO: 655360 events read in total (16699ms).
[08:42:40.927] <TB2> INFO: Expecting 655360 events.
[08:42:57.948] <TB2> INFO: 655360 events read in total (16619ms).
[08:42:57.996] <TB2> INFO: Expecting 655360 events.
[08:43:14.928] <TB2> INFO: 655360 events read in total (16529ms).
[08:43:14.973] <TB2> INFO: Expecting 655360 events.
[08:43:31.550] <TB2> INFO: 655360 events read in total (16174ms).
[08:43:31.604] <TB2> INFO: Expecting 655360 events.
[08:43:48.606] <TB2> INFO: 655360 events read in total (16600ms).
[08:43:48.656] <TB2> INFO: Expecting 655360 events.
[08:44:05.571] <TB2> INFO: 655360 events read in total (16512ms).
[08:44:05.635] <TB2> INFO: Expecting 655360 events.
[08:44:22.552] <TB2> INFO: 655360 events read in total (16515ms).
[08:44:22.618] <TB2> INFO: Expecting 655360 events.
[08:44:39.521] <TB2> INFO: 655360 events read in total (16500ms).
[08:44:39.584] <TB2> INFO: Test took 271875ms.
[08:44:39.779] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:44:39.786] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[08:44:39.794] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[08:44:39.804] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:44:39.811] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:44:39.818] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:44:39.824] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:44:39.831] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:44:39.838] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:44:39.845] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:44:39.852] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:44:39.859] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:44:39.866] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:44:39.873] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:44:39.880] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:44:39.887] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:44:39.894] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[08:44:39.901] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:44:39.907] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:44:39.968] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C0.dat
[08:44:39.973] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C1.dat
[08:44:39.979] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C2.dat
[08:44:39.984] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C3.dat
[08:44:39.989] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C4.dat
[08:44:39.996] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C5.dat
[08:44:40.003] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C6.dat
[08:44:40.008] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C7.dat
[08:44:40.013] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C8.dat
[08:44:40.018] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C9.dat
[08:44:40.023] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C10.dat
[08:44:40.031] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C11.dat
[08:44:40.036] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C12.dat
[08:44:40.043] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C13.dat
[08:44:40.048] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C14.dat
[08:44:40.053] <TB2> INFO: write dac parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//dacParameters35_C15.dat
[08:44:40.331] <TB2> INFO: Expecting 41600 events.
[08:44:43.835] <TB2> INFO: 41600 events read in total (2947ms).
[08:44:43.835] <TB2> INFO: Test took 3775ms.
[08:44:44.311] <TB2> INFO: Expecting 41600 events.
[08:44:47.801] <TB2> INFO: 41600 events read in total (2933ms).
[08:44:47.802] <TB2> INFO: Test took 3777ms.
[08:44:48.260] <TB2> INFO: Expecting 41600 events.
[08:44:51.746] <TB2> INFO: 41600 events read in total (2930ms).
[08:44:51.747] <TB2> INFO: Test took 3755ms.
[08:44:51.939] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:44:52.031] <TB2> INFO: Expecting 2560 events.
[08:44:52.889] <TB2> INFO: 2560 events read in total (301ms).
[08:44:52.890] <TB2> INFO: Test took 951ms.
[08:44:52.892] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:44:53.198] <TB2> INFO: Expecting 2560 events.
[08:44:54.053] <TB2> INFO: 2560 events read in total (298ms).
[08:44:54.053] <TB2> INFO: Test took 1161ms.
[08:44:54.056] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:44:54.360] <TB2> INFO: Expecting 2560 events.
[08:44:55.215] <TB2> INFO: 2560 events read in total (298ms).
[08:44:55.216] <TB2> INFO: Test took 1160ms.
[08:44:55.219] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:44:55.523] <TB2> INFO: Expecting 2560 events.
[08:44:56.383] <TB2> INFO: 2560 events read in total (303ms).
[08:44:56.383] <TB2> INFO: Test took 1164ms.
[08:44:56.387] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:44:56.691] <TB2> INFO: Expecting 2560 events.
[08:44:57.545] <TB2> INFO: 2560 events read in total (297ms).
[08:44:57.546] <TB2> INFO: Test took 1160ms.
[08:44:57.548] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:44:57.853] <TB2> INFO: Expecting 2560 events.
[08:44:58.707] <TB2> INFO: 2560 events read in total (297ms).
[08:44:58.708] <TB2> INFO: Test took 1160ms.
[08:44:58.710] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:44:59.016] <TB2> INFO: Expecting 2560 events.
[08:44:59.873] <TB2> INFO: 2560 events read in total (301ms).
[08:44:59.874] <TB2> INFO: Test took 1164ms.
[08:44:59.877] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:00.180] <TB2> INFO: Expecting 2560 events.
[08:45:01.041] <TB2> INFO: 2560 events read in total (304ms).
[08:45:01.042] <TB2> INFO: Test took 1165ms.
[08:45:01.045] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:01.348] <TB2> INFO: Expecting 2560 events.
[08:45:02.202] <TB2> INFO: 2560 events read in total (297ms).
[08:45:02.203] <TB2> INFO: Test took 1158ms.
[08:45:02.205] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:02.510] <TB2> INFO: Expecting 2560 events.
[08:45:03.365] <TB2> INFO: 2560 events read in total (298ms).
[08:45:03.365] <TB2> INFO: Test took 1160ms.
[08:45:03.368] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:03.673] <TB2> INFO: Expecting 2560 events.
[08:45:04.527] <TB2> INFO: 2560 events read in total (297ms).
[08:45:04.527] <TB2> INFO: Test took 1159ms.
[08:45:04.530] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:04.835] <TB2> INFO: Expecting 2560 events.
[08:45:05.691] <TB2> INFO: 2560 events read in total (299ms).
[08:45:05.692] <TB2> INFO: Test took 1162ms.
[08:45:05.694] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:05.999] <TB2> INFO: Expecting 2560 events.
[08:45:06.856] <TB2> INFO: 2560 events read in total (300ms).
[08:45:06.856] <TB2> INFO: Test took 1162ms.
[08:45:06.859] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:07.164] <TB2> INFO: Expecting 2560 events.
[08:45:08.021] <TB2> INFO: 2560 events read in total (300ms).
[08:45:08.021] <TB2> INFO: Test took 1162ms.
[08:45:08.024] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:08.329] <TB2> INFO: Expecting 2560 events.
[08:45:09.185] <TB2> INFO: 2560 events read in total (299ms).
[08:45:09.185] <TB2> INFO: Test took 1161ms.
[08:45:09.188] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:09.492] <TB2> INFO: Expecting 2560 events.
[08:45:10.349] <TB2> INFO: 2560 events read in total (300ms).
[08:45:10.349] <TB2> INFO: Test took 1161ms.
[08:45:10.352] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:10.657] <TB2> INFO: Expecting 2560 events.
[08:45:11.513] <TB2> INFO: 2560 events read in total (300ms).
[08:45:11.513] <TB2> INFO: Test took 1161ms.
[08:45:11.516] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:11.820] <TB2> INFO: Expecting 2560 events.
[08:45:12.677] <TB2> INFO: 2560 events read in total (300ms).
[08:45:12.677] <TB2> INFO: Test took 1161ms.
[08:45:12.680] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:12.984] <TB2> INFO: Expecting 2560 events.
[08:45:13.838] <TB2> INFO: 2560 events read in total (297ms).
[08:45:13.839] <TB2> INFO: Test took 1159ms.
[08:45:13.841] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:14.146] <TB2> INFO: Expecting 2560 events.
[08:45:15.000] <TB2> INFO: 2560 events read in total (297ms).
[08:45:15.001] <TB2> INFO: Test took 1160ms.
[08:45:15.003] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:15.308] <TB2> INFO: Expecting 2560 events.
[08:45:16.162] <TB2> INFO: 2560 events read in total (297ms).
[08:45:16.163] <TB2> INFO: Test took 1160ms.
[08:45:16.166] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:16.470] <TB2> INFO: Expecting 2560 events.
[08:45:17.325] <TB2> INFO: 2560 events read in total (298ms).
[08:45:17.325] <TB2> INFO: Test took 1159ms.
[08:45:17.328] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:17.632] <TB2> INFO: Expecting 2560 events.
[08:45:18.487] <TB2> INFO: 2560 events read in total (298ms).
[08:45:18.487] <TB2> INFO: Test took 1159ms.
[08:45:18.489] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:18.794] <TB2> INFO: Expecting 2560 events.
[08:45:19.651] <TB2> INFO: 2560 events read in total (300ms).
[08:45:19.651] <TB2> INFO: Test took 1162ms.
[08:45:19.654] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:19.958] <TB2> INFO: Expecting 2560 events.
[08:45:20.815] <TB2> INFO: 2560 events read in total (300ms).
[08:45:20.816] <TB2> INFO: Test took 1162ms.
[08:45:20.818] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:21.123] <TB2> INFO: Expecting 2560 events.
[08:45:21.979] <TB2> INFO: 2560 events read in total (299ms).
[08:45:21.980] <TB2> INFO: Test took 1162ms.
[08:45:21.982] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:22.287] <TB2> INFO: Expecting 2560 events.
[08:45:23.144] <TB2> INFO: 2560 events read in total (300ms).
[08:45:23.145] <TB2> INFO: Test took 1163ms.
[08:45:23.147] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:23.452] <TB2> INFO: Expecting 2560 events.
[08:45:24.306] <TB2> INFO: 2560 events read in total (297ms).
[08:45:24.306] <TB2> INFO: Test took 1159ms.
[08:45:24.309] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:24.614] <TB2> INFO: Expecting 2560 events.
[08:45:25.468] <TB2> INFO: 2560 events read in total (297ms).
[08:45:25.468] <TB2> INFO: Test took 1159ms.
[08:45:25.471] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:25.776] <TB2> INFO: Expecting 2560 events.
[08:45:26.631] <TB2> INFO: 2560 events read in total (298ms).
[08:45:26.631] <TB2> INFO: Test took 1160ms.
[08:45:26.634] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:26.939] <TB2> INFO: Expecting 2560 events.
[08:45:27.793] <TB2> INFO: 2560 events read in total (297ms).
[08:45:27.793] <TB2> INFO: Test took 1159ms.
[08:45:27.796] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:45:28.101] <TB2> INFO: Expecting 2560 events.
[08:45:28.957] <TB2> INFO: 2560 events read in total (300ms).
[08:45:28.957] <TB2> INFO: Test took 1161ms.
[08:45:29.488] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 623 seconds
[08:45:29.488] <TB2> INFO: PH scale (per ROC): 80 75 79 73 80 82 69 79 78 70 79 78 80 80 78 76
[08:45:29.488] <TB2> INFO: PH offset (per ROC): 154 165 165 166 163 159 159 173 163 163 162 173 162 149 157 164
[08:45:29.492] <TB2> INFO: Decoding statistics:
[08:45:29.492] <TB2> INFO: General information:
[08:45:29.492] <TB2> INFO: 16bit words read: 91920
[08:45:29.492] <TB2> INFO: valid events total: 10240
[08:45:29.492] <TB2> INFO: empty events: 7740
[08:45:29.492] <TB2> INFO: valid events with pixels: 2500
[08:45:29.492] <TB2> INFO: valid pixel hits: 2500
[08:45:29.492] <TB2> INFO: Event errors: 0
[08:45:29.492] <TB2> INFO: start marker: 0
[08:45:29.492] <TB2> INFO: stop marker: 0
[08:45:29.492] <TB2> INFO: overflow: 0
[08:45:29.492] <TB2> INFO: invalid 5bit words: 0
[08:45:29.492] <TB2> INFO: invalid XOR eye diagram: 0
[08:45:29.492] <TB2> INFO: frame (failed synchr.): 0
[08:45:29.492] <TB2> INFO: idle data (no TBM trl): 0
[08:45:29.492] <TB2> INFO: no data (only TBM hdr): 0
[08:45:29.492] <TB2> INFO: TBM errors: 0
[08:45:29.492] <TB2> INFO: flawed TBM headers: 0
[08:45:29.492] <TB2> INFO: flawed TBM trailers: 0
[08:45:29.492] <TB2> INFO: event ID mismatches: 0
[08:45:29.492] <TB2> INFO: ROC errors: 0
[08:45:29.492] <TB2> INFO: missing ROC header(s): 0
[08:45:29.492] <TB2> INFO: misplaced readback start: 0
[08:45:29.492] <TB2> INFO: Pixel decoding errors: 0
[08:45:29.492] <TB2> INFO: pixel data incomplete: 0
[08:45:29.492] <TB2> INFO: pixel address: 0
[08:45:29.492] <TB2> INFO: pulse height fill bit: 0
[08:45:29.492] <TB2> INFO: buffer corruption: 0
[08:45:29.665] <TB2> INFO: ######################################################################
[08:45:29.665] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[08:45:29.665] <TB2> INFO: ######################################################################
[08:45:29.676] <TB2> INFO: scanning low vcal = 10
[08:45:29.945] <TB2> INFO: Expecting 41600 events.
[08:45:33.476] <TB2> INFO: 41600 events read in total (2975ms).
[08:45:33.477] <TB2> INFO: Test took 3801ms.
[08:45:33.479] <TB2> INFO: scanning low vcal = 20
[08:45:33.784] <TB2> INFO: Expecting 41600 events.
[08:45:37.329] <TB2> INFO: 41600 events read in total (2988ms).
[08:45:37.330] <TB2> INFO: Test took 3851ms.
[08:45:37.332] <TB2> INFO: scanning low vcal = 30
[08:45:37.637] <TB2> INFO: Expecting 41600 events.
[08:45:41.235] <TB2> INFO: 41600 events read in total (3041ms).
[08:45:41.235] <TB2> INFO: Test took 3903ms.
[08:45:41.238] <TB2> INFO: scanning low vcal = 40
[08:45:41.533] <TB2> INFO: Expecting 41600 events.
[08:45:45.723] <TB2> INFO: 41600 events read in total (3633ms).
[08:45:45.725] <TB2> INFO: Test took 4487ms.
[08:45:45.728] <TB2> INFO: scanning low vcal = 50
[08:45:45.996] <TB2> INFO: Expecting 41600 events.
[08:45:50.230] <TB2> INFO: 41600 events read in total (3677ms).
[08:45:50.230] <TB2> INFO: Test took 4502ms.
[08:45:50.233] <TB2> INFO: scanning low vcal = 60
[08:45:50.496] <TB2> INFO: Expecting 41600 events.
[08:45:54.734] <TB2> INFO: 41600 events read in total (3681ms).
[08:45:54.735] <TB2> INFO: Test took 4501ms.
[08:45:54.738] <TB2> INFO: scanning low vcal = 70
[08:45:55.002] <TB2> INFO: Expecting 41600 events.
[08:45:59.239] <TB2> INFO: 41600 events read in total (3680ms).
[08:45:59.240] <TB2> INFO: Test took 4502ms.
[08:45:59.243] <TB2> INFO: scanning low vcal = 80
[08:45:59.506] <TB2> INFO: Expecting 41600 events.
[08:46:03.717] <TB2> INFO: 41600 events read in total (3654ms).
[08:46:03.718] <TB2> INFO: Test took 4474ms.
[08:46:03.721] <TB2> INFO: scanning low vcal = 90
[08:46:03.986] <TB2> INFO: Expecting 41600 events.
[08:46:08.203] <TB2> INFO: 41600 events read in total (3661ms).
[08:46:08.204] <TB2> INFO: Test took 4483ms.
[08:46:08.208] <TB2> INFO: scanning low vcal = 100
[08:46:08.472] <TB2> INFO: Expecting 41600 events.
[08:46:12.728] <TB2> INFO: 41600 events read in total (3698ms).
[08:46:12.729] <TB2> INFO: Test took 4521ms.
[08:46:12.732] <TB2> INFO: scanning low vcal = 110
[08:46:13.012] <TB2> INFO: Expecting 41600 events.
[08:46:17.277] <TB2> INFO: 41600 events read in total (3708ms).
[08:46:17.278] <TB2> INFO: Test took 4545ms.
[08:46:17.282] <TB2> INFO: scanning low vcal = 120
[08:46:17.550] <TB2> INFO: Expecting 41600 events.
[08:46:21.755] <TB2> INFO: 41600 events read in total (3648ms).
[08:46:21.756] <TB2> INFO: Test took 4474ms.
[08:46:21.759] <TB2> INFO: scanning low vcal = 130
[08:46:22.050] <TB2> INFO: Expecting 41600 events.
[08:46:26.271] <TB2> INFO: 41600 events read in total (3664ms).
[08:46:26.271] <TB2> INFO: Test took 4512ms.
[08:46:26.275] <TB2> INFO: scanning low vcal = 140
[08:46:26.568] <TB2> INFO: Expecting 41600 events.
[08:46:30.807] <TB2> INFO: 41600 events read in total (3682ms).
[08:46:30.808] <TB2> INFO: Test took 4533ms.
[08:46:30.811] <TB2> INFO: scanning low vcal = 150
[08:46:31.080] <TB2> INFO: Expecting 41600 events.
[08:46:35.280] <TB2> INFO: 41600 events read in total (3643ms).
[08:46:35.281] <TB2> INFO: Test took 4470ms.
[08:46:35.284] <TB2> INFO: scanning low vcal = 160
[08:46:35.547] <TB2> INFO: Expecting 41600 events.
[08:46:39.760] <TB2> INFO: 41600 events read in total (3656ms).
[08:46:39.760] <TB2> INFO: Test took 4476ms.
[08:46:39.764] <TB2> INFO: scanning low vcal = 170
[08:46:40.033] <TB2> INFO: Expecting 41600 events.
[08:46:44.244] <TB2> INFO: 41600 events read in total (3654ms).
[08:46:44.244] <TB2> INFO: Test took 4480ms.
[08:46:44.249] <TB2> INFO: scanning low vcal = 180
[08:46:44.528] <TB2> INFO: Expecting 41600 events.
[08:46:48.792] <TB2> INFO: 41600 events read in total (3707ms).
[08:46:48.794] <TB2> INFO: Test took 4545ms.
[08:46:48.797] <TB2> INFO: scanning low vcal = 190
[08:46:49.059] <TB2> INFO: Expecting 41600 events.
[08:46:53.269] <TB2> INFO: 41600 events read in total (3653ms).
[08:46:53.269] <TB2> INFO: Test took 4472ms.
[08:46:53.273] <TB2> INFO: scanning low vcal = 200
[08:46:53.548] <TB2> INFO: Expecting 41600 events.
[08:46:57.753] <TB2> INFO: 41600 events read in total (3648ms).
[08:46:57.754] <TB2> INFO: Test took 4481ms.
[08:46:57.758] <TB2> INFO: scanning low vcal = 210
[08:46:58.036] <TB2> INFO: Expecting 41600 events.
[08:47:02.253] <TB2> INFO: 41600 events read in total (3661ms).
[08:47:02.254] <TB2> INFO: Test took 4496ms.
[08:47:02.257] <TB2> INFO: scanning low vcal = 220
[08:47:02.522] <TB2> INFO: Expecting 41600 events.
[08:47:06.793] <TB2> INFO: 41600 events read in total (3714ms).
[08:47:06.794] <TB2> INFO: Test took 4537ms.
[08:47:06.797] <TB2> INFO: scanning low vcal = 230
[08:47:07.067] <TB2> INFO: Expecting 41600 events.
[08:47:11.303] <TB2> INFO: 41600 events read in total (3679ms).
[08:47:11.305] <TB2> INFO: Test took 4507ms.
[08:47:11.308] <TB2> INFO: scanning low vcal = 240
[08:47:11.578] <TB2> INFO: Expecting 41600 events.
[08:47:15.783] <TB2> INFO: 41600 events read in total (3648ms).
[08:47:15.784] <TB2> INFO: Test took 4476ms.
[08:47:15.787] <TB2> INFO: scanning low vcal = 250
[08:47:16.063] <TB2> INFO: Expecting 41600 events.
[08:47:20.330] <TB2> INFO: 41600 events read in total (3710ms).
[08:47:20.330] <TB2> INFO: Test took 4543ms.
[08:47:20.335] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[08:47:20.601] <TB2> INFO: Expecting 41600 events.
[08:47:24.842] <TB2> INFO: 41600 events read in total (3683ms).
[08:47:24.843] <TB2> INFO: Test took 4507ms.
[08:47:24.847] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[08:47:25.114] <TB2> INFO: Expecting 41600 events.
[08:47:29.360] <TB2> INFO: 41600 events read in total (3689ms).
[08:47:29.361] <TB2> INFO: Test took 4514ms.
[08:47:29.364] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[08:47:29.630] <TB2> INFO: Expecting 41600 events.
[08:47:33.835] <TB2> INFO: 41600 events read in total (3648ms).
[08:47:33.836] <TB2> INFO: Test took 4471ms.
[08:47:33.839] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[08:47:34.105] <TB2> INFO: Expecting 41600 events.
[08:47:38.333] <TB2> INFO: 41600 events read in total (3672ms).
[08:47:38.334] <TB2> INFO: Test took 4495ms.
[08:47:38.337] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[08:47:38.605] <TB2> INFO: Expecting 41600 events.
[08:47:42.827] <TB2> INFO: 41600 events read in total (3666ms).
[08:47:42.828] <TB2> INFO: Test took 4491ms.
[08:47:43.926] <TB2> INFO: PixTestGainPedestal::measure() done
[08:48:18.126] <TB2> INFO: PixTestGainPedestal::fit() done
[08:48:18.126] <TB2> INFO: non-linearity mean: 0.959 0.957 0.947 0.953 0.959 0.958 0.955 0.955 0.953 0.951 0.957 0.960 0.955 0.953 0.952 0.955
[08:48:18.126] <TB2> INFO: non-linearity RMS: 0.005 0.005 0.007 0.005 0.005 0.006 0.006 0.006 0.006 0.007 0.005 0.007 0.006 0.005 0.006 0.006
[08:48:18.126] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[08:48:18.172] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[08:48:18.214] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[08:48:18.257] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[08:48:18.299] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[08:48:18.343] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[08:48:18.391] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[08:48:18.438] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[08:48:18.480] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[08:48:18.522] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[08:48:18.565] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[08:48:18.608] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[08:48:18.650] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[08:48:18.692] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[08:48:18.728] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[08:48:18.764] <TB2> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[08:48:18.799] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 169 seconds
[08:48:18.799] <TB2> INFO: Decoding statistics:
[08:48:18.799] <TB2> INFO: General information:
[08:48:18.799] <TB2> INFO: 16bit words read: 2662400
[08:48:18.799] <TB2> INFO: valid events total: 166400
[08:48:18.799] <TB2> INFO: empty events: 0
[08:48:18.799] <TB2> INFO: valid events with pixels: 166400
[08:48:18.799] <TB2> INFO: valid pixel hits: 665570
[08:48:18.799] <TB2> INFO: Event errors: 0
[08:48:18.799] <TB2> INFO: start marker: 0
[08:48:18.799] <TB2> INFO: stop marker: 0
[08:48:18.799] <TB2> INFO: overflow: 0
[08:48:18.799] <TB2> INFO: invalid 5bit words: 0
[08:48:18.799] <TB2> INFO: invalid XOR eye diagram: 0
[08:48:18.799] <TB2> INFO: frame (failed synchr.): 0
[08:48:18.799] <TB2> INFO: idle data (no TBM trl): 0
[08:48:18.799] <TB2> INFO: no data (only TBM hdr): 0
[08:48:18.799] <TB2> INFO: TBM errors: 0
[08:48:18.799] <TB2> INFO: flawed TBM headers: 0
[08:48:18.799] <TB2> INFO: flawed TBM trailers: 0
[08:48:18.799] <TB2> INFO: event ID mismatches: 0
[08:48:18.799] <TB2> INFO: ROC errors: 0
[08:48:18.799] <TB2> INFO: missing ROC header(s): 0
[08:48:18.799] <TB2> INFO: misplaced readback start: 0
[08:48:18.799] <TB2> INFO: Pixel decoding errors: 0
[08:48:18.800] <TB2> INFO: pixel data incomplete: 0
[08:48:18.800] <TB2> INFO: pixel address: 0
[08:48:18.800] <TB2> INFO: pulse height fill bit: 0
[08:48:18.800] <TB2> INFO: buffer corruption: 0
[08:48:18.807] <TB2> INFO: readReadbackCal: /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C0.dat .. /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C15.dat
[08:48:18.822] <TB2> INFO: ######################################################################
[08:48:18.822] <TB2> INFO: PixTestReadback::doTest()
[08:48:18.822] <TB2> INFO: ######################################################################
[08:48:18.822] <TB2> INFO: ----------------------------------------------------------------------
[08:48:18.822] <TB2> INFO: PixTestReadback::CalibrateVd()
[08:48:18.822] <TB2> INFO: ----------------------------------------------------------------------
[08:48:28.424] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C0.dat
[08:48:28.429] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C1.dat
[08:48:28.434] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C2.dat
[08:48:28.438] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C3.dat
[08:48:28.443] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C4.dat
[08:48:28.448] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C5.dat
[08:48:28.453] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C6.dat
[08:48:28.458] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C7.dat
[08:48:28.463] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C8.dat
[08:48:28.467] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C9.dat
[08:48:28.473] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C10.dat
[08:48:28.478] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C11.dat
[08:48:28.482] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C12.dat
[08:48:28.487] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C13.dat
[08:48:28.492] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C14.dat
[08:48:28.497] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C15.dat
[08:48:28.547] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[08:48:28.547] <TB2> INFO: ----------------------------------------------------------------------
[08:48:28.547] <TB2> INFO: PixTestReadback::CalibrateVa()
[08:48:28.547] <TB2> INFO: ----------------------------------------------------------------------
[08:48:38.173] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C0.dat
[08:48:38.178] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C1.dat
[08:48:38.183] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C2.dat
[08:48:38.188] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C3.dat
[08:48:38.192] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C4.dat
[08:48:38.199] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C5.dat
[08:48:38.203] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C6.dat
[08:48:38.208] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C7.dat
[08:48:38.216] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C8.dat
[08:48:38.222] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C9.dat
[08:48:38.227] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C10.dat
[08:48:38.231] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C11.dat
[08:48:38.238] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C12.dat
[08:48:38.243] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C13.dat
[08:48:38.248] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C14.dat
[08:48:38.253] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C15.dat
[08:48:38.302] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[08:48:38.302] <TB2> INFO: ----------------------------------------------------------------------
[08:48:38.302] <TB2> INFO: PixTestReadback::readbackVbg()
[08:48:38.302] <TB2> INFO: ----------------------------------------------------------------------
[08:48:45.679] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[08:48:45.679] <TB2> INFO: ----------------------------------------------------------------------
[08:48:45.679] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[08:48:45.680] <TB2> INFO: ----------------------------------------------------------------------
[08:48:45.680] <TB2> INFO: Vbg will be calibrated using Vd calibration
[08:48:45.680] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 142.8calibrated Vbg = 1.21143 :::*/*/*/*/
[08:48:45.680] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 162.9calibrated Vbg = 1.20908 :::*/*/*/*/
[08:48:45.680] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 162.4calibrated Vbg = 1.21493 :::*/*/*/*/
[08:48:45.680] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 153.4calibrated Vbg = 1.2207 :::*/*/*/*/
[08:48:45.680] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 158.8calibrated Vbg = 1.22981 :::*/*/*/*/
[08:48:45.680] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 153calibrated Vbg = 1.22617 :::*/*/*/*/
[08:48:45.680] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 147.5calibrated Vbg = 1.23077 :::*/*/*/*/
[08:48:45.680] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 154.6calibrated Vbg = 1.22854 :::*/*/*/*/
[08:48:45.680] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 149.9calibrated Vbg = 1.22215 :::*/*/*/*/
[08:48:45.680] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 148.5calibrated Vbg = 1.22615 :::*/*/*/*/
[08:48:45.680] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 149.3calibrated Vbg = 1.22124 :::*/*/*/*/
[08:48:45.680] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 160.5calibrated Vbg = 1.22468 :::*/*/*/*/
[08:48:45.680] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 150.1calibrated Vbg = 1.21603 :::*/*/*/*/
[08:48:45.680] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 151.5calibrated Vbg = 1.21677 :::*/*/*/*/
[08:48:45.680] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 149.3calibrated Vbg = 1.216 :::*/*/*/*/
[08:48:45.680] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 150.6calibrated Vbg = 1.21585 :::*/*/*/*/
[08:48:45.683] <TB2> INFO: ----------------------------------------------------------------------
[08:48:45.683] <TB2> INFO: PixTestReadback::CalibrateIa()
[08:48:45.683] <TB2> INFO: ----------------------------------------------------------------------
[08:51:21.806] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C0.dat
[08:51:21.812] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C1.dat
[08:51:21.817] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C2.dat
[08:51:21.823] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C3.dat
[08:51:21.829] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C4.dat
[08:51:21.833] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C5.dat
[08:51:21.838] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C6.dat
[08:51:21.846] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C7.dat
[08:51:21.853] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C8.dat
[08:51:21.858] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C9.dat
[08:51:21.863] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C10.dat
[08:51:21.868] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C11.dat
[08:51:21.874] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C12.dat
[08:51:21.880] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C13.dat
[08:51:21.886] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C14.dat
[08:51:21.893] <TB2> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2186_FullQualification_2016-03-23_08h24m_1458717876//000_FulltestPxar_m20//readbackCal_C15.dat
[08:51:21.941] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[08:51:21.942] <TB2> INFO: PixTestReadback::doTest() done
[08:51:21.942] <TB2> INFO: Decoding statistics:
[08:51:21.942] <TB2> INFO: General information:
[08:51:21.942] <TB2> INFO: 16bit words read: 1024
[08:51:21.942] <TB2> INFO: valid events total: 128
[08:51:21.942] <TB2> INFO: empty events: 128
[08:51:21.942] <TB2> INFO: valid events with pixels: 0
[08:51:21.942] <TB2> INFO: valid pixel hits: 0
[08:51:21.942] <TB2> INFO: Event errors: 0
[08:51:21.943] <TB2> INFO: start marker: 0
[08:51:21.943] <TB2> INFO: stop marker: 0
[08:51:21.943] <TB2> INFO: overflow: 0
[08:51:21.943] <TB2> INFO: invalid 5bit words: 0
[08:51:21.943] <TB2> INFO: invalid XOR eye diagram: 0
[08:51:21.943] <TB2> INFO: frame (failed synchr.): 0
[08:51:21.943] <TB2> INFO: idle data (no TBM trl): 0
[08:51:21.943] <TB2> INFO: no data (only TBM hdr): 0
[08:51:21.943] <TB2> INFO: TBM errors: 0
[08:51:21.943] <TB2> INFO: flawed TBM headers: 0
[08:51:21.943] <TB2> INFO: flawed TBM trailers: 0
[08:51:21.943] <TB2> INFO: event ID mismatches: 0
[08:51:21.943] <TB2> INFO: ROC errors: 0
[08:51:21.943] <TB2> INFO: missing ROC header(s): 0
[08:51:21.943] <TB2> INFO: misplaced readback start: 0
[08:51:21.943] <TB2> INFO: Pixel decoding errors: 0
[08:51:21.943] <TB2> INFO: pixel data incomplete: 0
[08:51:21.943] <TB2> INFO: pixel address: 0
[08:51:21.943] <TB2> INFO: pulse height fill bit: 0
[08:51:21.943] <TB2> INFO: buffer corruption: 0
[08:51:21.961] <TB2> INFO: Decoding statistics:
[08:51:21.961] <TB2> INFO: General information:
[08:51:21.961] <TB2> INFO: 16bit words read: 2755344
[08:51:21.961] <TB2> INFO: valid events total: 176768
[08:51:21.961] <TB2> INFO: empty events: 7868
[08:51:21.961] <TB2> INFO: valid events with pixels: 168900
[08:51:21.961] <TB2> INFO: valid pixel hits: 668070
[08:51:21.961] <TB2> INFO: Event errors: 0
[08:51:21.961] <TB2> INFO: start marker: 0
[08:51:21.961] <TB2> INFO: stop marker: 0
[08:51:21.961] <TB2> INFO: overflow: 0
[08:51:21.961] <TB2> INFO: invalid 5bit words: 0
[08:51:21.961] <TB2> INFO: invalid XOR eye diagram: 0
[08:51:21.961] <TB2> INFO: frame (failed synchr.): 0
[08:51:21.961] <TB2> INFO: idle data (no TBM trl): 0
[08:51:21.961] <TB2> INFO: no data (only TBM hdr): 0
[08:51:21.961] <TB2> INFO: TBM errors: 0
[08:51:21.961] <TB2> INFO: flawed TBM headers: 0
[08:51:21.961] <TB2> INFO: flawed TBM trailers: 0
[08:51:21.961] <TB2> INFO: event ID mismatches: 0
[08:51:21.961] <TB2> INFO: ROC errors: 0
[08:51:21.961] <TB2> INFO: missing ROC header(s): 0
[08:51:21.961] <TB2> INFO: misplaced readback start: 0
[08:51:21.961] <TB2> INFO: Pixel decoding errors: 0
[08:51:21.961] <TB2> INFO: pixel data incomplete: 0
[08:51:21.961] <TB2> INFO: pixel address: 0
[08:51:21.961] <TB2> INFO: pulse height fill bit: 0
[08:51:21.961] <TB2> INFO: buffer corruption: 0
[08:51:21.961] <TB2> INFO: enter test to run
[08:51:21.961] <TB2> INFO: test: exit no parameter change
[08:51:22.008] <TB2> QUIET: Connection to board 149 closed.
[08:51:22.088] <TB2> INFO: pXar: this is the end, my friend
MoReWeb-v1.0.0-5-g82d9ff6 on branch psi46master