[09:35:41.108] <TB1> INFO: *** Welcome to pxar ***
[09:35:41.108] <TB1> INFO: *** Today: 2016/03/23
[09:35:41.180] <TB1> INFO: *** Version: 9751-dirty
[09:35:41.180] <TB1> INFO: readRocDacs: /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C0.dat .. /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C15.dat
[09:35:41.199] <TB1> INFO: readTbmDacs: /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//tbmParameters_C0a.dat .. /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//tbmParameters_C0b.dat
[09:35:41.201] <TB1> INFO: readMaskFile: /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//defaultMaskFile.dat
[09:35:41.202] <TB1> INFO: readTrimFile: /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters_C0.dat .. /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters_C15.dat
[09:35:41.336] <TB1> INFO: clk: 4
[09:35:41.336] <TB1> INFO: ctr: 4
[09:35:41.336] <TB1> INFO: sda: 19
[09:35:41.336] <TB1> INFO: tin: 9
[09:35:41.336] <TB1> INFO: level: 15
[09:35:41.336] <TB1> INFO: triggerdelay: 0
[09:35:41.336] <TB1> QUIET: Instanciating API for pxar v2.7.5+40~g4fce89b
[09:35:41.336] <TB1> INFO: Log level: INFO
[09:35:41.343] <TB1> INFO: Found DTB DTB_WXC03A
[09:35:41.353] <TB1> QUIET: Connection to board DTB_WXC03A opened.
[09:35:41.355] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 154
HW version: DTB1.2
FW version: 4.4
SW version: 4.6
Options:
USB id: DTB_WXC03A
MAC address: 40D85511809A
Hostname: pixelDTB154
Comment:
------------------------------------------------------
[09:35:41.357] <TB1> INFO: RPC call hashes of host and DTB match: 484264910
[09:35:42.871] <TB1> INFO: DUT info:
[09:35:42.871] <TB1> INFO: The DUT currently contains the following objects:
[09:35:42.871] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[09:35:42.871] <TB1> INFO: TBM Core alpha (0): 7 registers set
[09:35:42.871] <TB1> INFO: TBM Core beta (1): 7 registers set
[09:35:42.871] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[09:35:42.871] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:42.871] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:42.871] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:42.871] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:42.871] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:42.871] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:42.871] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:42.871] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:42.871] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:42.871] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:42.871] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:42.871] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:42.871] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:42.871] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:42.871] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:42.871] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:43.274] <TB1> INFO: enter 'restricted' command line mode
[09:35:43.274] <TB1> INFO: enter test to run
[09:35:43.274] <TB1> INFO: test: pretest no parameter change
[09:35:43.274] <TB1> INFO: running: pretest
[09:35:43.280] <TB1> INFO: ----------------------------------------------------------------------
[09:35:43.280] <TB1> INFO: PixTestPretest::programROC()
[09:35:43.280] <TB1> INFO: ----------------------------------------------------------------------
[09:36:01.295] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[09:36:01.295] <TB1> INFO: IA differences per ROC: 22.5 21.7 19.3 20.1 20.9 18.5 19.3 20.1 18.5 17.7 20.1 20.9 16.9 18.5 21.7 21.7
[09:36:01.385] <TB1> INFO: enter test to run
[09:36:01.385] <TB1> INFO: test: pretest no parameter change
[09:36:01.385] <TB1> INFO: running: pretest
[09:36:01.386] <TB1> INFO: ----------------------------------------------------------------------
[09:36:01.386] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[09:36:01.386] <TB1> INFO: ----------------------------------------------------------------------
[09:36:08.780] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 382.7 mA = 23.9187 mA/ROC
[09:36:08.781] <TB1> INFO: i(loss) [mA/ROC]: 18.5 19.3 19.3 19.3 18.5 18.5 18.5 18.5 19.3 19.3 18.5 18.5 19.3 18.5 18.5 18.5
[09:36:08.814] <TB1> INFO: enter test to run
[09:36:08.814] <TB1> INFO: test: pretest no parameter change
[09:36:08.814] <TB1> INFO: running: pretest
[09:36:08.814] <TB1> INFO: ----------------------------------------------------------------------
[09:36:08.814] <TB1> INFO: PixTestPretest::findTiming()
[09:36:08.814] <TB1> INFO: ----------------------------------------------------------------------
[09:36:08.814] <TB1> INFO: PixTestCmd::init()

[09:37:38.980] <TB1> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[09:37:38.980] <TB1> INFO: (success/tries = 100/100), width = 4
[09:37:38.981] <TB1> INFO: enter test to run
[09:37:38.981] <TB1> INFO: test: pretest no parameter change
[09:37:38.981] <TB1> INFO: running: pretest
[09:37:38.982] <TB1> INFO: ----------------------------------------------------------------------
[09:37:38.983] <TB1> INFO: PixTestPretest::findWorkingPixel()
[09:37:38.983] <TB1> INFO: ----------------------------------------------------------------------
[09:37:39.076] <TB1> INFO: Expecting 231680 events.


[09:37:49.331] <TB1> INFO: 231680 events read in total (9698ms).
[09:37:49.335] <TB1> INFO: Test took 10347ms.
[09:37:49.574] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[09:37:49.634] <TB1> INFO: enter test to run
[09:37:49.634] <TB1> INFO: test: pretest no parameter change
[09:37:49.634] <TB1> INFO: running: pretest
[09:37:49.636] <TB1> INFO: ----------------------------------------------------------------------
[09:37:49.636] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[09:37:49.636] <TB1> INFO: ----------------------------------------------------------------------
[09:37:49.728] <TB1> INFO: Expecting 231680 events.
[09:37:59.962] <TB1> INFO: 231680 events read in total (9678ms).
[09:37:59.966] <TB1> INFO: Test took 10327ms.
[09:38:00.224] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[09:38:00.224] <TB1> INFO: CalDel: 133 141 130 153 132 138 113 125 126 140 139 157 132 135 134 131
[09:38:00.224] <TB1> INFO: VthrComp: 51 51 51 52 51 51 51 51 51 51 51 51 51 51 51 51
[09:38:00.267] <TB1> INFO: enter test to run
[09:38:00.267] <TB1> INFO: test: pretest no parameter change
[09:38:00.267] <TB1> INFO: running: pretest
[09:38:00.270] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C0.dat
[09:38:00.276] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C1.dat
[09:38:00.281] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C2.dat
[09:38:00.288] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C3.dat
[09:38:00.294] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C4.dat
[09:38:00.300] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C5.dat
[09:38:00.305] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C6.dat
[09:38:00.310] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C7.dat
[09:38:00.315] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C8.dat
[09:38:00.321] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C9.dat
[09:38:00.327] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C10.dat
[09:38:00.333] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C11.dat
[09:38:00.339] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C12.dat
[09:38:00.344] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C13.dat
[09:38:00.351] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C14.dat
[09:38:00.356] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C15.dat
[09:38:00.360] <TB1> INFO: enter test to run
[09:38:00.360] <TB1> INFO: test: fulltest no parameter change
[09:38:00.360] <TB1> INFO: running: fulltest
[09:38:00.360] <TB1> INFO: ######################################################################
[09:38:00.360] <TB1> INFO: PixTestFullTest::doTest()
[09:38:00.360] <TB1> INFO: ######################################################################
[09:38:00.362] <TB1> INFO: ######################################################################
[09:38:00.362] <TB1> INFO: PixTestAlive::doTest()
[09:38:00.362] <TB1> INFO: ######################################################################
[09:38:00.363] <TB1> INFO: ----------------------------------------------------------------------
[09:38:00.363] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:38:00.363] <TB1> INFO: ----------------------------------------------------------------------
[09:38:00.643] <TB1> INFO: Expecting 41600 events.
[09:38:04.516] <TB1> INFO: 41600 events read in total (3317ms).
[09:38:04.517] <TB1> INFO: Test took 4152ms.
[09:38:04.743] <TB1> INFO: PixTestAlive::aliveTest() done
[09:38:04.743] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0
[09:38:04.744] <TB1> INFO: ----------------------------------------------------------------------
[09:38:04.744] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:38:04.744] <TB1> INFO: ----------------------------------------------------------------------
[09:38:05.038] <TB1> INFO: Expecting 41600 events.
[09:38:08.054] <TB1> INFO: 41600 events read in total (2460ms).
[09:38:08.055] <TB1> INFO: Test took 3310ms.
[09:38:08.055] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[09:38:08.298] <TB1> INFO: PixTestAlive::maskTest() done
[09:38:08.298] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:38:08.299] <TB1> INFO: ----------------------------------------------------------------------
[09:38:08.299] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:38:08.299] <TB1> INFO: ----------------------------------------------------------------------
[09:38:08.591] <TB1> INFO: Expecting 41600 events.
[09:38:12.392] <TB1> INFO: 41600 events read in total (3245ms).
[09:38:12.392] <TB1> INFO: Test took 4092ms.
[09:38:12.622] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[09:38:12.622] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:38:12.622] <TB1> INFO: PixTestAlive::doTest() done, duration: 12 seconds
[09:38:12.622] <TB1> INFO: Decoding statistics:
[09:38:12.622] <TB1> INFO: General information:
[09:38:12.622] <TB1> INFO: 16bit words read: 0
[09:38:12.622] <TB1> INFO: valid events total: 0
[09:38:12.622] <TB1> INFO: empty events: 0
[09:38:12.622] <TB1> INFO: valid events with pixels: 0
[09:38:12.622] <TB1> INFO: valid pixel hits: 0
[09:38:12.622] <TB1> INFO: Event errors: 0
[09:38:12.622] <TB1> INFO: start marker: 0
[09:38:12.622] <TB1> INFO: stop marker: 0
[09:38:12.622] <TB1> INFO: overflow: 0
[09:38:12.622] <TB1> INFO: invalid 5bit words: 0
[09:38:12.622] <TB1> INFO: invalid XOR eye diagram: 0
[09:38:12.622] <TB1> INFO: frame (failed synchr.): 0
[09:38:12.622] <TB1> INFO: idle data (no TBM trl): 0
[09:38:12.623] <TB1> INFO: no data (only TBM hdr): 0
[09:38:12.623] <TB1> INFO: TBM errors: 0
[09:38:12.623] <TB1> INFO: flawed TBM headers: 0
[09:38:12.623] <TB1> INFO: flawed TBM trailers: 0
[09:38:12.623] <TB1> INFO: event ID mismatches: 0
[09:38:12.623] <TB1> INFO: ROC errors: 0
[09:38:12.623] <TB1> INFO: missing ROC header(s): 0
[09:38:12.623] <TB1> INFO: misplaced readback start: 0
[09:38:12.623] <TB1> INFO: Pixel decoding errors: 0
[09:38:12.623] <TB1> INFO: pixel data incomplete: 0
[09:38:12.623] <TB1> INFO: pixel address: 0
[09:38:12.623] <TB1> INFO: pulse height fill bit: 0
[09:38:12.623] <TB1> INFO: buffer corruption: 0
[09:38:12.635] <TB1> INFO: ######################################################################
[09:38:12.635] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[09:38:12.635] <TB1> INFO: ######################################################################
[09:38:12.637] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[09:38:12.648] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[09:38:12.648] <TB1> INFO: run 1 of 1
[09:38:12.912] <TB1> INFO: Expecting 3120000 events.
[09:38:55.142] <TB1> INFO: 890795 events read in total (41674ms).
[09:39:36.074] <TB1> INFO: 1764405 events read in total (82606ms).
[09:40:17.456] <TB1> INFO: 2647725 events read in total (123989ms).
[09:40:39.328] <TB1> INFO: 3120000 events read in total (145860ms).
[09:40:39.376] <TB1> INFO: Test took 146728ms.
[09:41:03.292] <TB1> INFO: PixTestBBMap::doTest() done, duration: 170 seconds
[09:41:03.292] <TB1> INFO: number of dead bumps (per ROC): 31 18 80 29 4 0 18 27 14 17 11 6 30 17 8 38
[09:41:03.292] <TB1> INFO: separation cut (per ROC): 83 81 92 111 92 86 85 84 94 82 77 93 80 81 92 88
[09:41:03.292] <TB1> INFO: Decoding statistics:
[09:41:03.292] <TB1> INFO: General information:
[09:41:03.292] <TB1> INFO: 16bit words read: 0
[09:41:03.292] <TB1> INFO: valid events total: 0
[09:41:03.292] <TB1> INFO: empty events: 0
[09:41:03.292] <TB1> INFO: valid events with pixels: 0
[09:41:03.292] <TB1> INFO: valid pixel hits: 0
[09:41:03.292] <TB1> INFO: Event errors: 0
[09:41:03.292] <TB1> INFO: start marker: 0
[09:41:03.292] <TB1> INFO: stop marker: 0
[09:41:03.292] <TB1> INFO: overflow: 0
[09:41:03.292] <TB1> INFO: invalid 5bit words: 0
[09:41:03.292] <TB1> INFO: invalid XOR eye diagram: 0
[09:41:03.292] <TB1> INFO: frame (failed synchr.): 0
[09:41:03.292] <TB1> INFO: idle data (no TBM trl): 0
[09:41:03.292] <TB1> INFO: no data (only TBM hdr): 0
[09:41:03.292] <TB1> INFO: TBM errors: 0
[09:41:03.292] <TB1> INFO: flawed TBM headers: 0
[09:41:03.292] <TB1> INFO: flawed TBM trailers: 0
[09:41:03.292] <TB1> INFO: event ID mismatches: 0
[09:41:03.292] <TB1> INFO: ROC errors: 0
[09:41:03.292] <TB1> INFO: missing ROC header(s): 0
[09:41:03.292] <TB1> INFO: misplaced readback start: 0
[09:41:03.292] <TB1> INFO: Pixel decoding errors: 0
[09:41:03.292] <TB1> INFO: pixel data incomplete: 0
[09:41:03.292] <TB1> INFO: pixel address: 0
[09:41:03.292] <TB1> INFO: pulse height fill bit: 0
[09:41:03.292] <TB1> INFO: buffer corruption: 0
[09:41:03.364] <TB1> INFO: ######################################################################
[09:41:03.364] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:41:03.364] <TB1> INFO: ######################################################################
[09:41:03.364] <TB1> INFO: ----------------------------------------------------------------------
[09:41:03.364] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:41:03.364] <TB1> INFO: ----------------------------------------------------------------------
[09:41:03.364] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[09:41:03.377] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[09:41:03.377] <TB1> INFO: run 1 of 1
[09:41:03.637] <TB1> INFO: Expecting 26208000 events.
[09:41:38.131] <TB1> INFO: 916150 events read in total (33937ms).
[09:42:11.189] <TB1> INFO: 1819100 events read in total (66995ms).
[09:42:44.084] <TB1> INFO: 2722100 events read in total (99890ms).
[09:43:16.651] <TB1> INFO: 3626300 events read in total (132457ms).
[09:43:49.630] <TB1> INFO: 4527250 events read in total (165436ms).
[09:44:22.580] <TB1> INFO: 5422600 events read in total (198386ms).
[09:44:55.616] <TB1> INFO: 6323050 events read in total (231422ms).
[09:45:28.630] <TB1> INFO: 7220700 events read in total (264436ms).
[09:46:01.510] <TB1> INFO: 8118550 events read in total (297316ms).
[09:46:34.514] <TB1> INFO: 9014550 events read in total (330320ms).
[09:47:07.351] <TB1> INFO: 9908250 events read in total (363157ms).
[09:47:40.326] <TB1> INFO: 10803000 events read in total (396132ms).
[09:48:13.202] <TB1> INFO: 11697250 events read in total (429008ms).
[09:48:45.714] <TB1> INFO: 12591800 events read in total (461520ms).
[09:49:18.588] <TB1> INFO: 13475700 events read in total (494394ms).
[09:49:51.432] <TB1> INFO: 14359950 events read in total (527238ms).
[09:50:23.996] <TB1> INFO: 15243150 events read in total (559802ms).
[09:50:57.257] <TB1> INFO: 16122500 events read in total (593063ms).
[09:51:30.119] <TB1> INFO: 17000600 events read in total (625925ms).
[09:52:02.642] <TB1> INFO: 17879350 events read in total (658448ms).
[09:52:35.915] <TB1> INFO: 18759900 events read in total (691721ms).
[09:53:09.657] <TB1> INFO: 19635300 events read in total (725463ms).
[09:53:43.409] <TB1> INFO: 20511500 events read in total (759215ms).
[09:54:16.231] <TB1> INFO: 21389850 events read in total (792037ms).
[09:54:48.738] <TB1> INFO: 22267500 events read in total (824544ms).
[09:55:21.752] <TB1> INFO: 23142750 events read in total (857558ms).
[09:55:54.222] <TB1> INFO: 24020300 events read in total (890028ms).
[09:56:26.817] <TB1> INFO: 24899600 events read in total (922623ms).
[09:56:59.692] <TB1> INFO: 25778450 events read in total (955498ms).
[09:57:15.698] <TB1> INFO: 26208000 events read in total (971504ms).
[09:57:15.727] <TB1> INFO: Test took 972349ms.
[09:57:15.986] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:57:17.529] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:57:19.275] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:57:20.857] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:57:22.287] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:57:23.936] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:57:25.488] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:57:26.936] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:57:28.578] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:57:30.462] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:57:32.067] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:57:33.647] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:57:35.260] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:57:36.956] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:57:38.739] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:57:40.349] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:57:41.969] <TB1> INFO: PixTestScurves::scurves() done
[09:57:41.969] <TB1> INFO: Vcal mean: 93.45 91.42 100.25 107.37 89.19 91.65 102.83 96.99 108.23 88.03 88.93 94.44 86.50 80.70 86.75 98.64
[09:57:41.969] <TB1> INFO: Vcal RMS: 4.66 5.47 5.07 6.52 5.37 5.13 5.13 5.91 6.25 5.49 5.02 5.78 4.59 4.56 5.44 5.36
[09:57:41.969] <TB1> INFO: PixTestScurves::fullTest() done, duration: 998 seconds
[09:57:41.969] <TB1> INFO: Decoding statistics:
[09:57:41.969] <TB1> INFO: General information:
[09:57:41.969] <TB1> INFO: 16bit words read: 0
[09:57:41.969] <TB1> INFO: valid events total: 0
[09:57:41.969] <TB1> INFO: empty events: 0
[09:57:41.969] <TB1> INFO: valid events with pixels: 0
[09:57:41.969] <TB1> INFO: valid pixel hits: 0
[09:57:41.969] <TB1> INFO: Event errors: 0
[09:57:41.969] <TB1> INFO: start marker: 0
[09:57:41.969] <TB1> INFO: stop marker: 0
[09:57:41.969] <TB1> INFO: overflow: 0
[09:57:41.969] <TB1> INFO: invalid 5bit words: 0
[09:57:41.969] <TB1> INFO: invalid XOR eye diagram: 0
[09:57:41.969] <TB1> INFO: frame (failed synchr.): 0
[09:57:41.969] <TB1> INFO: idle data (no TBM trl): 0
[09:57:41.969] <TB1> INFO: no data (only TBM hdr): 0
[09:57:41.969] <TB1> INFO: TBM errors: 0
[09:57:41.969] <TB1> INFO: flawed TBM headers: 0
[09:57:41.969] <TB1> INFO: flawed TBM trailers: 0
[09:57:41.970] <TB1> INFO: event ID mismatches: 0
[09:57:41.970] <TB1> INFO: ROC errors: 0
[09:57:41.970] <TB1> INFO: missing ROC header(s): 0
[09:57:41.970] <TB1> INFO: misplaced readback start: 0
[09:57:41.970] <TB1> INFO: Pixel decoding errors: 0
[09:57:41.970] <TB1> INFO: pixel data incomplete: 0
[09:57:41.970] <TB1> INFO: pixel address: 0
[09:57:41.970] <TB1> INFO: pulse height fill bit: 0
[09:57:41.970] <TB1> INFO: buffer corruption: 0
[09:57:42.047] <TB1> INFO: ######################################################################
[09:57:42.047] <TB1> INFO: PixTestTrim::doTest()
[09:57:42.047] <TB1> INFO: ######################################################################
[09:57:42.048] <TB1> INFO: ----------------------------------------------------------------------
[09:57:42.048] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[09:57:42.048] <TB1> INFO: ----------------------------------------------------------------------
[09:57:42.142] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:57:42.142] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[09:57:42.153] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[09:57:42.153] <TB1> INFO: run 1 of 1
[09:57:42.441] <TB1> INFO: Expecting 5025280 events.
[09:58:23.169] <TB1> INFO: 1086440 events read in total (40172ms).
[09:59:03.788] <TB1> INFO: 2164464 events read in total (80792ms).
[09:59:44.595] <TB1> INFO: 3241808 events read in total (121599ms).
[10:00:25.034] <TB1> INFO: 4325168 events read in total (162037ms).
[10:00:51.198] <TB1> INFO: 5025280 events read in total (188201ms).
[10:00:51.234] <TB1> INFO: Test took 189080ms.
[10:01:11.399] <TB1> INFO: ROC 0 VthrComp = 99
[10:01:11.399] <TB1> INFO: ROC 1 VthrComp = 91
[10:01:11.399] <TB1> INFO: ROC 2 VthrComp = 103
[10:01:11.399] <TB1> INFO: ROC 3 VthrComp = 99
[10:01:11.399] <TB1> INFO: ROC 4 VthrComp = 91
[10:01:11.399] <TB1> INFO: ROC 5 VthrComp = 91
[10:01:11.400] <TB1> INFO: ROC 6 VthrComp = 101
[10:01:11.400] <TB1> INFO: ROC 7 VthrComp = 95
[10:01:11.400] <TB1> INFO: ROC 8 VthrComp = 106
[10:01:11.400] <TB1> INFO: ROC 9 VthrComp = 90
[10:01:11.400] <TB1> INFO: ROC 10 VthrComp = 90
[10:01:11.400] <TB1> INFO: ROC 11 VthrComp = 93
[10:01:11.400] <TB1> INFO: ROC 12 VthrComp = 92
[10:01:11.400] <TB1> INFO: ROC 13 VthrComp = 84
[10:01:11.400] <TB1> INFO: ROC 14 VthrComp = 90
[10:01:11.400] <TB1> INFO: ROC 15 VthrComp = 101
[10:01:11.400] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[10:01:11.400] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[10:01:11.408] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[10:01:11.408] <TB1> INFO: run 1 of 1
[10:01:11.697] <TB1> INFO: Expecting 5025280 events.
[10:01:48.035] <TB1> INFO: 756456 events read in total (35782ms).
[10:02:23.852] <TB1> INFO: 1511888 events read in total (71599ms).
[10:03:00.004] <TB1> INFO: 2267680 events read in total (107751ms).
[10:03:36.058] <TB1> INFO: 3019464 events read in total (143805ms).
[10:04:12.308] <TB1> INFO: 3765808 events read in total (180055ms).
[10:04:47.811] <TB1> INFO: 4510224 events read in total (215558ms).
[10:05:12.267] <TB1> INFO: 5025280 events read in total (240014ms).
[10:05:12.316] <TB1> INFO: Test took 240908ms.
[10:05:37.469] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 55.5652 for pixel 13/2 mean/min/max = 43.9038/32.0454/55.7621
[10:05:37.469] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 59.3301 for pixel 0/2 mean/min/max = 46.2682/33.206/59.3303
[10:05:37.470] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 57.1849 for pixel 24/78 mean/min/max = 44.8336/32.4224/57.2448
[10:05:37.470] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 64.1677 for pixel 17/78 mean/min/max = 48.0241/31.8801/64.1681
[10:05:37.470] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 57.9662 for pixel 4/51 mean/min/max = 45.5687/32.9604/58.177
[10:05:37.470] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 57.536 for pixel 5/0 mean/min/max = 45.755/33.9086/57.6014
[10:05:37.471] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 57.782 for pixel 0/11 mean/min/max = 45.2884/32.7396/57.8373
[10:05:37.471] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 60.081 for pixel 0/10 mean/min/max = 46.0866/31.7529/60.4204
[10:05:37.471] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 64.3779 for pixel 0/23 mean/min/max = 48.6974/32.935/64.4598
[10:05:37.471] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 58.8736 for pixel 11/76 mean/min/max = 46.3401/33.5196/59.1605
[10:05:37.472] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 56.4683 for pixel 27/69 mean/min/max = 45.0986/33.6112/56.5859
[10:05:37.472] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 60.4827 for pixel 7/35 mean/min/max = 46.9014/33.2113/60.5914
[10:05:37.472] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 55.7256 for pixel 0/8 mean/min/max = 44.7004/33.5981/55.8027
[10:05:37.473] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 56.1116 for pixel 0/45 mean/min/max = 44.5794/32.95/56.2088
[10:05:37.473] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 58.0728 for pixel 29/8 mean/min/max = 45.9104/33.6339/58.187
[10:05:37.473] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 56.7168 for pixel 51/3 mean/min/max = 44.2615/31.7261/56.7968
[10:05:37.473] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:05:37.561] <TB1> INFO: Expecting 411648 events.
[10:05:48.158] <TB1> INFO: 411648 events read in total (10041ms).
[10:05:48.166] <TB1> INFO: Expecting 411648 events.
[10:05:58.508] <TB1> INFO: 411648 events read in total (9937ms).
[10:05:58.515] <TB1> INFO: Expecting 411648 events.
[10:06:08.913] <TB1> INFO: 411648 events read in total (9969ms).
[10:06:08.922] <TB1> INFO: Expecting 411648 events.
[10:06:19.364] <TB1> INFO: 411648 events read in total (10018ms).
[10:06:19.375] <TB1> INFO: Expecting 411648 events.
[10:06:29.958] <TB1> INFO: 411648 events read in total (10158ms).
[10:06:29.972] <TB1> INFO: Expecting 411648 events.
[10:06:40.423] <TB1> INFO: 411648 events read in total (10034ms).
[10:06:40.437] <TB1> INFO: Expecting 411648 events.
[10:06:50.881] <TB1> INFO: 411648 events read in total (10021ms).
[10:06:50.897] <TB1> INFO: Expecting 411648 events.
[10:07:01.394] <TB1> INFO: 411648 events read in total (10085ms).
[10:07:01.413] <TB1> INFO: Expecting 411648 events.
[10:07:11.958] <TB1> INFO: 411648 events read in total (10130ms).
[10:07:11.978] <TB1> INFO: Expecting 411648 events.
[10:07:22.431] <TB1> INFO: 411648 events read in total (10044ms).
[10:07:22.453] <TB1> INFO: Expecting 411648 events.
[10:07:33.040] <TB1> INFO: 411648 events read in total (10179ms).
[10:07:33.067] <TB1> INFO: Expecting 411648 events.
[10:07:43.514] <TB1> INFO: 411648 events read in total (10045ms).
[10:07:43.538] <TB1> INFO: Expecting 411648 events.
[10:07:53.943] <TB1> INFO: 411648 events read in total (10002ms).
[10:07:53.970] <TB1> INFO: Expecting 411648 events.
[10:08:04.417] <TB1> INFO: 411648 events read in total (10039ms).
[10:08:04.447] <TB1> INFO: Expecting 411648 events.
[10:08:15.089] <TB1> INFO: 411648 events read in total (10235ms).
[10:08:15.121] <TB1> INFO: Expecting 411648 events.
[10:08:25.562] <TB1> INFO: 411648 events read in total (10039ms).
[10:08:25.599] <TB1> INFO: Test took 168126ms.
[10:08:26.556] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[10:08:26.564] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[10:08:26.564] <TB1> INFO: run 1 of 1
[10:08:26.834] <TB1> INFO: Expecting 5025280 events.
[10:09:03.199] <TB1> INFO: 740800 events read in total (35809ms).
[10:09:38.480] <TB1> INFO: 1481192 events read in total (71090ms).
[10:10:14.161] <TB1> INFO: 2222496 events read in total (106771ms).
[10:10:49.531] <TB1> INFO: 2959352 events read in total (142141ms).
[10:11:25.127] <TB1> INFO: 3690320 events read in total (177737ms).
[10:12:00.717] <TB1> INFO: 4418280 events read in total (213327ms).
[10:12:31.061] <TB1> INFO: 5025280 events read in total (243671ms).
[10:12:31.111] <TB1> INFO: Test took 244547ms.
[10:12:56.114] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 2.500000 .. 255.000000
[10:12:56.210] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 2 .. 255 (-1/-1) hits flags = 528 (plus default)
[10:12:56.222] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[10:12:56.222] <TB1> INFO: run 1 of 1
[10:12:56.562] <TB1> INFO: Expecting 8453120 events.
[10:13:32.229] <TB1> INFO: 710280 events read in total (35111ms).
[10:14:06.758] <TB1> INFO: 1420744 events read in total (69640ms).
[10:14:41.984] <TB1> INFO: 2131144 events read in total (104866ms).
[10:15:16.854] <TB1> INFO: 2841640 events read in total (139736ms).
[10:15:51.622] <TB1> INFO: 3552320 events read in total (174504ms).
[10:16:26.297] <TB1> INFO: 4262904 events read in total (209179ms).
[10:17:01.241] <TB1> INFO: 4972976 events read in total (244123ms).
[10:17:36.290] <TB1> INFO: 5682200 events read in total (279172ms).
[10:18:11.271] <TB1> INFO: 6391120 events read in total (314153ms).
[10:18:46.048] <TB1> INFO: 7099224 events read in total (348930ms).
[10:19:21.263] <TB1> INFO: 7807360 events read in total (384146ms).
[10:19:53.496] <TB1> INFO: 8453120 events read in total (416378ms).
[10:19:53.637] <TB1> INFO: Test took 417415ms.
[10:20:23.610] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 15.611993 .. 44.191847
[10:20:23.713] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 5 .. 54 (-1/-1) hits flags = 528 (plus default)
[10:20:23.722] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[10:20:23.722] <TB1> INFO: run 1 of 1
[10:20:24.010] <TB1> INFO: Expecting 1664000 events.
[10:21:04.048] <TB1> INFO: 946160 events read in total (39482ms).
[10:21:34.158] <TB1> INFO: 1664000 events read in total (69592ms).
[10:21:34.174] <TB1> INFO: Test took 70453ms.
[10:21:49.169] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 21.262148 .. 40.359439
[10:21:49.249] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 11 .. 50 (-1/-1) hits flags = 528 (plus default)
[10:21:49.257] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[10:21:49.257] <TB1> INFO: run 1 of 1
[10:21:49.525] <TB1> INFO: Expecting 1331200 events.
[10:22:31.484] <TB1> INFO: 948696 events read in total (41403ms).
[10:22:48.460] <TB1> INFO: 1331200 events read in total (58379ms).
[10:22:48.475] <TB1> INFO: Test took 59218ms.
[10:23:02.608] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 23.503702 .. 40.359439
[10:23:02.685] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 13 .. 50 (-1/-1) hits flags = 528 (plus default)
[10:23:02.693] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[10:23:02.693] <TB1> INFO: run 1 of 1
[10:23:02.956] <TB1> INFO: Expecting 1264640 events.
[10:23:44.231] <TB1> INFO: 935112 events read in total (40719ms).
[10:23:58.207] <TB1> INFO: 1264640 events read in total (54695ms).
[10:23:58.222] <TB1> INFO: Test took 55529ms.
[10:24:12.059] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[10:24:12.059] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[10:24:12.067] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[10:24:12.067] <TB1> INFO: run 1 of 1
[10:24:12.336] <TB1> INFO: Expecting 1364480 events.
[10:24:51.144] <TB1> INFO: 879016 events read in total (38252ms).
[10:25:12.479] <TB1> INFO: 1364480 events read in total (59587ms).
[10:25:12.494] <TB1> INFO: Test took 60428ms.
[10:25:26.394] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C0.dat
[10:25:26.398] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C1.dat
[10:25:26.402] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C2.dat
[10:25:26.406] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C3.dat
[10:25:26.410] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C4.dat
[10:25:26.413] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C5.dat
[10:25:26.417] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C6.dat
[10:25:26.421] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C7.dat
[10:25:26.425] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C8.dat
[10:25:26.428] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C9.dat
[10:25:26.432] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C10.dat
[10:25:26.436] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C11.dat
[10:25:26.439] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C12.dat
[10:25:26.443] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C13.dat
[10:25:26.447] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C14.dat
[10:25:26.450] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C15.dat
[10:25:26.454] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C0.dat
[10:25:26.469] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C1.dat
[10:25:26.485] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C2.dat
[10:25:26.498] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C3.dat
[10:25:26.512] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C4.dat
[10:25:26.524] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C5.dat
[10:25:26.536] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C6.dat
[10:25:26.548] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C7.dat
[10:25:26.559] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C8.dat
[10:25:26.572] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C9.dat
[10:25:26.583] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C10.dat
[10:25:26.594] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C11.dat
[10:25:26.606] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C12.dat
[10:25:26.617] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C13.dat
[10:25:26.629] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C14.dat
[10:25:26.641] <TB1> INFO: write trim parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C15.dat
[10:25:26.653] <TB1> INFO: PixTestTrim::trimTest() done
[10:25:26.653] <TB1> INFO: vtrim: 99 103 113 109 90 84 89 99 126 106 98 107 88 80 98 94
[10:25:26.653] <TB1> INFO: vthrcomp: 99 91 103 99 91 91 101 95 106 90 90 93 92 84 90 101
[10:25:26.653] <TB1> INFO: vcal mean: 34.97 34.92 34.99 34.98 34.99 34.98 34.99 34.95 34.99 34.99 34.98 34.97 35.00 35.02 35.02 35.01
[10:25:26.653] <TB1> INFO: vcal RMS: 0.89 0.90 0.92 1.06 0.90 1.10 0.96 0.95 0.95 0.91 1.06 0.96 0.86 0.86 0.91 0.94
[10:25:26.653] <TB1> INFO: bits mean: 10.16 9.23 9.99 9.33 9.36 9.60 9.71 9.44 8.91 9.07 9.79 9.43 9.37 9.22 9.48 10.31
[10:25:26.653] <TB1> INFO: bits RMS: 2.51 2.61 2.45 2.62 2.67 2.43 2.56 2.73 2.59 2.61 2.38 2.48 2.55 2.73 2.52 2.48
[10:25:26.660] <TB1> INFO: ----------------------------------------------------------------------
[10:25:26.660] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[10:25:26.660] <TB1> INFO: ----------------------------------------------------------------------
[10:25:26.662] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[10:25:26.672] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[10:25:26.672] <TB1> INFO: run 1 of 1
[10:25:26.964] <TB1> INFO: Expecting 4160000 events.
[10:26:09.853] <TB1> INFO: 944780 events read in total (42333ms).
[10:26:51.609] <TB1> INFO: 1881910 events read in total (84089ms).
[10:27:33.124] <TB1> INFO: 2809915 events read in total (125605ms).
[10:28:14.398] <TB1> INFO: 3734050 events read in total (166878ms).
[10:28:33.737] <TB1> INFO: 4160000 events read in total (186217ms).
[10:28:33.776] <TB1> INFO: Test took 187104ms.
[10:29:05.188] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 184 (-1/-1) hits flags = 528 (plus default)
[10:29:05.196] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[10:29:05.197] <TB1> INFO: run 1 of 1
[10:29:05.484] <TB1> INFO: Expecting 3848000 events.
[10:29:47.947] <TB1> INFO: 939185 events read in total (41907ms).
[10:30:29.705] <TB1> INFO: 1870475 events read in total (83665ms).
[10:31:10.940] <TB1> INFO: 2790625 events read in total (124900ms).
[10:31:52.614] <TB1> INFO: 3708735 events read in total (166574ms).
[10:31:59.075] <TB1> INFO: 3848000 events read in total (173035ms).
[10:31:59.111] <TB1> INFO: Test took 173914ms.
[10:32:26.069] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 169 (-1/-1) hits flags = 528 (plus default)
[10:32:26.078] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[10:32:26.078] <TB1> INFO: run 1 of 1
[10:32:26.341] <TB1> INFO: Expecting 3536000 events.
[10:33:08.760] <TB1> INFO: 974035 events read in total (41862ms).
[10:33:50.662] <TB1> INFO: 1936655 events read in total (83764ms).
[10:34:32.469] <TB1> INFO: 2887870 events read in total (125571ms).
[10:35:00.963] <TB1> INFO: 3536000 events read in total (154065ms).
[10:35:01.002] <TB1> INFO: Test took 154924ms.
[10:35:26.129] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 168 (-1/-1) hits flags = 528 (plus default)
[10:35:26.138] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[10:35:26.138] <TB1> INFO: run 1 of 1
[10:35:26.423] <TB1> INFO: Expecting 3515200 events.
[10:36:09.202] <TB1> INFO: 975800 events read in total (42223ms).
[10:36:51.175] <TB1> INFO: 1940050 events read in total (84196ms).
[10:37:32.860] <TB1> INFO: 2892195 events read in total (125882ms).
[10:38:00.360] <TB1> INFO: 3515200 events read in total (153381ms).
[10:38:00.396] <TB1> INFO: Test took 154258ms.
[10:38:27.527] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 168 (-1/-1) hits flags = 528 (plus default)
[10:38:27.536] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[10:38:27.536] <TB1> INFO: run 1 of 1
[10:38:27.801] <TB1> INFO: Expecting 3515200 events.
[10:39:11.062] <TB1> INFO: 975025 events read in total (42705ms).
[10:39:52.818] <TB1> INFO: 1938315 events read in total (84461ms).
[10:40:34.339] <TB1> INFO: 2890470 events read in total (125982ms).
[10:41:02.028] <TB1> INFO: 3515200 events read in total (153671ms).
[10:41:02.057] <TB1> INFO: Test took 154521ms.
[10:41:26.922] <TB1> INFO: PixTestTrim::trimBitTest() done
[10:41:26.923] <TB1> INFO: PixTestTrim::doTest() done, duration: 2624 seconds
[10:41:26.923] <TB1> INFO: Decoding statistics:
[10:41:26.923] <TB1> INFO: General information:
[10:41:26.923] <TB1> INFO: 16bit words read: 0
[10:41:26.923] <TB1> INFO: valid events total: 0
[10:41:26.923] <TB1> INFO: empty events: 0
[10:41:26.923] <TB1> INFO: valid events with pixels: 0
[10:41:26.923] <TB1> INFO: valid pixel hits: 0
[10:41:26.923] <TB1> INFO: Event errors: 0
[10:41:26.923] <TB1> INFO: start marker: 0
[10:41:26.923] <TB1> INFO: stop marker: 0
[10:41:26.923] <TB1> INFO: overflow: 0
[10:41:26.923] <TB1> INFO: invalid 5bit words: 0
[10:41:26.923] <TB1> INFO: invalid XOR eye diagram: 0
[10:41:26.923] <TB1> INFO: frame (failed synchr.): 0
[10:41:26.923] <TB1> INFO: idle data (no TBM trl): 0
[10:41:26.923] <TB1> INFO: no data (only TBM hdr): 0
[10:41:26.923] <TB1> INFO: TBM errors: 0
[10:41:26.923] <TB1> INFO: flawed TBM headers: 0
[10:41:26.923] <TB1> INFO: flawed TBM trailers: 0
[10:41:26.923] <TB1> INFO: event ID mismatches: 0
[10:41:26.923] <TB1> INFO: ROC errors: 0
[10:41:26.923] <TB1> INFO: missing ROC header(s): 0
[10:41:26.923] <TB1> INFO: misplaced readback start: 0
[10:41:26.923] <TB1> INFO: Pixel decoding errors: 0
[10:41:26.923] <TB1> INFO: pixel data incomplete: 0
[10:41:26.923] <TB1> INFO: pixel address: 0
[10:41:26.923] <TB1> INFO: pulse height fill bit: 0
[10:41:26.923] <TB1> INFO: buffer corruption: 0
[10:41:27.583] <TB1> INFO: ######################################################################
[10:41:27.583] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:41:27.583] <TB1> INFO: ######################################################################
[10:41:27.871] <TB1> INFO: Expecting 41600 events.
[10:41:31.705] <TB1> INFO: 41600 events read in total (3277ms).
[10:41:31.706] <TB1> INFO: Test took 4121ms.
[10:41:32.175] <TB1> INFO: Expecting 41600 events.
[10:41:36.003] <TB1> INFO: 41600 events read in total (3272ms).
[10:41:36.004] <TB1> INFO: Test took 4101ms.
[10:41:36.319] <TB1> INFO: Expecting 41600 events.
[10:41:40.121] <TB1> INFO: 41600 events read in total (3246ms).
[10:41:40.122] <TB1> INFO: Test took 4095ms.
[10:41:40.376] <TB1> INFO: Expecting 2560 events.
[10:41:41.233] <TB1> INFO: 2560 events read in total (300ms).
[10:41:41.233] <TB1> INFO: Test took 1098ms.
[10:41:41.538] <TB1> INFO: Expecting 2560 events.
[10:41:42.391] <TB1> INFO: 2560 events read in total (296ms).
[10:41:42.391] <TB1> INFO: Test took 1158ms.
[10:41:42.696] <TB1> INFO: Expecting 2560 events.
[10:41:43.548] <TB1> INFO: 2560 events read in total (296ms).
[10:41:43.549] <TB1> INFO: Test took 1158ms.
[10:41:43.854] <TB1> INFO: Expecting 2560 events.
[10:41:44.708] <TB1> INFO: 2560 events read in total (295ms).
[10:41:44.708] <TB1> INFO: Test took 1159ms.
[10:41:45.013] <TB1> INFO: Expecting 2560 events.
[10:41:45.867] <TB1> INFO: 2560 events read in total (298ms).
[10:41:45.867] <TB1> INFO: Test took 1159ms.
[10:41:46.172] <TB1> INFO: Expecting 2560 events.
[10:41:47.023] <TB1> INFO: 2560 events read in total (295ms).
[10:41:47.023] <TB1> INFO: Test took 1156ms.
[10:41:47.329] <TB1> INFO: Expecting 2560 events.
[10:41:48.182] <TB1> INFO: 2560 events read in total (297ms).
[10:41:48.183] <TB1> INFO: Test took 1159ms.
[10:41:48.487] <TB1> INFO: Expecting 2560 events.
[10:41:49.340] <TB1> INFO: 2560 events read in total (297ms).
[10:41:49.340] <TB1> INFO: Test took 1157ms.
[10:41:49.645] <TB1> INFO: Expecting 2560 events.
[10:41:50.498] <TB1> INFO: 2560 events read in total (297ms).
[10:41:50.498] <TB1> INFO: Test took 1158ms.
[10:41:50.803] <TB1> INFO: Expecting 2560 events.
[10:41:51.654] <TB1> INFO: 2560 events read in total (295ms).
[10:41:51.654] <TB1> INFO: Test took 1156ms.
[10:41:51.960] <TB1> INFO: Expecting 2560 events.
[10:41:52.814] <TB1> INFO: 2560 events read in total (298ms).
[10:41:52.814] <TB1> INFO: Test took 1160ms.
[10:41:53.119] <TB1> INFO: Expecting 2560 events.
[10:41:53.971] <TB1> INFO: 2560 events read in total (296ms).
[10:41:53.971] <TB1> INFO: Test took 1156ms.
[10:41:54.276] <TB1> INFO: Expecting 2560 events.
[10:41:55.128] <TB1> INFO: 2560 events read in total (296ms).
[10:41:55.128] <TB1> INFO: Test took 1156ms.
[10:41:55.434] <TB1> INFO: Expecting 2560 events.
[10:41:56.285] <TB1> INFO: 2560 events read in total (295ms).
[10:41:56.285] <TB1> INFO: Test took 1156ms.
[10:41:56.590] <TB1> INFO: Expecting 2560 events.
[10:41:57.443] <TB1> INFO: 2560 events read in total (296ms).
[10:41:57.443] <TB1> INFO: Test took 1158ms.
[10:41:57.748] <TB1> INFO: Expecting 2560 events.
[10:41:58.601] <TB1> INFO: 2560 events read in total (296ms).
[10:41:58.601] <TB1> INFO: Test took 1157ms.
[10:41:58.603] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:41:58.907] <TB1> INFO: Expecting 655360 events.
[10:42:15.914] <TB1> INFO: 655360 events read in total (16451ms).
[10:42:15.923] <TB1> INFO: Expecting 655360 events.
[10:42:32.388] <TB1> INFO: 655360 events read in total (16063ms).
[10:42:32.401] <TB1> INFO: Expecting 655360 events.
[10:42:48.772] <TB1> INFO: 655360 events read in total (15969ms).
[10:42:48.788] <TB1> INFO: Expecting 655360 events.
[10:43:05.223] <TB1> INFO: 655360 events read in total (16033ms).
[10:43:05.241] <TB1> INFO: Expecting 655360 events.
[10:43:21.841] <TB1> INFO: 655360 events read in total (16198ms).
[10:43:21.866] <TB1> INFO: Expecting 655360 events.
[10:43:38.358] <TB1> INFO: 655360 events read in total (16090ms).
[10:43:38.388] <TB1> INFO: Expecting 655360 events.
[10:43:54.827] <TB1> INFO: 655360 events read in total (16037ms).
[10:43:54.858] <TB1> INFO: Expecting 655360 events.
[10:44:11.561] <TB1> INFO: 655360 events read in total (16302ms).
[10:44:11.595] <TB1> INFO: Expecting 655360 events.
[10:44:28.399] <TB1> INFO: 655360 events read in total (16402ms).
[10:44:28.435] <TB1> INFO: Expecting 655360 events.
[10:44:45.163] <TB1> INFO: 655360 events read in total (16326ms).
[10:44:45.208] <TB1> INFO: Expecting 655360 events.
[10:45:01.907] <TB1> INFO: 655360 events read in total (16298ms).
[10:45:01.953] <TB1> INFO: Expecting 655360 events.
[10:45:18.837] <TB1> INFO: 655360 events read in total (16482ms).
[10:45:18.887] <TB1> INFO: Expecting 655360 events.
[10:45:35.633] <TB1> INFO: 655360 events read in total (16344ms).
[10:45:35.686] <TB1> INFO: Expecting 655360 events.
[10:45:52.417] <TB1> INFO: 655360 events read in total (16330ms).
[10:45:52.470] <TB1> INFO: Expecting 655360 events.
[10:46:09.133] <TB1> INFO: 655360 events read in total (16262ms).
[10:46:09.190] <TB1> INFO: Expecting 655360 events.
[10:46:25.836] <TB1> INFO: 655360 events read in total (16245ms).
[10:46:25.899] <TB1> INFO: Test took 267296ms.
[10:46:25.977] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:46:26.208] <TB1> INFO: Expecting 655360 events.
[10:46:43.021] <TB1> INFO: 655360 events read in total (16257ms).
[10:46:43.029] <TB1> INFO: Expecting 655360 events.
[10:46:59.659] <TB1> INFO: 655360 events read in total (16228ms).
[10:46:59.671] <TB1> INFO: Expecting 655360 events.
[10:47:16.293] <TB1> INFO: 655360 events read in total (16220ms).
[10:47:16.309] <TB1> INFO: Expecting 655360 events.
[10:47:32.695] <TB1> INFO: 655360 events read in total (15984ms).
[10:47:32.715] <TB1> INFO: Expecting 655360 events.
[10:47:49.157] <TB1> INFO: 655360 events read in total (16040ms).
[10:47:49.180] <TB1> INFO: Expecting 655360 events.
[10:48:05.956] <TB1> INFO: 655360 events read in total (16374ms).
[10:48:05.982] <TB1> INFO: Expecting 655360 events.
[10:48:22.627] <TB1> INFO: 655360 events read in total (16243ms).
[10:48:22.656] <TB1> INFO: Expecting 655360 events.
[10:48:39.330] <TB1> INFO: 655360 events read in total (16272ms).
[10:48:39.369] <TB1> INFO: Expecting 655360 events.
[10:48:55.996] <TB1> INFO: 655360 events read in total (16226ms).
[10:48:56.035] <TB1> INFO: Expecting 655360 events.
[10:49:12.737] <TB1> INFO: 655360 events read in total (16301ms).
[10:49:12.777] <TB1> INFO: Expecting 655360 events.
[10:49:29.552] <TB1> INFO: 655360 events read in total (16374ms).
[10:49:29.597] <TB1> INFO: Expecting 655360 events.
[10:49:46.197] <TB1> INFO: 655360 events read in total (16199ms).
[10:49:46.243] <TB1> INFO: Expecting 655360 events.
[10:50:02.949] <TB1> INFO: 655360 events read in total (16304ms).
[10:50:03.001] <TB1> INFO: Expecting 655360 events.
[10:50:19.730] <TB1> INFO: 655360 events read in total (16328ms).
[10:50:19.782] <TB1> INFO: Expecting 655360 events.
[10:50:36.391] <TB1> INFO: 655360 events read in total (16207ms).
[10:50:36.452] <TB1> INFO: Expecting 655360 events.
[10:50:53.137] <TB1> INFO: 655360 events read in total (16283ms).
[10:50:53.202] <TB1> INFO: Test took 267225ms.
[10:50:53.395] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:53.402] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:53.408] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[10:50:53.415] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[10:50:53.422] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[10:50:53.429] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[10:50:53.435] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[10:50:53.442] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[10:50:53.449] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[10:50:53.458] <TB1> INFO: safety margin for low PH: adding 8, margin is now 28
[10:50:53.464] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:53.471] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:53.478] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:53.485] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:53.491] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:53.498] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:53.505] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:53.512] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:53.521] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:53.528] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:53.534] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:53.541] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:53.548] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:53.554] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:53.595] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C0.dat
[10:50:53.601] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C1.dat
[10:50:53.609] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C2.dat
[10:50:53.614] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C3.dat
[10:50:53.623] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C4.dat
[10:50:53.631] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C5.dat
[10:50:53.640] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C6.dat
[10:50:53.646] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C7.dat
[10:50:53.655] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C8.dat
[10:50:53.663] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C9.dat
[10:50:53.674] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C10.dat
[10:50:53.680] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C11.dat
[10:50:53.690] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C12.dat
[10:50:53.699] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C13.dat
[10:50:53.704] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C14.dat
[10:50:53.715] <TB1> INFO: write dac parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C15.dat
[10:50:53.989] <TB1> INFO: Expecting 41600 events.
[10:50:57.447] <TB1> INFO: 41600 events read in total (2902ms).
[10:50:57.447] <TB1> INFO: Test took 3726ms.
[10:50:57.898] <TB1> INFO: Expecting 41600 events.
[10:51:01.395] <TB1> INFO: 41600 events read in total (2941ms).
[10:51:01.396] <TB1> INFO: Test took 3772ms.
[10:51:01.846] <TB1> INFO: Expecting 41600 events.
[10:51:05.309] <TB1> INFO: 41600 events read in total (2907ms).
[10:51:05.309] <TB1> INFO: Test took 3732ms.
[10:51:05.492] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:05.580] <TB1> INFO: Expecting 2560 events.
[10:51:06.433] <TB1> INFO: 2560 events read in total (297ms).
[10:51:06.433] <TB1> INFO: Test took 942ms.
[10:51:06.434] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:06.739] <TB1> INFO: Expecting 2560 events.
[10:51:07.591] <TB1> INFO: 2560 events read in total (296ms).
[10:51:07.592] <TB1> INFO: Test took 1158ms.
[10:51:07.593] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:07.897] <TB1> INFO: Expecting 2560 events.
[10:51:08.753] <TB1> INFO: 2560 events read in total (300ms).
[10:51:08.754] <TB1> INFO: Test took 1161ms.
[10:51:08.756] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:09.058] <TB1> INFO: Expecting 2560 events.
[10:51:09.911] <TB1> INFO: 2560 events read in total (296ms).
[10:51:09.912] <TB1> INFO: Test took 1156ms.
[10:51:09.913] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:10.217] <TB1> INFO: Expecting 2560 events.
[10:51:11.069] <TB1> INFO: 2560 events read in total (296ms).
[10:51:11.069] <TB1> INFO: Test took 1156ms.
[10:51:11.071] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:11.375] <TB1> INFO: Expecting 2560 events.
[10:51:12.227] <TB1> INFO: 2560 events read in total (296ms).
[10:51:12.228] <TB1> INFO: Test took 1157ms.
[10:51:12.230] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:12.533] <TB1> INFO: Expecting 2560 events.
[10:51:13.387] <TB1> INFO: 2560 events read in total (298ms).
[10:51:13.387] <TB1> INFO: Test took 1157ms.
[10:51:13.389] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:13.692] <TB1> INFO: Expecting 2560 events.
[10:51:14.550] <TB1> INFO: 2560 events read in total (301ms).
[10:51:14.550] <TB1> INFO: Test took 1161ms.
[10:51:14.552] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:14.856] <TB1> INFO: Expecting 2560 events.
[10:51:15.713] <TB1> INFO: 2560 events read in total (301ms).
[10:51:15.713] <TB1> INFO: Test took 1161ms.
[10:51:15.715] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:16.020] <TB1> INFO: Expecting 2560 events.
[10:51:16.881] <TB1> INFO: 2560 events read in total (305ms).
[10:51:16.881] <TB1> INFO: Test took 1166ms.
[10:51:16.884] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:17.187] <TB1> INFO: Expecting 2560 events.
[10:51:18.043] <TB1> INFO: 2560 events read in total (300ms).
[10:51:18.044] <TB1> INFO: Test took 1160ms.
[10:51:18.046] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:18.349] <TB1> INFO: Expecting 2560 events.
[10:51:19.203] <TB1> INFO: 2560 events read in total (298ms).
[10:51:19.204] <TB1> INFO: Test took 1158ms.
[10:51:19.206] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:19.510] <TB1> INFO: Expecting 2560 events.
[10:51:20.363] <TB1> INFO: 2560 events read in total (297ms).
[10:51:20.363] <TB1> INFO: Test took 1157ms.
[10:51:20.365] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:20.669] <TB1> INFO: Expecting 2560 events.
[10:51:21.523] <TB1> INFO: 2560 events read in total (298ms).
[10:51:21.523] <TB1> INFO: Test took 1158ms.
[10:51:21.525] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:21.829] <TB1> INFO: Expecting 2560 events.
[10:51:22.684] <TB1> INFO: 2560 events read in total (299ms).
[10:51:22.684] <TB1> INFO: Test took 1159ms.
[10:51:22.686] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:22.991] <TB1> INFO: Expecting 2560 events.
[10:51:23.844] <TB1> INFO: 2560 events read in total (297ms).
[10:51:23.844] <TB1> INFO: Test took 1158ms.
[10:51:23.846] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:24.150] <TB1> INFO: Expecting 2560 events.
[10:51:25.004] <TB1> INFO: 2560 events read in total (298ms).
[10:51:25.004] <TB1> INFO: Test took 1158ms.
[10:51:25.006] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:25.310] <TB1> INFO: Expecting 2560 events.
[10:51:26.164] <TB1> INFO: 2560 events read in total (298ms).
[10:51:26.164] <TB1> INFO: Test took 1158ms.
[10:51:26.167] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:26.470] <TB1> INFO: Expecting 2560 events.
[10:51:27.323] <TB1> INFO: 2560 events read in total (297ms).
[10:51:27.324] <TB1> INFO: Test took 1158ms.
[10:51:27.326] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:27.629] <TB1> INFO: Expecting 2560 events.
[10:51:28.484] <TB1> INFO: 2560 events read in total (299ms).
[10:51:28.484] <TB1> INFO: Test took 1158ms.
[10:51:28.486] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:28.790] <TB1> INFO: Expecting 2560 events.
[10:51:29.642] <TB1> INFO: 2560 events read in total (296ms).
[10:51:29.642] <TB1> INFO: Test took 1156ms.
[10:51:29.644] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:29.948] <TB1> INFO: Expecting 2560 events.
[10:51:30.803] <TB1> INFO: 2560 events read in total (299ms).
[10:51:30.803] <TB1> INFO: Test took 1159ms.
[10:51:30.805] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:31.109] <TB1> INFO: Expecting 2560 events.
[10:51:31.965] <TB1> INFO: 2560 events read in total (299ms).
[10:51:31.965] <TB1> INFO: Test took 1161ms.
[10:51:31.968] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:32.271] <TB1> INFO: Expecting 2560 events.
[10:51:33.131] <TB1> INFO: 2560 events read in total (303ms).
[10:51:33.131] <TB1> INFO: Test took 1164ms.
[10:51:33.134] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:33.437] <TB1> INFO: Expecting 2560 events.
[10:51:34.294] <TB1> INFO: 2560 events read in total (300ms).
[10:51:34.294] <TB1> INFO: Test took 1160ms.
[10:51:34.297] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:34.600] <TB1> INFO: Expecting 2560 events.
[10:51:35.455] <TB1> INFO: 2560 events read in total (299ms).
[10:51:35.455] <TB1> INFO: Test took 1159ms.
[10:51:35.456] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:35.760] <TB1> INFO: Expecting 2560 events.
[10:51:36.613] <TB1> INFO: 2560 events read in total (296ms).
[10:51:36.613] <TB1> INFO: Test took 1157ms.
[10:51:36.615] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:36.919] <TB1> INFO: Expecting 2560 events.
[10:51:37.773] <TB1> INFO: 2560 events read in total (297ms).
[10:51:37.773] <TB1> INFO: Test took 1158ms.
[10:51:37.774] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:38.079] <TB1> INFO: Expecting 2560 events.
[10:51:38.931] <TB1> INFO: 2560 events read in total (296ms).
[10:51:38.931] <TB1> INFO: Test took 1157ms.
[10:51:38.933] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:39.237] <TB1> INFO: Expecting 2560 events.
[10:51:40.090] <TB1> INFO: 2560 events read in total (297ms).
[10:51:40.090] <TB1> INFO: Test took 1157ms.
[10:51:40.092] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:40.396] <TB1> INFO: Expecting 2560 events.
[10:51:41.256] <TB1> INFO: 2560 events read in total (304ms).
[10:51:41.256] <TB1> INFO: Test took 1164ms.
[10:51:41.259] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:41.562] <TB1> INFO: Expecting 2560 events.
[10:51:42.414] <TB1> INFO: 2560 events read in total (295ms).
[10:51:42.414] <TB1> INFO: Test took 1156ms.
[10:51:42.870] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 615 seconds
[10:51:42.870] <TB1> INFO: PH scale (per ROC): 77 67 76 62 70 75 67 74 67 75 73 71 75 81 80 75
[10:51:42.870] <TB1> INFO: PH offset (per ROC): 176 176 174 207 177 189 200 192 189 184 167 190 178 171 174 197
[10:51:42.874] <TB1> INFO: Decoding statistics:
[10:51:42.874] <TB1> INFO: General information:
[10:51:42.874] <TB1> INFO: 16bit words read: 91932
[10:51:42.874] <TB1> INFO: valid events total: 10240
[10:51:42.874] <TB1> INFO: empty events: 7737
[10:51:42.874] <TB1> INFO: valid events with pixels: 2503
[10:51:42.874] <TB1> INFO: valid pixel hits: 2503
[10:51:42.874] <TB1> INFO: Event errors: 0
[10:51:42.874] <TB1> INFO: start marker: 0
[10:51:42.874] <TB1> INFO: stop marker: 0
[10:51:42.874] <TB1> INFO: overflow: 0
[10:51:42.874] <TB1> INFO: invalid 5bit words: 0
[10:51:42.874] <TB1> INFO: invalid XOR eye diagram: 0
[10:51:42.874] <TB1> INFO: frame (failed synchr.): 0
[10:51:42.874] <TB1> INFO: idle data (no TBM trl): 0
[10:51:42.874] <TB1> INFO: no data (only TBM hdr): 0
[10:51:42.874] <TB1> INFO: TBM errors: 0
[10:51:42.874] <TB1> INFO: flawed TBM headers: 0
[10:51:42.874] <TB1> INFO: flawed TBM trailers: 0
[10:51:42.874] <TB1> INFO: event ID mismatches: 0
[10:51:42.874] <TB1> INFO: ROC errors: 0
[10:51:42.874] <TB1> INFO: missing ROC header(s): 0
[10:51:42.874] <TB1> INFO: misplaced readback start: 0
[10:51:42.875] <TB1> INFO: Pixel decoding errors: 0
[10:51:42.875] <TB1> INFO: pixel data incomplete: 0
[10:51:42.875] <TB1> INFO: pixel address: 0
[10:51:42.875] <TB1> INFO: pulse height fill bit: 0
[10:51:42.875] <TB1> INFO: buffer corruption: 0
[10:51:43.043] <TB1> INFO: ######################################################################
[10:51:43.043] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:51:43.043] <TB1> INFO: ######################################################################
[10:51:43.052] <TB1> INFO: scanning low vcal = 10
[10:51:43.314] <TB1> INFO: Expecting 41600 events.
[10:51:46.832] <TB1> INFO: 41600 events read in total (2962ms).
[10:51:46.832] <TB1> INFO: Test took 3780ms.
[10:51:46.834] <TB1> INFO: scanning low vcal = 20
[10:51:47.138] <TB1> INFO: Expecting 41600 events.
[10:51:50.691] <TB1> INFO: 41600 events read in total (2997ms).
[10:51:50.692] <TB1> INFO: Test took 3858ms.
[10:51:50.693] <TB1> INFO: scanning low vcal = 30
[10:51:50.997] <TB1> INFO: Expecting 41600 events.
[10:51:54.537] <TB1> INFO: 41600 events read in total (2984ms).
[10:51:54.538] <TB1> INFO: Test took 3845ms.
[10:51:54.540] <TB1> INFO: scanning low vcal = 40
[10:51:54.840] <TB1> INFO: Expecting 41600 events.
[10:51:58.968] <TB1> INFO: 41600 events read in total (3572ms).
[10:51:58.969] <TB1> INFO: Test took 4429ms.
[10:51:58.971] <TB1> INFO: scanning low vcal = 50
[10:51:59.257] <TB1> INFO: Expecting 41600 events.
[10:52:03.449] <TB1> INFO: 41600 events read in total (3636ms).
[10:52:03.450] <TB1> INFO: Test took 4479ms.
[10:52:03.452] <TB1> INFO: scanning low vcal = 60
[10:52:03.712] <TB1> INFO: Expecting 41600 events.
[10:52:07.925] <TB1> INFO: 41600 events read in total (3657ms).
[10:52:07.926] <TB1> INFO: Test took 4474ms.
[10:52:07.928] <TB1> INFO: scanning low vcal = 70
[10:52:08.217] <TB1> INFO: Expecting 41600 events.
[10:52:12.403] <TB1> INFO: 41600 events read in total (3630ms).
[10:52:12.404] <TB1> INFO: Test took 4476ms.
[10:52:12.406] <TB1> INFO: scanning low vcal = 80
[10:52:12.687] <TB1> INFO: Expecting 41600 events.
[10:52:16.856] <TB1> INFO: 41600 events read in total (3612ms).
[10:52:16.856] <TB1> INFO: Test took 4450ms.
[10:52:16.859] <TB1> INFO: scanning low vcal = 90
[10:52:17.127] <TB1> INFO: Expecting 41600 events.
[10:52:21.295] <TB1> INFO: 41600 events read in total (3612ms).
[10:52:21.296] <TB1> INFO: Test took 4437ms.
[10:52:21.298] <TB1> INFO: scanning low vcal = 100
[10:52:21.565] <TB1> INFO: Expecting 41600 events.
[10:52:25.735] <TB1> INFO: 41600 events read in total (3614ms).
[10:52:25.735] <TB1> INFO: Test took 4436ms.
[10:52:25.737] <TB1> INFO: scanning low vcal = 110
[10:52:25.997] <TB1> INFO: Expecting 41600 events.
[10:52:30.161] <TB1> INFO: 41600 events read in total (3608ms).
[10:52:30.162] <TB1> INFO: Test took 4425ms.
[10:52:30.164] <TB1> INFO: scanning low vcal = 120
[10:52:30.426] <TB1> INFO: Expecting 41600 events.
[10:52:34.631] <TB1> INFO: 41600 events read in total (3649ms).
[10:52:34.631] <TB1> INFO: Test took 4467ms.
[10:52:34.634] <TB1> INFO: scanning low vcal = 130
[10:52:34.956] <TB1> INFO: Expecting 41600 events.
[10:52:39.151] <TB1> INFO: 41600 events read in total (3638ms).
[10:52:39.152] <TB1> INFO: Test took 4518ms.
[10:52:39.154] <TB1> INFO: scanning low vcal = 140
[10:52:39.425] <TB1> INFO: Expecting 41600 events.
[10:52:43.603] <TB1> INFO: 41600 events read in total (3621ms).
[10:52:43.604] <TB1> INFO: Test took 4450ms.
[10:52:43.606] <TB1> INFO: scanning low vcal = 150
[10:52:43.870] <TB1> INFO: Expecting 41600 events.
[10:52:48.054] <TB1> INFO: 41600 events read in total (3628ms).
[10:52:48.054] <TB1> INFO: Test took 4448ms.
[10:52:48.057] <TB1> INFO: scanning low vcal = 160
[10:52:48.339] <TB1> INFO: Expecting 41600 events.
[10:52:52.509] <TB1> INFO: 41600 events read in total (3614ms).
[10:52:52.510] <TB1> INFO: Test took 4453ms.
[10:52:52.512] <TB1> INFO: scanning low vcal = 170
[10:52:52.786] <TB1> INFO: Expecting 41600 events.
[10:52:56.959] <TB1> INFO: 41600 events read in total (3617ms).
[10:52:56.959] <TB1> INFO: Test took 4447ms.
[10:52:56.963] <TB1> INFO: scanning low vcal = 180
[10:52:57.226] <TB1> INFO: Expecting 41600 events.
[10:53:01.404] <TB1> INFO: 41600 events read in total (3622ms).
[10:53:01.404] <TB1> INFO: Test took 4441ms.
[10:53:01.407] <TB1> INFO: scanning low vcal = 190
[10:53:01.673] <TB1> INFO: Expecting 41600 events.
[10:53:05.888] <TB1> INFO: 41600 events read in total (3659ms).
[10:53:05.890] <TB1> INFO: Test took 4483ms.
[10:53:05.892] <TB1> INFO: scanning low vcal = 200
[10:53:06.164] <TB1> INFO: Expecting 41600 events.
[10:53:10.323] <TB1> INFO: 41600 events read in total (3603ms).
[10:53:10.323] <TB1> INFO: Test took 4431ms.
[10:53:10.326] <TB1> INFO: scanning low vcal = 210
[10:53:10.590] <TB1> INFO: Expecting 41600 events.
[10:53:14.770] <TB1> INFO: 41600 events read in total (3624ms).
[10:53:14.771] <TB1> INFO: Test took 4445ms.
[10:53:14.773] <TB1> INFO: scanning low vcal = 220
[10:53:15.037] <TB1> INFO: Expecting 41600 events.
[10:53:19.217] <TB1> INFO: 41600 events read in total (3624ms).
[10:53:19.218] <TB1> INFO: Test took 4445ms.
[10:53:19.220] <TB1> INFO: scanning low vcal = 230
[10:53:19.493] <TB1> INFO: Expecting 41600 events.
[10:53:23.664] <TB1> INFO: 41600 events read in total (3614ms).
[10:53:23.665] <TB1> INFO: Test took 4445ms.
[10:53:23.667] <TB1> INFO: scanning low vcal = 240
[10:53:23.955] <TB1> INFO: Expecting 41600 events.
[10:53:28.140] <TB1> INFO: 41600 events read in total (3629ms).
[10:53:28.141] <TB1> INFO: Test took 4474ms.
[10:53:28.143] <TB1> INFO: scanning low vcal = 250
[10:53:28.408] <TB1> INFO: Expecting 41600 events.
[10:53:32.572] <TB1> INFO: 41600 events read in total (3608ms).
[10:53:32.573] <TB1> INFO: Test took 4430ms.
[10:53:32.577] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[10:53:32.838] <TB1> INFO: Expecting 41600 events.
[10:53:37.051] <TB1> INFO: 41600 events read in total (3657ms).
[10:53:37.052] <TB1> INFO: Test took 4475ms.
[10:53:37.054] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[10:53:37.354] <TB1> INFO: Expecting 41600 events.
[10:53:41.527] <TB1> INFO: 41600 events read in total (3617ms).
[10:53:41.528] <TB1> INFO: Test took 4474ms.
[10:53:41.530] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[10:53:41.790] <TB1> INFO: Expecting 41600 events.
[10:53:46.027] <TB1> INFO: 41600 events read in total (3680ms).
[10:53:46.028] <TB1> INFO: Test took 4497ms.
[10:53:46.030] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[10:53:46.319] <TB1> INFO: Expecting 41600 events.
[10:53:50.525] <TB1> INFO: 41600 events read in total (3649ms).
[10:53:50.526] <TB1> INFO: Test took 4495ms.
[10:53:50.528] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[10:53:50.791] <TB1> INFO: Expecting 41600 events.
[10:53:54.991] <TB1> INFO: 41600 events read in total (3643ms).
[10:53:54.992] <TB1> INFO: Test took 4464ms.
[10:53:56.035] <TB1> INFO: PixTestGainPedestal::measure() done
[10:54:29.179] <TB1> INFO: PixTestGainPedestal::fit() done
[10:54:29.179] <TB1> INFO: non-linearity mean: 0.959 0.961 0.960 0.962 0.952 0.964 0.955 0.961 0.957 0.956 0.956 0.962 0.957 0.954 0.958 0.955
[10:54:29.179] <TB1> INFO: non-linearity RMS: 0.005 0.004 0.006 0.006 0.007 0.005 0.009 0.007 0.009 0.008 0.006 0.006 0.007 0.007 0.006 0.006
[10:54:29.180] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[10:54:29.267] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[10:54:29.342] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[10:54:29.418] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[10:54:29.501] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[10:54:29.577] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[10:54:29.668] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[10:54:29.752] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[10:54:29.828] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[10:54:29.895] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[10:54:29.970] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[10:54:30.046] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[10:54:30.121] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[10:54:30.205] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[10:54:30.280] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[10:54:30.363] <TB1> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[10:54:30.438] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 167 seconds
[10:54:30.438] <TB1> INFO: Decoding statistics:
[10:54:30.439] <TB1> INFO: General information:
[10:54:30.439] <TB1> INFO: 16bit words read: 2662400
[10:54:30.439] <TB1> INFO: valid events total: 166400
[10:54:30.439] <TB1> INFO: empty events: 0
[10:54:30.439] <TB1> INFO: valid events with pixels: 166400
[10:54:30.439] <TB1> INFO: valid pixel hits: 665570
[10:54:30.439] <TB1> INFO: Event errors: 0
[10:54:30.439] <TB1> INFO: start marker: 0
[10:54:30.439] <TB1> INFO: stop marker: 0
[10:54:30.439] <TB1> INFO: overflow: 0
[10:54:30.439] <TB1> INFO: invalid 5bit words: 0
[10:54:30.439] <TB1> INFO: invalid XOR eye diagram: 0
[10:54:30.439] <TB1> INFO: frame (failed synchr.): 0
[10:54:30.439] <TB1> INFO: idle data (no TBM trl): 0
[10:54:30.439] <TB1> INFO: no data (only TBM hdr): 0
[10:54:30.439] <TB1> INFO: TBM errors: 0
[10:54:30.439] <TB1> INFO: flawed TBM headers: 0
[10:54:30.439] <TB1> INFO: flawed TBM trailers: 0
[10:54:30.439] <TB1> INFO: event ID mismatches: 0
[10:54:30.439] <TB1> INFO: ROC errors: 0
[10:54:30.439] <TB1> INFO: missing ROC header(s): 0
[10:54:30.439] <TB1> INFO: misplaced readback start: 0
[10:54:30.439] <TB1> INFO: Pixel decoding errors: 0
[10:54:30.439] <TB1> INFO: pixel data incomplete: 0
[10:54:30.439] <TB1> INFO: pixel address: 0
[10:54:30.439] <TB1> INFO: pulse height fill bit: 0
[10:54:30.439] <TB1> INFO: buffer corruption: 0
[10:54:30.446] <TB1> INFO: readReadbackCal: /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C0.dat .. /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C15.dat
[10:54:30.461] <TB1> INFO: ######################################################################
[10:54:30.461] <TB1> INFO: PixTestReadback::doTest()
[10:54:30.461] <TB1> INFO: ######################################################################
[10:54:30.461] <TB1> INFO: ----------------------------------------------------------------------
[10:54:30.461] <TB1> INFO: PixTestReadback::CalibrateVd()
[10:54:30.461] <TB1> INFO: ----------------------------------------------------------------------
[10:54:39.956] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C0.dat
[10:54:40.057] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C1.dat
[10:54:40.132] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C2.dat
[10:54:40.209] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C3.dat
[10:54:40.301] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C4.dat
[10:54:40.384] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C5.dat
[10:54:40.443] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C6.dat
[10:54:40.502] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C7.dat
[10:54:40.569] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C8.dat
[10:54:40.644] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C9.dat
[10:54:40.720] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C10.dat
[10:54:40.787] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C11.dat
[10:54:40.879] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C12.dat
[10:54:40.971] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C13.dat
[10:54:41.038] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C14.dat
[10:54:41.105] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C15.dat
[10:54:41.183] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:54:41.183] <TB1> INFO: ----------------------------------------------------------------------
[10:54:41.183] <TB1> INFO: PixTestReadback::CalibrateVa()
[10:54:41.183] <TB1> INFO: ----------------------------------------------------------------------
[10:54:50.700] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C0.dat
[10:54:50.705] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C1.dat
[10:54:50.711] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C2.dat
[10:54:50.717] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C3.dat
[10:54:50.722] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C4.dat
[10:54:50.729] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C5.dat
[10:54:50.734] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C6.dat
[10:54:50.739] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C7.dat
[10:54:50.746] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C8.dat
[10:54:50.752] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C9.dat
[10:54:50.758] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C10.dat
[10:54:50.765] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C11.dat
[10:54:50.770] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C12.dat
[10:54:50.775] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C13.dat
[10:54:50.781] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C14.dat
[10:54:50.789] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C15.dat
[10:54:50.818] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:54:50.818] <TB1> INFO: ----------------------------------------------------------------------
[10:54:50.818] <TB1> INFO: PixTestReadback::readbackVbg()
[10:54:50.818] <TB1> INFO: ----------------------------------------------------------------------
[10:54:58.103] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:54:58.104] <TB1> INFO: ----------------------------------------------------------------------
[10:54:58.104] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[10:54:58.104] <TB1> INFO: ----------------------------------------------------------------------
[10:54:58.104] <TB1> INFO: Vbg will be calibrated using Vd calibration
[10:54:58.104] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 156.5calibrated Vbg = 1.22748 :::*/*/*/*/
[10:54:58.104] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 150.8calibrated Vbg = 1.22788 :::*/*/*/*/
[10:54:58.104] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 161.5calibrated Vbg = 1.23435 :::*/*/*/*/
[10:54:58.104] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 161.6calibrated Vbg = 1.23922 :::*/*/*/*/
[10:54:58.104] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 153.8calibrated Vbg = 1.23429 :::*/*/*/*/
[10:54:58.104] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 156.6calibrated Vbg = 1.24287 :::*/*/*/*/
[10:54:58.104] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 154.8calibrated Vbg = 1.23976 :::*/*/*/*/
[10:54:58.104] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 164.9calibrated Vbg = 1.24095 :::*/*/*/*/
[10:54:58.104] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 153.6calibrated Vbg = 1.24865 :::*/*/*/*/
[10:54:58.104] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 148.1calibrated Vbg = 1.24107 :::*/*/*/*/
[10:54:58.104] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 154.6calibrated Vbg = 1.2396 :::*/*/*/*/
[10:54:58.104] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 153.9calibrated Vbg = 1.2282 :::*/*/*/*/
[10:54:58.104] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 159.5calibrated Vbg = 1.22535 :::*/*/*/*/
[10:54:58.104] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 156.2calibrated Vbg = 1.22559 :::*/*/*/*/
[10:54:58.104] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 153.1calibrated Vbg = 1.22602 :::*/*/*/*/
[10:54:58.104] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 159.9calibrated Vbg = 1.22562 :::*/*/*/*/
[10:54:58.105] <TB1> INFO: ----------------------------------------------------------------------
[10:54:58.106] <TB1> INFO: PixTestReadback::CalibrateIa()
[10:54:58.106] <TB1> INFO: ----------------------------------------------------------------------
[10:57:33.402] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C0.dat
[10:57:33.407] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C1.dat
[10:57:33.412] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C2.dat
[10:57:33.418] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C3.dat
[10:57:33.423] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C4.dat
[10:57:33.428] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C5.dat
[10:57:33.433] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C6.dat
[10:57:33.438] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C7.dat
[10:57:33.443] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C8.dat
[10:57:33.448] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C9.dat
[10:57:33.453] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C10.dat
[10:57:33.458] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C11.dat
[10:57:33.463] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C12.dat
[10:57:33.469] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C13.dat
[10:57:33.474] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C14.dat
[10:57:33.479] <TB1> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2185_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C15.dat
[10:57:33.516] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:57:33.518] <TB1> INFO: PixTestReadback::doTest() done
[10:57:33.518] <TB1> INFO: Decoding statistics:
[10:57:33.518] <TB1> INFO: General information:
[10:57:33.518] <TB1> INFO: 16bit words read: 1024
[10:57:33.518] <TB1> INFO: valid events total: 128
[10:57:33.518] <TB1> INFO: empty events: 128
[10:57:33.518] <TB1> INFO: valid events with pixels: 0
[10:57:33.518] <TB1> INFO: valid pixel hits: 0
[10:57:33.518] <TB1> INFO: Event errors: 0
[10:57:33.518] <TB1> INFO: start marker: 0
[10:57:33.518] <TB1> INFO: stop marker: 0
[10:57:33.518] <TB1> INFO: overflow: 0
[10:57:33.518] <TB1> INFO: invalid 5bit words: 0
[10:57:33.518] <TB1> INFO: invalid XOR eye diagram: 0
[10:57:33.518] <TB1> INFO: frame (failed synchr.): 0
[10:57:33.518] <TB1> INFO: idle data (no TBM trl): 0
[10:57:33.518] <TB1> INFO: no data (only TBM hdr): 0
[10:57:33.518] <TB1> INFO: TBM errors: 0
[10:57:33.518] <TB1> INFO: flawed TBM headers: 0
[10:57:33.518] <TB1> INFO: flawed TBM trailers: 0
[10:57:33.518] <TB1> INFO: event ID mismatches: 0
[10:57:33.518] <TB1> INFO: ROC errors: 0
[10:57:33.518] <TB1> INFO: missing ROC header(s): 0
[10:57:33.518] <TB1> INFO: misplaced readback start: 0
[10:57:33.518] <TB1> INFO: Pixel decoding errors: 0
[10:57:33.518] <TB1> INFO: pixel data incomplete: 0
[10:57:33.518] <TB1> INFO: pixel address: 0
[10:57:33.518] <TB1> INFO: pulse height fill bit: 0
[10:57:33.518] <TB1> INFO: buffer corruption: 0
[10:57:33.544] <TB1> INFO: Decoding statistics:
[10:57:33.544] <TB1> INFO: General information:
[10:57:33.544] <TB1> INFO: 16bit words read: 2755356
[10:57:33.544] <TB1> INFO: valid events total: 176768
[10:57:33.544] <TB1> INFO: empty events: 7865
[10:57:33.544] <TB1> INFO: valid events with pixels: 168903
[10:57:33.544] <TB1> INFO: valid pixel hits: 668073
[10:57:33.544] <TB1> INFO: Event errors: 0
[10:57:33.544] <TB1> INFO: start marker: 0
[10:57:33.544] <TB1> INFO: stop marker: 0
[10:57:33.544] <TB1> INFO: overflow: 0
[10:57:33.544] <TB1> INFO: invalid 5bit words: 0
[10:57:33.544] <TB1> INFO: invalid XOR eye diagram: 0
[10:57:33.544] <TB1> INFO: frame (failed synchr.): 0
[10:57:33.544] <TB1> INFO: idle data (no TBM trl): 0
[10:57:33.544] <TB1> INFO: no data (only TBM hdr): 0
[10:57:33.544] <TB1> INFO: TBM errors: 0
[10:57:33.544] <TB1> INFO: flawed TBM headers: 0
[10:57:33.544] <TB1> INFO: flawed TBM trailers: 0
[10:57:33.544] <TB1> INFO: event ID mismatches: 0
[10:57:33.544] <TB1> INFO: ROC errors: 0
[10:57:33.544] <TB1> INFO: missing ROC header(s): 0
[10:57:33.544] <TB1> INFO: misplaced readback start: 0
[10:57:33.544] <TB1> INFO: Pixel decoding errors: 0
[10:57:33.544] <TB1> INFO: pixel data incomplete: 0
[10:57:33.544] <TB1> INFO: pixel address: 0
[10:57:33.544] <TB1> INFO: pulse height fill bit: 0
[10:57:33.544] <TB1> INFO: buffer corruption: 0
[10:57:33.544] <TB1> INFO: enter test to run
[10:57:33.544] <TB1> INFO: test: exit no parameter change
[10:57:33.587] <TB1> QUIET: Connection to board 154 closed.
[10:57:33.667] <TB1> INFO: pXar: this is the end, my friend