[09:35:31.113] <TB0> INFO: *** Welcome to pxar ***
[09:35:31.113] <TB0> INFO: *** Today: 2016/03/23
[09:35:31.540] <TB0> INFO: *** Version: 9751-dirty
[09:35:31.540] <TB0> INFO: readRocDacs: /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C0.dat .. /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C15.dat
[09:35:31.555] <TB0> INFO: readTbmDacs: /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//tbmParameters_C0a.dat .. /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//tbmParameters_C0b.dat
[09:35:31.557] <TB0> INFO: readMaskFile: /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//defaultMaskFile.dat
[09:35:31.558] <TB0> INFO: readTrimFile: /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters_C0.dat .. /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters_C15.dat
[09:35:31.656] <TB0> INFO: clk: 4
[09:35:31.656] <TB0> INFO: ctr: 4
[09:35:31.656] <TB0> INFO: sda: 19
[09:35:31.656] <TB0> INFO: tin: 9
[09:35:31.656] <TB0> INFO: level: 15
[09:35:31.656] <TB0> INFO: triggerdelay: 0
[09:35:31.656] <TB0> QUIET: Instanciating API for pxar v2.7.5+40~g4fce89b
[09:35:31.656] <TB0> INFO: Log level: INFO
[09:35:31.664] <TB0> INFO: Found DTB DTB_WRQ4OZ
[09:35:31.675] <TB0> QUIET: Connection to board DTB_WRQ4OZ opened.
[09:35:31.677] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 71
HW version: DTB1.2
FW version: 4.4
SW version: 4.6
Options:
USB id: DTB_WRQ4OZ
MAC address: 40D855118047
Hostname: pixelDTB071
Comment:
------------------------------------------------------
[09:35:31.678] <TB0> INFO: RPC call hashes of host and DTB match: 484264910
[09:35:33.181] <TB0> INFO: DUT info:
[09:35:33.181] <TB0> INFO: The DUT currently contains the following objects:
[09:35:33.181] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[09:35:33.181] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:35:33.181] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:35:33.181] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[09:35:33.181] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:33.181] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:33.181] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:33.181] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:33.181] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:33.181] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:33.181] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:33.181] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:33.181] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:33.181] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:33.181] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:33.181] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:33.181] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:33.181] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:33.181] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:33.181] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:33.583] <TB0> INFO: enter 'restricted' command line mode
[09:35:33.583] <TB0> INFO: enter test to run
[09:35:33.583] <TB0> INFO: test: pretest no parameter change
[09:35:33.583] <TB0> INFO: running: pretest
[09:35:33.587] <TB0> INFO: ----------------------------------------------------------------------
[09:35:33.587] <TB0> INFO: PixTestPretest::programROC()
[09:35:33.587] <TB0> INFO: ----------------------------------------------------------------------
[09:35:51.601] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[09:35:51.602] <TB0> INFO: IA differences per ROC: 21.7 18.5 18.5 20.9 17.7 19.3 21.7 17.7 20.9 20.1 19.3 18.5 20.1 20.1 17.7 20.9
[09:35:51.700] <TB0> INFO: enter test to run
[09:35:51.700] <TB0> INFO: test: pretest no parameter change
[09:35:51.700] <TB0> INFO: running: pretest
[09:35:51.701] <TB0> INFO: ----------------------------------------------------------------------
[09:35:51.701] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[09:35:51.701] <TB0> INFO: ----------------------------------------------------------------------
[09:35:58.291] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 385.1 mA = 24.0688 mA/ROC
[09:35:58.291] <TB0> INFO: i(loss) [mA/ROC]: 19.3 19.3 18.5 18.5 19.3 19.3 18.5 19.3 18.5 18.5 19.3 18.5 19.3 19.3 18.5 18.5
[09:35:58.323] <TB0> INFO: enter test to run
[09:35:58.323] <TB0> INFO: test: pretest no parameter change
[09:35:58.324] <TB0> INFO: running: pretest
[09:35:58.324] <TB0> INFO: ----------------------------------------------------------------------
[09:35:58.324] <TB0> INFO: PixTestPretest::findTiming()
[09:35:58.324] <TB0> INFO: ----------------------------------------------------------------------
[09:35:58.324] <TB0> INFO: PixTestCmd::init()
[09:35:59.285] <TB0> WARNING: Not unmasking DUT, not setting Calibrate bits!
[09:37:25.817] <TB0> INFO: TBM phases: 160MHz: 7, 400MHz: 4, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[09:37:25.817] <TB0> INFO: (success/tries = 100/100), width = 4
[09:37:25.818] <TB0> INFO: enter test to run
[09:37:25.818] <TB0> INFO: test: pretest no parameter change
[09:37:25.818] <TB0> INFO: running: pretest
[09:37:25.819] <TB0> INFO: ----------------------------------------------------------------------
[09:37:25.819] <TB0> INFO: PixTestPretest::findWorkingPixel()
[09:37:25.819] <TB0> INFO: ----------------------------------------------------------------------
[09:37:25.909] <TB0> INFO: Expecting 231680 events.
[09:37:31.695] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L507> Channel 0 Number of ROCs (1) != Token Chain Length (4)
[09:37:31.779] <TB0> ERROR: <datapipe.cc/CheckEventID:L469> Channel 0 Event ID mismatch: local ID (21) != TBM ID (2)
[09:37:36.168] <TB0> INFO: 231680 events read in total (9703ms).
[09:37:36.172] <TB0> INFO: Test took 10351ms.
[09:37:36.409] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[09:37:36.482] <TB0> INFO: enter test to run
[09:37:36.482] <TB0> INFO: test: pretest no parameter change
[09:37:36.482] <TB0> INFO: running: pretest
[09:37:36.483] <TB0> INFO: ----------------------------------------------------------------------
[09:37:36.483] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[09:37:36.483] <TB0> INFO: ----------------------------------------------------------------------
[09:37:36.575] <TB0> INFO: Expecting 231680 events.
[09:37:46.838] <TB0> INFO: 231680 events read in total (9706ms).
[09:37:46.843] <TB0> INFO: Test took 10357ms.
[09:37:47.078] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[09:37:47.078] <TB0> INFO: CalDel: 128 125 132 143 132 158 133 140 138 134 133 114 127 140 140 148
[09:37:47.078] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 53 51 51 51 51 51
[09:37:47.116] <TB0> INFO: enter test to run
[09:37:47.116] <TB0> INFO: test: pretest no parameter change
[09:37:47.116] <TB0> INFO: running: pretest
[09:37:47.122] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C0.dat
[09:37:47.127] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C1.dat
[09:37:47.132] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C2.dat
[09:37:47.137] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C3.dat
[09:37:47.142] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C4.dat
[09:37:47.148] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C5.dat
[09:37:47.153] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C6.dat
[09:37:47.158] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C7.dat
[09:37:47.164] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C8.dat
[09:37:47.171] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C9.dat
[09:37:47.178] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C10.dat
[09:37:47.183] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C11.dat
[09:37:47.189] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C12.dat
[09:37:47.194] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C13.dat
[09:37:47.199] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C14.dat
[09:37:47.205] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters_C15.dat
[09:37:47.209] <TB0> INFO: enter test to run
[09:37:47.209] <TB0> INFO: test: fulltest no parameter change
[09:37:47.209] <TB0> INFO: running: fulltest
[09:37:47.209] <TB0> INFO: ######################################################################
[09:37:47.209] <TB0> INFO: PixTestFullTest::doTest()
[09:37:47.209] <TB0> INFO: ######################################################################
[09:37:47.210] <TB0> INFO: ######################################################################
[09:37:47.210] <TB0> INFO: PixTestAlive::doTest()
[09:37:47.210] <TB0> INFO: ######################################################################
[09:37:47.211] <TB0> INFO: ----------------------------------------------------------------------
[09:37:47.211] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:37:47.211] <TB0> INFO: ----------------------------------------------------------------------
[09:37:47.490] <TB0> INFO: Expecting 41600 events.
[09:37:51.326] <TB0> INFO: 41600 events read in total (3280ms).
[09:37:51.327] <TB0> INFO: Test took 4115ms.
[09:37:51.551] <TB0> INFO: PixTestAlive::aliveTest() done
[09:37:51.551] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:37:51.552] <TB0> INFO: ----------------------------------------------------------------------
[09:37:51.552] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:37:51.552] <TB0> INFO: ----------------------------------------------------------------------
[09:37:51.824] <TB0> INFO: Expecting 41600 events.
[09:37:54.831] <TB0> INFO: 41600 events read in total (2451ms).
[09:37:54.831] <TB0> INFO: Test took 3277ms.
[09:37:54.832] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[09:37:55.074] <TB0> INFO: PixTestAlive::maskTest() done
[09:37:55.074] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:37:55.075] <TB0> INFO: ----------------------------------------------------------------------
[09:37:55.075] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:37:55.075] <TB0> INFO: ----------------------------------------------------------------------
[09:37:55.335] <TB0> INFO: Expecting 41600 events.
[09:37:59.149] <TB0> INFO: 41600 events read in total (3257ms).
[09:37:59.149] <TB0> INFO: Test took 4072ms.
[09:37:59.381] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[09:37:59.381] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:37:59.381] <TB0> INFO: PixTestAlive::doTest() done, duration: 12 seconds
[09:37:59.381] <TB0> INFO: Decoding statistics:
[09:37:59.381] <TB0> INFO: General information:
[09:37:59.381] <TB0> INFO: 16bit words read: 0
[09:37:59.381] <TB0> INFO: valid events total: 0
[09:37:59.381] <TB0> INFO: empty events: 0
[09:37:59.381] <TB0> INFO: valid events with pixels: 0
[09:37:59.381] <TB0> INFO: valid pixel hits: 0
[09:37:59.381] <TB0> INFO: Event errors: 0
[09:37:59.381] <TB0> INFO: start marker: 0
[09:37:59.381] <TB0> INFO: stop marker: 0
[09:37:59.381] <TB0> INFO: overflow: 0
[09:37:59.381] <TB0> INFO: invalid 5bit words: 0
[09:37:59.381] <TB0> INFO: invalid XOR eye diagram: 0
[09:37:59.381] <TB0> INFO: frame (failed synchr.): 0
[09:37:59.381] <TB0> INFO: idle data (no TBM trl): 0
[09:37:59.381] <TB0> INFO: no data (only TBM hdr): 0
[09:37:59.381] <TB0> INFO: TBM errors: 0
[09:37:59.381] <TB0> INFO: flawed TBM headers: 0
[09:37:59.381] <TB0> INFO: flawed TBM trailers: 0
[09:37:59.381] <TB0> INFO: event ID mismatches: 0
[09:37:59.382] <TB0> INFO: ROC errors: 0
[09:37:59.382] <TB0> INFO: missing ROC header(s): 0
[09:37:59.382] <TB0> INFO: misplaced readback start: 0
[09:37:59.382] <TB0> INFO: Pixel decoding errors: 0
[09:37:59.382] <TB0> INFO: pixel data incomplete: 0
[09:37:59.382] <TB0> INFO: pixel address: 0
[09:37:59.382] <TB0> INFO: pulse height fill bit: 0
[09:37:59.382] <TB0> INFO: buffer corruption: 0
[09:37:59.395] <TB0> INFO: ######################################################################
[09:37:59.395] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[09:37:59.395] <TB0> INFO: ######################################################################
[09:37:59.397] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[09:37:59.408] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[09:37:59.408] <TB0> INFO: run 1 of 1
[09:37:59.667] <TB0> INFO: Expecting 3120000 events.
[09:38:40.344] <TB0> INFO: 838465 events read in total (40121ms).
[09:39:20.149] <TB0> INFO: 1668375 events read in total (79926ms).
[09:40:00.336] <TB0> INFO: 2508375 events read in total (120114ms).
[09:40:29.137] <TB0> INFO: 3120000 events read in total (148914ms).
[09:40:29.186] <TB0> INFO: Test took 149778ms.
[09:40:52.738] <TB0> INFO: PixTestBBMap::doTest() done, duration: 173 seconds
[09:40:52.738] <TB0> INFO: number of dead bumps (per ROC): 96 18 23 44 63 45 15 203 240 45 34 43 25 45 42 84
[09:40:52.738] <TB0> INFO: separation cut (per ROC): 83 83 85 84 75 68 78 78 87 79 81 69 85 79 79 84
[09:40:52.738] <TB0> INFO: Decoding statistics:
[09:40:52.738] <TB0> INFO: General information:
[09:40:52.738] <TB0> INFO: 16bit words read: 0
[09:40:52.738] <TB0> INFO: valid events total: 0
[09:40:52.738] <TB0> INFO: empty events: 0
[09:40:52.738] <TB0> INFO: valid events with pixels: 0
[09:40:52.738] <TB0> INFO: valid pixel hits: 0
[09:40:52.738] <TB0> INFO: Event errors: 0
[09:40:52.738] <TB0> INFO: start marker: 0
[09:40:52.738] <TB0> INFO: stop marker: 0
[09:40:52.738] <TB0> INFO: overflow: 0
[09:40:52.738] <TB0> INFO: invalid 5bit words: 0
[09:40:52.738] <TB0> INFO: invalid XOR eye diagram: 0
[09:40:52.738] <TB0> INFO: frame (failed synchr.): 0
[09:40:52.738] <TB0> INFO: idle data (no TBM trl): 0
[09:40:52.738] <TB0> INFO: no data (only TBM hdr): 0
[09:40:52.738] <TB0> INFO: TBM errors: 0
[09:40:52.738] <TB0> INFO: flawed TBM headers: 0
[09:40:52.738] <TB0> INFO: flawed TBM trailers: 0
[09:40:52.738] <TB0> INFO: event ID mismatches: 0
[09:40:52.738] <TB0> INFO: ROC errors: 0
[09:40:52.738] <TB0> INFO: missing ROC header(s): 0
[09:40:52.738] <TB0> INFO: misplaced readback start: 0
[09:40:52.738] <TB0> INFO: Pixel decoding errors: 0
[09:40:52.738] <TB0> INFO: pixel data incomplete: 0
[09:40:52.738] <TB0> INFO: pixel address: 0
[09:40:52.738] <TB0> INFO: pulse height fill bit: 0
[09:40:52.738] <TB0> INFO: buffer corruption: 0
[09:40:52.814] <TB0> INFO: ######################################################################
[09:40:52.814] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:40:52.814] <TB0> INFO: ######################################################################
[09:40:52.814] <TB0> INFO: ----------------------------------------------------------------------
[09:40:52.814] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:40:52.814] <TB0> INFO: ----------------------------------------------------------------------
[09:40:52.814] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[09:40:52.822] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[09:40:52.822] <TB0> INFO: run 1 of 1
[09:40:53.086] <TB0> INFO: Expecting 26208000 events.
[09:41:27.870] <TB0> INFO: 943150 events read in total (34228ms).
[09:42:01.221] <TB0> INFO: 1873700 events read in total (67579ms).
[09:42:34.839] <TB0> INFO: 2804300 events read in total (101197ms).
[09:43:08.457] <TB0> INFO: 3735150 events read in total (134815ms).
[09:43:41.818] <TB0> INFO: 4662250 events read in total (168177ms).
[09:44:15.533] <TB0> INFO: 5588450 events read in total (201891ms).
[09:44:49.076] <TB0> INFO: 6516050 events read in total (235434ms).
[09:45:22.827] <TB0> INFO: 7440200 events read in total (269186ms).
[09:45:56.036] <TB0> INFO: 8366250 events read in total (302394ms).
[09:46:29.753] <TB0> INFO: 9291950 events read in total (336111ms).
[09:47:03.417] <TB0> INFO: 10217000 events read in total (369775ms).
[09:47:36.537] <TB0> INFO: 11140000 events read in total (402895ms).
[09:48:10.166] <TB0> INFO: 12060450 events read in total (436524ms).
[09:48:43.456] <TB0> INFO: 12979000 events read in total (469814ms).
[09:49:16.862] <TB0> INFO: 13890400 events read in total (503220ms).
[09:49:50.260] <TB0> INFO: 14798600 events read in total (536618ms).
[09:50:23.882] <TB0> INFO: 15705900 events read in total (570240ms).
[09:50:57.259] <TB0> INFO: 16610200 events read in total (603617ms).
[09:51:30.384] <TB0> INFO: 17514050 events read in total (636742ms).
[09:52:03.614] <TB0> INFO: 18420350 events read in total (669972ms).
[09:52:37.698] <TB0> INFO: 19325650 events read in total (704056ms).
[09:53:12.159] <TB0> INFO: 20228650 events read in total (738517ms).
[09:53:46.175] <TB0> INFO: 21128200 events read in total (772533ms).
[09:54:19.278] <TB0> INFO: 22030250 events read in total (805636ms).
[09:54:52.383] <TB0> INFO: 22931400 events read in total (838741ms).
[09:55:25.878] <TB0> INFO: 23834200 events read in total (872236ms).
[09:55:59.108] <TB0> INFO: 24733800 events read in total (905466ms).
[09:56:32.357] <TB0> INFO: 25632150 events read in total (938715ms).
[09:56:53.371] <TB0> INFO: 26208000 events read in total (959729ms).
[09:56:53.406] <TB0> INFO: Test took 960584ms.
[09:56:53.635] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:56:55.122] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:56:56.785] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:56:58.480] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:00.016] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:01.593] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:03.228] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:04.794] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:06.347] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:07.920] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:09.557] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:11.177] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:12.671] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:14.148] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:15.832] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:17.430] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:19.254] <TB0> INFO: PixTestScurves::scurves() done
[09:57:19.254] <TB0> INFO: Vcal mean: 105.72 104.54 97.20 94.90 96.87 97.89 94.44 85.02 96.99 92.69 107.42 89.47 97.34 96.45 88.35 107.06
[09:57:19.254] <TB0> INFO: Vcal RMS: 5.30 5.83 5.47 5.38 5.77 4.89 5.08 5.83 5.21 5.58 4.66 5.37 5.91 4.70 4.89 5.14
[09:57:19.254] <TB0> INFO: PixTestScurves::fullTest() done, duration: 986 seconds
[09:57:19.254] <TB0> INFO: Decoding statistics:
[09:57:19.254] <TB0> INFO: General information:
[09:57:19.254] <TB0> INFO: 16bit words read: 0
[09:57:19.254] <TB0> INFO: valid events total: 0
[09:57:19.254] <TB0> INFO: empty events: 0
[09:57:19.254] <TB0> INFO: valid events with pixels: 0
[09:57:19.254] <TB0> INFO: valid pixel hits: 0
[09:57:19.254] <TB0> INFO: Event errors: 0
[09:57:19.254] <TB0> INFO: start marker: 0
[09:57:19.254] <TB0> INFO: stop marker: 0
[09:57:19.254] <TB0> INFO: overflow: 0
[09:57:19.254] <TB0> INFO: invalid 5bit words: 0
[09:57:19.254] <TB0> INFO: invalid XOR eye diagram: 0
[09:57:19.254] <TB0> INFO: frame (failed synchr.): 0
[09:57:19.254] <TB0> INFO: idle data (no TBM trl): 0
[09:57:19.254] <TB0> INFO: no data (only TBM hdr): 0
[09:57:19.254] <TB0> INFO: TBM errors: 0
[09:57:19.254] <TB0> INFO: flawed TBM headers: 0
[09:57:19.254] <TB0> INFO: flawed TBM trailers: 0
[09:57:19.254] <TB0> INFO: event ID mismatches: 0
[09:57:19.254] <TB0> INFO: ROC errors: 0
[09:57:19.254] <TB0> INFO: missing ROC header(s): 0
[09:57:19.254] <TB0> INFO: misplaced readback start: 0
[09:57:19.254] <TB0> INFO: Pixel decoding errors: 0
[09:57:19.254] <TB0> INFO: pixel data incomplete: 0
[09:57:19.254] <TB0> INFO: pixel address: 0
[09:57:19.254] <TB0> INFO: pulse height fill bit: 0
[09:57:19.254] <TB0> INFO: buffer corruption: 0
[09:57:19.325] <TB0> INFO: ######################################################################
[09:57:19.325] <TB0> INFO: PixTestTrim::doTest()
[09:57:19.325] <TB0> INFO: ######################################################################
[09:57:19.326] <TB0> INFO: ----------------------------------------------------------------------
[09:57:19.326] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[09:57:19.326] <TB0> INFO: ----------------------------------------------------------------------
[09:57:19.432] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:57:19.432] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[09:57:19.440] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[09:57:19.440] <TB0> INFO: run 1 of 1
[09:57:19.710] <TB0> INFO: Expecting 5025280 events.
[09:58:01.424] <TB0> INFO: 1079216 events read in total (41157ms).
[09:58:41.849] <TB0> INFO: 2150456 events read in total (81582ms).
[09:59:22.220] <TB0> INFO: 3221592 events read in total (121953ms).
[10:00:02.555] <TB0> INFO: 4298256 events read in total (162288ms).
[10:00:29.837] <TB0> INFO: 5025280 events read in total (189570ms).
[10:00:29.871] <TB0> INFO: Test took 190432ms.
[10:00:49.763] <TB0> INFO: ROC 0 VthrComp = 106
[10:00:49.763] <TB0> INFO: ROC 1 VthrComp = 102
[10:00:49.763] <TB0> INFO: ROC 2 VthrComp = 96
[10:00:49.764] <TB0> INFO: ROC 3 VthrComp = 99
[10:00:49.764] <TB0> INFO: ROC 4 VthrComp = 96
[10:00:49.764] <TB0> INFO: ROC 5 VthrComp = 95
[10:00:49.764] <TB0> INFO: ROC 6 VthrComp = 97
[10:00:49.764] <TB0> INFO: ROC 7 VthrComp = 86
[10:00:49.764] <TB0> INFO: ROC 8 VthrComp = 99
[10:00:49.764] <TB0> INFO: ROC 9 VthrComp = 93
[10:00:49.764] <TB0> INFO: ROC 10 VthrComp = 105
[10:00:49.764] <TB0> INFO: ROC 11 VthrComp = 91
[10:00:49.764] <TB0> INFO: ROC 12 VthrComp = 100
[10:00:49.764] <TB0> INFO: ROC 13 VthrComp = 94
[10:00:49.764] <TB0> INFO: ROC 14 VthrComp = 90
[10:00:49.765] <TB0> INFO: ROC 15 VthrComp = 104
[10:00:49.765] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[10:00:49.765] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[10:00:49.772] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[10:00:49.772] <TB0> INFO: run 1 of 1
[10:00:50.056] <TB0> INFO: Expecting 5025280 events.
[10:01:26.300] <TB0> INFO: 755960 events read in total (35688ms).
[10:02:01.688] <TB0> INFO: 1511728 events read in total (71076ms).
[10:02:37.174] <TB0> INFO: 2267952 events read in total (106562ms).
[10:03:12.932] <TB0> INFO: 3019448 events read in total (142320ms).
[10:03:48.590] <TB0> INFO: 3765176 events read in total (177978ms).
[10:04:24.303] <TB0> INFO: 4509208 events read in total (213691ms).
[10:04:49.034] <TB0> INFO: 5025280 events read in total (238422ms).
[10:04:49.100] <TB0> INFO: Test took 239327ms.
[10:05:14.195] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 59.7031 for pixel 0/56 mean/min/max = 47.0912/34.3221/59.8603
[10:05:14.196] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 60.7449 for pixel 0/29 mean/min/max = 46.3427/31.8844/60.801
[10:05:14.196] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 59.3004 for pixel 10/75 mean/min/max = 45.4451/31.5568/59.3334
[10:05:14.196] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 56.8508 for pixel 23/75 mean/min/max = 44.4491/32.0336/56.8646
[10:05:14.197] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 59.619 for pixel 4/79 mean/min/max = 45.7295/31.8249/59.6341
[10:05:14.197] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 58.3282 for pixel 51/5 mean/min/max = 45.9033/33.3187/58.4878
[10:05:14.197] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 56.2689 for pixel 6/79 mean/min/max = 44.2568/32.117/56.3966
[10:05:14.198] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 58.7573 for pixel 15/56 mean/min/max = 45.3571/31.6108/59.1035
[10:05:14.198] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 56.4577 for pixel 17/2 mean/min/max = 44.383/32.0498/56.7162
[10:05:14.199] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 57.655 for pixel 10/70 mean/min/max = 45.19/32.6866/57.6933
[10:05:14.199] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 60.8942 for pixel 12/6 mean/min/max = 48.4203/35.712/61.1286
[10:05:14.199] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 59.0627 for pixel 2/65 mean/min/max = 46.0235/32.9115/59.1354
[10:05:14.200] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 59.2657 for pixel 0/5 mean/min/max = 45.3291/31.3616/59.2967
[10:05:14.200] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 57.7482 for pixel 14/7 mean/min/max = 45.3332/32.7636/57.9028
[10:05:14.200] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 56.542 for pixel 24/6 mean/min/max = 45.3281/34.0864/56.5699
[10:05:14.201] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 61.5293 for pixel 21/29 mean/min/max = 47.8618/33.9726/61.7511
[10:05:14.201] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:05:14.289] <TB0> INFO: Expecting 411648 events.
[10:05:24.832] <TB0> INFO: 411648 events read in total (9987ms).
[10:05:24.839] <TB0> INFO: Expecting 411648 events.
[10:05:35.419] <TB0> INFO: 411648 events read in total (10164ms).
[10:05:35.425] <TB0> INFO: Expecting 411648 events.
[10:05:45.824] <TB0> INFO: 411648 events read in total (9976ms).
[10:05:45.832] <TB0> INFO: Expecting 411648 events.
[10:05:56.264] <TB0> INFO: 411648 events read in total (10008ms).
[10:05:56.279] <TB0> INFO: Expecting 411648 events.
[10:06:06.668] <TB0> INFO: 411648 events read in total (9981ms).
[10:06:06.683] <TB0> INFO: Expecting 411648 events.
[10:06:17.132] <TB0> INFO: 411648 events read in total (10030ms).
[10:06:17.146] <TB0> INFO: Expecting 411648 events.
[10:06:27.752] <TB0> INFO: 411648 events read in total (10186ms).
[10:06:27.769] <TB0> INFO: Expecting 411648 events.
[10:06:38.269] <TB0> INFO: 411648 events read in total (10083ms).
[10:06:38.289] <TB0> INFO: Expecting 411648 events.
[10:06:48.775] <TB0> INFO: 411648 events read in total (10070ms).
[10:06:48.796] <TB0> INFO: Expecting 411648 events.
[10:06:59.372] <TB0> INFO: 411648 events read in total (10163ms).
[10:06:59.393] <TB0> INFO: Expecting 411648 events.
[10:07:09.795] <TB0> INFO: 411648 events read in total (9994ms).
[10:07:09.818] <TB0> INFO: Expecting 411648 events.
[10:07:20.305] <TB0> INFO: 411648 events read in total (10082ms).
[10:07:20.334] <TB0> INFO: Expecting 411648 events.
[10:07:30.848] <TB0> INFO: 411648 events read in total (10112ms).
[10:07:30.878] <TB0> INFO: Expecting 411648 events.
[10:07:41.275] <TB0> INFO: 411648 events read in total (9995ms).
[10:07:41.307] <TB0> INFO: Expecting 411648 events.
[10:07:51.649] <TB0> INFO: 411648 events read in total (9940ms).
[10:07:51.680] <TB0> INFO: Expecting 411648 events.
[10:08:02.247] <TB0> INFO: 411648 events read in total (10166ms).
[10:08:02.280] <TB0> INFO: Test took 168079ms.
[10:08:03.225] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[10:08:03.233] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[10:08:03.233] <TB0> INFO: run 1 of 1
[10:08:03.507] <TB0> INFO: Expecting 5025280 events.
[10:08:39.513] <TB0> INFO: 742096 events read in total (35450ms).
[10:09:15.115] <TB0> INFO: 1484160 events read in total (71052ms).
[10:09:50.548] <TB0> INFO: 2226840 events read in total (106485ms).
[10:10:25.799] <TB0> INFO: 2964568 events read in total (141736ms).
[10:11:01.441] <TB0> INFO: 3696456 events read in total (177378ms).
[10:11:37.061] <TB0> INFO: 4425480 events read in total (212998ms).
[10:12:05.990] <TB0> INFO: 5025280 events read in total (241927ms).
[10:12:06.038] <TB0> INFO: Test took 242805ms.
[10:12:31.089] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 3.499998 .. 51.086312
[10:12:31.170] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 3 .. 61 (-1/-1) hits flags = 528 (plus default)
[10:12:31.179] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[10:12:31.179] <TB0> INFO: run 1 of 1
[10:12:31.444] <TB0> INFO: Expecting 1963520 events.
[10:13:11.831] <TB0> INFO: 911872 events read in total (39831ms).
[10:13:50.738] <TB0> INFO: 1814640 events read in total (78738ms).
[10:13:57.390] <TB0> INFO: 1963520 events read in total (85391ms).
[10:13:57.408] <TB0> INFO: Test took 86230ms.
[10:14:11.961] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 13.014869 .. 45.000000
[10:14:12.036] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 3 .. 55 (-1/-1) hits flags = 528 (plus default)
[10:14:12.044] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[10:14:12.044] <TB0> INFO: run 1 of 1
[10:14:12.303] <TB0> INFO: Expecting 1763840 events.
[10:14:52.359] <TB0> INFO: 949360 events read in total (39499ms).
[10:15:26.320] <TB0> INFO: 1763840 events read in total (73460ms).
[10:15:26.334] <TB0> INFO: Test took 74290ms.
[10:15:40.216] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 18.913247 .. 41.630324
[10:15:40.294] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 8 .. 51 (-1/-1) hits flags = 528 (plus default)
[10:15:40.302] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[10:15:40.302] <TB0> INFO: run 1 of 1
[10:15:40.570] <TB0> INFO: Expecting 1464320 events.
[10:16:20.727] <TB0> INFO: 958408 events read in total (39600ms).
[10:16:41.834] <TB0> INFO: 1464320 events read in total (60707ms).
[10:16:41.847] <TB0> INFO: Test took 61545ms.
[10:16:56.202] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 21.484566 .. 41.223869
[10:16:56.280] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 11 .. 51 (-1/-1) hits flags = 528 (plus default)
[10:16:56.288] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[10:16:56.288] <TB0> INFO: run 1 of 1
[10:16:56.560] <TB0> INFO: Expecting 1364480 events.
[10:17:36.525] <TB0> INFO: 939624 events read in total (39409ms).
[10:17:54.447] <TB0> INFO: 1364480 events read in total (57331ms).
[10:17:54.462] <TB0> INFO: Test took 58174ms.
[10:18:07.921] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[10:18:07.921] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[10:18:07.929] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[10:18:07.929] <TB0> INFO: run 1 of 1
[10:18:08.198] <TB0> INFO: Expecting 1364480 events.
[10:18:46.885] <TB0> INFO: 879512 events read in total (38131ms).
[10:19:08.133] <TB0> INFO: 1364480 events read in total (59379ms).
[10:19:08.148] <TB0> INFO: Test took 60219ms.
[10:19:21.688] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C0.dat
[10:19:21.693] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C1.dat
[10:19:21.697] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C2.dat
[10:19:21.700] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C3.dat
[10:19:21.704] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C4.dat
[10:19:21.708] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C5.dat
[10:19:21.712] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C6.dat
[10:19:21.715] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C7.dat
[10:19:21.719] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C8.dat
[10:19:21.723] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C9.dat
[10:19:21.727] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C10.dat
[10:19:21.731] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C11.dat
[10:19:21.743] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C12.dat
[10:19:21.747] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C13.dat
[10:19:21.751] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C14.dat
[10:19:21.755] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C15.dat
[10:19:21.759] <TB0> INFO: write trim parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C0.dat
[10:19:21.774] <TB0> INFO: write trim parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C1.dat
[10:19:21.790] <TB0> INFO: write trim parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C2.dat
[10:19:21.802] <TB0> INFO: write trim parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C3.dat
[10:19:21.814] <TB0> INFO: write trim parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C4.dat
[10:19:21.826] <TB0> INFO: write trim parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C5.dat
[10:19:21.838] <TB0> INFO: write trim parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C6.dat
[10:19:21.850] <TB0> INFO: write trim parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C7.dat
[10:19:21.861] <TB0> INFO: write trim parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C8.dat
[10:19:21.873] <TB0> INFO: write trim parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C9.dat
[10:19:21.885] <TB0> INFO: write trim parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C10.dat
[10:19:21.897] <TB0> INFO: write trim parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C11.dat
[10:19:21.912] <TB0> INFO: write trim parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C12.dat
[10:19:21.926] <TB0> INFO: write trim parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C13.dat
[10:19:21.941] <TB0> INFO: write trim parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C14.dat
[10:19:21.956] <TB0> INFO: write trim parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//trimParameters35_C15.dat
[10:19:21.967] <TB0> INFO: PixTestTrim::trimTest() done
[10:19:21.967] <TB0> INFO: vtrim: 99 110 104 87 99 97 93 94 96 96 108 103 93 97 103 111
[10:19:21.967] <TB0> INFO: vthrcomp: 106 102 96 99 96 95 97 86 99 93 105 91 100 94 90 104
[10:19:21.967] <TB0> INFO: vcal mean: 35.02 34.98 34.99 34.96 34.96 34.98 34.92 34.96 34.97 34.95 35.03 35.01 34.96 34.95 35.00 34.94
[10:19:21.967] <TB0> INFO: vcal RMS: 0.88 0.99 0.96 0.92 0.95 0.92 0.90 0.94 0.93 0.90 0.93 0.88 0.92 0.90 0.89 0.93
[10:19:21.967] <TB0> INFO: bits mean: 8.42 9.64 10.00 9.64 9.47 8.96 9.89 9.62 10.04 9.46 8.02 9.39 9.15 9.57 9.61 8.92
[10:19:21.967] <TB0> INFO: bits RMS: 2.72 2.56 2.54 2.73 2.74 2.78 2.61 2.69 2.58 2.66 2.55 2.61 3.02 2.57 2.36 2.53
[10:19:21.973] <TB0> INFO: ----------------------------------------------------------------------
[10:19:21.973] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[10:19:21.973] <TB0> INFO: ----------------------------------------------------------------------
[10:19:21.975] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[10:19:21.983] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[10:19:21.983] <TB0> INFO: run 1 of 1
[10:19:22.266] <TB0> INFO: Expecting 4160000 events.
[10:20:05.060] <TB0> INFO: 968870 events read in total (42237ms).
[10:20:47.313] <TB0> INFO: 1929590 events read in total (84491ms).
[10:21:30.094] <TB0> INFO: 2878470 events read in total (127272ms).
[10:22:11.880] <TB0> INFO: 3823570 events read in total (169057ms).
[10:22:27.218] <TB0> INFO: 4160000 events read in total (184395ms).
[10:22:27.266] <TB0> INFO: Test took 185283ms.
[10:22:58.574] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 175 (-1/-1) hits flags = 528 (plus default)
[10:22:58.583] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[10:22:58.583] <TB0> INFO: run 1 of 1
[10:22:58.860] <TB0> INFO: Expecting 3660800 events.
[10:23:43.092] <TB0> INFO: 986475 events read in total (43676ms).
[10:24:25.627] <TB0> INFO: 1962385 events read in total (86211ms).
[10:25:07.544] <TB0> INFO: 2926210 events read in total (128128ms).
[10:25:39.759] <TB0> INFO: 3660800 events read in total (160343ms).
[10:25:39.798] <TB0> INFO: Test took 161215ms.
[10:26:09.115] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 164 (-1/-1) hits flags = 528 (plus default)
[10:26:09.124] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[10:26:09.124] <TB0> INFO: run 1 of 1
[10:26:09.414] <TB0> INFO: Expecting 3432000 events.
[10:26:53.298] <TB0> INFO: 1018690 events read in total (43328ms).
[10:27:36.428] <TB0> INFO: 2023525 events read in total (86458ms).
[10:28:18.990] <TB0> INFO: 3016115 events read in total (129021ms).
[10:28:37.252] <TB0> INFO: 3432000 events read in total (147282ms).
[10:28:37.284] <TB0> INFO: Test took 148160ms.
[10:29:03.641] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 165 (-1/-1) hits flags = 528 (plus default)
[10:29:03.653] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[10:29:03.653] <TB0> INFO: run 1 of 1
[10:29:03.931] <TB0> INFO: Expecting 3452800 events.
[10:29:47.960] <TB0> INFO: 1015255 events read in total (43473ms).
[10:30:30.994] <TB0> INFO: 2016605 events read in total (86507ms).
[10:31:13.919] <TB0> INFO: 3005965 events read in total (129433ms).
[10:31:33.244] <TB0> INFO: 3452800 events read in total (148757ms).
[10:31:33.284] <TB0> INFO: Test took 149631ms.
[10:32:00.669] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 161 (-1/-1) hits flags = 528 (plus default)
[10:32:00.677] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[10:32:00.677] <TB0> INFO: run 1 of 1
[10:32:00.963] <TB0> INFO: Expecting 3369600 events.
[10:32:45.314] <TB0> INFO: 1027315 events read in total (43795ms).
[10:33:27.967] <TB0> INFO: 2039685 events read in total (86448ms).
[10:34:11.212] <TB0> INFO: 3040160 events read in total (129693ms).
[10:34:25.562] <TB0> INFO: 3369600 events read in total (144043ms).
[10:34:25.587] <TB0> INFO: Test took 144909ms.
[10:34:51.615] <TB0> INFO: PixTestTrim::trimBitTest() done
[10:34:51.617] <TB0> INFO: PixTestTrim::doTest() done, duration: 2252 seconds
[10:34:51.617] <TB0> INFO: Decoding statistics:
[10:34:51.617] <TB0> INFO: General information:
[10:34:51.617] <TB0> INFO: 16bit words read: 0
[10:34:51.617] <TB0> INFO: valid events total: 0
[10:34:51.617] <TB0> INFO: empty events: 0
[10:34:51.617] <TB0> INFO: valid events with pixels: 0
[10:34:51.617] <TB0> INFO: valid pixel hits: 0
[10:34:51.617] <TB0> INFO: Event errors: 0
[10:34:51.617] <TB0> INFO: start marker: 0
[10:34:51.617] <TB0> INFO: stop marker: 0
[10:34:51.617] <TB0> INFO: overflow: 0
[10:34:51.617] <TB0> INFO: invalid 5bit words: 0
[10:34:51.617] <TB0> INFO: invalid XOR eye diagram: 0
[10:34:51.617] <TB0> INFO: frame (failed synchr.): 0
[10:34:51.617] <TB0> INFO: idle data (no TBM trl): 0
[10:34:51.617] <TB0> INFO: no data (only TBM hdr): 0
[10:34:51.617] <TB0> INFO: TBM errors: 0
[10:34:51.617] <TB0> INFO: flawed TBM headers: 0
[10:34:51.617] <TB0> INFO: flawed TBM trailers: 0
[10:34:51.617] <TB0> INFO: event ID mismatches: 0
[10:34:51.617] <TB0> INFO: ROC errors: 0
[10:34:51.617] <TB0> INFO: missing ROC header(s): 0
[10:34:51.617] <TB0> INFO: misplaced readback start: 0
[10:34:51.617] <TB0> INFO: Pixel decoding errors: 0
[10:34:51.617] <TB0> INFO: pixel data incomplete: 0
[10:34:51.617] <TB0> INFO: pixel address: 0
[10:34:51.617] <TB0> INFO: pulse height fill bit: 0
[10:34:51.617] <TB0> INFO: buffer corruption: 0
[10:34:52.304] <TB0> INFO: ######################################################################
[10:34:52.304] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:34:52.304] <TB0> INFO: ######################################################################
[10:34:52.573] <TB0> INFO: Expecting 41600 events.
[10:34:56.328] <TB0> INFO: 41600 events read in total (3199ms).
[10:34:56.329] <TB0> INFO: Test took 4024ms.
[10:34:56.810] <TB0> INFO: Expecting 41600 events.
[10:35:00.585] <TB0> INFO: 41600 events read in total (3219ms).
[10:35:00.586] <TB0> INFO: Test took 4055ms.
[10:35:00.871] <TB0> INFO: Expecting 41600 events.
[10:35:04.769] <TB0> INFO: 41600 events read in total (3342ms).
[10:35:04.770] <TB0> INFO: Test took 4161ms.
[10:35:05.026] <TB0> INFO: Expecting 2560 events.
[10:35:05.881] <TB0> INFO: 2560 events read in total (299ms).
[10:35:05.881] <TB0> INFO: Test took 1097ms.
[10:35:06.186] <TB0> INFO: Expecting 2560 events.
[10:35:07.041] <TB0> INFO: 2560 events read in total (298ms).
[10:35:07.041] <TB0> INFO: Test took 1159ms.
[10:35:07.346] <TB0> INFO: Expecting 2560 events.
[10:35:08.201] <TB0> INFO: 2560 events read in total (298ms).
[10:35:08.201] <TB0> INFO: Test took 1160ms.
[10:35:08.506] <TB0> INFO: Expecting 2560 events.
[10:35:09.361] <TB0> INFO: 2560 events read in total (298ms).
[10:35:09.361] <TB0> INFO: Test took 1160ms.
[10:35:09.666] <TB0> INFO: Expecting 2560 events.
[10:35:10.518] <TB0> INFO: 2560 events read in total (296ms).
[10:35:10.518] <TB0> INFO: Test took 1157ms.
[10:35:10.823] <TB0> INFO: Expecting 2560 events.
[10:35:11.678] <TB0> INFO: 2560 events read in total (299ms).
[10:35:11.678] <TB0> INFO: Test took 1160ms.
[10:35:11.983] <TB0> INFO: Expecting 2560 events.
[10:35:12.834] <TB0> INFO: 2560 events read in total (295ms).
[10:35:12.835] <TB0> INFO: Test took 1157ms.
[10:35:13.140] <TB0> INFO: Expecting 2560 events.
[10:35:13.992] <TB0> INFO: 2560 events read in total (296ms).
[10:35:13.992] <TB0> INFO: Test took 1157ms.
[10:35:14.297] <TB0> INFO: Expecting 2560 events.
[10:35:15.148] <TB0> INFO: 2560 events read in total (295ms).
[10:35:15.148] <TB0> INFO: Test took 1156ms.
[10:35:15.454] <TB0> INFO: Expecting 2560 events.
[10:35:16.309] <TB0> INFO: 2560 events read in total (299ms).
[10:35:16.309] <TB0> INFO: Test took 1160ms.
[10:35:16.614] <TB0> INFO: Expecting 2560 events.
[10:35:17.465] <TB0> INFO: 2560 events read in total (295ms).
[10:35:17.466] <TB0> INFO: Test took 1157ms.
[10:35:17.771] <TB0> INFO: Expecting 2560 events.
[10:35:18.625] <TB0> INFO: 2560 events read in total (298ms).
[10:35:18.625] <TB0> INFO: Test took 1159ms.
[10:35:18.930] <TB0> INFO: Expecting 2560 events.
[10:35:19.784] <TB0> INFO: 2560 events read in total (298ms).
[10:35:19.785] <TB0> INFO: Test took 1160ms.
[10:35:20.090] <TB0> INFO: Expecting 2560 events.
[10:35:20.942] <TB0> INFO: 2560 events read in total (296ms).
[10:35:20.942] <TB0> INFO: Test took 1157ms.
[10:35:21.248] <TB0> INFO: Expecting 2560 events.
[10:35:22.099] <TB0> INFO: 2560 events read in total (295ms).
[10:35:22.099] <TB0> INFO: Test took 1156ms.
[10:35:22.410] <TB0> INFO: Expecting 2560 events.
[10:35:23.262] <TB0> INFO: 2560 events read in total (296ms).
[10:35:23.262] <TB0> INFO: Test took 1162ms.
[10:35:23.265] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:23.568] <TB0> INFO: Expecting 655360 events.
[10:35:40.672] <TB0> INFO: 655360 events read in total (16549ms).
[10:35:40.683] <TB0> INFO: Expecting 655360 events.
[10:35:57.236] <TB0> INFO: 655360 events read in total (16151ms).
[10:35:57.248] <TB0> INFO: Expecting 655360 events.
[10:36:13.760] <TB0> INFO: 655360 events read in total (16110ms).
[10:36:13.776] <TB0> INFO: Expecting 655360 events.
[10:36:30.345] <TB0> INFO: 655360 events read in total (16168ms).
[10:36:30.364] <TB0> INFO: Expecting 655360 events.
[10:36:46.968] <TB0> INFO: 655360 events read in total (16202ms).
[10:36:46.991] <TB0> INFO: Expecting 655360 events.
[10:37:03.379] <TB0> INFO: 655360 events read in total (15986ms).
[10:37:03.405] <TB0> INFO: Expecting 655360 events.
[10:37:20.028] <TB0> INFO: 655360 events read in total (16221ms).
[10:37:20.058] <TB0> INFO: Expecting 655360 events.
[10:37:36.679] <TB0> INFO: 655360 events read in total (16220ms).
[10:37:36.716] <TB0> INFO: Expecting 655360 events.
[10:37:53.269] <TB0> INFO: 655360 events read in total (16152ms).
[10:37:53.307] <TB0> INFO: Expecting 655360 events.
[10:38:09.819] <TB0> INFO: 655360 events read in total (16110ms).
[10:38:09.859] <TB0> INFO: Expecting 655360 events.
[10:38:26.390] <TB0> INFO: 655360 events read in total (16129ms).
[10:38:26.431] <TB0> INFO: Expecting 655360 events.
[10:38:43.015] <TB0> INFO: 655360 events read in total (16182ms).
[10:38:43.061] <TB0> INFO: Expecting 655360 events.
[10:38:59.676] <TB0> INFO: 655360 events read in total (16213ms).
[10:38:59.730] <TB0> INFO: Expecting 655360 events.
[10:39:16.287] <TB0> INFO: 655360 events read in total (16155ms).
[10:39:16.362] <TB0> INFO: Expecting 655360 events.
[10:39:32.817] <TB0> INFO: 655360 events read in total (16053ms).
[10:39:32.890] <TB0> INFO: Expecting 655360 events.
[10:39:49.421] <TB0> INFO: 655360 events read in total (16130ms).
[10:39:49.486] <TB0> INFO: Test took 266221ms.
[10:39:49.580] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:49.804] <TB0> INFO: Expecting 655360 events.
[10:40:06.694] <TB0> INFO: 655360 events read in total (16334ms).
[10:40:06.703] <TB0> INFO: Expecting 655360 events.
[10:40:23.356] <TB0> INFO: 655360 events read in total (16251ms).
[10:40:23.369] <TB0> INFO: Expecting 655360 events.
[10:40:40.026] <TB0> INFO: 655360 events read in total (16256ms).
[10:40:40.042] <TB0> INFO: Expecting 655360 events.
[10:40:56.518] <TB0> INFO: 655360 events read in total (16074ms).
[10:40:56.538] <TB0> INFO: Expecting 655360 events.
[10:41:12.738] <TB0> INFO: 655360 events read in total (15798ms).
[10:41:12.761] <TB0> INFO: Expecting 655360 events.
[10:41:29.179] <TB0> INFO: 655360 events read in total (16016ms).
[10:41:29.205] <TB0> INFO: Expecting 655360 events.
[10:41:45.767] <TB0> INFO: 655360 events read in total (16160ms).
[10:41:45.796] <TB0> INFO: Expecting 655360 events.
[10:42:02.274] <TB0> INFO: 655360 events read in total (16077ms).
[10:42:02.311] <TB0> INFO: Expecting 655360 events.
[10:42:19.058] <TB0> INFO: 655360 events read in total (16345ms).
[10:42:19.112] <TB0> INFO: Expecting 655360 events.
[10:42:35.570] <TB0> INFO: 655360 events read in total (16056ms).
[10:42:35.611] <TB0> INFO: Expecting 655360 events.
[10:42:51.964] <TB0> INFO: 655360 events read in total (15951ms).
[10:42:52.008] <TB0> INFO: Expecting 655360 events.
[10:43:08.544] <TB0> INFO: 655360 events read in total (16135ms).
[10:43:08.592] <TB0> INFO: Expecting 655360 events.
[10:43:25.166] <TB0> INFO: 655360 events read in total (16172ms).
[10:43:25.217] <TB0> INFO: Expecting 655360 events.
[10:43:41.613] <TB0> INFO: 655360 events read in total (15994ms).
[10:43:41.666] <TB0> INFO: Expecting 655360 events.
[10:43:58.081] <TB0> INFO: 655360 events read in total (16014ms).
[10:43:58.172] <TB0> INFO: Expecting 655360 events.
[10:44:14.923] <TB0> INFO: 655360 events read in total (16349ms).
[10:44:14.987] <TB0> INFO: Test took 265407ms.
[10:44:15.179] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:15.186] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:15.193] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:15.200] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:15.206] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:15.213] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:15.220] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:15.227] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:15.234] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:15.241] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:15.248] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:15.255] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:15.262] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:15.268] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[10:44:15.275] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[10:44:15.282] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[10:44:15.289] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[10:44:15.296] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[10:44:15.303] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:15.310] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:15.316] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:15.355] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C0.dat
[10:44:15.361] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C1.dat
[10:44:15.369] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C2.dat
[10:44:15.375] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C3.dat
[10:44:15.381] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C4.dat
[10:44:15.426] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C5.dat
[10:44:15.432] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C6.dat
[10:44:15.439] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C7.dat
[10:44:15.444] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C8.dat
[10:44:15.451] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C9.dat
[10:44:15.456] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C10.dat
[10:44:15.463] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C11.dat
[10:44:15.468] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C12.dat
[10:44:15.476] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C13.dat
[10:44:15.482] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C14.dat
[10:44:15.488] <TB0> INFO: write dac parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//dacParameters35_C15.dat
[10:44:15.753] <TB0> INFO: Expecting 41600 events.
[10:44:19.238] <TB0> INFO: 41600 events read in total (2929ms).
[10:44:19.238] <TB0> INFO: Test took 3745ms.
[10:44:19.689] <TB0> INFO: Expecting 41600 events.
[10:44:23.193] <TB0> INFO: 41600 events read in total (2948ms).
[10:44:23.194] <TB0> INFO: Test took 3779ms.
[10:44:23.641] <TB0> INFO: Expecting 41600 events.
[10:44:27.109] <TB0> INFO: 41600 events read in total (2911ms).
[10:44:27.110] <TB0> INFO: Test took 3739ms.
[10:44:27.292] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:27.380] <TB0> INFO: Expecting 2560 events.
[10:44:28.233] <TB0> INFO: 2560 events read in total (296ms).
[10:44:28.234] <TB0> INFO: Test took 942ms.
[10:44:28.235] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:28.540] <TB0> INFO: Expecting 2560 events.
[10:44:29.394] <TB0> INFO: 2560 events read in total (298ms).
[10:44:29.395] <TB0> INFO: Test took 1160ms.
[10:44:29.397] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:29.700] <TB0> INFO: Expecting 2560 events.
[10:44:30.554] <TB0> INFO: 2560 events read in total (298ms).
[10:44:30.554] <TB0> INFO: Test took 1157ms.
[10:44:30.556] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:30.861] <TB0> INFO: Expecting 2560 events.
[10:44:31.714] <TB0> INFO: 2560 events read in total (297ms).
[10:44:31.714] <TB0> INFO: Test took 1158ms.
[10:44:31.716] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:32.020] <TB0> INFO: Expecting 2560 events.
[10:44:32.874] <TB0> INFO: 2560 events read in total (297ms).
[10:44:32.874] <TB0> INFO: Test took 1158ms.
[10:44:32.877] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:33.181] <TB0> INFO: Expecting 2560 events.
[10:44:34.038] <TB0> INFO: 2560 events read in total (301ms).
[10:44:34.039] <TB0> INFO: Test took 1162ms.
[10:44:34.041] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:34.344] <TB0> INFO: Expecting 2560 events.
[10:44:35.197] <TB0> INFO: 2560 events read in total (297ms).
[10:44:35.197] <TB0> INFO: Test took 1156ms.
[10:44:35.199] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:35.502] <TB0> INFO: Expecting 2560 events.
[10:44:36.355] <TB0> INFO: 2560 events read in total (297ms).
[10:44:36.356] <TB0> INFO: Test took 1157ms.
[10:44:36.358] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:36.661] <TB0> INFO: Expecting 2560 events.
[10:44:37.519] <TB0> INFO: 2560 events read in total (301ms).
[10:44:37.519] <TB0> INFO: Test took 1161ms.
[10:44:37.521] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:37.824] <TB0> INFO: Expecting 2560 events.
[10:44:38.682] <TB0> INFO: 2560 events read in total (302ms).
[10:44:38.682] <TB0> INFO: Test took 1161ms.
[10:44:38.684] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:38.987] <TB0> INFO: Expecting 2560 events.
[10:44:39.845] <TB0> INFO: 2560 events read in total (301ms).
[10:44:39.845] <TB0> INFO: Test took 1162ms.
[10:44:39.847] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:40.151] <TB0> INFO: Expecting 2560 events.
[10:44:41.004] <TB0> INFO: 2560 events read in total (297ms).
[10:44:41.004] <TB0> INFO: Test took 1157ms.
[10:44:41.006] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:41.310] <TB0> INFO: Expecting 2560 events.
[10:44:42.164] <TB0> INFO: 2560 events read in total (298ms).
[10:44:42.164] <TB0> INFO: Test took 1158ms.
[10:44:42.166] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:42.469] <TB0> INFO: Expecting 2560 events.
[10:44:43.323] <TB0> INFO: 2560 events read in total (297ms).
[10:44:43.323] <TB0> INFO: Test took 1157ms.
[10:44:43.324] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:43.629] <TB0> INFO: Expecting 2560 events.
[10:44:44.482] <TB0> INFO: 2560 events read in total (296ms).
[10:44:44.482] <TB0> INFO: Test took 1158ms.
[10:44:44.484] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:44.788] <TB0> INFO: Expecting 2560 events.
[10:44:45.643] <TB0> INFO: 2560 events read in total (299ms).
[10:44:45.643] <TB0> INFO: Test took 1159ms.
[10:44:45.645] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:45.950] <TB0> INFO: Expecting 2560 events.
[10:44:46.805] <TB0> INFO: 2560 events read in total (299ms).
[10:44:46.806] <TB0> INFO: Test took 1161ms.
[10:44:46.808] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:47.112] <TB0> INFO: Expecting 2560 events.
[10:44:47.971] <TB0> INFO: 2560 events read in total (303ms).
[10:44:47.972] <TB0> INFO: Test took 1164ms.
[10:44:47.973] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:48.278] <TB0> INFO: Expecting 2560 events.
[10:44:49.134] <TB0> INFO: 2560 events read in total (300ms).
[10:44:49.134] <TB0> INFO: Test took 1161ms.
[10:44:49.137] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:49.441] <TB0> INFO: Expecting 2560 events.
[10:44:50.295] <TB0> INFO: 2560 events read in total (298ms).
[10:44:50.295] <TB0> INFO: Test took 1158ms.
[10:44:50.297] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:50.601] <TB0> INFO: Expecting 2560 events.
[10:44:51.455] <TB0> INFO: 2560 events read in total (298ms).
[10:44:51.455] <TB0> INFO: Test took 1158ms.
[10:44:51.459] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:51.761] <TB0> INFO: Expecting 2560 events.
[10:44:52.614] <TB0> INFO: 2560 events read in total (297ms).
[10:44:52.614] <TB0> INFO: Test took 1156ms.
[10:44:52.616] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:52.920] <TB0> INFO: Expecting 2560 events.
[10:44:53.773] <TB0> INFO: 2560 events read in total (297ms).
[10:44:53.773] <TB0> INFO: Test took 1157ms.
[10:44:53.775] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:54.079] <TB0> INFO: Expecting 2560 events.
[10:44:54.931] <TB0> INFO: 2560 events read in total (296ms).
[10:44:54.932] <TB0> INFO: Test took 1157ms.
[10:44:54.933] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:55.237] <TB0> INFO: Expecting 2560 events.
[10:44:56.094] <TB0> INFO: 2560 events read in total (301ms).
[10:44:56.094] <TB0> INFO: Test took 1161ms.
[10:44:56.096] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:56.400] <TB0> INFO: Expecting 2560 events.
[10:44:57.253] <TB0> INFO: 2560 events read in total (297ms).
[10:44:57.253] <TB0> INFO: Test took 1157ms.
[10:44:57.255] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:57.559] <TB0> INFO: Expecting 2560 events.
[10:44:58.412] <TB0> INFO: 2560 events read in total (297ms).
[10:44:58.412] <TB0> INFO: Test took 1157ms.
[10:44:58.414] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:58.718] <TB0> INFO: Expecting 2560 events.
[10:44:59.571] <TB0> INFO: 2560 events read in total (297ms).
[10:44:59.572] <TB0> INFO: Test took 1158ms.
[10:44:59.574] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:59.877] <TB0> INFO: Expecting 2560 events.
[10:45:00.731] <TB0> INFO: 2560 events read in total (297ms).
[10:45:00.731] <TB0> INFO: Test took 1157ms.
[10:45:00.733] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:45:01.037] <TB0> INFO: Expecting 2560 events.
[10:45:01.890] <TB0> INFO: 2560 events read in total (297ms).
[10:45:01.890] <TB0> INFO: Test took 1157ms.
[10:45:01.893] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:45:02.196] <TB0> INFO: Expecting 2560 events.
[10:45:03.049] <TB0> INFO: 2560 events read in total (297ms).
[10:45:03.049] <TB0> INFO: Test took 1157ms.
[10:45:03.050] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:45:03.355] <TB0> INFO: Expecting 2560 events.
[10:45:04.208] <TB0> INFO: 2560 events read in total (297ms).
[10:45:04.209] <TB0> INFO: Test took 1159ms.
[10:45:04.685] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 612 seconds
[10:45:04.685] <TB0> INFO: PH scale (per ROC): 76 74 70 75 76 74 70 77 69 80 66 66 72 66 71 67
[10:45:04.685] <TB0> INFO: PH offset (per ROC): 170 187 191 180 203 185 181 175 187 195 197 185 176 203 184 193
[10:45:04.692] <TB0> INFO: Decoding statistics:
[10:45:04.692] <TB0> INFO: General information:
[10:45:04.692] <TB0> INFO: 16bit words read: 91928
[10:45:04.692] <TB0> INFO: valid events total: 10240
[10:45:04.692] <TB0> INFO: empty events: 7738
[10:45:04.692] <TB0> INFO: valid events with pixels: 2502
[10:45:04.692] <TB0> INFO: valid pixel hits: 2502
[10:45:04.692] <TB0> INFO: Event errors: 0
[10:45:04.692] <TB0> INFO: start marker: 0
[10:45:04.692] <TB0> INFO: stop marker: 0
[10:45:04.693] <TB0> INFO: overflow: 0
[10:45:04.693] <TB0> INFO: invalid 5bit words: 0
[10:45:04.693] <TB0> INFO: invalid XOR eye diagram: 0
[10:45:04.693] <TB0> INFO: frame (failed synchr.): 0
[10:45:04.693] <TB0> INFO: idle data (no TBM trl): 0
[10:45:04.693] <TB0> INFO: no data (only TBM hdr): 0
[10:45:04.693] <TB0> INFO: TBM errors: 0
[10:45:04.693] <TB0> INFO: flawed TBM headers: 0
[10:45:04.693] <TB0> INFO: flawed TBM trailers: 0
[10:45:04.693] <TB0> INFO: event ID mismatches: 0
[10:45:04.693] <TB0> INFO: ROC errors: 0
[10:45:04.693] <TB0> INFO: missing ROC header(s): 0
[10:45:04.693] <TB0> INFO: misplaced readback start: 0
[10:45:04.693] <TB0> INFO: Pixel decoding errors: 0
[10:45:04.693] <TB0> INFO: pixel data incomplete: 0
[10:45:04.693] <TB0> INFO: pixel address: 0
[10:45:04.693] <TB0> INFO: pulse height fill bit: 0
[10:45:04.693] <TB0> INFO: buffer corruption: 0
[10:45:04.863] <TB0> INFO: ######################################################################
[10:45:04.863] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:45:04.863] <TB0> INFO: ######################################################################
[10:45:04.872] <TB0> INFO: scanning low vcal = 10
[10:45:05.136] <TB0> INFO: Expecting 41600 events.
[10:45:08.689] <TB0> INFO: 41600 events read in total (2997ms).
[10:45:08.689] <TB0> INFO: Test took 3817ms.
[10:45:08.691] <TB0> INFO: scanning low vcal = 20
[10:45:08.994] <TB0> INFO: Expecting 41600 events.
[10:45:12.532] <TB0> INFO: 41600 events read in total (2982ms).
[10:45:12.533] <TB0> INFO: Test took 3842ms.
[10:45:12.534] <TB0> INFO: scanning low vcal = 30
[10:45:12.837] <TB0> INFO: Expecting 41600 events.
[10:45:16.383] <TB0> INFO: 41600 events read in total (2990ms).
[10:45:16.384] <TB0> INFO: Test took 3850ms.
[10:45:16.385] <TB0> INFO: scanning low vcal = 40
[10:45:16.683] <TB0> INFO: Expecting 41600 events.
[10:45:20.896] <TB0> INFO: 41600 events read in total (3657ms).
[10:45:20.896] <TB0> INFO: Test took 4511ms.
[10:45:20.899] <TB0> INFO: scanning low vcal = 50
[10:45:21.171] <TB0> INFO: Expecting 41600 events.
[10:45:25.395] <TB0> INFO: 41600 events read in total (3667ms).
[10:45:25.396] <TB0> INFO: Test took 4497ms.
[10:45:25.398] <TB0> INFO: scanning low vcal = 60
[10:45:25.670] <TB0> INFO: Expecting 41600 events.
[10:45:29.862] <TB0> INFO: 41600 events read in total (3636ms).
[10:45:29.862] <TB0> INFO: Test took 4464ms.
[10:45:29.864] <TB0> INFO: scanning low vcal = 70
[10:45:30.134] <TB0> INFO: Expecting 41600 events.
[10:45:34.322] <TB0> INFO: 41600 events read in total (3632ms).
[10:45:34.323] <TB0> INFO: Test took 4458ms.
[10:45:34.325] <TB0> INFO: scanning low vcal = 80
[10:45:34.587] <TB0> INFO: Expecting 41600 events.
[10:45:38.826] <TB0> INFO: 41600 events read in total (3683ms).
[10:45:38.826] <TB0> INFO: Test took 4501ms.
[10:45:38.829] <TB0> INFO: scanning low vcal = 90
[10:45:39.089] <TB0> INFO: Expecting 41600 events.
[10:45:43.313] <TB0> INFO: 41600 events read in total (3668ms).
[10:45:43.313] <TB0> INFO: Test took 4484ms.
[10:45:43.316] <TB0> INFO: scanning low vcal = 100
[10:45:43.609] <TB0> INFO: Expecting 41600 events.
[10:45:47.774] <TB0> INFO: 41600 events read in total (3609ms).
[10:45:47.775] <TB0> INFO: Test took 4459ms.
[10:45:47.777] <TB0> INFO: scanning low vcal = 110
[10:45:48.042] <TB0> INFO: Expecting 41600 events.
[10:45:52.223] <TB0> INFO: 41600 events read in total (3625ms).
[10:45:52.223] <TB0> INFO: Test took 4446ms.
[10:45:52.226] <TB0> INFO: scanning low vcal = 120
[10:45:52.486] <TB0> INFO: Expecting 41600 events.
[10:45:56.714] <TB0> INFO: 41600 events read in total (3672ms).
[10:45:56.715] <TB0> INFO: Test took 4489ms.
[10:45:56.717] <TB0> INFO: scanning low vcal = 130
[10:45:56.977] <TB0> INFO: Expecting 41600 events.
[10:46:01.143] <TB0> INFO: 41600 events read in total (3610ms).
[10:46:01.144] <TB0> INFO: Test took 4427ms.
[10:46:01.146] <TB0> INFO: scanning low vcal = 140
[10:46:01.411] <TB0> INFO: Expecting 41600 events.
[10:46:05.587] <TB0> INFO: 41600 events read in total (3620ms).
[10:46:05.587] <TB0> INFO: Test took 4441ms.
[10:46:05.590] <TB0> INFO: scanning low vcal = 150
[10:46:05.849] <TB0> INFO: Expecting 41600 events.
[10:46:10.043] <TB0> INFO: 41600 events read in total (3638ms).
[10:46:10.044] <TB0> INFO: Test took 4454ms.
[10:46:10.046] <TB0> INFO: scanning low vcal = 160
[10:46:10.313] <TB0> INFO: Expecting 41600 events.
[10:46:14.548] <TB0> INFO: 41600 events read in total (3679ms).
[10:46:14.549] <TB0> INFO: Test took 4503ms.
[10:46:14.551] <TB0> INFO: scanning low vcal = 170
[10:46:14.823] <TB0> INFO: Expecting 41600 events.
[10:46:19.002] <TB0> INFO: 41600 events read in total (3623ms).
[10:46:19.003] <TB0> INFO: Test took 4452ms.
[10:46:19.006] <TB0> INFO: scanning low vcal = 180
[10:46:19.277] <TB0> INFO: Expecting 41600 events.
[10:46:23.457] <TB0> INFO: 41600 events read in total (3624ms).
[10:46:23.458] <TB0> INFO: Test took 4451ms.
[10:46:23.461] <TB0> INFO: scanning low vcal = 190
[10:46:23.729] <TB0> INFO: Expecting 41600 events.
[10:46:27.902] <TB0> INFO: 41600 events read in total (3617ms).
[10:46:27.903] <TB0> INFO: Test took 4442ms.
[10:46:27.905] <TB0> INFO: scanning low vcal = 200
[10:46:28.170] <TB0> INFO: Expecting 41600 events.
[10:46:32.392] <TB0> INFO: 41600 events read in total (3666ms).
[10:46:32.393] <TB0> INFO: Test took 4488ms.
[10:46:32.396] <TB0> INFO: scanning low vcal = 210
[10:46:32.655] <TB0> INFO: Expecting 41600 events.
[10:46:36.834] <TB0> INFO: 41600 events read in total (3623ms).
[10:46:36.835] <TB0> INFO: Test took 4439ms.
[10:46:36.837] <TB0> INFO: scanning low vcal = 220
[10:46:37.125] <TB0> INFO: Expecting 41600 events.
[10:46:41.296] <TB0> INFO: 41600 events read in total (3615ms).
[10:46:41.296] <TB0> INFO: Test took 4459ms.
[10:46:41.299] <TB0> INFO: scanning low vcal = 230
[10:46:41.571] <TB0> INFO: Expecting 41600 events.
[10:46:45.810] <TB0> INFO: 41600 events read in total (3682ms).
[10:46:45.811] <TB0> INFO: Test took 4512ms.
[10:46:45.813] <TB0> INFO: scanning low vcal = 240
[10:46:46.086] <TB0> INFO: Expecting 41600 events.
[10:46:50.264] <TB0> INFO: 41600 events read in total (3622ms).
[10:46:50.265] <TB0> INFO: Test took 4451ms.
[10:46:50.267] <TB0> INFO: scanning low vcal = 250
[10:46:50.540] <TB0> INFO: Expecting 41600 events.
[10:46:54.717] <TB0> INFO: 41600 events read in total (3621ms).
[10:46:54.718] <TB0> INFO: Test took 4451ms.
[10:46:54.721] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[10:46:55.010] <TB0> INFO: Expecting 41600 events.
[10:46:59.191] <TB0> INFO: 41600 events read in total (3625ms).
[10:46:59.192] <TB0> INFO: Test took 4471ms.
[10:46:59.194] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[10:46:59.482] <TB0> INFO: Expecting 41600 events.
[10:47:03.709] <TB0> INFO: 41600 events read in total (3671ms).
[10:47:03.710] <TB0> INFO: Test took 4516ms.
[10:47:03.712] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[10:47:03.977] <TB0> INFO: Expecting 41600 events.
[10:47:08.182] <TB0> INFO: 41600 events read in total (3649ms).
[10:47:08.182] <TB0> INFO: Test took 4470ms.
[10:47:08.185] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[10:47:08.454] <TB0> INFO: Expecting 41600 events.
[10:47:12.633] <TB0> INFO: 41600 events read in total (3623ms).
[10:47:12.633] <TB0> INFO: Test took 4448ms.
[10:47:12.636] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[10:47:12.904] <TB0> INFO: Expecting 41600 events.
[10:47:17.112] <TB0> INFO: 41600 events read in total (3652ms).
[10:47:17.112] <TB0> INFO: Test took 4476ms.
[10:47:18.175] <TB0> INFO: PixTestGainPedestal::measure() done
[10:47:51.237] <TB0> INFO: PixTestGainPedestal::fit() done
[10:47:51.237] <TB0> INFO: non-linearity mean: 0.960 0.961 0.955 0.952 0.962 0.966 0.957 0.959 0.958 0.961 0.959 0.960 0.952 0.956 0.950 0.956
[10:47:51.237] <TB0> INFO: non-linearity RMS: 0.006 0.006 0.006 0.007 0.006 0.006 0.006 0.006 0.007 0.006 0.007 0.005 0.007 0.008 0.007 0.007
[10:47:51.237] <TB0> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[10:47:51.275] <TB0> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[10:47:51.311] <TB0> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[10:47:51.348] <TB0> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[10:47:51.384] <TB0> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[10:47:51.420] <TB0> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[10:47:51.463] <TB0> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[10:47:51.504] <TB0> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[10:47:51.543] <TB0> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[10:47:51.582] <TB0> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[10:47:51.618] <TB0> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[10:47:51.661] <TB0> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[10:47:51.703] <TB0> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[10:47:51.739] <TB0> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[10:47:51.779] <TB0> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[10:47:51.821] <TB0> INFO: write gain/ped parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[10:47:51.857] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 166 seconds
[10:47:51.857] <TB0> INFO: Decoding statistics:
[10:47:51.857] <TB0> INFO: General information:
[10:47:51.857] <TB0> INFO: 16bit words read: 2662400
[10:47:51.857] <TB0> INFO: valid events total: 166400
[10:47:51.857] <TB0> INFO: empty events: 0
[10:47:51.857] <TB0> INFO: valid events with pixels: 166400
[10:47:51.857] <TB0> INFO: valid pixel hits: 665600
[10:47:51.857] <TB0> INFO: Event errors: 0
[10:47:51.857] <TB0> INFO: start marker: 0
[10:47:51.857] <TB0> INFO: stop marker: 0
[10:47:51.857] <TB0> INFO: overflow: 0
[10:47:51.858] <TB0> INFO: invalid 5bit words: 0
[10:47:51.858] <TB0> INFO: invalid XOR eye diagram: 0
[10:47:51.858] <TB0> INFO: frame (failed synchr.): 0
[10:47:51.858] <TB0> INFO: idle data (no TBM trl): 0
[10:47:51.858] <TB0> INFO: no data (only TBM hdr): 0
[10:47:51.858] <TB0> INFO: TBM errors: 0
[10:47:51.858] <TB0> INFO: flawed TBM headers: 0
[10:47:51.858] <TB0> INFO: flawed TBM trailers: 0
[10:47:51.858] <TB0> INFO: event ID mismatches: 0
[10:47:51.858] <TB0> INFO: ROC errors: 0
[10:47:51.858] <TB0> INFO: missing ROC header(s): 0
[10:47:51.858] <TB0> INFO: misplaced readback start: 0
[10:47:51.858] <TB0> INFO: Pixel decoding errors: 0
[10:47:51.858] <TB0> INFO: pixel data incomplete: 0
[10:47:51.858] <TB0> INFO: pixel address: 0
[10:47:51.858] <TB0> INFO: pulse height fill bit: 0
[10:47:51.858] <TB0> INFO: buffer corruption: 0
[10:47:51.865] <TB0> INFO: readReadbackCal: /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C0.dat .. /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C15.dat
[10:47:51.903] <TB0> INFO: ######################################################################
[10:47:51.903] <TB0> INFO: PixTestReadback::doTest()
[10:47:51.903] <TB0> INFO: ######################################################################
[10:47:51.903] <TB0> INFO: ----------------------------------------------------------------------
[10:47:51.903] <TB0> INFO: PixTestReadback::CalibrateVd()
[10:47:51.903] <TB0> INFO: ----------------------------------------------------------------------
[10:48:01.381] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C0.dat
[10:48:01.386] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C1.dat
[10:48:01.391] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C2.dat
[10:48:01.396] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C3.dat
[10:48:01.401] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C4.dat
[10:48:01.406] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C5.dat
[10:48:01.411] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C6.dat
[10:48:01.416] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C7.dat
[10:48:01.422] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C8.dat
[10:48:01.430] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C9.dat
[10:48:01.435] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C10.dat
[10:48:01.440] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C11.dat
[10:48:01.445] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C12.dat
[10:48:01.450] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C13.dat
[10:48:01.455] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C14.dat
[10:48:01.460] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C15.dat
[10:48:01.494] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:48:01.494] <TB0> INFO: ----------------------------------------------------------------------
[10:48:01.494] <TB0> INFO: PixTestReadback::CalibrateVa()
[10:48:01.494] <TB0> INFO: ----------------------------------------------------------------------
[10:48:11.031] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C0.dat
[10:48:11.036] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C1.dat
[10:48:11.041] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C2.dat
[10:48:11.046] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C3.dat
[10:48:11.052] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C4.dat
[10:48:11.058] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C5.dat
[10:48:11.064] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C6.dat
[10:48:11.072] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C7.dat
[10:48:11.077] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C8.dat
[10:48:11.082] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C9.dat
[10:48:11.087] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C10.dat
[10:48:11.092] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C11.dat
[10:48:11.096] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C12.dat
[10:48:11.101] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C13.dat
[10:48:11.107] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C14.dat
[10:48:11.111] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C15.dat
[10:48:11.143] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:48:11.143] <TB0> INFO: ----------------------------------------------------------------------
[10:48:11.143] <TB0> INFO: PixTestReadback::readbackVbg()
[10:48:11.143] <TB0> INFO: ----------------------------------------------------------------------
[10:48:18.440] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:48:18.441] <TB0> INFO: ----------------------------------------------------------------------
[10:48:18.441] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[10:48:18.441] <TB0> INFO: ----------------------------------------------------------------------
[10:48:18.441] <TB0> INFO: Vbg will be calibrated using Vd calibration
[10:48:18.441] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 159calibrated Vbg = 1.22667 :::*/*/*/*/
[10:48:18.441] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 154.1calibrated Vbg = 1.22321 :::*/*/*/*/
[10:48:18.441] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 157.6calibrated Vbg = 1.2285 :::*/*/*/*/
[10:48:18.441] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 154.2calibrated Vbg = 1.23052 :::*/*/*/*/
[10:48:18.441] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 159.4calibrated Vbg = 1.23525 :::*/*/*/*/
[10:48:18.441] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 155.7calibrated Vbg = 1.24433 :::*/*/*/*/
[10:48:18.441] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 160.1calibrated Vbg = 1.24065 :::*/*/*/*/
[10:48:18.441] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 152.6calibrated Vbg = 1.23729 :::*/*/*/*/
[10:48:18.441] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 147.9calibrated Vbg = 1.23893 :::*/*/*/*/
[10:48:18.441] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 154.9calibrated Vbg = 1.23744 :::*/*/*/*/
[10:48:18.441] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 152.6calibrated Vbg = 1.23374 :::*/*/*/*/
[10:48:18.441] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 152.3calibrated Vbg = 1.2322 :::*/*/*/*/
[10:48:18.441] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 155.9calibrated Vbg = 1.22351 :::*/*/*/*/
[10:48:18.441] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 153.2calibrated Vbg = 1.22532 :::*/*/*/*/
[10:48:18.441] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 150.2calibrated Vbg = 1.22771 :::*/*/*/*/
[10:48:18.441] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 147.9calibrated Vbg = 1.2229 :::*/*/*/*/
[10:48:18.443] <TB0> INFO: ----------------------------------------------------------------------
[10:48:18.443] <TB0> INFO: PixTestReadback::CalibrateIa()
[10:48:18.443] <TB0> INFO: ----------------------------------------------------------------------
[10:50:53.597] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C0.dat
[10:50:53.605] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C1.dat
[10:50:53.614] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C2.dat
[10:50:53.623] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C3.dat
[10:50:53.631] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C4.dat
[10:50:53.640] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C5.dat
[10:50:53.649] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C6.dat
[10:50:53.655] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C7.dat
[10:50:53.664] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C8.dat
[10:50:53.670] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C9.dat
[10:50:53.680] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C10.dat
[10:50:53.690] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C11.dat
[10:50:53.699] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C12.dat
[10:50:53.709] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C13.dat
[10:50:53.715] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C14.dat
[10:50:53.724] <TB0> INFO: write readback calibration parameters into /home/Reception/FullQualification/M2184_FullQualification_2016-03-23_08h24m_1458717876//002_FulltestPxar_p17//readbackCal_C15.dat
[10:50:53.753] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:50:53.754] <TB0> INFO: PixTestReadback::doTest() done
[10:50:53.754] <TB0> INFO: Decoding statistics:
[10:50:53.754] <TB0> INFO: General information:
[10:50:53.754] <TB0> INFO: 16bit words read: 1024
[10:50:53.754] <TB0> INFO: valid events total: 128
[10:50:53.754] <TB0> INFO: empty events: 128
[10:50:53.754] <TB0> INFO: valid events with pixels: 0
[10:50:53.754] <TB0> INFO: valid pixel hits: 0
[10:50:53.754] <TB0> INFO: Event errors: 0
[10:50:53.754] <TB0> INFO: start marker: 0
[10:50:53.754] <TB0> INFO: stop marker: 0
[10:50:53.754] <TB0> INFO: overflow: 0
[10:50:53.754] <TB0> INFO: invalid 5bit words: 0
[10:50:53.754] <TB0> INFO: invalid XOR eye diagram: 0
[10:50:53.754] <TB0> INFO: frame (failed synchr.): 0
[10:50:53.754] <TB0> INFO: idle data (no TBM trl): 0
[10:50:53.754] <TB0> INFO: no data (only TBM hdr): 0
[10:50:53.754] <TB0> INFO: TBM errors: 0
[10:50:53.754] <TB0> INFO: flawed TBM headers: 0
[10:50:53.754] <TB0> INFO: flawed TBM trailers: 0
[10:50:53.754] <TB0> INFO: event ID mismatches: 0
[10:50:53.754] <TB0> INFO: ROC errors: 0
[10:50:53.754] <TB0> INFO: missing ROC header(s): 0
[10:50:53.754] <TB0> INFO: misplaced readback start: 0
[10:50:53.754] <TB0> INFO: Pixel decoding errors: 0
[10:50:53.754] <TB0> INFO: pixel data incomplete: 0
[10:50:53.754] <TB0> INFO: pixel address: 0
[10:50:53.754] <TB0> INFO: pulse height fill bit: 0
[10:50:53.754] <TB0> INFO: buffer corruption: 0
[10:50:53.774] <TB0> INFO: Decoding statistics:
[10:50:53.774] <TB0> INFO: General information:
[10:50:53.774] <TB0> INFO: 16bit words read: 2755352
[10:50:53.774] <TB0> INFO: valid events total: 176768
[10:50:53.774] <TB0> INFO: empty events: 7866
[10:50:53.774] <TB0> INFO: valid events with pixels: 168902
[10:50:53.774] <TB0> INFO: valid pixel hits: 668102
[10:50:53.774] <TB0> INFO: Event errors: 0
[10:50:53.774] <TB0> INFO: start marker: 0
[10:50:53.774] <TB0> INFO: stop marker: 0
[10:50:53.774] <TB0> INFO: overflow: 0
[10:50:53.774] <TB0> INFO: invalid 5bit words: 0
[10:50:53.774] <TB0> INFO: invalid XOR eye diagram: 0
[10:50:53.774] <TB0> INFO: frame (failed synchr.): 0
[10:50:53.774] <TB0> INFO: idle data (no TBM trl): 0
[10:50:53.774] <TB0> INFO: no data (only TBM hdr): 0
[10:50:53.774] <TB0> INFO: TBM errors: 0
[10:50:53.774] <TB0> INFO: flawed TBM headers: 0
[10:50:53.774] <TB0> INFO: flawed TBM trailers: 0
[10:50:53.774] <TB0> INFO: event ID mismatches: 0
[10:50:53.774] <TB0> INFO: ROC errors: 0
[10:50:53.774] <TB0> INFO: missing ROC header(s): 0
[10:50:53.774] <TB0> INFO: misplaced readback start: 0
[10:50:53.774] <TB0> INFO: Pixel decoding errors: 0
[10:50:53.774] <TB0> INFO: pixel data incomplete: 0
[10:50:53.774] <TB0> INFO: pixel address: 0
[10:50:53.774] <TB0> INFO: pulse height fill bit: 0
[10:50:53.774] <TB0> INFO: buffer corruption: 0
[10:50:53.774] <TB0> INFO: enter test to run
[10:50:53.774] <TB0> INFO: test: exit no parameter change
[10:50:53.822] <TB0> QUIET: Connection to board 71 closed.
[10:50:53.901] <TB0> INFO: pXar: this is the end, my friend