[15:11:05.832] <TB3> INFO: *** Welcome to pxar ***
[15:11:05.832] <TB3> INFO: *** Today: 2015/09/02
[15:11:05.832] <TB3> INFO: readRocDacs: /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C15.dat
[15:11:05.833] <TB3> INFO: readTbmDacs: /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//tbmParameters_C0b.dat
[15:11:05.834] <TB3> INFO: readMaskFile: /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//defaultMaskFile.dat
[15:11:05.834] <TB3> INFO: readTrimFile: /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters_C15.dat
[15:11:05.907] <TB3> INFO: clk: 4
[15:11:05.907] <TB3> INFO: ctr: 4
[15:11:05.907] <TB3> INFO: sda: 19
[15:11:05.907] <TB3> INFO: tin: 9
[15:11:05.907] <TB3> INFO: level: 15
[15:11:05.907] <TB3> INFO: triggerdelay: 0
[15:11:05.907] <TB3> QUIET: Instanciating API for pxar prod-10
[15:11:05.907] <TB3> INFO: Log level: INFO
[15:11:05.914] <TB3> INFO: Found DTB DTB_WZ4I6J
[15:11:05.927] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[15:11:05.930] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[15:11:05.933] <TB3> INFO: RPC call hashes of host and DTB match: 397073690
[15:11:07.462] <TB3> INFO: DUT info:
[15:11:07.462] <TB3> INFO: The DUT currently contains the following objects:
[15:11:07.462] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:11:07.462] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:11:07.462] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:11:07.462] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[15:11:07.462] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[15:11:07.462] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[15:11:07.462] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[15:11:07.462] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[15:11:07.462] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[15:11:07.462] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[15:11:07.462] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[15:11:07.462] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[15:11:07.462] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[15:11:07.462] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[15:11:07.462] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[15:11:07.462] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[15:11:07.462] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[15:11:07.462] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[15:11:07.463] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[15:11:07.463] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[15:11:07.864] <TB3> INFO: enter 'restricted' command line mode
[15:11:07.864] <TB3> INFO: enter test to run
[15:11:07.864] <TB3> INFO: test: pretest no parameter change
[15:11:07.864] <TB3> INFO: running: pretest
[15:11:07.871] <TB3> INFO: ######################################################################
[15:11:07.871] <TB3> INFO: PixTestPretest::doTest()
[15:11:07.871] <TB3> INFO: ######################################################################
[15:11:07.873] <TB3> INFO: ----------------------------------------------------------------------
[15:11:07.873] <TB3> INFO: PixTestPretest::programROC()
[15:11:07.873] <TB3> INFO: ----------------------------------------------------------------------
[15:11:25.891] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[15:11:25.891] <TB3> INFO: IA differences per ROC: 18.5 17.7 17.7 19.3 19.3 17.7 20.1 16.9 17.7 18.5 18.5 18.5 18.5 19.3 19.3 17.7
[15:11:25.965] <TB3> INFO: ----------------------------------------------------------------------
[15:11:25.965] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[15:11:25.965] <TB3> INFO: ----------------------------------------------------------------------
[15:11:31.250] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 387.5 mA = 24.2188 mA/ROC
[15:11:31.253] <TB3> INFO: ----------------------------------------------------------------------
[15:11:31.253] <TB3> INFO: PixTestPretest::findWorkingPixel()
[15:11:31.253] <TB3> INFO: ----------------------------------------------------------------------
[15:11:31.391] <TB3> INFO: Expecting 231680 events.
[15:11:40.661] <TB3> INFO: 231680 events read in total (8551ms).
[15:11:40.727] <TB3> INFO: Test took 9469ms.
[15:11:40.975] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[15:11:41.008] <TB3> INFO: ----------------------------------------------------------------------
[15:11:41.008] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[15:11:41.008] <TB3> INFO: ----------------------------------------------------------------------
[15:11:41.143] <TB3> INFO: Expecting 231680 events.
[15:11:50.402] <TB3> INFO: 231680 events read in total (8542ms).
[15:11:50.407] <TB3> INFO: Test took 9395ms.
[15:11:50.744] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[15:11:50.744] <TB3> INFO: CalDel: 140 131 131 126 147 142 143 153 137 142 145 162 146 127 168 133
[15:11:50.744] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[15:11:50.747] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C0.dat
[15:11:50.748] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C1.dat
[15:11:50.748] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C2.dat
[15:11:50.748] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C3.dat
[15:11:50.748] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C4.dat
[15:11:50.748] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C5.dat
[15:11:50.749] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C6.dat
[15:11:50.749] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C7.dat
[15:11:50.750] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C8.dat
[15:11:50.750] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C9.dat
[15:11:50.750] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C10.dat
[15:11:50.750] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C11.dat
[15:11:50.751] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C12.dat
[15:11:50.751] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C13.dat
[15:11:50.751] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C14.dat
[15:11:50.752] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C15.dat
[15:11:50.752] <TB3> INFO: write tbm parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//tbmParameters_C0a.dat
[15:11:50.752] <TB3> INFO: write tbm parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//tbmParameters_C0b.dat
[15:11:50.752] <TB3> INFO: PixTestPretest::doTest() done, duration: 42 seconds
[15:11:50.846] <TB3> INFO: enter test to run
[15:11:50.846] <TB3> INFO: test: fulltest no parameter change
[15:11:50.846] <TB3> INFO: running: fulltest
[15:11:50.846] <TB3> INFO: ######################################################################
[15:11:50.846] <TB3> INFO: PixTestFullTest::doTest()
[15:11:50.846] <TB3> INFO: ######################################################################
[15:11:50.848] <TB3> INFO: ######################################################################
[15:11:50.848] <TB3> INFO: PixTestAlive::doTest()
[15:11:50.848] <TB3> INFO: ######################################################################
[15:11:50.850] <TB3> INFO: ----------------------------------------------------------------------
[15:11:50.850] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:11:50.850] <TB3> INFO: ----------------------------------------------------------------------
[15:11:51.179] <TB3> INFO: Expecting 41600 events.
[15:11:55.580] <TB3> INFO: 41600 events read in total (3685ms).
[15:11:55.580] <TB3> INFO: Test took 4729ms.
[15:11:55.588] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:55.878] <TB3> INFO: PixTestAlive::aliveTest() done
[15:11:55.878] <TB3> INFO: number of dead pixels (per ROC): 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2
[15:11:55.880] <TB3> INFO: ----------------------------------------------------------------------
[15:11:55.880] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:11:55.880] <TB3> INFO: ----------------------------------------------------------------------
[15:11:56.196] <TB3> INFO: Expecting 41600 events.
[15:11:59.358] <TB3> INFO: 41600 events read in total (2446ms).
[15:11:59.358] <TB3> INFO: Test took 3477ms.
[15:11:59.358] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:59.359] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[15:11:59.677] <TB3> INFO: PixTestAlive::maskTest() done
[15:11:59.677] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:11:59.680] <TB3> INFO: ----------------------------------------------------------------------
[15:11:59.680] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:11:59.680] <TB3> INFO: ----------------------------------------------------------------------
[15:12:00.006] <TB3> INFO: Expecting 41600 events.
[15:12:04.417] <TB3> INFO: 41600 events read in total (3695ms).
[15:12:04.418] <TB3> INFO: Test took 4736ms.
[15:12:04.424] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:04.719] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[15:12:04.719] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:12:04.719] <TB3> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[15:12:04.729] <TB3> INFO: ######################################################################
[15:12:04.729] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[15:12:04.729] <TB3> INFO: ######################################################################
[15:12:04.733] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[15:12:04.744] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[15:12:04.744] <TB3> INFO: run 1 of 1
[15:12:05.052] <TB3> INFO: Expecting 3120000 events.
[15:12:41.161] <TB3> INFO: 857595 events read in total (35393ms).
[15:13:15.970] <TB3> INFO: 1701570 events read in total (70202ms).
[15:13:51.394] <TB3> INFO: 2559450 events read in total (105627ms).
[15:14:12.755] <TB3> INFO: 3120000 events read in total (126987ms).
[15:14:12.802] <TB3> INFO: Test took 128058ms.
[15:14:12.898] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:38.145] <TB3> INFO: PixTestBBMap::doTest() done, duration: 153 seconds
[15:14:38.145] <TB3> INFO: number of dead bumps (per ROC): 35 0 0 0 1 0 0 0 1 0 0 0 0 0 0 4
[15:14:38.145] <TB3> INFO: separation cut (per ROC): 68 89 88 89 91 78 86 78 88 93 84 94 88 81 82 87
[15:14:38.225] <TB3> INFO: ######################################################################
[15:14:38.225] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[15:14:38.225] <TB3> INFO: ######################################################################
[15:14:38.226] <TB3> INFO: ----------------------------------------------------------------------
[15:14:38.226] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[15:14:38.226] <TB3> INFO: ----------------------------------------------------------------------
[15:14:38.226] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[15:14:38.235] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[15:14:38.235] <TB3> INFO: run 1 of 1
[15:14:38.558] <TB3> INFO: Expecting 31200000 events.
[15:15:03.715] <TB3> INFO: 971600 events read in total (24441ms).
[15:15:28.256] <TB3> INFO: 1926250 events read in total (48982ms).
[15:15:52.425] <TB3> INFO: 2877550 events read in total (73151ms).
[15:16:16.794] <TB3> INFO: 3829200 events read in total (97520ms).
[15:16:41.130] <TB3> INFO: 4776000 events read in total (121856ms).
[15:17:05.261] <TB3> INFO: 5722150 events read in total (145987ms).
[15:17:29.687] <TB3> INFO: 6671250 events read in total (170413ms).
[15:17:54.157] <TB3> INFO: 7617250 events read in total (194883ms).
[15:18:18.501] <TB3> INFO: 8563550 events read in total (219227ms).
[15:18:42.811] <TB3> INFO: 9508050 events read in total (243537ms).
[15:19:07.156] <TB3> INFO: 10452800 events read in total (267882ms).
[15:19:31.401] <TB3> INFO: 11397700 events read in total (292127ms).
[15:19:55.622] <TB3> INFO: 12337900 events read in total (316348ms).
[15:20:19.937] <TB3> INFO: 13281550 events read in total (340663ms).
[15:20:44.035] <TB3> INFO: 14222600 events read in total (364761ms).
[15:21:08.446] <TB3> INFO: 15163050 events read in total (389172ms).
[15:21:32.736] <TB3> INFO: 16094150 events read in total (413462ms).
[15:21:57.109] <TB3> INFO: 17025700 events read in total (437835ms).
[15:22:21.136] <TB3> INFO: 17954400 events read in total (461862ms).
[15:22:45.362] <TB3> INFO: 18883250 events read in total (486088ms).
[15:23:09.618] <TB3> INFO: 19811100 events read in total (510344ms).
[15:23:33.812] <TB3> INFO: 20737450 events read in total (534538ms).
[15:23:58.103] <TB3> INFO: 21665800 events read in total (558829ms).
[15:24:22.140] <TB3> INFO: 22589850 events read in total (582866ms).
[15:24:46.336] <TB3> INFO: 23515900 events read in total (607062ms).
[15:25:10.741] <TB3> INFO: 24440300 events read in total (631467ms).
[15:25:34.977] <TB3> INFO: 25366350 events read in total (655703ms).
[15:25:59.173] <TB3> INFO: 26287650 events read in total (679899ms).
[15:26:23.430] <TB3> INFO: 27212650 events read in total (704156ms).
[15:26:47.529] <TB3> INFO: 28138200 events read in total (728255ms).
[15:27:11.526] <TB3> INFO: 29064850 events read in total (752252ms).
[15:27:35.813] <TB3> INFO: 29991400 events read in total (776539ms).
[15:28:00.005] <TB3> INFO: 30927850 events read in total (800731ms).
[15:28:07.119] <TB3> INFO: 31200000 events read in total (807845ms).
[15:28:07.147] <TB3> INFO: Test took 808912ms.
[15:28:07.230] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:07.334] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:09.034] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:10.695] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:12.213] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:13.710] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:15.219] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:16.727] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:18.196] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:19.676] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:21.244] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:22.885] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:24.291] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:25.648] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:27.078] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:28.540] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:29.920] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:28:31.277] <TB3> INFO: PixTestScurves::scurves() done
[15:28:31.277] <TB3> INFO: Vcal mean: 88.65 88.64 86.44 86.59 98.35 88.77 88.81 84.09 97.50 95.50 90.85 99.53 94.56 80.02 88.91 103.83
[15:28:31.277] <TB3> INFO: Vcal RMS: 6.11 5.82 4.67 5.12 5.79 4.98 4.93 4.87 5.46 5.65 5.02 6.03 5.26 4.61 5.06 5.44
[15:28:31.277] <TB3> INFO: PixTestScurves::fullTest() done, duration: 833 seconds
[15:28:31.349] <TB3> INFO: ######################################################################
[15:28:31.349] <TB3> INFO: PixTestTrim::doTest()
[15:28:31.349] <TB3> INFO: ######################################################################
[15:28:31.350] <TB3> INFO: ----------------------------------------------------------------------
[15:28:31.350] <TB3> INFO: PixTestTrim::trimTest() ntrig = 20, vcal = 35
[15:28:31.350] <TB3> INFO: ----------------------------------------------------------------------
[15:28:31.428] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[15:28:31.428] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[15:28:31.437] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[15:28:31.437] <TB3> INFO: run 1 of 1
[15:28:31.741] <TB3> INFO: Expecting 13312000 events.
[15:29:00.520] <TB3> INFO: 1101120 events read in total (28063ms).
[15:29:26.058] <TB3> INFO: 2198100 events read in total (53601ms).
[15:29:53.405] <TB3> INFO: 3293700 events read in total (80948ms).
[15:30:20.378] <TB3> INFO: 4384260 events read in total (107921ms).
[15:30:48.329] <TB3> INFO: 5471260 events read in total (135872ms).
[15:31:16.182] <TB3> INFO: 6555840 events read in total (163725ms).
[15:31:44.268] <TB3> INFO: 7646940 events read in total (191811ms).
[15:32:12.321] <TB3> INFO: 8739920 events read in total (219864ms).
[15:32:40.529] <TB3> INFO: 9834080 events read in total (248072ms).
[15:33:08.380] <TB3> INFO: 10930020 events read in total (275923ms).
[15:33:36.464] <TB3> INFO: 12025180 events read in total (304007ms).
[15:34:04.494] <TB3> INFO: 13123460 events read in total (332037ms).
[15:34:09.623] <TB3> INFO: 13312000 events read in total (337166ms).
[15:34:09.655] <TB3> INFO: Test took 338218ms.
[15:34:09.708] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:34:28.966] <TB3> INFO: ROC 0 VthrComp = 89
[15:34:28.966] <TB3> INFO: ROC 1 VthrComp = 92
[15:34:28.966] <TB3> INFO: ROC 2 VthrComp = 90
[15:34:28.967] <TB3> INFO: ROC 3 VthrComp = 94
[15:34:28.967] <TB3> INFO: ROC 4 VthrComp = 98
[15:34:28.967] <TB3> INFO: ROC 5 VthrComp = 89
[15:34:28.967] <TB3> INFO: ROC 6 VthrComp = 94
[15:34:28.967] <TB3> INFO: ROC 7 VthrComp = 86
[15:34:28.967] <TB3> INFO: ROC 8 VthrComp = 97
[15:34:28.967] <TB3> INFO: ROC 9 VthrComp = 97
[15:34:28.967] <TB3> INFO: ROC 10 VthrComp = 92
[15:34:28.968] <TB3> INFO: ROC 11 VthrComp = 96
[15:34:28.968] <TB3> INFO: ROC 12 VthrComp = 93
[15:34:28.968] <TB3> INFO: ROC 13 VthrComp = 85
[15:34:28.968] <TB3> INFO: ROC 14 VthrComp = 89
[15:34:28.968] <TB3> INFO: ROC 15 VthrComp = 104
[15:34:28.968] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[15:34:28.968] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[15:34:28.978] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[15:34:28.978] <TB3> INFO: run 1 of 1
[15:34:29.287] <TB3> INFO: Expecting 13312000 events.
[15:34:55.015] <TB3> INFO: 781960 events read in total (25011ms).
[15:35:17.862] <TB3> INFO: 1559920 events read in total (47858ms).
[15:35:40.883] <TB3> INFO: 2337060 events read in total (70879ms).
[15:36:03.585] <TB3> INFO: 3114660 events read in total (93581ms).
[15:36:26.435] <TB3> INFO: 3891980 events read in total (116431ms).
[15:36:51.073] <TB3> INFO: 4669680 events read in total (141069ms).
[15:37:15.839] <TB3> INFO: 5446780 events read in total (165835ms).
[15:37:40.605] <TB3> INFO: 6224820 events read in total (190601ms).
[15:38:05.583] <TB3> INFO: 6998960 events read in total (215579ms).
[15:38:30.612] <TB3> INFO: 7770300 events read in total (240608ms).
[15:38:55.672] <TB3> INFO: 8539180 events read in total (265668ms).
[15:39:20.750] <TB3> INFO: 9307840 events read in total (290746ms).
[15:39:45.409] <TB3> INFO: 10074720 events read in total (315405ms).
[15:40:10.631] <TB3> INFO: 10841300 events read in total (340627ms).
[15:40:35.416] <TB3> INFO: 11606360 events read in total (365412ms).
[15:41:00.133] <TB3> INFO: 12373340 events read in total (390129ms).
[15:41:24.926] <TB3> INFO: 13140780 events read in total (414922ms).
[15:41:30.836] <TB3> INFO: 13312000 events read in total (420832ms).
[15:41:30.877] <TB3> INFO: Test took 421899ms.
[15:41:31.013] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:41:55.682] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 60.2199 for pixel 21/6 mean/min/max = 46.8761/33.317/60.4351
[15:41:55.682] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 59.8251 for pixel 10/51 mean/min/max = 46.274/32.4462/60.1019
[15:41:55.683] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 56.5307 for pixel 6/17 mean/min/max = 45.2095/33.8623/56.5568
[15:41:55.683] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 56.4915 for pixel 0/0 mean/min/max = 44.9192/33.1466/56.6918
[15:41:55.683] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 60.2253 for pixel 21/66 mean/min/max = 46.2167/32.1043/60.3292
[15:41:55.684] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 59.0248 for pixel 22/3 mean/min/max = 46.5394/34.0457/59.0331
[15:41:55.684] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 56.1378 for pixel 14/70 mean/min/max = 44.5233/32.6416/56.405
[15:41:55.684] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 57.2975 for pixel 34/1 mean/min/max = 44.7579/32.1729/57.3429
[15:41:55.685] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 59.341 for pixel 24/78 mean/min/max = 45.8331/32.0292/59.637
[15:41:55.685] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 59.4883 for pixel 0/26 mean/min/max = 45.8182/32.0388/59.5975
[15:41:55.686] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 58.5577 for pixel 13/63 mean/min/max = 46.4225/34.1718/58.6732
[15:41:55.686] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 62.8921 for pixel 11/17 mean/min/max = 47.5956/32.1144/63.0768
[15:41:55.686] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 60.5179 for pixel 21/1 mean/min/max = 46.9571/33.3889/60.5252
[15:41:55.687] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 57.0465 for pixel 3/78 mean/min/max = 44.4303/31.6123/57.2482
[15:41:55.687] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 58.6525 for pixel 7/72 mean/min/max = 46.5098/34.2399/58.7796
[15:41:55.687] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 59.0763 for pixel 1/12 mean/min/max = 46.7291/34.3797/59.0784
[15:41:55.688] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:55.819] <TB3> INFO: Expecting 1029120 events.
[15:42:20.005] <TB3> INFO: 1029120 events read in total (23467ms).
[15:42:20.011] <TB3> INFO: Expecting 1029120 events.
[15:42:43.724] <TB3> INFO: 1029120 events read in total (23181ms).
[15:42:43.732] <TB3> INFO: Expecting 1029120 events.
[15:43:07.639] <TB3> INFO: 1029120 events read in total (23372ms).
[15:43:07.651] <TB3> INFO: Expecting 1029120 events.
[15:43:31.466] <TB3> INFO: 1029120 events read in total (23287ms).
[15:43:31.479] <TB3> INFO: Expecting 1029120 events.
[15:43:53.289] <TB3> INFO: 1029120 events read in total (21282ms).
[15:43:53.305] <TB3> INFO: Expecting 1029120 events.
[15:44:16.529] <TB3> INFO: 1029120 events read in total (22697ms).
[15:44:16.545] <TB3> INFO: Expecting 1029120 events.
[15:44:38.612] <TB3> INFO: 1029120 events read in total (21537ms).
[15:44:38.630] <TB3> INFO: Expecting 1029120 events.
[15:45:01.980] <TB3> INFO: 1029120 events read in total (22816ms).
[15:45:02.002] <TB3> INFO: Expecting 1029120 events.
[15:45:25.824] <TB3> INFO: 1029120 events read in total (23295ms).
[15:45:25.846] <TB3> INFO: Expecting 1029120 events.
[15:45:49.443] <TB3> INFO: 1029120 events read in total (23070ms).
[15:45:49.470] <TB3> INFO: Expecting 1029120 events.
[15:46:13.176] <TB3> INFO: 1029120 events read in total (23178ms).
[15:46:13.202] <TB3> INFO: Expecting 1029120 events.
[15:46:36.920] <TB3> INFO: 1029120 events read in total (23191ms).
[15:46:36.952] <TB3> INFO: Expecting 1029120 events.
[15:47:01.021] <TB3> INFO: 1029120 events read in total (23541ms).
[15:47:01.063] <TB3> INFO: Expecting 1029120 events.
[15:47:25.108] <TB3> INFO: 1029120 events read in total (23518ms).
[15:47:25.141] <TB3> INFO: Expecting 1029120 events.
[15:47:48.940] <TB3> INFO: 1029120 events read in total (23271ms).
[15:47:48.977] <TB3> INFO: Expecting 1029120 events.
[15:48:13.031] <TB3> INFO: 1029120 events read in total (23527ms).
[15:48:13.072] <TB3> INFO: Test took 377384ms.
[15:48:14.147] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 20 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[15:48:14.157] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[15:48:14.157] <TB3> INFO: run 1 of 1
[15:48:14.491] <TB3> INFO: Expecting 16640000 events.
[15:48:39.703] <TB3> INFO: 725400 events read in total (24496ms).
[15:49:03.893] <TB3> INFO: 1447640 events read in total (48686ms).
[15:49:28.360] <TB3> INFO: 2169600 events read in total (73153ms).
[15:49:52.907] <TB3> INFO: 2891500 events read in total (97700ms).
[15:50:17.459] <TB3> INFO: 3614000 events read in total (122252ms).
[15:50:42.175] <TB3> INFO: 4336080 events read in total (146968ms).
[15:51:06.847] <TB3> INFO: 5058340 events read in total (171640ms).
[15:51:31.464] <TB3> INFO: 5781340 events read in total (196257ms).
[15:51:56.088] <TB3> INFO: 6503700 events read in total (220881ms).
[15:52:20.474] <TB3> INFO: 7225980 events read in total (245267ms).
[15:52:44.815] <TB3> INFO: 7948760 events read in total (269608ms).
[15:53:09.035] <TB3> INFO: 8668840 events read in total (293828ms).
[15:53:33.307] <TB3> INFO: 9386420 events read in total (318100ms).
[15:53:57.670] <TB3> INFO: 10102960 events read in total (342463ms).
[15:54:22.076] <TB3> INFO: 10818500 events read in total (366869ms).
[15:54:46.393] <TB3> INFO: 11534140 events read in total (391186ms).
[15:55:10.738] <TB3> INFO: 12249000 events read in total (415531ms).
[15:55:34.965] <TB3> INFO: 12962600 events read in total (439758ms).
[15:55:59.422] <TB3> INFO: 13675760 events read in total (464215ms).
[15:56:23.698] <TB3> INFO: 14388700 events read in total (488491ms).
[15:56:48.124] <TB3> INFO: 15102860 events read in total (512917ms).
[15:57:12.515] <TB3> INFO: 15816740 events read in total (537308ms).
[15:57:36.619] <TB3> INFO: 16531400 events read in total (561412ms).
[15:57:40.751] <TB3> INFO: 16640000 events read in total (565544ms).
[15:57:40.810] <TB3> INFO: Test took 566653ms.
[15:57:41.019] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:58:06.967] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.026752 .. 63.899887
[15:58:07.047] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 0 .. 73 (-1/-1) hits flags = 16 (plus default)
[15:58:07.056] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[15:58:07.056] <TB3> INFO: run 1 of 1
[15:58:07.371] <TB3> INFO: Expecting 6156800 events.
[15:58:33.914] <TB3> INFO: 868900 events read in total (25825ms).
[15:58:59.854] <TB3> INFO: 1739560 events read in total (51765ms).
[15:59:25.877] <TB3> INFO: 2609880 events read in total (77788ms).
[15:59:52.042] <TB3> INFO: 3481680 events read in total (103953ms).
[16:00:17.775] <TB3> INFO: 4348200 events read in total (129686ms).
[16:00:43.259] <TB3> INFO: 5210980 events read in total (155170ms).
[16:01:09.148] <TB3> INFO: 6073940 events read in total (181059ms).
[16:01:12.049] <TB3> INFO: 6156800 events read in total (183960ms).
[16:01:12.069] <TB3> INFO: Test took 185013ms.
[16:01:12.124] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:01:29.540] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 16.348435 .. 47.210190
[16:01:29.634] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 6 .. 57 (-1/-1) hits flags = 16 (plus default)
[16:01:29.643] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[16:01:29.643] <TB3> INFO: run 1 of 1
[16:01:29.957] <TB3> INFO: Expecting 4326400 events.
[16:01:57.109] <TB3> INFO: 918380 events read in total (26435ms).
[16:02:20.919] <TB3> INFO: 1837340 events read in total (50245ms).
[16:02:47.360] <TB3> INFO: 2755800 events read in total (76686ms).
[16:03:11.398] <TB3> INFO: 3672520 events read in total (100724ms).
[16:03:30.396] <TB3> INFO: 4326400 events read in total (119722ms).
[16:03:30.415] <TB3> INFO: Test took 120773ms.
[16:03:30.452] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:03:44.652] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 20.494763 .. 41.878445
[16:03:44.746] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 10 .. 51 (-1/-1) hits flags = 16 (plus default)
[16:03:44.756] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[16:03:44.756] <TB3> INFO: run 1 of 1
[16:03:45.094] <TB3> INFO: Expecting 3494400 events.
[16:04:12.874] <TB3> INFO: 945540 events read in total (27063ms).
[16:04:39.741] <TB3> INFO: 1891560 events read in total (53930ms).
[16:05:06.466] <TB3> INFO: 2835860 events read in total (80656ms).
[16:05:23.569] <TB3> INFO: 3494400 events read in total (97758ms).
[16:05:23.589] <TB3> INFO: Test took 98833ms.
[16:05:23.621] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:05:37.272] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 22.919091 .. 41.725938
[16:05:37.362] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 12 .. 51 (-1/-1) hits flags = 16 (plus default)
[16:05:37.372] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[16:05:37.372] <TB3> INFO: run 1 of 1
[16:05:37.700] <TB3> INFO: Expecting 3328000 events.
[16:06:02.841] <TB3> INFO: 932740 events read in total (24423ms).
[16:06:27.329] <TB3> INFO: 1865960 events read in total (48912ms).
[16:06:53.407] <TB3> INFO: 2798340 events read in total (74989ms).
[16:07:08.831] <TB3> INFO: 3328000 events read in total (90413ms).
[16:07:08.853] <TB3> INFO: Test took 91481ms.
[16:07:08.882] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:07:23.427] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[16:07:23.427] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 20 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[16:07:23.437] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[16:07:23.437] <TB3> INFO: run 1 of 1
[16:07:23.748] <TB3> INFO: Expecting 3411200 events.
[16:07:50.644] <TB3> INFO: 879020 events read in total (26179ms).
[16:08:16.694] <TB3> INFO: 1758020 events read in total (52229ms).
[16:08:42.907] <TB3> INFO: 2636860 events read in total (78443ms).
[16:09:06.135] <TB3> INFO: 3411200 events read in total (101670ms).
[16:09:06.161] <TB3> INFO: Test took 102724ms.
[16:09:06.202] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:09:20.590] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C0.dat
[16:09:20.590] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C1.dat
[16:09:20.590] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C2.dat
[16:09:20.591] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C3.dat
[16:09:20.591] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C4.dat
[16:09:20.591] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C5.dat
[16:09:20.591] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C6.dat
[16:09:20.591] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C7.dat
[16:09:20.592] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C8.dat
[16:09:20.592] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C9.dat
[16:09:20.592] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C10.dat
[16:09:20.592] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C11.dat
[16:09:20.592] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C12.dat
[16:09:20.592] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C13.dat
[16:09:20.593] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C14.dat
[16:09:20.593] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C15.dat
[16:09:20.593] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C0.dat
[16:09:20.602] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C1.dat
[16:09:20.611] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C2.dat
[16:09:20.618] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C3.dat
[16:09:20.624] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C4.dat
[16:09:20.631] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C5.dat
[16:09:20.637] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C6.dat
[16:09:20.643] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C7.dat
[16:09:20.651] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C8.dat
[16:09:20.659] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C9.dat
[16:09:20.666] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C10.dat
[16:09:20.674] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C11.dat
[16:09:20.681] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C12.dat
[16:09:20.688] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C13.dat
[16:09:20.695] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C14.dat
[16:09:20.702] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C15.dat
[16:09:20.708] <TB3> INFO: PixTestTrim::trimTest() done
[16:09:20.708] <TB3> INFO: vtrim: 104 107 98 98 106 93 93 97 99 105 94 113 115 91 96 104
[16:09:20.708] <TB3> INFO: vthrcomp: 89 92 90 94 98 89 94 86 97 97 92 96 93 85 89 104
[16:09:20.708] <TB3> INFO: vcal mean: 34.95 34.97 35.01 34.98 35.03 34.99 34.97 34.96 35.00 35.00 35.00 34.97 35.01 34.95 35.01 34.95
[16:09:20.708] <TB3> INFO: vcal RMS: 1.05 0.72 0.68 0.68 0.77 0.70 0.66 0.70 0.72 0.74 0.69 0.82 0.72 0.69 0.69 1.04
[16:09:20.708] <TB3> INFO: bits mean: 9.04 8.88 9.25 9.09 9.62 8.74 9.53 9.81 9.19 8.82 8.50 9.47 9.21 9.41 8.57 8.87
[16:09:20.708] <TB3> INFO: bits RMS: 2.66 2.86 2.60 2.80 2.57 2.69 2.67 2.58 2.83 3.02 2.79 2.57 2.55 2.88 2.78 2.60
[16:09:20.715] <TB3> INFO: ----------------------------------------------------------------------
[16:09:20.715] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[16:09:20.715] <TB3> INFO: ----------------------------------------------------------------------
[16:09:20.717] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[16:09:20.728] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[16:09:20.728] <TB3> INFO: run 1 of 1
[16:09:21.042] <TB3> INFO: Expecting 8320000 events.
[16:09:51.451] <TB3> INFO: 945090 events read in total (29692ms).
[16:10:18.554] <TB3> INFO: 1880450 events read in total (56795ms).
[16:10:47.270] <TB3> INFO: 2813470 events read in total (85511ms).
[16:11:16.791] <TB3> INFO: 3743550 events read in total (115032ms).
[16:11:46.301] <TB3> INFO: 4667330 events read in total (144542ms).
[16:12:15.741] <TB3> INFO: 5587190 events read in total (173982ms).
[16:12:45.160] <TB3> INFO: 6505720 events read in total (203401ms).
[16:13:14.512] <TB3> INFO: 7423830 events read in total (232753ms).
[16:13:43.052] <TB3> INFO: 8320000 events read in total (261293ms).
[16:13:43.095] <TB3> INFO: Test took 262367ms.
[16:13:43.216] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:14:13.286] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 170 (-1/-1) hits flags = 16 (plus default)
[16:14:13.296] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[16:14:13.296] <TB3> INFO: run 1 of 1
[16:14:13.631] <TB3> INFO: Expecting 7113600 events.
[16:14:44.426] <TB3> INFO: 975540 events read in total (30077ms).
[16:15:14.265] <TB3> INFO: 1940800 events read in total (59916ms).
[16:15:44.142] <TB3> INFO: 2903010 events read in total (89793ms).
[16:16:11.878] <TB3> INFO: 3857790 events read in total (117529ms).
[16:16:41.636] <TB3> INFO: 4805000 events read in total (147287ms).
[16:17:08.911] <TB3> INFO: 5750480 events read in total (174562ms).
[16:17:36.083] <TB3> INFO: 6695740 events read in total (201734ms).
[16:17:49.445] <TB3> INFO: 7113600 events read in total (215096ms).
[16:17:49.478] <TB3> INFO: Test took 216182ms.
[16:17:49.558] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:18:13.566] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 156 (-1/-1) hits flags = 16 (plus default)
[16:18:13.575] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[16:18:13.575] <TB3> INFO: run 1 of 1
[16:18:13.896] <TB3> INFO: Expecting 6531200 events.
[16:18:44.637] <TB3> INFO: 1016870 events read in total (30024ms).
[16:19:15.178] <TB3> INFO: 2022800 events read in total (60566ms).
[16:19:45.668] <TB3> INFO: 3023590 events read in total (91056ms).
[16:20:15.431] <TB3> INFO: 4011060 events read in total (120818ms).
[16:20:45.258] <TB3> INFO: 4994100 events read in total (150645ms).
[16:21:15.502] <TB3> INFO: 5976710 events read in total (180889ms).
[16:21:32.623] <TB3> INFO: 6531200 events read in total (198010ms).
[16:21:32.651] <TB3> INFO: Test took 199076ms.
[16:21:32.718] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:21:55.628] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 156 (-1/-1) hits flags = 16 (plus default)
[16:21:55.637] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[16:21:55.637] <TB3> INFO: run 1 of 1
[16:21:55.963] <TB3> INFO: Expecting 6531200 events.
[16:22:27.093] <TB3> INFO: 1016730 events read in total (30413ms).
[16:22:57.669] <TB3> INFO: 2022150 events read in total (60989ms).
[16:23:26.395] <TB3> INFO: 3022630 events read in total (89716ms).
[16:23:56.830] <TB3> INFO: 4010270 events read in total (120150ms).
[16:24:26.871] <TB3> INFO: 4993320 events read in total (150191ms).
[16:24:57.047] <TB3> INFO: 5975540 events read in total (180367ms).
[16:25:13.917] <TB3> INFO: 6531200 events read in total (197237ms).
[16:25:13.957] <TB3> INFO: Test took 198320ms.
[16:25:14.051] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:25:36.181] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 157 (-1/-1) hits flags = 16 (plus default)
[16:25:36.189] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[16:25:36.189] <TB3> INFO: run 1 of 1
[16:25:36.495] <TB3> INFO: Expecting 6572800 events.
[16:26:06.178] <TB3> INFO: 1012690 events read in total (28966ms).
[16:26:35.599] <TB3> INFO: 2014680 events read in total (58387ms).
[16:27:06.110] <TB3> INFO: 3011720 events read in total (88898ms).
[16:27:36.229] <TB3> INFO: 3996430 events read in total (119017ms).
[16:28:05.440] <TB3> INFO: 4976560 events read in total (148228ms).
[16:28:35.443] <TB3> INFO: 5955810 events read in total (178231ms).
[16:28:53.295] <TB3> INFO: 6572800 events read in total (196083ms).
[16:28:53.325] <TB3> INFO: Test took 197136ms.
[16:28:53.393] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:29:16.674] <TB3> INFO: PixTestTrim::trimBitTest() done
[16:29:16.676] <TB3> INFO: PixTestTrim::doTest() done, duration: 3645 seconds
[16:29:17.447] <TB3> INFO: ######################################################################
[16:29:17.447] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[16:29:17.447] <TB3> INFO: ######################################################################
[16:29:17.752] <TB3> INFO: Expecting 41600 events.
[16:29:22.143] <TB3> INFO: 41600 events read in total (3673ms).
[16:29:22.143] <TB3> INFO: Test took 4694ms.
[16:29:22.149] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:29:22.739] <TB3> INFO: Expecting 41600 events.
[16:29:27.199] <TB3> INFO: 41600 events read in total (3744ms).
[16:29:27.200] <TB3> INFO: Test took 4785ms.
[16:29:27.236] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:29:27.566] <TB3> INFO: Expecting 41600 events.
[16:29:32.042] <TB3> INFO: 41600 events read in total (3759ms).
[16:29:32.043] <TB3> INFO: Test took 4796ms.
[16:29:32.049] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:29:32.056] <TB3> INFO: The DUT currently contains the following objects:
[16:29:32.056] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:32.056] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:29:32.056] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:29:32.056] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:32.056] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.056] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.056] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.056] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.056] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.056] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.056] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.056] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.056] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.056] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.056] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.056] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.056] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.056] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.056] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.056] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.400] <TB3> INFO: Expecting 2560 events.
[16:29:33.468] <TB3> INFO: 2560 events read in total (352ms).
[16:29:33.468] <TB3> INFO: Test took 1412ms.
[16:29:33.469] <TB3> INFO: The DUT currently contains the following objects:
[16:29:33.469] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:33.469] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:29:33.469] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:29:33.469] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:33.469] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.469] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.469] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.470] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.471] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.471] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.471] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.471] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.471] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.471] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.471] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.471] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.471] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.471] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.472] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.472] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.883] <TB3> INFO: Expecting 2560 events.
[16:29:34.953] <TB3> INFO: 2560 events read in total (353ms).
[16:29:34.953] <TB3> INFO: Test took 1481ms.
[16:29:34.953] <TB3> INFO: The DUT currently contains the following objects:
[16:29:34.953] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:34.953] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:29:34.953] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:29:34.953] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:34.953] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.954] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.954] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.954] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.954] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.954] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.954] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.954] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.954] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.954] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.954] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.954] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.954] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.954] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.954] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.954] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.368] <TB3> INFO: Expecting 2560 events.
[16:29:36.436] <TB3> INFO: 2560 events read in total (352ms).
[16:29:36.437] <TB3> INFO: Test took 1483ms.
[16:29:36.437] <TB3> INFO: The DUT currently contains the following objects:
[16:29:36.437] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:36.437] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:29:36.437] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:29:36.437] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:36.437] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.437] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.437] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.437] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.437] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.437] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.437] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.437] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.438] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.438] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.438] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.438] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.438] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.438] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.438] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.438] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.851] <TB3> INFO: Expecting 2560 events.
[16:29:37.921] <TB3> INFO: 2560 events read in total (354ms).
[16:29:37.921] <TB3> INFO: Test took 1483ms.
[16:29:37.921] <TB3> INFO: The DUT currently contains the following objects:
[16:29:37.921] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:37.921] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:29:37.921] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:29:37.921] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:37.921] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.921] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.922] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.922] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.922] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.922] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.922] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.922] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.922] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.922] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.922] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.922] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.922] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.922] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.922] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.922] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:38.336] <TB3> INFO: Expecting 2560 events.
[16:29:39.405] <TB3> INFO: 2560 events read in total (353ms).
[16:29:39.405] <TB3> INFO: Test took 1483ms.
[16:29:39.405] <TB3> INFO: The DUT currently contains the following objects:
[16:29:39.405] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:39.406] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:29:39.406] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:29:39.406] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:39.406] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.406] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.406] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.406] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.406] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.406] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.406] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.406] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.406] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.406] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.406] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.406] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.406] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.406] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.406] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.406] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.820] <TB3> INFO: Expecting 2560 events.
[16:29:40.891] <TB3> INFO: 2560 events read in total (355ms).
[16:29:40.891] <TB3> INFO: Test took 1485ms.
[16:29:40.891] <TB3> INFO: The DUT currently contains the following objects:
[16:29:40.891] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:40.892] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:29:40.892] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:29:40.892] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:40.892] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.892] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.892] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.892] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.892] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.892] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.892] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.892] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.892] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.892] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.892] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.892] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.892] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.892] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.892] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.892] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:41.306] <TB3> INFO: Expecting 2560 events.
[16:29:42.376] <TB3> INFO: 2560 events read in total (354ms).
[16:29:42.377] <TB3> INFO: Test took 1485ms.
[16:29:42.378] <TB3> INFO: The DUT currently contains the following objects:
[16:29:42.378] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:42.378] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:29:42.378] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:29:42.378] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:42.378] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.378] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.378] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.378] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.379] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.379] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.379] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.379] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.379] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.379] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.379] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.379] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.379] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.379] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.379] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.379] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.792] <TB3> INFO: Expecting 2560 events.
[16:29:43.854] <TB3> INFO: 2560 events read in total (346ms).
[16:29:43.855] <TB3> INFO: Test took 1476ms.
[16:29:43.855] <TB3> INFO: The DUT currently contains the following objects:
[16:29:43.855] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:43.855] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:29:43.855] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:29:43.855] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:43.855] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.855] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.855] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.855] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.855] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.856] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.856] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.856] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.856] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.856] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.856] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.856] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.856] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.856] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.856] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.856] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:44.270] <TB3> INFO: Expecting 2560 events.
[16:29:45.340] <TB3> INFO: 2560 events read in total (354ms).
[16:29:45.340] <TB3> INFO: Test took 1484ms.
[16:29:45.341] <TB3> INFO: The DUT currently contains the following objects:
[16:29:45.341] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:45.341] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:29:45.341] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:29:45.341] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:45.341] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:45.341] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:45.341] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:45.341] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:45.341] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:45.341] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:45.341] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:45.341] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:45.341] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:45.342] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:45.342] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:45.342] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:45.342] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:45.342] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:45.342] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:45.342] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:45.755] <TB3> INFO: Expecting 2560 events.
[16:29:46.825] <TB3> INFO: 2560 events read in total (353ms).
[16:29:46.825] <TB3> INFO: Test took 1483ms.
[16:29:46.826] <TB3> INFO: The DUT currently contains the following objects:
[16:29:46.826] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:46.826] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:29:46.826] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:29:46.826] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:46.826] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:46.826] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:46.826] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:46.826] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:46.826] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:46.826] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:46.826] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:46.826] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:46.826] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:46.826] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:46.826] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:46.826] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:46.826] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:46.826] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:46.826] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:46.827] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:47.241] <TB3> INFO: Expecting 2560 events.
[16:29:48.311] <TB3> INFO: 2560 events read in total (354ms).
[16:29:48.311] <TB3> INFO: Test took 1484ms.
[16:29:48.312] <TB3> INFO: The DUT currently contains the following objects:
[16:29:48.312] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:48.312] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:29:48.312] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:29:48.312] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:48.312] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:48.312] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:48.312] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:48.312] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:48.312] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:48.312] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:48.312] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:48.312] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:48.312] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:48.312] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:48.312] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:48.312] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:48.312] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:48.312] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:48.312] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:48.312] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:48.726] <TB3> INFO: Expecting 2560 events.
[16:29:49.796] <TB3> INFO: 2560 events read in total (354ms).
[16:29:49.796] <TB3> INFO: Test took 1484ms.
[16:29:49.797] <TB3> INFO: The DUT currently contains the following objects:
[16:29:49.797] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:49.797] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:29:49.797] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:29:49.797] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:49.797] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:49.797] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:49.797] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:49.797] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:49.797] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:49.797] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:49.797] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:49.797] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:49.797] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:49.797] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:49.797] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:49.797] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:49.797] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:49.797] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:49.797] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:49.797] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:50.211] <TB3> INFO: Expecting 2560 events.
[16:29:51.284] <TB3> INFO: 2560 events read in total (356ms).
[16:29:51.285] <TB3> INFO: Test took 1488ms.
[16:29:51.285] <TB3> INFO: The DUT currently contains the following objects:
[16:29:51.285] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:51.285] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:29:51.285] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:29:51.285] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:51.285] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:51.285] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:51.285] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:51.286] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:51.286] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:51.286] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:51.286] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:51.286] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:51.286] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:51.286] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:51.286] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:51.286] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:51.286] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:51.286] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:51.286] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:51.286] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:51.699] <TB3> INFO: Expecting 2560 events.
[16:29:52.767] <TB3> INFO: 2560 events read in total (352ms).
[16:29:52.767] <TB3> INFO: Test took 1481ms.
[16:29:52.768] <TB3> INFO: The DUT currently contains the following objects:
[16:29:52.768] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:52.768] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:29:52.768] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:29:52.768] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:52.768] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:52.768] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:52.768] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:52.768] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:52.768] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:52.768] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:52.768] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:52.768] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:52.768] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:52.768] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:52.768] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:52.768] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:52.768] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:52.768] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:52.768] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:52.768] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:53.182] <TB3> INFO: Expecting 2560 events.
[16:29:54.251] <TB3> INFO: 2560 events read in total (352ms).
[16:29:54.251] <TB3> INFO: Test took 1483ms.
[16:29:54.252] <TB3> INFO: The DUT currently contains the following objects:
[16:29:54.252] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:54.252] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:29:54.252] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:29:54.252] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:54.252] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:54.252] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:54.252] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:54.252] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:54.252] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:54.252] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:54.252] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:54.252] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:54.252] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:54.252] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:54.252] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:54.252] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:54.252] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:54.252] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:54.252] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:54.252] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:54.667] <TB3> INFO: Expecting 2560 events.
[16:29:55.734] <TB3> INFO: 2560 events read in total (351ms).
[16:29:55.735] <TB3> INFO: Test took 1483ms.
[16:29:55.739] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:29:56.152] <TB3> INFO: Expecting 655360 events.
[16:30:11.254] <TB3> INFO: 655360 events read in total (14386ms).
[16:30:11.263] <TB3> INFO: Expecting 655360 events.
[16:30:26.724] <TB3> INFO: 655360 events read in total (14933ms).
[16:30:26.738] <TB3> INFO: Expecting 655360 events.
[16:30:43.234] <TB3> INFO: 655360 events read in total (15968ms).
[16:30:43.250] <TB3> INFO: Expecting 655360 events.
[16:30:59.887] <TB3> INFO: 655360 events read in total (16109ms).
[16:30:59.906] <TB3> INFO: Expecting 655360 events.
[16:31:16.404] <TB3> INFO: 655360 events read in total (15971ms).
[16:31:16.426] <TB3> INFO: Expecting 655360 events.
[16:31:32.986] <TB3> INFO: 655360 events read in total (16032ms).
[16:31:33.011] <TB3> INFO: Expecting 655360 events.
[16:31:49.562] <TB3> INFO: 655360 events read in total (16023ms).
[16:31:49.591] <TB3> INFO: Expecting 655360 events.
[16:32:06.052] <TB3> INFO: 655360 events read in total (15933ms).
[16:32:06.087] <TB3> INFO: Expecting 655360 events.
[16:32:21.482] <TB3> INFO: 655360 events read in total (14867ms).
[16:32:21.520] <TB3> INFO: Expecting 655360 events.
[16:32:36.606] <TB3> INFO: 655360 events read in total (14559ms).
[16:32:36.646] <TB3> INFO: Expecting 655360 events.
[16:32:53.131] <TB3> INFO: 655360 events read in total (15958ms).
[16:32:53.174] <TB3> INFO: Expecting 655360 events.
[16:33:09.737] <TB3> INFO: 655360 events read in total (16035ms).
[16:33:09.787] <TB3> INFO: Expecting 655360 events.
[16:33:26.310] <TB3> INFO: 655360 events read in total (15996ms).
[16:33:26.363] <TB3> INFO: Expecting 655360 events.
[16:33:41.275] <TB3> INFO: 655360 events read in total (14384ms).
[16:33:41.328] <TB3> INFO: Expecting 655360 events.
[16:33:57.181] <TB3> INFO: 655360 events read in total (15326ms).
[16:33:57.246] <TB3> INFO: Expecting 655360 events.
[16:34:13.787] <TB3> INFO: 655360 events read in total (16013ms).
[16:34:13.853] <TB3> INFO: Test took 258114ms.
[16:34:13.940] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:34:14.244] <TB3> INFO: Expecting 655360 events.
[16:34:30.761] <TB3> INFO: 655360 events read in total (15801ms).
[16:34:30.770] <TB3> INFO: Expecting 655360 events.
[16:34:45.968] <TB3> INFO: 655360 events read in total (14670ms).
[16:34:45.979] <TB3> INFO: Expecting 655360 events.
[16:35:01.302] <TB3> INFO: 655360 events read in total (14795ms).
[16:35:01.317] <TB3> INFO: Expecting 655360 events.
[16:35:16.374] <TB3> INFO: 655360 events read in total (14529ms).
[16:35:16.395] <TB3> INFO: Expecting 655360 events.
[16:35:31.725] <TB3> INFO: 655360 events read in total (14803ms).
[16:35:31.748] <TB3> INFO: Expecting 655360 events.
[16:35:46.923] <TB3> INFO: 655360 events read in total (14647ms).
[16:35:46.950] <TB3> INFO: Expecting 655360 events.
[16:36:02.234] <TB3> INFO: 655360 events read in total (14757ms).
[16:36:02.263] <TB3> INFO: Expecting 655360 events.
[16:36:17.502] <TB3> INFO: 655360 events read in total (14712ms).
[16:36:17.540] <TB3> INFO: Expecting 655360 events.
[16:36:32.815] <TB3> INFO: 655360 events read in total (14748ms).
[16:36:32.851] <TB3> INFO: Expecting 655360 events.
[16:36:48.858] <TB3> INFO: 655360 events read in total (15479ms).
[16:36:48.900] <TB3> INFO: Expecting 655360 events.
[16:37:05.341] <TB3> INFO: 655360 events read in total (15913ms).
[16:37:05.385] <TB3> INFO: Expecting 655360 events.
[16:37:21.934] <TB3> INFO: 655360 events read in total (16021ms).
[16:37:21.980] <TB3> INFO: Expecting 655360 events.
[16:37:38.516] <TB3> INFO: 655360 events read in total (16008ms).
[16:37:38.570] <TB3> INFO: Expecting 655360 events.
[16:37:54.875] <TB3> INFO: 655360 events read in total (15777ms).
[16:37:54.929] <TB3> INFO: Expecting 655360 events.
[16:38:11.426] <TB3> INFO: 655360 events read in total (15970ms).
[16:38:11.486] <TB3> INFO: Expecting 655360 events.
[16:38:26.561] <TB3> INFO: 655360 events read in total (14547ms).
[16:38:26.619] <TB3> INFO: Test took 252679ms.
[16:38:26.825] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:26.832] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:26.839] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:26.846] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[16:38:26.853] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[16:38:26.860] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[16:38:26.867] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:26.874] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[16:38:26.881] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[16:38:26.889] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[16:38:26.897] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[16:38:26.904] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[16:38:26.912] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[16:38:26.919] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:26.926] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:26.934] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[16:38:26.940] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:26.948] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:26.955] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:26.962] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:26.969] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:26.976] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:26.983] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:26.990] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:26.997] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:27.005] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:27.041] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C0.dat
[16:38:27.041] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C1.dat
[16:38:27.041] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C2.dat
[16:38:27.041] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C3.dat
[16:38:27.041] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C4.dat
[16:38:27.041] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C5.dat
[16:38:27.041] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C6.dat
[16:38:27.041] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C7.dat
[16:38:27.041] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C8.dat
[16:38:27.041] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C9.dat
[16:38:27.041] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C10.dat
[16:38:27.042] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C11.dat
[16:38:27.042] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C12.dat
[16:38:27.042] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C13.dat
[16:38:27.042] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C14.dat
[16:38:27.042] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C15.dat
[16:38:27.350] <TB3> INFO: Expecting 41600 events.
[16:38:31.687] <TB3> INFO: 41600 events read in total (3620ms).
[16:38:31.687] <TB3> INFO: Test took 4642ms.
[16:38:32.230] <TB3> INFO: Expecting 41600 events.
[16:38:36.555] <TB3> INFO: 41600 events read in total (3609ms).
[16:38:36.555] <TB3> INFO: Test took 4632ms.
[16:38:37.097] <TB3> INFO: Expecting 41600 events.
[16:38:41.430] <TB3> INFO: 41600 events read in total (3617ms).
[16:38:41.430] <TB3> INFO: Test took 4643ms.
[16:38:41.665] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:41.797] <TB3> INFO: Expecting 2560 events.
[16:38:42.859] <TB3> INFO: 2560 events read in total (346ms).
[16:38:42.859] <TB3> INFO: Test took 1194ms.
[16:38:42.862] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:43.275] <TB3> INFO: Expecting 2560 events.
[16:38:44.338] <TB3> INFO: 2560 events read in total (347ms).
[16:38:44.339] <TB3> INFO: Test took 1477ms.
[16:38:44.341] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:44.754] <TB3> INFO: Expecting 2560 events.
[16:38:45.816] <TB3> INFO: 2560 events read in total (346ms).
[16:38:45.816] <TB3> INFO: Test took 1475ms.
[16:38:45.818] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:46.231] <TB3> INFO: Expecting 2560 events.
[16:38:47.293] <TB3> INFO: 2560 events read in total (346ms).
[16:38:47.293] <TB3> INFO: Test took 1475ms.
[16:38:47.295] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:47.709] <TB3> INFO: Expecting 2560 events.
[16:38:48.770] <TB3> INFO: 2560 events read in total (345ms).
[16:38:48.771] <TB3> INFO: Test took 1476ms.
[16:38:48.772] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:49.186] <TB3> INFO: Expecting 2560 events.
[16:38:50.248] <TB3> INFO: 2560 events read in total (346ms).
[16:38:50.248] <TB3> INFO: Test took 1476ms.
[16:38:50.250] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:50.664] <TB3> INFO: Expecting 2560 events.
[16:38:51.726] <TB3> INFO: 2560 events read in total (346ms).
[16:38:51.727] <TB3> INFO: Test took 1477ms.
[16:38:51.736] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:52.142] <TB3> INFO: Expecting 2560 events.
[16:38:53.204] <TB3> INFO: 2560 events read in total (346ms).
[16:38:53.204] <TB3> INFO: Test took 1469ms.
[16:38:53.207] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:53.620] <TB3> INFO: Expecting 2560 events.
[16:38:54.682] <TB3> INFO: 2560 events read in total (346ms).
[16:38:54.682] <TB3> INFO: Test took 1475ms.
[16:38:54.685] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:55.098] <TB3> INFO: Expecting 2560 events.
[16:38:56.160] <TB3> INFO: 2560 events read in total (346ms).
[16:38:56.160] <TB3> INFO: Test took 1475ms.
[16:38:56.161] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:56.575] <TB3> INFO: Expecting 2560 events.
[16:38:57.637] <TB3> INFO: 2560 events read in total (346ms).
[16:38:57.638] <TB3> INFO: Test took 1477ms.
[16:38:57.639] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:58.053] <TB3> INFO: Expecting 2560 events.
[16:38:59.115] <TB3> INFO: 2560 events read in total (346ms).
[16:38:59.115] <TB3> INFO: Test took 1476ms.
[16:38:59.117] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:59.531] <TB3> INFO: Expecting 2560 events.
[16:39:00.593] <TB3> INFO: 2560 events read in total (346ms).
[16:39:00.593] <TB3> INFO: Test took 1476ms.
[16:39:00.595] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:01.008] <TB3> INFO: Expecting 2560 events.
[16:39:02.071] <TB3> INFO: 2560 events read in total (346ms).
[16:39:02.071] <TB3> INFO: Test took 1477ms.
[16:39:02.074] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:02.486] <TB3> INFO: Expecting 2560 events.
[16:39:03.562] <TB3> INFO: 2560 events read in total (360ms).
[16:39:03.563] <TB3> INFO: Test took 1489ms.
[16:39:03.564] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:03.979] <TB3> INFO: Expecting 2560 events.
[16:39:05.041] <TB3> INFO: 2560 events read in total (346ms).
[16:39:05.041] <TB3> INFO: Test took 1477ms.
[16:39:05.044] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:05.457] <TB3> INFO: Expecting 2560 events.
[16:39:06.529] <TB3> INFO: 2560 events read in total (355ms).
[16:39:06.529] <TB3> INFO: Test took 1485ms.
[16:39:06.533] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:06.945] <TB3> INFO: Expecting 2560 events.
[16:39:08.014] <TB3> INFO: 2560 events read in total (353ms).
[16:39:08.015] <TB3> INFO: Test took 1483ms.
[16:39:08.017] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:08.431] <TB3> INFO: Expecting 2560 events.
[16:39:09.514] <TB3> INFO: 2560 events read in total (367ms).
[16:39:09.514] <TB3> INFO: Test took 1497ms.
[16:39:09.518] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:09.930] <TB3> INFO: Expecting 2560 events.
[16:39:11.000] <TB3> INFO: 2560 events read in total (354ms).
[16:39:11.000] <TB3> INFO: Test took 1482ms.
[16:39:11.003] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:11.416] <TB3> INFO: Expecting 2560 events.
[16:39:12.486] <TB3> INFO: 2560 events read in total (354ms).
[16:39:12.486] <TB3> INFO: Test took 1483ms.
[16:39:12.491] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:12.902] <TB3> INFO: Expecting 2560 events.
[16:39:13.970] <TB3> INFO: 2560 events read in total (352ms).
[16:39:13.971] <TB3> INFO: Test took 1480ms.
[16:39:13.974] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:14.387] <TB3> INFO: Expecting 2560 events.
[16:39:15.457] <TB3> INFO: 2560 events read in total (354ms).
[16:39:15.457] <TB3> INFO: Test took 1483ms.
[16:39:15.460] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:15.873] <TB3> INFO: Expecting 2560 events.
[16:39:16.943] <TB3> INFO: 2560 events read in total (354ms).
[16:39:16.944] <TB3> INFO: Test took 1484ms.
[16:39:16.946] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:17.360] <TB3> INFO: Expecting 2560 events.
[16:39:18.428] <TB3> INFO: 2560 events read in total (352ms).
[16:39:18.429] <TB3> INFO: Test took 1483ms.
[16:39:18.431] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:18.845] <TB3> INFO: Expecting 2560 events.
[16:39:19.913] <TB3> INFO: 2560 events read in total (352ms).
[16:39:19.914] <TB3> INFO: Test took 1483ms.
[16:39:19.918] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:20.329] <TB3> INFO: Expecting 2560 events.
[16:39:21.398] <TB3> INFO: 2560 events read in total (352ms).
[16:39:21.399] <TB3> INFO: Test took 1482ms.
[16:39:21.401] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:21.815] <TB3> INFO: Expecting 2560 events.
[16:39:22.883] <TB3> INFO: 2560 events read in total (352ms).
[16:39:22.883] <TB3> INFO: Test took 1482ms.
[16:39:22.886] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:23.299] <TB3> INFO: Expecting 2560 events.
[16:39:24.369] <TB3> INFO: 2560 events read in total (354ms).
[16:39:24.369] <TB3> INFO: Test took 1483ms.
[16:39:24.372] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:24.785] <TB3> INFO: Expecting 2560 events.
[16:39:25.854] <TB3> INFO: 2560 events read in total (353ms).
[16:39:25.854] <TB3> INFO: Test took 1482ms.
[16:39:25.857] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:26.269] <TB3> INFO: Expecting 2560 events.
[16:39:27.340] <TB3> INFO: 2560 events read in total (354ms).
[16:39:27.340] <TB3> INFO: Test took 1484ms.
[16:39:27.345] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:27.756] <TB3> INFO: Expecting 2560 events.
[16:39:28.827] <TB3> INFO: 2560 events read in total (355ms).
[16:39:28.828] <TB3> INFO: Test took 1483ms.
[16:39:29.457] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 612 seconds
[16:39:29.457] <TB3> INFO: PH scale (per ROC): 74 74 80 80 73 65 75 75 71 74 76 62 65 79 75 74
[16:39:29.457] <TB3> INFO: PH offset (per ROC): 182 187 172 192 192 176 171 172 188 182 177 187 184 175 192 181
[16:39:29.646] <TB3> INFO: ######################################################################
[16:39:29.646] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[16:39:29.646] <TB3> INFO: ######################################################################
[16:39:29.657] <TB3> INFO: scanning low vcal = 10
[16:39:29.969] <TB3> INFO: Expecting 41600 events.
[16:39:33.595] <TB3> INFO: 41600 events read in total (2910ms).
[16:39:33.596] <TB3> INFO: Test took 3939ms.
[16:39:33.598] <TB3> INFO: scanning low vcal = 20
[16:39:34.010] <TB3> INFO: Expecting 41600 events.
[16:39:37.633] <TB3> INFO: 41600 events read in total (2906ms).
[16:39:37.633] <TB3> INFO: Test took 4035ms.
[16:39:37.636] <TB3> INFO: scanning low vcal = 30
[16:39:38.048] <TB3> INFO: Expecting 41600 events.
[16:39:41.686] <TB3> INFO: 41600 events read in total (2922ms).
[16:39:41.687] <TB3> INFO: Test took 4051ms.
[16:39:41.689] <TB3> INFO: scanning low vcal = 40
[16:39:42.093] <TB3> INFO: Expecting 41600 events.
[16:39:46.314] <TB3> INFO: 41600 events read in total (3505ms).
[16:39:46.314] <TB3> INFO: Test took 4625ms.
[16:39:46.318] <TB3> INFO: scanning low vcal = 50
[16:39:46.656] <TB3> INFO: Expecting 41600 events.
[16:39:50.836] <TB3> INFO: 41600 events read in total (3463ms).
[16:39:50.836] <TB3> INFO: Test took 4518ms.
[16:39:50.839] <TB3> INFO: scanning low vcal = 60
[16:39:51.193] <TB3> INFO: Expecting 41600 events.
[16:39:55.405] <TB3> INFO: 41600 events read in total (3496ms).
[16:39:55.406] <TB3> INFO: Test took 4567ms.
[16:39:55.409] <TB3> INFO: scanning low vcal = 70
[16:39:55.758] <TB3> INFO: Expecting 41600 events.
[16:39:59.829] <TB3> INFO: 41600 events read in total (3355ms).
[16:39:59.829] <TB3> INFO: Test took 4420ms.
[16:39:59.832] <TB3> INFO: scanning low vcal = 80
[16:40:00.187] <TB3> INFO: Expecting 41600 events.
[16:40:04.214] <TB3> INFO: 41600 events read in total (3311ms).
[16:40:04.215] <TB3> INFO: Test took 4383ms.
[16:40:04.217] <TB3> INFO: scanning low vcal = 90
[16:40:04.570] <TB3> INFO: Expecting 41600 events.
[16:40:08.796] <TB3> INFO: 41600 events read in total (3510ms).
[16:40:08.797] <TB3> INFO: Test took 4580ms.
[16:40:08.800] <TB3> INFO: scanning low vcal = 100
[16:40:09.184] <TB3> INFO: Expecting 41600 events.
[16:40:13.228] <TB3> INFO: 41600 events read in total (3328ms).
[16:40:13.229] <TB3> INFO: Test took 4429ms.
[16:40:13.231] <TB3> INFO: scanning low vcal = 110
[16:40:13.587] <TB3> INFO: Expecting 41600 events.
[16:40:17.645] <TB3> INFO: 41600 events read in total (3342ms).
[16:40:17.646] <TB3> INFO: Test took 4415ms.
[16:40:17.648] <TB3> INFO: scanning low vcal = 120
[16:40:18.001] <TB3> INFO: Expecting 41600 events.
[16:40:22.068] <TB3> INFO: 41600 events read in total (3351ms).
[16:40:22.069] <TB3> INFO: Test took 4421ms.
[16:40:22.072] <TB3> INFO: scanning low vcal = 130
[16:40:22.428] <TB3> INFO: Expecting 41600 events.
[16:40:26.643] <TB3> INFO: 41600 events read in total (3499ms).
[16:40:26.643] <TB3> INFO: Test took 4571ms.
[16:40:26.646] <TB3> INFO: scanning low vcal = 140
[16:40:26.991] <TB3> INFO: Expecting 41600 events.
[16:40:31.193] <TB3> INFO: 41600 events read in total (3486ms).
[16:40:31.194] <TB3> INFO: Test took 4548ms.
[16:40:31.197] <TB3> INFO: scanning low vcal = 150
[16:40:31.535] <TB3> INFO: Expecting 41600 events.
[16:40:35.758] <TB3> INFO: 41600 events read in total (3506ms).
[16:40:35.759] <TB3> INFO: Test took 4562ms.
[16:40:35.761] <TB3> INFO: scanning low vcal = 160
[16:40:36.114] <TB3> INFO: Expecting 41600 events.
[16:40:40.299] <TB3> INFO: 41600 events read in total (3469ms).
[16:40:40.300] <TB3> INFO: Test took 4539ms.
[16:40:40.303] <TB3> INFO: scanning low vcal = 170
[16:40:40.649] <TB3> INFO: Expecting 41600 events.
[16:40:44.867] <TB3> INFO: 41600 events read in total (3501ms).
[16:40:44.868] <TB3> INFO: Test took 4565ms.
[16:40:44.872] <TB3> INFO: scanning low vcal = 180
[16:40:45.220] <TB3> INFO: Expecting 41600 events.
[16:40:49.469] <TB3> INFO: 41600 events read in total (3533ms).
[16:40:49.469] <TB3> INFO: Test took 4597ms.
[16:40:49.472] <TB3> INFO: scanning low vcal = 190
[16:40:49.824] <TB3> INFO: Expecting 41600 events.
[16:40:54.020] <TB3> INFO: 41600 events read in total (3480ms).
[16:40:54.020] <TB3> INFO: Test took 4548ms.
[16:40:54.024] <TB3> INFO: scanning low vcal = 200
[16:40:54.378] <TB3> INFO: Expecting 41600 events.
[16:40:58.621] <TB3> INFO: 41600 events read in total (3527ms).
[16:40:58.622] <TB3> INFO: Test took 4598ms.
[16:40:58.624] <TB3> INFO: scanning low vcal = 210
[16:40:58.978] <TB3> INFO: Expecting 41600 events.
[16:41:03.187] <TB3> INFO: 41600 events read in total (3493ms).
[16:41:03.187] <TB3> INFO: Test took 4563ms.
[16:41:03.190] <TB3> INFO: scanning low vcal = 220
[16:41:03.527] <TB3> INFO: Expecting 41600 events.
[16:41:07.712] <TB3> INFO: 41600 events read in total (3469ms).
[16:41:07.713] <TB3> INFO: Test took 4523ms.
[16:41:07.715] <TB3> INFO: scanning low vcal = 230
[16:41:08.070] <TB3> INFO: Expecting 41600 events.
[16:41:12.302] <TB3> INFO: 41600 events read in total (3516ms).
[16:41:12.303] <TB3> INFO: Test took 4588ms.
[16:41:12.306] <TB3> INFO: scanning low vcal = 240
[16:41:12.649] <TB3> INFO: Expecting 41600 events.
[16:41:16.873] <TB3> INFO: 41600 events read in total (3508ms).
[16:41:16.874] <TB3> INFO: Test took 4568ms.
[16:41:16.877] <TB3> INFO: scanning low vcal = 250
[16:41:17.220] <TB3> INFO: Expecting 41600 events.
[16:41:21.368] <TB3> INFO: 41600 events read in total (3432ms).
[16:41:21.368] <TB3> INFO: Test took 4491ms.
[16:41:21.377] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[16:41:21.728] <TB3> INFO: Expecting 41600 events.
[16:41:25.940] <TB3> INFO: 41600 events read in total (3496ms).
[16:41:25.941] <TB3> INFO: Test took 4564ms.
[16:41:25.944] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[16:41:26.280] <TB3> INFO: Expecting 41600 events.
[16:41:30.484] <TB3> INFO: 41600 events read in total (3488ms).
[16:41:30.484] <TB3> INFO: Test took 4540ms.
[16:41:30.487] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[16:41:30.835] <TB3> INFO: Expecting 41600 events.
[16:41:35.045] <TB3> INFO: 41600 events read in total (3494ms).
[16:41:35.045] <TB3> INFO: Test took 4558ms.
[16:41:35.048] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[16:41:35.394] <TB3> INFO: Expecting 41600 events.
[16:41:39.719] <TB3> INFO: 41600 events read in total (3609ms).
[16:41:39.720] <TB3> INFO: Test took 4672ms.
[16:41:39.722] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[16:41:40.072] <TB3> INFO: Expecting 41600 events.
[16:41:44.302] <TB3> INFO: 41600 events read in total (3514ms).
[16:41:44.302] <TB3> INFO: Test took 4580ms.
[16:41:44.800] <TB3> INFO: PixTestGainPedestal::measure() done
[16:42:19.826] <TB3> INFO: PixTestGainPedestal::fit() done
[16:42:19.826] <TB3> INFO: non-linearity mean: 0.953 0.958 0.965 0.960 0.958 0.965 0.959 0.951 0.952 0.955 0.960 0.959 0.958 0.957 0.962 0.960
[16:42:19.826] <TB3> INFO: non-linearity RMS: 0.007 0.008 0.005 0.005 0.006 0.006 0.006 0.007 0.008 0.007 0.006 0.007 0.007 0.006 0.006 0.006
[16:42:19.826] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[16:42:19.848] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[16:42:19.871] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[16:42:19.890] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[16:42:19.910] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[16:42:19.933] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[16:42:19.952] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[16:42:19.971] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[16:42:19.990] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[16:42:20.008] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[16:42:20.028] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[16:42:20.048] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[16:42:20.066] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[16:42:20.085] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[16:42:20.104] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[16:42:20.123] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[16:42:20.142] <TB3> INFO: PixTestGainPedestal::doTest() done, duration: 170 seconds
[16:42:20.149] <TB3> INFO: readReadbackCal: /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C15.dat
[16:42:20.151] <TB3> INFO: PixTestReadback::doTest() start.
[16:42:20.152] <TB3> INFO: PixTestReadback::RES sent once
[16:42:41.938] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C0.dat
[16:42:41.938] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C1.dat
[16:42:41.938] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C2.dat
[16:42:41.938] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C3.dat
[16:42:41.938] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C4.dat
[16:42:41.938] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C5.dat
[16:42:41.938] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C6.dat
[16:42:41.938] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C7.dat
[16:42:41.938] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C8.dat
[16:42:41.938] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C9.dat
[16:42:41.938] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C10.dat
[16:42:41.938] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C11.dat
[16:42:41.938] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C12.dat
[16:42:41.938] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C13.dat
[16:42:41.939] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C14.dat
[16:42:41.939] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C15.dat
[16:42:41.968] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:42:41.968] <TB3> INFO: PixTestReadback::RES sent once
[16:43:03.681] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C0.dat
[16:43:03.681] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C1.dat
[16:43:03.681] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C2.dat
[16:43:03.681] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C3.dat
[16:43:03.681] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C4.dat
[16:43:03.681] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C5.dat
[16:43:03.681] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C6.dat
[16:43:03.681] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C7.dat
[16:43:03.681] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C8.dat
[16:43:03.682] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C9.dat
[16:43:03.682] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C10.dat
[16:43:03.682] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C11.dat
[16:43:03.682] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C12.dat
[16:43:03.682] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C13.dat
[16:43:03.682] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C14.dat
[16:43:03.682] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C15.dat
[16:43:03.715] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:43:03.716] <TB3> INFO: PixTestReadback::RES sent once
[16:43:20.568] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:43:20.568] <TB3> INFO: Vbg will be calibrated using Vd calibration
[16:43:20.568] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 150.9calibrated Vbg = 1.21698 :::*/*/*/*/
[16:43:20.568] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 156.1calibrated Vbg = 1.21461 :::*/*/*/*/
[16:43:20.568] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 158.4calibrated Vbg = 1.21967 :::*/*/*/*/
[16:43:20.568] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[16:43:20.568] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 146.8calibrated Vbg = 1.22795 :::*/*/*/*/
[16:43:20.568] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 152.1calibrated Vbg = 1.23044 :::*/*/*/*/
[16:43:20.568] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 148.7calibrated Vbg = 1.22657 :::*/*/*/*/
[16:43:20.568] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[16:43:20.568] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 168.8calibrated Vbg = 1.22775 :::*/*/*/*/
[16:43:20.568] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 158.8calibrated Vbg = 1.22344 :::*/*/*/*/
[16:43:20.568] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 157.7calibrated Vbg = 1.22387 :::*/*/*/*/
[16:43:20.568] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[16:43:20.568] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 156.3calibrated Vbg = 1.2169 :::*/*/*/*/
[16:43:20.568] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 150.8calibrated Vbg = 1.21492 :::*/*/*/*/
[16:43:20.568] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 148.6calibrated Vbg = 1.21912 :::*/*/*/*/
[16:43:20.568] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[16:43:20.571] <TB3> INFO: PixTestReadback::RES sent once
[16:48:00.889] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C0.dat
[16:48:00.889] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C1.dat
[16:48:00.889] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C2.dat
[16:48:00.889] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C3.dat
[16:48:00.889] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C4.dat
[16:48:00.889] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C5.dat
[16:48:00.889] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C6.dat
[16:48:00.889] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C7.dat
[16:48:00.889] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C8.dat
[16:48:00.890] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C9.dat
[16:48:00.890] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C10.dat
[16:48:00.890] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C11.dat
[16:48:00.890] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C12.dat
[16:48:00.890] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C13.dat
[16:48:00.890] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C14.dat
[16:48:00.890] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C15.dat
[16:48:00.913] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:48:00.914] <TB3> INFO: PixTestReadback::doTest() done
[16:48:00.931] <TB3> INFO: enter test to run
[16:48:00.931] <TB3> INFO: test: exit no parameter change
[16:48:01.510] <TB3> QUIET: Connection to board 170 closed.
[16:48:01.590] <TB3> INFO: pXar: this is the end, my friend