Test Date: 2015-09-02 10:55
Analysis date: 2016-05-26 04:24
Logfile
LogfileView
[12:31:19.853] <TB3> INFO: *** Welcome to pxar ***
[12:31:19.853] <TB3> INFO: *** Today: 2015/09/02
[12:31:19.853] <TB3> INFO: readRocDacs: /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters_C15.dat
[12:31:19.854] <TB3> INFO: readTbmDacs: /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:31:19.854] <TB3> INFO: readMaskFile: /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//defaultMaskFile.dat
[12:31:19.854] <TB3> INFO: readTrimFile: /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//trimParameters_C15.dat
[12:31:19.932] <TB3> INFO: clk: 4
[12:31:19.932] <TB3> INFO: ctr: 4
[12:31:19.932] <TB3> INFO: sda: 19
[12:31:19.932] <TB3> INFO: tin: 9
[12:31:19.932] <TB3> INFO: level: 15
[12:31:19.932] <TB3> INFO: triggerdelay: 0
[12:31:19.932] <TB3> QUIET: Instanciating API for pxar prod-10
[12:31:19.932] <TB3> INFO: Log level: INFO
[12:31:19.939] <TB3> INFO: Found DTB DTB_WZ4I6J
[12:31:19.953] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[12:31:19.956] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[12:31:19.958] <TB3> INFO: RPC call hashes of host and DTB match: 397073690
[12:31:21.490] <TB3> INFO: DUT info:
[12:31:21.490] <TB3> INFO: The DUT currently contains the following objects:
[12:31:21.490] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:31:21.490] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:31:21.490] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:31:21.490] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:31:21.490] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:31:21.490] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:31:21.490] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:31:21.490] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:31:21.490] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:31:21.490] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:31:21.490] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:31:21.490] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:31:21.490] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:31:21.490] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:31:21.490] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:31:21.490] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:31:21.490] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:31:21.490] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:31:21.490] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:31:21.490] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:31:21.892] <TB3> INFO: enter 'restricted' command line mode
[12:31:21.892] <TB3> INFO: enter test to run
[12:31:21.892] <TB3> INFO: test: pretest no parameter change
[12:31:21.892] <TB3> INFO: running: pretest
[12:31:21.898] <TB3> INFO: ######################################################################
[12:31:21.898] <TB3> INFO: PixTestPretest::doTest()
[12:31:21.898] <TB3> INFO: ######################################################################
[12:31:21.900] <TB3> INFO: ----------------------------------------------------------------------
[12:31:21.900] <TB3> INFO: PixTestPretest::programROC()
[12:31:21.900] <TB3> INFO: ----------------------------------------------------------------------
[12:31:39.917] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:31:39.918] <TB3> INFO: IA differences per ROC: 19.3 18.5 18.5 20.1 20.1 18.5 20.9 18.5 18.5 20.1 20.1 20.1 20.1 20.1 20.9 18.5
[12:31:39.993] <TB3> INFO: ----------------------------------------------------------------------
[12:31:39.993] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:31:39.993] <TB3> INFO: ----------------------------------------------------------------------
[12:31:44.674] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 400.3 mA = 25.0188 mA/ROC
[12:31:44.677] <TB3> INFO: ----------------------------------------------------------------------
[12:31:44.677] <TB3> INFO: PixTestPretest::findWorkingPixel()
[12:31:44.677] <TB3> INFO: ----------------------------------------------------------------------
[12:31:44.815] <TB3> INFO: Expecting 231680 events.
[12:31:54.202] <TB3> INFO: 231680 events read in total (8668ms).
[12:31:54.267] <TB3> INFO: Test took 9585ms.
[12:31:54.539] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:31:54.579] <TB3> INFO: ----------------------------------------------------------------------
[12:31:54.579] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[12:31:54.579] <TB3> INFO: ----------------------------------------------------------------------
[12:31:54.716] <TB3> INFO: Expecting 231680 events.
[12:32:04.068] <TB3> INFO: 231680 events read in total (8636ms).
[12:32:04.074] <TB3> INFO: Test took 9490ms.
[12:32:04.382] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[12:32:04.382] <TB3> INFO: CalDel: 144 138 138 132 156 149 149 161 142 147 154 170 154 132 175 141
[12:32:04.382] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[12:32:04.384] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters_C0.dat
[12:32:04.384] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters_C1.dat
[12:32:04.385] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters_C2.dat
[12:32:04.385] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters_C3.dat
[12:32:04.385] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters_C4.dat
[12:32:04.385] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters_C5.dat
[12:32:04.385] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters_C6.dat
[12:32:04.385] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters_C7.dat
[12:32:04.385] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters_C8.dat
[12:32:04.385] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters_C9.dat
[12:32:04.386] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters_C10.dat
[12:32:04.386] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters_C11.dat
[12:32:04.386] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters_C12.dat
[12:32:04.386] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters_C13.dat
[12:32:04.386] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters_C14.dat
[12:32:04.386] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters_C15.dat
[12:32:04.386] <TB3> INFO: write tbm parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//tbmParameters_C0a.dat
[12:32:04.386] <TB3> INFO: write tbm parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:32:04.386] <TB3> INFO: PixTestPretest::doTest() done, duration: 42 seconds
[12:32:04.476] <TB3> INFO: enter test to run
[12:32:04.476] <TB3> INFO: test: fulltest no parameter change
[12:32:04.477] <TB3> INFO: running: fulltest
[12:32:04.477] <TB3> INFO: ######################################################################
[12:32:04.477] <TB3> INFO: PixTestFullTest::doTest()
[12:32:04.477] <TB3> INFO: ######################################################################
[12:32:04.478] <TB3> INFO: ######################################################################
[12:32:04.478] <TB3> INFO: PixTestAlive::doTest()
[12:32:04.478] <TB3> INFO: ######################################################################
[12:32:04.480] <TB3> INFO: ----------------------------------------------------------------------
[12:32:04.480] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:32:04.480] <TB3> INFO: ----------------------------------------------------------------------
[12:32:04.851] <TB3> INFO: Expecting 41600 events.
[12:32:09.262] <TB3> INFO: 41600 events read in total (3694ms).
[12:32:09.263] <TB3> INFO: Test took 4782ms.
[12:32:09.269] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:09.561] <TB3> INFO: PixTestAlive::aliveTest() done
[12:32:09.561] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
[12:32:09.565] <TB3> INFO: ----------------------------------------------------------------------
[12:32:09.565] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:32:09.565] <TB3> INFO: ----------------------------------------------------------------------
[12:32:09.903] <TB3> INFO: Expecting 41600 events.
[12:32:13.079] <TB3> INFO: 41600 events read in total (2459ms).
[12:32:13.080] <TB3> INFO: Test took 3511ms.
[12:32:13.080] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:13.083] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:32:13.386] <TB3> INFO: PixTestAlive::maskTest() done
[12:32:13.386] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:32:13.388] <TB3> INFO: ----------------------------------------------------------------------
[12:32:13.388] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:32:13.388] <TB3> INFO: ----------------------------------------------------------------------
[12:32:13.696] <TB3> INFO: Expecting 41600 events.
[12:32:18.158] <TB3> INFO: 41600 events read in total (3745ms).
[12:32:18.158] <TB3> INFO: Test took 4769ms.
[12:32:18.165] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:18.459] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[12:32:18.459] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:32:18.459] <TB3> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[12:32:18.470] <TB3> INFO: ######################################################################
[12:32:18.470] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:32:18.470] <TB3> INFO: ######################################################################
[12:32:18.473] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[12:32:18.485] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:32:18.485] <TB3> INFO: run 1 of 1
[12:32:18.792] <TB3> INFO: Expecting 3120000 events.
[12:32:54.100] <TB3> INFO: 838405 events read in total (34592ms).
[12:33:28.443] <TB3> INFO: 1664070 events read in total (68935ms).
[12:34:03.309] <TB3> INFO: 2501335 events read in total (103801ms).
[12:34:28.513] <TB3> INFO: 3120000 events read in total (129005ms).
[12:34:28.580] <TB3> INFO: Test took 130095ms.
[12:34:28.714] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:56.556] <TB3> INFO: PixTestBBMap::doTest() done, duration: 158 seconds
[12:34:56.556] <TB3> INFO: number of dead bumps (per ROC): 35 0 0 0 1 0 0 0 1 0 0 0 0 0 0 2
[12:34:56.556] <TB3> INFO: separation cut (per ROC): 69 78 82 85 91 72 83 72 94 89 73 97 86 83 80 88
[12:34:56.633] <TB3> INFO: ######################################################################
[12:34:56.633] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:34:56.633] <TB3> INFO: ######################################################################
[12:34:56.633] <TB3> INFO: ----------------------------------------------------------------------
[12:34:56.633] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:34:56.633] <TB3> INFO: ----------------------------------------------------------------------
[12:34:56.633] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[12:34:56.642] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[12:34:56.642] <TB3> INFO: run 1 of 1
[12:34:56.955] <TB3> INFO: Expecting 31200000 events.
[12:35:19.546] <TB3> INFO: 942100 events read in total (21875ms).
[12:35:41.604] <TB3> INFO: 1867300 events read in total (43933ms).
[12:36:03.592] <TB3> INFO: 2789450 events read in total (65921ms).
[12:36:25.638] <TB3> INFO: 3713000 events read in total (87967ms).
[12:36:49.188] <TB3> INFO: 4632250 events read in total (111517ms).
[12:37:13.344] <TB3> INFO: 5552100 events read in total (135673ms).
[12:37:36.990] <TB3> INFO: 6469750 events read in total (159319ms).
[12:38:01.103] <TB3> INFO: 7391550 events read in total (183432ms).
[12:38:25.186] <TB3> INFO: 8308100 events read in total (207515ms).
[12:38:49.027] <TB3> INFO: 9226950 events read in total (231356ms).
[12:39:13.092] <TB3> INFO: 10143250 events read in total (255421ms).
[12:39:36.920] <TB3> INFO: 11061250 events read in total (279249ms).
[12:40:00.878] <TB3> INFO: 11976600 events read in total (303207ms).
[12:40:24.775] <TB3> INFO: 12892700 events read in total (327104ms).
[12:40:48.726] <TB3> INFO: 13808250 events read in total (351055ms).
[12:41:12.797] <TB3> INFO: 14723000 events read in total (375126ms).
[12:41:36.716] <TB3> INFO: 15636100 events read in total (399045ms).
[12:42:00.698] <TB3> INFO: 16542050 events read in total (423027ms).
[12:42:24.909] <TB3> INFO: 17449350 events read in total (447238ms).
[12:42:48.897] <TB3> INFO: 18354250 events read in total (471226ms).
[12:43:12.682] <TB3> INFO: 19259000 events read in total (495011ms).
[12:43:36.781] <TB3> INFO: 20162550 events read in total (519110ms).
[12:44:00.679] <TB3> INFO: 21067000 events read in total (543008ms).
[12:44:24.644] <TB3> INFO: 21969500 events read in total (566973ms).
[12:44:48.656] <TB3> INFO: 22873400 events read in total (590985ms).
[12:45:12.624] <TB3> INFO: 23773900 events read in total (614953ms).
[12:45:36.415] <TB3> INFO: 24678650 events read in total (638744ms).
[12:46:00.170] <TB3> INFO: 25580250 events read in total (662499ms).
[12:46:24.174] <TB3> INFO: 26481100 events read in total (686503ms).
[12:46:48.196] <TB3> INFO: 27381950 events read in total (710525ms).
[12:47:12.119] <TB3> INFO: 28287150 events read in total (734448ms).
[12:47:36.289] <TB3> INFO: 29189200 events read in total (758618ms).
[12:48:00.288] <TB3> INFO: 30094600 events read in total (782617ms).
[12:48:24.225] <TB3> INFO: 31007300 events read in total (806554ms).
[12:48:29.582] <TB3> INFO: 31200000 events read in total (811911ms).
[12:48:29.618] <TB3> INFO: Test took 812976ms.
[12:48:29.708] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:29.832] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:48:31.620] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:48:33.187] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:48:34.933] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:48:36.574] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:48:38.023] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:48:39.489] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:48:40.956] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:48:42.447] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:48:43.882] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:48:45.341] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:48:46.817] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:48:48.245] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:48:49.740] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:48:51.240] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:48:52.695] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:48:54.163] <TB3> INFO: PixTestScurves::scurves() done
[12:48:54.163] <TB3> INFO: Vcal mean: 82.19 80.29 80.90 82.00 94.67 83.67 84.52 77.77 97.86 84.61 81.79 95.64 88.95 75.78 83.90 101.67
[12:48:54.163] <TB3> INFO: Vcal RMS: 4.90 5.12 4.23 4.55 5.85 4.62 4.80 4.24 5.79 5.31 4.42 6.00 5.36 4.51 4.71 5.31
[12:48:54.163] <TB3> INFO: PixTestScurves::fullTest() done, duration: 837 seconds
[12:48:54.239] <TB3> INFO: ######################################################################
[12:48:54.239] <TB3> INFO: PixTestTrim::doTest()
[12:48:54.239] <TB3> INFO: ######################################################################
[12:48:54.241] <TB3> INFO: ----------------------------------------------------------------------
[12:48:54.241] <TB3> INFO: PixTestTrim::trimTest() ntrig = 20, vcal = 35
[12:48:54.241] <TB3> INFO: ----------------------------------------------------------------------
[12:48:54.326] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:48:54.326] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[12:48:54.335] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[12:48:54.335] <TB3> INFO: run 1 of 1
[12:48:54.641] <TB3> INFO: Expecting 13312000 events.
[12:49:23.325] <TB3> INFO: 1081040 events read in total (27962ms).
[12:49:50.532] <TB3> INFO: 2156400 events read in total (55169ms).
[12:50:16.959] <TB3> INFO: 3230560 events read in total (81596ms).
[12:50:44.874] <TB3> INFO: 4300600 events read in total (109511ms).
[12:51:12.716] <TB3> INFO: 5368040 events read in total (137353ms).
[12:51:40.464] <TB3> INFO: 6430460 events read in total (165101ms).
[12:52:08.321] <TB3> INFO: 7496580 events read in total (192958ms).
[12:52:36.185] <TB3> INFO: 8566960 events read in total (220822ms).
[12:53:03.862] <TB3> INFO: 9637200 events read in total (248499ms).
[12:53:31.894] <TB3> INFO: 10709760 events read in total (276531ms).
[12:53:59.637] <TB3> INFO: 11781180 events read in total (304274ms).
[12:54:27.397] <TB3> INFO: 12851720 events read in total (332034ms).
[12:54:39.488] <TB3> INFO: 13312000 events read in total (344125ms).
[12:54:39.520] <TB3> INFO: Test took 345185ms.
[12:54:39.574] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:59.341] <TB3> INFO: ROC 0 VthrComp = 88
[12:54:59.341] <TB3> INFO: ROC 1 VthrComp = 86
[12:54:59.341] <TB3> INFO: ROC 2 VthrComp = 86
[12:54:59.341] <TB3> INFO: ROC 3 VthrComp = 94
[12:54:59.342] <TB3> INFO: ROC 4 VthrComp = 99
[12:54:59.342] <TB3> INFO: ROC 5 VthrComp = 88
[12:54:59.342] <TB3> INFO: ROC 6 VthrComp = 93
[12:54:59.342] <TB3> INFO: ROC 7 VthrComp = 83
[12:54:59.342] <TB3> INFO: ROC 8 VthrComp = 101
[12:54:59.342] <TB3> INFO: ROC 9 VthrComp = 89
[12:54:59.342] <TB3> INFO: ROC 10 VthrComp = 87
[12:54:59.342] <TB3> INFO: ROC 11 VthrComp = 99
[12:54:59.342] <TB3> INFO: ROC 12 VthrComp = 92
[12:54:59.342] <TB3> INFO: ROC 13 VthrComp = 84
[12:54:59.342] <TB3> INFO: ROC 14 VthrComp = 88
[12:54:59.342] <TB3> INFO: ROC 15 VthrComp = 105
[12:54:59.343] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:54:59.343] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[12:54:59.352] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[12:54:59.352] <TB3> INFO: run 1 of 1
[12:54:59.658] <TB3> INFO: Expecting 13312000 events.
[12:55:25.530] <TB3> INFO: 779620 events read in total (25156ms).
[12:55:50.674] <TB3> INFO: 1555060 events read in total (50300ms).
[12:56:15.501] <TB3> INFO: 2329940 events read in total (75127ms).
[12:56:40.351] <TB3> INFO: 3105380 events read in total (99977ms).
[12:57:03.665] <TB3> INFO: 3880380 events read in total (123291ms).
[12:57:28.808] <TB3> INFO: 4655600 events read in total (148434ms).
[12:57:53.722] <TB3> INFO: 5430800 events read in total (173348ms).
[12:58:18.735] <TB3> INFO: 6206460 events read in total (198361ms).
[12:58:43.827] <TB3> INFO: 6978660 events read in total (223453ms).
[12:59:08.620] <TB3> INFO: 7748500 events read in total (248246ms).
[12:59:33.592] <TB3> INFO: 8515940 events read in total (273218ms).
[12:59:58.582] <TB3> INFO: 9282860 events read in total (298208ms).
[13:00:23.326] <TB3> INFO: 10048480 events read in total (322952ms).
[13:00:48.263] <TB3> INFO: 10814340 events read in total (347889ms).
[13:01:13.143] <TB3> INFO: 11578560 events read in total (372769ms).
[13:01:37.972] <TB3> INFO: 12344340 events read in total (397598ms).
[13:02:02.983] <TB3> INFO: 13110200 events read in total (422609ms).
[13:02:09.847] <TB3> INFO: 13312000 events read in total (429473ms).
[13:02:09.886] <TB3> INFO: Test took 430534ms.
[13:02:10.027] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:32.581] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 58.6938 for pixel 1/63 mean/min/max = 45.7359/32.6411/58.8306
[13:02:32.581] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 59.1231 for pixel 11/67 mean/min/max = 45.2413/31.221/59.2616
[13:02:32.582] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 56.5979 for pixel 22/9 mean/min/max = 44.5809/32.3355/56.8263
[13:02:32.582] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 56.2914 for pixel 20/79 mean/min/max = 44.2273/32.1175/56.3371
[13:02:32.582] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 59.9964 for pixel 0/73 mean/min/max = 45.4974/30.9891/60.0056
[13:02:32.582] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 58.3108 for pixel 14/5 mean/min/max = 45.7639/33.1764/58.3514
[13:02:32.583] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 56.3121 for pixel 12/79 mean/min/max = 44.4399/32.2879/56.5919
[13:02:32.583] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 56.8857 for pixel 1/57 mean/min/max = 44.8187/32.6616/56.9758
[13:02:32.583] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 60.6536 for pixel 14/79 mean/min/max = 46.0499/31.4324/60.6674
[13:02:32.583] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 59.9097 for pixel 2/1 mean/min/max = 46.1353/32.3513/59.9193
[13:02:32.584] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 57.6794 for pixel 19/5 mean/min/max = 45.1351/32.584/57.6862
[13:02:32.584] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 62.3239 for pixel 0/65 mean/min/max = 47.0053/31.5552/62.4555
[13:02:32.585] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 59.6533 for pixel 8/46 mean/min/max = 46.1237/32.3863/59.8612
[13:02:32.585] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 56.9348 for pixel 9/79 mean/min/max = 44.7951/32.472/57.1182
[13:02:32.585] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 58.6784 for pixel 41/9 mean/min/max = 46.2566/33.731/58.7823
[13:02:32.585] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 60.0836 for pixel 49/63 mean/min/max = 46.913/33.6835/60.1426
[13:02:32.586] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:32.717] <TB3> INFO: Expecting 1029120 events.
[13:02:56.943] <TB3> INFO: 1029120 events read in total (23506ms).
[13:02:56.948] <TB3> INFO: Expecting 1029120 events.
[13:03:20.976] <TB3> INFO: 1029120 events read in total (23488ms).
[13:03:20.984] <TB3> INFO: Expecting 1029120 events.
[13:03:45.114] <TB3> INFO: 1029120 events read in total (23598ms).
[13:03:45.124] <TB3> INFO: Expecting 1029120 events.
[13:04:09.116] <TB3> INFO: 1029120 events read in total (23464ms).
[13:04:09.129] <TB3> INFO: Expecting 1029120 events.
[13:04:32.822] <TB3> INFO: 1029120 events read in total (23166ms).
[13:04:32.836] <TB3> INFO: Expecting 1029120 events.
[13:04:56.547] <TB3> INFO: 1029120 events read in total (23173ms).
[13:04:56.563] <TB3> INFO: Expecting 1029120 events.
[13:05:19.125] <TB3> INFO: 1029120 events read in total (22027ms).
[13:05:19.148] <TB3> INFO: Expecting 1029120 events.
[13:05:40.875] <TB3> INFO: 1029120 events read in total (21199ms).
[13:05:40.895] <TB3> INFO: Expecting 1029120 events.
[13:06:02.964] <TB3> INFO: 1029120 events read in total (21535ms).
[13:06:02.986] <TB3> INFO: Expecting 1029120 events.
[13:06:24.972] <TB3> INFO: 1029120 events read in total (21455ms).
[13:06:24.997] <TB3> INFO: Expecting 1029120 events.
[13:06:48.520] <TB3> INFO: 1029120 events read in total (22996ms).
[13:06:48.545] <TB3> INFO: Expecting 1029120 events.
[13:07:12.278] <TB3> INFO: 1029120 events read in total (23206ms).
[13:07:12.307] <TB3> INFO: Expecting 1029120 events.
[13:07:36.358] <TB3> INFO: 1029120 events read in total (23524ms).
[13:07:36.388] <TB3> INFO: Expecting 1029120 events.
[13:08:00.353] <TB3> INFO: 1029120 events read in total (23438ms).
[13:08:00.383] <TB3> INFO: Expecting 1029120 events.
[13:08:24.529] <TB3> INFO: 1029120 events read in total (23619ms).
[13:08:24.565] <TB3> INFO: Expecting 1029120 events.
[13:08:48.715] <TB3> INFO: 1029120 events read in total (23623ms).
[13:08:48.749] <TB3> INFO: Test took 376163ms.
[13:08:49.806] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 20 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[13:08:49.815] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[13:08:49.815] <TB3> INFO: run 1 of 1
[13:08:50.120] <TB3> INFO: Expecting 16640000 events.
[13:09:15.574] <TB3> INFO: 725580 events read in total (24737ms).
[13:09:40.123] <TB3> INFO: 1447700 events read in total (49286ms).
[13:10:04.597] <TB3> INFO: 2169580 events read in total (73760ms).
[13:10:29.139] <TB3> INFO: 2891320 events read in total (98302ms).
[13:10:53.782] <TB3> INFO: 3613620 events read in total (122945ms).
[13:11:18.458] <TB3> INFO: 4335580 events read in total (147621ms).
[13:11:43.169] <TB3> INFO: 5057720 events read in total (172332ms).
[13:12:07.679] <TB3> INFO: 5780000 events read in total (196842ms).
[13:12:31.792] <TB3> INFO: 6502460 events read in total (220955ms).
[13:12:56.351] <TB3> INFO: 7224360 events read in total (245514ms).
[13:13:20.839] <TB3> INFO: 7946740 events read in total (270002ms).
[13:13:45.472] <TB3> INFO: 8666540 events read in total (294635ms).
[13:14:09.939] <TB3> INFO: 9384600 events read in total (319102ms).
[13:14:34.335] <TB3> INFO: 10101300 events read in total (343498ms).
[13:14:58.690] <TB3> INFO: 10817140 events read in total (367853ms).
[13:15:23.202] <TB3> INFO: 11533200 events read in total (392365ms).
[13:15:47.567] <TB3> INFO: 12248220 events read in total (416730ms).
[13:16:11.979] <TB3> INFO: 12962620 events read in total (441142ms).
[13:16:36.477] <TB3> INFO: 13677240 events read in total (465640ms).
[13:17:00.665] <TB3> INFO: 14390560 events read in total (489828ms).
[13:17:25.304] <TB3> INFO: 15105980 events read in total (514467ms).
[13:17:49.902] <TB3> INFO: 15820600 events read in total (539065ms).
[13:18:14.313] <TB3> INFO: 16535880 events read in total (563476ms).
[13:18:18.306] <TB3> INFO: 16640000 events read in total (567469ms).
[13:18:18.371] <TB3> INFO: Test took 568556ms.
[13:18:18.581] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:43.973] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.175343 .. 72.927752
[13:18:44.054] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 0 .. 82 (-1/-1) hits flags = 16 (plus default)
[13:18:44.064] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[13:18:44.064] <TB3> INFO: run 1 of 1
[13:18:44.386] <TB3> INFO: Expecting 6905600 events.
[13:19:10.772] <TB3> INFO: 839760 events read in total (25666ms).
[13:19:36.594] <TB3> INFO: 1679700 events read in total (51488ms).
[13:20:02.261] <TB3> INFO: 2521240 events read in total (77155ms).
[13:20:28.020] <TB3> INFO: 3362300 events read in total (102914ms).
[13:20:53.555] <TB3> INFO: 4202720 events read in total (128449ms).
[13:21:19.324] <TB3> INFO: 5040080 events read in total (154218ms).
[13:21:44.849] <TB3> INFO: 5874860 events read in total (179743ms).
[13:22:10.245] <TB3> INFO: 6709480 events read in total (205139ms).
[13:22:16.625] <TB3> INFO: 6905600 events read in total (211519ms).
[13:22:16.645] <TB3> INFO: Test took 212581ms.
[13:22:16.704] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:33.823] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 15.088088 .. 57.127940
[13:22:33.903] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 5 .. 67 (-1/-1) hits flags = 16 (plus default)
[13:22:33.912] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[13:22:33.912] <TB3> INFO: run 1 of 1
[13:22:34.225] <TB3> INFO: Expecting 5241600 events.
[13:23:00.387] <TB3> INFO: 870260 events read in total (25445ms).
[13:23:24.318] <TB3> INFO: 1740840 events read in total (49376ms).
[13:23:50.340] <TB3> INFO: 2611360 events read in total (75398ms).
[13:24:16.463] <TB3> INFO: 3480620 events read in total (101521ms).
[13:24:42.344] <TB3> INFO: 4348940 events read in total (127402ms).
[13:25:08.486] <TB3> INFO: 5216660 events read in total (153544ms).
[13:25:09.720] <TB3> INFO: 5241600 events read in total (154778ms).
[13:25:09.738] <TB3> INFO: Test took 155826ms.
[13:25:09.782] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:23.745] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 18.722467 .. 50.080839
[13:25:23.820] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 8 .. 60 (-1/-1) hits flags = 16 (plus default)
[13:25:23.829] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[13:25:23.829] <TB3> INFO: run 1 of 1
[13:25:24.132] <TB3> INFO: Expecting 4409600 events.
[13:25:51.120] <TB3> INFO: 891400 events read in total (26271ms).
[13:26:17.249] <TB3> INFO: 1783280 events read in total (52400ms).
[13:26:42.437] <TB3> INFO: 2674680 events read in total (77588ms).
[13:27:08.557] <TB3> INFO: 3565060 events read in total (103708ms).
[13:27:33.544] <TB3> INFO: 4409600 events read in total (128695ms).
[13:27:33.562] <TB3> INFO: Test took 129733ms.
[13:27:33.603] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:47.408] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 20.861970 .. 50.080839
[13:27:47.492] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 10 .. 60 (-1/-1) hits flags = 16 (plus default)
[13:27:47.501] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[13:27:47.501] <TB3> INFO: run 1 of 1
[13:27:47.819] <TB3> INFO: Expecting 4243200 events.
[13:28:14.643] <TB3> INFO: 880100 events read in total (26107ms).
[13:28:40.399] <TB3> INFO: 1760320 events read in total (51863ms).
[13:29:06.148] <TB3> INFO: 2640520 events read in total (77612ms).
[13:29:32.198] <TB3> INFO: 3520700 events read in total (103662ms).
[13:29:53.719] <TB3> INFO: 4243200 events read in total (125183ms).
[13:29:53.733] <TB3> INFO: Test took 126232ms.
[13:29:53.769] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:08.286] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:30:08.286] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 20 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[13:30:08.295] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[13:30:08.295] <TB3> INFO: run 1 of 1
[13:30:08.610] <TB3> INFO: Expecting 3411200 events.
[13:30:35.497] <TB3> INFO: 879640 events read in total (26171ms).
[13:30:59.381] <TB3> INFO: 1759480 events read in total (50055ms).
[13:31:24.582] <TB3> INFO: 2639040 events read in total (75256ms).
[13:31:47.708] <TB3> INFO: 3411200 events read in total (98382ms).
[13:31:47.730] <TB3> INFO: Test took 99436ms.
[13:31:47.769] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:00.884] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:32:00.884] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:32:00.884] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:32:00.884] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:32:00.885] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:32:00.885] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:32:00.885] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:32:00.885] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:32:00.885] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:32:00.885] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:32:00.885] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:32:00.885] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:32:00.885] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:32:00.886] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:32:00.886] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:32:00.886] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:32:00.886] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//trimParameters35_C0.dat
[13:32:00.892] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//trimParameters35_C1.dat
[13:32:00.898] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//trimParameters35_C2.dat
[13:32:00.904] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//trimParameters35_C3.dat
[13:32:00.910] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//trimParameters35_C4.dat
[13:32:00.916] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//trimParameters35_C5.dat
[13:32:00.922] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//trimParameters35_C6.dat
[13:32:00.929] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//trimParameters35_C7.dat
[13:32:00.935] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//trimParameters35_C8.dat
[13:32:00.941] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//trimParameters35_C9.dat
[13:32:00.947] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//trimParameters35_C10.dat
[13:32:00.953] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//trimParameters35_C11.dat
[13:32:00.959] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//trimParameters35_C12.dat
[13:32:00.966] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//trimParameters35_C13.dat
[13:32:00.972] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//trimParameters35_C14.dat
[13:32:00.978] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//trimParameters35_C15.dat
[13:32:00.984] <TB3> INFO: PixTestTrim::trimTest() done
[13:32:00.984] <TB3> INFO: vtrim: 104 111 101 101 92 96 88 92 105 107 97 101 110 94 106 107
[13:32:00.984] <TB3> INFO: vthrcomp: 88 86 86 94 99 88 93 83 101 89 87 99 92 84 88 105
[13:32:00.984] <TB3> INFO: vcal mean: 34.99 34.99 34.97 34.97 34.98 35.02 34.96 34.95 34.99 34.95 34.99 35.00 34.99 34.98 35.04 35.02
[13:32:00.984] <TB3> INFO: vcal RMS: 0.68 0.75 0.70 0.67 0.79 0.68 0.64 0.63 0.73 0.73 0.69 0.75 0.69 0.64 0.68 0.70
[13:32:00.984] <TB3> INFO: bits mean: 9.21 9.56 9.56 9.34 9.09 9.22 8.98 9.01 8.90 8.74 9.32 8.50 9.06 8.91 8.88 8.62
[13:32:00.984] <TB3> INFO: bits RMS: 2.74 2.79 2.67 2.88 2.98 2.69 2.96 2.82 3.00 2.95 2.75 3.10 2.78 2.94 2.72 2.72
[13:32:00.991] <TB3> INFO: ----------------------------------------------------------------------
[13:32:00.991] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:32:00.991] <TB3> INFO: ----------------------------------------------------------------------
[13:32:00.994] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[13:32:01.003] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[13:32:01.003] <TB3> INFO: run 1 of 1
[13:32:01.307] <TB3> INFO: Expecting 8320000 events.
[13:32:31.354] <TB3> INFO: 915920 events read in total (29331ms).
[13:33:00.361] <TB3> INFO: 1823850 events read in total (58338ms).
[13:33:29.517] <TB3> INFO: 2729840 events read in total (87494ms).
[13:33:58.510] <TB3> INFO: 3633560 events read in total (116487ms).
[13:34:27.526] <TB3> INFO: 4532990 events read in total (145503ms).
[13:34:54.158] <TB3> INFO: 5427370 events read in total (172136ms).
[13:35:20.668] <TB3> INFO: 6320550 events read in total (198645ms).
[13:35:47.504] <TB3> INFO: 7213390 events read in total (225481ms).
[13:36:14.275] <TB3> INFO: 8107670 events read in total (252252ms).
[13:36:21.005] <TB3> INFO: 8320000 events read in total (258982ms).
[13:36:21.058] <TB3> INFO: Test took 260055ms.
[13:36:21.202] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:48.237] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 167 (-1/-1) hits flags = 16 (plus default)
[13:36:48.245] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[13:36:48.245] <TB3> INFO: run 1 of 1
[13:36:48.549] <TB3> INFO: Expecting 6988800 events.
[13:37:18.963] <TB3> INFO: 948480 events read in total (29698ms).
[13:37:48.776] <TB3> INFO: 1886890 events read in total (59511ms).
[13:38:18.633] <TB3> INFO: 2822620 events read in total (89368ms).
[13:38:45.519] <TB3> INFO: 3752710 events read in total (116254ms).
[13:39:14.279] <TB3> INFO: 4675260 events read in total (145014ms).
[13:39:42.377] <TB3> INFO: 5596820 events read in total (173112ms).
[13:40:10.786] <TB3> INFO: 6518030 events read in total (201521ms).
[13:40:26.079] <TB3> INFO: 6988800 events read in total (216814ms).
[13:40:26.112] <TB3> INFO: Test took 217867ms.
[13:40:26.201] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:48.896] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 154 (-1/-1) hits flags = 16 (plus default)
[13:40:48.905] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[13:40:48.905] <TB3> INFO: run 1 of 1
[13:40:49.209] <TB3> INFO: Expecting 6448000 events.
[13:41:18.719] <TB3> INFO: 982210 events read in total (28794ms).
[13:41:48.748] <TB3> INFO: 1954140 events read in total (58824ms).
[13:42:18.738] <TB3> INFO: 2921850 events read in total (88813ms).
[13:42:48.739] <TB3> INFO: 3879680 events read in total (118814ms).
[13:43:18.435] <TB3> INFO: 4832310 events read in total (148510ms).
[13:43:48.376] <TB3> INFO: 5784170 events read in total (178451ms).
[13:44:08.215] <TB3> INFO: 6448000 events read in total (198290ms).
[13:44:08.248] <TB3> INFO: Test took 199343ms.
[13:44:08.317] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:32.766] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 154 (-1/-1) hits flags = 16 (plus default)
[13:44:32.775] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[13:44:32.775] <TB3> INFO: run 1 of 1
[13:44:33.093] <TB3> INFO: Expecting 6448000 events.
[13:45:04.048] <TB3> INFO: 981940 events read in total (30239ms).
[13:45:31.955] <TB3> INFO: 1953490 events read in total (58146ms).
[13:46:01.259] <TB3> INFO: 2921200 events read in total (87450ms).
[13:46:31.168] <TB3> INFO: 3878660 events read in total (117359ms).
[13:47:01.259] <TB3> INFO: 4830750 events read in total (147450ms).
[13:47:31.118] <TB3> INFO: 5782530 events read in total (177309ms).
[13:47:51.668] <TB3> INFO: 6448000 events read in total (197859ms).
[13:47:51.700] <TB3> INFO: Test took 198924ms.
[13:47:51.769] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:13.702] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 155 (-1/-1) hits flags = 16 (plus default)
[13:48:13.710] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[13:48:13.710] <TB3> INFO: run 1 of 1
[13:48:14.026] <TB3> INFO: Expecting 6489600 events.
[13:48:44.430] <TB3> INFO: 978360 events read in total (29688ms).
[13:49:14.308] <TB3> INFO: 1946840 events read in total (59566ms).
[13:49:44.073] <TB3> INFO: 2911560 events read in total (89331ms).
[13:50:13.669] <TB3> INFO: 3866160 events read in total (118927ms).
[13:50:40.947] <TB3> INFO: 4815540 events read in total (146205ms).
[13:51:10.639] <TB3> INFO: 5764960 events read in total (175897ms).
[13:51:33.227] <TB3> INFO: 6489600 events read in total (198485ms).
[13:51:33.254] <TB3> INFO: Test took 199544ms.
[13:51:33.324] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:57.331] <TB3> INFO: PixTestTrim::trimBitTest() done
[13:51:57.333] <TB3> INFO: PixTestTrim::doTest() done, duration: 3783 seconds
[13:51:58.041] <TB3> INFO: ######################################################################
[13:51:58.041] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:51:58.041] <TB3> INFO: ######################################################################
[13:51:58.346] <TB3> INFO: Expecting 41600 events.
[13:52:02.654] <TB3> INFO: 41600 events read in total (3592ms).
[13:52:02.655] <TB3> INFO: Test took 4613ms.
[13:52:02.663] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:03.232] <TB3> INFO: Expecting 41600 events.
[13:52:07.568] <TB3> INFO: 41600 events read in total (3619ms).
[13:52:07.568] <TB3> INFO: Test took 4652ms.
[13:52:07.575] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:07.925] <TB3> INFO: Expecting 41600 events.
[13:52:12.280] <TB3> INFO: 41600 events read in total (3639ms).
[13:52:12.281] <TB3> INFO: Test took 4680ms.
[13:52:12.287] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:12.293] <TB3> INFO: The DUT currently contains the following objects:
[13:52:12.294] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:52:12.294] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:52:12.294] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:52:12.310] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:52:12.310] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:12.310] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:12.310] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:12.310] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:12.310] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:12.310] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:12.310] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:12.310] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:12.310] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:12.310] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:12.310] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:12.310] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:12.310] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:12.310] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:12.310] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:12.310] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:12.637] <TB3> INFO: Expecting 2560 events.
[13:52:13.700] <TB3> INFO: 2560 events read in total (347ms).
[13:52:13.700] <TB3> INFO: Test took 1390ms.
[13:52:13.700] <TB3> INFO: The DUT currently contains the following objects:
[13:52:13.700] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:52:13.700] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:52:13.700] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:52:13.700] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:52:13.700] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:13.701] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:13.701] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:13.701] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:13.701] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:13.701] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:13.701] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:13.701] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:13.701] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:13.701] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:13.701] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:13.701] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:13.701] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:13.701] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:13.701] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:13.701] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:14.115] <TB3> INFO: Expecting 2560 events.
[13:52:15.176] <TB3> INFO: 2560 events read in total (345ms).
[13:52:15.176] <TB3> INFO: Test took 1475ms.
[13:52:15.177] <TB3> INFO: The DUT currently contains the following objects:
[13:52:15.177] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:52:15.177] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:52:15.177] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:52:15.177] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:52:15.177] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:15.177] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:15.177] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:15.177] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:15.177] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:15.177] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:15.177] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:15.177] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:15.177] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:15.177] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:15.177] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:15.177] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:15.177] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:15.177] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:15.177] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:15.177] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:15.591] <TB3> INFO: Expecting 2560 events.
[13:52:16.652] <TB3> INFO: 2560 events read in total (345ms).
[13:52:16.652] <TB3> INFO: Test took 1475ms.
[13:52:16.652] <TB3> INFO: The DUT currently contains the following objects:
[13:52:16.653] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:52:16.653] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:52:16.653] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:52:16.653] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:52:16.653] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:16.653] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:16.653] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:16.653] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:16.653] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:16.653] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:16.653] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:16.653] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:16.653] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:16.653] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:16.653] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:16.653] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:16.653] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:16.653] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:16.653] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:16.653] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:17.067] <TB3> INFO: Expecting 2560 events.
[13:52:18.130] <TB3> INFO: 2560 events read in total (347ms).
[13:52:18.130] <TB3> INFO: Test took 1477ms.
[13:52:18.131] <TB3> INFO: The DUT currently contains the following objects:
[13:52:18.131] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:52:18.131] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:52:18.131] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:52:18.131] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:52:18.131] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:18.131] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:18.131] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:18.131] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:18.131] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:18.131] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:18.131] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:18.131] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:18.131] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:18.131] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:18.131] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:18.131] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:18.131] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:18.131] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:18.131] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:18.131] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:18.545] <TB3> INFO: Expecting 2560 events.
[13:52:19.608] <TB3> INFO: 2560 events read in total (347ms).
[13:52:19.609] <TB3> INFO: Test took 1478ms.
[13:52:19.609] <TB3> INFO: The DUT currently contains the following objects:
[13:52:19.609] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:52:19.609] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:52:19.609] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:52:19.609] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:52:19.609] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:19.609] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:19.609] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:19.609] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:19.609] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:19.609] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:19.609] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:19.609] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:19.609] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:19.609] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:19.609] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:19.609] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:19.609] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:19.609] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:19.609] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:19.609] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:20.023] <TB3> INFO: Expecting 2560 events.
[13:52:21.087] <TB3> INFO: 2560 events read in total (348ms).
[13:52:21.087] <TB3> INFO: Test took 1478ms.
[13:52:21.088] <TB3> INFO: The DUT currently contains the following objects:
[13:52:21.088] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:52:21.088] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:52:21.088] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:52:21.088] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:52:21.088] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:21.088] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:21.088] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:21.088] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:21.088] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:21.088] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:21.088] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:21.088] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:21.088] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:21.088] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:21.088] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:21.088] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:21.088] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:21.088] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:21.088] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:21.088] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:21.502] <TB3> INFO: Expecting 2560 events.
[13:52:22.566] <TB3> INFO: 2560 events read in total (348ms).
[13:52:22.566] <TB3> INFO: Test took 1478ms.
[13:52:22.566] <TB3> INFO: The DUT currently contains the following objects:
[13:52:22.566] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:52:22.566] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:52:22.566] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:52:22.566] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:52:22.566] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:22.566] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:22.566] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:22.567] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:22.567] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:22.567] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:22.567] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:22.567] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:22.567] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:22.567] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:22.567] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:22.567] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:22.567] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:22.567] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:22.567] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:22.567] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:22.981] <TB3> INFO: Expecting 2560 events.
[13:52:24.044] <TB3> INFO: 2560 events read in total (347ms).
[13:52:24.044] <TB3> INFO: Test took 1477ms.
[13:52:24.045] <TB3> INFO: The DUT currently contains the following objects:
[13:52:24.045] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:52:24.045] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:52:24.045] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:52:24.045] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:52:24.045] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:24.045] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:24.045] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:24.045] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:24.045] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:24.045] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:24.045] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:24.045] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:24.045] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:24.045] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:24.045] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:24.045] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:24.045] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:24.045] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:24.045] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:24.045] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:24.460] <TB3> INFO: Expecting 2560 events.
[13:52:25.530] <TB3> INFO: 2560 events read in total (354ms).
[13:52:25.530] <TB3> INFO: Test took 1485ms.
[13:52:25.530] <TB3> INFO: The DUT currently contains the following objects:
[13:52:25.530] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:52:25.530] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:52:25.530] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:52:25.530] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:52:25.530] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:25.531] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:25.531] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:25.531] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:25.531] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:25.531] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:25.531] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:25.531] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:25.531] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:25.531] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:25.531] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:25.531] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:25.531] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:25.531] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:25.531] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:25.531] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:25.945] <TB3> INFO: Expecting 2560 events.
[13:52:27.014] <TB3> INFO: 2560 events read in total (353ms).
[13:52:27.015] <TB3> INFO: Test took 1484ms.
[13:52:27.015] <TB3> INFO: The DUT currently contains the following objects:
[13:52:27.015] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:52:27.015] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:52:27.015] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:52:27.015] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:52:27.015] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:27.015] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:27.015] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:27.015] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:27.015] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:27.015] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:27.015] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:27.015] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:27.015] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:27.015] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:27.015] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:27.015] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:27.015] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:27.015] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:27.015] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:27.015] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:27.430] <TB3> INFO: Expecting 2560 events.
[13:52:28.499] <TB3> INFO: 2560 events read in total (353ms).
[13:52:28.499] <TB3> INFO: Test took 1484ms.
[13:52:28.499] <TB3> INFO: The DUT currently contains the following objects:
[13:52:28.499] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:52:28.499] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:52:28.500] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:52:28.500] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:52:28.500] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:28.500] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:28.500] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:28.500] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:28.500] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:28.500] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:28.500] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:28.500] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:28.500] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:28.500] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:28.500] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:28.500] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:28.500] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:28.500] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:28.500] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:28.500] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:28.914] <TB3> INFO: Expecting 2560 events.
[13:52:29.998] <TB3> INFO: 2560 events read in total (368ms).
[13:52:29.998] <TB3> INFO: Test took 1498ms.
[13:52:29.999] <TB3> INFO: The DUT currently contains the following objects:
[13:52:29.999] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:52:29.999] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:52:29.999] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:52:29.999] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:52:29.999] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:29.999] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:29.999] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:29.999] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:29.999] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:29.999] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:29.999] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:29.999] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:29.999] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:29.999] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:29.999] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:29.999] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:29.999] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:29.999] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:29.999] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:30.000] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:30.412] <TB3> INFO: Expecting 2560 events.
[13:52:31.483] <TB3> INFO: 2560 events read in total (354ms).
[13:52:31.484] <TB3> INFO: Test took 1484ms.
[13:52:31.484] <TB3> INFO: The DUT currently contains the following objects:
[13:52:31.484] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:52:31.484] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:52:31.484] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:52:31.484] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:52:31.484] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:31.484] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:31.484] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:31.484] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:31.484] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:31.484] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:31.484] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:31.484] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:31.484] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:31.484] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:31.484] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:31.484] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:31.484] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:31.484] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:31.484] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:31.484] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:31.899] <TB3> INFO: Expecting 2560 events.
[13:52:32.969] <TB3> INFO: 2560 events read in total (354ms).
[13:52:32.969] <TB3> INFO: Test took 1485ms.
[13:52:32.970] <TB3> INFO: The DUT currently contains the following objects:
[13:52:32.970] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:52:32.970] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:52:32.970] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:52:32.970] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:52:32.970] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:32.970] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:32.970] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:32.970] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:32.970] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:32.970] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:32.970] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:32.970] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:32.970] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:32.971] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:32.971] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:32.971] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:32.971] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:32.971] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:32.971] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:32.971] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:33.385] <TB3> INFO: Expecting 2560 events.
[13:52:34.454] <TB3> INFO: 2560 events read in total (353ms).
[13:52:34.454] <TB3> INFO: Test took 1483ms.
[13:52:34.455] <TB3> INFO: The DUT currently contains the following objects:
[13:52:34.455] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:52:34.455] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:52:34.455] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:52:34.455] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:52:34.455] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:34.455] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:34.455] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:34.455] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:34.455] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:34.455] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:34.455] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:34.455] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:34.455] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:34.455] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:34.455] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:34.455] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:34.455] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:34.455] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:34.455] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:34.456] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:52:34.870] <TB3> INFO: Expecting 2560 events.
[13:52:35.953] <TB3> INFO: 2560 events read in total (367ms).
[13:52:35.953] <TB3> INFO: Test took 1497ms.
[13:52:35.958] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:36.370] <TB3> INFO: Expecting 655360 events.
[13:52:53.039] <TB3> INFO: 655360 events read in total (15953ms).
[13:52:53.048] <TB3> INFO: Expecting 655360 events.
[13:53:09.595] <TB3> INFO: 655360 events read in total (16019ms).
[13:53:09.608] <TB3> INFO: Expecting 655360 events.
[13:53:26.118] <TB3> INFO: 655360 events read in total (15982ms).
[13:53:26.135] <TB3> INFO: Expecting 655360 events.
[13:53:42.741] <TB3> INFO: 655360 events read in total (16078ms).
[13:53:42.759] <TB3> INFO: Expecting 655360 events.
[13:53:59.416] <TB3> INFO: 655360 events read in total (16129ms).
[13:53:59.441] <TB3> INFO: Expecting 655360 events.
[13:54:15.949] <TB3> INFO: 655360 events read in total (15980ms).
[13:54:15.976] <TB3> INFO: Expecting 655360 events.
[13:54:31.177] <TB3> INFO: 655360 events read in total (14673ms).
[13:54:31.207] <TB3> INFO: Expecting 655360 events.
[13:54:46.190] <TB3> INFO: 655360 events read in total (14455ms).
[13:54:46.223] <TB3> INFO: Expecting 655360 events.
[13:55:02.594] <TB3> INFO: 655360 events read in total (15844ms).
[13:55:02.633] <TB3> INFO: Expecting 655360 events.
[13:55:17.739] <TB3> INFO: 655360 events read in total (14579ms).
[13:55:17.781] <TB3> INFO: Expecting 655360 events.
[13:55:33.811] <TB3> INFO: 655360 events read in total (15503ms).
[13:55:33.860] <TB3> INFO: Expecting 655360 events.
[13:55:50.324] <TB3> INFO: 655360 events read in total (15936ms).
[13:55:50.372] <TB3> INFO: Expecting 655360 events.
[13:56:05.920] <TB3> INFO: 655360 events read in total (15021ms).
[13:56:05.978] <TB3> INFO: Expecting 655360 events.
[13:56:20.961] <TB3> INFO: 655360 events read in total (14456ms).
[13:56:21.015] <TB3> INFO: Expecting 655360 events.
[13:56:37.357] <TB3> INFO: 655360 events read in total (15814ms).
[13:56:37.414] <TB3> INFO: Expecting 655360 events.
[13:56:53.778] <TB3> INFO: 655360 events read in total (15836ms).
[13:56:53.841] <TB3> INFO: Test took 257883ms.
[13:56:53.927] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:56:54.234] <TB3> INFO: Expecting 655360 events.
[13:57:11.023] <TB3> INFO: 655360 events read in total (16073ms).
[13:57:11.032] <TB3> INFO: Expecting 655360 events.
[13:57:27.524] <TB3> INFO: 655360 events read in total (15964ms).
[13:57:27.537] <TB3> INFO: Expecting 655360 events.
[13:57:44.074] <TB3> INFO: 655360 events read in total (16009ms).
[13:57:44.090] <TB3> INFO: Expecting 655360 events.
[13:58:00.613] <TB3> INFO: 655360 events read in total (15995ms).
[13:58:00.634] <TB3> INFO: Expecting 655360 events.
[13:58:17.205] <TB3> INFO: 655360 events read in total (16044ms).
[13:58:17.228] <TB3> INFO: Expecting 655360 events.
[13:58:32.145] <TB3> INFO: 655360 events read in total (14390ms).
[13:58:32.173] <TB3> INFO: Expecting 655360 events.
[13:58:48.155] <TB3> INFO: 655360 events read in total (15455ms).
[13:58:48.185] <TB3> INFO: Expecting 655360 events.
[13:59:04.531] <TB3> INFO: 655360 events read in total (15818ms).
[13:59:04.567] <TB3> INFO: Expecting 655360 events.
[13:59:21.002] <TB3> INFO: 655360 events read in total (15908ms).
[13:59:21.038] <TB3> INFO: Expecting 655360 events.
[13:59:36.086] <TB3> INFO: 655360 events read in total (14521ms).
[13:59:36.129] <TB3> INFO: Expecting 655360 events.
[13:59:51.145] <TB3> INFO: 655360 events read in total (14488ms).
[13:59:51.190] <TB3> INFO: Expecting 655360 events.
[14:00:07.795] <TB3> INFO: 655360 events read in total (16078ms).
[14:00:07.842] <TB3> INFO: Expecting 655360 events.
[14:00:24.377] <TB3> INFO: 655360 events read in total (16008ms).
[14:00:24.428] <TB3> INFO: Expecting 655360 events.
[14:00:40.914] <TB3> INFO: 655360 events read in total (15958ms).
[14:00:40.970] <TB3> INFO: Expecting 655360 events.
[14:00:57.357] <TB3> INFO: 655360 events read in total (15859ms).
[14:00:57.418] <TB3> INFO: Expecting 655360 events.
[14:01:13.900] <TB3> INFO: 655360 events read in total (15955ms).
[14:01:13.960] <TB3> INFO: Test took 260033ms.
[14:01:14.152] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:01:14.159] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:01:14.166] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:01:14.173] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:01:14.180] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:01:14.187] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:01:14.194] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:01:14.201] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:01:14.209] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:01:14.216] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:01:14.223] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:01:14.230] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:01:14.237] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:01:14.244] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:01:14.251] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:01:14.258] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:01:14.265] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:01:14.272] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[14:01:14.280] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[14:01:14.287] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[14:01:14.294] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[14:01:14.301] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[14:01:14.308] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[14:01:14.316] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:01:14.361] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C0.dat
[14:01:14.362] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C1.dat
[14:01:14.362] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C2.dat
[14:01:14.362] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C3.dat
[14:01:14.362] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C4.dat
[14:01:14.363] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C5.dat
[14:01:14.363] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C6.dat
[14:01:14.371] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C7.dat
[14:01:14.372] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C8.dat
[14:01:14.372] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C9.dat
[14:01:14.372] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C10.dat
[14:01:14.373] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C11.dat
[14:01:14.373] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C12.dat
[14:01:14.373] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C13.dat
[14:01:14.373] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C14.dat
[14:01:14.373] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//dacParameters35_C15.dat
[14:01:14.699] <TB3> INFO: Expecting 41600 events.
[14:01:19.161] <TB3> INFO: 41600 events read in total (3746ms).
[14:01:19.161] <TB3> INFO: Test took 4784ms.
[14:01:19.699] <TB3> INFO: Expecting 41600 events.
[14:01:24.192] <TB3> INFO: 41600 events read in total (3777ms).
[14:01:24.192] <TB3> INFO: Test took 4804ms.
[14:01:24.741] <TB3> INFO: Expecting 41600 events.
[14:01:29.209] <TB3> INFO: 41600 events read in total (3751ms).
[14:01:29.210] <TB3> INFO: Test took 4789ms.
[14:01:29.441] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:29.574] <TB3> INFO: Expecting 2560 events.
[14:01:30.644] <TB3> INFO: 2560 events read in total (354ms).
[14:01:30.644] <TB3> INFO: Test took 1203ms.
[14:01:30.648] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:31.060] <TB3> INFO: Expecting 2560 events.
[14:01:32.129] <TB3> INFO: 2560 events read in total (352ms).
[14:01:32.129] <TB3> INFO: Test took 1481ms.
[14:01:32.133] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:32.545] <TB3> INFO: Expecting 2560 events.
[14:01:33.615] <TB3> INFO: 2560 events read in total (354ms).
[14:01:33.615] <TB3> INFO: Test took 1482ms.
[14:01:33.618] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:34.031] <TB3> INFO: Expecting 2560 events.
[14:01:35.100] <TB3> INFO: 2560 events read in total (353ms).
[14:01:35.100] <TB3> INFO: Test took 1482ms.
[14:01:35.103] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:35.516] <TB3> INFO: Expecting 2560 events.
[14:01:36.586] <TB3> INFO: 2560 events read in total (353ms).
[14:01:36.586] <TB3> INFO: Test took 1483ms.
[14:01:36.590] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:37.002] <TB3> INFO: Expecting 2560 events.
[14:01:38.071] <TB3> INFO: 2560 events read in total (353ms).
[14:01:38.071] <TB3> INFO: Test took 1481ms.
[14:01:38.074] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:38.488] <TB3> INFO: Expecting 2560 events.
[14:01:39.558] <TB3> INFO: 2560 events read in total (354ms).
[14:01:39.558] <TB3> INFO: Test took 1485ms.
[14:01:39.561] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:39.974] <TB3> INFO: Expecting 2560 events.
[14:01:41.043] <TB3> INFO: 2560 events read in total (353ms).
[14:01:41.043] <TB3> INFO: Test took 1482ms.
[14:01:41.046] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:41.459] <TB3> INFO: Expecting 2560 events.
[14:01:42.529] <TB3> INFO: 2560 events read in total (354ms).
[14:01:42.530] <TB3> INFO: Test took 1484ms.
[14:01:42.532] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:42.945] <TB3> INFO: Expecting 2560 events.
[14:01:44.015] <TB3> INFO: 2560 events read in total (354ms).
[14:01:44.015] <TB3> INFO: Test took 1483ms.
[14:01:44.017] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:44.430] <TB3> INFO: Expecting 2560 events.
[14:01:45.500] <TB3> INFO: 2560 events read in total (353ms).
[14:01:45.501] <TB3> INFO: Test took 1484ms.
[14:01:45.503] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:45.917] <TB3> INFO: Expecting 2560 events.
[14:01:46.985] <TB3> INFO: 2560 events read in total (352ms).
[14:01:46.986] <TB3> INFO: Test took 1483ms.
[14:01:46.988] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:47.401] <TB3> INFO: Expecting 2560 events.
[14:01:48.470] <TB3> INFO: 2560 events read in total (352ms).
[14:01:48.470] <TB3> INFO: Test took 1482ms.
[14:01:48.473] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:48.886] <TB3> INFO: Expecting 2560 events.
[14:01:49.954] <TB3> INFO: 2560 events read in total (352ms).
[14:01:49.954] <TB3> INFO: Test took 1481ms.
[14:01:49.957] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:50.370] <TB3> INFO: Expecting 2560 events.
[14:01:51.441] <TB3> INFO: 2560 events read in total (355ms).
[14:01:51.442] <TB3> INFO: Test took 1485ms.
[14:01:51.445] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:51.857] <TB3> INFO: Expecting 2560 events.
[14:01:52.927] <TB3> INFO: 2560 events read in total (354ms).
[14:01:52.928] <TB3> INFO: Test took 1483ms.
[14:01:52.932] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:53.343] <TB3> INFO: Expecting 2560 events.
[14:01:54.413] <TB3> INFO: 2560 events read in total (354ms).
[14:01:54.413] <TB3> INFO: Test took 1481ms.
[14:01:54.415] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:54.830] <TB3> INFO: Expecting 2560 events.
[14:01:55.898] <TB3> INFO: 2560 events read in total (352ms).
[14:01:55.899] <TB3> INFO: Test took 1484ms.
[14:01:55.902] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:56.315] <TB3> INFO: Expecting 2560 events.
[14:01:57.382] <TB3> INFO: 2560 events read in total (352ms).
[14:01:57.383] <TB3> INFO: Test took 1482ms.
[14:01:57.386] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:57.798] <TB3> INFO: Expecting 2560 events.
[14:01:58.860] <TB3> INFO: 2560 events read in total (346ms).
[14:01:58.860] <TB3> INFO: Test took 1475ms.
[14:01:58.862] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:59.275] <TB3> INFO: Expecting 2560 events.
[14:02:00.338] <TB3> INFO: 2560 events read in total (347ms).
[14:02:00.338] <TB3> INFO: Test took 1477ms.
[14:02:00.340] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:02:00.753] <TB3> INFO: Expecting 2560 events.
[14:02:01.815] <TB3> INFO: 2560 events read in total (346ms).
[14:02:01.815] <TB3> INFO: Test took 1476ms.
[14:02:01.817] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:02:02.231] <TB3> INFO: Expecting 2560 events.
[14:02:03.292] <TB3> INFO: 2560 events read in total (345ms).
[14:02:03.293] <TB3> INFO: Test took 1476ms.
[14:02:03.294] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:02:03.708] <TB3> INFO: Expecting 2560 events.
[14:02:04.770] <TB3> INFO: 2560 events read in total (346ms).
[14:02:04.770] <TB3> INFO: Test took 1476ms.
[14:02:04.773] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:02:05.186] <TB3> INFO: Expecting 2560 events.
[14:02:06.248] <TB3> INFO: 2560 events read in total (346ms).
[14:02:06.249] <TB3> INFO: Test took 1476ms.
[14:02:06.252] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:02:06.664] <TB3> INFO: Expecting 2560 events.
[14:02:07.727] <TB3> INFO: 2560 events read in total (347ms).
[14:02:07.727] <TB3> INFO: Test took 1476ms.
[14:02:07.729] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:02:08.142] <TB3> INFO: Expecting 2560 events.
[14:02:09.204] <TB3> INFO: 2560 events read in total (346ms).
[14:02:09.204] <TB3> INFO: Test took 1476ms.
[14:02:09.206] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:02:09.620] <TB3> INFO: Expecting 2560 events.
[14:02:10.682] <TB3> INFO: 2560 events read in total (346ms).
[14:02:10.682] <TB3> INFO: Test took 1476ms.
[14:02:10.685] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:02:11.097] <TB3> INFO: Expecting 2560 events.
[14:02:12.159] <TB3> INFO: 2560 events read in total (345ms).
[14:02:12.160] <TB3> INFO: Test took 1475ms.
[14:02:12.163] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:02:12.575] <TB3> INFO: Expecting 2560 events.
[14:02:13.637] <TB3> INFO: 2560 events read in total (346ms).
[14:02:13.637] <TB3> INFO: Test took 1475ms.
[14:02:13.639] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:02:14.052] <TB3> INFO: Expecting 2560 events.
[14:02:15.115] <TB3> INFO: 2560 events read in total (347ms).
[14:02:15.115] <TB3> INFO: Test took 1476ms.
[14:02:15.117] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:02:15.530] <TB3> INFO: Expecting 2560 events.
[14:02:16.592] <TB3> INFO: 2560 events read in total (346ms).
[14:02:16.592] <TB3> INFO: Test took 1475ms.
[14:02:17.200] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 619 seconds
[14:02:17.200] <TB3> INFO: PH scale (per ROC): 84 83 89 90 83 74 85 89 82 80 84 75 75 90 86 81
[14:02:17.200] <TB3> INFO: PH offset (per ROC): 162 170 149 173 173 158 148 148 171 165 159 166 165 153 176 163
[14:02:17.450] <TB3> INFO: ######################################################################
[14:02:17.450] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:02:17.450] <TB3> INFO: ######################################################################
[14:02:17.463] <TB3> INFO: scanning low vcal = 10
[14:02:17.827] <TB3> INFO: Expecting 41600 events.
[14:02:21.359] <TB3> INFO: 41600 events read in total (2816ms).
[14:02:21.359] <TB3> INFO: Test took 3896ms.
[14:02:21.361] <TB3> INFO: scanning low vcal = 20
[14:02:21.775] <TB3> INFO: Expecting 41600 events.
[14:02:25.412] <TB3> INFO: 41600 events read in total (2921ms).
[14:02:25.412] <TB3> INFO: Test took 4051ms.
[14:02:25.415] <TB3> INFO: scanning low vcal = 30
[14:02:25.828] <TB3> INFO: Expecting 41600 events.
[14:02:29.481] <TB3> INFO: 41600 events read in total (2937ms).
[14:02:29.482] <TB3> INFO: Test took 4067ms.
[14:02:29.485] <TB3> INFO: scanning low vcal = 40
[14:02:29.890] <TB3> INFO: Expecting 41600 events.
[14:02:34.120] <TB3> INFO: 41600 events read in total (3514ms).
[14:02:34.120] <TB3> INFO: Test took 4635ms.
[14:02:34.124] <TB3> INFO: scanning low vcal = 50
[14:02:34.471] <TB3> INFO: Expecting 41600 events.
[14:02:38.668] <TB3> INFO: 41600 events read in total (3481ms).
[14:02:38.669] <TB3> INFO: Test took 4545ms.
[14:02:38.672] <TB3> INFO: scanning low vcal = 60
[14:02:39.019] <TB3> INFO: Expecting 41600 events.
[14:02:43.233] <TB3> INFO: 41600 events read in total (3497ms).
[14:02:43.234] <TB3> INFO: Test took 4562ms.
[14:02:43.237] <TB3> INFO: scanning low vcal = 70
[14:02:43.591] <TB3> INFO: Expecting 41600 events.
[14:02:47.857] <TB3> INFO: 41600 events read in total (3549ms).
[14:02:47.858] <TB3> INFO: Test took 4621ms.
[14:02:47.861] <TB3> INFO: scanning low vcal = 80
[14:02:48.206] <TB3> INFO: Expecting 41600 events.
[14:02:52.433] <TB3> INFO: 41600 events read in total (3510ms).
[14:02:52.434] <TB3> INFO: Test took 4573ms.
[14:02:52.436] <TB3> INFO: scanning low vcal = 90
[14:02:52.784] <TB3> INFO: Expecting 41600 events.
[14:02:57.086] <TB3> INFO: 41600 events read in total (3586ms).
[14:02:57.086] <TB3> INFO: Test took 4650ms.
[14:02:57.090] <TB3> INFO: scanning low vcal = 100
[14:02:57.439] <TB3> INFO: Expecting 41600 events.
[14:03:01.614] <TB3> INFO: 41600 events read in total (3459ms).
[14:03:01.614] <TB3> INFO: Test took 4524ms.
[14:03:01.617] <TB3> INFO: scanning low vcal = 110
[14:03:01.958] <TB3> INFO: Expecting 41600 events.
[14:03:06.159] <TB3> INFO: 41600 events read in total (3485ms).
[14:03:06.160] <TB3> INFO: Test took 4543ms.
[14:03:06.162] <TB3> INFO: scanning low vcal = 120
[14:03:06.512] <TB3> INFO: Expecting 41600 events.
[14:03:10.738] <TB3> INFO: 41600 events read in total (3510ms).
[14:03:10.739] <TB3> INFO: Test took 4577ms.
[14:03:10.742] <TB3> INFO: scanning low vcal = 130
[14:03:11.089] <TB3> INFO: Expecting 41600 events.
[14:03:15.298] <TB3> INFO: 41600 events read in total (3492ms).
[14:03:15.298] <TB3> INFO: Test took 4556ms.
[14:03:15.301] <TB3> INFO: scanning low vcal = 140
[14:03:15.656] <TB3> INFO: Expecting 41600 events.
[14:03:19.933] <TB3> INFO: 41600 events read in total (3561ms).
[14:03:19.934] <TB3> INFO: Test took 4633ms.
[14:03:19.937] <TB3> INFO: scanning low vcal = 150
[14:03:20.287] <TB3> INFO: Expecting 41600 events.
[14:03:24.493] <TB3> INFO: 41600 events read in total (3489ms).
[14:03:24.494] <TB3> INFO: Test took 4557ms.
[14:03:24.496] <TB3> INFO: scanning low vcal = 160
[14:03:24.840] <TB3> INFO: Expecting 41600 events.
[14:03:29.048] <TB3> INFO: 41600 events read in total (3491ms).
[14:03:29.049] <TB3> INFO: Test took 4552ms.
[14:03:29.051] <TB3> INFO: scanning low vcal = 170
[14:03:29.404] <TB3> INFO: Expecting 41600 events.
[14:03:33.595] <TB3> INFO: 41600 events read in total (3474ms).
[14:03:33.595] <TB3> INFO: Test took 4544ms.
[14:03:33.599] <TB3> INFO: scanning low vcal = 180
[14:03:33.946] <TB3> INFO: Expecting 41600 events.
[14:03:38.208] <TB3> INFO: 41600 events read in total (3546ms).
[14:03:38.209] <TB3> INFO: Test took 4610ms.
[14:03:38.212] <TB3> INFO: scanning low vcal = 190
[14:03:38.559] <TB3> INFO: Expecting 41600 events.
[14:03:42.786] <TB3> INFO: 41600 events read in total (3511ms).
[14:03:42.786] <TB3> INFO: Test took 4574ms.
[14:03:42.790] <TB3> INFO: scanning low vcal = 200
[14:03:43.138] <TB3> INFO: Expecting 41600 events.
[14:03:47.356] <TB3> INFO: 41600 events read in total (3502ms).
[14:03:47.356] <TB3> INFO: Test took 4566ms.
[14:03:47.359] <TB3> INFO: scanning low vcal = 210
[14:03:47.700] <TB3> INFO: Expecting 41600 events.
[14:03:51.898] <TB3> INFO: 41600 events read in total (3482ms).
[14:03:51.899] <TB3> INFO: Test took 4540ms.
[14:03:51.902] <TB3> INFO: scanning low vcal = 220
[14:03:52.253] <TB3> INFO: Expecting 41600 events.
[14:03:56.471] <TB3> INFO: 41600 events read in total (3502ms).
[14:03:56.471] <TB3> INFO: Test took 4569ms.
[14:03:56.474] <TB3> INFO: scanning low vcal = 230
[14:03:56.824] <TB3> INFO: Expecting 41600 events.
[14:04:00.903] <TB3> INFO: 41600 events read in total (3363ms).
[14:04:00.903] <TB3> INFO: Test took 4429ms.
[14:04:00.906] <TB3> INFO: scanning low vcal = 240
[14:04:01.258] <TB3> INFO: Expecting 41600 events.
[14:04:05.300] <TB3> INFO: 41600 events read in total (3326ms).
[14:04:05.301] <TB3> INFO: Test took 4395ms.
[14:04:05.304] <TB3> INFO: scanning low vcal = 250
[14:04:05.661] <TB3> INFO: Expecting 41600 events.
[14:04:09.751] <TB3> INFO: 41600 events read in total (3374ms).
[14:04:09.752] <TB3> INFO: Test took 4448ms.
[14:04:09.755] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[14:04:10.106] <TB3> INFO: Expecting 41600 events.
[14:04:14.151] <TB3> INFO: 41600 events read in total (3329ms).
[14:04:14.151] <TB3> INFO: Test took 4396ms.
[14:04:14.154] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[14:04:14.509] <TB3> INFO: Expecting 41600 events.
[14:04:18.582] <TB3> INFO: 41600 events read in total (3357ms).
[14:04:18.583] <TB3> INFO: Test took 4429ms.
[14:04:18.586] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[14:04:18.925] <TB3> INFO: Expecting 41600 events.
[14:04:22.959] <TB3> INFO: 41600 events read in total (3318ms).
[14:04:22.960] <TB3> INFO: Test took 4374ms.
[14:04:22.962] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[14:04:23.317] <TB3> INFO: Expecting 41600 events.
[14:04:27.671] <TB3> INFO: 41600 events read in total (3638ms).
[14:04:27.671] <TB3> INFO: Test took 4709ms.
[14:04:27.674] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:04:28.013] <TB3> INFO: Expecting 41600 events.
[14:04:32.265] <TB3> INFO: 41600 events read in total (3535ms).
[14:04:32.265] <TB3> INFO: Test took 4591ms.
[14:04:32.733] <TB3> INFO: PixTestGainPedestal::measure() done
[14:05:04.838] <TB3> INFO: PixTestGainPedestal::fit() done
[14:05:04.838] <TB3> INFO: non-linearity mean: 0.952 0.959 0.955 0.951 0.958 0.961 0.957 0.953 0.958 0.953 0.958 0.961 0.957 0.952 0.968 0.958
[14:05:04.838] <TB3> INFO: non-linearity RMS: 0.006 0.005 0.006 0.005 0.005 0.006 0.006 0.006 0.005 0.006 0.006 0.006 0.006 0.006 0.004 0.006
[14:05:04.853] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[14:05:04.876] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[14:05:04.898] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[14:05:04.920] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[14:05:04.942] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[14:05:04.964] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[14:05:04.986] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[14:05:05.008] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[14:05:05.030] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[14:05:05.055] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[14:05:05.078] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[14:05:05.100] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[14:05:05.123] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[14:05:05.145] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[14:05:05.167] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[14:05:05.189] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[14:05:05.211] <TB3> INFO: PixTestGainPedestal::doTest() done, duration: 167 seconds
[14:05:05.217] <TB3> INFO: readReadbackCal: /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C15.dat
[14:05:05.218] <TB3> INFO: PixTestReadback::doTest() start.
[14:05:05.219] <TB3> INFO: PixTestReadback::RES sent once
[14:05:26.959] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C0.dat
[14:05:26.959] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C1.dat
[14:05:26.959] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C2.dat
[14:05:26.959] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C3.dat
[14:05:26.959] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C4.dat
[14:05:26.959] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C5.dat
[14:05:26.959] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C6.dat
[14:05:26.959] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C7.dat
[14:05:26.959] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C8.dat
[14:05:26.959] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C9.dat
[14:05:26.959] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C10.dat
[14:05:26.959] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C11.dat
[14:05:26.960] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C12.dat
[14:05:26.960] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C13.dat
[14:05:26.960] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C14.dat
[14:05:26.960] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C15.dat
[14:05:26.984] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[14:05:26.985] <TB3> INFO: PixTestReadback::RES sent once
[14:05:48.693] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C0.dat
[14:05:48.693] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C1.dat
[14:05:48.693] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C2.dat
[14:05:48.693] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C3.dat
[14:05:48.693] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C4.dat
[14:05:48.693] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C5.dat
[14:05:48.694] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C6.dat
[14:05:48.694] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C7.dat
[14:05:48.694] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C8.dat
[14:05:48.694] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C9.dat
[14:05:48.694] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C10.dat
[14:05:48.694] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C11.dat
[14:05:48.694] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C12.dat
[14:05:48.694] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C13.dat
[14:05:48.694] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C14.dat
[14:05:48.694] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C15.dat
[14:05:48.727] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[14:05:48.727] <TB3> INFO: PixTestReadback::RES sent once
[14:06:05.579] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[14:06:05.579] <TB3> INFO: Vbg will be calibrated using Vd calibration
[14:06:05.579] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 150.1calibrated Vbg = 1.19939 :::*/*/*/*/
[14:06:05.579] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 155calibrated Vbg = 1.18838 :::*/*/*/*/
[14:06:05.579] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 158calibrated Vbg = 1.19823 :::*/*/*/*/
[14:06:05.579] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[14:06:05.579] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 145.5calibrated Vbg = 1.20759 :::*/*/*/*/
[14:06:05.579] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 150.6calibrated Vbg = 1.20405 :::*/*/*/*/
[14:06:05.579] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 147.3calibrated Vbg = 1.20069 :::*/*/*/*/
[14:06:05.579] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[14:06:05.579] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 169.9calibrated Vbg = 1.20624 :::*/*/*/*/
[14:06:05.579] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 158.8calibrated Vbg = 1.20106 :::*/*/*/*/
[14:06:05.579] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 156.5calibrated Vbg = 1.20027 :::*/*/*/*/
[14:06:05.579] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[14:06:05.579] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 155.4calibrated Vbg = 1.19052 :::*/*/*/*/
[14:06:05.579] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 149.2calibrated Vbg = 1.18678 :::*/*/*/*/
[14:06:05.579] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 147calibrated Vbg = 1.19745 :::*/*/*/*/
[14:06:05.579] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[14:06:05.583] <TB3> INFO: PixTestReadback::RES sent once
[14:08:41.751] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L480> Channel 2 Number of ROCs (2) != Token Chain Length (4)

[14:08:41.751] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L480> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[14:08:41.751] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L480> Channel 2 Number of ROCs (3) != Token Chain Length (4)

[14:08:41.751] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L480> Channel 3 Number of ROCs (3) != Token Chain Length (4)

[14:08:41.751] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L480> Channel 2 Number of ROCs (0) != Token Chain Length (4)

[14:08:41.751] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L480> Channel 3 Number of ROCs (0) != Token Chain Length (4)

[14:08:41.751] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L480> Channel 2 Number of ROCs (2) != Token Chain Length (4)

[14:08:41.751] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L480> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[14:08:41.751] <TB3> ERROR: <datapipe.cc/CheckEventID:L453> Channel 2 Event ID mismatch: local ID (25) != TBM ID (9)

[14:08:41.751] <TB3> ERROR: <datapipe.cc/CheckEventID:L453> Channel 3 Event ID mismatch: local ID (25) != TBM ID (9)

[14:08:41.751] <TB3> ERROR: <datapipe.cc/CheckEventID:L453> Channel 2 Event ID mismatch: local ID (11) != TBM ID (27)

[14:08:41.751] <TB3> ERROR: <datapipe.cc/CheckEventID:L453> Channel 3 Event ID mismatch: local ID (11) != TBM ID (27)

[14:08:41.751] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L480> Channel 2 Number of ROCs (2) != Token Chain Length (4)

[14:08:41.751] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L480> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[14:08:43.491] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L469> Channel 2 has NoTokenPass but 5 ROCs were found

[14:08:43.491] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L469> Channel 3 has NoTokenPass but 5 ROCs were found

[14:08:43.491] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L469> Channel 2 has NoTokenPass but 5 ROCs were found

[14:08:43.491] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L469> Channel 3 has NoTokenPass but 5 ROCs were found

[14:10:45.820] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C0.dat
[14:10:45.820] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C1.dat
[14:10:45.820] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C2.dat
[14:10:45.821] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C3.dat
[14:10:45.821] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C4.dat
[14:10:45.821] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C5.dat
[14:10:45.821] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C6.dat
[14:10:45.821] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C7.dat
[14:10:45.821] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C8.dat
[14:10:45.821] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C9.dat
[14:10:45.821] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C10.dat
[14:10:45.821] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C11.dat
[14:10:45.821] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C12.dat
[14:10:45.821] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C13.dat
[14:10:45.821] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C14.dat
[14:10:45.821] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//002_FulltestPxar_m20//readbackCal_C15.dat
[14:10:45.851] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[14:10:45.852] <TB3> INFO: PixTestReadback::doTest() done
[14:10:45.876] <TB3> INFO: enter test to run
[14:10:45.876] <TB3> INFO: test: exit no parameter change
[14:10:46.385] <TB3> QUIET: Connection to board 170 closed.
[14:10:46.464] <TB3> INFO: pXar: this is the end, my friend
MoReWeb-v1.0.0-5-g82d9ff6 on branch psi46master