Test Date: 2015-09-02 10:55
Analysis date: 2016-05-26 04:24
Logfile
LogfileView
[09:03:35.723] <TB3> INFO: *** Welcome to pxar ***
[09:03:35.723] <TB3> INFO: *** Today: 2015/09/02
[09:03:35.723] <TB3> INFO: readRocDacs: /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C15.dat
[09:03:35.724] <TB3> INFO: readTbmDacs: /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//tbmParameters_C0b.dat
[09:03:35.724] <TB3> INFO: readMaskFile: /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//defaultMaskFile.dat
[09:03:35.725] <TB3> INFO: readTrimFile: /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters_C15.dat
[09:03:35.801] <TB3> INFO: clk: 4
[09:03:35.801] <TB3> INFO: ctr: 4
[09:03:35.801] <TB3> INFO: sda: 19
[09:03:35.801] <TB3> INFO: tin: 9
[09:03:35.801] <TB3> INFO: level: 15
[09:03:35.801] <TB3> INFO: triggerdelay: 0
[09:03:35.801] <TB3> QUIET: Instanciating API for pxar prod-10
[09:03:35.801] <TB3> INFO: Log level: INFO
[09:03:35.808] <TB3> INFO: Found DTB DTB_WZ4I6J
[09:03:35.821] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[09:03:35.824] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[09:03:35.826] <TB3> INFO: RPC call hashes of host and DTB match: 397073690
[09:03:37.356] <TB3> INFO: DUT info:
[09:03:37.356] <TB3> INFO: The DUT currently contains the following objects:
[09:03:37.356] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[09:03:37.356] <TB3> INFO: TBM Core alpha (0): 7 registers set
[09:03:37.356] <TB3> INFO: TBM Core beta (1): 7 registers set
[09:03:37.356] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[09:03:37.356] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:37.356] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:37.356] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:37.356] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:37.356] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:37.356] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:37.356] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:37.356] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:37.356] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:37.356] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:37.356] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:37.356] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:37.356] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:37.356] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:37.356] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:37.356] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:37.758] <TB3> INFO: enter 'restricted' command line mode
[09:03:37.758] <TB3> INFO: enter test to run
[09:03:37.758] <TB3> INFO: test: pretest no parameter change
[09:03:37.758] <TB3> INFO: running: pretest
[09:03:37.765] <TB3> INFO: ######################################################################
[09:03:37.765] <TB3> INFO: PixTestPretest::doTest()
[09:03:37.765] <TB3> INFO: ######################################################################
[09:03:37.767] <TB3> INFO: ----------------------------------------------------------------------
[09:03:37.767] <TB3> INFO: PixTestPretest::programROC()
[09:03:37.767] <TB3> INFO: ----------------------------------------------------------------------
[09:03:55.784] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[09:03:55.784] <TB3> INFO: IA differences per ROC: 18.5 18.5 17.7 20.1 19.3 18.5 20.1 16.9 17.7 19.3 19.3 19.3 19.3 18.5 20.1 17.7
[09:03:55.861] <TB3> INFO: ----------------------------------------------------------------------
[09:03:55.861] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[09:03:55.861] <TB3> INFO: ----------------------------------------------------------------------
[09:04:00.741] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 385.1 mA = 24.0688 mA/ROC
[09:04:00.744] <TB3> INFO: ----------------------------------------------------------------------
[09:04:00.744] <TB3> INFO: PixTestPretest::findWorkingPixel()
[09:04:00.744] <TB3> INFO: ----------------------------------------------------------------------
[09:04:00.883] <TB3> INFO: Expecting 231680 events.
[09:04:10.259] <TB3> INFO: 231680 events read in total (8657ms).
[09:04:10.326] <TB3> INFO: Test took 9577ms.
[09:04:10.585] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[09:04:10.625] <TB3> INFO: ----------------------------------------------------------------------
[09:04:10.625] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[09:04:10.625] <TB3> INFO: ----------------------------------------------------------------------
[09:04:10.763] <TB3> INFO: Expecting 231680 events.
[09:04:19.974] <TB3> INFO: 231680 events read in total (8493ms).
[09:04:19.978] <TB3> INFO: Test took 9348ms.
[09:04:20.298] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[09:04:20.298] <TB3> INFO: CalDel: 145 138 139 132 156 148 150 161 143 147 155 171 153 132 175 141
[09:04:20.298] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[09:04:20.301] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C0.dat
[09:04:20.301] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C1.dat
[09:04:20.301] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C2.dat
[09:04:20.302] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C3.dat
[09:04:20.302] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C4.dat
[09:04:20.302] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C5.dat
[09:04:20.302] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C6.dat
[09:04:20.303] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C7.dat
[09:04:20.303] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C8.dat
[09:04:20.303] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C9.dat
[09:04:20.303] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C10.dat
[09:04:20.304] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C11.dat
[09:04:20.304] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C12.dat
[09:04:20.304] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C13.dat
[09:04:20.304] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C14.dat
[09:04:20.305] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C15.dat
[09:04:20.305] <TB3> INFO: write tbm parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//tbmParameters_C0a.dat
[09:04:20.305] <TB3> INFO: write tbm parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//tbmParameters_C0b.dat
[09:04:20.305] <TB3> INFO: PixTestPretest::doTest() done, duration: 42 seconds
[09:04:20.394] <TB3> INFO: enter test to run
[09:04:20.394] <TB3> INFO: test: fulltest no parameter change
[09:04:20.394] <TB3> INFO: running: fulltest
[09:04:20.394] <TB3> INFO: ######################################################################
[09:04:20.394] <TB3> INFO: PixTestFullTest::doTest()
[09:04:20.394] <TB3> INFO: ######################################################################
[09:04:20.395] <TB3> INFO: ######################################################################
[09:04:20.395] <TB3> INFO: PixTestAlive::doTest()
[09:04:20.395] <TB3> INFO: ######################################################################
[09:04:20.397] <TB3> INFO: ----------------------------------------------------------------------
[09:04:20.397] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:04:20.397] <TB3> INFO: ----------------------------------------------------------------------
[09:04:20.709] <TB3> INFO: Expecting 41600 events.
[09:04:25.156] <TB3> INFO: 41600 events read in total (3730ms).
[09:04:25.157] <TB3> INFO: Test took 4759ms.
[09:04:25.163] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:25.441] <TB3> INFO: PixTestAlive::aliveTest() done
[09:04:25.441] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
[09:04:25.443] <TB3> INFO: ----------------------------------------------------------------------
[09:04:25.443] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:04:25.443] <TB3> INFO: ----------------------------------------------------------------------
[09:04:25.757] <TB3> INFO: Expecting 41600 events.
[09:04:28.906] <TB3> INFO: 41600 events read in total (2433ms).
[09:04:28.906] <TB3> INFO: Test took 3462ms.
[09:04:28.906] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:28.907] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[09:04:29.215] <TB3> INFO: PixTestAlive::maskTest() done
[09:04:29.215] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:04:29.217] <TB3> INFO: ----------------------------------------------------------------------
[09:04:29.217] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:04:29.217] <TB3> INFO: ----------------------------------------------------------------------
[09:04:29.541] <TB3> INFO: Expecting 41600 events.
[09:04:34.006] <TB3> INFO: 41600 events read in total (3749ms).
[09:04:34.007] <TB3> INFO: Test took 4788ms.
[09:04:34.013] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:34.292] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[09:04:34.292] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:04:34.292] <TB3> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[09:04:34.299] <TB3> INFO: ######################################################################
[09:04:34.299] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[09:04:34.299] <TB3> INFO: ######################################################################
[09:04:34.302] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[09:04:34.382] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[09:04:34.382] <TB3> INFO: run 1 of 1
[09:04:34.694] <TB3> INFO: Expecting 3120000 events.
[09:05:09.773] <TB3> INFO: 849190 events read in total (34363ms).
[09:05:42.340] <TB3> INFO: 1685385 events read in total (66930ms).
[09:06:15.340] <TB3> INFO: 2534555 events read in total (99930ms).
[09:06:38.065] <TB3> INFO: 3120000 events read in total (122655ms).
[09:06:38.116] <TB3> INFO: Test took 123734ms.
[09:06:38.218] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:07:03.164] <TB3> INFO: PixTestBBMap::doTest() done, duration: 148 seconds
[09:07:03.164] <TB3> INFO: number of dead bumps (per ROC): 36 0 0 0 1 0 0 0 1 0 0 0 0 0 0 4
[09:07:03.164] <TB3> INFO: separation cut (per ROC): 66 73 77 78 87 69 78 69 82 82 69 86 84 80 74 77
[09:07:03.241] <TB3> INFO: ######################################################################
[09:07:03.241] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:07:03.241] <TB3> INFO: ######################################################################
[09:07:03.241] <TB3> INFO: ----------------------------------------------------------------------
[09:07:03.241] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:07:03.241] <TB3> INFO: ----------------------------------------------------------------------
[09:07:03.241] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[09:07:03.250] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[09:07:03.250] <TB3> INFO: run 1 of 1
[09:07:03.555] <TB3> INFO: Expecting 31200000 events.
[09:07:28.534] <TB3> INFO: 922600 events read in total (24260ms).
[09:07:52.669] <TB3> INFO: 1833750 events read in total (48395ms).
[09:08:16.819] <TB3> INFO: 2740000 events read in total (72545ms).
[09:08:40.891] <TB3> INFO: 3647000 events read in total (96617ms).
[09:09:04.833] <TB3> INFO: 4550650 events read in total (120559ms).
[09:09:29.060] <TB3> INFO: 5454750 events read in total (144786ms).
[09:09:53.030] <TB3> INFO: 6356850 events read in total (168756ms).
[09:10:17.070] <TB3> INFO: 7261700 events read in total (192796ms).
[09:10:40.920] <TB3> INFO: 8163350 events read in total (216646ms).
[09:11:04.878] <TB3> INFO: 9065700 events read in total (240604ms).
[09:11:28.935] <TB3> INFO: 9966300 events read in total (264661ms).
[09:11:52.987] <TB3> INFO: 10868100 events read in total (288713ms).
[09:12:16.937] <TB3> INFO: 11767450 events read in total (312663ms).
[09:12:40.994] <TB3> INFO: 12668500 events read in total (336720ms).
[09:13:04.984] <TB3> INFO: 13567050 events read in total (360710ms).
[09:13:29.010] <TB3> INFO: 14467250 events read in total (384736ms).
[09:13:53.011] <TB3> INFO: 15365100 events read in total (408737ms).
[09:14:17.015] <TB3> INFO: 16257700 events read in total (432741ms).
[09:14:41.030] <TB3> INFO: 17149200 events read in total (456756ms).
[09:15:05.125] <TB3> INFO: 18040950 events read in total (480851ms).
[09:15:28.792] <TB3> INFO: 18929150 events read in total (504518ms).
[09:15:52.728] <TB3> INFO: 19818200 events read in total (528454ms).
[09:16:16.588] <TB3> INFO: 20706650 events read in total (552314ms).
[09:16:40.745] <TB3> INFO: 21595400 events read in total (576471ms).
[09:17:04.635] <TB3> INFO: 22482750 events read in total (600361ms).
[09:17:28.820] <TB3> INFO: 23368250 events read in total (624546ms).
[09:17:52.825] <TB3> INFO: 24255700 events read in total (648551ms).
[09:18:16.708] <TB3> INFO: 25143250 events read in total (672434ms).
[09:18:40.587] <TB3> INFO: 26029250 events read in total (696313ms).
[09:19:04.489] <TB3> INFO: 26913550 events read in total (720215ms).
[09:19:28.288] <TB3> INFO: 27801600 events read in total (744014ms).
[09:19:52.335] <TB3> INFO: 28688200 events read in total (768061ms).
[09:20:16.347] <TB3> INFO: 29577500 events read in total (792073ms).
[09:20:40.330] <TB3> INFO: 30464150 events read in total (816056ms).
[09:20:58.520] <TB3> INFO: 31200000 events read in total (834246ms).
[09:20:58.556] <TB3> INFO: Test took 835306ms.
[09:20:58.646] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:58.761] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:21:00.358] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:21:01.904] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:21:03.463] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:21:04.997] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:21:06.482] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:21:07.995] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:21:09.448] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:21:10.925] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:21:12.443] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:21:13.976] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:21:15.416] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:21:16.814] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:21:18.225] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:21:19.719] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:21:21.200] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:21:22.661] <TB3> INFO: PixTestScurves::scurves() done
[09:21:22.661] <TB3> INFO: Vcal mean: 77.96 77.98 75.90 78.90 91.38 80.90 81.88 72.03 90.73 80.50 78.95 89.32 87.56 73.44 81.32 96.44
[09:21:22.661] <TB3> INFO: Vcal RMS: 4.81 5.05 4.20 4.21 5.85 4.28 4.40 4.69 5.64 4.79 4.20 5.85 5.26 4.69 4.34 5.25
[09:21:22.662] <TB3> INFO: PixTestScurves::fullTest() done, duration: 859 seconds
[09:21:22.744] <TB3> INFO: ######################################################################
[09:21:22.744] <TB3> INFO: PixTestTrim::doTest()
[09:21:22.744] <TB3> INFO: ######################################################################
[09:21:22.745] <TB3> INFO: ----------------------------------------------------------------------
[09:21:22.745] <TB3> INFO: PixTestTrim::trimTest() ntrig = 20, vcal = 35
[09:21:22.745] <TB3> INFO: ----------------------------------------------------------------------
[09:21:22.833] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:21:22.833] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[09:21:22.843] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[09:21:22.843] <TB3> INFO: run 1 of 1
[09:21:23.161] <TB3> INFO: Expecting 13312000 events.
[09:21:51.585] <TB3> INFO: 1086200 events read in total (27707ms).
[09:22:18.347] <TB3> INFO: 2167080 events read in total (54469ms).
[09:22:43.945] <TB3> INFO: 3245360 events read in total (80067ms).
[09:23:11.905] <TB3> INFO: 4320660 events read in total (108027ms).
[09:23:39.716] <TB3> INFO: 5390620 events read in total (135838ms).
[09:24:07.320] <TB3> INFO: 6455620 events read in total (163442ms).
[09:24:35.108] <TB3> INFO: 7525960 events read in total (191230ms).
[09:25:02.672] <TB3> INFO: 8601080 events read in total (218794ms).
[09:25:30.426] <TB3> INFO: 9675600 events read in total (246548ms).
[09:25:58.406] <TB3> INFO: 10751720 events read in total (274528ms).
[09:26:26.179] <TB3> INFO: 11825720 events read in total (302301ms).
[09:26:53.960] <TB3> INFO: 12901240 events read in total (330082ms).
[09:27:03.948] <TB3> INFO: 13312000 events read in total (340070ms).
[09:27:03.982] <TB3> INFO: Test took 341139ms.
[09:27:04.039] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:27:22.227] <TB3> INFO: ROC 0 VthrComp = 81
[09:27:22.228] <TB3> INFO: ROC 1 VthrComp = 83
[09:27:22.228] <TB3> INFO: ROC 2 VthrComp = 80
[09:27:22.228] <TB3> INFO: ROC 3 VthrComp = 89
[09:27:22.228] <TB3> INFO: ROC 4 VthrComp = 95
[09:27:22.228] <TB3> INFO: ROC 5 VthrComp = 84
[09:27:22.228] <TB3> INFO: ROC 6 VthrComp = 89
[09:27:22.228] <TB3> INFO: ROC 7 VthrComp = 76
[09:27:22.229] <TB3> INFO: ROC 8 VthrComp = 93
[09:27:22.229] <TB3> INFO: ROC 9 VthrComp = 84
[09:27:22.229] <TB3> INFO: ROC 10 VthrComp = 83
[09:27:22.229] <TB3> INFO: ROC 11 VthrComp = 92
[09:27:22.229] <TB3> INFO: ROC 12 VthrComp = 91
[09:27:22.229] <TB3> INFO: ROC 13 VthrComp = 81
[09:27:22.229] <TB3> INFO: ROC 14 VthrComp = 85
[09:27:22.229] <TB3> INFO: ROC 15 VthrComp = 100
[09:27:22.229] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[09:27:22.229] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[09:27:22.238] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[09:27:22.238] <TB3> INFO: run 1 of 1
[09:27:22.546] <TB3> INFO: Expecting 13312000 events.
[09:27:48.331] <TB3> INFO: 780240 events read in total (25069ms).
[09:28:13.376] <TB3> INFO: 1556840 events read in total (50114ms).
[09:28:38.219] <TB3> INFO: 2332160 events read in total (74957ms).
[09:29:00.819] <TB3> INFO: 3108300 events read in total (97557ms).
[09:29:25.259] <TB3> INFO: 3883840 events read in total (121997ms).
[09:29:50.126] <TB3> INFO: 4659780 events read in total (146864ms).
[09:30:15.114] <TB3> INFO: 5435380 events read in total (171852ms).
[09:30:39.987] <TB3> INFO: 6211280 events read in total (196725ms).
[09:31:04.861] <TB3> INFO: 6984220 events read in total (221599ms).
[09:31:29.743] <TB3> INFO: 7754440 events read in total (246481ms).
[09:31:54.680] <TB3> INFO: 8522400 events read in total (271418ms).
[09:32:19.537] <TB3> INFO: 9289860 events read in total (296275ms).
[09:32:44.574] <TB3> INFO: 10055940 events read in total (321312ms).
[09:33:09.403] <TB3> INFO: 10822160 events read in total (346141ms).
[09:33:34.165] <TB3> INFO: 11586780 events read in total (370903ms).
[09:33:58.982] <TB3> INFO: 12353320 events read in total (395720ms).
[09:34:23.838] <TB3> INFO: 13119580 events read in total (420576ms).
[09:34:29.847] <TB3> INFO: 13312000 events read in total (426585ms).
[09:34:29.892] <TB3> INFO: Test took 427654ms.
[09:34:30.039] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:54.730] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 58.5518 for pixel 4/0 mean/min/max = 45.3591/32.1093/58.6089
[09:34:54.730] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 59.0308 for pixel 2/0 mean/min/max = 45.1352/31.1224/59.1481
[09:34:54.730] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 56.4169 for pixel 6/17 mean/min/max = 44.3339/32.2344/56.4335
[09:34:54.731] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 56.4289 for pixel 20/79 mean/min/max = 44.6366/32.7035/56.5697
[09:34:54.731] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 59.7919 for pixel 23/3 mean/min/max = 45.3861/30.9024/59.8699
[09:34:54.731] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 58.1875 for pixel 17/9 mean/min/max = 45.6624/33.1094/58.2153
[09:34:54.731] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 56.7299 for pixel 14/70 mean/min/max = 44.9668/33.0861/56.8474
[09:34:54.732] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 57.8884 for pixel 15/14 mean/min/max = 46.5921/34.8477/58.3365
[09:34:54.732] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 60.3004 for pixel 24/78 mean/min/max = 46.0673/31.8183/60.3164
[09:34:54.733] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 59.0761 for pixel 2/3 mean/min/max = 45.4091/31.6377/59.1804
[09:34:54.733] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 57.4739 for pixel 46/1 mean/min/max = 45.2859/32.8803/57.6915
[09:34:54.733] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 61.9319 for pixel 1/1 mean/min/max = 46.9161/31.8873/61.9449
[09:34:54.734] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 59.3259 for pixel 36/0 mean/min/max = 45.7733/32.1524/59.3942
[09:34:54.734] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 56.9321 for pixel 51/77 mean/min/max = 44.7066/32.4334/56.9798
[09:34:54.735] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 57.8817 for pixel 13/19 mean/min/max = 45.3741/32.7667/57.9815
[09:34:54.735] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 58.7851 for pixel 4/25 mean/min/max = 45.7441/32.656/58.8323
[09:34:54.735] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:54.868] <TB3> INFO: Expecting 1029120 events.
[09:35:16.982] <TB3> INFO: 1029120 events read in total (21397ms).
[09:35:16.987] <TB3> INFO: Expecting 1029120 events.
[09:35:39.020] <TB3> INFO: 1029120 events read in total (21482ms).
[09:35:39.029] <TB3> INFO: Expecting 1029120 events.
[09:36:01.100] <TB3> INFO: 1029120 events read in total (21543ms).
[09:36:01.111] <TB3> INFO: Expecting 1029120 events.
[09:36:23.119] <TB3> INFO: 1029120 events read in total (21473ms).
[09:36:23.132] <TB3> INFO: Expecting 1029120 events.
[09:36:45.557] <TB3> INFO: 1029120 events read in total (21897ms).
[09:36:45.573] <TB3> INFO: Expecting 1029120 events.
[09:37:07.397] <TB3> INFO: 1029120 events read in total (21297ms).
[09:37:07.414] <TB3> INFO: Expecting 1029120 events.
[09:37:31.351] <TB3> INFO: 1029120 events read in total (23404ms).
[09:37:31.371] <TB3> INFO: Expecting 1029120 events.
[09:37:55.219] <TB3> INFO: 1029120 events read in total (23320ms).
[09:37:55.239] <TB3> INFO: Expecting 1029120 events.
[09:38:19.281] <TB3> INFO: 1029120 events read in total (23515ms).
[09:38:19.305] <TB3> INFO: Expecting 1029120 events.
[09:38:43.346] <TB3> INFO: 1029120 events read in total (23514ms).
[09:38:43.368] <TB3> INFO: Expecting 1029120 events.
[09:39:07.408] <TB3> INFO: 1029120 events read in total (23512ms).
[09:39:07.438] <TB3> INFO: Expecting 1029120 events.
[09:39:31.334] <TB3> INFO: 1029120 events read in total (23368ms).
[09:39:31.360] <TB3> INFO: Expecting 1029120 events.
[09:39:55.419] <TB3> INFO: 1029120 events read in total (23530ms).
[09:39:55.455] <TB3> INFO: Expecting 1029120 events.
[09:40:19.339] <TB3> INFO: 1029120 events read in total (23357ms).
[09:40:19.373] <TB3> INFO: Expecting 1029120 events.
[09:40:43.442] <TB3> INFO: 1029120 events read in total (23541ms).
[09:40:43.483] <TB3> INFO: Expecting 1029120 events.
[09:41:07.278] <TB3> INFO: 1029120 events read in total (23267ms).
[09:41:07.322] <TB3> INFO: Test took 372587ms.
[09:41:08.399] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 20 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[09:41:08.407] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[09:41:08.407] <TB3> INFO: run 1 of 1
[09:41:08.725] <TB3> INFO: Expecting 16640000 events.
[09:41:33.847] <TB3> INFO: 724920 events read in total (24406ms).
[09:41:58.208] <TB3> INFO: 1446480 events read in total (48767ms).
[09:42:22.647] <TB3> INFO: 2167460 events read in total (73206ms).
[09:42:47.059] <TB3> INFO: 2889000 events read in total (97618ms).
[09:43:11.393] <TB3> INFO: 3610440 events read in total (121952ms).
[09:43:35.812] <TB3> INFO: 4331900 events read in total (146371ms).
[09:43:59.974] <TB3> INFO: 5053500 events read in total (170533ms).
[09:44:24.447] <TB3> INFO: 5775180 events read in total (195006ms).
[09:44:48.920] <TB3> INFO: 6497040 events read in total (219479ms).
[09:45:13.370] <TB3> INFO: 7218260 events read in total (243929ms).
[09:45:37.761] <TB3> INFO: 7939900 events read in total (268320ms).
[09:46:01.931] <TB3> INFO: 8659160 events read in total (292490ms).
[09:46:26.189] <TB3> INFO: 9376240 events read in total (316748ms).
[09:46:50.480] <TB3> INFO: 10092720 events read in total (341039ms).
[09:47:14.748] <TB3> INFO: 10807620 events read in total (365307ms).
[09:47:39.049] <TB3> INFO: 11522740 events read in total (389608ms).
[09:48:03.434] <TB3> INFO: 12237520 events read in total (413993ms).
[09:48:27.677] <TB3> INFO: 12951040 events read in total (438236ms).
[09:48:51.985] <TB3> INFO: 13664460 events read in total (462544ms).
[09:49:16.287] <TB3> INFO: 14377140 events read in total (486846ms).
[09:49:40.530] <TB3> INFO: 15091200 events read in total (511089ms).
[09:50:04.834] <TB3> INFO: 15805360 events read in total (535393ms).
[09:50:29.141] <TB3> INFO: 16519840 events read in total (559700ms).
[09:50:33.329] <TB3> INFO: 16640000 events read in total (563888ms).
[09:50:33.400] <TB3> INFO: Test took 564993ms.
[09:50:33.612] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:59.575] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.046634 .. 72.228220
[09:50:59.654] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 0 .. 82 (-1/-1) hits flags = 16 (plus default)
[09:50:59.663] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[09:50:59.663] <TB3> INFO: run 1 of 1
[09:50:59.983] <TB3> INFO: Expecting 6905600 events.
[09:51:26.170] <TB3> INFO: 840700 events read in total (25470ms).
[09:51:51.743] <TB3> INFO: 1681340 events read in total (51043ms).
[09:52:17.425] <TB3> INFO: 2523000 events read in total (76725ms).
[09:52:42.838] <TB3> INFO: 3364580 events read in total (102138ms).
[09:53:08.602] <TB3> INFO: 4204520 events read in total (127902ms).
[09:53:34.269] <TB3> INFO: 5041460 events read in total (153569ms).
[09:53:59.659] <TB3> INFO: 5876140 events read in total (178959ms).
[09:54:22.543] <TB3> INFO: 6710760 events read in total (201843ms).
[09:54:28.384] <TB3> INFO: 6905600 events read in total (207684ms).
[09:54:28.403] <TB3> INFO: Test took 208741ms.
[09:54:28.463] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:54:44.897] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 14.151600 .. 55.274184
[09:54:44.978] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 4 .. 65 (-1/-1) hits flags = 16 (plus default)
[09:54:44.988] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[09:54:44.988] <TB3> INFO: run 1 of 1
[09:54:45.308] <TB3> INFO: Expecting 5158400 events.
[09:55:11.989] <TB3> INFO: 883880 events read in total (25958ms).
[09:55:38.098] <TB3> INFO: 1767900 events read in total (52067ms).
[09:56:04.129] <TB3> INFO: 2651780 events read in total (78098ms).
[09:56:30.320] <TB3> INFO: 3533980 events read in total (104289ms).
[09:56:56.284] <TB3> INFO: 4416060 events read in total (130253ms).
[09:57:16.847] <TB3> INFO: 5158400 events read in total (150816ms).
[09:57:16.867] <TB3> INFO: Test took 151879ms.
[09:57:16.920] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:32.084] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 18.511600 .. 47.693346
[09:57:32.164] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 8 .. 57 (-1/-1) hits flags = 16 (plus default)
[09:57:32.173] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[09:57:32.173] <TB3> INFO: run 1 of 1
[09:57:32.480] <TB3> INFO: Expecting 4160000 events.
[09:57:59.416] <TB3> INFO: 910140 events read in total (26210ms).
[09:58:25.824] <TB3> INFO: 1820560 events read in total (52618ms).
[09:58:52.359] <TB3> INFO: 2729760 events read in total (79154ms).
[09:59:18.838] <TB3> INFO: 3637840 events read in total (105632ms).
[09:59:33.657] <TB3> INFO: 4160000 events read in total (120451ms).
[09:59:33.676] <TB3> INFO: Test took 121503ms.
[09:59:33.713] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:59:46.867] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 20.577114 .. 47.693346
[09:59:46.947] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 10 .. 57 (-1/-1) hits flags = 16 (plus default)
[09:59:46.956] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[09:59:46.956] <TB3> INFO: run 1 of 1
[09:59:47.259] <TB3> INFO: Expecting 3993600 events.
[10:00:12.839] <TB3> INFO: 898380 events read in total (24855ms).
[10:00:39.138] <TB3> INFO: 1796820 events read in total (51154ms).
[10:01:05.351] <TB3> INFO: 2695320 events read in total (77368ms).
[10:01:31.616] <TB3> INFO: 3593020 events read in total (103632ms).
[10:01:42.470] <TB3> INFO: 3993600 events read in total (114487ms).
[10:01:42.486] <TB3> INFO: Test took 115530ms.
[10:01:42.519] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:55.845] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[10:01:55.845] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 20 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[10:01:55.854] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[10:01:55.854] <TB3> INFO: run 1 of 1
[10:01:56.192] <TB3> INFO: Expecting 3411200 events.
[10:02:22.531] <TB3> INFO: 879560 events read in total (25622ms).
[10:02:48.597] <TB3> INFO: 1758840 events read in total (51689ms).
[10:03:12.381] <TB3> INFO: 2637780 events read in total (75474ms).
[10:03:34.637] <TB3> INFO: 3411200 events read in total (97728ms).
[10:03:34.651] <TB3> INFO: Test took 98796ms.
[10:03:34.688] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:03:47.833] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:03:47.833] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:03:47.833] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:03:47.833] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:03:47.834] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:03:47.834] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:03:47.834] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:03:47.834] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:03:47.834] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:03:47.834] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:03:47.834] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:03:47.834] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:03:47.834] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:03:47.835] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:03:47.835] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:03:47.835] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:03:47.835] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C0.dat
[10:03:47.843] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C1.dat
[10:03:47.852] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C2.dat
[10:03:47.860] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C3.dat
[10:03:47.869] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C4.dat
[10:03:47.878] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C5.dat
[10:03:47.886] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C6.dat
[10:03:47.895] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C7.dat
[10:03:47.902] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C8.dat
[10:03:47.908] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C9.dat
[10:03:47.915] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C10.dat
[10:03:47.921] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C11.dat
[10:03:47.927] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C12.dat
[10:03:47.933] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C13.dat
[10:03:47.939] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C14.dat
[10:03:47.945] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C15.dat
[10:03:47.954] <TB3> INFO: PixTestTrim::trimTest() done
[10:03:47.954] <TB3> INFO: vtrim: 92 112 96 99 94 93 95 98 105 104 93 104 107 94 98 101
[10:03:47.954] <TB3> INFO: vthrcomp: 81 83 80 89 95 84 89 76 93 84 83 92 91 81 85 100
[10:03:47.954] <TB3> INFO: vcal mean: 35.01 34.96 34.99 35.00 34.97 34.94 34.98 35.01 34.97 34.94 35.01 34.98 34.96 34.99 34.99 34.96
[10:03:47.954] <TB3> INFO: vcal RMS: 0.68 0.76 0.70 0.66 0.78 0.69 0.64 0.65 0.74 0.74 0.69 0.74 0.70 0.64 0.68 0.71
[10:03:47.954] <TB3> INFO: bits mean: 9.25 9.90 9.72 9.16 9.43 9.23 9.25 8.78 9.22 9.32 9.27 9.10 9.17 9.14 9.16 9.24
[10:03:47.954] <TB3> INFO: bits RMS: 2.83 2.64 2.63 2.84 2.84 2.69 2.66 2.50 2.81 2.88 2.74 2.81 2.80 2.85 2.80 2.71
[10:03:47.961] <TB3> INFO: ----------------------------------------------------------------------
[10:03:47.961] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[10:03:47.961] <TB3> INFO: ----------------------------------------------------------------------
[10:03:47.964] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[10:03:47.973] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:03:47.973] <TB3> INFO: run 1 of 1
[10:03:48.309] <TB3> INFO: Expecting 8320000 events.
[10:04:18.096] <TB3> INFO: 903850 events read in total (29071ms).
[10:04:47.376] <TB3> INFO: 1799940 events read in total (58351ms).
[10:05:14.907] <TB3> INFO: 2693830 events read in total (85882ms).
[10:05:42.014] <TB3> INFO: 3585710 events read in total (112989ms).
[10:06:08.777] <TB3> INFO: 4473010 events read in total (139752ms).
[10:06:35.693] <TB3> INFO: 5355110 events read in total (166668ms).
[10:07:04.452] <TB3> INFO: 6235850 events read in total (195427ms).
[10:07:33.224] <TB3> INFO: 7115870 events read in total (224199ms).
[10:08:02.069] <TB3> INFO: 7997520 events read in total (253044ms).
[10:08:12.812] <TB3> INFO: 8320000 events read in total (263787ms).
[10:08:12.851] <TB3> INFO: Test took 264878ms.
[10:08:12.971] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:08:39.220] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 160 (-1/-1) hits flags = 16 (plus default)
[10:08:39.229] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:08:39.229] <TB3> INFO: run 1 of 1
[10:08:39.543] <TB3> INFO: Expecting 6697600 events.
[10:09:10.065] <TB3> INFO: 947750 events read in total (29806ms).
[10:09:39.644] <TB3> INFO: 1885390 events read in total (59385ms).
[10:10:09.312] <TB3> INFO: 2820340 events read in total (89053ms).
[10:10:36.389] <TB3> INFO: 3747870 events read in total (116130ms).
[10:11:03.553] <TB3> INFO: 4668930 events read in total (143294ms).
[10:11:30.834] <TB3> INFO: 5588290 events read in total (170575ms).
[10:11:59.653] <TB3> INFO: 6508690 events read in total (199394ms).
[10:12:06.014] <TB3> INFO: 6697600 events read in total (205755ms).
[10:12:06.049] <TB3> INFO: Test took 206820ms.
[10:12:06.135] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:12:28.958] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[10:12:28.967] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:12:28.967] <TB3> INFO: run 1 of 1
[10:12:29.280] <TB3> INFO: Expecting 6240000 events.
[10:13:00.005] <TB3> INFO: 977520 events read in total (30009ms).
[10:13:30.086] <TB3> INFO: 1944180 events read in total (60090ms).
[10:14:00.074] <TB3> INFO: 2906590 events read in total (90079ms).
[10:14:29.945] <TB3> INFO: 3857680 events read in total (119949ms).
[10:14:59.527] <TB3> INFO: 4804650 events read in total (149531ms).
[10:15:26.974] <TB3> INFO: 5750920 events read in total (176978ms).
[10:15:42.567] <TB3> INFO: 6240000 events read in total (192571ms).
[10:15:42.593] <TB3> INFO: Test took 193626ms.
[10:15:42.661] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:16:05.317] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[10:16:05.326] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:16:05.326] <TB3> INFO: run 1 of 1
[10:16:05.660] <TB3> INFO: Expecting 6240000 events.
[10:16:36.471] <TB3> INFO: 977420 events read in total (30095ms).
[10:17:06.514] <TB3> INFO: 1943980 events read in total (60139ms).
[10:17:36.353] <TB3> INFO: 2906120 events read in total (89977ms).
[10:18:06.172] <TB3> INFO: 3856970 events read in total (119796ms).
[10:18:36.034] <TB3> INFO: 4803940 events read in total (149658ms).
[10:19:05.397] <TB3> INFO: 5750090 events read in total (179021ms).
[10:19:19.935] <TB3> INFO: 6240000 events read in total (193559ms).
[10:19:19.960] <TB3> INFO: Test took 194634ms.
[10:19:20.026] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:19:43.057] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 150 (-1/-1) hits flags = 16 (plus default)
[10:19:43.066] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:19:43.066] <TB3> INFO: run 1 of 1
[10:19:43.388] <TB3> INFO: Expecting 6281600 events.
[10:20:14.077] <TB3> INFO: 973680 events read in total (29973ms).
[10:20:44.082] <TB3> INFO: 1937130 events read in total (59978ms).
[10:21:14.002] <TB3> INFO: 2895920 events read in total (89898ms).
[10:21:43.757] <TB3> INFO: 3844130 events read in total (119653ms).
[10:22:13.455] <TB3> INFO: 4788010 events read in total (149351ms).
[10:22:43.353] <TB3> INFO: 5731610 events read in total (179249ms).
[10:23:00.648] <TB3> INFO: 6281600 events read in total (196544ms).
[10:23:00.679] <TB3> INFO: Test took 197613ms.
[10:23:00.751] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:23:22.491] <TB3> INFO: PixTestTrim::trimBitTest() done
[10:23:22.492] <TB3> INFO: PixTestTrim::doTest() done, duration: 3719 seconds
[10:23:23.237] <TB3> INFO: ######################################################################
[10:23:23.237] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:23:23.237] <TB3> INFO: ######################################################################
[10:23:23.577] <TB3> INFO: Expecting 41600 events.
[10:23:28.035] <TB3> INFO: 41600 events read in total (3742ms).
[10:23:28.036] <TB3> INFO: Test took 4798ms.
[10:23:28.042] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:23:28.608] <TB3> INFO: Expecting 41600 events.
[10:23:33.102] <TB3> INFO: 41600 events read in total (3777ms).
[10:23:33.102] <TB3> INFO: Test took 4803ms.
[10:23:33.108] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:23:33.458] <TB3> INFO: Expecting 41600 events.
[10:23:37.962] <TB3> INFO: 41600 events read in total (3788ms).
[10:23:37.963] <TB3> INFO: Test took 4830ms.
[10:23:37.970] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:23:37.977] <TB3> INFO: The DUT currently contains the following objects:
[10:23:37.977] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:23:37.977] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:23:37.977] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:23:37.977] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:23:37.977] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:37.977] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:37.977] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:37.977] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:37.977] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:37.977] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:37.977] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:37.977] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:37.977] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:37.977] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:37.977] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:37.977] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:37.977] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:37.977] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:37.977] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:37.977] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:38.311] <TB3> INFO: Expecting 2560 events.
[10:23:39.380] <TB3> INFO: 2560 events read in total (353ms).
[10:23:39.381] <TB3> INFO: Test took 1404ms.
[10:23:39.381] <TB3> INFO: The DUT currently contains the following objects:
[10:23:39.381] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:23:39.381] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:23:39.381] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:23:39.381] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:23:39.381] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:39.381] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:39.381] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:39.381] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:39.381] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:39.381] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:39.381] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:39.382] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:39.382] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:39.382] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:39.382] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:39.382] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:39.382] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:39.382] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:39.382] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:39.382] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:39.796] <TB3> INFO: Expecting 2560 events.
[10:23:40.866] <TB3> INFO: 2560 events read in total (354ms).
[10:23:40.866] <TB3> INFO: Test took 1484ms.
[10:23:40.867] <TB3> INFO: The DUT currently contains the following objects:
[10:23:40.867] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:23:40.867] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:23:40.867] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:23:40.867] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:23:40.867] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:40.867] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:40.867] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:40.867] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:40.867] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:40.867] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:40.867] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:40.867] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:40.867] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:40.867] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:40.867] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:40.867] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:40.868] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:40.868] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:40.868] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:40.868] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:41.281] <TB3> INFO: Expecting 2560 events.
[10:23:42.344] <TB3> INFO: 2560 events read in total (348ms).
[10:23:42.345] <TB3> INFO: Test took 1477ms.
[10:23:42.345] <TB3> INFO: The DUT currently contains the following objects:
[10:23:42.345] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:23:42.345] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:23:42.345] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:23:42.345] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:23:42.345] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:42.345] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:42.345] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:42.345] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:42.345] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:42.345] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:42.345] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:42.345] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:42.345] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:42.345] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:42.345] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:42.345] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:42.345] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:42.345] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:42.345] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:42.345] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:42.759] <TB3> INFO: Expecting 2560 events.
[10:23:43.821] <TB3> INFO: 2560 events read in total (346ms).
[10:23:43.821] <TB3> INFO: Test took 1476ms.
[10:23:43.821] <TB3> INFO: The DUT currently contains the following objects:
[10:23:43.821] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:23:43.821] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:23:43.821] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:23:43.821] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:23:43.821] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:43.821] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:43.821] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:43.821] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:43.821] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:43.821] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:43.821] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:43.821] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:43.821] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:43.821] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:43.821] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:43.821] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:43.822] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:43.822] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:43.822] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:43.822] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:44.236] <TB3> INFO: Expecting 2560 events.
[10:23:45.299] <TB3> INFO: 2560 events read in total (347ms).
[10:23:45.299] <TB3> INFO: Test took 1477ms.
[10:23:45.300] <TB3> INFO: The DUT currently contains the following objects:
[10:23:45.300] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:23:45.300] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:23:45.300] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:23:45.300] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:23:45.300] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:45.300] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:45.300] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:45.300] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:45.300] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:45.300] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:45.300] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:45.300] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:45.300] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:45.300] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:45.300] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:45.300] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:45.300] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:45.300] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:45.300] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:45.300] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:45.714] <TB3> INFO: Expecting 2560 events.
[10:23:46.778] <TB3> INFO: 2560 events read in total (348ms).
[10:23:46.778] <TB3> INFO: Test took 1478ms.
[10:23:46.778] <TB3> INFO: The DUT currently contains the following objects:
[10:23:46.779] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:23:46.779] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:23:46.779] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:23:46.779] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:23:46.779] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:46.779] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:46.779] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:46.779] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:46.779] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:46.779] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:46.779] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:46.779] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:46.779] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:46.779] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:46.779] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:46.779] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:46.779] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:46.779] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:46.779] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:46.779] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:47.193] <TB3> INFO: Expecting 2560 events.
[10:23:48.256] <TB3> INFO: 2560 events read in total (347ms).
[10:23:48.256] <TB3> INFO: Test took 1477ms.
[10:23:48.256] <TB3> INFO: The DUT currently contains the following objects:
[10:23:48.256] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:23:48.256] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:23:48.256] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:23:48.256] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:23:48.256] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:48.257] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:48.257] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:48.257] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:48.257] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:48.257] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:48.257] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:48.257] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:48.257] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:48.257] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:48.257] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:48.257] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:48.257] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:48.257] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:48.257] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:48.257] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:48.670] <TB3> INFO: Expecting 2560 events.
[10:23:49.733] <TB3> INFO: 2560 events read in total (347ms).
[10:23:49.733] <TB3> INFO: Test took 1476ms.
[10:23:49.733] <TB3> INFO: The DUT currently contains the following objects:
[10:23:49.733] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:23:49.733] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:23:49.733] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:23:49.733] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:23:49.733] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:49.733] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:49.733] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:49.733] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:49.733] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:49.733] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:49.733] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:49.733] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:49.733] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:49.734] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:49.734] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:49.734] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:49.734] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:49.734] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:49.734] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:49.734] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:50.147] <TB3> INFO: Expecting 2560 events.
[10:23:51.209] <TB3> INFO: 2560 events read in total (346ms).
[10:23:51.209] <TB3> INFO: Test took 1475ms.
[10:23:51.209] <TB3> INFO: The DUT currently contains the following objects:
[10:23:51.209] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:23:51.209] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:23:51.209] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:23:51.209] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:23:51.209] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:51.209] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:51.209] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:51.209] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:51.209] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:51.209] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:51.209] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:51.209] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:51.209] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:51.209] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:51.209] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:51.209] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:51.209] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:51.209] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:51.209] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:51.209] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:51.623] <TB3> INFO: Expecting 2560 events.
[10:23:52.685] <TB3> INFO: 2560 events read in total (346ms).
[10:23:52.685] <TB3> INFO: Test took 1476ms.
[10:23:52.686] <TB3> INFO: The DUT currently contains the following objects:
[10:23:52.686] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:23:52.686] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:23:52.686] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:23:52.686] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:23:52.686] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:52.686] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:52.686] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:52.686] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:52.686] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:52.686] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:52.686] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:52.686] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:52.686] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:52.686] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:52.686] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:52.686] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:52.686] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:52.686] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:52.686] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:52.686] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:53.100] <TB3> INFO: Expecting 2560 events.
[10:23:54.162] <TB3> INFO: 2560 events read in total (346ms).
[10:23:54.162] <TB3> INFO: Test took 1476ms.
[10:23:54.162] <TB3> INFO: The DUT currently contains the following objects:
[10:23:54.162] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:23:54.162] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:23:54.162] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:23:54.162] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:23:54.162] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:54.162] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:54.162] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:54.162] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:54.162] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:54.162] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:54.162] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:54.162] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:54.162] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:54.162] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:54.162] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:54.162] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:54.162] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:54.162] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:54.162] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:54.162] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:54.576] <TB3> INFO: Expecting 2560 events.
[10:23:55.640] <TB3> INFO: 2560 events read in total (348ms).
[10:23:55.640] <TB3> INFO: Test took 1478ms.
[10:23:55.640] <TB3> INFO: The DUT currently contains the following objects:
[10:23:55.640] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:23:55.640] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:23:55.640] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:23:55.640] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:23:55.640] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:55.640] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:55.640] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:55.641] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:55.641] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:55.641] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:55.641] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:55.641] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:55.641] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:55.641] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:55.641] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:55.641] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:55.641] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:55.641] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:55.641] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:55.641] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:56.054] <TB3> INFO: Expecting 2560 events.
[10:23:57.117] <TB3> INFO: 2560 events read in total (347ms).
[10:23:57.117] <TB3> INFO: Test took 1476ms.
[10:23:57.118] <TB3> INFO: The DUT currently contains the following objects:
[10:23:57.118] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:23:57.118] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:23:57.118] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:23:57.118] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:23:57.118] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:57.118] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:57.118] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:57.118] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:57.118] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:57.118] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:57.118] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:57.118] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:57.118] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:57.118] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:57.118] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:57.118] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:57.118] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:57.118] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:57.118] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:57.118] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:57.532] <TB3> INFO: Expecting 2560 events.
[10:23:58.594] <TB3> INFO: 2560 events read in total (346ms).
[10:23:58.594] <TB3> INFO: Test took 1476ms.
[10:23:58.596] <TB3> INFO: The DUT currently contains the following objects:
[10:23:58.596] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:23:58.596] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:23:58.596] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:23:58.596] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:23:58.596] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:58.596] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:58.596] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:58.596] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:58.596] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:58.596] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:58.596] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:58.596] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:58.596] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:58.596] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:58.596] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:58.596] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:58.596] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:58.596] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:58.596] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:58.596] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:23:59.009] <TB3> INFO: Expecting 2560 events.
[10:24:00.073] <TB3> INFO: 2560 events read in total (348ms).
[10:24:00.073] <TB3> INFO: Test took 1477ms.
[10:24:00.073] <TB3> INFO: The DUT currently contains the following objects:
[10:24:00.073] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:24:00.073] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:24:00.073] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:24:00.073] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:24:00.073] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:24:00.073] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:24:00.073] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:24:00.073] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:24:00.073] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:24:00.073] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:24:00.073] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:24:00.074] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:24:00.074] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:24:00.074] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:24:00.074] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:24:00.074] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:24:00.074] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:24:00.074] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:24:00.074] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:24:00.074] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:24:00.487] <TB3> INFO: Expecting 2560 events.
[10:24:01.550] <TB3> INFO: 2560 events read in total (346ms).
[10:24:01.551] <TB3> INFO: Test took 1477ms.
[10:24:01.554] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:24:01.967] <TB3> INFO: Expecting 655360 events.
[10:24:18.762] <TB3> INFO: 655360 events read in total (16079ms).
[10:24:18.770] <TB3> INFO: Expecting 655360 events.
[10:24:35.341] <TB3> INFO: 655360 events read in total (16043ms).
[10:24:35.354] <TB3> INFO: Expecting 655360 events.
[10:24:51.967] <TB3> INFO: 655360 events read in total (16085ms).
[10:24:51.984] <TB3> INFO: Expecting 655360 events.
[10:25:08.254] <TB3> INFO: 655360 events read in total (15742ms).
[10:25:08.274] <TB3> INFO: Expecting 655360 events.
[10:25:24.034] <TB3> INFO: 655360 events read in total (15232ms).
[10:25:24.058] <TB3> INFO: Expecting 655360 events.
[10:25:40.730] <TB3> INFO: 655360 events read in total (16144ms).
[10:25:40.755] <TB3> INFO: Expecting 655360 events.
[10:25:57.273] <TB3> INFO: 655360 events read in total (15990ms).
[10:25:57.303] <TB3> INFO: Expecting 655360 events.
[10:26:13.853] <TB3> INFO: 655360 events read in total (16022ms).
[10:26:13.886] <TB3> INFO: Expecting 655360 events.
[10:26:30.430] <TB3> INFO: 655360 events read in total (16016ms).
[10:26:30.466] <TB3> INFO: Expecting 655360 events.
[10:26:47.087] <TB3> INFO: 655360 events read in total (16093ms).
[10:26:47.126] <TB3> INFO: Expecting 655360 events.
[10:27:02.251] <TB3> INFO: 655360 events read in total (14597ms).
[10:27:02.293] <TB3> INFO: Expecting 655360 events.
[10:27:17.964] <TB3> INFO: 655360 events read in total (15143ms).
[10:27:18.017] <TB3> INFO: Expecting 655360 events.
[10:27:34.454] <TB3> INFO: 655360 events read in total (15909ms).
[10:27:34.510] <TB3> INFO: Expecting 655360 events.
[10:27:49.827] <TB3> INFO: 655360 events read in total (14789ms).
[10:27:49.884] <TB3> INFO: Expecting 655360 events.
[10:28:04.971] <TB3> INFO: 655360 events read in total (14560ms).
[10:28:05.029] <TB3> INFO: Expecting 655360 events.
[10:28:21.482] <TB3> INFO: 655360 events read in total (15926ms).
[10:28:21.542] <TB3> INFO: Test took 259989ms.
[10:28:21.627] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:28:21.932] <TB3> INFO: Expecting 655360 events.
[10:28:39.056] <TB3> INFO: 655360 events read in total (16408ms).
[10:28:39.065] <TB3> INFO: Expecting 655360 events.
[10:28:55.679] <TB3> INFO: 655360 events read in total (16086ms).
[10:28:55.692] <TB3> INFO: Expecting 655360 events.
[10:29:12.181] <TB3> INFO: 655360 events read in total (15961ms).
[10:29:12.197] <TB3> INFO: Expecting 655360 events.
[10:29:28.649] <TB3> INFO: 655360 events read in total (15925ms).
[10:29:28.668] <TB3> INFO: Expecting 655360 events.
[10:29:45.101] <TB3> INFO: 655360 events read in total (15905ms).
[10:29:45.125] <TB3> INFO: Expecting 655360 events.
[10:30:00.239] <TB3> INFO: 655360 events read in total (14586ms).
[10:30:00.267] <TB3> INFO: Expecting 655360 events.
[10:30:15.795] <TB3> INFO: 655360 events read in total (15001ms).
[10:30:15.825] <TB3> INFO: Expecting 655360 events.
[10:30:32.446] <TB3> INFO: 655360 events read in total (16094ms).
[10:30:32.479] <TB3> INFO: Expecting 655360 events.
[10:30:49.130] <TB3> INFO: 655360 events read in total (16123ms).
[10:30:49.167] <TB3> INFO: Expecting 655360 events.
[10:31:05.566] <TB3> INFO: 655360 events read in total (15871ms).
[10:31:05.607] <TB3> INFO: Expecting 655360 events.
[10:31:22.190] <TB3> INFO: 655360 events read in total (16055ms).
[10:31:22.232] <TB3> INFO: Expecting 655360 events.
[10:31:38.766] <TB3> INFO: 655360 events read in total (16006ms).
[10:31:38.816] <TB3> INFO: Expecting 655360 events.
[10:31:55.237] <TB3> INFO: 655360 events read in total (15893ms).
[10:31:55.292] <TB3> INFO: Expecting 655360 events.
[10:32:11.793] <TB3> INFO: 655360 events read in total (15974ms).
[10:32:11.854] <TB3> INFO: Expecting 655360 events.
[10:32:28.451] <TB3> INFO: 655360 events read in total (16070ms).
[10:32:28.517] <TB3> INFO: Expecting 655360 events.
[10:32:44.946] <TB3> INFO: 655360 events read in total (15902ms).
[10:32:45.012] <TB3> INFO: Test took 263385ms.
[10:32:45.238] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:32:45.245] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:32:45.252] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:32:45.259] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:32:45.267] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:32:45.274] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:32:45.281] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:32:45.288] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:32:45.296] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:32:45.303] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:32:45.311] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:32:45.318] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:32:45.325] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:32:45.333] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:32:45.340] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:32:45.347] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:32:45.385] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:32:45.385] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:32:45.385] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:32:45.386] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:32:45.386] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:32:45.386] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:32:45.386] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:32:45.386] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:32:45.386] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:32:45.386] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:32:45.386] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:32:45.387] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:32:45.387] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:32:45.387] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:32:45.387] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:32:45.387] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:32:45.698] <TB3> INFO: Expecting 41600 events.
[10:32:50.184] <TB3> INFO: 41600 events read in total (3770ms).
[10:32:50.185] <TB3> INFO: Test took 4795ms.
[10:32:50.760] <TB3> INFO: Expecting 41600 events.
[10:32:55.276] <TB3> INFO: 41600 events read in total (3801ms).
[10:32:55.278] <TB3> INFO: Test took 4857ms.
[10:32:55.824] <TB3> INFO: Expecting 41600 events.
[10:33:00.247] <TB3> INFO: 41600 events read in total (3707ms).
[10:33:00.248] <TB3> INFO: Test took 4741ms.
[10:33:00.484] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:00.616] <TB3> INFO: Expecting 2560 events.
[10:33:01.685] <TB3> INFO: 2560 events read in total (352ms).
[10:33:01.686] <TB3> INFO: Test took 1202ms.
[10:33:01.689] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:02.101] <TB3> INFO: Expecting 2560 events.
[10:33:03.171] <TB3> INFO: 2560 events read in total (353ms).
[10:33:03.172] <TB3> INFO: Test took 1483ms.
[10:33:03.174] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:03.588] <TB3> INFO: Expecting 2560 events.
[10:33:04.658] <TB3> INFO: 2560 events read in total (355ms).
[10:33:04.659] <TB3> INFO: Test took 1485ms.
[10:33:04.663] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:05.074] <TB3> INFO: Expecting 2560 events.
[10:33:06.143] <TB3> INFO: 2560 events read in total (352ms).
[10:33:06.143] <TB3> INFO: Test took 1480ms.
[10:33:06.146] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:06.559] <TB3> INFO: Expecting 2560 events.
[10:33:07.629] <TB3> INFO: 2560 events read in total (354ms).
[10:33:07.629] <TB3> INFO: Test took 1483ms.
[10:33:07.631] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:08.045] <TB3> INFO: Expecting 2560 events.
[10:33:09.113] <TB3> INFO: 2560 events read in total (352ms).
[10:33:09.113] <TB3> INFO: Test took 1482ms.
[10:33:09.115] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:09.529] <TB3> INFO: Expecting 2560 events.
[10:33:10.598] <TB3> INFO: 2560 events read in total (353ms).
[10:33:10.599] <TB3> INFO: Test took 1484ms.
[10:33:10.601] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:11.014] <TB3> INFO: Expecting 2560 events.
[10:33:12.084] <TB3> INFO: 2560 events read in total (353ms).
[10:33:12.084] <TB3> INFO: Test took 1483ms.
[10:33:12.087] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:12.500] <TB3> INFO: Expecting 2560 events.
[10:33:13.569] <TB3> INFO: 2560 events read in total (353ms).
[10:33:13.569] <TB3> INFO: Test took 1482ms.
[10:33:13.571] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:13.985] <TB3> INFO: Expecting 2560 events.
[10:33:15.055] <TB3> INFO: 2560 events read in total (354ms).
[10:33:15.055] <TB3> INFO: Test took 1484ms.
[10:33:15.059] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:15.471] <TB3> INFO: Expecting 2560 events.
[10:33:16.555] <TB3> INFO: 2560 events read in total (367ms).
[10:33:16.555] <TB3> INFO: Test took 1496ms.
[10:33:16.557] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:16.971] <TB3> INFO: Expecting 2560 events.
[10:33:18.042] <TB3> INFO: 2560 events read in total (355ms).
[10:33:18.042] <TB3> INFO: Test took 1485ms.
[10:33:18.045] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:18.458] <TB3> INFO: Expecting 2560 events.
[10:33:19.527] <TB3> INFO: 2560 events read in total (353ms).
[10:33:19.527] <TB3> INFO: Test took 1482ms.
[10:33:19.530] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:19.943] <TB3> INFO: Expecting 2560 events.
[10:33:21.014] <TB3> INFO: 2560 events read in total (355ms).
[10:33:21.014] <TB3> INFO: Test took 1484ms.
[10:33:21.017] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:21.431] <TB3> INFO: Expecting 2560 events.
[10:33:22.501] <TB3> INFO: 2560 events read in total (354ms).
[10:33:22.501] <TB3> INFO: Test took 1484ms.
[10:33:22.504] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:22.917] <TB3> INFO: Expecting 2560 events.
[10:33:24.000] <TB3> INFO: 2560 events read in total (367ms).
[10:33:24.001] <TB3> INFO: Test took 1497ms.
[10:33:24.003] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:24.417] <TB3> INFO: Expecting 2560 events.
[10:33:25.487] <TB3> INFO: 2560 events read in total (353ms).
[10:33:25.488] <TB3> INFO: Test took 1485ms.
[10:33:25.490] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:25.902] <TB3> INFO: Expecting 2560 events.
[10:33:26.970] <TB3> INFO: 2560 events read in total (352ms).
[10:33:26.970] <TB3> INFO: Test took 1480ms.
[10:33:26.972] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:27.386] <TB3> INFO: Expecting 2560 events.
[10:33:28.459] <TB3> INFO: 2560 events read in total (357ms).
[10:33:28.460] <TB3> INFO: Test took 1489ms.
[10:33:28.463] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:28.876] <TB3> INFO: Expecting 2560 events.
[10:33:29.947] <TB3> INFO: 2560 events read in total (355ms).
[10:33:29.947] <TB3> INFO: Test took 1485ms.
[10:33:29.952] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:30.363] <TB3> INFO: Expecting 2560 events.
[10:33:31.433] <TB3> INFO: 2560 events read in total (354ms).
[10:33:31.433] <TB3> INFO: Test took 1481ms.
[10:33:31.436] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:31.849] <TB3> INFO: Expecting 2560 events.
[10:33:32.922] <TB3> INFO: 2560 events read in total (357ms).
[10:33:32.922] <TB3> INFO: Test took 1487ms.
[10:33:32.925] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:33.337] <TB3> INFO: Expecting 2560 events.
[10:33:34.408] <TB3> INFO: 2560 events read in total (354ms).
[10:33:34.409] <TB3> INFO: Test took 1484ms.
[10:33:34.412] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:34.825] <TB3> INFO: Expecting 2560 events.
[10:33:35.896] <TB3> INFO: 2560 events read in total (355ms).
[10:33:35.896] <TB3> INFO: Test took 1484ms.
[10:33:35.898] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:36.312] <TB3> INFO: Expecting 2560 events.
[10:33:37.379] <TB3> INFO: 2560 events read in total (351ms).
[10:33:37.380] <TB3> INFO: Test took 1482ms.
[10:33:37.382] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:37.796] <TB3> INFO: Expecting 2560 events.
[10:33:38.866] <TB3> INFO: 2560 events read in total (354ms).
[10:33:38.866] <TB3> INFO: Test took 1484ms.
[10:33:38.869] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:39.283] <TB3> INFO: Expecting 2560 events.
[10:33:40.353] <TB3> INFO: 2560 events read in total (354ms).
[10:33:40.354] <TB3> INFO: Test took 1485ms.
[10:33:40.357] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:40.769] <TB3> INFO: Expecting 2560 events.
[10:33:41.832] <TB3> INFO: 2560 events read in total (346ms).
[10:33:41.833] <TB3> INFO: Test took 1477ms.
[10:33:41.836] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:42.248] <TB3> INFO: Expecting 2560 events.
[10:33:43.318] <TB3> INFO: 2560 events read in total (353ms).
[10:33:43.319] <TB3> INFO: Test took 1484ms.
[10:33:43.324] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:43.735] <TB3> INFO: Expecting 2560 events.
[10:33:44.803] <TB3> INFO: 2560 events read in total (352ms).
[10:33:44.804] <TB3> INFO: Test took 1481ms.
[10:33:44.806] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:45.220] <TB3> INFO: Expecting 2560 events.
[10:33:46.283] <TB3> INFO: 2560 events read in total (347ms).
[10:33:46.283] <TB3> INFO: Test took 1477ms.
[10:33:46.284] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:46.698] <TB3> INFO: Expecting 2560 events.
[10:33:47.762] <TB3> INFO: 2560 events read in total (348ms).
[10:33:47.762] <TB3> INFO: Test took 1478ms.
[10:33:48.364] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 625 seconds
[10:33:48.364] <TB3> INFO: PH scale (per ROC): 82 81 90 91 81 76 83 87 82 80 85 74 76 90 83 81
[10:33:48.364] <TB3> INFO: PH offset (per ROC): 162 170 149 172 174 157 149 148 169 164 158 166 164 154 175 163
[10:33:48.539] <TB3> INFO: ######################################################################
[10:33:48.539] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:33:48.539] <TB3> INFO: ######################################################################
[10:33:48.549] <TB3> INFO: scanning low vcal = 10
[10:33:48.856] <TB3> INFO: Expecting 41600 events.
[10:33:52.382] <TB3> INFO: 41600 events read in total (2810ms).
[10:33:52.382] <TB3> INFO: Test took 3833ms.
[10:33:52.383] <TB3> INFO: scanning low vcal = 20
[10:33:52.797] <TB3> INFO: Expecting 41600 events.
[10:33:56.323] <TB3> INFO: 41600 events read in total (2810ms).
[10:33:56.323] <TB3> INFO: Test took 3940ms.
[10:33:56.325] <TB3> INFO: scanning low vcal = 30
[10:33:56.738] <TB3> INFO: Expecting 41600 events.
[10:34:00.295] <TB3> INFO: 41600 events read in total (2841ms).
[10:34:00.296] <TB3> INFO: Test took 3971ms.
[10:34:00.298] <TB3> INFO: scanning low vcal = 40
[10:34:00.707] <TB3> INFO: Expecting 41600 events.
[10:34:04.770] <TB3> INFO: 41600 events read in total (3347ms).
[10:34:04.770] <TB3> INFO: Test took 4472ms.
[10:34:04.773] <TB3> INFO: scanning low vcal = 50
[10:34:05.128] <TB3> INFO: Expecting 41600 events.
[10:34:09.149] <TB3> INFO: 41600 events read in total (3305ms).
[10:34:09.149] <TB3> INFO: Test took 4376ms.
[10:34:09.152] <TB3> INFO: scanning low vcal = 60
[10:34:09.502] <TB3> INFO: Expecting 41600 events.
[10:34:13.767] <TB3> INFO: 41600 events read in total (3549ms).
[10:34:13.768] <TB3> INFO: Test took 4616ms.
[10:34:13.771] <TB3> INFO: scanning low vcal = 70
[10:34:14.118] <TB3> INFO: Expecting 41600 events.
[10:34:18.325] <TB3> INFO: 41600 events read in total (3491ms).
[10:34:18.326] <TB3> INFO: Test took 4555ms.
[10:34:18.329] <TB3> INFO: scanning low vcal = 80
[10:34:18.667] <TB3> INFO: Expecting 41600 events.
[10:34:22.884] <TB3> INFO: 41600 events read in total (3501ms).
[10:34:22.885] <TB3> INFO: Test took 4556ms.
[10:34:22.888] <TB3> INFO: scanning low vcal = 90
[10:34:23.225] <TB3> INFO: Expecting 41600 events.
[10:34:27.553] <TB3> INFO: 41600 events read in total (3611ms).
[10:34:27.553] <TB3> INFO: Test took 4665ms.
[10:34:27.556] <TB3> INFO: scanning low vcal = 100
[10:34:27.902] <TB3> INFO: Expecting 41600 events.
[10:34:32.134] <TB3> INFO: 41600 events read in total (3515ms).
[10:34:32.135] <TB3> INFO: Test took 4579ms.
[10:34:32.138] <TB3> INFO: scanning low vcal = 110
[10:34:32.485] <TB3> INFO: Expecting 41600 events.
[10:34:36.654] <TB3> INFO: 41600 events read in total (3452ms).
[10:34:36.654] <TB3> INFO: Test took 4516ms.
[10:34:36.657] <TB3> INFO: scanning low vcal = 120
[10:34:37.008] <TB3> INFO: Expecting 41600 events.
[10:34:41.203] <TB3> INFO: 41600 events read in total (3479ms).
[10:34:41.203] <TB3> INFO: Test took 4546ms.
[10:34:41.206] <TB3> INFO: scanning low vcal = 130
[10:34:41.560] <TB3> INFO: Expecting 41600 events.
[10:34:45.808] <TB3> INFO: 41600 events read in total (3532ms).
[10:34:45.809] <TB3> INFO: Test took 4603ms.
[10:34:45.811] <TB3> INFO: scanning low vcal = 140
[10:34:46.159] <TB3> INFO: Expecting 41600 events.
[10:34:50.353] <TB3> INFO: 41600 events read in total (3478ms).
[10:34:50.353] <TB3> INFO: Test took 4542ms.
[10:34:50.356] <TB3> INFO: scanning low vcal = 150
[10:34:50.710] <TB3> INFO: Expecting 41600 events.
[10:34:54.938] <TB3> INFO: 41600 events read in total (3512ms).
[10:34:54.939] <TB3> INFO: Test took 4583ms.
[10:34:54.942] <TB3> INFO: scanning low vcal = 160
[10:34:55.293] <TB3> INFO: Expecting 41600 events.
[10:34:59.490] <TB3> INFO: 41600 events read in total (3480ms).
[10:34:59.491] <TB3> INFO: Test took 4549ms.
[10:34:59.494] <TB3> INFO: scanning low vcal = 170
[10:34:59.848] <TB3> INFO: Expecting 41600 events.
[10:35:04.023] <TB3> INFO: 41600 events read in total (3458ms).
[10:35:04.023] <TB3> INFO: Test took 4529ms.
[10:35:04.028] <TB3> INFO: scanning low vcal = 180
[10:35:04.370] <TB3> INFO: Expecting 41600 events.
[10:35:08.430] <TB3> INFO: 41600 events read in total (3344ms).
[10:35:08.430] <TB3> INFO: Test took 4402ms.
[10:35:08.434] <TB3> INFO: scanning low vcal = 190
[10:35:08.780] <TB3> INFO: Expecting 41600 events.
[10:35:12.814] <TB3> INFO: 41600 events read in total (3318ms).
[10:35:12.814] <TB3> INFO: Test took 4380ms.
[10:35:12.817] <TB3> INFO: scanning low vcal = 200
[10:35:13.169] <TB3> INFO: Expecting 41600 events.
[10:35:17.282] <TB3> INFO: 41600 events read in total (3397ms).
[10:35:17.283] <TB3> INFO: Test took 4466ms.
[10:35:17.286] <TB3> INFO: scanning low vcal = 210
[10:35:17.638] <TB3> INFO: Expecting 41600 events.
[10:35:21.678] <TB3> INFO: 41600 events read in total (3324ms).
[10:35:21.679] <TB3> INFO: Test took 4393ms.
[10:35:21.682] <TB3> INFO: scanning low vcal = 220
[10:35:22.034] <TB3> INFO: Expecting 41600 events.
[10:35:26.133] <TB3> INFO: 41600 events read in total (3383ms).
[10:35:26.134] <TB3> INFO: Test took 4452ms.
[10:35:26.137] <TB3> INFO: scanning low vcal = 230
[10:35:26.464] <TB3> INFO: Expecting 41600 events.
[10:35:30.525] <TB3> INFO: 41600 events read in total (3345ms).
[10:35:30.525] <TB3> INFO: Test took 4388ms.
[10:35:30.529] <TB3> INFO: scanning low vcal = 240
[10:35:30.876] <TB3> INFO: Expecting 41600 events.
[10:35:34.922] <TB3> INFO: 41600 events read in total (3330ms).
[10:35:34.923] <TB3> INFO: Test took 4394ms.
[10:35:34.925] <TB3> INFO: scanning low vcal = 250
[10:35:35.278] <TB3> INFO: Expecting 41600 events.
[10:35:39.329] <TB3> INFO: 41600 events read in total (3335ms).
[10:35:39.330] <TB3> INFO: Test took 4405ms.
[10:35:39.334] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[10:35:39.677] <TB3> INFO: Expecting 41600 events.
[10:35:43.754] <TB3> INFO: 41600 events read in total (3361ms).
[10:35:43.756] <TB3> INFO: Test took 4422ms.
[10:35:43.760] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[10:35:44.105] <TB3> INFO: Expecting 41600 events.
[10:35:48.156] <TB3> INFO: 41600 events read in total (3335ms).
[10:35:48.157] <TB3> INFO: Test took 4397ms.
[10:35:48.160] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[10:35:48.510] <TB3> INFO: Expecting 41600 events.
[10:35:52.614] <TB3> INFO: 41600 events read in total (3387ms).
[10:35:52.615] <TB3> INFO: Test took 4455ms.
[10:35:52.618] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[10:35:52.956] <TB3> INFO: Expecting 41600 events.
[10:35:57.137] <TB3> INFO: 41600 events read in total (3465ms).
[10:35:57.139] <TB3> INFO: Test took 4521ms.
[10:35:57.143] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[10:35:57.492] <TB3> INFO: Expecting 41600 events.
[10:36:01.580] <TB3> INFO: 41600 events read in total (3372ms).
[10:36:01.582] <TB3> INFO: Test took 4439ms.
[10:36:02.074] <TB3> INFO: PixTestGainPedestal::measure() done
[10:36:37.132] <TB3> INFO: PixTestGainPedestal::fit() done
[10:36:37.132] <TB3> INFO: non-linearity mean: 0.947 0.954 0.957 0.951 0.956 0.963 0.955 0.950 0.954 0.952 0.958 0.959 0.958 0.954 0.960 0.958
[10:36:37.132] <TB3> INFO: non-linearity RMS: 0.007 0.007 0.005 0.005 0.006 0.006 0.006 0.006 0.006 0.007 0.006 0.006 0.006 0.005 0.006 0.006
[10:36:37.133] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[10:36:37.153] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[10:36:37.173] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[10:36:37.192] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[10:36:37.212] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[10:36:37.232] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[10:36:37.251] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[10:36:37.271] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[10:36:37.290] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[10:36:37.310] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[10:36:37.329] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[10:36:37.349] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[10:36:37.368] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[10:36:37.387] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[10:36:37.406] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[10:36:37.426] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[10:36:37.445] <TB3> INFO: PixTestGainPedestal::doTest() done, duration: 168 seconds
[10:36:37.452] <TB3> INFO: readReadbackCal: /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C15.dat
[10:36:37.453] <TB3> INFO: PixTestReadback::doTest() start.
[10:36:37.454] <TB3> INFO: PixTestReadback::RES sent once
[10:36:59.371] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C0.dat
[10:36:59.371] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C1.dat
[10:36:59.371] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C2.dat
[10:36:59.371] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C3.dat
[10:36:59.371] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C4.dat
[10:36:59.371] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C5.dat
[10:36:59.371] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C6.dat
[10:36:59.372] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C7.dat
[10:36:59.372] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C8.dat
[10:36:59.372] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C9.dat
[10:36:59.372] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C10.dat
[10:36:59.372] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C11.dat
[10:36:59.372] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C12.dat
[10:36:59.372] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C13.dat
[10:36:59.372] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C14.dat
[10:36:59.372] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C15.dat
[10:36:59.402] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:36:59.403] <TB3> INFO: PixTestReadback::RES sent once
[10:37:21.124] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C0.dat
[10:37:21.125] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C1.dat
[10:37:21.125] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C2.dat
[10:37:21.125] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C3.dat
[10:37:21.125] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C4.dat
[10:37:21.125] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C5.dat
[10:37:21.125] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C6.dat
[10:37:21.125] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C7.dat
[10:37:21.125] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C8.dat
[10:37:21.125] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C9.dat
[10:37:21.125] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C10.dat
[10:37:21.125] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C11.dat
[10:37:21.126] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C12.dat
[10:37:21.126] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C13.dat
[10:37:21.126] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C14.dat
[10:37:21.126] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C15.dat
[10:37:21.159] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:37:21.159] <TB3> INFO: PixTestReadback::RES sent once
[10:37:38.006] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:37:38.006] <TB3> INFO: Vbg will be calibrated using Vd calibration
[10:37:38.006] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 149.7calibrated Vbg = 1.19306 :::*/*/*/*/
[10:37:38.006] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 155.2calibrated Vbg = 1.18921 :::*/*/*/*/
[10:37:38.006] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 157.9calibrated Vbg = 1.19715 :::*/*/*/*/
[10:37:38.006] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[10:37:38.006] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 145.2calibrated Vbg = 1.20365 :::*/*/*/*/
[10:37:38.006] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 150.6calibrated Vbg = 1.20408 :::*/*/*/*/
[10:37:38.006] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 147.9calibrated Vbg = 1.20909 :::*/*/*/*/
[10:37:38.006] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[10:37:38.007] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 169.9calibrated Vbg = 1.20216 :::*/*/*/*/
[10:37:38.007] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 158.8calibrated Vbg = 1.20119 :::*/*/*/*/
[10:37:38.007] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 156.2calibrated Vbg = 1.19597 :::*/*/*/*/
[10:37:38.007] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[10:37:38.007] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 155.7calibrated Vbg = 1.19275 :::*/*/*/*/
[10:37:38.007] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 149.3calibrated Vbg = 1.1971 :::*/*/*/*/
[10:37:38.007] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 146.9calibrated Vbg = 1.19729 :::*/*/*/*/
[10:37:38.007] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[10:37:38.009] <TB3> INFO: PixTestReadback::RES sent once
[10:42:18.257] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C0.dat
[10:42:18.257] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C1.dat
[10:42:18.258] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C2.dat
[10:42:18.258] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C3.dat
[10:42:18.258] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C4.dat
[10:42:18.258] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C5.dat
[10:42:18.258] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C6.dat
[10:42:18.258] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C7.dat
[10:42:18.258] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C8.dat
[10:42:18.258] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C9.dat
[10:42:18.258] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C10.dat
[10:42:18.258] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C11.dat
[10:42:18.258] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C12.dat
[10:42:18.258] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C13.dat
[10:42:18.259] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C14.dat
[10:42:18.259] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2102_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C15.dat
[10:42:18.289] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:42:18.290] <TB3> INFO: PixTestReadback::doTest() done
[10:42:18.302] <TB3> INFO: enter test to run
[10:42:18.302] <TB3> INFO: test: exit no parameter change
[10:42:18.874] <TB3> QUIET: Connection to board 170 closed.
[10:42:18.953] <TB3> INFO: pXar: this is the end, my friend
MoReWeb-v1.0.0-5-g82d9ff6 on branch psi46master